mx6: ddr: Allow changing REFSEL and REFR fields

[people/ms/u-boot.git] / board / freescale / mx6sabresd / mx6sabresd.c

diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c
index 0cf68097f4f43e3d5a278e86d357454c921b9146..f836ecbf275ed7984996d70606c50c5a17551ada 100644 (file)
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -854,6 +854,8 @@ static void spl_dram_init(void)
                .sde_to_rst = 0x10,     /* 14 cycles, 200us (JEDEC default) */
                .rst_to_cke = 0x23,     /* 33 cycles, 500us (JEDEC default) */
                .ddr_type = DDR_TYPE_DDR3,
+               .refsel = 1,    /* Refresh cycles at 32KHz */
+               .refr = 7,      /* 8 refresh commands per refresh cycle */
        };
 
        if (is_mx6dqp()) {