mx6: ddr: Allow changing REFSEL and REFR fields

[people/ms/u-boot.git] / board / phytec / pcm058 / pcm058.c

diff --git a/board/phytec/pcm058/pcm058.c b/board/phytec/pcm058/pcm058.c
index 0ba4a2e268074c7febe5668b42015ca0b5f9e681..4e2122f6f94cf3a6c66a80d482917a89e5ed7f20 100644 (file)
--- a/board/phytec/pcm058/pcm058.c
+++ b/board/phytec/pcm058/pcm058.c
@@ -521,6 +521,8 @@ static void spl_dram_init(void)
                .sde_to_rst = 0x10,     /* 14 cycles, 200us (JEDEC default) */
                .rst_to_cke = 0x23,     /* 33 cycles, 500us (JEDEC default) */
                .ddr_type = DDR_TYPE_DDR3,
+               .refsel = 1,    /* Refresh cycles at 32KHz */
+               .refr = 7,      /* 8 refresh commands per refresh cycle */
        };
 
        mx6dq_dram_iocfg(64, &mx6_ddr_ioregs, &mx6_grp_ioregs);