ARM: dts: i.MX6QDL: icore-rqs: Fix eMMC detection during SPL

[people/ms/u-boot.git] / doc / README.POST

diff --git a/doc/README.POST b/doc/README.POST
index 695497e4beffbfa1580cb87bc5f3587992a28a5d..a9335f4d8b9c7d0e3a30404dabb37b0fc27cb912 100644 (file)
--- a/doc/README.POST
+++ b/doc/README.POST
@@ -494,7 +494,7 @@ This test will verify the following ALU instructions:
      This group will contain: b, bl, bc.
 
      The first 2 instructions (b, bl) will be verified by jumping to
-     a fixed address and checking whether control was transfered to
+     a fixed address and checking whether control was transferred to
      that very point. For the bl instruction the value of the link
      register will be checked as well (using mfspr). To verify the bc
      instruction various combinations of the BI/BO fields, the CTR
@@ -665,6 +665,14 @@ listed in CONFIG_SYS_POST_I2C_ADDRS are found, and no additional
 devices are detected.  If CONFIG_SYS_POST_I2C_ADDRS is not defined
 the test will pass if any I2C device is found.
 
+The CONFIG_SYS_POST_I2C_IGNORES define can be used to list I2C
+devices which may or may not be present when using
+CONFIG_SYS_POST_I2C_ADDRS.  The I2C POST test will pass regardless
+if the devices in CONFIG_SYS_POST_I2C_IGNORES are found or not.
+This is useful in cases when I2C devices are optional (eg on a
+daughtercard that may or may not be present) or not critical
+to board operation.
+
 2.2.2.2. Watchdog timer test
 
 To test the watchdog timer the scheme mentioned above (refer to