]> git.ipfire.org Git - people/ms/u-boot.git/blobdiff - drivers/mmc/rockchip_sdhci.c
Merge git://git.denx.de/u-boot-mmc
[people/ms/u-boot.git] / drivers / mmc / rockchip_sdhci.c
index 023c29be0a7e8aa060deb99ea5011c630b44828c..0f31dfc3fd16dc599c3024a605af4b875fa47e1e 100644 (file)
@@ -8,15 +8,21 @@
 
 #include <common.h>
 #include <dm.h>
-#include <fdtdec.h>
+#include <dt-structs.h>
 #include <libfdt.h>
 #include <malloc.h>
+#include <mapmem.h>
 #include <sdhci.h>
+#include <clk.h>
 
+DECLARE_GLOBAL_DATA_PTR;
 /* 400KHz is max freq for card ID etc. Use that as min */
 #define EMMC_MIN_FREQ  400000
 
 struct rockchip_sdhc_plat {
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+       struct dtd_rockchip_rk3399_sdhci_5_1 dtplat;
+#endif
        struct mmc_config cfg;
        struct mmc mmc;
 };
@@ -32,16 +38,32 @@ static int arasan_sdhci_probe(struct udevice *dev)
        struct rockchip_sdhc_plat *plat = dev_get_platdata(dev);
        struct rockchip_sdhc *prv = dev_get_priv(dev);
        struct sdhci_host *host = &prv->host;
-       int ret;
-       u32 caps;
+       int max_frequency, ret;
+       struct clk clk;
+
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+       struct dtd_rockchip_rk3399_sdhci_5_1 *dtplat = &plat->dtplat;
+
+       host->name = dev->name;
+       host->ioaddr = map_sysmem(dtplat->reg[0], dtplat->reg[1]);
+       max_frequency = dtplat->max_frequency;
+       ret = clk_get_by_index_platdata(dev, 0, dtplat->clocks, &clk);
+#else
+       max_frequency = dev_read_u32_default(dev, "max-frequency", 0);
+       ret = clk_get_by_index(dev, 0, &clk);
+#endif
+       if (!ret) {
+               ret = clk_set_rate(&clk, max_frequency);
+               if (IS_ERR_VALUE(ret))
+                       printf("%s clk set rate fail!\n", __func__);
+       } else {
+               printf("%s fail to get clk\n", __func__);
+       }
 
-       host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
        host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD;
+       host->max_clk = max_frequency;
 
-       caps = sdhci_readl(host, SDHCI_CAPABILITIES);
-       ret = sdhci_setup_cfg(&plat->cfg, dev->name, host->bus_width,
-                       caps, CONFIG_ROCKCHIP_SDHCI_MAX_FREQ, EMMC_MIN_FREQ,
-                       host->version, host->quirks, 0);
+       ret = sdhci_setup_cfg(&plat->cfg, host, 0, EMMC_MIN_FREQ);
 
        host->mmc = &plat->mmc;
        if (ret)
@@ -55,10 +77,12 @@ static int arasan_sdhci_probe(struct udevice *dev)
 
 static int arasan_sdhci_ofdata_to_platdata(struct udevice *dev)
 {
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
        struct sdhci_host *host = dev_get_priv(dev);
 
        host->name = dev->name;
-       host->ioaddr = dev_get_addr_ptr(dev);
+       host->ioaddr = dev_read_addr_ptr(dev);
+#endif
 
        return 0;
 }
@@ -66,13 +90,8 @@ static int arasan_sdhci_ofdata_to_platdata(struct udevice *dev)
 static int rockchip_sdhci_bind(struct udevice *dev)
 {
        struct rockchip_sdhc_plat *plat = dev_get_platdata(dev);
-       int ret;
 
-       ret = sdhci_bind(dev, &plat->mmc, &plat->cfg);
-       if (ret)
-               return ret;
-
-       return 0;
+       return sdhci_bind(dev, &plat->mmc, &plat->cfg);
 }
 
 static const struct udevice_id arasan_sdhci_ids[] = {
@@ -81,7 +100,7 @@ static const struct udevice_id arasan_sdhci_ids[] = {
 };
 
 U_BOOT_DRIVER(arasan_sdhci_drv) = {
-       .name           = "arasan_sdhci",
+       .name           = "rockchip_rk3399_sdhci_5_1",
        .id             = UCLASS_MMC,
        .of_match       = arasan_sdhci_ids,
        .ofdata_to_platdata = arasan_sdhci_ofdata_to_platdata,