#include <linux/dma-direction.h>
#include <linux/io.h>
#include <linux/sizes.h>
+#include <power/regulator.h>
#include <asm/unaligned.h>
DECLARE_GLOBAL_DATA_PTR;
#define UNIPHIER_SD_CAP_NONREMOVABLE BIT(0) /* Nonremovable e.g. eMMC */
#define UNIPHIER_SD_CAP_DMA_INTERNAL BIT(1) /* have internal DMA engine */
#define UNIPHIER_SD_CAP_DIV1024 BIT(2) /* divisor 1024 is available */
+#define UNIPHIER_SD_CAP_64BIT BIT(3) /* Controller is 64bit */
};
-static u32 uniphier_sd_readl(struct uniphier_sd_priv *priv, const u32 reg)
+static u64 uniphier_sd_readq(struct uniphier_sd_priv *priv, unsigned int reg)
{
- return readl(priv->regbase + reg);
+ if (priv->caps & UNIPHIER_SD_CAP_64BIT)
+ return readq(priv->regbase + (reg << 1));
+ else
+ return readq(priv->regbase + reg);
+}
+
+static void uniphier_sd_writeq(struct uniphier_sd_priv *priv,
+ u64 val, unsigned int reg)
+{
+ if (priv->caps & UNIPHIER_SD_CAP_64BIT)
+ writeq(val, priv->regbase + (reg << 1));
+ else
+ writeq(val, priv->regbase + reg);
+}
+
+static u32 uniphier_sd_readl(struct uniphier_sd_priv *priv, unsigned int reg)
+{
+ if (priv->caps & UNIPHIER_SD_CAP_64BIT)
+ return readl(priv->regbase + (reg << 1));
+ else
+ return readl(priv->regbase + reg);
}
static void uniphier_sd_writel(struct uniphier_sd_priv *priv,
- const u32 val, const u32 reg)
+ u32 val, unsigned int reg)
{
- writel(val, priv->regbase + reg);
+ if (priv->caps & UNIPHIER_SD_CAP_64BIT)
+ writel(val, priv->regbase + (reg << 1));
+ else
+ writel(val, priv->regbase + reg);
}
static dma_addr_t __dma_map_single(void *ptr, size_t size,
return 0;
}
-static int uniphier_sd_pio_read_one_block(struct udevice *dev, u32 **pbuf,
+static int uniphier_sd_pio_read_one_block(struct udevice *dev, char *pbuf,
uint blocksize)
{
struct uniphier_sd_priv *priv = dev_get_priv(dev);
*/
uniphier_sd_writel(priv, 0, UNIPHIER_SD_INFO2);
- if (likely(IS_ALIGNED((unsigned long)*pbuf, 4))) {
- for (i = 0; i < blocksize / 4; i++)
- *(*pbuf)++ = uniphier_sd_readl(priv, UNIPHIER_SD_BUF);
+ if (priv->caps & UNIPHIER_SD_CAP_64BIT) {
+ u64 *buf = (u64 *)pbuf;
+ if (likely(IS_ALIGNED((uintptr_t)buf, 8))) {
+ for (i = 0; i < blocksize / 8; i++) {
+ *buf++ = uniphier_sd_readq(priv,
+ UNIPHIER_SD_BUF);
+ }
+ } else {
+ for (i = 0; i < blocksize / 8; i++) {
+ u64 data;
+ data = uniphier_sd_readq(priv,
+ UNIPHIER_SD_BUF);
+ put_unaligned(data, buf++);
+ }
+ }
} else {
- for (i = 0; i < blocksize / 4; i++)
- put_unaligned(uniphier_sd_readl(priv, UNIPHIER_SD_BUF),
- (*pbuf)++);
+ u32 *buf = (u32 *)pbuf;
+ if (likely(IS_ALIGNED((uintptr_t)buf, 4))) {
+ for (i = 0; i < blocksize / 4; i++) {
+ *buf++ = uniphier_sd_readl(priv,
+ UNIPHIER_SD_BUF);
+ }
+ } else {
+ for (i = 0; i < blocksize / 4; i++) {
+ u32 data;
+ data = uniphier_sd_readl(priv, UNIPHIER_SD_BUF);
+ put_unaligned(data, buf++);
+ }
+ }
}
return 0;
}
static int uniphier_sd_pio_write_one_block(struct udevice *dev,
- const u32 **pbuf, uint blocksize)
+ const char *pbuf, uint blocksize)
{
struct uniphier_sd_priv *priv = dev_get_priv(dev);
int i, ret;
uniphier_sd_writel(priv, 0, UNIPHIER_SD_INFO2);
- if (likely(IS_ALIGNED((unsigned long)*pbuf, 4))) {
- for (i = 0; i < blocksize / 4; i++)
- uniphier_sd_writel(priv, *(*pbuf)++, UNIPHIER_SD_BUF);
+ if (priv->caps & UNIPHIER_SD_CAP_64BIT) {
+ const u64 *buf = (const u64 *)pbuf;
+ if (likely(IS_ALIGNED((uintptr_t)buf, 8))) {
+ for (i = 0; i < blocksize / 8; i++) {
+ uniphier_sd_writeq(priv, *buf++,
+ UNIPHIER_SD_BUF);
+ }
+ } else {
+ for (i = 0; i < blocksize / 8; i++) {
+ u64 data = get_unaligned(buf++);
+ uniphier_sd_writeq(priv, data,
+ UNIPHIER_SD_BUF);
+ }
+ }
} else {
- for (i = 0; i < blocksize / 4; i++)
- uniphier_sd_writel(priv, get_unaligned((*pbuf)++),
- UNIPHIER_SD_BUF);
+ const u32 *buf = (const u32 *)pbuf;
+ if (likely(IS_ALIGNED((uintptr_t)buf, 4))) {
+ for (i = 0; i < blocksize / 4; i++) {
+ uniphier_sd_writel(priv, *buf++,
+ UNIPHIER_SD_BUF);
+ }
+ } else {
+ for (i = 0; i < blocksize / 4; i++) {
+ u32 data = get_unaligned(buf++);
+ uniphier_sd_writel(priv, data,
+ UNIPHIER_SD_BUF);
+ }
+ }
}
return 0;
static int uniphier_sd_pio_xfer(struct udevice *dev, struct mmc_data *data)
{
- u32 *dest = (u32 *)data->dest;
- const u32 *src = (const u32 *)data->src;
+ const char *src = data->src;
+ char *dest = data->dest;
int i, ret;
for (i = 0; i < data->blocks; i++) {
if (data->flags & MMC_DATA_READ)
- ret = uniphier_sd_pio_read_one_block(dev, &dest,
+ ret = uniphier_sd_pio_read_one_block(dev, dest,
data->blocksize);
else
- ret = uniphier_sd_pio_write_one_block(dev, &src,
+ ret = uniphier_sd_pio_write_one_block(dev, src,
data->blocksize);
if (ret)
return ret;
+
+ if (data->flags & MMC_DATA_READ)
+ dest += data->blocksize;
+ else
+ src += data->blocksize;
}
return 0;
struct uniphier_sd_plat *plat = dev_get_platdata(dev);
struct uniphier_sd_priv *priv = dev_get_priv(dev);
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
+ const u32 quirks = dev_get_driver_data(dev);
fdt_addr_t base;
struct clk clk;
int ret;
+#ifdef CONFIG_DM_REGULATOR
+ struct udevice *vqmmc_dev;
+#endif
base = devfdt_get_addr(dev);
if (base == FDT_ADDR_T_NONE)
if (!priv->regbase)
return -ENOMEM;
+#ifdef CONFIG_DM_REGULATOR
+ ret = device_get_supply_regulator(dev, "vqmmc-supply", &vqmmc_dev);
+ if (!ret) {
+ /* Set the regulator to 3.3V until we support 1.8V modes */
+ regulator_set_value(vqmmc_dev, 3300000);
+ regulator_set_enable(vqmmc_dev, true);
+ }
+#endif
+
ret = clk_get_by_index(dev, 0, &clk);
if (ret < 0) {
dev_err(dev, "failed to get host clock\n");
return -EINVAL;
}
+ if (quirks) {
+ priv->caps = quirks;
+ } else {
+ priv->version = uniphier_sd_readl(priv, UNIPHIER_SD_VERSION) &
+ UNIPHIER_SD_VERSION_IP;
+ dev_dbg(dev, "version %x\n", priv->version);
+ if (priv->version >= 0x10) {
+ priv->caps |= UNIPHIER_SD_CAP_DMA_INTERNAL;
+ priv->caps |= UNIPHIER_SD_CAP_DIV1024;
+ }
+ }
+
if (fdt_get_property(gd->fdt_blob, dev_of_offset(dev), "non-removable",
NULL))
priv->caps |= UNIPHIER_SD_CAP_NONREMOVABLE;
- priv->version = uniphier_sd_readl(priv, UNIPHIER_SD_VERSION) &
- UNIPHIER_SD_VERSION_IP;
- dev_dbg(dev, "version %x\n", priv->version);
- if (priv->version >= 0x10) {
- priv->caps |= UNIPHIER_SD_CAP_DMA_INTERNAL;
- priv->caps |= UNIPHIER_SD_CAP_DIV1024;
- }
-
uniphier_sd_host_init(priv);
plat->cfg.voltages = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34;
}
static const struct udevice_id uniphier_sd_match[] = {
- { .compatible = "socionext,uniphier-sdhc" },
+ { .compatible = "renesas,sdhi-r8a7790", .data = 0 },
+ { .compatible = "renesas,sdhi-r8a7791", .data = 0 },
+ { .compatible = "renesas,sdhi-r8a7792", .data = 0 },
+ { .compatible = "renesas,sdhi-r8a7793", .data = 0 },
+ { .compatible = "renesas,sdhi-r8a7794", .data = 0 },
+ { .compatible = "renesas,sdhi-r8a7795", .data = UNIPHIER_SD_CAP_64BIT },
+ { .compatible = "renesas,sdhi-r8a7796", .data = UNIPHIER_SD_CAP_64BIT },
+ { .compatible = "renesas,sdhi-r8a77970", .data = UNIPHIER_SD_CAP_64BIT },
+ { .compatible = "renesas,sdhi-r8a77995", .data = UNIPHIER_SD_CAP_64BIT },
+ { .compatible = "socionext,uniphier-sdhc", .data = 0 },
{ /* sentinel */ }
};
projects / people / ms / u-boot.git / blobdiff