sf: Add bank addr code in CONFIG_SPI_FLASH_BAR

[people/ms/u-boot.git] / drivers / mtd / spi / spi_flash.c

diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 6fa932cbd9c3de70300a136e13136932e7ad49c1..f05f8f4d9faae7e18c83c35bb40ec4e798092e50 100644 (file)
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -77,8 +77,6 @@ int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset,
        u8 cmd[4];
 
        page_size = flash->page_size;
-       page_addr = offset / page_size;
-       byte_addr = offset % page_size;
 
        ret = spi_claim_bus(flash->spi);
        if (ret) {
@@ -88,6 +86,19 @@ int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset,
 
        cmd[0] = CMD_PAGE_PROGRAM;
        for (actual = 0; actual < len; actual += chunk_len) {
+#ifdef CONFIG_SPI_FLASH_BAR
+               u8 bank_sel;
+
+               bank_sel = offset / SPI_FLASH_16MB_BOUN;
+
+               ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
+               if (ret) {
+                       debug("SF: fail to set bank%d\n", bank_sel);
+                       return ret;
+               }
+#endif
+               page_addr = offset / page_size;
+               byte_addr = offset % page_size;
                chunk_len = min(len - actual, page_size - byte_addr);
 
                if (flash->spi->max_write_size)
@@ -117,16 +128,9 @@ int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset,
                if (ret)
                        break;
 
-               byte_addr += chunk_len;
-               if (byte_addr == page_size) {
-                       page_addr++;
-                       byte_addr = 0;
-               }
+               offset += chunk_len;
        }
 
-       debug("SF: program %s %zu bytes @ %#x\n",
-             ret ? "failure" : "success", len, offset);
-
        spi_release_bus(flash->spi);
        return ret;
 }
@@ -147,7 +151,9 @@ int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
 int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
                size_t len, void *data)
 {
-       u8 cmd[5];
+       u8 cmd[5], bank_sel = 0;
+       u32 remain_len, read_len;
+       int ret = -1;
 
        /* Handle memory-mapped SPI */
        if (flash->memory_map) {
@@ -156,10 +162,39 @@ int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
        }
 
        cmd[0] = CMD_READ_ARRAY_FAST;
-       spi_flash_addr(offset, cmd);
        cmd[4] = 0x00;
 
-       return spi_flash_read_common(flash, cmd, sizeof(cmd), data, len);
+       while (len) {
+#ifdef CONFIG_SPI_FLASH_BAR
+               bank_sel = offset / SPI_FLASH_16MB_BOUN;
+
+               ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
+               if (ret) {
+                       debug("SF: fail to set bank%d\n", bank_sel);
+                       return ret;
+               }
+#endif
+               remain_len = (SPI_FLASH_16MB_BOUN * (bank_sel + 1) - offset);
+               if (len < remain_len)
+                       read_len = len;
+               else
+                       read_len = remain_len;
+
+               spi_flash_addr(offset, cmd);
+
+               ret = spi_flash_read_common(flash, cmd, sizeof(cmd),
+                                                       data, read_len);
+               if (ret < 0) {
+                       debug("SF: read failed\n");
+                       break;
+               }
+
+               offset += read_len;
+               len -= read_len;
+               data += read_len;
+       }
+
+       return ret;
 }
 
 int spi_flash_cmd_poll_bit(struct spi_flash *flash, unsigned long timeout,
@@ -207,7 +242,7 @@ int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)
 
 int spi_flash_cmd_erase(struct spi_flash *flash, u32 offset, size_t len)
 {
-       u32 start, end, erase_size;
+       u32 erase_size;
        int ret;
        u8 cmd[4];
 
@@ -227,12 +262,20 @@ int spi_flash_cmd_erase(struct spi_flash *flash, u32 offset, size_t len)
                cmd[0] = CMD_ERASE_4K;
        else
                cmd[0] = CMD_ERASE_64K;
-       start = offset;
-       end = start + len;
 
-       while (offset < end) {
+       while (len) {
+#ifdef CONFIG_SPI_FLASH_BAR
+               u8 bank_sel;
+
+               bank_sel = offset / SPI_FLASH_16MB_BOUN;
+
+               ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
+               if (ret) {
+                       debug("SF: fail to set bank%d\n", bank_sel);
+                       return ret;
+               }
+#endif
                spi_flash_addr(offset, cmd);
-               offset += erase_size;
 
                debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
                      cmd[2], cmd[3], offset);
@@ -248,9 +291,10 @@ int spi_flash_cmd_erase(struct spi_flash *flash, u32 offset, size_t len)
                ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PAGE_ERASE_TIMEOUT);
                if (ret)
                        goto out;
-       }
 
-       debug("SF: Successfully erased %zu bytes @ %#x\n", len, start);
+               offset += erase_size;
+               len -= erase_size;
+       }
 
  out:
        spi_release_bus(flash->spi);
@@ -284,6 +328,77 @@ int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr)
        return 0;
 }
 
+#ifdef CONFIG_SPI_FLASH_BAR
+int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel)
+{
+       u8 cmd;
+       int ret;
+
+       if (flash->bank_curr == bank_sel) {
+               debug("SF: not require to enable bank%d\n", bank_sel);
+               return 0;
+       }
+
+       cmd = flash->bank_write_cmd;
+       ret = spi_flash_cmd_write_enable(flash);
+       if (ret < 0) {
+               debug("SF: enabling write failed\n");
+               return ret;
+       }
+
+       ret = spi_flash_cmd_write(flash->spi, &cmd, 1, &bank_sel, 1);
+       if (ret) {
+               debug("SF: fail to write bank addr register\n");
+               return ret;
+       }
+       flash->bank_curr = bank_sel;
+
+       ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
+       if (ret < 0) {
+               debug("SF: write bank addr register timed out\n");
+               return ret;
+       }
+
+       return 0;
+}
+
+int spi_flash_bank_config(struct spi_flash *flash, u8 idcode0)
+{
+       u8 cmd;
+       u8 curr_bank = 0;
+
+       /* discover bank cmds */
+       switch (idcode0) {
+       case SPI_FLASH_SPANSION_IDCODE0:
+               flash->bank_read_cmd = CMD_BANKADDR_BRRD;
+               flash->bank_write_cmd = CMD_BANKADDR_BRWR;
+               break;
+       case SPI_FLASH_STMICRO_IDCODE0:
+       case SPI_FLASH_WINBOND_IDCODE0:
+               flash->bank_read_cmd = CMD_EXTNADDR_RDEAR;
+               flash->bank_write_cmd = CMD_EXTNADDR_WREAR;
+               break;
+       default:
+               printf("SF: Unsupported bank commands %02x\n", idcode0);
+               return -1;
+       }
+
+       /* read the bank reg - on which bank the flash is in currently */
+       cmd = flash->bank_read_cmd;
+       if (flash->size > SPI_FLASH_16MB_BOUN) {
+               if (spi_flash_read_common(flash, &cmd, 1, &curr_bank, 1)) {
+                       debug("SF: fail to read bank addr register\n");
+                       return -1;
+               }
+               flash->bank_curr = curr_bank;
+       } else {
+               flash->bank_curr = curr_bank;
+       }
+
+       return 0;
+}
+#endif
+
 #ifdef CONFIG_OF_CONTROL
 int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
 {
@@ -428,6 +543,13 @@ struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
                goto err_manufacturer_probe;
        }
 
+#ifdef CONFIG_SPI_FLASH_BAR
+       /* Configure the BAR - disover bank cmds and read current bank  */
+       ret = spi_flash_bank_config(flash, *idp);
+       if (ret < 0)
+               goto err_manufacturer_probe;
+#endif
+
 #ifdef CONFIG_OF_CONTROL
        if (spi_flash_decode_fdt(gd->fdt_blob, flash)) {
                debug("SF: FDT decode error\n");