* (C) Copyright 2002, 2003
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier: GPL-2.0+
*/
/*
*phose = hose;
}
-struct pci_controller *pci_bus_to_hose (int bus)
+struct pci_controller *pci_bus_to_hose(int bus)
{
struct pci_controller *hose;
- for (hose = hose_head; hose; hose = hose->next)
+ for (hose = hose_head; hose; hose = hose->next) {
if (bus >= hose->first_busno && bus <= hose->last_busno)
return hose;
+ }
printf("pci_bus_to_hose() failed\n");
return NULL;
pci_dev_t bdf;
int i, bus, found_multi = 0;
- for (hose = hose_head; hose; hose = hose->next)
- {
+ for (hose = hose_head; hose; hose = hose->next) {
#ifdef CONFIG_SYS_SCSI_SCAN_BUS_REVERSE
for (bus = hose->last_busno; bus >= hose->first_busno; bus--)
#else
for (bus = hose->first_busno; bus <= hose->last_busno; bus++)
#endif
- for (bdf = PCI_BDF(bus,0,0);
+ for (bdf = PCI_BDF(bus, 0, 0);
#if defined(CONFIG_ELPPC) || defined(CONFIG_PPMC7XX)
- bdf < PCI_BDF(bus,PCI_MAX_PCI_DEVICES-1,PCI_MAX_PCI_FUNCTIONS-1);
+ bdf < PCI_BDF(bus, PCI_MAX_PCI_DEVICES - 1,
+ PCI_MAX_PCI_FUNCTIONS - 1);
#else
- bdf < PCI_BDF(bus+1,0,0);
+ bdf < PCI_BDF(bus + 1, 0, 0);
#endif
- bdf += PCI_BDF(0,0,1))
- {
+ bdf += PCI_BDF(0, 0, 1)) {
+ if (pci_skip_dev(hose, bdf))
+ continue;
+
if (!PCI_FUNC(bdf)) {
pci_read_config_byte(bdf,
PCI_HEADER_TYPE,
PCI_DEVICE_ID,
&device);
- for (i=0; ids[i].vendor != 0; i++)
+ for (i = 0; ids[i].vendor != 0; i++) {
if (vendor == ids[i].vendor &&
- device == ids[i].device)
- {
+ device == ids[i].device) {
if (index <= 0)
return bdf;
index--;
}
+ }
}
}
- return (-1);
+ return -1;
}
pci_dev_t pci_find_device(unsigned int vendor, unsigned int device, int index)
*
*/
-int __pci_hose_phys_to_bus (struct pci_controller *hose,
+int __pci_hose_phys_to_bus(struct pci_controller *hose,
phys_addr_t phys_addr,
unsigned long flags,
unsigned long skip_mask,
int ret;
if (!hose) {
- puts ("pci_hose_phys_to_bus: invalid hose\n");
+ puts("pci_hose_phys_to_bus: invalid hose\n");
return bus_addr;
}
- /* if PCI_REGION_MEM is set we do a two pass search with preference
- * on matches that don't have PCI_REGION_SYS_MEMORY set */
+ /*
+ * if PCI_REGION_MEM is set we do a two pass search with preference
+ * on matches that don't have PCI_REGION_SYS_MEMORY set
+ */
if ((flags & PCI_REGION_MEM) == PCI_REGION_MEM) {
ret = __pci_hose_phys_to_bus(hose, phys_addr,
flags, PCI_REGION_SYS_MEMORY, &bus_addr);
ret = __pci_hose_phys_to_bus(hose, phys_addr, flags, 0, &bus_addr);
if (ret)
- puts ("pci_hose_phys_to_bus: invalid physical address\n");
+ puts("pci_hose_phys_to_bus: invalid physical address\n");
return bus_addr;
}
-int __pci_hose_bus_to_phys (struct pci_controller *hose,
+int __pci_hose_bus_to_phys(struct pci_controller *hose,
pci_addr_t bus_addr,
unsigned long flags,
unsigned long skip_mask,
continue;
if (bus_addr >= res->bus_start &&
- bus_addr < res->bus_start + res->size) {
+ (bus_addr - res->bus_start) < res->size) {
*pa = (bus_addr - res->bus_start + res->phys_start);
return 0;
}
int ret;
if (!hose) {
- puts ("pci_hose_bus_to_phys: invalid hose\n");
+ puts("pci_hose_bus_to_phys: invalid hose\n");
return phys_addr;
}
- /* if PCI_REGION_MEM is set we do a two pass search with preference
- * on matches that don't have PCI_REGION_SYS_MEMORY set */
+ /*
+ * if PCI_REGION_MEM is set we do a two pass search with preference
+ * on matches that don't have PCI_REGION_SYS_MEMORY set
+ */
if ((flags & PCI_REGION_MEM) == PCI_REGION_MEM) {
ret = __pci_hose_bus_to_phys(hose, bus_addr,
flags, PCI_REGION_SYS_MEMORY, &phys_addr);
ret = __pci_hose_bus_to_phys(hose, bus_addr, flags, 0, &phys_addr);
if (ret)
- puts ("pci_hose_bus_to_phys: invalid physical address\n");
+ puts("pci_hose_bus_to_phys: invalid physical address\n");
return phys_addr;
}
pci_addr_t mem,
unsigned long command)
{
- unsigned int bar_response, old_command;
+ u32 bar_response;
+ unsigned int old_command;
pci_addr_t bar_value;
pci_size_t bar_size;
unsigned char pin;
int bar, found_mem64;
- debug ("PCI Config: I/O=0x%lx, Memory=0x%llx, Command=0x%lx\n",
- io, (u64)mem, command);
+ debug("PCI Config: I/O=0x%lx, Memory=0x%llx, Command=0x%lx\n", io,
+ (u64)mem, command);
- pci_hose_write_config_dword (hose, dev, PCI_COMMAND, 0);
+ pci_hose_write_config_dword(hose, dev, PCI_COMMAND, 0);
for (bar = PCI_BASE_ADDRESS_0; bar <= PCI_BASE_ADDRESS_5; bar += 4) {
- pci_hose_write_config_dword (hose, dev, bar, 0xffffffff);
- pci_hose_read_config_dword (hose, dev, bar, &bar_response);
+ pci_hose_write_config_dword(hose, dev, bar, 0xffffffff);
+ pci_hose_read_config_dword(hose, dev, bar, &bar_response);
if (!bar_response)
continue;
PCI_BASE_ADDRESS_MEM_TYPE_64) {
u32 bar_response_upper;
u64 bar64;
- pci_hose_write_config_dword(hose, dev, bar+4, 0xffffffff);
- pci_hose_read_config_dword(hose, dev, bar+4, &bar_response_upper);
+ pci_hose_write_config_dword(hose, dev, bar + 4,
+ 0xffffffff);
+ pci_hose_read_config_dword(hose, dev, bar + 4,
+ &bar_response_upper);
bar64 = ((u64)bar_response_upper << 32) | bar_response;
if (found_mem64) {
bar += 4;
#ifdef CONFIG_SYS_PCI_64BIT
- pci_hose_write_config_dword(hose, dev, bar, (u32)(bar_value>>32));
+ pci_hose_write_config_dword(hose, dev, bar,
+ (u32)(bar_value >> 32));
#else
- pci_hose_write_config_dword (hose, dev, bar, 0x00000000);
+ pci_hose_write_config_dword(hose, dev, bar, 0x00000000);
#endif
}
}
/* Configure Cache Line Size Register */
- pci_hose_write_config_byte (hose, dev, PCI_CACHE_LINE_SIZE, 0x08);
+ pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE, 0x08);
/* Configure Latency Timer */
- pci_hose_write_config_byte (hose, dev, PCI_LATENCY_TIMER, 0x80);
+ pci_hose_write_config_byte(hose, dev, PCI_LATENCY_TIMER, 0x80);
/* Disable interrupt line, if device says it wants to use interrupts */
- pci_hose_read_config_byte (hose, dev, PCI_INTERRUPT_PIN, &pin);
+ pci_hose_read_config_byte(hose, dev, PCI_INTERRUPT_PIN, &pin);
if (pin != 0) {
- pci_hose_write_config_byte (hose, dev, PCI_INTERRUPT_LINE, 0xff);
+ pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, 0xff);
}
- pci_hose_read_config_dword (hose, dev, PCI_COMMAND, &old_command);
- pci_hose_write_config_dword (hose, dev, PCI_COMMAND,
+ pci_hose_read_config_dword(hose, dev, PCI_COMMAND, &old_command);
+ pci_hose_write_config_dword(hose, dev, PCI_COMMAND,
(old_command & 0xffff0000) | command);
return 0;
pci_dev_t dev,
struct pci_config_table *entry)
{
- pci_hose_config_device(hose, dev, entry->priv[0], entry->priv[1], entry->priv[2]);
+ pci_hose_config_device(hose, dev, entry->priv[0], entry->priv[1],
+ entry->priv[2]);
}
void pci_cfgfunc_do_nothing(struct pci_controller *hose,
}
/*
- *
- */
-
-/* HJF: Changed this to return int. I think this is required
+ * HJF: Changed this to return int. I think this is required
* to get the correct result when scanning bridges
*/
extern int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev);
-extern void pciauto_config_init(struct pci_controller *hose);
#if defined(CONFIG_CMD_PCI) || defined(CONFIG_PCI_SCAN_SHOW)
const char * pci_class_str(u8 class)
}
#endif /* CONFIG_CMD_PCI || CONFIG_PCI_SCAN_SHOW */
-int __pci_skip_dev(struct pci_controller *hose, pci_dev_t dev)
+__weak int pci_skip_dev(struct pci_controller *hose, pci_dev_t dev)
{
/*
* Check if pci device should be skipped in configuration
return 0;
}
-int pci_skip_dev(struct pci_controller *hose, pci_dev_t dev)
- __attribute__((weak, alias("__pci_skip_dev")));
#ifdef CONFIG_PCI_SCAN_SHOW
-int __pci_print_dev(struct pci_controller *hose, pci_dev_t dev)
+__weak int pci_print_dev(struct pci_controller *hose, pci_dev_t dev)
{
if (dev == PCI_BDF(hose->first_busno, 0, 0))
return 0;
return 1;
}
-int pci_print_dev(struct pci_controller *hose, pci_dev_t dev)
- __attribute__((weak, alias("__pci_print_dev")));
#endif /* CONFIG_PCI_SCAN_SHOW */
int pci_hose_scan_bus(struct pci_controller *hose, int bus)
{
- unsigned int sub_bus, found_multi=0;
+ unsigned int sub_bus, found_multi = 0;
unsigned short vendor, device, class;
unsigned char header_type;
+#ifndef CONFIG_PCI_PNP
struct pci_config_table *cfg;
+#endif
pci_dev_t dev;
#ifdef CONFIG_PCI_SCAN_SHOW
static int indent = 0;
sub_bus = bus;
for (dev = PCI_BDF(bus,0,0);
- dev < PCI_BDF(bus,PCI_MAX_PCI_DEVICES-1,PCI_MAX_PCI_FUNCTIONS-1);
- dev += PCI_BDF(0,0,1)) {
+ dev < PCI_BDF(bus, PCI_MAX_PCI_DEVICES - 1,
+ PCI_MAX_PCI_FUNCTIONS - 1);
+ dev += PCI_BDF(0, 0, 1)) {
if (pci_skip_dev(hose, dev))
continue;
if (!PCI_FUNC(dev))
found_multi = header_type & 0x80;
- debug ("PCI Scan: Found Bus %d, Device %d, Function %d\n",
- PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev) );
+ debug("PCI Scan: Found Bus %d, Device %d, Function %d\n",
+ PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev));
pci_hose_read_config_word(hose, dev, PCI_DEVICE_ID, &device);
pci_hose_read_config_word(hose, dev, PCI_CLASS_DEVICE, &class);
+#ifdef CONFIG_PCI_FIXUP_DEV
+ board_pci_fixup_dev(hose, dev, vendor, device, class);
+#endif
+
#ifdef CONFIG_PCI_SCAN_SHOW
indent++;
}
#endif
+#ifdef CONFIG_PCI_PNP
+ sub_bus = max((unsigned int)pciauto_config_device(hose, dev),
+ sub_bus);
+#else
cfg = pci_find_config(hose, class, vendor, device,
PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev));
if (cfg) {
cfg->config_device(hose, dev, cfg);
- sub_bus = max(sub_bus, hose->current_busno);
-#ifdef CONFIG_PCI_PNP
- } else {
- int n = pciauto_config_device(hose, dev);
-
- sub_bus = max(sub_bus, n);
-#endif
+ sub_bus = max(sub_bus,
+ (unsigned int)hose->current_busno);
}
+#endif
#ifdef CONFIG_PCI_SCAN_SHOW
indent--;
int pci_hose_scan(struct pci_controller *hose)
{
- /* Start scan at current_busno.
+#if defined(CONFIG_PCI_BOOTDELAY)
+ static int pcidelay_done;
+ char *s;
+ int i;
+
+ if (!pcidelay_done) {
+ /* wait "pcidelay" ms (if defined)... */
+ s = getenv("pcidelay");
+ if (s) {
+ int val = simple_strtoul(s, NULL, 10);
+ for (i = 0; i < val; i++)
+ udelay(1000);
+ }
+ pcidelay_done = 1;
+ }
+#endif /* CONFIG_PCI_BOOTDELAY */
+
+ /*
+ * Start scan at current_busno.
* PCIe will start scan at first_busno+1.
*/
- /* For legacy support, ensure current>=first */
+ /* For legacy support, ensure current >= first */
if (hose->first_busno > hose->current_busno)
hose->current_busno = hose->first_busno;
#ifdef CONFIG_PCI_PNP
void pci_init(void)
{
-#if defined(CONFIG_PCI_BOOTDELAY)
- char *s;
- int i;
-
- /* wait "pcidelay" ms (if defined)... */
- s = getenv ("pcidelay");
- if (s) {
- int val = simple_strtoul (s, NULL, 10);
- for (i=0; i<val; i++)
- udelay (1000);
- }
-#endif /* CONFIG_PCI_BOOTDELAY */
-
hose_head = NULL;
/* now call board specific pci_init()... */
pci_init_board();
}
+
+/* Returns the address of the requested capability structure within the
+ * device's PCI configuration space or 0 in case the device does not
+ * support it.
+ * */
+int pci_hose_find_capability(struct pci_controller *hose, pci_dev_t dev,
+ int cap)
+{
+ int pos;
+ u8 hdr_type;
+
+ pci_hose_read_config_byte(hose, dev, PCI_HEADER_TYPE, &hdr_type);
+
+ pos = pci_hose_find_cap_start(hose, dev, hdr_type & 0x7F);
+
+ if (pos)
+ pos = pci_find_cap(hose, dev, pos, cap);
+
+ return pos;
+}
+
+/* Find the header pointer to the Capabilities*/
+int pci_hose_find_cap_start(struct pci_controller *hose, pci_dev_t dev,
+ u8 hdr_type)
+{
+ u16 status;
+
+ pci_hose_read_config_word(hose, dev, PCI_STATUS, &status);
+
+ if (!(status & PCI_STATUS_CAP_LIST))
+ return 0;
+
+ switch (hdr_type) {
+ case PCI_HEADER_TYPE_NORMAL:
+ case PCI_HEADER_TYPE_BRIDGE:
+ return PCI_CAPABILITY_LIST;
+ case PCI_HEADER_TYPE_CARDBUS:
+ return PCI_CB_CAPABILITY_LIST;
+ default:
+ return 0;
+ }
+}
+
+int pci_find_cap(struct pci_controller *hose, pci_dev_t dev, int pos, int cap)
+{
+ int ttl = PCI_FIND_CAP_TTL;
+ u8 id;
+ u8 next_pos;
+
+ while (ttl--) {
+ pci_hose_read_config_byte(hose, dev, pos, &next_pos);
+ if (next_pos < CAP_START_POS)
+ break;
+ next_pos &= ~3;
+ pos = (int) next_pos;
+ pci_hose_read_config_byte(hose, dev,
+ pos + PCI_CAP_LIST_ID, &id);
+ if (id == 0xff)
+ break;
+ if (id == cap)
+ return pos;
+ pos += PCI_CAP_LIST_NEXT;
+ }
+ return 0;
+}
projects / people / ms / u-boot.git / blobdiff