Merge 'next' branch

[people/ms/u-boot.git] / include / asm-ppc / immap_85xx.h

diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h
index 6c81c3996314e1eac5614d5744960c6976578709..239924329e6c60e37a4248880c408c2812c4e7aa 100644 (file)
--- a/include/asm-ppc/immap_85xx.h
+++ b/include/asm-ppc/immap_85xx.h
@@ -1647,37 +1647,37 @@ typedef struct ccsr_gur {
 
 #define PORDEVSR_PCI   (0x00800000)    /* PCI Mode */
 
-#define CFG_MPC85xx_GUTS_OFFSET        (0xE0000)
-#define CFG_MPC85xx_GUTS_ADDR  (CFG_IMMR + CFG_MPC85xx_GUTS_OFFSET)
-#define CFG_MPC85xx_ECM_OFFSET (0x0000)
-#define CFG_MPC85xx_ECM_ADDR   (CFG_IMMR + CFG_MPC85xx_ECM_OFFSET)
-#define CFG_MPC85xx_DDR_OFFSET (0x2000)
-#define CFG_MPC85xx_DDR_ADDR   (CFG_IMMR + CFG_MPC85xx_DDR_OFFSET)
-#define CFG_MPC85xx_DDR2_OFFSET        (0x6000)
-#define CFG_MPC85xx_DDR2_ADDR  (CFG_IMMR + CFG_MPC85xx_DDR2_OFFSET)
-#define CFG_MPC85xx_LBC_OFFSET (0x5000)
-#define CFG_MPC85xx_LBC_ADDR   (CFG_IMMR + CFG_MPC85xx_LBC_OFFSET)
-#define CFG_MPC85xx_PCIX_OFFSET        (0x8000)
-#define CFG_MPC85xx_PCIX_ADDR  (CFG_IMMR + CFG_MPC85xx_PCIX_OFFSET)
-#define CFG_MPC85xx_PCIX2_OFFSET       (0x9000)
-#define CFG_MPC85xx_PCIX2_ADDR (CFG_IMMR + CFG_MPC85xx_PCIX2_OFFSET)
-#define CFG_MPC85xx_SATA1_OFFSET       (0x18000)
-#define CFG_MPC85xx_SATA1_ADDR (CFG_IMMR + CFG_MPC85xx_SATA1_OFFSET)
-#define CFG_MPC85xx_SATA2_OFFSET       (0x19000)
-#define CFG_MPC85xx_SATA2_ADDR (CFG_IMMR + CFG_MPC85xx_SATA2_OFFSET)
-#define CFG_MPC85xx_L2_OFFSET  (0x20000)
-#define CFG_MPC85xx_L2_ADDR    (CFG_IMMR + CFG_MPC85xx_L2_OFFSET)
-#define CFG_MPC85xx_DMA_OFFSET (0x21000)
-#define CFG_MPC85xx_DMA_ADDR   (CFG_IMMR + CFG_MPC85xx_DMA_OFFSET)
-#define CFG_MPC85xx_ESDHC_OFFSET       (0x2e000)
-#define CFG_MPC85xx_ESDHC_ADDR (CFG_IMMR + CFG_MPC85xx_ESDHC_OFFSET)
-#define CFG_MPC85xx_PIC_OFFSET (0x40000)
-#define CFG_MPC85xx_PIC_ADDR   (CFG_IMMR + CFG_MPC85xx_PIC_OFFSET)
-#define CFG_MPC85xx_CPM_OFFSET (0x80000)
-#define CFG_MPC85xx_CPM_ADDR   (CFG_IMMR + CFG_MPC85xx_CPM_OFFSET)
-#define CFG_MPC85xx_SERDES1_OFFSET     (0xE3000)
-#define CFG_MPC85xx_SERDES1_ADDR       (CFG_IMMR + CFG_MPC85xx_SERDES2_OFFSET)
-#define CFG_MPC85xx_SERDES2_OFFSET     (0xE3100)
-#define CFG_MPC85xx_SERDES2_ADDR       (CFG_IMMR + CFG_MPC85xx_SERDES2_OFFSET)
+#define CONFIG_SYS_MPC85xx_GUTS_OFFSET (0xE0000)
+#define CONFIG_SYS_MPC85xx_GUTS_ADDR   (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_GUTS_OFFSET)
+#define CONFIG_SYS_MPC85xx_ECM_OFFSET  (0x0000)
+#define CONFIG_SYS_MPC85xx_ECM_ADDR    (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_ECM_OFFSET)
+#define CONFIG_SYS_MPC85xx_DDR_OFFSET  (0x2000)
+#define CONFIG_SYS_MPC85xx_DDR_ADDR    (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_DDR_OFFSET)
+#define CONFIG_SYS_MPC85xx_DDR2_OFFSET (0x6000)
+#define CONFIG_SYS_MPC85xx_DDR2_ADDR   (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_DDR2_OFFSET)
+#define CONFIG_SYS_MPC85xx_LBC_OFFSET  (0x5000)
+#define CONFIG_SYS_MPC85xx_LBC_ADDR    (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_LBC_OFFSET)
+#define CONFIG_SYS_MPC85xx_PCIX_OFFSET (0x8000)
+#define CONFIG_SYS_MPC85xx_PCIX_ADDR   (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCIX_OFFSET)
+#define CONFIG_SYS_MPC85xx_PCIX2_OFFSET        (0x9000)
+#define CONFIG_SYS_MPC85xx_PCIX2_ADDR  (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCIX2_OFFSET)
+#define CONFIG_SYS_MPC85xx_SATA1_OFFSET        (0x18000)
+#define CONFIG_SYS_MPC85xx_SATA1_ADDR  (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_SATA1_OFFSET)
+#define CONFIG_SYS_MPC85xx_SATA2_OFFSET        (0x19000)
+#define CONFIG_SYS_MPC85xx_SATA2_ADDR  (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_SATA2_OFFSET)
+#define CONFIG_SYS_MPC85xx_L2_OFFSET   (0x20000)
+#define CONFIG_SYS_MPC85xx_L2_ADDR     (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_L2_OFFSET)
+#define CONFIG_SYS_MPC85xx_DMA_OFFSET  (0x21000)
+#define CONFIG_SYS_MPC85xx_DMA_ADDR    (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_DMA_OFFSET)
+#define CONFIG_SYS_MPC85xx_ESDHC_OFFSET        (0x2e000)
+#define CONFIG_SYS_MPC85xx_ESDHC_ADDR  (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_ESDHC_OFFSET)
+#define CONFIG_SYS_MPC85xx_PIC_OFFSET  (0x40000)
+#define CONFIG_SYS_MPC85xx_PIC_ADDR    (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PIC_OFFSET)
+#define CONFIG_SYS_MPC85xx_CPM_OFFSET  (0x80000)
+#define CONFIG_SYS_MPC85xx_CPM_ADDR    (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_CPM_OFFSET)
+#define CONFIG_SYS_MPC85xx_SERDES1_OFFSET      (0xE3000)
+#define CONFIG_SYS_MPC85xx_SERDES1_ADDR        (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_SERDES2_OFFSET)
+#define CONFIG_SYS_MPC85xx_SERDES2_OFFSET      (0xE3100)
+#define CONFIG_SYS_MPC85xx_SERDES2_ADDR        (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_SERDES2_OFFSET)
 
 #endif /*__IMMAP_85xx__*/