]> git.ipfire.org Git - people/ms/u-boot.git/blobdiff - include/configs/B4860QDS.h
flash: complete CONFIG_SYS_NO_FLASH move with renaming
[people/ms/u-boot.git] / include / configs / B4860QDS.h
index 94c8253e60d68dfec164f03899815090e02b35bb..6b56fe7763508a9fbd413b84366d8c374313cba3 100644 (file)
@@ -7,14 +7,9 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_DISPLAY_BOARDINFO
-
 /*
  * B4860 QDS board configuration file
  */
-#define CONFIG_B4860QDS
-#define CONFIG_PHYS_64BIT
-
 #ifdef CONFIG_RAMBOOT_PBL
 #define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/b4860qds/b4_pbi.cfg
 #define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/b4860qds/b4_rcw.cfg
 #define CONFIG_RAMBOOT_TEXT_BASE       CONFIG_SYS_TEXT_BASE
 #define CONFIG_RESET_VECTOR_ADDRESS    0xfffffffc
 #else
-#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
-#define CONFIG_SPL_ENV_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
 #define CONFIG_SPL_FLUSH_IMAGE
 #define CONFIG_SPL_TARGET              "u-boot-with-spl.bin"
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
-#define CONFIG_FSL_LAW                 /* Use common FSL init code */
 #define CONFIG_SYS_TEXT_BASE           0x00201000
 #define CONFIG_SPL_TEXT_BASE           0xFFFD8000
 #define CONFIG_SPL_PAD_TO              0x40000
 #define CONFIG_SPL_MAX_SIZE            0x28000
 #define RESET_VECTOR_OFFSET            0x27FFC
 #define BOOT_PAGE_OFFSET               0x27000
-#define CONFIG_SPL_NAND_SUPPORT
 #define CONFIG_SYS_NAND_U_BOOT_SIZE    (768 << 10)
 #define CONFIG_SYS_NAND_U_BOOT_DST     0x00200000
 #define CONFIG_SYS_NAND_U_BOOT_START   0x00200000
@@ -49,7 +35,6 @@
 #define CONFIG_SPL_SKIP_RELOCATE
 #define CONFIG_SPL_COMMON_INIT_DDR
 #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
-#define CONFIG_SYS_NO_FLASH
 #endif
 #endif
 #endif
 #define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS \
                (0x300000000ull | CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR)
 #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
-#define CONFIG_SYS_NO_FLASH
 #endif
 
 /* High Level Configuration Options */
-#define CONFIG_BOOKE
-#define CONFIG_E500                    /* BOOKE e500 family */
-#define CONFIG_E500MC                  /* BOOKE e500mc family */
 #define CONFIG_SYS_BOOK3E_HV           /* Category E.HV supported */
 #define CONFIG_MP                      /* support multiple processors */
 
 #endif
 
 #define CONFIG_SYS_FSL_CPC             /* Corenet Platform Cache */
-#define CONFIG_SYS_NUM_CPC             CONFIG_NUM_DDR_CONTROLLERS
-#define CONFIG_FSL_IFC                 /* Enable IFC Support */
+#define CONFIG_SYS_NUM_CPC             CONFIG_SYS_NUM_DDR_CTLRS
 #define CONFIG_FSL_CAAM                        /* Enable SEC/CAAM */
-#define CONFIG_PCI                     /* Enable PCI/PCIE */
-#define CONFIG_PCIE1                   /* PCIE controler 1 */
+#define CONFIG_PCIE1                   /* PCIE controller 1 */
 #define CONFIG_FSL_PCI_INIT            /* Use common FSL init code */
 #define CONFIG_SYS_PCI_64BIT           /* enable 64-bit PCI resources */
 
-#ifndef CONFIG_PPC_B4420
+#ifndef CONFIG_ARCH_B4420
 #define CONFIG_SYS_SRIO
 #define CONFIG_SRIO1                   /* SRIO port 1 */
 #define CONFIG_SRIO2                   /* SRIO port 2 */
 #define CONFIG_SRIO_PCIE_BOOT_MASTER
 #endif
 
-#define CONFIG_FSL_LAW                 /* Use common FSL init code */
-
 /* I2C bus multiplexer */
 #define I2C_MUX_PCA_ADDR                0x77
 
 
 #define CONFIG_ENV_OVERWRITE
 
-#ifdef CONFIG_SYS_NO_FLASH
+#ifndef CONFIG_MTD_NOR_FLASH
 #if !defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) && !defined(CONFIG_RAMBOOT_PBL)
 #define CONFIG_ENV_IS_NOWHERE
 #endif
@@ -242,13 +219,11 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x00000000
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 
-/* CONFIG_NUM_DDR_CONTROLLERS is defined in include/asm/config_mpc85xx.h */
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
 #define CONFIG_CHIP_SELECTS_PER_CTRL   (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
 
 #define CONFIG_DDR_SPD
 #define CONFIG_SYS_DDR_RAW_TIMING
-#define CONFIG_SYS_FSL_DDR3
 #ifndef CONFIG_SPL_BUILD
 #define CONFIG_FSL_DDR_INTERACTIVE
 #endif
@@ -494,9 +469,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_NS16550_COM2        (CONFIG_SYS_CCSRBAR+0x11C600)
 #define CONFIG_SYS_NS16550_COM3        (CONFIG_SYS_CCSRBAR+0x11D500)
 #define CONFIG_SYS_NS16550_COM4        (CONFIG_SYS_CCSRBAR+0x11D600)
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_SYS_CONSOLE_IS_IN_ENV   /* determine from environment */
-#endif
 
 /* I2C */
 #define CONFIG_SYS_I2C
@@ -698,10 +670,8 @@ unsigned long get_board_ddr_clk(void);
 
 #ifdef CONFIG_PCI
 #define CONFIG_PCI_INDIRECT_BRIDGE
-#define CONFIG_PCI_PNP                 /* do pci plug-and-play */
 
 #define CONFIG_PCI_SCAN_SHOW           /* show pci devices on startup */
-#define CONFIG_DOS_PARTITION
 #endif /* CONFIG_PCI */
 
 #ifdef CONFIG_FMAN_ENET
@@ -758,7 +728,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_USB_EHCI
 
 #ifdef CONFIG_USB_EHCI
-#define CONFIG_USB_STORAGE
 #define CONFIG_USB_EHCI_FSL
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 #endif
@@ -802,13 +771,12 @@ unsigned long get_board_ddr_clk(void);
 /* default location for tftp and bootm */
 #define CONFIG_LOADADDR                1000000
 
-#define CONFIG_BOOTDELAY       10      /* -1 disables auto-boot */
 
 #define CONFIG_BAUDRATE        115200
 
 #define __USB_PHY_TYPE ulpi
 
-#ifdef CONFIG_PPC_B4860
+#ifdef CONFIG_ARCH_B4860
 #define HWCONFIG       "hwconfig=fsl_ddr:ctlr_intlv=null,"     \
                        "bank_intlv=cs0_cs1;"   \
                        "en_cpc:cpc2;"
@@ -831,7 +799,7 @@ unsigned long get_board_ddr_clk(void);
        "consoledev=ttyS0\0"                                    \
        "ramdiskaddr=2000000\0"                                 \
        "ramdiskfile=b4860qds/ramdisk.uboot\0"                  \
-       "fdtaddr=c00000\0"                                      \
+       "fdtaddr=1e00000\0"                                     \
        "fdtfile=b4860qds/b4860qds.dtb\0"                               \
        "bdev=sda3\0"
 
@@ -869,7 +837,7 @@ unsigned long get_board_ddr_clk(void);
  "setenv bootargs root=/dev/ram rw "           \
  "console=$consoledev,$baudrate $othbootargs;" \
  "setenv ramdiskaddr 0x02000000;"              \
- "setenv fdtaddr 0x00c00000;"                  \
+ "setenv fdtaddr 0x01e00000;"                  \
  "setenv loadaddr 0x1000000;"                  \
  "bootm $loadaddr $ramdiskaddr $fdtaddr"