common: Add DISPLAY_BOARDINFO

[people/ms/u-boot.git] / include / configs / C29XPCIE.h

diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h
index 94f991b4f765e90036feb765fd06a3528fb01320..a909611badaa006d65ef0a5c9114cc5f827b2938 100644 (file)
--- a/include/configs/C29XPCIE.h
+++ b/include/configs/C29XPCIE.h
@@ -11,9 +11,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_PHYS_64BIT
-#define CONFIG_DISPLAY_BOARDINFO
-
 #ifdef CONFIG_C29XPCIE
 #define CONFIG_PPC_C29X
 #endif
@@ -28,15 +25,8 @@
 #ifdef CONFIG_TPL_BUILD
 #define CONFIG_SPL_NAND_BOOT
 #define CONFIG_SPL_FLUSH_IMAGE
-#define CONFIG_SPL_ENV_SUPPORT
 #define CONFIG_SPL_NAND_INIT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
-#define CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
+#define CONFIG_TPL_DRIVERS_MISC_SUPPORT
 #define CONFIG_SPL_COMMON_INIT_DDR
 #define CONFIG_SPL_MAX_SIZE            (128 << 10)
 #define CONFIG_SPL_TEXT_BASE           0xf8f81000
@@ -47,8 +37,6 @@
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    ((128 + 128) << 10)
 #elif defined(CONFIG_SPL_BUILD)
 #define CONFIG_SPL_INIT_MINIMAL
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_NAND_SUPPORT
 #define CONFIG_SPL_NAND_MINIMAL
 #define CONFIG_SPL_FLUSH_IMAGE
 #define CONFIG_SPL_TEXT_BASE           0xff800000
@@ -92,7 +80,7 @@
 
 #define CONFIG_PCI                     /* Enable PCI/PCIE */
 #ifdef CONFIG_PCI
-#define CONFIG_PCIE1                   /* PCIE controler 1 (slot 1) */
+#define CONFIG_PCIE1                   /* PCIE controller 1 (slot 1) */
 #define CONFIG_FSL_PCI_INIT            /* Use common FSL init code */
 #define CONFIG_PCI_INDIRECT_BRIDGE
 #define CONFIG_FSL_PCIE_RESET          /* need PCIe reset errata */
@@ -100,7 +88,6 @@
 
 #define CONFIG_CMD_PCI
 
-
 /*
  * PCI Windows
  * Memory space is mapped 1-1, but I/O space must start from 0.
@@ -329,9 +316,9 @@
 
 #define CONFIG_SYS_INIT_RAM_LOCK
 #define CONFIG_SYS_INIT_RAM_ADDR       0xffd00000
-#define CONFIG_SYS_INIT_RAM_END                0x00004000
+#define CONFIG_SYS_INIT_RAM_SIZE       0x00004000
 
-#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_END \
+#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE \
                                                - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 
@@ -377,7 +364,6 @@
 
 /* Serial Port */
 #define CONFIG_CONS_INDEX      1
-#define CONFIG_SYS_NS16550
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE    1
 #define CONFIG_SYS_NS16550_CLK         get_bus_freq(0)
@@ -394,20 +380,6 @@
 #define CONFIG_SYS_NS16550_COM1        (CONFIG_SYS_CCSRBAR+0x4500)
 #define CONFIG_SYS_NS16550_COM2        (CONFIG_SYS_CCSRBAR+0x4600)
 
-/* Use the HUSH parser */
-#define CONFIG_SYS_HUSH_PARSER
-
-/*
- * Pass open firmware flat tree
- */
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-#define CONFIG_OF_STDOUT_VIA_ALIAS
-
-/* new uImage format support */
-#define CONFIG_FIT
-#define CONFIG_FIT_VERBOSE     /* enable fit_format_{error,warning}() */
-
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_FSL
 #define CONFIG_SYS_FSL_I2C_SPEED       400000
@@ -420,18 +392,11 @@
 /* I2C EEPROM */
 /* enable read and write access to EEPROM */
 #define CONFIG_CMD_EEPROM
-#define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
 
-#define CONFIG_CMD_I2C
-
 /* eSPI - Enhanced SPI */
-#define CONFIG_FSL_ESPI
-#define CONFIG_SPI_FLASH_SPANSION
-#define CONFIG_SPI_FLASH_EON
-#define CONFIG_CMD_SF
 #define CONFIG_SF_DEFAULT_SPEED                10000000
 #define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
 
@@ -494,8 +459,6 @@
  */
 #define CONFIG_CMD_ERRATA
 #define CONFIG_CMD_IRQ
-#define CONFIG_CMD_MII
-#define CONFIG_CMD_PING
 #define CONFIG_CMD_REGINFO
 
 /* Hash command with SHA acceleration supported in hardware */
@@ -542,7 +505,6 @@
 /* default location for tftp and bootm */
 #define CONFIG_LOADADDR                1000000
 
-#define CONFIG_BOOTDELAY       -1      /* -1 disables auto-boot */
 
 #define CONFIG_BAUDRATE                115200
 
@@ -556,7 +518,7 @@
        "consoledev=ttyS0\0"                            \
        "ramdiskaddr=2000000\0"                         \
        "ramdiskfile=rootfs.ext2.gz.uboot\0"            \
-       "fdtaddr=c00000\0"                              \
+       "fdtaddr=1e00000\0"                             \
        "fdtfile=name/of/device-tree.dtb\0"                     \
        "othbootargs=ramdisk_size=600000\0"             \