mpc83xx: Cleanup usage of BAT constants

[people/ms/u-boot.git] / include / configs / MERGERBOX.h

diff --git a/include/configs/MERGERBOX.h b/include/configs/MERGERBOX.h
index 100d6f785e02c14e5a31a3b2c54c6745cf5499f0..aa35c1c9d9858080c8a3a130092185efd2272e16 100644 (file)
--- a/include/configs/MERGERBOX.h
+++ b/include/configs/MERGERBOX.h
@@ -408,7 +408,7 @@
 /* DDR: cache cacheable */
 #define CONFIG_SYS_SDRAM       CONFIG_SYS_SDRAM_BASE
 
-#define CONFIG_SYS_IBAT0L      (CONFIG_SYS_SDRAM | BATL_PP_10 |\
+#define CONFIG_SYS_IBAT0L      (CONFIG_SYS_SDRAM | BATL_PP_RW |\
                                 BATL_MEMCOHERENCE)
 #define CONFIG_SYS_IBAT0U      (CONFIG_SYS_SDRAM | BATU_BL_256M | BATU_VS |\
                                 BATU_VP)
@@ -422,7 +422,7 @@
 #define CONFIG_SYS_DBAT1U      CONFIG_SYS_IBAT1U
 
 /* IMMRBAR, PCI IO and NAND: cache-inhibit and guarded */
-#define CONFIG_SYS_IBAT2L      (CONFIG_SYS_IMMR | BATL_PP_10 |\
+#define CONFIG_SYS_IBAT2L      (CONFIG_SYS_IMMR | BATL_PP_RW |\
                                 BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
 #define CONFIG_SYS_IBAT2U      (CONFIG_SYS_IMMR | BATU_BL_8M | BATU_VS |\
                                 BATU_VP)
@@ -436,23 +436,23 @@
 #define CONFIG_SYS_DBAT3U      CONFIG_SYS_IBAT3U
 
 /* FLASH: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT4L      (CONFIG_SYS_FLASH_BASE | BATL_PP_10 |\
+#define CONFIG_SYS_IBAT4L      (CONFIG_SYS_FLASH_BASE | BATL_PP_RW |\
                                 BATL_MEMCOHERENCE)
 #define CONFIG_SYS_IBAT4U      (CONFIG_SYS_FLASH_BASE | BATU_BL_64M |\
                                 BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT4L      (CONFIG_SYS_FLASH_BASE | BATL_PP_10 | \
+#define CONFIG_SYS_DBAT4L      (CONFIG_SYS_FLASH_BASE | BATL_PP_RW | \
                                 BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
 #define CONFIG_SYS_DBAT4U      CONFIG_SYS_IBAT4U
 
 /* Stack in dcache: cacheable, no memory coherence */
-#define CONFIG_SYS_IBAT5L      (CONFIG_SYS_INIT_RAM_ADDR | BATL_PP_10)
+#define CONFIG_SYS_IBAT5L      (CONFIG_SYS_INIT_RAM_ADDR | BATL_PP_RW)
 #define CONFIG_SYS_IBAT5U      (CONFIG_SYS_INIT_RAM_ADDR | BATU_BL_128K |\
                                 BATU_VS | BATU_VP)
 #define CONFIG_SYS_DBAT5L      CONFIG_SYS_IBAT5L
 #define CONFIG_SYS_DBAT5U      CONFIG_SYS_IBAT5U
 
 /* PCI MEM space: cacheable */
-#define CONFIG_SYS_IBAT6L      (CONFIG_SYS_PCI_MEM_PHYS | BATL_PP_10 |\
+#define CONFIG_SYS_IBAT6L      (CONFIG_SYS_PCI_MEM_PHYS | BATL_PP_RW |\
                                 BATL_MEMCOHERENCE)
 #define CONFIG_SYS_IBAT6U      (CONFIG_SYS_PCI_MEM_PHYS | BATU_BL_256M |\
                                 BATU_VS | BATU_VP)
@@ -460,7 +460,7 @@
 #define CONFIG_SYS_DBAT6U      CONFIG_SYS_IBAT6U
 
 /* PCI MMIO space: cache-inhibit and guarded */
-#define CONFIG_SYS_IBAT7L      (CONFIG_SYS_PCI_MMIO_PHYS | BATL_PP_10 | \
+#define CONFIG_SYS_IBAT7L      (CONFIG_SYS_PCI_MMIO_PHYS | BATL_PP_RW | \
                                 BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
 #define CONFIG_SYS_IBAT7U      (CONFIG_SYS_PCI_MMIO_PHYS | BATU_BL_256M |\
                                 BATU_VS | BATU_VP)