configs: Re-sync HUSH options

[people/ms/u-boot.git] / include / configs / MPC8349EMDS.h

diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index c76455ab80c2d86435d7a4912c4cfbbfbb84edc7..9bf4226ab022bc95e0fb6fff47c837b3942863ec 100644 (file)
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -2,23 +2,7 @@
  * (C) Copyright 2006-2010
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 /*
@@ -29,11 +13,12 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#define CONFIG_DISPLAY_BOARDINFO
+
 /*
  * High Level Configuration Options
  */
 #define CONFIG_E300            1       /* E300 Family */
-#define CONFIG_MPC83xx         1       /* MPC83xx family */
 #define CONFIG_MPC834x         1       /* MPC834x family */
 #define CONFIG_MPC8349         1       /* MPC8349 specific */
 #define CONFIG_MPC8349EMDS     1       /* MPC8349EMDS board specific */
@@ -78,11 +63,12 @@
 #define CONFIG_SPD_EEPROM              /* use SPD EEPROM for DDR setup*/
 
 /*
- * define CONFIG_FSL_DDR2 to use unified DDR driver
+ * define CONFIG_SYS_FSL_DDR2 to use unified DDR driver
  * undefine it to use old spd_sdram.c
  */
-#define CONFIG_FSL_DDR2
-#ifdef CONFIG_FSL_DDR2
+#define CONFIG_SYS_FSL_DDR2
+#ifdef CONFIG_SYS_FSL_DDR2
+#define CONFIG_SYS_FSL_DDRC_GEN2
 #define CONFIG_SYS_SPD_BUS_NUM 0
 #define SPD_EEPROM_ADDRESS1    0x52
 #define SPD_EEPROM_ADDRESS2    0x51
@@ -240,7 +226,7 @@
 #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 
 #define CONFIG_SYS_MONITOR_LEN (384 * 1024)    /* Reserve 384 kB for Mon */
-#define CONFIG_SYS_MALLOC_LEN  (128 * 1024)    /* Reserved for malloc */
+#define CONFIG_SYS_MALLOC_LEN  (256 * 1024)    /* Reserved for malloc */
 
 /*
  * Local Bus LCRR and LBCR regs
@@ -332,7 +318,6 @@
  * Serial Port
  */
 #define CONFIG_CONS_INDEX     1
-#define CONFIG_SYS_NS16550
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE    1
 #define CONFIG_SYS_NS16550_CLK         get_bus_freq(0)
@@ -345,27 +330,17 @@
 
 #define CONFIG_CMDLINE_EDITING 1       /* add command line history     */
 #define CONFIG_AUTO_COMPLETE           /* add autocompletion support   */
-/* Use the HUSH parser */
-#define CONFIG_SYS_HUSH_PARSER
-#ifdef CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
-#endif
-
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT       1
-#define CONFIG_OF_BOARD_SETUP  1
-#define CONFIG_OF_STDOUT_VIA_ALIAS     1
 
 /* I2C */
-#define CONFIG_HARD_I2C                /* I2C with hardware support*/
-#undef CONFIG_SOFT_I2C         /* I2C bit-banged */
-#define CONFIG_FSL_I2C
-#define CONFIG_I2C_MULTI_BUS
-#define CONFIG_SYS_I2C_SPEED   400000  /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE   0x7F
-#define CONFIG_SYS_I2C_NOPROBES        { {0, 0x69} }   /* Don't probe these addrs */
-#define CONFIG_SYS_I2C_OFFSET  0x3000
-#define CONFIG_SYS_I2C2_OFFSET 0x3100
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_FSL
+#define CONFIG_SYS_FSL_I2C_SPEED       400000
+#define CONFIG_SYS_FSL_I2C_SLAVE       0x7F
+#define CONFIG_SYS_FSL_I2C_OFFSET      0x3000
+#define CONFIG_SYS_FSL_I2C2_SPEED      400000
+#define CONFIG_SYS_FSL_I2C2_SLAVE      0x7F
+#define CONFIG_SYS_FSL_I2C2_OFFSET     0x3100
+#define CONFIG_SYS_I2C_NOPROBES                { {0, 0x69} }
 
 /* SPI */
 #define CONFIG_MPC8XXX_SPI
@@ -502,8 +477,6 @@
 /*
  * Command line configuration.
  */
-#include <config_cmd_default.h>
-
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_I2C
 #define CONFIG_CMD_DATE
@@ -513,12 +486,6 @@
     #define CONFIG_CMD_PCI
 #endif
 
-#if defined(CONFIG_SYS_RAMBOOT)
-    #undef CONFIG_CMD_SAVEENV
-    #undef CONFIG_CMD_LOADS
-#endif
-
-
 #undef CONFIG_WATCHDOG                 /* watchdog disabled */
 
 /*
@@ -526,7 +493,6 @@
  */
 #define CONFIG_SYS_LONGHELP                    /* undef to save memory */
 #define CONFIG_SYS_LOAD_ADDR   0x2000000       /* default load address */
-#define CONFIG_SYS_PROMPT      "=> "           /* Monitor Command Prompt */
 
 #if defined(CONFIG_CMD_KGDB)
        #define CONFIG_SYS_CBSIZE       1024    /* Console I/O Buffer Size */
@@ -539,7 +505,6 @@
 #define CONFIG_SYS_MAXARGS     16      /* max number of command args */
                                /* Boot Argument Buffer Size */
 #define CONFIG_SYS_BARGSIZE    CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_HZ          1000    /* decrementer freq: 1ms ticks */
 
 /*
  * For booting Linux, the board info and command line data
@@ -669,6 +634,7 @@
 
 /* PCI @ 0x80000000 */
 #ifdef CONFIG_PCI
+#define CONFIG_PCI_INDIRECT_BRIDGE
 #define CONFIG_SYS_IBAT1L      (CONFIG_SYS_PCI1_MEM_BASE \
                                | BATL_PP_RW \
                                | BATL_MEMCOHERENCE)
@@ -756,7 +722,6 @@
 
 #if defined(CONFIG_CMD_KGDB)
 #define CONFIG_KGDB_BAUDRATE   230400  /* speed of kgdb serial port */
-#define CONFIG_KGDB_SER_INDEX  2       /* which serial port to use */
 #endif
 
 /*