]> git.ipfire.org Git - people/ms/u-boot.git/blobdiff - include/configs/MPC837XERDB.h
Move CONFIG_OF_LIBFDT to Kconfig
[people/ms/u-boot.git] / include / configs / MPC837XERDB.h
index bf8a94dadec46c484932d3aff3f3f56cb8b6fb5d..abd818efae244a120e92cd208cc2aad17c20321a 100644 (file)
@@ -3,20 +3,7 @@
  * Kevin Lam <kevin.lam@freescale.com>
  * Joe D'Abbraccio <joe.d'abbraccio@freescale.com>
  *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef __CONFIG_H
@@ -26,9 +13,9 @@
  * High Level Configuration Options
  */
 #define CONFIG_E300            1 /* E300 family */
-#define CONFIG_MPC83xx         1 /* MPC83xx family */
 #define CONFIG_MPC837x         1 /* MPC837x CPU specific */
 #define CONFIG_MPC837XERDB     1
+#define CONFIG_DISPLAY_BOARDINFO
 
 #define        CONFIG_SYS_TEXT_BASE    0xFE000000
 
 #define CONFIG_SYS_LBLAWAR0_PRELIM     0x80000016      /* 8 MB window size */
 
 #define CONFIG_SYS_BR0_PRELIM  (CONFIG_SYS_FLASH_BASE \
-                               | (2 << BR_PS_SHIFT)    /* 16 bit port */ \
-                               | BR_V)                 /* valid */
-#define CONFIG_SYS_OR0_PRELIM  (0xFF800000             /* 8 MByte */ \
+                               | BR_PS_16      /* 16 bit port */ \
+                               | BR_MS_GPCM    /* MSEL = GPCM */ \
+                               | BR_V)         /* valid */
+#define CONFIG_SYS_OR0_PRELIM  (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) \
                                | OR_GPCM_XACS \
                                | OR_GPCM_SCY_9 \
-                               | OR_GPCM_EHTR \
+                               | OR_GPCM_EHTR_SET \
                                | OR_GPCM_EAD)
-                               /* 0xFF806FF7   TODO SLOW 8 MB flash size */
+                               /* 0xFF800191 */
 
 #define CONFIG_SYS_MAX_FLASH_BANKS     1 /* number of banks */
 #define CONFIG_SYS_MAX_FLASH_SECT      256 /* max sectors per device */
 /*
  * NAND Flash on the Local Bus
  */
-#define CONFIG_SYS_NAND_BASE   0xE0600000      /* 0xE0600000 */
+#define CONFIG_SYS_NAND_BASE   0xE0600000
 #define CONFIG_SYS_BR1_PRELIM  (CONFIG_SYS_NAND_BASE \
-                               | (2 << BR_DECC_SHIFT)  /* Use HW ECC */ \
-                               | BR_PS_8 |             /* 8 bit Port */ \
-                               | BR_MS_FCM |           /* MSEL = FCM */ \
+                               | BR_DECC_CHK_GEN       /* Use HW ECC */ \
+                               | BR_PS_8               /* 8 bit port */ \
+                               | BR_MS_FCM             /* MSEL = FCM */ \
                                | BR_V)                 /* valid */
-#define CONFIG_SYS_OR1_PRELIM  (0xFFFF8000             /* length 32K */ \
+#define CONFIG_SYS_OR1_PRELIM  (OR_AM_32KB \
                                | OR_FCM_CSCT \
                                | OR_FCM_CST \
                                | OR_FCM_CHT \
                                | OR_FCM_TRLX \
                                | OR_FCM_EHTR)
 #define CONFIG_SYS_LBLAWBAR1_PRELIM    CONFIG_SYS_NAND_BASE
-#define CONFIG_SYS_LBLAWAR1_PRELIM     0x8000000E      /* 32KB  */
+#define CONFIG_SYS_LBLAWAR1_PRELIM     (LBLAWAR_EN | LBLAWAR_32KB)
 
 /* Vitesse 7385 */
 
 
 #ifdef CONFIG_VSC7385_ENET
 
-#define CONFIG_SYS_BR2_PRELIM          0xf0000801      /* Base address */
-#define CONFIG_SYS_OR2_PRELIM          0xfffe09ff      /* 128K bytes*/
+#define CONFIG_SYS_BR2_PRELIM          (CONFIG_SYS_VSC7385_BASE \
+                                       | BR_PS_8 \
+                                       | BR_MS_GPCM \
+                                       | BR_V)
+                                       /* 0xF0000801 */
+#define CONFIG_SYS_OR2_PRELIM          (OR_AM_128KB \
+                                       | OR_GPCM_CSNT \
+                                       | OR_GPCM_XACS \
+                                       | OR_GPCM_SCY_15 \
+                                       | OR_GPCM_SETA \
+                                       | OR_GPCM_TRLX_SET \
+                                       | OR_GPCM_EHTR_SET \
+                                       | OR_GPCM_EAD)
+                                       /* 0xfffe09ff */
+
                                        /* Access Base */
 #define CONFIG_SYS_LBLAWBAR2_PRELIM    CONFIG_SYS_VSC7385_BASE
-#define CONFIG_SYS_LBLAWAR2_PRELIM     0x80000010      /* Access Size 128K */
+#define CONFIG_SYS_LBLAWAR2_PRELIM     (LBLAWAR_EN | LBLAWAR_128KB)
 
 #endif
 
  * Serial Port
  */
 #define CONFIG_CONS_INDEX      1
-#define CONFIG_SYS_NS16550
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE    1
 #define CONFIG_SYS_NS16550_CLK         get_bus_freq(0)
 
 /* Use the HUSH parser */
 #define CONFIG_SYS_HUSH_PARSER
-#ifdef CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
-#endif
 
 /* Pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT       1
 #define CONFIG_OF_BOARD_SETUP  1
 #define CONFIG_OF_STDOUT_VIA_ALIAS 1
 
 /* I2C */
-#define CONFIG_HARD_I2C                /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C         /* I2C bit-banged */
-#define CONFIG_FSL_I2C
-#define CONFIG_SYS_I2C_SPEED   400000 /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE   0x7F
-#define CONFIG_SYS_I2C_NOPROBES        {0x51} /* Don't probe these addrs */
-#define CONFIG_SYS_I2C_OFFSET  0x3000
-#define CONFIG_SYS_I2C2_OFFSET 0x3100
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_FSL
+#define CONFIG_SYS_FSL_I2C_SPEED       400000
+#define CONFIG_SYS_FSL_I2C_SLAVE       0x7F
+#define CONFIG_SYS_FSL_I2C_OFFSET      0x3000
+#define CONFIG_SYS_I2C_NOPROBES                { {0, 0x51} }
 
 /*
  * Config on-board RTC
 #define CONFIG_SYS_PCIE2_IO_SIZE       0x00800000
 
 #ifdef CONFIG_PCI
+#define CONFIG_PCI_INDIRECT_BRIDGE
 #define CONFIG_PCI_PNP         /* do pci plug-and-play */
 
 #undef CONFIG_PCI_SCAN_SHOW    /* show pci devices on startup */
 /*
  * Command line configuration.
  */
-#include <config_cmd_default.h>
-
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_I2C
 #define CONFIG_CMD_MII
 #define CONFIG_CMD_PCI
 #endif
 
-#if defined(CONFIG_SYS_RAMBOOT)
-#undef CONFIG_CMD_SAVEENV
-#undef CONFIG_CMD_LOADS
-#endif
-
 #define CONFIG_CMDLINE_EDITING 1       /* add command line history */
 #define CONFIG_AUTO_COMPLETE           /* add autocompletion support */
 
  */
 #define CONFIG_SYS_LONGHELP    /* undef to save memory */
 #define CONFIG_SYS_LOAD_ADDR   0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT      "=> "   /* Monitor Command Prompt */
 
 #if defined(CONFIG_CMD_KGDB)
        #define CONFIG_SYS_CBSIZE       1024 /* Console I/O Buffer Size */
 #define CONFIG_SYS_MAXARGS     16      /* max number of command args */
                                /* Boot Argument Buffer Size */
 #define CONFIG_SYS_BARGSIZE    CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_HZ          1000    /* decrementer freq: 1ms ticks */
 
 /*
  * For booting Linux, the board info and command line data
 
 #if defined(CONFIG_CMD_KGDB)
 #define CONFIG_KGDB_BAUDRATE   230400  /* speed of kgdb serial port */
-#define CONFIG_KGDB_SER_INDEX  2       /* which serial port to use */
 #endif
 
 /*
 #define CONFIG_ENV_OVERWRITE
 
 #define CONFIG_HAS_FSL_DR_USB
+#define CONFIG_CMD_USB
+#define CONFIG_USB_STORAGE
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_FSL
+#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 
 #define CONFIG_NETDEV          "eth1"
 
 #define CONFIG_BOOTDELAY       6       /* -1 disables auto-boot */
 #define CONFIG_BAUDRATE                115200
 
-#define XMK_STR(x)     #x
-#define MK_STR(x)      XMK_STR(x)
-
 #define CONFIG_EXTRA_ENV_SETTINGS \
        "netdev=" CONFIG_NETDEV "\0"                            \
        "uboot=" CONFIG_UBOOTPATH "\0"                                  \
        "tftpflash=tftp $loadaddr $uboot;"                              \
-               "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
-               "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; "   \
-               "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \
-               "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
-               "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \
+               "protect off " __stringify(CONFIG_SYS_TEXT_BASE)        \
+                       " +$filesize; " \
+               "erase " __stringify(CONFIG_SYS_TEXT_BASE)              \
+                       " +$filesize; " \
+               "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE)     \
+                       " $filesize; "  \
+               "protect on " __stringify(CONFIG_SYS_TEXT_BASE)         \
+                       " +$filesize; " \
+               "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE)    \
+                       " $filesize\0"  \
        "fdtaddr=780000\0"                                              \
        "fdtfile=" CONFIG_FDTFILE "\0"                                  \
        "ramdiskaddr=1000000\0"                                         \
        "tftp $fdtaddr $fdtfile;"                                       \
        "bootm $loadaddr $ramdiskaddr $fdtaddr"
 
-#undef MK_STR
-#undef XMK_STR
-
 #endif /* __CONFIG_H */