]> git.ipfire.org Git - people/ms/u-boot.git/blobdiff - include/configs/ipam390.h
flash: complete CONFIG_SYS_NO_FLASH move with renaming
[people/ms/u-boot.git] / include / configs / ipam390.h
index 82d4298007562b3dc53bcbb83b1cf5a905fc91e1..d0316221b0da62d0c4651ccf7d81a3a81fa232dd 100644 (file)
@@ -25,7 +25,6 @@
  * SoC Configuration
  */
 #define CONFIG_MACH_DAVINCI_DA850_EVM
-#define CONFIG_ARM926EJS               /* arm926ejs CPU core */
 #define CONFIG_SOC_DA8XX               /* TI DA8xx SoC */
 #define CONFIG_SOC_DA850               /* TI DA850 SoC */
 #define CONFIG_SYS_EXCEPTION_VECTORS_HIGH
@@ -33,9 +32,6 @@
 #define CONFIG_SYS_OSCIN_FREQ          24000000
 #define CONFIG_SYS_TIMERBASE           DAVINCI_TIMER0_BASE
 #define CONFIG_SYS_HZ_CLOCK            clk_get(DAVINCI_AUXCLK_CLKID)
-#define CONFIG_SYS_HZ                  1000
-#define CONFIG_SYS_DA850_PLL_INIT
-#define CONFIG_SYS_DA850_DDR_INIT
 #define CONFIG_SYS_TEXT_BASE           0xc1080000
 
 /*
@@ -92,7 +88,6 @@
 #define CONFIG_SYS_DA850_DDR2_SDBCR2   0x00000004
 #define CONFIG_SYS_DA850_DDR2_PBBPR    0x00000020
 
-
 #define CONFIG_SYS_DA850_DDR2_SDTIMR (         \
        (13 << DV_DDR_SDTMR1_RFC_SHIFT) |       \
        (2 << DV_DDR_SDTMR1_RP_SHIFT) |         \
        (3 << DV_DDR_SDCR_IBANK_SHIFT) |        \
        (2 << DV_DDR_SDCR_PAGESIZE_SHIFT))
 
-#define CONFIG_SYS_DA850_CS3CFG        (DAVINCI_ABCR_WSETUP(2) | \
+#define CONFIG_SYS_DA850_CS3CFG        (DAVINCI_ABCR_WSETUP(1) | \
                                DAVINCI_ABCR_WSTROBE(2) | \
-                               DAVINCI_ABCR_WHOLD(1)   | \
+                               DAVINCI_ABCR_WHOLD(0)   | \
                                DAVINCI_ABCR_RSETUP(1)  | \
-                               DAVINCI_ABCR_RSTROBE(4) | \
-                               DAVINCI_ABCR_RHOLD(0)   | \
-                               DAVINCI_ABCR_TA(1)      | \
+                               DAVINCI_ABCR_RSTROBE(2) | \
+                               DAVINCI_ABCR_RHOLD(1)   | \
+                               DAVINCI_ABCR_TA(0)      | \
                                DAVINCI_ABCR_ASIZE_8BIT)
 
-
 /*
  * Serial Driver info
  */
-#define CONFIG_SYS_NS16550
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE    -4      /* NS16550 register size */
 #define CONFIG_SYS_NS16550_COM1        DAVINCI_UART0_BASE /* Base address of UART0 */
  * Flash & Environment
  */
 #define CONFIG_NAND_DAVINCI
-#define CONFIG_SYS_NO_FLASH
 #define CONFIG_ENV_IS_IN_NAND          /* U-Boot env in NAND Flash  */
 #define CONFIG_ENV_OFFSET              0x0 /* Block 0--not used by bootcode */
 #define CONFIG_ENV_SIZE                        (128 << 10)
 #undef CONFIG_SYS_NAND_HW_ECC
 #define CONFIG_SYS_MAX_NAND_DEVICE     1 /* Max number of NAND devices */
 #define CONFIG_SYS_NAND_HW_ECC_OOBFIRST
+#define CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_SIZE      (2 << 10)
 #define CONFIG_SYS_NAND_BLOCK_SIZE     (128 << 10)
                                        CONFIG_SYS_MALLOC_LEN -       \
                                        GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_NAND_ECCPOS         {                               \
-                               24, 25, 26, 27, 28, \
-                               29, 30, 31, 32, 33, 34, 35, 36, 37, 38, \
-                               39, 40, 41, 42, 43, 44, 45, 46, 47, 48, \
-                               49, 50, 51, 52, 53, 54, 55, 56, 57, 58, \
-                               59, 60, 61, 62, 63 }
+                       6,   7,  8,  9, 10,     11, 12, 13, 14, 15,     \
+                       22, 23, 24, 25, 26,     27, 28, 29, 30, 31,     \
+                       38, 39, 40, 41, 42,     43, 44, 45, 46, 47,     \
+                       54, 55, 56, 57, 58,     59, 60, 61, 62, 63}
 #define CONFIG_SYS_NAND_PAGE_COUNT     64
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  0
 #define CONFIG_SYS_NAND_ECCSIZE                512
 #define CONFIG_SYS_NAND_ECCBYTES       10
 #define CONFIG_SYS_NAND_OOBSIZE                64
-#define CONFIG_SPL_NAND_SUPPORT
 #define CONFIG_SPL_NAND_BASE
 #define CONFIG_SPL_NAND_DRIVERS
 #define CONFIG_SPL_NAND_ECC
  * U-Boot general configuration
  */
 #define CONFIG_MISC_INIT_R
-#define CONFIG_BOARD_EARLY_INIT_F
 #define CONFIG_BOOTFILE                "uImage" /* Boot file name */
-#define CONFIG_SYS_PROMPT      "U-Boot > " /* Command Prompt */
 #define CONFIG_SYS_CBSIZE      1024 /* Console I/O Buffer Size */
 #define CONFIG_SYS_PBSIZE      (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
 #define CONFIG_SYS_MAXARGS     16 /* max number of command args */
 #define CONFIG_SYS_BARGSIZE    CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */
 #define CONFIG_SYS_LOAD_ADDR   (PHYS_SDRAM_1 + 0x700000)
-#define CONFIG_VERSION_VARIABLE
 #define CONFIG_AUTO_COMPLETE
-#define CONFIG_SYS_HUSH_PARSER
 #define CONFIG_CMDLINE_EDITING
 #define CONFIG_SYS_LONGHELP
 #define CONFIG_CRC32_VERIFY
 #define CONFIG_CMDLINE_TAG
 #define CONFIG_REVISION_TAG
 #define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_BOOTARGS                \
-       "mem=128M console=ttyS0,115200n8 root=/dev/mtdblock0p4 rw noinitrd ip=dhcp"
-#define CONFIG_BOOTDELAY       3
 #define CONFIG_EXTRA_ENV_SETTINGS \
+       "defbootargs=setenv bootargs mem=128M console=ttyS0,115200n8 " \
+               "root=/dev/mtdblock5 rw noinitrd " \
+               "rootfstype=jffs2 noinitrd\0" \
        "hwconfig=dsp:wake=yes\0" \
+       "bootcmd=nboot kernel;run defbootargs addmtd;bootm 0xc0700000\0" \
+       "bootfile=uImage\0" \
        "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"      \
+       "mtddevname=uboot-env\0" \
+       "mtddevnum=0\0" \
        "mtdids=" MTDIDS_DEFAULT "\0"                           \
        "mtdparts=" MTDPARTS_DEFAULT "\0"                       \
+       "u-boot=/tftpboot/ipam390/u-boot.ais\0"                 \
+       "upd_uboot=tftp c0000000 ${u-boot};nand erase.part u-boot;" \
+               "nand write c0000000 20000 ${filesize}\0"       \
        "setbootparms=nand read c0100000 200000 400000;"        \
+               "run defbootargs addmtd;"                       \
                "spl export atags c0100000;"                    \
                "nand erase.part bootparms;"                    \
                "nand write c0000100 180000 20000\0"            \
 /*
  * U-Boot commands
  */
-#include <config_cmd_default.h>
 #define CONFIG_CMD_ENV
-#define CONFIG_CMD_ASKENV
-#define CONFIG_CMD_DHCP
 #define CONFIG_CMD_DIAG
-#define CONFIG_CMD_MII
-#define CONFIG_CMD_PING
 #define CONFIG_CMD_SAVES
-#define CONFIG_CMD_MEMORY
 
 #ifdef CONFIG_CMD_BDI
 #define CONFIG_CLOCKS
 #endif
 
 #ifndef CONFIG_DRIVER_TI_EMAC
-#undef CONFIG_CMD_NET
-#undef CONFIG_CMD_DHCP
-#undef CONFIG_CMD_MII
-#undef CONFIG_CMD_PING
 #endif
 
 #define CONFIG_CMD_NAND
 #define CONFIG_MTD_PARTITIONS
 #define CONFIG_LZO
 #define CONFIG_RBTREE
-#define CONFIG_CMD_UBI
 #define CONFIG_CMD_UBIFS
 
 #define MTDIDS_NAME_STR                "davinci_nand.0"
                                        "-(rootfs)"
 
 /* defines for SPL */
-#define CONFIG_SPL
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_BOARD_INIT
 #define CONFIG_SYS_SPL_MALLOC_START    (CONFIG_SYS_TEXT_BASE - \
                                                CONFIG_SYS_MALLOC_LEN)
 #define CONFIG_SYS_SPL_MALLOC_SIZE     CONFIG_SYS_MALLOC_LEN
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
 #define CONFIG_SPL_LDSCRIPT    "board/$(BOARDDIR)/u-boot-spl-ipam390.lds"
 #define CONFIG_SPL_STACK       0x8001ff00
 #define CONFIG_SPL_TEXT_BASE   0x80000000
 
 /* add FALCON boot mode */
 #define CONFIG_CMD_SPL
-#define CONFIG_SPL_OS_BOOT
 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS        0x00200000
 #define CONFIG_SYS_SPL_ARGS_ADDR       LINUX_BOOT_PARAM_ADDR
 #define CONFIG_CMD_SPL_NAND_OFS                0x00180000
 #define CONFIG_CMD_SPL_WRITE_SIZE      0x400
 
 /* GPIO support */
-#define CONFIG_SPL_GPIO_SUPPORT
 #define CONFIG_DA8XX_GPIO
 #define CONFIG_IPAM390_GPIO_BOOTMODE   ((16 * 7) + 14)