/* External logbuffer support */
#define CONFIG_LOGBUFFER
-/* Reserve space for the logbuffer */
-#ifdef CONFIG_LOGBUFFER
-#define CONFIG_PRAM 20
-#endif
-
/*
* High Level Configuration Options
* (easy to change)
#define CONFIG_LWMON 1 /* ...on a LWMON board */
#define CONFIG_BOARD_PRE_INIT 1 /* Call board_pre_init */
+#define CONFIG_BOARD_POSTCLK_INIT 1 /* Call board_postclk_init */
#define CONFIG_LCD 1 /* use LCD controller ... */
#define CONFIG_HLD1045 1 /* ... with a HLD1045 display */
+#define CONFIG_SPLASH_SCREEN /* ... with splashscreen support*/
+
#if 1
#define CONFIG_8xx_CONS_SMC2 1 /* Console is on SMC2 */
#else
#undef CONFIG_BOOTARGS
/* POST support */
-#define CONFIG_POST (CFG_POST_CACHE | \
+#define CONFIG_POST (CFG_POST_CACHE | \
CFG_POST_WATCHDOG | \
- CFG_POST_RTC | \
- CFG_POST_MEMORY | \
- CFG_POST_CPU | \
- CFG_POST_UART | \
- CFG_POST_ETHER | \
- CFG_POST_SPI | \
- CFG_POST_USB | \
- CFG_POST_SPR)
+ CFG_POST_RTC | \
+ CFG_POST_MEMORY | \
+ CFG_POST_CPU | \
+ CFG_POST_UART | \
+ CFG_POST_ETHER | \
+ CFG_POST_I2C | \
+ CFG_POST_SPI | \
+ CFG_POST_USB | \
+ CFG_POST_SPR | \
+ CFG_POST_SYSMON)
#define CONFIG_BOOTCOMMAND "run flash_self"
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "kernel_addr=40040000\0" \
- "ramdisk_addr=40100000\0" \
- "magic_keys=#3\0" \
- "key_magic#=28\0" \
- "key_cmd#=setenv addfb setenv bootargs \\$(bootargs) console=tty0\0" \
- "key_magic3=24\0" \
- "key_cmd3=echo *** Entering Test Mode ***;" \
- "setenv add_misc setenv bootargs \\$(bootargs) testmode\0" \
- "nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=$(serverip):$(rootpath)\0" \
- "ramargs=setenv bootargs root=/dev/ram rw\0" \
- "addfb=setenv bootargs $(bootargs) console=ttyS1,$(baudrate)\0" \
- "addip=setenv bootargs $(bootargs) " \
- "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off " \
- "panic=1\0" \
- "add_wdt=setenv bootargs $(bootargs) $(wdt_args)\0" \
- "flash_nfs=run nfsargs addip add_wdt addfb;" \
- "bootm $(kernel_addr)\0" \
- "flash_self=run ramargs addip add_wdt addfb;" \
- "bootm $(kernel_addr) $(ramdisk_addr)\0" \
- "net_nfs=tftp 100000 /tftpboot/pImage.lwmon;" \
- "run nfsargs addip add_wdt addfb;bootm\0" \
- "rootpath=/opt/eldk/ppc_8xx\0" \
- "load=tftp 100000 /tftpboot/u-boot.bin\0" \
- "update=protect off 1:0;era 1:0;cp.b 100000 40000000 $(filesize)\0" \
- "wdt_args=wdt_8xx=off\0" \
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "kernel_addr=40080000\0" \
+ "ramdisk_addr=40280000\0" \
+ "magic_keys=#3\0" \
+ "key_magic#=28\0" \
+ "key_cmd#=setenv addfb setenv 'bootargs $bootargs console=tty0'\0" \
+ "key_magic3=3C+3F\0" \
+ "key_cmd3=echo *** Entering Test Mode ***;" \
+ "setenv add_misc 'setenv bootargs $bootargs testmode'\0" \
+ "nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath\0" \
+ "ramargs=setenv bootargs root=/dev/ram rw\0" \
+ "addfb=setenv bootargs $bootargs console=ttyS1,$baudrate\0" \
+ "addip=setenv bootargs $bootargs " \
+ "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off " \
+ "panic=1\0" \
+ "add_wdt=setenv bootargs $bootargs $wdt_args\0" \
+ "add_misc=setenv bootargs $bootargs runmode\0" \
+ "flash_nfs=run nfsargs addip add_wdt addfb add_misc;" \
+ "bootm $kernel_addr\0" \
+ "flash_self=run ramargs addip add_wdt addfb add_misc;" \
+ "bootm $kernel_addr $ramdisk_addr\0" \
+ "net_nfs=tftp 100000 /tftpboot/uImage.lwmon;" \
+ "run nfsargs addip add_wdt addfb;bootm\0" \
+ "rootpath=/opt/eldk/ppc_8xx\0" \
+ "load=tftp 100000 /tftpboot/u-boot.bin\0" \
+ "update=protect off 1:0;era 1:0;cp.b 100000 40000000 $filesize\0" \
+ "wdt_args=wdt_8xx=off\0" \
"verify=no"
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#undef CONFIG_STATUS_LED /* Status LED disabled */
/* enable I2C and select the hardware/software driver */
-#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
+#undef CONFIG_HARD_I2C /* I2C with hardware support */
+#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
-#ifdef CONFIG_HARD_I2C
-/*
- * Hardware (CPM) I2C driver configuration
- */
-# define CFG_I2C_SPEED 93000 /* 93 kHz is supposed to work */
-# define CFG_I2C_SLAVE 0xFE
-#endif /* CONFIG_HARD_I2C */
+#define CFG_I2C_SPEED 93000 /* 93 kHz is supposed to work */
+#define CFG_I2C_SLAVE 0xFE
#ifdef CONFIG_SOFT_I2C
/*
else immr->im_cpm.cp_pbdat &= ~PB_SDA
#define I2C_SCL(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
else immr->im_cpm.cp_pbdat &= ~PB_SCL
-#define I2C_DELAY udelay(1) /* 1/4 I2C clock duration */
+#define I2C_DELAY udelay(2) /* 1/4 I2C clock duration */
#endif /* CONFIG_SOFT_I2C */
#ifdef CONFIG_8xx_CONS_SCC2 /* Can't use ethernet, then */
#define CONFIG_COMMANDS ( (CONFIG_CMD_DFL & ~CFG_CMD_NET) | \
+ CFG_CMD_ASKENV | \
CFG_CMD_DATE | \
CFG_CMD_I2C | \
CFG_CMD_EEPROM | \
CFG_CMD_IDE | \
CFG_CMD_BSP | \
+ CFG_CMD_BMP | \
CFG_CMD_POST_DIAG )
#else
#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
+ CFG_CMD_ASKENV | \
CFG_CMD_DHCP | \
CFG_CMD_DATE | \
CFG_CMD_I2C | \
CFG_CMD_EEPROM | \
CFG_CMD_IDE | \
CFG_CMD_BSP | \
+ CFG_CMD_BMP | \
CFG_CMD_POST_DIAG )
#endif
#define CONFIG_MAC_PARTITION
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#undef CFG_HUSH_PARSER /* enable "hush" shell */
+#define CFG_HUSH_PARSER 1 /* use "hush" command parser */
#ifdef CFG_HUSH_PARSER
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
-#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+/*
+ * When the watchdog is enabled, output must be fast enough in Linux.
+ */
+#ifdef CONFIG_WATCHDOG
+#define CFG_BAUDRATE_TABLE { 38400, 57600, 115200 }
+#else
+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+#endif
/*
* Low Level Configuration Settings
*/
#define CFG_INIT_RAM_ADDR CFG_IMMR
#define CFG_INIT_RAM_END 0x2F00 /* End of used area in DPRAM */
-#define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */
+#define CFG_GBL_DATA_SIZE 68 /* size in bytes reserved for initial data */
#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
#define CFG_I2C_KEYBD_ADDR 0x56 /* PIC LWE keyboard */
#define CFG_I2C_PICIO_ADDR 0x57 /* PIC IO Expander */
-#define CONFIG_USE_FRAM /* Use FRAM instead of EEPROM */
+#undef CONFIG_USE_FRAM /* Use FRAM instead of EEPROM */
+
#ifdef CONFIG_USE_FRAM /* use FRAM */
#define CFG_I2C_EEPROM_ADDR 0x55 /* FRAM FM24CL64 */
#define CFG_I2C_EEPROM_ADDR_LEN 2
#endif /* CONFIG_USE_FRAM */
#define CFG_EEPROM_PAGE_WRITE_BITS 4
+/* List of I2C addresses to be verified by POST */
+#ifdef CONFIG_USE_FRAM
+#define I2C_ADDR_LIST { /* CFG_I2C_AUDIO_ADDR, */ \
+ CFG_I2C_SYSMON_ADDR, \
+ CFG_I2C_RTC_ADDR, \
+ CFG_I2C_POWER_A_ADDR, \
+ CFG_I2C_POWER_B_ADDR, \
+ CFG_I2C_KEYBD_ADDR, \
+ CFG_I2C_PICIO_ADDR, \
+ CFG_I2C_EEPROM_ADDR, \
+ }
+#else /* Use EEPROM - which show up on 8 consequtive addresses */
+#define I2C_ADDR_LIST { /* CFG_I2C_AUDIO_ADDR, */ \
+ CFG_I2C_SYSMON_ADDR, \
+ CFG_I2C_RTC_ADDR, \
+ CFG_I2C_POWER_A_ADDR, \
+ CFG_I2C_POWER_B_ADDR, \
+ CFG_I2C_KEYBD_ADDR, \
+ CFG_I2C_PICIO_ADDR, \
+ CFG_I2C_EEPROM_ADDR+0, \
+ CFG_I2C_EEPROM_ADDR+1, \
+ CFG_I2C_EEPROM_ADDR+2, \
+ CFG_I2C_EEPROM_ADDR+3, \
+ CFG_I2C_EEPROM_ADDR+4, \
+ CFG_I2C_EEPROM_ADDR+5, \
+ CFG_I2C_EEPROM_ADDR+6, \
+ CFG_I2C_EEPROM_ADDR+7, \
+ }
+#endif /* CONFIG_USE_FRAM */
+
/*-----------------------------------------------------------------------
* Cache Configuration
*/
*-----------------------------------------------------------------------
*
*/
-/*#define CFG_DER 0x2002000F*/
#define CFG_DER 0
/*
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
+#define CONFIG_MODEM_SUPPORT 1 /* enable modem initialization stuff */
+#undef CONFIG_MODEM_SUPPORT_DEBUG
+
+#define CONFIG_MODEM_KEY_MAGIC "3C+3F" /* press F3 + F6 keys to enable modem */
+#define CONFIG_POST_KEY_MAGIC "3C+3E" /* press F3 + F5 keys to force POST */
#endif /* __CONFIG_H */
projects / people / ms / u-boot.git / blobdiff