#include "../board/xilinx/microblaze-generic/xparameters.h"
/* MicroBlaze CPU */
-#define CONFIG_MICROBLAZE 1
#define MICROBLAZE_V5 1
-/* Open Firmware DTS */
-#define CONFIG_OF_CONTROL 1
-#define CONFIG_OF_EMBED 1
-#define CONFIG_DEFAULT_DEVICE_TREE microblaze-generic
-
/* linear and spi flash memory */
#ifdef XILINX_FLASH_START
#define FLASH
#endif
/* uart */
-#ifdef XILINX_UARTLITE_BASEADDR
-# define CONFIG_XILINX_UARTLITE
-# define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR
-# define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE
-# define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE }
-# define CONSOLE_ARG "console=console=ttyUL0,115200\0"
-#elif XILINX_UART16550_BASEADDR
-# define CONFIG_SYS_NS16550 1
-# define CONFIG_SYS_NS16550_SERIAL
-# if defined(__MICROBLAZEEL__)
-# define CONFIG_SYS_NS16550_REG_SIZE -4
-# else
-# define CONFIG_SYS_NS16550_REG_SIZE 4
-# endif
-# define CONFIG_CONS_INDEX 1
-# define CONFIG_SYS_NS16550_COM1 \
- ((XILINX_UART16550_BASEADDR & ~0xF) + 0x1000)
-# define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ
# define CONFIG_BAUDRATE 115200
-
/* The following table includes the supported baudrates */
# define CONFIG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
-# define CONSOLE_ARG "console=console=ttyS0,115200\0"
-#else
-# error Undefined uart
-#endif
/* setting reset address */
/*#define CONFIG_SYS_RESET_ADDRESS CONFIG_SYS_TEXT_BASE*/
-/* ethernet */
-#undef CONFIG_SYS_ENET
-#if defined(XILINX_EMACLITE_BASEADDR) || defined(CONFIG_OF_CONTROL)
-# define CONFIG_XILINX_EMACLITE 1
-# define CONFIG_SYS_ENET
-#endif
-#if defined(XILINX_LLTEMAC_BASEADDR)
-# define CONFIG_XILINX_LL_TEMAC 1
-# define CONFIG_SYS_ENET
-#endif
-#if defined(XILINX_AXIEMAC_BASEADDR)
-# define CONFIG_XILINX_AXIEMAC 1
-# define CONFIG_SYS_ENET
-#endif
-
-#undef ET_DEBUG
-
/* gpio */
#ifdef XILINX_GPIO_BASEADDR
# define CONFIG_XILINX_GPIO
# define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR
#endif
+#define CONFIG_BOARD_LATE_INIT
/* interrupt controller */
#ifdef XILINX_INTC_BASEADDR
#if defined(XILINX_WATCHDOG_BASEADDR) && defined(XILINX_WATCHDOG_IRQ)
# define CONFIG_WATCHDOG_BASEADDR XILINX_WATCHDOG_BASEADDR
# define CONFIG_WATCHDOG_IRQ XILINX_WATCHDOG_IRQ
-# define CONFIG_HW_WATCHDOG
-# define CONFIG_XILINX_TB_WATCHDOG
+# ifndef CONFIG_SPL_BUILD
+# define CONFIG_HW_WATCHDOG
+# define CONFIG_XILINX_TB_WATCHDOG
+# endif
#endif
-/*
- * memory layout - Example
- * CONFIG_SYS_TEXT_BASE = 0x1200_0000; defined in config.mk
- * CONFIG_SYS_SRAM_BASE = 0x1000_0000;
- * CONFIG_SYS_SRAM_SIZE = 0x0400_0000; 64MB
- *
- * CONFIG_SYS_MONITOR_LEN = 0x40000
- * CONFIG_SYS_MALLOC_LEN = 3 * CONFIG_SYS_MONITOR_LEN = 0xC0000
- *
- * CONFIG_SYS_GBL_DATA_OFFSET = 0x1000_0000 + 0x0400_0000 - 0x1000 = 0x13FF_F000
- * CONFIG_SYS_MONITOR_BASE = 0x13FF_F000 - CONFIG_SYS_MONITOR_LEN = 0x13FB_F000
- * CONFIG_SYS_MALLOC_BASE = 0x13FB_F000 - CONFIG_SYS_MALLOC_LEN = 0x13EF_F000
- *
- * 0x1000_0000 CONFIG_SYS_SDRAM_BASE
- * MEMTEST_AREA 64kB
- * FREE
- * 0x1200_0000 CONFIG_SYS_TEXT_BASE
- * U-BOOT code
- * 0x1202_0000
- * FREE
- *
- * STACK
- * 0x13EF_F000 CONFIG_SYS_MALLOC_BASE
- * MALLOC_AREA 768kB Alloc
- * 0x13FB_F000 CONFIG_SYS_MONITOR_BASE
- * MONITOR_CODE 256kB Env
- * 0x13FF_F000 CONFIG_SYS_GBL_DATA_OFFSET
- * GLOBAL_DATA 4kB bd, gd
- * 0x1400_0000 CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE
- */
+#define CONFIG_SYS_MALLOC_LEN 0xC0000
-/* ddr sdram - main memory */
-#define CONFIG_SYS_SDRAM_BASE XILINX_RAM_START
-#define CONFIG_SYS_SDRAM_SIZE XILINX_RAM_SIZE
-#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000)
-
-/* global pointer */
-/* start of global data */
-#define CONFIG_SYS_GBL_DATA_OFFSET \
- (CONFIG_SYS_SDRAM_SIZE - GENERATED_GBL_DATA_SIZE)
-
-/* monitor code */
-#define SIZE 0x40000
-#define CONFIG_SYS_MONITOR_LEN SIZE
-#define CONFIG_SYS_MONITOR_BASE \
- (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_GBL_DATA_OFFSET \
- - CONFIG_SYS_MONITOR_LEN - GENERATED_BD_INFO_SIZE)
-#define CONFIG_SYS_MONITOR_END \
- (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
-#define CONFIG_SYS_MALLOC_LEN (SIZE * 3)
-#define CONFIG_SYS_MALLOC_BASE \
- (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN)
-
-/* stack */
-#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_MALLOC_BASE
+/* Stack location before relocation */
+#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_TEXT_BASE - \
+ CONFIG_SYS_MALLOC_F_LEN)
/*
* CFI flash memory layout - Example
#ifdef SPIFLASH
# define CONFIG_SYS_NO_FLASH 1
# define CONFIG_SYS_SPI_BASE XILINX_SPI_FLASH_BASEADDR
-# define CONFIG_XILINX_SPI 1
# define CONFIG_SPI 1
-# define CONFIG_SPI_FLASH 1
-# define CONFIG_SPI_FLASH_STMICRO 1
# define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
# define CONFIG_SF_DEFAULT_SPEED XILINX_SPI_FLASH_MAX_FREQ
# define CONFIG_SF_DEFAULT_CS XILINX_SPI_FLASH_CS
#endif /* !SPIFLASH */
#endif /* !FLASH */
-/* system ace */
-#ifdef XILINX_SYSACE_BASEADDR
-# define CONFIG_SYSTEMACE
-/* #define DEBUG_SYSTEMACE */
-# define SYSTEMACE_CONFIG_FPGA
-# define CONFIG_SYS_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR
-# define CONFIG_SYS_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH
-# define CONFIG_DOS_PARTITION
-#endif
-
#if defined(XILINX_USE_ICACHE)
# define CONFIG_ICACHE
#else
/*
* Command line configuration.
*/
-#include <config_cmd_default.h>
-
#define CONFIG_CMD_ASKENV
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_MFSL
-#define CONFIG_CMD_ECHO
-#define CONFIG_CMD_GPIO
#if defined(CONFIG_DCACHE) || defined(CONFIG_ICACHE)
# define CONFIG_CMD_CACHE
# undef CONFIG_CMD_CACHE
#endif
-#ifndef CONFIG_SYS_ENET
-# undef CONFIG_CMD_NET
-# undef CONFIG_CMD_NFS
-#else
-# define CONFIG_CMD_PING
-# define CONFIG_CMD_DHCP
-# define CONFIG_CMD_TFTPPUT
-#endif
-
-#if defined(CONFIG_SYSTEMACE)
-# define CONFIG_CMD_EXT2
-# define CONFIG_CMD_FAT
-#endif
-
#if defined(FLASH)
-# define CONFIG_CMD_ECHO
-# define CONFIG_CMD_FLASH
-# define CONFIG_CMD_IMLS
# define CONFIG_CMD_JFFS2
# define CONFIG_CMD_UBI
# undef CONFIG_CMD_UBIFS
# if !defined(RAMENV)
-# define CONFIG_CMD_SAVEENV
# define CONFIG_CMD_SAVES
# endif
# define CONFIG_CMD_SF
# if !defined(RAMENV)
-# define CONFIG_CMD_SAVEENV
# define CONFIG_CMD_SAVES
# endif
#else
-# undef CONFIG_CMD_IMLS
-# undef CONFIG_CMD_FLASH
# undef CONFIG_CMD_JFFS2
# undef CONFIG_CMD_UBI
# undef CONFIG_CMD_UBIFS
"1m(cramfs),-(jffs2)"
#endif
-/* Miscellaneous configurable options */
-#define CONFIG_SYS_PROMPT "U-Boot-mONStR> "
/* size of console buffer */
#define CONFIG_SYS_CBSIZE 512
/* print buffer size */
#define CONFIG_SYS_MAXARGS 15
#define CONFIG_SYS_LONGHELP
/* default load address */
-#define CONFIG_SYS_LOAD_ADDR XILINX_RAM_START
+#define CONFIG_SYS_LOAD_ADDR 0
#define CONFIG_BOOTDELAY -1 /* -1 disables auto-boot */
#define CONFIG_BOOTARGS "root=romfs"
#define CONFIG_IPADDR 192.168.0.3
#define CONFIG_SERVERIP 192.168.0.5
#define CONFIG_GATEWAYIP 192.168.0.1
-#define CONFIG_ETHADDR 00:E0:0C:00:00:FD
/* architecture dependent code */
#define CONFIG_SYS_USR_EXCEP /* user exception */
#define CONFIG_CMDLINE_EDITING
-#define CONFIG_NETCONSOLE
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
-/* Use the HUSH parser */
-#define CONFIG_SYS_HUSH_PARSER
-
/* Enable flat device tree support */
#define CONFIG_LMB 1
#define CONFIG_FIT 1
-#define CONFIG_OF_LIBFDT 1
-#if defined(CONFIG_XILINX_LL_TEMAC) || defined(CONFIG_XILINX_AXIEMAC)
+#if defined(CONFIG_XILINX_AXIEMAC)
# define CONFIG_MII 1
# define CONFIG_CMD_MII 1
# define CONFIG_PHY_GIGE 1
# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1
-# define CONFIG_PHYLIB 1
# define CONFIG_PHY_ATHEROS 1
# define CONFIG_PHY_BROADCOM 1
# define CONFIG_PHY_DAVICOM 1
# define CONFIG_PHY_LXT 1
# define CONFIG_PHY_MARVELL 1
# define CONFIG_PHY_MICREL 1
+# define CONFIG_PHY_MICREL_KSZ9021
# define CONFIG_PHY_NATSEMI 1
# define CONFIG_PHY_REALTEK 1
# define CONFIG_PHY_VITESSE 1
#else
# undef CONFIG_MII
# undef CONFIG_CMD_MII
-# undef CONFIG_PHYLIB
#endif
/* SPL part */
-#define CONFIG_SPL
#define CONFIG_CMD_SPL
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LDSCRIPT "arch/microblaze/cpu/u-boot-spl.lds"
#define CONFIG_SPL_RAM_DEVICE
-#define CONFIG_SPL_NOR_SUPPORT
+#ifdef CONFIG_SYS_FLASH_BASE
+# define CONFIG_SPL_NOR_SUPPORT
+# define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_FLASH_BASE
+#endif
/* for booting directly linux */
#define CONFIG_SPL_OS_BOOT
/* BRAM start */
#define CONFIG_SYS_INIT_RAM_ADDR 0x0
/* BRAM size - will be generated */
-#define CONFIG_SYS_INIT_RAM_SIZE 0x10000
-/* Stack pointer prior relocation, must situated at on-chip RAM */
-#define CONFIG_SYS_SPL_MALLOC_END (CONFIG_SYS_INIT_RAM_ADDR + \
- CONFIG_SYS_INIT_RAM_SIZE - \
- GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE 0x100000
-#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100
-
-/*
- * The main reason to do it in this way is that MALLOC_START
- * can't be defined - common/spl/spl.c
- */
-#if (CONFIG_SYS_SPL_MALLOC_SIZE != 0)
-# define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_SPL_MALLOC_END - \
- CONFIG_SYS_SPL_MALLOC_SIZE)
-# define CONFIG_SPL_STACK_ADDR CONFIG_SYS_SPL_MALLOC_START
-#else
-# define CONFIG_SPL_STACK_ADDR CONFIG_SYS_SPL_MALLOC_END
-#endif
+# define CONFIG_SPL_STACK_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
+ CONFIG_SYS_INIT_RAM_SIZE - \
+ CONFIG_SYS_MALLOC_F_LEN)
/* Just for sure that there is a space for stack */
#define CONFIG_SPL_STACK_SIZE 0x100
-#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
#define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_INIT_RAM_SIZE - \
CONFIG_SYS_INIT_RAM_ADDR - \
- GENERATED_GBL_DATA_SIZE - \
- CONFIG_SYS_SPL_MALLOC_SIZE - \
+ CONFIG_SYS_MALLOC_F_LEN - \
CONFIG_SPL_STACK_SIZE)
#endif /* __CONFIG_H */
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