Convert CONFIG_BOOTP_BOOTPATH et al to Kconfig

[people/ms/u-boot.git] / include / configs / t4qds.h

diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h
index ca6d285d3bd228b7a9040df0792b13503cae0525..0e735bee17a718366e16cf0b20f3fa3ffee1efe3 100644 (file)
--- a/include/configs/t4qds.h
+++ b/include/configs/t4qds.h
@@ -10,31 +10,19 @@
 #ifndef __T4QDS_H
 #define __T4QDS_H
 
-#define CONFIG_DISPLAY_BOARDINFO
-#define CONFIG_CMD_REGINFO
-
 /* High Level Configuration Options */
-#define CONFIG_BOOKE
-#define CONFIG_E500                    /* BOOKE e500 family */
-#define CONFIG_E500MC                  /* BOOKE e500mc family */
 #define CONFIG_SYS_BOOK3E_HV           /* Category E.HV supported */
 #define CONFIG_MP                      /* support multiple processors */
 
-#ifndef CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_TEXT_BASE   0xeff40000
-#endif
-
 #ifndef CONFIG_RESET_VECTOR_ADDRESS
 #define CONFIG_RESET_VECTOR_ADDRESS    0xeffffffc
 #endif
 
 #define CONFIG_SYS_FSL_CPC             /* Corenet Platform Cache */
-#define CONFIG_SYS_NUM_CPC             CONFIG_NUM_DDR_CONTROLLERS
-#define CONFIG_FSL_IFC                 /* Enable IFC Support */
-#define CONFIG_PCI                     /* Enable PCI/PCIE */
-#define CONFIG_PCIE1                   /* PCIE controler 1 */
-#define CONFIG_PCIE2                   /* PCIE controler 2 */
-#define CONFIG_PCIE3                   /* PCIE controler 3 */
+#define CONFIG_SYS_NUM_CPC             CONFIG_SYS_NUM_DDR_CTLRS
+#define CONFIG_PCIE1                   /* PCIE controller 1 */
+#define CONFIG_PCIE2                   /* PCIE controller 2 */
+#define CONFIG_PCIE3                   /* PCIE controller 3 */
 #define CONFIG_FSL_PCI_INIT            /* Use common FSL init code */
 #define CONFIG_SYS_PCI_64BIT           /* enable 64-bit PCI resources */
 
@@ -42,8 +30,6 @@
 #define CONFIG_SRIO1                   /* SRIO port 1 */
 #define CONFIG_SRIO2                   /* SRIO port 2 */
 
-#define CONFIG_FSL_LAW                 /* Use common FSL init code */
-
 #define CONFIG_ENV_OVERWRITE
 
 /*
@@ -64,7 +50,6 @@
 #define CONFIG_SYS_MEMTEST_START       0x00200000      /* memtest works on */
 #define CONFIG_SYS_MEMTEST_END         0x00400000
 #define CONFIG_SYS_ALT_MEMTEST
-#define CONFIG_PANIC_HANG      /* do not reset board on panic */
 
 /*
  *  Config the L3 Cache as L3 SRAM
@@ -90,14 +75,11 @@
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x00000000
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 
-/* CONFIG_NUM_DDR_CONTROLLERS is defined in include/asm/config_mpc85xx.h */
 #define CONFIG_DIMM_SLOTS_PER_CTLR     2
 #define CONFIG_CHIP_SELECTS_PER_CTRL   4
 #define CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
 
 #define CONFIG_DDR_SPD
-#define CONFIG_SYS_FSL_DDR3
-
 
 /*
  * IFC Definitions
@@ -105,7 +87,6 @@
 #define CONFIG_SYS_FLASH_BASE  0xe0000000
 #define CONFIG_SYS_FLASH_BASE_PHYS     (0xf00000000ull | CONFIG_SYS_FLASH_BASE)
 
-
 #ifdef CONFIG_SPL_BUILD
 #define CONFIG_SYS_MONITOR_BASE        CONFIG_SPL_TEXT_BASE
 #else
@@ -153,10 +134,6 @@
 #define CONFIG_SYS_NS16550_COM3        (CONFIG_SYS_CCSRBAR+0x11D500)
 #define CONFIG_SYS_NS16550_COM4        (CONFIG_SYS_CCSRBAR+0x11D600)
 
-/* Use the HUSH parser */
-#define CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
-
 /* I2C */
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_FSL
@@ -221,17 +198,12 @@
 
 #ifdef CONFIG_PCI
 #define CONFIG_PCI_INDIRECT_BRIDGE
-#define CONFIG_PCI_PNP                 /* do pci plug-and-play */
 
 #define CONFIG_PCI_SCAN_SHOW           /* show pci devices on startup */
-#define CONFIG_DOS_PARTITION
 #endif /* CONFIG_PCI */
 
 /* SATA */
 #ifdef CONFIG_FSL_SATA_V2
-#define CONFIG_LIBATA
-#define CONFIG_FSL_SATA
-
 #define CONFIG_SYS_SATA_MAX_DEVICE     2
 #define CONFIG_SATA1
 #define CONFIG_SYS_SATA1               CONFIG_SYS_MPC85xx_SATA1_ADDR
@@ -241,15 +213,11 @@
 #define CONFIG_SYS_SATA2_FLAGS         FLAGS_DMA
 
 #define CONFIG_LBA48
-#define CONFIG_CMD_SATA
-#define CONFIG_DOS_PARTITION
-#define CONFIG_CMD_EXT2
 #endif
 
 #ifdef CONFIG_FMAN_ENET
 #define CONFIG_MII             /* MII PHY management */
 #define CONFIG_ETHPRIME                "FM1@DTSEC1"
-#define CONFIG_PHY_GIGE                /* Include GbE speed/duplex detection */
 #endif
 
 /*
@@ -261,33 +229,11 @@
 /*
  * Command line configuration.
  */
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_ERRATA
-#define CONFIG_CMD_GREPENV
-#define CONFIG_CMD_IRQ
-#define CONFIG_CMD_I2C
-#define CONFIG_CMD_MII
-#define CONFIG_CMD_PING
-
-#ifdef CONFIG_PCI
-#define CONFIG_CMD_PCI
-#endif
 
 /*
  * Miscellaneous configurable options
  */
-#define CONFIG_SYS_LONGHELP                    /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING                 /* Command-line editing */
-#define CONFIG_AUTO_COMPLETE                   /* add autocompletion support */
 #define CONFIG_SYS_LOAD_ADDR   0x2000000       /* default load address */
-#ifdef CONFIG_CMD_KGDB
-#define CONFIG_SYS_CBSIZE      1024            /* Console I/O Buffer Size */
-#else
-#define CONFIG_SYS_CBSIZE      256             /* Console I/O Buffer Size */
-#endif
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
-#define CONFIG_SYS_MAXARGS     16              /* max number of command args */
-#define CONFIG_SYS_BARGSIZE    CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */
 
 /*
  * For booting Linux, the board info and command line data
@@ -311,9 +257,6 @@
 /* default location for tftp and bootm */
 #define CONFIG_LOADADDR                1000000
 
-
-#define CONFIG_BAUDRATE        115200
-
 #define CONFIG_HVBOOT                          \
  "setenv bootargs config-addr=0x60000000; "    \
  "bootm 0x01000000 - 0x00f00000"