Move CONFIG_OF_LIBFDT to Kconfig

[people/ms/u-boot.git] / include / configs / vf610twr.h

diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h
index 034255041226079f5078e6f2d16d6f502c08eab0..0809fbb1a7c6a8e462c7f071b6098bc3cc4fd940 100644 (file)
--- a/include/configs/vf610twr.h
+++ b/include/configs/vf610twr.h
@@ -9,13 +9,15 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#define CONFIG_SYS_CACHELINE_SIZE      32
+
 #include <asm/arch/imx-regs.h>
-#include <config_cmd_default.h>
 
 #define CONFIG_VF610
 
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO
+#define CONFIG_SYS_FSL_CLK
 
 #define CONFIG_MACH_TYPE               4146
 
@@ -34,15 +36,39 @@
 
 #define CONFIG_BOARD_EARLY_INIT_F
 
-#define CONFIG_FSL_LPUART
-#define LPUART_BASE                    UART1_BASE
-
 /* Allow to overwrite serial and ethaddr */
 #define CONFIG_ENV_OVERWRITE
-#define CONFIG_SYS_UART_PORT           (1)
 #define CONFIG_BAUDRATE                        115200
 
-#undef CONFIG_CMD_IMLS
+/* NAND support */
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_NAND_TRIMFFS
+#define CONFIG_SYS_NAND_ONFI_DETECTION
+
+#ifdef CONFIG_CMD_NAND
+#define CONFIG_USE_ARCH_MEMCPY
+#define CONFIG_SYS_MAX_NAND_DEVICE     1
+#define CONFIG_SYS_NAND_BASE           NFC_BASE_ADDR
+
+/* UBI */
+#define CONFIG_CMD_UBI
+#define CONFIG_CMD_UBIFS
+#define CONFIG_RBTREE
+#define CONFIG_LZO
+
+/* Dynamic MTD partition support */
+#define CONFIG_CMD_MTDPARTS
+#define CONFIG_MTD_PARTITIONS
+#define CONFIG_MTD_DEVICE
+#define MTDIDS_DEFAULT                 "nand0=fsl_nfc"
+#define MTDPARTS_DEFAULT               "mtdparts=fsl_nfc:"             \
+                                       "128k(vf-bcb)ro,"               \
+                                       "1408k(u-boot)ro,"              \
+                                       "512k(u-boot-env),"             \
+                                       "4m(kernel),"                   \
+                                       "512k(fdt),"            \
+                                       "-(rootfs)"
+#endif
 
 #define CONFIG_MMC
 #define CONFIG_FSL_ESDHC
@@ -59,7 +85,6 @@
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_DHCP
 #define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
 #define CONFIG_FEC_MXC
 #define CONFIG_MII
 #define IMX_FEC_BASE                   ENET_BASE_ADDR
@@ -69,12 +94,9 @@
 #define CONFIG_PHY_MICREL
 
 /* QSPI Configs*/
-#define CONFIG_FSL_QSPI
 
 #ifdef CONFIG_FSL_QSPI
 #define CONFIG_CMD_SF
-#define CONFIG_SPI_FLASH
-#define CONFIG_SPI_FLASH_SPANSION
 #define FSL_QSPI_FLASH_SIZE            (1 << 24)
 #define FSL_QSPI_FLASH_NUM             2
 #define CONFIG_SYS_FSL_QSPI_LE
@@ -84,21 +106,43 @@
 #define CONFIG_CMD_I2C
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1                /* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2                /* enable I2C bus 2 */
 #define CONFIG_SYS_SPD_BUS_NUM         0
 
 #define CONFIG_BOOTDELAY               3
 
-#define CONFIG_LOADADDR                        0x82000000
-#define CONFIG_SYS_TEXT_BASE           0x3f008000
+#define CONFIG_SYS_LOAD_ADDR           0x82000000
+
+/* We boot from the gfxRAM area of the OCRAM. */
+#define CONFIG_SYS_TEXT_BASE           0x3f408000
+#define CONFIG_BOARD_SIZE_LIMIT                524288
+
+/*
+ * We do have 128MB of memory on the Vybrid Tower board. Leave the last
+ * 16MB alone to avoid conflicts with Cortex-M4 firmwares running from
+ * DDR3. Hence, limit the memory range for image processing to 112MB
+ * using bootm_size. All of the following must be within this range.
+ * We have the default load at 32MB into DDR (for the kernel), FDT at
+ * 64MB and the ramdisk 512KB above that (allowing for hopefully never
+ * seen large trees). This allows a reasonable split between ramdisk
+ * and kernel size, where the ram disk can be a bit larger.
+ */
+#define MEM_LAYOUT_ENV_SETTINGS \
+       "bootm_size=0x07000000\0" \
+       "loadaddr=0x82000000\0" \
+       "kernel_addr_r=0x82000000\0" \
+       "fdt_addr=0x84000000\0" \
+       "fdt_addr_r=0x84000000\0" \
+       "rdaddr=0x84080000\0" \
+       "ramdisk_addr_r=0x84080000\0"
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
+       MEM_LAYOUT_ENV_SETTINGS \
        "script=boot.scr\0" \
        "image=zImage\0" \
        "console=ttyLP1\0" \
-       "fdt_high=0xffffffff\0" \
-       "initrd_high=0xffffffff\0" \
        "fdt_file=vf610-twr.dtb\0" \
-       "fdt_addr=0x81000000\0" \
        "boot_fdt=try\0" \
        "ip_dyn=yes\0" \
        "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
@@ -193,8 +237,6 @@
 #define CONFIG_SYS_MEMTEST_START       0x80010000
 #define CONFIG_SYS_MEMTEST_END         0x87C00000
 
-#define CONFIG_SYS_LOAD_ADDR           CONFIG_LOADADDR
-
 /*
  * Stack sizes
  * The stack sizes are set up in start.S using the settings below
@@ -218,13 +260,20 @@
 /* FLASH and environment organization */
 #define CONFIG_SYS_NO_FLASH
 
+#ifdef CONFIG_ENV_IS_IN_MMC
 #define CONFIG_ENV_SIZE                        (8 * 1024)
-#define CONFIG_ENV_IS_IN_MMC
 
 #define CONFIG_ENV_OFFSET              (12 * 64 * 1024)
 #define CONFIG_SYS_MMC_ENV_DEV         0
+#endif
+
+#ifdef CONFIG_ENV_IS_IN_NAND
+#define CONFIG_ENV_SIZE                        (64 * 2048)
+#define CONFIG_ENV_SECT_SIZE           (64 * 2048)
+#define CONFIG_ENV_RANGE               (512 * 1024)
+#define CONFIG_ENV_OFFSET              0x180000
+#endif
 
-#define CONFIG_OF_LIBFDT
 #define CONFIG_CMD_BOOTZ
 
 #endif