X-Git-Url: http://git.ipfire.org/?p=people%2Fms%2Fu-boot.git;a=blobdiff_plain;f=arch%2Fpowerpc%2Fcpu%2Fppc4xx%2Fsdram.c;h=c416bcebf6aa91d32685051bcc2531f3bdd11be5;hp=b827daf66f59549c7ab5d036130b936eec5b564c;hb=d4db3b86a5e090e21db710bedbbe3e50d4c56428;hpb=b36df561154bdd0a41bb77e09c5575ca2cf48013

diff --git a/arch/powerpc/cpu/ppc4xx/sdram.c b/arch/powerpc/cpu/ppc4xx/sdram.c
index b827daf66f..c416bcebf6 100644
--- a/arch/powerpc/cpu/ppc4xx/sdram.c
+++ b/arch/powerpc/cpu/ppc4xx/sdram.c
@@ -8,23 +8,7 @@
  * (C) Copyright 2002-2004
  * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <common.h>
@@ -33,6 +17,8 @@
 #include "sdram.h"
 #include "ecc.h"
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #ifdef CONFIG_SDRAM_BANK0
 
 #ifndef CONFIG_440
@@ -49,7 +35,7 @@ sdram_conf_t mb0cf[] = {
 sdram_conf_t mb0cf[] = CONFIG_SYS_SDRAM_TABLE;
 #endif
 
-#define N_MB0CF (sizeof(mb0cf) / sizeof(mb0cf[0]))
+#define N_MB0CF (ARRAY_SIZE(mb0cf))
 
 #ifdef CONFIG_SYS_SDRAM_CASL
 static ulong ns2clks(ulong ns)
@@ -164,7 +150,7 @@ static ulong compute_rtr(ulong speed, ulong rows, ulong refresh)
 /*
  * Autodetect onboard SDRAM on 405 platforms
  */
-phys_size_t initdram(int board_type)
+int dram_init(void)
 {
 	ulong speed;
 	ulong sdtr1;
@@ -242,11 +228,13 @@ phys_size_t initdram(int board_type)
 			/*
 			 * OK, size detected -> all done
 			 */
-			return size;
+			gd->ram_size = size;
+
+			return 0;
 		}
 	}
 
-	return 0;
+	return -ENXIO;
 }
 
 #else /* CONFIG_440 */
@@ -282,7 +270,7 @@ sdram_conf_t mb0cf[] = CONFIG_SYS_SDRAM_TABLE;
 #define CONFIG_SYS_SDRAM0_CFG0		0x82000000 /* DCEN=1, PMUD=0, 64-bit */
 #endif
 
-#define N_MB0CF (sizeof(mb0cf) / sizeof(mb0cf[0]))
+#define N_MB0CF (ARRAY_SIZE(mb0cf))
 
 #define NUM_TRIES 64
 #define NUM_READS 10
@@ -365,7 +353,7 @@ static void sdram_tr1_set(int ram_address, int* tr1_value)
  *	 so this should be extended for other future boards
  *	 using this routine!
  */
-phys_size_t initdram(int board_type)
+int dram_init(void)
 {
 	int i;
 	int tr1_bank1;
@@ -456,11 +444,13 @@ phys_size_t initdram(int board_type)
 			/*
 			 * OK, size detected -> all done
 			 */
-			return size;
+			gd->ram_size = size;
+
+			return 0;
 		}
 	}
 
-	return 0;				/* nothing found !		*/
+	return -ENXIO;			/* nothing found !		*/
 }
 
 #endif /* CONFIG_440 */