X-Git-Url: http://git.ipfire.org/?p=people%2Fms%2Fu-boot.git;a=blobdiff_plain;f=include%2Fconfigs%2Ftricorder.h;h=e4b3290268e77fbdbd3fc31b3e74eff9b5a06c38;hp=73f0d846ce936cc3506a6109a0e3959544716f9c;hb=e856bdcfb49291d30b19603fc101bea096c48196;hpb=adad96e60d0eb1bbc4d0b96c89decf385a426e42 diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h index 73f0d846ce..e4b3290268 100644 --- a/include/configs/tricorder.h +++ b/include/configs/tricorder.h @@ -16,12 +16,9 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_SYS_CACHELINE_SIZE 64 - /* High Level Configuration Options */ #define CONFIG_SYS_THUMB_BUILD #define CONFIG_OMAP /* in a TI OMAP core */ -#define CONFIG_OMAP_COMMON /* Common ARM Erratas */ #define CONFIG_ARM_ERRATA_454179 #define CONFIG_ARM_ERRATA_430973 @@ -41,14 +38,6 @@ #include /* get chip and board defs */ #include - -/* Display CPU and Board information */ -#define CONFIG_DISPLAY_CPUINFO -#define CONFIG_DISPLAY_BOARDINFO - -#define CONFIG_SILENT_CONSOLE -#define CONFIG_ZERO_BOOTDELAY_CHECK - /* Clock Defines */ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) @@ -72,18 +61,6 @@ #define CONFIG_OMAP3_GPIO_2 /* GPIO32..63 are in GPIO bank 2 */ /* LED support */ -#define CONFIG_STATUS_LED -#define CONFIG_BOARD_SPECIFIC_LED -#define CONFIG_CMD_LED /* LED command */ -#define STATUS_LED_BIT (1 << 0) -#define STATUS_LED_STATE STATUS_LED_ON -#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) -#define STATUS_LED_BIT1 (1 << 1) -#define STATUS_LED_STATE1 STATUS_LED_ON -#define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2) -#define STATUS_LED_BIT2 (1 << 2) -#define STATUS_LED_STATE2 STATUS_LED_ON -#define STATUS_LED_PERIOD2 (CONFIG_SYS_HZ / 2) /* NS16550 Configuration */ #define CONFIG_SYS_NS16550_SERIAL @@ -98,12 +75,6 @@ #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 115200} -/* MMC */ -#define CONFIG_GENERIC_MMC -#define CONFIG_MMC -#define CONFIG_OMAP_HSMMC -#define CONFIG_DOS_PARTITION - /* I2C */ #define CONFIG_SYS_I2C #define CONFIG_SYS_OMAP24_I2C_SPEED 100000 @@ -121,7 +92,6 @@ #define CONFIG_TWL4030_LED /* Board NAND Info */ -#define CONFIG_SYS_NO_FLASH /* no NOR flash */ #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ #define MTDIDS_DEFAULT "nand0=omap2-nand.0" #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:" \ @@ -147,14 +117,9 @@ #define CONFIG_SYS_NAND_MAX_ECCPOS 56 /* commands to include */ -#define CONFIG_CMD_EXT2 /* EXT2 Support */ -#define CONFIG_CMD_FAT /* FAT support */ -#define CONFIG_CMD_I2C /* I2C serial bus support */ -#define CONFIG_CMD_MMC /* MMC support */ #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ #define CONFIG_CMD_NAND /* NAND support */ #define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */ -#define CONFIG_CMD_UBI /* UBI commands */ #define CONFIG_CMD_UBIFS /* UBIFS commands */ #define CONFIG_LZO /* LZO is needed for UBIFS */ @@ -167,7 +132,6 @@ /* Environment information (this is the common part) */ -#define CONFIG_BOOTDELAY 0 /* hang() the board on panic() */ #define CONFIG_PANIC_HANG @@ -328,26 +292,16 @@ #define CONFIG_SPL_NAND_SIMPLE #define CONFIG_SPL_BOARD_INIT -#define CONFIG_SPL_GPIO_SUPPORT -#define CONFIG_SPL_LIBCOMMON_SUPPORT -#define CONFIG_SPL_LIBDISK_SUPPORT -#define CONFIG_SPL_I2C_SUPPORT -#define CONFIG_SPL_LIBGENERIC_SUPPORT -#define CONFIG_SPL_SERIAL_SUPPORT -#define CONFIG_SPL_POWER_SUPPORT -#define CONFIG_SPL_NAND_SUPPORT #define CONFIG_SPL_NAND_BASE #define CONFIG_SPL_NAND_DRIVERS #define CONFIG_SPL_NAND_ECC -#define CONFIG_SPL_MMC_SUPPORT -#define CONFIG_SPL_FAT_SUPPORT -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ -#define CONFIG_SPL_MAX_SIZE (57 * 1024) /* 7 KB for stack */ +#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ + CONFIG_SPL_TEXT_BASE) #define CONFIG_SPL_BSS_START_ADDR 0x80000000 /*CONFIG_SYS_SDRAM_BASE*/ #define CONFIG_SPL_BSS_MAX_SIZE 0x80000