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ARM: DRA72x: DDR3: Fix EMIF timings for 666MHz clock
authorAngela Stegmaier <angelabaker@ti.com>
Mon, 16 Feb 2015 04:45:55 +0000 (10:15 +0530)
committerTom Rini <trini@ti.com>
Mon, 16 Feb 2015 17:41:40 +0000 (12:41 -0500)
commitaa8ac43645243b69faf0e81fab5f0d6fcf4285cf
tree4375c1e8dc55b61a777dcbbdbb7e9939821e076ftree | snapshot
parent89831112d46fb19127f3de9cec781e5a9c28b281commit | diff
ARM: DRA72x: DDR3: Fix EMIF timings for 666MHz clock

DDR3 timing and latency paramenters were not configured
correctly for 666MHz. Fixing the timing and latency values
according to Data sheet.
This fixes the random crashes seen on DRA72-evm.

Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
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