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(parent: 9b911be) | patch
x86: bayleybay: Configure PCI IRQ
authorBin Meng <bmeng.cn@gmail.com>
Thu, 30 Jul 2015 10:49:18 +0000 (03:49 -0700)
committerSimon Glass <sjg@chromium.org>
Wed, 5 Aug 2015 14:42:39 +0000 (08:42 -0600)
commitfe3fbd302427b3690c4d682c1d7d03ca94771afd
treef39bd9aa82a8b1157bf6e1437b1b5cfac5d8e5c7tree | snapshot
parent9b911bed78c3926fe1129dcc6b0ffbca667dff74commit | diff
x86: bayleybay: Configure PCI IRQ

Add PCI IRQ routing information in the board device tree and enable
writing PIRQ routing table and MP table.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
arch/x86/cpu/baytrail/valleyview.c diff | blob | blame | history
arch/x86/dts/bayleybay.dts diff | blob | blame | history
configs/bayleybay_defconfig diff | blob | blame | history
include/configs/bayleybay.h diff | blob | blame | history
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