--- /dev/null
+NOP PHY driver
+
+This driver is used to stub PHY operations in a driver (USB, SATA).
+This is useful when the 'client' driver (USB, SATA, ...) uses the PHY framework
+and there is no actual PHY harwdare to drive.
+
+Required properties:
+- compatible : must contain "nop-phy"
+- #phy-cells : must contain <0>
+
+Example:
+
+nop_phy {
+ compatible = "nop-phy";
+ #phy-cells = <0>;
+};
OMAP_EHCI_PORT_MODE_HSIC,
};
-#ifdef CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS
-#define OMAP_HS_USB_PORTS CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS
-#else
#define OMAP_HS_USB_PORTS 3
-#endif
#define is_ehci_phy_mode(x) ((x) == OMAP_EHCI_PORT_MODE_PHY)
#define is_ehci_tll_mode(x) ((x) == OMAP_EHCI_PORT_MODE_TLL)
fsp,enable-spi;
fsp,enable-sata;
fsp,sata-mode = <SATA_MODE_AHCI>;
+#ifdef CONFIG_USB_XHCI_HCD
+ fsp,enable-xhci;
+#endif
fsp,lpe-mode = <LPE_MODE_PCI>;
fsp,lpss-sio-mode = <LPSS_SIO_MODE_PCI>;
fsp,enable-dma0;
static void usb_display_desc(struct usb_device *dev)
{
+ uint packet_size = dev->descriptor.bMaxPacketSize0;
+
if (dev->descriptor.bDescriptorType == USB_DT_DEVICE) {
printf("%d: %s, USB Revision %x.%x\n", dev->devnum,
usb_get_class_desc(dev->config.if_desc[0].desc.bInterfaceClass),
usb_get_class_desc(
dev->config.if_desc[0].desc.bInterfaceClass));
}
+ if (dev->descriptor.bcdUSB >= cpu_to_le16(0x0300))
+ packet_size = 1 << packet_size;
printf(" - PacketSize: %d Configurations: %d\n",
- dev->descriptor.bMaxPacketSize0,
- dev->descriptor.bNumConfigurations);
+ packet_size, dev->descriptor.bNumConfigurations);
printf(" - Vendor: 0x%04x Product 0x%04x Version %d.%d\n",
dev->descriptor.idVendor, dev->descriptor.idProduct,
(dev->descriptor.bcdDevice>>8) & 0xff,
struct list_head list;
};
-/* TODO(sjg@chromium.org): Remove this when CONFIG_DM_USB is defined */
-static struct usb_hub_device hub_dev[USB_MAX_HUB];
-static int usb_hub_index;
static LIST_HEAD(usb_scan_list);
__weak void usb_hub_reset_devices(int port)
return;
}
+static inline bool usb_hub_is_superspeed(struct usb_device *hdev)
+{
+ return hdev->descriptor.bDeviceProtocol == 3;
+}
+
+#ifdef CONFIG_DM_USB
+bool usb_hub_is_root_hub(struct udevice *hub)
+{
+ if (device_get_uclass_id(hub->parent) != UCLASS_USB_HUB)
+ return true;
+
+ return false;
+}
+
+static int usb_set_hub_depth(struct usb_device *dev, int depth)
+{
+ if (depth < 0 || depth > 4)
+ return -EINVAL;
+
+ return usb_control_msg(dev, usb_sndctrlpipe(dev, 0),
+ USB_REQ_SET_HUB_DEPTH, USB_DIR_OUT | USB_RT_HUB,
+ depth, 0, NULL, 0, USB_CNTL_TIMEOUT);
+}
+#endif
+
static int usb_get_hub_descriptor(struct usb_device *dev, void *data, int size)
{
+ unsigned short dtype = USB_DT_HUB;
+
+ if (usb_hub_is_superspeed(dev))
+ dtype = USB_DT_SS_HUB;
+
return usb_control_msg(dev, usb_rcvctrlpipe(dev, 0),
USB_REQ_GET_DESCRIPTOR, USB_DIR_IN | USB_RT_HUB,
- USB_DT_HUB << 8, 0, data, size, USB_CNTL_TIMEOUT);
+ dtype << 8, 0, data, size, USB_CNTL_TIMEOUT);
}
static int usb_clear_port_feature(struct usb_device *dev, int port, int feature)
int usb_get_port_status(struct usb_device *dev, int port, void *data)
{
- return usb_control_msg(dev, usb_rcvctrlpipe(dev, 0),
+ int ret;
+
+ ret = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0),
USB_REQ_GET_STATUS, USB_DIR_IN | USB_RT_PORT, 0, port,
- data, sizeof(struct usb_hub_status), USB_CNTL_TIMEOUT);
+ data, sizeof(struct usb_port_status), USB_CNTL_TIMEOUT);
+
+#ifdef CONFIG_DM_USB
+ if (ret < 0)
+ return ret;
+
+ /*
+ * Translate the USB 3.0 hub port status field into the old version
+ * that U-Boot understands. Do this only when the hub is not root hub.
+ * For root hub, the port status field has already been translated
+ * in the host controller driver (see xhci_submit_root() in xhci.c).
+ *
+ * Note: this only supports driver model.
+ */
+
+ if (!usb_hub_is_root_hub(dev->dev) && usb_hub_is_superspeed(dev)) {
+ struct usb_port_status *status = (struct usb_port_status *)data;
+ u16 tmp = (status->wPortStatus) & USB_SS_PORT_STAT_MASK;
+
+ if (status->wPortStatus & USB_SS_PORT_STAT_POWER)
+ tmp |= USB_PORT_STAT_POWER;
+ if ((status->wPortStatus & USB_SS_PORT_STAT_SPEED) ==
+ USB_SS_PORT_STAT_SPEED_5GBPS)
+ tmp |= USB_PORT_STAT_SUPER_SPEED;
+
+ status->wPortStatus = tmp;
+ }
+#endif
+
+ return ret;
}
max(100, (int)pgood_delay) + 1000);
}
+#ifndef CONFIG_DM_USB
+static struct usb_hub_device hub_dev[USB_MAX_HUB];
+static int usb_hub_index;
+
void usb_hub_reset(void)
{
usb_hub_index = 0;
printf("ERROR: USB_MAX_HUB (%d) reached\n", USB_MAX_HUB);
return NULL;
}
+#endif
#define MAX_TRIES 5
return speed_str;
}
-int legacy_hub_port_reset(struct usb_device *dev, int port,
- unsigned short *portstat)
+/**
+ * usb_hub_port_reset() - reset a port given its usb_device pointer
+ *
+ * Reset a hub port and see if a device is present on that port, providing
+ * sufficient time for it to show itself. The port status is returned.
+ *
+ * @dev: USB device to reset
+ * @port: Port number to reset (note ports are numbered from 0 here)
+ * @portstat: Returns port status
+ */
+static int usb_hub_port_reset(struct usb_device *dev, int port,
+ unsigned short *portstat)
{
int err, tries;
ALLOC_CACHE_ALIGN_BUFFER(struct usb_port_status, portsts, 1);
return 0;
}
-#ifdef CONFIG_DM_USB
-int hub_port_reset(struct udevice *dev, int port, unsigned short *portstat)
-{
- struct usb_device *udev = dev_get_parent_priv(dev);
-
- return legacy_hub_port_reset(udev, port, portstat);
-}
-#endif
-
int usb_hub_port_connect_change(struct usb_device *dev, int port)
{
ALLOC_CACHE_ALIGN_BUFFER(struct usb_port_status, portsts, 1);
}
/* Reset the port */
- ret = legacy_hub_port_reset(dev, port, &portstatus);
+ ret = usb_hub_port_reset(dev, port, &portstatus);
if (ret < 0) {
if (ret != -ENXIO)
printf("cannot reset port %i!?\n", port + 1);
portchange = le16_to_cpu(portsts->wPortChange);
debug("Port %d Status %X Change %X\n", i + 1, portstatus, portchange);
- /* No connection change happened, wait a bit more. */
- if (!(portchange & USB_PORT_STAT_C_CONNECTION)) {
+ /*
+ * No connection change happened, wait a bit more.
+ *
+ * For some situation, the hub reports no connection change but a
+ * device is connected to the port (eg: CCS bit is set but CSC is not
+ * in the PORTSC register of a root hub), ignore such case.
+ */
+ if (!(portchange & USB_PORT_STAT_C_CONNECTION) &&
+ !(portstatus & USB_PORT_STAT_CONNECTION)) {
if (get_timer(0) >= hub->connect_timeout) {
debug("devnum=%d port=%d: timeout\n",
dev->devnum, i + 1);
return 0;
}
- /* Test if the connection came up, and if not exit */
- if (!(portstatus & USB_PORT_STAT_CONNECTION))
- return 0;
-
/* A new USB device is ready at this point */
debug("devnum=%d port=%d: USB dev found\n", dev->devnum, i + 1);
return ret;
}
+static struct usb_hub_device *usb_get_hub_device(struct usb_device *dev)
+{
+ struct usb_hub_device *hub;
+
+#ifndef CONFIG_DM_USB
+ /* "allocate" Hub device */
+ hub = usb_hub_allocate();
+#else
+ hub = dev_get_uclass_priv(dev->dev);
+#endif
+
+ return hub;
+}
+
static int usb_hub_configure(struct usb_device *dev)
{
int i, length;
__maybe_unused struct usb_hub_status *hubsts;
int ret;
- /* "allocate" Hub device */
- hub = usb_hub_allocate();
+ hub = usb_get_hub_device(dev);
if (hub == NULL)
return -ENOMEM;
hub->pusb_dev = dev;
+
/* Get the the hub descriptor */
ret = usb_get_hub_descriptor(dev, buffer, 4);
if (ret < 0) {
&descriptor->wHubCharacteristics)),
&hub->desc.wHubCharacteristics);
/* set the bitmap */
- bitmap = (unsigned char *)&hub->desc.DeviceRemovable[0];
+ bitmap = (unsigned char *)&hub->desc.u.hs.DeviceRemovable[0];
/* devices not removable by default */
memset(bitmap, 0xff, (USB_MAXCHILDREN+1+7)/8);
- bitmap = (unsigned char *)&hub->desc.PortPowerCtrlMask[0];
+ bitmap = (unsigned char *)&hub->desc.u.hs.PortPowerCtrlMask[0];
memset(bitmap, 0xff, (USB_MAXCHILDREN+1+7)/8); /* PowerMask = 1B */
for (i = 0; i < ((hub->desc.bNbrPorts + 1 + 7)/8); i++)
- hub->desc.DeviceRemovable[i] = descriptor->DeviceRemovable[i];
+ hub->desc.u.hs.DeviceRemovable[i] =
+ descriptor->u.hs.DeviceRemovable[i];
for (i = 0; i < ((hub->desc.bNbrPorts + 1 + 7)/8); i++)
- hub->desc.PortPowerCtrlMask[i] = descriptor->PortPowerCtrlMask[i];
+ hub->desc.u.hs.PortPowerCtrlMask[i] =
+ descriptor->u.hs.PortPowerCtrlMask[i];
dev->maxchild = descriptor->bNbrPorts;
debug("%d ports detected\n", dev->maxchild);
break;
}
+ switch (dev->descriptor.bDeviceProtocol) {
+ case USB_HUB_PR_FS:
+ break;
+ case USB_HUB_PR_HS_SINGLE_TT:
+ debug("Single TT\n");
+ break;
+ case USB_HUB_PR_HS_MULTI_TT:
+ ret = usb_set_interface(dev, 0, 1);
+ if (ret == 0) {
+ debug("TT per port\n");
+ hub->tt.multi = true;
+ } else {
+ debug("Using single TT (err %d)\n", ret);
+ }
+ break;
+ case USB_HUB_PR_SS:
+ /* USB 3.0 hubs don't have a TT */
+ break;
+ default:
+ debug("Unrecognized hub protocol %d\n",
+ dev->descriptor.bDeviceProtocol);
+ break;
+ }
+
+ /* Note 8 FS bit times == (8 bits / 12000000 bps) ~= 666ns */
+ switch (hubCharacteristics & HUB_CHAR_TTTT) {
+ case HUB_TTTT_8_BITS:
+ if (dev->descriptor.bDeviceProtocol != 0) {
+ hub->tt.think_time = 666;
+ debug("TT requires at most %d FS bit times (%d ns)\n",
+ 8, hub->tt.think_time);
+ }
+ break;
+ case HUB_TTTT_16_BITS:
+ hub->tt.think_time = 666 * 2;
+ debug("TT requires at most %d FS bit times (%d ns)\n",
+ 16, hub->tt.think_time);
+ break;
+ case HUB_TTTT_24_BITS:
+ hub->tt.think_time = 666 * 3;
+ debug("TT requires at most %d FS bit times (%d ns)\n",
+ 24, hub->tt.think_time);
+ break;
+ case HUB_TTTT_32_BITS:
+ hub->tt.think_time = 666 * 4;
+ debug("TT requires at most %d FS bit times (%d ns)\n",
+ 32, hub->tt.think_time);
+ break;
+ }
+
debug("power on to power good time: %dms\n",
descriptor->bPwrOn2PwrGood * 2);
debug("hub controller current requirement: %dmA\n",
for (i = 0; i < dev->maxchild; i++)
debug("port %d is%s removable\n", i + 1,
- hub->desc.DeviceRemovable[(i + 1) / 8] & \
+ hub->desc.u.hs.DeviceRemovable[(i + 1) / 8] & \
(1 << ((i + 1) % 8)) ? " not" : "");
if (sizeof(struct usb_hub_status) > USB_BUFSIZ) {
debug("%sover-current condition exists\n",
(le16_to_cpu(hubsts->wHubStatus) & HUB_STATUS_OVERCURRENT) ? \
"" : "no ");
+
+#ifdef CONFIG_DM_USB
+ /*
+ * Update USB host controller's internal representation of this hub
+ * after the hub descriptor is fetched.
+ */
+ ret = usb_update_hub_device(dev);
+ if (ret < 0 && ret != -ENOSYS) {
+ debug("%s: failed to update hub device for HCD (%x)\n",
+ __func__, ret);
+ return ret;
+ }
+
+ /*
+ * A maximum of seven tiers are allowed in a USB topology, and the
+ * root hub occupies the first tier. The last tier ends with a normal
+ * USB device. USB 3.0 hubs use a 20-bit field called 'route string'
+ * to route packets to the designated downstream port. The hub uses a
+ * hub depth value multiplied by four as an offset into the 'route
+ * string' to locate the bits it uses to determine the downstream
+ * port number.
+ */
+ if (usb_hub_is_root_hub(dev->dev)) {
+ hub->hub_depth = -1;
+ } else {
+ struct udevice *hdev;
+ int depth = 0;
+
+ hdev = dev->dev->parent;
+ while (!usb_hub_is_root_hub(hdev)) {
+ depth++;
+ hdev = hdev->parent;
+ }
+
+ hub->hub_depth = depth;
+
+ if (usb_hub_is_superspeed(dev)) {
+ debug("set hub (%p) depth to %d\n", dev, depth);
+ /*
+ * This request sets the value that the hub uses to
+ * determine the index into the 'route string index'
+ * for this hub.
+ */
+ ret = usb_set_hub_depth(dev, depth);
+ if (ret < 0) {
+ debug("%s: failed to set hub depth (%lX)\n",
+ __func__, dev->status);
+ return ret;
+ }
+ }
+ }
+#endif
+
usb_hub_power_on(hub);
/*
.child_pre_probe = usb_child_pre_probe,
.per_child_auto_alloc_size = sizeof(struct usb_device),
.per_child_platdata_auto_alloc_size = sizeof(struct usb_dev_platdata),
+ .per_device_auto_alloc_size = sizeof(struct usb_hub_device),
};
static const struct usb_device_id hub_id_table[] = {
CONFIG_TIMER=y
CONFIG_USB=y
CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
CONFIG_DM_VIDEO=y
debug("%s(dev=%p, index=%d, clk=%p)\n", __func__, dev, index, clk);
assert(clk);
+ clk->dev = NULL;
+
ret = dev_read_phandle_with_args(dev, "clocks", "#clock-cells", 0,
index, &args);
if (ret) {
int index;
debug("%s(dev=%p, name=%s, clk=%p)\n", __func__, dev, name, clk);
+ clk->dev = NULL;
index = dev_read_stringlist_search(dev, "clock-names", name);
if (index < 0) {
return clk_get_by_index(dev, index, clk);
}
+
+int clk_release_all(struct clk *clk, int count)
+{
+ int i, ret;
+
+ for (i = 0; i < count; i++) {
+ debug("%s(clk[%d]=%p)\n", __func__, i, &clk[i]);
+
+ /* check if clock has been previously requested */
+ if (!clk[i].dev)
+ continue;
+
+ ret = clk_disable(&clk[i]);
+ if (ret && ret != -ENOSYS)
+ return ret;
+
+ ret = clk_free(&clk[i]);
+ if (ret && ret != -ENOSYS)
+ return ret;
+ }
+
+ return 0;
+}
+
#endif /* OF_CONTROL */
int clk_request(struct udevice *dev, struct clk *clk)
index, out_args);
}
+int of_count_phandle_with_args(const struct device_node *np,
+ const char *list_name, const char *cells_name)
+{
+ return __of_parse_phandle_with_args(np, list_name, cells_name, 0,
+ -1, NULL);
+}
+
static void of_alias_add(struct alias_prop *ap, struct device_node *np,
int id, const char *stem, int stem_len)
{
return 0;
}
+int ofnode_count_phandle_with_args(ofnode node, const char *list_name,
+ const char *cells_name)
+{
+ if (ofnode_is_np(node))
+ return of_count_phandle_with_args(ofnode_to_np(node),
+ list_name, cells_name);
+ else
+ return fdtdec_parse_phandle_with_args(gd->fdt_blob,
+ ofnode_to_offset(node), list_name, cells_name,
+ 0, -1, NULL);
+}
+
ofnode ofnode_path(const char *path)
{
if (of_live_active())
return ret;
}
-void dfu_write_transaction_cleanup(struct dfu_entity *dfu)
+void dfu_transaction_cleanup(struct dfu_entity *dfu)
{
/* clear everything */
dfu->crc = 0;
dfu->offset = 0;
dfu->i_blk_seq_num = 0;
- dfu->i_buf_start = dfu_buf;
- dfu->i_buf_end = dfu_buf;
+ dfu->i_buf_start = dfu_get_buf(dfu);
+ dfu->i_buf_end = dfu->i_buf_start;
dfu->i_buf = dfu->i_buf_start;
+ dfu->r_left = 0;
+ dfu->b_left = 0;
+ dfu->bad_skip = 0;
+
dfu->inited = 0;
}
+int dfu_transaction_initiate(struct dfu_entity *dfu, bool read)
+{
+ int ret = 0;
+
+ if (dfu->inited)
+ return 0;
+
+ dfu_transaction_cleanup(dfu);
+
+ if (dfu->i_buf_start == NULL)
+ return -ENOMEM;
+
+ dfu->i_buf_end = dfu->i_buf_start + dfu_get_buf_size();
+
+ if (read) {
+ ret = dfu->get_medium_size(dfu, &dfu->r_left);
+ if (ret < 0)
+ return ret;
+ debug("%s: %s %lld [B]\n", __func__, dfu->name, dfu->r_left);
+ }
+
+ dfu->inited = 1;
+
+ return 0;
+}
+
int dfu_flush(struct dfu_entity *dfu, void *buf, int size, int blk_seq_num)
{
int ret = 0;
printf("\nDFU complete %s: 0x%08x\n", dfu_hash_algo->name,
dfu->crc);
- dfu_write_transaction_cleanup(dfu);
+ dfu_transaction_cleanup(dfu);
return ret;
}
__func__, dfu->name, buf, size, blk_seq_num, dfu->offset,
(unsigned long)(dfu->i_buf - dfu->i_buf_start));
- if (!dfu->inited) {
- /* initial state */
- dfu->crc = 0;
- dfu->offset = 0;
- dfu->bad_skip = 0;
- dfu->i_blk_seq_num = 0;
- dfu->i_buf_start = dfu_get_buf(dfu);
- if (dfu->i_buf_start == NULL)
- return -ENOMEM;
- dfu->i_buf_end = dfu_get_buf(dfu) + dfu_buf_size;
- dfu->i_buf = dfu->i_buf_start;
-
- dfu->inited = 1;
- }
+ ret = dfu_transaction_initiate(dfu, false);
+ if (ret < 0)
+ return ret;
if (dfu->i_blk_seq_num != blk_seq_num) {
printf("%s: Wrong sequence number! [%d] [%d]\n",
__func__, dfu->i_blk_seq_num, blk_seq_num);
- dfu_write_transaction_cleanup(dfu);
+ dfu_transaction_cleanup(dfu);
return -1;
}
if ((dfu->i_buf + size) > dfu->i_buf_end) {
ret = dfu_write_buffer_drain(dfu);
if (ret) {
- dfu_write_transaction_cleanup(dfu);
+ dfu_transaction_cleanup(dfu);
return ret;
}
}
if ((dfu->i_buf + size) > dfu->i_buf_end) {
error("Buffer overflow! (0x%p + 0x%x > 0x%p)\n", dfu->i_buf,
size, dfu->i_buf_end);
- dfu_write_transaction_cleanup(dfu);
+ dfu_transaction_cleanup(dfu);
return -1;
}
if (size == 0 || (dfu->i_buf + size) > dfu->i_buf_end) {
ret = dfu_write_buffer_drain(dfu);
if (ret) {
- dfu_write_transaction_cleanup(dfu);
+ dfu_transaction_cleanup(dfu);
return ret;
}
}
debug("%s: name: %s buf: 0x%p size: 0x%x p_num: 0x%x i_buf: 0x%p\n",
__func__, dfu->name, buf, size, blk_seq_num, dfu->i_buf);
- if (!dfu->inited) {
- dfu->i_buf_start = dfu_get_buf(dfu);
- if (dfu->i_buf_start == NULL)
- return -ENOMEM;
-
- dfu->r_left = dfu->get_medium_size(dfu);
- if (dfu->r_left < 0)
- return dfu->r_left;
-
- debug("%s: %s %ld [B]\n", __func__, dfu->name, dfu->r_left);
-
- dfu->i_blk_seq_num = 0;
- dfu->crc = 0;
- dfu->offset = 0;
- dfu->i_buf_end = dfu_get_buf(dfu) + dfu_buf_size;
- dfu->i_buf = dfu->i_buf_start;
- dfu->b_left = 0;
-
- dfu->bad_skip = 0;
-
- dfu->inited = 1;
- }
+ ret = dfu_transaction_initiate(dfu, true);
+ if (ret < 0)
+ return ret;
if (dfu->i_blk_seq_num != blk_seq_num) {
printf("%s: Wrong sequence number! [%d] [%d]\n",
dfu_hash_algo->name, dfu->crc);
puts("\nUPLOAD ... done\nCtrl+C to exit ...\n");
- dfu->i_blk_seq_num = 0;
- dfu->crc = 0;
- dfu->offset = 0;
- dfu->i_buf_start = dfu_buf;
- dfu->i_buf_end = dfu_buf;
- dfu->i_buf = dfu->i_buf_start;
- dfu->b_left = 0;
-
- dfu->bad_skip = 0;
-
- dfu->inited = 0;
+ dfu_transaction_cleanup(dfu);
}
return ret;
#include <mmc.h>
static unsigned char *dfu_file_buf;
-static long dfu_file_buf_len;
+static u64 dfu_file_buf_len;
static long dfu_file_buf_filled;
static int mmc_block_op(enum dfu_op op, struct dfu_entity *dfu,
}
static int mmc_file_op(enum dfu_op op, struct dfu_entity *dfu,
- void *buf, long *len)
+ void *buf, u64 *len)
{
const char *fsname, *opname;
char cmd_buf[DFU_CMD_BUF_SIZE];
sprintf(cmd_buf + strlen(cmd_buf), " %s", dfu->name);
if (op == DFU_OP_WRITE)
- sprintf(cmd_buf + strlen(cmd_buf), " %lx", *len);
+ sprintf(cmd_buf + strlen(cmd_buf), " %llx", *len);
debug("%s: %s 0x%p\n", __func__, cmd_buf, cmd_buf);
return ret;
}
-long dfu_get_medium_size_mmc(struct dfu_entity *dfu)
+int dfu_get_medium_size_mmc(struct dfu_entity *dfu, u64 *size)
{
int ret;
- long len;
switch (dfu->layout) {
case DFU_RAW_ADDR:
- return dfu->data.mmc.lba_size * dfu->data.mmc.lba_blk_size;
+ *size = dfu->data.mmc.lba_size * dfu->data.mmc.lba_blk_size;
+ return 0;
case DFU_FS_FAT:
case DFU_FS_EXT4:
dfu_file_buf_filled = -1;
- ret = mmc_file_op(DFU_OP_SIZE, dfu, NULL, &len);
+ ret = mmc_file_op(DFU_OP_SIZE, dfu, NULL, size);
if (ret < 0)
return ret;
- if (len > CONFIG_SYS_DFU_MAX_FILE_SIZE)
+ if (*size > CONFIG_SYS_DFU_MAX_FILE_SIZE)
return -1;
- return len;
+ return 0;
default:
printf("%s: Layout (%s) not (yet) supported!\n", __func__,
dfu_get_layout(dfu->layout));
long *len)
{
int ret;
- long file_len;
+ u64 file_len;
if (dfu_file_buf_filled == -1) {
ret = mmc_file_op(DFU_OP_READ, dfu, dfu_file_buf, &file_len);
return ret;
}
-long dfu_get_medium_size_nand(struct dfu_entity *dfu)
+int dfu_get_medium_size_nand(struct dfu_entity *dfu, u64 *size)
{
- return dfu->data.nand.size;
+ *size = dfu->data.nand.size;
+
+ return 0;
}
static int dfu_read_medium_nand(struct dfu_entity *dfu, u64 offset, void *buf,
return dfu_transfer_medium_ram(DFU_OP_WRITE, dfu, offset, buf, len);
}
-long dfu_get_medium_size_ram(struct dfu_entity *dfu)
+int dfu_get_medium_size_ram(struct dfu_entity *dfu, u64 *size)
{
- return dfu->data.ram.size;
+ *size = dfu->data.ram.size;
+
+ return 0;
}
static int dfu_read_medium_ram(struct dfu_entity *dfu, u64 offset,
#include <spi.h>
#include <spi_flash.h>
-static long dfu_get_medium_size_sf(struct dfu_entity *dfu)
+static int dfu_get_medium_size_sf(struct dfu_entity *dfu, u64 *size)
{
- return dfu->data.sf.size;
+ *size = dfu->data.sf.size;
+
+ return 0;
}
static int dfu_read_medium_sf(struct dfu_entity *dfu, u64 offset, void *buf,
This select a dummy sandbox PHY driver. It used only to implement
the unit tests for the phy framework
+config NOP_PHY
+ bool "NOP PHY driver"
+ depends on PHY
+ help
+ Support for a no-op PHY driver (stubbed PHY driver).
+
+ This is useful when a driver uses the PHY framework but no real PHY
+ hardware exists.
+
+config SPL_NOP_PHY
+ bool "NOP PHY driver in SPL"
+ depends on SPL_PHY
+ help
+ Support for a no-op PHY driver (stubbed PHY driver) in the SPL.
+
+ This is useful when a driver uses the PHY framework but no real PHY
+ hardware exists.
+
config PIPE3_PHY
bool "Support omap's PIPE3 PHY"
depends on PHY && ARCH_OMAP2PLUS
#
obj-$(CONFIG_$(SPL_)PHY) += phy-uclass.o
+obj-$(CONFIG_$(SPL_)NOP_PHY) += nop-phy.o
obj-$(CONFIG_PHY_SANDBOX) += sandbox-phy.o
obj-$(CONFIG_$(SPL_)PIPE3_PHY) += ti-pipe3-phy.o
--- /dev/null
+/*
+ * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
+ * Written by Jean-Jacques Hiblot <jjhiblot@ti.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/device.h>
+#include <generic-phy.h>
+
+static const struct udevice_id nop_phy_ids[] = {
+ { .compatible = "nop-phy" },
+ { }
+};
+
+static struct phy_ops nop_phy_ops = {
+};
+
+U_BOOT_DRIVER(nop_phy) = {
+ .name = "nop_phy",
+ .id = UCLASS_PHY,
+ .of_match = nop_phy_ids,
+ .ops = &nop_phy_ops,
+};
debug("%s(dev=%p, index=%d, phy=%p)\n", __func__, dev, index, phy);
assert(phy);
+ phy->dev = NULL;
ret = dev_read_phandle_with_args(dev, "phys", "#phy-cells", 0, index,
&args);
if (ret) {
debug("%s(dev=%p, index=%d, reset_ctl=%p)\n", __func__, dev, index,
reset_ctl);
+ reset_ctl->dev = NULL;
ret = dev_read_phandle_with_args(dev, "resets", "#reset-cells", 0,
index, &args);
debug("%s(dev=%p, name=%s, reset_ctl=%p)\n", __func__, dev, name,
reset_ctl);
+ reset_ctl->dev = NULL;
index = dev_read_stringlist_search(dev, "reset-names", name);
if (index < 0) {
return reset_get_by_index(dev, index, reset_ctl);
}
+int reset_request(struct reset_ctl *reset_ctl)
+{
+ struct reset_ops *ops = reset_dev_ops(reset_ctl->dev);
+
+ debug("%s(reset_ctl=%p)\n", __func__, reset_ctl);
+
+ return ops->request(reset_ctl);
+}
+
int reset_free(struct reset_ctl *reset_ctl)
{
struct reset_ops *ops = reset_dev_ops(reset_ctl->dev);
return ops->rst_deassert(reset_ctl);
}
+int reset_release_all(struct reset_ctl *reset_ctl, int count)
+{
+ int i, ret;
+
+ for (i = 0; i < count; i++) {
+ debug("%s(reset_ctl[%d]=%p)\n", __func__, i, &reset_ctl[i]);
+
+ /* check if reset has been previously requested */
+ if (!reset_ctl[i].dev)
+ continue;
+
+ ret = reset_assert(&reset_ctl[i]);
+ if (ret)
+ return ret;
+
+ ret = reset_free(&reset_ctl[i]);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
UCLASS_DRIVER(reset) = {
.id = UCLASS_RESET,
.name = "reset",
1 << 7),
.bPwrOn2PwrGood = 2,
.bHubContrCurrent = 5,
- .DeviceRemovable = {0, 0xff}, /* all ports removeable */
+ {
+ {
+ /* all ports removeable */
+ .DeviceRemovable = {0, 0xff}
+ }
+ }
#if SANDBOX_NUM_PORTS > 8
#error "This code sets up an incorrect mask"
#endif
}
if (dev->out_ep->driver_data) {
+ free(dev->out_req->buf);
dev->out_req->buf = NULL;
usb_ep_free_request(dev->out_ep, dev->out_req);
usb_ep_disable(dev->out_ep);
SoCs, which includes Armada8K, Armada3700 and other Armada
family SoCs.
+config USB_XHCI_PCI
+ bool "Support for PCI-based xHCI USB controller"
+ depends on DM_USB
+ default y if X86
+ help
+ Enables support for the PCI-based xHCI controller.
+
config USB_XHCI_ROCKCHIP
bool "Support for Rockchip on-chip xHCI USB controller"
depends on ARCH_ROCKCHIP
#include <common.h>
#include <clk.h>
+#include <dm/ofnode.h>
+#include <generic-phy.h>
#include <reset.h>
#include <asm/io.h>
#include <dm.h>
*/
struct generic_ehci {
struct ehci_ctrl ctrl;
+ struct clk *clocks;
+ struct reset_ctl *resets;
+ struct phy phy;
+ int clock_count;
+ int reset_count;
};
static int ehci_usb_probe(struct udevice *dev)
{
+ struct generic_ehci *priv = dev_get_priv(dev);
struct ehci_hccr *hccr;
struct ehci_hcor *hcor;
- int i;
-
- for (i = 0; ; i++) {
- struct clk clk;
- int ret;
-
- ret = clk_get_by_index(dev, i, &clk);
- if (ret < 0)
- break;
- if (clk_enable(&clk))
- printf("failed to enable clock %d\n", i);
- clk_free(&clk);
+ int i, err, ret, clock_nb, reset_nb;
+
+ err = 0;
+ priv->clock_count = 0;
+ clock_nb = ofnode_count_phandle_with_args(dev_ofnode(dev), "clocks",
+ "#clock-cells");
+ if (clock_nb > 0) {
+ priv->clocks = devm_kcalloc(dev, clock_nb, sizeof(struct clk),
+ GFP_KERNEL);
+ if (!priv->clocks)
+ return -ENOMEM;
+
+ for (i = 0; i < clock_nb; i++) {
+ err = clk_get_by_index(dev, i, &priv->clocks[i]);
+
+ if (err < 0)
+ break;
+ err = clk_enable(&priv->clocks[i]);
+ if (err) {
+ error("failed to enable clock %d\n", i);
+ clk_free(&priv->clocks[i]);
+ goto clk_err;
+ }
+ priv->clock_count++;
+ }
+ } else {
+ if (clock_nb != -ENOENT) {
+ error("failed to get clock phandle(%d)\n", clock_nb);
+ return clock_nb;
+ }
+ }
+
+ priv->reset_count = 0;
+ reset_nb = ofnode_count_phandle_with_args(dev_ofnode(dev), "resets",
+ "#reset-cells");
+ if (reset_nb > 0) {
+ priv->resets = devm_kcalloc(dev, reset_nb,
+ sizeof(struct reset_ctl),
+ GFP_KERNEL);
+ if (!priv->resets)
+ return -ENOMEM;
+
+ for (i = 0; i < reset_nb; i++) {
+ err = reset_get_by_index(dev, i, &priv->resets[i]);
+ if (err < 0)
+ break;
+
+ if (reset_deassert(&priv->resets[i])) {
+ error("failed to deassert reset %d\n", i);
+ reset_free(&priv->resets[i]);
+ goto reset_err;
+ }
+ priv->reset_count++;
+ }
+ } else {
+ if (reset_nb != -ENOENT) {
+ error("failed to get reset phandle(%d)\n", reset_nb);
+ goto clk_err;
+ }
}
- for (i = 0; ; i++) {
- struct reset_ctl reset;
- int ret;
+ err = generic_phy_get_by_index(dev, 0, &priv->phy);
+ if (err) {
+ if (err != -ENOENT) {
+ error("failed to get usb phy\n");
+ goto reset_err;
+ }
+ } else {
- ret = reset_get_by_index(dev, i, &reset);
- if (ret < 0)
- break;
- if (reset_deassert(&reset))
- printf("failed to deassert reset %d\n", i);
- reset_free(&reset);
+ err = generic_phy_init(&priv->phy);
+ if (err) {
+ error("failed to init usb phy\n");
+ goto reset_err;
+ }
}
hccr = map_physmem(devfdt_get_addr(dev), 0x100, MAP_NOCACHE);
hcor = (struct ehci_hcor *)((uintptr_t)hccr +
HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
- return ehci_register(dev, hccr, hcor, NULL, 0, USB_INIT_HOST);
+ err = ehci_register(dev, hccr, hcor, NULL, 0, USB_INIT_HOST);
+ if (err)
+ goto phy_err;
+
+ return 0;
+
+phy_err:
+ if (generic_phy_valid(&priv->phy)) {
+ ret = generic_phy_exit(&priv->phy);
+ if (ret)
+ error("failed to release phy\n");
+ }
+
+reset_err:
+ ret = reset_release_all(priv->resets, priv->reset_count);
+ if (ret)
+ error("failed to assert all resets\n");
+clk_err:
+ ret = clk_release_all(priv->clocks, priv->clock_count);
+ if (ret)
+ error("failed to disable all clocks\n");
+
+ return err;
+}
+
+static int ehci_usb_remove(struct udevice *dev)
+{
+ struct generic_ehci *priv = dev_get_priv(dev);
+ int ret;
+
+ ret = ehci_deregister(dev);
+ if (ret)
+ return ret;
+
+ if (generic_phy_valid(&priv->phy)) {
+ ret = generic_phy_exit(&priv->phy);
+ if (ret)
+ return ret;
+ }
+
+ ret = reset_release_all(priv->resets, priv->reset_count);
+ if (ret)
+ return ret;
+
+ return clk_release_all(priv->clocks, priv->clock_count);
}
static const struct udevice_id ehci_usb_ids[] = {
.id = UCLASS_USB,
.of_match = ehci_usb_ids,
.probe = ehci_usb_probe,
- .remove = ehci_deregister,
+ .remove = ehci_usb_remove,
.ops = &ehci_usb_ops,
.priv_auto_alloc_size = sizeof(struct generic_ehci),
.flags = DM_FLAG_ALLOC_PRIV_DMA,
0, /* wHubCharacteristics */
10, /* bPwrOn2PwrGood */
0, /* bHubCntrCurrent */
- {}, /* Device removable */
- {} /* at most 7 ports! XXX */
+ { /* Device removable */
+ } /* at most 7 ports! XXX */
},
{
0x12, /* bLength */
static uint32_t *ehci_get_portsc_register(struct ehci_ctrl *ctrl, int port)
{
- if (port < 0 || port >= CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS) {
+ int max_ports = HCS_N_PORTS(ehci_readl(&ctrl->hccr->cr_hcsparams));
+
+ if (port < 0 || port >= max_ports) {
/* Printing the message would cause a scan failure! */
- debug("The request port(%u) is not configured\n", port);
+ debug("The request port(%u) exceeds maximum port number\n",
+ port);
return NULL;
}
{
int i, ret = 0;
uint32_t cmd, reg;
+ int max_ports = HCS_N_PORTS(ehci_readl(&ctrl->hccr->cr_hcsparams));
if (!ctrl || !ctrl->hcor)
return -EINVAL;
100 * 1000);
if (!ret) {
- for (i = 0; i < CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS; i++) {
+ for (i = 0; i < max_ports; i++) {
reg = ehci_readl(&ctrl->hcor->or_portsc[i]);
reg |= EHCI_PS_SUSP;
ehci_writel(&ctrl->hcor->or_portsc[i], reg);
return -1;
}
-const struct ehci_ops default_ehci_ops = {
+static const struct ehci_ops default_ehci_ops = {
.set_usb_mode = ehci_set_usbmode,
.get_port_speed = ehci_get_port_speed,
.powerup_fixup = ehci_powerup_fixup,
#include <usb.h>
-#if !defined(CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS)
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
-#endif
+/* Section 2.2.3 - N_PORTS */
+#define MAX_HC_PORTS 15
/*
* Register Space.
uint32_t _reserved_1_[6];
uint32_t or_configflag;
#define FLAG_CF (1 << 0) /* true: we'll support "high speed" */
- uint32_t or_portsc[CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS];
+ uint32_t or_portsc[MAX_HC_PORTS];
#define PORTSC_PSPD(x) (((x) >> 26) & 0x3)
#define PORTSC_PSPD_FS 0x0
#define PORTSC_PSPD_LS 0x1
*/
#include <common.h>
+#include <clk.h>
#include <dm.h>
+#include <dm/ofnode.h>
+#include <generic-phy.h>
+#include <reset.h>
#include "ohci.h"
#if !defined(CONFIG_USB_OHCI_NEW)
struct generic_ohci {
ohci_t ohci;
+ struct clk *clocks; /* clock list */
+ struct reset_ctl *resets; /* reset list */
+ struct phy phy;
+ int clock_count; /* number of clock in clock list */
+ int reset_count; /* number of reset in reset list */
};
static int ohci_usb_probe(struct udevice *dev)
{
struct ohci_regs *regs = (struct ohci_regs *)devfdt_get_addr(dev);
+ struct generic_ohci *priv = dev_get_priv(dev);
+ int i, err, ret, clock_nb, reset_nb;
- return ohci_register(dev, regs);
+ err = 0;
+ priv->clock_count = 0;
+ clock_nb = dev_count_phandle_with_args(dev, "clocks", "#clock-cells");
+ if (clock_nb > 0) {
+ priv->clocks = devm_kcalloc(dev, clock_nb, sizeof(struct clk),
+ GFP_KERNEL);
+ if (!priv->clocks)
+ return -ENOMEM;
+
+ for (i = 0; i < clock_nb; i++) {
+ err = clk_get_by_index(dev, i, &priv->clocks[i]);
+ if (err < 0)
+ break;
+
+ err = clk_enable(&priv->clocks[i]);
+ if (err) {
+ error("failed to enable clock %d\n", i);
+ clk_free(&priv->clocks[i]);
+ goto clk_err;
+ }
+ priv->clock_count++;
+ }
+ } else if (clock_nb != -ENOENT) {
+ error("failed to get clock phandle(%d)\n", clock_nb);
+ return clock_nb;
+ }
+
+ priv->reset_count = 0;
+ reset_nb = dev_count_phandle_with_args(dev, "resets", "#reset-cells");
+ if (reset_nb > 0) {
+ priv->resets = devm_kcalloc(dev, reset_nb,
+ sizeof(struct reset_ctl),
+ GFP_KERNEL);
+ if (!priv->resets)
+ return -ENOMEM;
+
+ for (i = 0; i < reset_nb; i++) {
+ err = reset_get_by_index(dev, i, &priv->resets[i]);
+ if (err < 0)
+ break;
+
+ err = reset_deassert(&priv->resets[i]);
+ if (err) {
+ error("failed to deassert reset %d\n", i);
+ reset_free(&priv->resets[i]);
+ goto reset_err;
+ }
+ priv->reset_count++;
+ }
+ } else if (reset_nb != -ENOENT) {
+ error("failed to get reset phandle(%d)\n", reset_nb);
+ goto clk_err;
+ }
+
+ err = generic_phy_get_by_index(dev, 0, &priv->phy);
+ if (err) {
+ if (err != -ENOENT) {
+ error("failed to get usb phy\n");
+ goto reset_err;
+ }
+ } else {
+
+ err = generic_phy_init(&priv->phy);
+ if (err) {
+ error("failed to init usb phy\n");
+ goto reset_err;
+ }
+ }
+
+ err = ohci_register(dev, regs);
+ if (err)
+ goto phy_err;
+
+ return 0;
+
+phy_err:
+ if (generic_phy_valid(&priv->phy)) {
+ ret = generic_phy_exit(&priv->phy);
+ if (ret)
+ error("failed to release phy\n");
+ }
+
+reset_err:
+ ret = reset_release_all(priv->resets, priv->reset_count);
+ if (ret)
+ error("failed to assert all resets\n");
+clk_err:
+ ret = clk_release_all(priv->clocks, priv->clock_count);
+ if (ret)
+ error("failed to disable all clocks\n");
+
+ return err;
}
static int ohci_usb_remove(struct udevice *dev)
{
- return ohci_deregister(dev);
+ struct generic_ohci *priv = dev_get_priv(dev);
+ int ret;
+
+ ret = ohci_deregister(dev);
+ if (ret)
+ return ret;
+
+ if (generic_phy_valid(&priv->phy)) {
+ ret = generic_phy_exit(&priv->phy);
+ if (ret)
+ return ret;
+ }
+
+ ret = reset_release_all(priv->resets, priv->reset_count);
+ if (ret)
+ return ret;
+
+ return clk_release_all(priv->clocks, priv->clock_count);
}
static const struct udevice_id ohci_usb_ids[] = {
return ops->reset_root_port(bus, udev);
}
+int usb_update_hub_device(struct usb_device *udev)
+{
+ struct udevice *bus = udev->controller_dev;
+ struct dm_usb_ops *ops = usb_get_ops(bus);
+
+ if (!ops->update_hub_device)
+ return -ENOSYS;
+
+ return ops->update_hub_device(bus, udev);
+}
+
int usb_stop(void)
{
struct udevice *bus;
#ifdef CONFIG_USB_STORAGE
usb_stor_reset();
#endif
- usb_hub_reset();
uc_priv->companion_device_count = 0;
usb_started = 0;
int ret;
asynch_allowed = 1;
- usb_hub_reset();
ret = uclass_get(UCLASS_USB, &uc);
if (ret)
}
/* returns 0 if no match, 1 if match */
-int usb_match_device(const struct usb_device_descriptor *desc,
- const struct usb_device_id *id)
+static int usb_match_device(const struct usb_device_descriptor *desc,
+ const struct usb_device_id *id)
{
if ((id->match_flags & USB_DEVICE_ID_MATCH_VENDOR) &&
id->idVendor != le16_to_cpu(desc->idVendor))
}
/* returns 0 if no match, 1 if match */
-int usb_match_one_id_intf(const struct usb_device_descriptor *desc,
- const struct usb_interface_descriptor *int_desc,
- const struct usb_device_id *id)
+static int usb_match_one_id_intf(const struct usb_device_descriptor *desc,
+ const struct usb_interface_descriptor *int_desc,
+ const struct usb_device_id *id)
{
/* The interface class, subclass, protocol and number should never be
* checked for a match if the device class is Vendor Specific,
}
/* returns 0 if no match, 1 if match */
-int usb_match_one_id(struct usb_device_descriptor *desc,
- struct usb_interface_descriptor *int_desc,
- const struct usb_device_id *id)
+static int usb_match_one_id(struct usb_device_descriptor *desc,
+ struct usb_interface_descriptor *int_desc,
+ const struct usb_device_id *id)
{
if (!usb_match_device(desc, id))
return 0;
return change;
}
-int usb_child_post_bind(struct udevice *dev)
+static int usb_child_post_bind(struct udevice *dev)
{
struct usb_dev_platdata *plat = dev_get_parent_platdata(dev);
int val;
*/
#include <common.h>
+#include <dm.h>
+#include <fdtdec.h>
+#include <generic-phy.h>
+#include <usb.h>
+
+#include "xhci.h"
#include <asm/io.h>
#include <linux/usb/dwc3.h>
+#include <linux/usb/otg.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct xhci_dwc3_platdata {
+ struct phy usb_phy;
+};
void dwc3_set_mode(struct dwc3 *dwc3_reg, u32 mode)
{
DWC3_GCTL_PRTCAPDIR(mode));
}
-void dwc3_phy_reset(struct dwc3 *dwc3_reg)
+static void dwc3_phy_reset(struct dwc3 *dwc3_reg)
{
/* Assert USB3 PHY reset */
setbits_le32(&dwc3_reg->g_usb3pipectl[0], DWC3_GUSB3PIPECTL_PHYSOFTRST);
setbits_le32(&dwc3_reg->g_fladj, GFLADJ_30MHZ_REG_SEL |
GFLADJ_30MHZ(val));
}
+
+#ifdef CONFIG_DM_USB
+static int xhci_dwc3_probe(struct udevice *dev)
+{
+ struct xhci_dwc3_platdata *plat = dev_get_platdata(dev);
+ struct xhci_hcor *hcor;
+ struct xhci_hccr *hccr;
+ struct dwc3 *dwc3_reg;
+ enum usb_dr_mode dr_mode;
+ int ret;
+
+ hccr = (struct xhci_hccr *)((uintptr_t)dev_read_addr(dev));
+ hcor = (struct xhci_hcor *)((uintptr_t)hccr +
+ HC_LENGTH(xhci_readl(&(hccr)->cr_capbase)));
+
+ ret = generic_phy_get_by_index(dev, 0, &plat->usb_phy);
+ if (ret) {
+ if (ret != -ENOENT) {
+ error("Failed to get USB PHY for %s\n", dev->name);
+ return ret;
+ }
+ } else {
+ ret = generic_phy_init(&plat->usb_phy);
+ if (ret) {
+ error("Can't init USB PHY for %s\n", dev->name);
+ return ret;
+ }
+ }
+
+ dwc3_reg = (struct dwc3 *)((char *)(hccr) + DWC3_REG_OFFSET);
+
+ dwc3_core_init(dwc3_reg);
+
+ dr_mode = usb_get_dr_mode(dev_of_offset(dev));
+ if (dr_mode == USB_DR_MODE_UNKNOWN)
+ /* by default set dual role mode to HOST */
+ dr_mode = USB_DR_MODE_HOST;
+
+ dwc3_set_mode(dwc3_reg, dr_mode);
+
+ return xhci_register(dev, hccr, hcor);
+}
+
+static int xhci_dwc3_remove(struct udevice *dev)
+{
+ struct xhci_dwc3_platdata *plat = dev_get_platdata(dev);
+ int ret;
+
+ if (generic_phy_valid(&plat->usb_phy)) {
+ ret = generic_phy_exit(&plat->usb_phy);
+ if (ret) {
+ error("Can't deinit USB PHY for %s\n", dev->name);
+ return ret;
+ }
+ }
+
+ return xhci_deregister(dev);
+}
+
+static const struct udevice_id xhci_dwc3_ids[] = {
+ { .compatible = "snps,dwc3" },
+ { }
+};
+
+U_BOOT_DRIVER(xhci_dwc3) = {
+ .name = "xhci-dwc3",
+ .id = UCLASS_USB,
+ .of_match = xhci_dwc3_ids,
+ .probe = xhci_dwc3_probe,
+ .remove = xhci_dwc3_remove,
+ .ops = &xhci_usb_ops,
+ .priv_auto_alloc_size = sizeof(struct xhci_ctrl),
+ .platdata_auto_alloc_size = sizeof(struct xhci_dwc3_platdata),
+ .flags = DM_FLAG_ALLOC_PRIV_DMA,
+};
+#endif
free(ring);
}
+/**
+ * Free the scratchpad buffer array and scratchpad buffers
+ *
+ * @ctrl host controller data structure
+ * @return none
+ */
+static void xhci_scratchpad_free(struct xhci_ctrl *ctrl)
+{
+ if (!ctrl->scratchpad)
+ return;
+
+ ctrl->dcbaa->dev_context_ptrs[0] = 0;
+
+ free((void *)(uintptr_t)ctrl->scratchpad->sp_array[0]);
+ free(ctrl->scratchpad->sp_array);
+ free(ctrl->scratchpad);
+ ctrl->scratchpad = NULL;
+}
+
/**
* frees the "xhci_container_ctx" pointer passed
*
{
xhci_ring_free(ctrl->event_ring);
xhci_ring_free(ctrl->cmd_ring);
+ xhci_scratchpad_free(ctrl);
xhci_free_virt_devices(ctrl);
free(ctrl->erst.entries);
free(ctrl->dcbaa);
return ring;
}
+/**
+ * Set up the scratchpad buffer array and scratchpad buffers
+ *
+ * @ctrl host controller data structure
+ * @return -ENOMEM if buffer allocation fails, 0 on success
+ */
+static int xhci_scratchpad_alloc(struct xhci_ctrl *ctrl)
+{
+ struct xhci_hccr *hccr = ctrl->hccr;
+ struct xhci_hcor *hcor = ctrl->hcor;
+ struct xhci_scratchpad *scratchpad;
+ int num_sp;
+ uint32_t page_size;
+ void *buf;
+ int i;
+
+ num_sp = HCS_MAX_SCRATCHPAD(xhci_readl(&hccr->cr_hcsparams2));
+ if (!num_sp)
+ return 0;
+
+ scratchpad = malloc(sizeof(*scratchpad));
+ if (!scratchpad)
+ goto fail_sp;
+ ctrl->scratchpad = scratchpad;
+
+ scratchpad->sp_array = xhci_malloc(num_sp * sizeof(u64));
+ if (!scratchpad->sp_array)
+ goto fail_sp2;
+ ctrl->dcbaa->dev_context_ptrs[0] =
+ cpu_to_le64((uintptr_t)scratchpad->sp_array);
+
+ page_size = xhci_readl(&hcor->or_pagesize) & 0xffff;
+ for (i = 0; i < 16; i++) {
+ if ((0x1 & page_size) != 0)
+ break;
+ page_size = page_size >> 1;
+ }
+ BUG_ON(i == 16);
+
+ page_size = 1 << (i + 12);
+ buf = memalign(page_size, num_sp * page_size);
+ if (!buf)
+ goto fail_sp3;
+ memset(buf, '\0', num_sp * page_size);
+ xhci_flush_cache((uintptr_t)buf, num_sp * page_size);
+
+ for (i = 0; i < num_sp; i++) {
+ uintptr_t ptr = (uintptr_t)buf + i * page_size;
+ scratchpad->sp_array[i] = cpu_to_le64(ptr);
+ }
+
+ return 0;
+
+fail_sp3:
+ free(scratchpad->sp_array);
+
+fail_sp2:
+ free(scratchpad);
+ ctrl->scratchpad = NULL;
+
+fail_sp:
+ return -ENOMEM;
+}
+
/**
* Allocates the Container context
*
xhci_writeq(&ctrl->ir_set->erst_base, val_64);
+ /* set up the scratchpad buffer array and scratchpad buffers */
+ xhci_scratchpad_alloc(ctrl);
+
/* initializing the virtual devices to NULL */
for (i = 0; i < MAX_HC_SLOTS; ++i)
ctrl->devs[i] = NULL;
* @param udev pointer to the Device Data Structure
* @return returns negative value on failure else 0 on success
*/
-void xhci_setup_addressable_virt_dev(struct xhci_ctrl *ctrl, int slot_id,
- int speed, int hop_portnr)
+void xhci_setup_addressable_virt_dev(struct xhci_ctrl *ctrl,
+ struct usb_device *udev, int hop_portnr)
{
struct xhci_virt_device *virt_dev;
struct xhci_ep_ctx *ep0_ctx;
struct xhci_slot_ctx *slot_ctx;
u32 port_num = 0;
u64 trb_64 = 0;
+ int slot_id = udev->slot_id;
+ int speed = udev->speed;
+ int route = 0;
+#ifdef CONFIG_DM_USB
+ struct usb_device *dev = udev;
+ struct usb_hub_device *hub;
+#endif
virt_dev = ctrl->devs[slot_id];
slot_ctx = xhci_get_slot_ctx(ctrl, virt_dev->in_ctx);
/* Only the control endpoint is valid - one endpoint context */
- slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1) | 0);
+ slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
+
+#ifdef CONFIG_DM_USB
+ /* Calculate the route string for this device */
+ port_num = dev->portnr;
+ while (!usb_hub_is_root_hub(dev->dev)) {
+ hub = dev_get_uclass_priv(dev->dev);
+ /*
+ * Each hub in the topology is expected to have no more than
+ * 15 ports in order for the route string of a device to be
+ * unique. SuperSpeed hubs are restricted to only having 15
+ * ports, but FS/LS/HS hubs are not. The xHCI specification
+ * says that if the port number the device is greater than 15,
+ * that portion of the route string shall be set to 15.
+ */
+ if (port_num > 15)
+ port_num = 15;
+ route |= port_num << (hub->hub_depth * 4);
+ dev = dev_get_parent_priv(dev->dev);
+ port_num = dev->portnr;
+ dev = dev_get_parent_priv(dev->dev->parent);
+ }
+
+ debug("route string %x\n", route);
+#endif
+ slot_ctx->dev_info |= route;
switch (speed) {
case USB_SPEED_SUPER:
BUG();
}
+#ifdef CONFIG_DM_USB
+ /* Set up TT fields to support FS/LS devices */
+ if (speed == USB_SPEED_LOW || speed == USB_SPEED_FULL) {
+ dev = dev_get_parent_priv(udev->dev);
+ if (dev->speed == USB_SPEED_HIGH) {
+ hub = dev_get_uclass_priv(udev->dev);
+ if (hub->tt.multi)
+ slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
+ slot_ctx->tt_info |= cpu_to_le32(TT_PORT(udev->portnr));
+ slot_ctx->tt_info |= cpu_to_le32(TT_SLOT(dev->slot_id));
+ }
+ }
+#endif
+
port_num = hop_portnr;
debug("port_num = %d\n", port_num);
#include <common.h>
#include <dm.h>
-#include <errno.h>
#include <pci.h>
#include <usb.h>
-
#include "xhci.h"
-#ifndef CONFIG_DM_USB
-
-/*
- * Create the appropriate control structures to manage a new XHCI host
- * controller.
- */
-int xhci_hcd_init(int index, struct xhci_hccr **ret_hccr,
- struct xhci_hcor **ret_hcor)
-{
- struct xhci_hccr *hccr;
- struct xhci_hcor *hcor;
- pci_dev_t pdev;
- uint32_t cmd;
- int len;
-
- pdev = pci_find_class(PCI_CLASS_SERIAL_USB_XHCI, index);
- if (pdev < 0) {
- printf("XHCI host controller not found\n");
- return -1;
- }
-
- hccr = (struct xhci_hccr *)pci_map_bar(pdev,
- PCI_BASE_ADDRESS_0, PCI_REGION_MEM);
- len = HC_LENGTH(xhci_readl(&hccr->cr_capbase));
- hcor = (struct xhci_hcor *)((uint32_t)hccr + len);
-
- debug("XHCI-PCI init hccr 0x%x and hcor 0x%x hc_length %d\n",
- (uint32_t)hccr, (uint32_t)hcor, len);
-
- *ret_hccr = hccr;
- *ret_hcor = hcor;
-
- /* enable busmaster */
- pci_read_config_dword(pdev, PCI_COMMAND, &cmd);
- cmd |= PCI_COMMAND_MASTER;
- pci_write_config_dword(pdev, PCI_COMMAND, cmd);
-
- return 0;
-}
-
-/*
- * Destroy the appropriate control structures corresponding * to the XHCI host
- * controller
- */
-void xhci_hcd_stop(int index)
-{
-}
-
-#else
-
-struct xhci_pci_priv {
- struct xhci_ctrl ctrl; /* Needs to come first in this struct! */
-};
-
static void xhci_pci_init(struct udevice *dev, struct xhci_hccr **ret_hccr,
struct xhci_hcor **ret_hcor)
{
return xhci_register(dev, hccr, hcor);
}
-static int xhci_pci_remove(struct udevice *dev)
-{
- int ret;
-
- ret = xhci_deregister(dev);
- if (ret)
- return ret;
-
- return 0;
-}
-
static const struct udevice_id xhci_pci_ids[] = {
{ .compatible = "xhci-pci" },
{ }
.name = "xhci_pci",
.id = UCLASS_USB,
.probe = xhci_pci_probe,
- .remove = xhci_pci_remove,
+ .remove = xhci_deregister,
.of_match = xhci_pci_ids,
.ops = &xhci_usb_ops,
.platdata_auto_alloc_size = sizeof(struct usb_platdata),
- .priv_auto_alloc_size = sizeof(struct xhci_pci_priv),
+ .priv_auto_alloc_size = sizeof(struct xhci_ctrl),
.flags = DM_FLAG_ALLOC_PRIV_DMA,
};
};
U_BOOT_PCI_DEVICE(xhci_pci, xhci_pci_supported);
-
-#endif /* CONFIG_DM_USB */
fields[0] = lower_32_bits(val_64);
fields[1] = upper_32_bits(val_64);
fields[2] = 0;
- fields[3] = TRB_TYPE(cmd) | EP_ID_FOR_TRB(ep_index) |
- SLOT_ID_FOR_TRB(slot_id) | ctrl->cmd_ring->cycle_state;
+ fields[3] = TRB_TYPE(cmd) | SLOT_ID_FOR_TRB(slot_id) |
+ ctrl->cmd_ring->cycle_state;
+
+ /*
+ * Only 'reset endpoint', 'stop endpoint' and 'set TR dequeue pointer'
+ * commands need endpoint id encoded.
+ */
+ if (cmd >= TRB_RESET_EP && cmd <= TRB_SET_DEQ)
+ fields[3] |= EP_ID_FOR_TRB(ep_index);
queue_trb(ctrl, ctrl->cmd_ring, false, fields);
cpu_to_le16(0x8), /* wHubCharacteristics */
10, /* bPwrOn2PwrGood */
0, /* bHubCntrCurrent */
- {}, /* Device removable */
- {} /* at most 7 ports! XXX */
+ { /* Device removable */
+ } /* at most 7 ports! XXX */
},
{
0x12, /* bLength */
* @param hcor pointer to host controller operation registers
* @return -EBUSY if XHCI Controller is not halted else status of handshake
*/
-int xhci_reset(struct xhci_hcor *hcor)
+static int xhci_reset(struct xhci_hcor *hcor)
{
u32 cmd;
u32 state;
ifdesc = &udev->config.if_desc[0];
ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
- /* Zero the input context control */
- ctrl_ctx->add_flags = 0;
+ /* Initialize the input context control */
+ ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
ctrl_ctx->drop_flags = 0;
/* EP_FLAG gives values 1 & 4 for EP1OUT and EP2IN */
* so setting up the slot context.
*/
debug("Setting up addressable devices %p\n", ctrl->dcbaa);
- xhci_setup_addressable_virt_dev(ctrl, udev->slot_id, udev->speed,
- root_portnr);
+ xhci_setup_addressable_virt_dev(ctrl, udev, root_portnr);
ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx);
ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
* @param udev pointer to the Device Data Structure
* @return Returns 0 on succes else return error code on failure
*/
-int _xhci_alloc_device(struct usb_device *udev)
+static int _xhci_alloc_device(struct usb_device *udev)
{
struct xhci_ctrl *ctrl = xhci_get_ctrl(udev);
union xhci_trb *event;
uint32_t reg;
volatile uint32_t *status_reg;
struct xhci_ctrl *ctrl = xhci_get_ctrl(udev);
+ struct xhci_hccr *hccr = ctrl->hccr;
struct xhci_hcor *hcor = ctrl->hcor;
+ int max_ports = HCS_MAX_PORTS(xhci_readl(&hccr->cr_hcsparams1));
if ((req->requesttype & USB_RT_PORT) &&
- le16_to_cpu(req->index) > CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS) {
- printf("The request port(%d) is not configured\n",
- le16_to_cpu(req->index) - 1);
+ le16_to_cpu(req->index) > max_ports) {
+ printf("The request port(%d) exceeds maximum port number\n",
+ le16_to_cpu(req->index) - 1);
return -EINVAL;
}
case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8):
switch (le16_to_cpu(req->value) >> 8) {
case USB_DT_HUB:
+ case USB_DT_SS_HUB:
debug("USB_DT_HUB config\n");
srcptr = &descriptor.hub;
srclen = 0x8;
#endif /* CONFIG_DM_USB */
#ifdef CONFIG_DM_USB
-/*
-static struct usb_device *get_usb_device(struct udevice *dev)
-{
- struct usb_device *udev;
-
- if (device_get_uclass_id(dev) == UCLASS_USB)
- udev = dev_get_uclass_priv(dev);
- else
- udev = dev_get_parent_priv(dev);
-
- return udev;
-}
-*/
-static bool is_root_hub(struct udevice *dev)
-{
- if (device_get_uclass_id(dev->parent) != UCLASS_USB_HUB)
- return true;
-
- return false;
-}
static int xhci_submit_control_msg(struct udevice *dev, struct usb_device *udev,
unsigned long pipe, void *buffer, int length,
hub = udev->dev;
if (device_get_uclass_id(hub) == UCLASS_USB_HUB) {
/* Figure out our port number on the root hub */
- if (is_root_hub(hub)) {
+ if (usb_hub_is_root_hub(hub)) {
root_portnr = udev->portnr;
} else {
- while (!is_root_hub(hub->parent))
+ while (!usb_hub_is_root_hub(hub->parent))
hub = hub->parent;
uhop = dev_get_parent_priv(hub);
root_portnr = uhop->portnr;
return _xhci_alloc_device(udev);
}
+static int xhci_update_hub_device(struct udevice *dev, struct usb_device *udev)
+{
+ struct xhci_ctrl *ctrl = dev_get_priv(dev);
+ struct usb_hub_device *hub = dev_get_uclass_priv(udev->dev);
+ struct xhci_virt_device *virt_dev;
+ struct xhci_input_control_ctx *ctrl_ctx;
+ struct xhci_container_ctx *out_ctx;
+ struct xhci_container_ctx *in_ctx;
+ struct xhci_slot_ctx *slot_ctx;
+ int slot_id = udev->slot_id;
+ unsigned think_time;
+
+ debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
+
+ /* Ignore root hubs */
+ if (usb_hub_is_root_hub(udev->dev))
+ return 0;
+
+ virt_dev = ctrl->devs[slot_id];
+ BUG_ON(!virt_dev);
+
+ out_ctx = virt_dev->out_ctx;
+ in_ctx = virt_dev->in_ctx;
+
+ ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
+ /* Initialize the input context control */
+ ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
+ ctrl_ctx->drop_flags = 0;
+
+ xhci_inval_cache((uintptr_t)out_ctx->bytes, out_ctx->size);
+
+ /* slot context */
+ xhci_slot_copy(ctrl, in_ctx, out_ctx);
+ slot_ctx = xhci_get_slot_ctx(ctrl, in_ctx);
+
+ /* Update hub related fields */
+ slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
+ if (hub->tt.multi && udev->speed == USB_SPEED_HIGH)
+ slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
+ slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(udev->maxchild));
+ /*
+ * Set TT think time - convert from ns to FS bit times.
+ * Note 8 FS bit times == (8 bits / 12000000 bps) ~= 666ns
+ *
+ * 0 = 8 FS bit times, 1 = 16 FS bit times,
+ * 2 = 24 FS bit times, 3 = 32 FS bit times.
+ *
+ * This field shall be 0 if the device is not a high-spped hub.
+ */
+ think_time = hub->tt.think_time;
+ if (think_time != 0)
+ think_time = (think_time / 666) - 1;
+ if (udev->speed == USB_SPEED_HIGH)
+ slot_ctx->tt_info |= cpu_to_le32(TT_THINK_TIME(think_time));
+
+ return xhci_configure_endpoints(udev, false);
+}
+
int xhci_register(struct udevice *dev, struct xhci_hccr *hccr,
struct xhci_hcor *hcor)
{
.bulk = xhci_submit_bulk_msg,
.interrupt = xhci_submit_int_msg,
.alloc_device = xhci_alloc_device,
+ .update_hub_device = xhci_update_hub_device,
};
#endif
/* Max number of USB devices for any host controller - limit in section 6.1 */
#define MAX_HC_SLOTS 256
/* Section 5.3.3 - MaxPorts */
-#define MAX_HC_PORTS 127
+#define MAX_HC_PORTS 255
/* Up to 16 ms to halt an HC */
#define XHCI_MAX_HALT_USEC (16*1000)
#define HCS_MAX_INTRS(p) (((p) >> 8) & 0x7ff)
/* bits 24:31, Max Ports - max value is 0x7F = 127 ports */
#define HCS_MAX_PORTS_SHIFT 24
-#define HCS_MAX_PORTS_MASK (0x7f << HCS_MAX_PORTS_SHIFT)
-#define HCS_MAX_PORTS(p) (((p) >> 24) & 0x7f)
+#define HCS_MAX_PORTS_MASK (0xff << HCS_MAX_PORTS_SHIFT)
+#define HCS_MAX_PORTS(p) (((p) >> 24) & 0xff)
/* HCSPARAMS2 - hcs_params2 - bitmasks */
/* bits 0:3, frames or uframes that SW needs to queue transactions
#define HCS_IST(p) (((p) >> 0) & 0xf)
/* bits 4:7, max number of Event Ring segments */
#define HCS_ERST_MAX(p) (((p) >> 4) & 0xf)
+/* bits 21:25 Hi 5 bits of Scratchpad buffers SW must allocate for the HW */
/* bit 26 Scratchpad restore - for save/restore HW state - not used yet */
-/* bits 27:31 number of Scratchpad buffers SW must allocate for the HW */
-#define HCS_MAX_SCRATCHPAD(p) (((p) >> 27) & 0x1f)
+/* bits 27:31 Lo 5 bits of Scratchpad buffers SW must allocate for the HW */
+#define HCS_MAX_SCRATCHPAD(p) ((((p) >> 16) & 0x3e0) | (((p) >> 27) & 0x1f))
/* HCSPARAMS3 - hcs_params3 - bitmasks */
/* bits 0:7, Max U1 to U0 latency for the roothub ports */
volatile uint64_t or_dcbaap;
volatile uint32_t or_config;
volatile uint32_t reserved_2[241];
- struct xhci_hcor_port_regs portregs[CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS];
-
- uint32_t reserved_4[CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS * 254];
+ struct xhci_hcor_port_regs portregs[MAX_HC_PORTS];
};
/* USBCMD - USB command - command bitmasks */
* @type: Type of context. Used to calculated offsets to contained contexts.
* @size: Size of the context data
* @bytes: The raw context data given to HW
- * @dma: dma address of the bytes
*
* Represents either a Device or Input context. Holds a pointer to the raw
- * memory used for the context (bytes) and dma address of it (dma).
+ * memory used for the context (bytes).
*/
struct xhci_container_ctx {
unsigned type;
* The Slot ID of the hub that isolates the high speed signaling from
* this low or full-speed device. '0' if attached to root hub port.
*/
-#define TT_SLOT (0xff)
+#define TT_SLOT(p) (((p) & 0xff) << 0)
/*
* The number of the downstream facing port of the high-speed hub
* '0' if the device is not low or full speed.
*/
-#define TT_PORT (0xff << 8)
+#define TT_PORT(p) (((p) & 0xff) << 8)
#define TT_THINK_TIME(p) (((p) & 0x3) << 16)
/* dev_state bitmasks */
unsigned int erst_size;
};
+struct xhci_scratchpad {
+ u64 *sp_array;
+};
+
/*
* Each segment table entry is 4*32bits long. 1K seems like an ok size:
* (1K bytes * 8bytes/bit) / (4*32 bits) = 64 segment entries in the table,
struct xhci_intr_reg *ir_set;
struct xhci_erst erst;
struct xhci_erst_entry entry[ERST_NUM_SEGS];
+ struct xhci_scratchpad *scratchpad;
struct xhci_virt_device *devs[MAX_HC_SLOTS];
int rootdev;
};
void xhci_slot_copy(struct xhci_ctrl *ctrl,
struct xhci_container_ctx *in_ctx,
struct xhci_container_ctx *out_ctx);
-void xhci_setup_addressable_virt_dev(struct xhci_ctrl *ctrl, int slot_id,
- int speed, int hop_portnr);
+void xhci_setup_addressable_virt_dev(struct xhci_ctrl *ctrl,
+ struct usb_device *udev, int hop_portnr);
void xhci_queue_command(struct xhci_ctrl *ctrl, u8 *ptr,
u32 slot_id, u32 ep_index, trb_type cmd);
void xhci_acknowledge_event(struct xhci_ctrl *ctrl);
* @return 0 if OK, or a negative error code.
*/
int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk);
+
+/**
+ * clk_release_all() - Disable (turn off)/Free an array of previously
+ * requested clocks.
+ *
+ * For each clock contained in the clock array, this function will check if
+ * clock has been previously requested and then will disable and free it.
+ *
+ * @clk: A clock struct array that was previously successfully
+ * requested by clk_request/get_by_*().
+ * @count Number of clock contained in the array
+ * @return zero on success, or -ve error code.
+ */
+int clk_release_all(struct clk *clk, int count);
+
#else
static inline int clk_get_by_index(struct udevice *dev, int index,
struct clk *clk)
{
return -ENOSYS;
}
+
+static inline int clk_release_all(struct clk *clk, int count)
+{
+ return -ENOSYS;
+}
+
#endif
/**
#define CONFIG_USB_EHCI_PCI
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_PCI_EHCI_DEVICE 0
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
#endif
#undef CONFIG_WATCHDOG /* watchdog disabled */
#if defined(CONFIG_SPL_USB_HOST_SUPPORT) || !defined(CONFIG_SPL_BUILD)
#define CONFIG_SYS_USB_FAT_BOOT_PARTITION 1
#define CONFIG_USB_XHCI_OMAP
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#define CONFIG_OMAP_USB_PHY
#define CONFIG_AM437X_USB2PHY2_HOST
/* USB xHCI HOST */
#define CONFIG_USB_XHCI_OMAP
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#define CONFIG_OMAP_USB_PHY
#define CONFIG_OMAP_USB3PHY1_HOST
/* USB xHCI HOST */
#define CONFIG_USB_XHCI_OMAP
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#define CONFIG_OMAP_USB_PHY
#define CONFIG_OMAP_USB3PHY1_HOST
/* USB support */
#define CONFIG_USB_XHCI_OMAP
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#define CONFIG_OMAP_USB_PHY
#define CONFIG_AM437X_USB2PHY2_HOST
#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
CONFIG_SYS_SCSI_MAX_LUN)
/* USB UHH support options */
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 76 /* HSIC2 HUB #RESET */
#define CONFIG_NET_RETRY_COUNT 20
#define CONFIG_AT91_WANTS_COMMON_PHY
-/* USB */
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
-
#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_PARTITIONS
/* USB xHCI HOST */
#define CONFIG_USB_XHCI_OMAP
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#define CONFIG_OMAP_USB_PHY
#define CONFIG_OMAP_USB2PHY2_HOST
#if 0
#undef CONFIG_DM_USB
#define CONFIG_USB_XHCI_PCI
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#endif
#if !defined(CONFIG_USB_XHCI_HCD)
#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
/* USB UHH support options */
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
-
#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 1
#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 62
/* Enable Time Command */
/* USB */
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
-
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
#define CONFIG_USB_ETHER_SMSC95XX
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#endif
#define CONFIG_CMD_MEMINFO
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#endif
/* MMC */
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#endif
/*
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_XHCI_DWC3
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#endif
#if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_XHCI_USB)
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#endif
/*
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#endif
#define CONFIG_SYS_CLK_FREQ 100000000
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_MAX_CONTROLLER_COUNT 3
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#endif
/*
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_MAX_CONTROLLER_COUNT 3
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#endif
#endif
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_XHCI_DWC3
#define CONFIG_USB_MAX_CONTROLLER_COUNT 3
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#define CONFIG_CMD_USB
#define CONFIG_USB_STORAGE
#endif
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_XHCI_DWC3
#define CONFIG_USB_MAX_CONTROLLER_COUNT 3
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#define CONFIG_CMD_USB
#define CONFIG_USB_STORAGE
#endif
#define CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#include <asm/fsl_secure_boot.h>
#define CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#undef CONFIG_CMDLINE_EDITING
#include <config_distro_defaults.h>
* USB
*/
#ifdef CONFIG_CMD_USB
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
/* USB device */
#define CONFIG_USB_ETHER
/* EHCI */
#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 57
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
#define CONFIG_USB_ETHER_MCS7830
#define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,serial\0" \
"stdout=vidconsole,serial\0" \
- "stderr=vidconsole,serial\0"
+ "stderr=vidconsole,serial\0" \
+ "usb_pgood_delay=40\0"
#define CONFIG_SCSI_DEV_LIST \
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}, \
#define CONFIG_NET_RETRY_COUNT 50
#define CONFIG_PHY_MARVELL
-/* USB 2.0 */
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
-
-/* USB 3.0 */
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 3
-
-#define CONFIG_USB_MAX_CONTROLLER_COUNT (CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS + \
- CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS)
+#define CONFIG_USB_MAX_CONTROLLER_COUNT (3 + 3)
/* USB ethernet */
#define CONFIG_USB_HOST_ETHER
#define CONFIG_ARP_TIMEOUT 200
#define CONFIG_NET_RETRY_COUNT 50
-/* USB 2.0 */
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
-
-/* USB 3.0 */
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 3
-
-#define CONFIG_USB_MAX_CONTROLLER_COUNT (CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS + \
- CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS)
+#define CONFIG_USB_MAX_CONTROLLER_COUNT (3 + 3)
/* USB ethernet */
#define CONFIG_USB_HOST_ETHER
#define CONFIG_SYS_NAND_LARGEPAGE
/* EHCI driver */
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
#define CONFIG_EHCI_IS_TDI
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_USB_EHCI_MXC
/* USB */
#define CONFIG_USB_EHCI_EXYNOS
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_SMSC95XX
#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 147
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
#define CONFIG_USB_ETHER_MCS7830
/* USB EHCI */
#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 183
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
/* commands to include */
*/
/* USB UHH support options */
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
-
#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 1
#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 62
#define CONFIG_SYS_I2C_TCA642X_ADDR 0x22
/* USB UHH support options */
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 80
#define CONFIG_RESET_PHY_R
#define CONFIG_AT91_WANTS_COMMON_PHY
-/* USB */
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
-
#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
#define CONFIG_PL01X_SERIAL
/* USB configuration */
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_SYS_USB_EVENT_POLL
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_OHCI_NEW
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
-/* xhci host */
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#endif
#define CONFIG_USB_ETHER_SMSC95XX
#define CONFIG_USB_ETHER_RTL8152
-/* rockchip xhci host driver */
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
-
#endif
/* USB */
#define CONFIG_CMD_USB
-#ifdef CONFIG_CMD_USB
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
-#endif
-
/* USB device */
#define CONFIG_USB_GADGET
#define CONFIG_USB_GADGET_DUALSPEED
#define CONFIG_TFTP_PORT
#define CONFIG_TFTP_TSIZE
-/* USB */
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
-
/* MMC */
#define CONFIG_GENERIC_ATMEL_MCI
#define CONFIG_USB_OHCI_NEW
#define CONFIG_USB_OHCI_SUNXI
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
#endif
#ifdef CONFIG_USB_MUSB_SUNXI
115200}
/* EHCI */
#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
/* commands to include */
#define CONFIG_CMD_NAND /* NAND support */
/* USB EHCI */
#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 162
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_SMSC95XX
/* For USB EHCI controller */
#define CONFIG_EHCI_IS_TDI
#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
#endif /* _TEGRA114_COMMON_H_ */
/* For USB EHCI controller */
#define CONFIG_EHCI_IS_TDI
#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
/* GPU needs setup */
#define CONFIG_TEGRA_GPU
*/
#define CONFIG_USB_EHCI_TXFIFO_THRESH 10
#define CONFIG_EHCI_IS_TDI
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
#define CONFIG_SYS_NAND_SELF_INIT
#define CONFIG_SYS_NAND_ONFI_DETECTION
/* For USB EHCI controller */
#define CONFIG_EHCI_IS_TDI
#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
/* GPU needs setup */
#define CONFIG_TEGRA_GPU
/* For USB EHCI controller */
#define CONFIG_EHCI_IS_TDI
#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
#endif /* _TEGRA30_COMMON_H_ */
/* USB Configuration */
#define CONFIG_USB_XHCI_KEYSTONE
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#define CONFIG_USB_SS_BASE KS2_USB_SS_BASE
#define CONFIG_USB_HOST_XHCI_BASE KS2_USB_HOST_XHCI_BASE
#define CONFIG_DEV_USB_PHY_BASE KS2_DEV_USB_PHY_BASE
#define CONFIG_SYS_NAND_USE_FLASH_BBT
#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
-/* USB */
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 4
-
/* SD/MMC */
#define CONFIG_SUPPORT_EMMC_BOOT
#endif
-/* USB */
-
-#ifdef CONFIG_CMD_USB
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
-#endif
-
/* USB device */
#define CONFIG_USB_ETHER
#define CONFIG_USB_ETH_RNDIS
* USB configuration
*/
#define CONFIG_USB_EHCI_PCI
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 12
#define CONFIG_SYS_USB_EVENT_POLL
#define CONFIG_USB_HOST_ETHER
#define CONFIG_SYS_LOAD_ADDR 0x8000000
#if defined(CONFIG_ZYNQMP_USB)
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
-
#define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x1800000
#define DFU_DEFAULT_POLL_TIMEOUT 300
#define CONFIG_USB_CABLE_CHECK
struct sf_internal_data sf;
} data;
- long (*get_medium_size)(struct dfu_entity *dfu);
+ int (*get_medium_size)(struct dfu_entity *dfu, u64 *size);
int (*read_medium)(struct dfu_entity *dfu,
u64 offset, void *buf, long *len);
u8 *i_buf;
u8 *i_buf_start;
u8 *i_buf_end;
- long r_left;
+ u64 r_left;
long b_left;
u32 bad_skip; /* for nand use */
const char *list_name, const char *cells_name,
int index, struct of_phandle_args *out_args);
+/**
+ * of_count_phandle_with_args() - Count the number of phandle in a list
+ *
+ * @np: pointer to a device tree node containing a list
+ * @list_name: property name that contains a list
+ * @cells_name: property name that specifies phandles' arguments count
+ * @return number of phandle found, -ENOENT if
+ * @list_name does not exist, -EINVAL if a phandle was not found,
+ * @cells_name could not be found, the arguments were truncated or there
+ * were too many arguments.
+ *
+ * Returns number of phandle found on success, on error returns appropriate
+ * errno value.
+ *
+ */
+int of_count_phandle_with_args(const struct device_node *np,
+ const char *list_name, const char *cells_name);
+
/**
* of_alias_scan() - Scan all properties of the 'aliases' node
*
int index,
struct ofnode_phandle_args *out_args);
+/**
+ * ofnode_count_phandle_with_args() - Count number of phandle in a list
+ *
+ * This function is useful to count phandles into a list.
+ * Returns number of phandle on success, on error returns appropriate
+ * errno value.
+ *
+ * @node: device tree node containing a list
+ * @list_name: property name that contains a list
+ * @cells_name: property name that specifies phandles' arguments count
+ * @return number of phandle on success, -ENOENT if @list_name does not
+ * exist, -EINVAL if a phandle was not found, @cells_name could not
+ * be found.
+ */
+int ofnode_count_phandle_with_args(ofnode node, const char *list_name,
+ const char *cells_name);
+
/**
* ofnode_path() - find a node by full path
*
int index,
struct ofnode_phandle_args *out_args);
+/**
+ * dev_count_phandle_with_args() - Return phandle number in a list
+ *
+ * This function is usefull to get phandle number contained in a property list.
+ * For example, this allows to allocate the right amount of memory to keep
+ * clock's reference contained into the "clocks" property.
+ *
+ *
+ * @dev: device whose node containing a list
+ * @list_name: property name that contains a list
+ * @cells_name: property name that specifies phandles' arguments count
+ * @Returns number of phandle found on success, on error returns appropriate
+ * errno value.
+ */
+
+int dev_count_phandle_with_args(struct udevice *dev, const char *list_name,
+ const char *cells_name);
+
/**
* dev_read_addr_cells() - Get the number of address cells for a device's node
*
out_args);
}
+static inline int dev_count_phandle_with_args(struct udevice *dev,
+ const char *list_name, const char *cells_name)
+{
+ return ofnode_count_phandle_with_args(dev_ofnode(dev), list_name,
+ cells_name);
+}
+
static inline int dev_read_addr_cells(struct udevice *dev)
{
/* NOTE: this call should walk up the parent stack */
int (*power_off)(struct phy *phy);
};
+#ifdef CONFIG_PHY
/**
* generic_phy_init() - initialize the PHY port
int generic_phy_get_by_name(struct udevice *user, const char *phy_name,
struct phy *phy);
+#else /* CONFIG_PHY */
+
+static inline int generic_phy_init(struct phy *phy)
+{
+ return 0;
+}
+
+static inline int generic_phy_exit(struct phy *phy)
+{
+ return 0;
+}
+
+static inline int generic_phy_reset(struct phy *phy)
+{
+ return 0;
+}
+
+static inline int generic_phy_power_on(struct phy *phy)
+{
+ return 0;
+}
+
+static inline int generic_phy_power_off(struct phy *phy)
+{
+ return 0;
+}
+
+static inline int generic_phy_get_by_index(struct udevice *user, int index,
+ struct phy *phy)
+{
+ return 0;
+}
+
+static inline int generic_phy_get_by_name(struct udevice *user, const char *phy_name,
+ struct phy *phy)
+{
+ return 0;
+}
+
+#endif /* CONFIG_PHY */
+
+/**
+ * generic_phy_valid() - check if PHY port is valid
+ *
+ * @phy: the PHY port to check
+ * @return TRUE if valid, or FALSE
+ */
+static inline bool generic_phy_valid(struct phy *phy)
+{
+ return phy->dev != NULL;
+}
+
#endif /*__GENERIC_PHY_H */
int reset_get_by_name(struct udevice *dev, const char *name,
struct reset_ctl *reset_ctl);
+/**
+ * reset_request - Request a reset signal.
+ *
+ * @reset_ctl: A reset control struct.
+ *
+ * @return 0 if OK, or a negative error code.
+ */
+int reset_request(struct reset_ctl *reset_ctl);
+
/**
* reset_free - Free a previously requested reset signal.
*
*/
int reset_deassert(struct reset_ctl *reset_ctl);
+/**
+ * reset_release_all - Assert/Free an array of previously requested resets.
+ *
+ * For each reset contained in the reset array, this function will check if
+ * reset has been previously requested and then will assert and free it.
+ *
+ * @reset_ctl: A reset struct array that was previously successfully
+ * requested by reset_get_by_*().
+ * @count Number of reset contained in the array
+ * @return 0 if OK, or a negative error code.
+ */
+int reset_release_all(struct reset_ctl *reset_ctl, int count);
#else
static inline int reset_get_by_index(struct udevice *dev, int index,
struct reset_ctl *reset_ctl)
{
return 0;
}
+
+static inline int reset_release_all(struct reset_ctl *reset_ctl, int count)
+{
+ return 0;
+}
+
#endif
#endif
unsigned short wHubChange;
} __attribute__ ((packed));
+/*
+ * Hub Device descriptor
+ * USB Hub class device protocols
+ */
+#define USB_HUB_PR_FS 0 /* Full speed hub */
+#define USB_HUB_PR_HS_NO_TT 0 /* Hi-speed hub without TT */
+#define USB_HUB_PR_HS_SINGLE_TT 1 /* Hi-speed hub with single TT */
+#define USB_HUB_PR_HS_MULTI_TT 2 /* Hi-speed hub with multiple TT */
+#define USB_HUB_PR_SS 3 /* Super speed hub */
+
+/* Transaction Translator Think Times, in bits */
+#define HUB_TTTT_8_BITS 0x00
+#define HUB_TTTT_16_BITS 0x20
+#define HUB_TTTT_24_BITS 0x40
+#define HUB_TTTT_32_BITS 0x60
/* Hub descriptor */
struct usb_hub_descriptor {
unsigned short wHubCharacteristics;
unsigned char bPwrOn2PwrGood;
unsigned char bHubContrCurrent;
- unsigned char DeviceRemovable[(USB_MAXCHILDREN+1+7)/8];
- unsigned char PortPowerCtrlMask[(USB_MAXCHILDREN+1+7)/8];
- /* DeviceRemovable and PortPwrCtrlMask want to be variable-length
- bitmaps that hold max 255 entries. (bit0 is ignored) */
+ /* 2.0 and 3.0 hubs differ here */
+ union {
+ struct {
+ /* add 1 bit for hub status change; round to bytes */
+ __u8 DeviceRemovable[(USB_MAXCHILDREN + 1 + 7) / 8];
+ __u8 PortPowerCtrlMask[(USB_MAXCHILDREN + 1 + 7) / 8];
+ } __attribute__ ((packed)) hs;
+
+ struct {
+ __u8 bHubHdrDecLat;
+ __le16 wHubDelay;
+ __le16 DeviceRemovable;
+ } __attribute__ ((packed)) ss;
+ } u;
} __attribute__ ((packed));
ulong connect_timeout; /* Device connection timeout in ms */
ulong query_delay; /* Device query delay in ms */
int overcurrent_count[USB_MAXCHILDREN]; /* Over-current counter */
+ int hub_depth; /* USB 3.0 hub depth */
+ struct usb_tt tt; /* Transaction Translator */
};
#ifdef CONFIG_DM_USB
* reset_root_port() - Reset usb root port
*/
int (*reset_root_port)(struct udevice *bus, struct usb_device *udev);
+
+ /**
+ * update_hub_device() - Update HCD's internal representation of hub
+ *
+ * After a hub descriptor is fetched, notify HCD so that its internal
+ * representation of this hub can be updated (xHCI)
+ */
+ int (*update_hub_device)(struct udevice *bus, struct usb_device *udev);
};
#define usb_get_ops(dev) ((struct dm_usb_ops *)(dev)->driver->ops)
int usb_setup_device(struct usb_device *dev, bool do_read,
struct usb_device *parent);
+/**
+ * usb_hub_is_root_hub() - Test whether a hub device is root hub or not
+ *
+ * @hub: USB hub device to test
+ * @return: true if the hub device is root hub, false otherwise.
+ */
+bool usb_hub_is_root_hub(struct udevice *hub);
+
/**
* usb_hub_scan() - Scan a hub and find its devices
*
int usb_hub_probe(struct usb_device *dev, int ifnum);
void usb_hub_reset(void);
-/**
- * legacy_hub_port_reset() - reset a port given its usb_device pointer
- *
- * Reset a hub port and see if a device is present on that port, providing
- * sufficient time for it to show itself. The port status is returned.
- *
- * With driver model this moves to hub_port_reset() and is passed a struct
- * udevice.
- *
- * @dev: USB device to reset
- * @port: Port number to reset (note ports are numbered from 0 here)
- * @portstat: Returns port status
- */
-int legacy_hub_port_reset(struct usb_device *dev, int port,
- unsigned short *portstat);
-
-int hub_port_reset(struct udevice *dev, int port, unsigned short *portstat);
-
/*
* usb_find_usb2_hub_address_port() - Get hub address and port for TT setting
*
int usb_alloc_device(struct usb_device *dev);
+/**
+ * update_hub_device() - Update HCD's internal representation of hub
+ *
+ * After a hub descriptor is fetched, notify HCD so that its internal
+ * representation of this hub can be updated.
+ *
+ * @dev: Hub device
+ * @return 0 if OK, -ve on error
+ */
+int usb_update_hub_device(struct usb_device *dev);
+
/**
* usb_emul_setup_device() - Set up a new USB device emulation
*
* @desc_list: List of points or USB descriptors, terminated by NULL.
* The first entry must be struct usb_device_descriptor,
* and others follow on after that.
- * @return 0 if OK, -ve on error
+ * @return 0 if OK, -ENOSYS if not implemented, other -ve on error
*/
int usb_emul_setup_device(struct udevice *dev, int maxpacketsize,
struct usb_string *strings, void **desc_list);
#define USB_DT_REPORT (USB_TYPE_CLASS | 0x02)
#define USB_DT_PHYSICAL (USB_TYPE_CLASS | 0x03)
#define USB_DT_HUB (USB_TYPE_CLASS | 0x09)
+#define USB_DT_SS_HUB (USB_TYPE_CLASS | 0x0a)
/* Descriptor sizes per descriptor type */
#define USB_DT_DEVICE_SIZE 18
/*
* Changes to wPortStatus bit field in USB 3.0
- * See USB 3.0 spec Table 10-11
+ * See USB 3.0 spec Table 10-10
*/
#define USB_SS_PORT_STAT_LINK_STATE 0x01e0
#define USB_SS_PORT_STAT_POWER 0x0200
#define USB_SS_PORT_STAT_SPEED 0x1c00
#define USB_SS_PORT_STAT_SPEED_5GBPS 0x0000
+/* Bits that are the same from USB 2.0 */
+#define USB_SS_PORT_STAT_MASK (USB_PORT_STAT_CONNECTION | \
+ USB_PORT_STAT_ENABLE | \
+ USB_PORT_STAT_OVERCURRENT | \
+ USB_PORT_STAT_RESET)
/* wPortChange bits */
#define USB_PORT_STAT_C_CONNECTION 0x0001
#define HUB_CHAR_LPSM 0x0003
#define HUB_CHAR_COMPOUND 0x0004
#define HUB_CHAR_OCPM 0x0018
+#define HUB_CHAR_TTTT 0x0060 /* TT Think Time mask */
/*
* Hub Status & Hub Change bit masks
/* Mask for wIndex in get/set port feature */
#define USB_HUB_PORT_MASK 0xf
+/* Hub class request codes */
+#define USB_REQ_SET_HUB_DEPTH 0x0c
+
+/*
+ * As of USB 2.0, full/low speed devices are segregated into trees.
+ * One type grows from USB 1.1 host controllers (OHCI, UHCI etc).
+ * The other type grows from high speed hubs when they connect to
+ * full/low speed devices using "Transaction Translators" (TTs).
+ */
+struct usb_tt {
+ bool multi; /* true means one TT per port */
+ unsigned think_time; /* think time in ns */
+};
+
/*
* CBI style
*/
CONFIG_SYS_USBCTRL
CONFIG_SYS_USBD_BASE
CONFIG_SYS_USB_EHCI_CPU_INIT
-CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS
CONFIG_SYS_USB_EHCI_REGS_BASE
CONFIG_SYS_USB_FAT_BOOT_PARTITION
CONFIG_SYS_USB_HOST
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS
CONFIG_SYS_USB_OHCI_REGS_BASE
CONFIG_SYS_USB_OHCI_SLOT_NAME
-CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS
CONFIG_SYS_USER_SWITCHES_BASE
CONFIG_SYS_USE_BOOT_NORFLASH
CONFIG_SYS_USE_DATAFLASH
CONFIG_USB_XHCI_FSL
CONFIG_USB_XHCI_KEYSTONE
CONFIG_USB_XHCI_OMAP
-CONFIG_USB_XHCI_PCI
CONFIG_USER_LOWLEVEL_INIT
CONFIG_USE_FDT
CONFIG_USE_INTERRUPT
projects / people / ms / u-boot.git / commitdiff
