]> git.ipfire.org Git - people/ms/u-boot.git/commitdiff
sf: Enable byte program support
authorJagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Fri, 12 Dec 2014 14:06:14 +0000 (19:36 +0530)
committerSimon Glass <sjg@chromium.org>
Sat, 13 Dec 2014 22:08:04 +0000 (15:08 -0700)
Enabled byte program support for sst flashes in sf.

Few controllers will only support BP, so this patch gives
a tx transfer flag to set the BP so-that sf will operate
on byte program transfer.

A new TX operation mode SPI_OPM_TX_BP is introduced for such SPI
controller to use byte program op for SST flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
drivers/mtd/spi/sf_internal.h
drivers/mtd/spi/sf_params.c
drivers/mtd/spi/sf_probe.c
include/spi.h

index fb53cb083470de674e98d7fe75226fadec6a5d41..785f7a96fed28d8d7cb8297fa009705e183c9290 100644 (file)
@@ -40,10 +40,13 @@ enum {
        SECT_4K         = 1 << 0,
        SECT_32K        = 1 << 1,
        E_FSR           = 1 << 2,
-       WR_QPP          = 1 << 3,
+       SST_BP          = 1 << 3,
        SST_WP          = 1 << 4,
+       WR_QPP          = 1 << 5,
 };
 
+#define SST_WR         (SST_BP | SST_WP)
+
 #define SPI_FLASH_3B_ADDR_LEN          3
 #define SPI_FLASH_CMD_LEN              (1 + SPI_FLASH_3B_ADDR_LEN)
 #define SPI_FLASH_16MB_BOUN            0x1000000
index 0f1f837106630b005ebeca12943b8c5ac700babd..30875b36602accf302a8920ad9f3f2450db46b2b 100644 (file)
@@ -89,16 +89,16 @@ const struct spi_flash_params spi_flash_params_table[] = {
        {"N25Q1024A",      0x20bb21, 0x0,       64 * 1024,  2048, RD_FULL, WR_QPP | E_FSR | SECT_4K},
 #endif
 #ifdef CONFIG_SPI_FLASH_SST            /* SST */
-       {"SST25VF040B",    0xbf258d, 0x0,       64 * 1024,     8, RD_NORM,          SECT_4K | SST_WP},
-       {"SST25VF080B",    0xbf258e, 0x0,       64 * 1024,    16, RD_NORM,          SECT_4K | SST_WP},
-       {"SST25VF016B",    0xbf2541, 0x0,       64 * 1024,    32, RD_NORM,          SECT_4K | SST_WP},
-       {"SST25VF032B",    0xbf254a, 0x0,       64 * 1024,    64, RD_NORM,          SECT_4K | SST_WP},
+       {"SST25VF040B",    0xbf258d, 0x0,       64 * 1024,     8, RD_NORM,          SECT_4K | SST_WR},
+       {"SST25VF080B",    0xbf258e, 0x0,       64 * 1024,    16, RD_NORM,          SECT_4K | SST_WR},
+       {"SST25VF016B",    0xbf2541, 0x0,       64 * 1024,    32, RD_NORM,          SECT_4K | SST_WR},
+       {"SST25VF032B",    0xbf254a, 0x0,       64 * 1024,    64, RD_NORM,          SECT_4K | SST_WR},
        {"SST25VF064C",    0xbf254b, 0x0,       64 * 1024,   128, RD_NORM,                   SECT_4K},
-       {"SST25WF512",     0xbf2501, 0x0,       64 * 1024,     1, RD_NORM,          SECT_4K | SST_WP},
-       {"SST25WF010",     0xbf2502, 0x0,       64 * 1024,     2, RD_NORM,          SECT_4K | SST_WP},
-       {"SST25WF020",     0xbf2503, 0x0,       64 * 1024,     4, RD_NORM,          SECT_4K | SST_WP},
-       {"SST25WF040",     0xbf2504, 0x0,       64 * 1024,     8, RD_NORM,          SECT_4K | SST_WP},
-       {"SST25WF080",     0xbf2505, 0x0,       64 * 1024,    16, RD_NORM,          SECT_4K | SST_WP},
+       {"SST25WF512",     0xbf2501, 0x0,       64 * 1024,     1, RD_NORM,          SECT_4K | SST_WR},
+       {"SST25WF010",     0xbf2502, 0x0,       64 * 1024,     2, RD_NORM,          SECT_4K | SST_WR},
+       {"SST25WF020",     0xbf2503, 0x0,       64 * 1024,     4, RD_NORM,          SECT_4K | SST_WR},
+       {"SST25WF040",     0xbf2504, 0x0,       64 * 1024,     8, RD_NORM,          SECT_4K | SST_WR},
+       {"SST25WF080",     0xbf2505, 0x0,       64 * 1024,    16, RD_NORM,          SECT_4K | SST_WR},
 #endif
 #ifdef CONFIG_SPI_FLASH_WINBOND                /* WINBOND */
        {"W25P80",         0xef2014, 0x0,       64 * 1024,    16, RD_NORM,                         0},
index 7cde4c052ab71d912e91a77b132b9b6a7b6df910..ce9987fd1a8770aeb8d948030a792553b511ed80 100644 (file)
@@ -136,8 +136,12 @@ static int spi_flash_validate_params(struct spi_slave *spi, u8 *idcode,
 #ifndef CONFIG_DM_SPI_FLASH
        flash->write = spi_flash_cmd_write_ops;
 #if defined(CONFIG_SPI_FLASH_SST)
-       if (params->flags & SST_WP)
-               flash->write = sst_write_wp;
+       if (params->flags & SST_WR) {
+               if (flash->spi->op_mode_tx & SPI_OPM_TX_BP)
+                       flash->write = sst_write_bp;
+               else
+                       flash->write = sst_write_wp;
+       }
 #endif
        flash->erase = spi_flash_cmd_erase_ops;
        flash->read = spi_flash_cmd_read_ops;
index 5b7827113d9a693ccaa26fee8fe7d0f87105d5d1..ec17bd0bcc8963e4c4e402e57c0003d3b839b568 100644 (file)
@@ -34,6 +34,7 @@
 
 /* SPI TX operation modes */
 #define SPI_OPM_TX_QPP         (1 << 0)
+#define SPI_OPM_TX_BP          (1 << 1)
 
 /* SPI RX operation modes */
 #define SPI_OPM_RX_AS          (1 << 0)