select CMD_FS_GENERIC
select CMD_MII if NET
select CMD_PING if NET
- select CMD_PART
+ select CMD_PART if PARTITIONS
select HUSH_PARSER
+ select BOOTP_BOOTPATH if NET
+ select BOOTP_DNS if NET
+ select BOOTP_GATEWAY if NET
+ select BOOTP_HOSTNAME if NET
+ select BOOTP_PXE if NET
+ select BOOTP_SUBNETMASK if NET
+ select CMDLINE_EDITING
+ select AUTO_COMPLETE
+ select SYS_LONGHELP
+ select SUPPORT_RAW_INITRD
+ select ENV_VARS_UBOOT_CONFIG
help
Select this to enable various options and commands which are suitable
for building u-boot for booting general purpose Linux distributions.
+config ENV_VARS_UBOOT_CONFIG
+ bool "Add arch, board, vendor and soc variables to default environment"
+ help
+ Define this in order to add variables describing the
+ U-Boot build configuration to the default environment.
+ These will be named arch, cpu, board, vendor, and soc.
+ Enabling this option will cause the following to be defined:
+ - CONFIG_SYS_ARCH
+ - CONFIG_SYS_CPU
+ - CONFIG_SYS_BOARD
+ - CONFIG_SYS_VENDOR
+ - CONFIG_SYS_SOC
+
config SYS_BOOT_GET_CMDLINE
bool "Enable kernel command line setup"
help
F: drivers/pinctrl/rockchip/
F: drivers/ram/rockchip/
F: drivers/sysreset/sysreset_rockchip.c
+F: drivers/video/rockchip/
F: tools/rkcommon.c
F: tools/rkcommon.h
F: tools/rkimage.c
VERSION = 2018
PATCHLEVEL = 03
SUBLEVEL =
-EXTRAVERSION = -rc2
+EXTRAVERSION = -rc3
NAME =
# *DOCUMENTATION*
# Avoid 'Not enough room for program headers' error on binutils 2.28 onwards.
LDFLAGS_u-boot += $(call ld-option, --no-dynamic-linker)
-ifneq ($(CONFIG_SYS_TEXT_BASE),)
+ifeq ($(CONFIG_ARC)$(CONFIG_NIOS2)$(CONFIG_X86)$(CONFIG_XTENSA),)
LDFLAGS_u-boot += -Ttext $(CONFIG_SYS_TEXT_BASE)
endif
as a convenience, when switching between booting from
RAM and NFS.
-- Bootcount:
- CONFIG_BOOTCOUNT_ENV
- If no softreset save registers are found on the hardware
- "bootcount" is stored in the environment. To prevent a
- saveenv on all reboots, the environment variable
- "upgrade_available" is used. If "upgrade_available" is
- 0, "bootcount" is always 0, if "upgrade_available" is
- 1 "bootcount" is incremented in the environment.
- So the Userspace Applikation must set the "upgrade_available"
- and "bootcount" variable to 0, if a boot was successfully.
-
- Pre-Boot Commands:
CONFIG_PREBOOT
key for the Replay Protection Memory Block partition in eMMC.
- USB Device Firmware Update (DFU) class support:
- CONFIG_USB_FUNCTION_DFU
+ CONFIG_DFU_OVER_USB
This enables the USB portion of the DFU USB class
CONFIG_DFU_MMC
You can fine tune the DHCP functionality by defining
CONFIG_BOOTP_* symbols:
- CONFIG_BOOTP_SUBNETMASK
- CONFIG_BOOTP_GATEWAY
- CONFIG_BOOTP_HOSTNAME
CONFIG_BOOTP_NISDOMAIN
- CONFIG_BOOTP_BOOTPATH
CONFIG_BOOTP_BOOTFILESIZE
- CONFIG_BOOTP_DNS
- CONFIG_BOOTP_DNS2
CONFIG_BOOTP_SEND_HOSTNAME
CONFIG_BOOTP_NTPSERVER
CONFIG_BOOTP_TIMEOFFSET
to Link-local IP address configuration if the DHCP server
is not available.
- CONFIG_BOOTP_DNS2 - If a DHCP client requests the DNS
- serverip from a DHCP server, it is possible that more
- than one DNS serverip is offered to the client.
- If CONFIG_BOOTP_DNS2 is enabled, the secondary DNS
- serverip will be stored in the additional environment
- variable "dnsip2". The first DNS serverip is always
- stored in the variable "dnsip", when CONFIG_BOOTP_DNS
- is defined.
-
CONFIG_BOOTP_SEND_HOSTNAME - Some DHCP servers are capable
to do a dynamic update of a DNS server. To do this, they
need the hostname of the DHCP requester.
#define CONFIG_NFS_TIMEOUT 10000UL
- Command Interpreter:
- CONFIG_AUTO_COMPLETE
-
- Enable auto completion of commands using TAB.
-
CONFIG_SYS_PROMPT_HUSH_PS2
This defines the secondary prompt string, which is
symbols.
- Command Line Editing and History:
- CONFIG_CMDLINE_EDITING
-
- Enable editing and History functions for interactive
- command line input operations
-
-- Command Line PS1/PS2 support:
CONFIG_CMDLINE_PS_SUPPORT
Enable support for changing the command prompt string
the environment like the "source" command or the
boot command first.
- CONFIG_ENV_VARS_UBOOT_CONFIG
-
- Define this in order to add variables describing the
- U-Boot build configuration to the default environment.
- These will be named arch, cpu, board, vendor, and soc.
-
- Enabling this option will cause the following to be defined:
-
- - CONFIG_SYS_ARCH
- - CONFIG_SYS_CPU
- - CONFIG_SYS_BOARD
- - CONFIG_SYS_VENDOR
- - CONFIG_SYS_SOC
-
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
Define this in order to add variables describing certain
A better solution is to properly configure the firewall,
but sometimes that is not allowed.
-- bootcount support:
- CONFIG_AT91SAM9XE
- enable special bootcounter support on at91sam9xe based boards.
- CONFIG_SOC_DA8XX
- enable special bootcounter support on da850 based boards.
- CONFIG_BOOTCOUNT_RAM
- enable support for the bootcounter in RAM
- CONFIG_BOOTCOUNT_I2C
- enable support for the bootcounter on an i2c (like RTC) device.
- CONFIG_SYS_I2C_RTC_ADDR = i2c chip address
- CONFIG_SYS_BOOTCOUNT_ADDR = i2c addr which is used for
- the bootcounter.
- CONFIG_BOOTCOUNT_ALEN = address len
- CONFIG_BOOTCOUNT_EXT
- enable support for the bootcounter in EXT filesystem
- CONFIG_SYS_BOOTCOUNT_ADDR = RAM address used for read
- and write.
- CONFIG_SYS_BOOTCOUNT_EXT_INTERFACE = interface
- CONFIG_SYS_BOOTCOUNT_EXT_DEVPART = device and part
- CONFIG_SYS_BOOTCOUNT_EXT_NAME = filename
-
- Show boot progress:
CONFIG_SHOW_BOOT_PROGRESS
lmb_reserve(lmb, sp, (CONFIG_SYS_SDRAM_BASE + gd->ram_size - sp));
}
-int arch_fixup_fdt(void *blob)
-{
- return 0;
-}
-
static int cleanup_before_linux(void)
{
disable_interrupts();
endchoice
+config TI_SECURE_DEVICE
+ bool "HS Device Type Support"
+ depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS
+ help
+ If a high secure (HS) device type is being used, this config
+ must be set. This option impacts various aspects of the
+ build system (to create signed boot images that can be
+ authenticated) and the code. See the doc/README.ti-secure
+ file for further details.
+
source "arch/arm/mach-aspeed/Kconfig"
source "arch/arm/mach-at91/Kconfig"
pinctrl-1 = <&mmc1_pins_hs>;
vmmc-supply = <&ldo1_reg>;
+ /delete-property/ sd-uhs-sdr104;
+ /delete-property/ sd-uhs-sdr50;
+ /delete-property/ sd-uhs-ddr50;
+ /delete-property/ sd-uhs-sdr25;
+ /delete-property/ sd-uhs-sdr12;
};
&mmc2 {
pinctrl-0 = <&mmc2_pins_default>;
pinctrl-1 = <&mmc2_pins_hs>;
pinctrl-2 = <&mmc2_pins_ddr_3_3v_rev11 &mmc2_iodelay_ddr_3_3v_rev11_conf>;
+ /delete-property/ mmc-hs200-1_8v;
};
/* errata i880 "Ethernet RGMII2 Limited to 10/100 Mbps" */
bus-width = <8>;
ti,non-removable;
max-frequency = <96000000>;
+ no-1-8-v;
+ /delete-property/ mmc-hs200-1_8v;
};
&dcan1 {
};
mmc1: mmc@4809c000 {
- compatible = "ti,omap4-hsmmc";
+ compatible = "ti,dra7-hsmmc", "ti,omap4-hsmmc";
reg = <0x4809c000 0x400>;
interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mmc1";
status = "disabled";
pbias-supply = <&pbias_mmc_reg>;
max-frequency = <192000000>;
+ sd-uhs-sdr104;
+ sd-uhs-sdr50;
+ sd-uhs-ddr50;
+ sd-uhs-sdr25;
+ sd-uhs-sdr12;
};
mmc2: mmc@480b4000 {
- compatible = "ti,omap4-hsmmc";
+ compatible = "ti,dra7-hsmmc", "ti,omap4-hsmmc";
reg = <0x480b4000 0x400>;
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mmc2";
dma-names = "tx", "rx";
status = "disabled";
max-frequency = <192000000>;
+ sd-uhs-sdr25;
+ sd-uhs-sdr12;
+ mmc-hs200-1_8v;
+ mmc-ddr-1_8v;
};
mmc3: mmc@480ad000 {
- compatible = "ti,omap4-hsmmc";
+ compatible = "ti,dra7-hsmmc", "ti,omap4-hsmmc";
reg = <0x480ad000 0x400>;
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mmc3";
status = "disabled";
/* Errata i887 limits max-frequency of MMC3 to 64 MHz */
max-frequency = <64000000>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
};
mmc4: mmc@480d1000 {
- compatible = "ti,omap4-hsmmc";
+ compatible = "ti,dra7-hsmmc", "ti,omap4-hsmmc";
reg = <0x480d1000 0x400>;
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mmc4";
dma-names = "tx", "rx";
status = "disabled";
max-frequency = <192000000>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
};
mmu0_dsp1: mmu@40d01000 {
/* CM_L3INIT_HSMMCn_CLKCTRL */
#define HSMMC_CLKCTRL_CLKSEL_MASK (1 << 24)
-#define HSMMC_CLKCTRL_CLKSEL_DIV_MASK (1 << 25)
+#define HSMMC_CLKCTRL_CLKSEL_DIV_MASK (3 << 25)
/* CM_L3INIT_SATA_CLKCTRL */
#define SATA_CLKCTRL_OPTFCLKEN_MASK (1 << 8)
void __recalibrate_iodelay(struct pad_conf_entry const *pad, int npads,
struct iodelay_cfg_entry const *iodelay,
int niodelays);
+void late_recalibrate_iodelay(struct pad_conf_entry const *pad, int npads,
+ struct iodelay_cfg_entry const *iodelay,
+ int niodelays);
int __recalibrate_iodelay_start(void);
void __recalibrate_iodelay_end(int ret);
u32 val;
};
+struct mmc_platform_fixups {
+ const char *hw_rev;
+ u32 unsupported_caps;
+ u32 max_freq;
+};
+
struct omap_sysinfo {
char *board_string;
};
void get_ioregs(const struct ctrl_ioregs **regs);
void srcomp_enable(void);
void setup_warmreset_time(void);
+const struct mmc_platform_fixups *platform_fixups_mmc(uint32_t addr);
static inline u32 div_round_up(u32 num, u32 den)
{
unsigned int sysstatus; /* 0x14 */
unsigned char res2[0x14];
unsigned int con; /* 0x2C */
- unsigned char res3[0xD4];
+ unsigned int pwcnt; /* 0x30 */
+ unsigned int dll; /* 0x34 */
+ unsigned char res3[0xcc];
unsigned int blk; /* 0x104 */
unsigned int arg; /* 0x108 */
unsigned int cmd; /* 0x10C */
unsigned int sysctl; /* 0x12C */
unsigned int stat; /* 0x130 */
unsigned int ie; /* 0x134 */
- unsigned char res4[0x8];
+ unsigned char res4[0x4];
+ unsigned int ac12; /* 0x13C */
unsigned int capa; /* 0x140 */
- unsigned char res5[0x10];
+ unsigned int capa2; /* 0x144 */
+ unsigned char res5[0xc];
unsigned int admaes; /* 0x154 */
unsigned int admasal; /* 0x158 */
};
struct hsmmc *base_addr;
struct mmc mmc;
bool cd_inverted;
+ u32 controller_flags;
+ const char *hw_rev;
};
/*
#define WPP_ACTIVEHIGH (0x0 << 8)
#define RESERVED_MASK (0x3 << 9)
#define CTPL_MMC_SD (0x0 << 11)
+#define DDR (0x1 << 19)
#define DMA_MASTER (0x1 << 20)
#define BLEN_512BYTESLEN (0x200 << 0)
#define NBLK_STPCNT (0x0 << 16)
#define DTW_8_BITMODE (0x1 << 5) /* CON[DW8]*/
#define SDBP_PWROFF (0x0 << 8)
#define SDBP_PWRON (0x1 << 8)
+#define SDVS_MASK (0x7 << 9)
#define SDVS_1V8 (0x5 << 9)
#define SDVS_3V0 (0x6 << 9)
+#define SDVS_3V3 (0x7 << 9)
#define DMA_SELECT (0x2 << 3)
#define ICE_MASK (0x1 << 0)
#define ICE_STOP (0x0 << 0)
#define IE_CERR (0x01 << 28)
#define IE_BADA (0x01 << 29)
-#define VS30_3V0SUP (1 << 25)
-#define VS18_1V8SUP (1 << 26)
+#define VS33_3V3SUP BIT(24)
+#define VS30_3V0SUP BIT(25)
+#define VS18_1V8SUP BIT(26)
+
+#define AC12_ET BIT(22)
+#define AC12_V1V8_SIGEN BIT(19)
+#define AC12_SCLK_SEL BIT(23)
+#define AC12_UHSMC_MASK (7 << 16)
+#define AC12_UHSMC_DDR50 (4 << 16)
+#define AC12_UHSMC_SDR104 (3 << 16)
+#define AC12_UHSMC_SDR50 (2 << 16)
+#define AC12_UHSMC_SDR25 (1 << 16)
+#define AC12_UHSMC_SDR12 (0 << 16)
+#define AC12_UHSMC_RES (0x7 << 16)
/* Driver definitions */
#define MMCSD_SECTOR_SIZE 512
#define CLK_400KHZ 1
#define CLK_MISC 2
+#define CLKD_MAX 0x3FF /* max clock divisor: 1023 */
+
#define RSP_TYPE_NONE (RSP_TYPE_NORSP | CCCE_NOCHECK | CICE_NOCHECK)
#define MMC_CMD0 (INDEX(0) | RSP_TYPE_NONE | DP_NO_DATA | DDIR_WRITE)
/* Clock Configurations and Macros */
+#ifdef CONFIG_OMAP54XX
+#define MMC_CLOCK_REFERENCE 192 /* MHz */
+#else
#define MMC_CLOCK_REFERENCE 96 /* MHz */
+#endif
+
+/* DLL */
+#define DLL_SWT BIT(20)
+#define DLL_FORCE_SR_C_SHIFT 13
+#define DLL_FORCE_SR_C_MASK 0x7f
+#define DLL_FORCE_VALUE BIT(12)
+#define DLL_CALIB BIT(1)
+
+#define MAX_PHASE_DELAY 0x7c
+
+/* CAPA2 */
+#define CAPA2_TSDR50 BIT(13)
#define mmc_reg_out(addr, mask, val)\
writel((readl(addr) & (~(mask))) | ((val) & (mask)), (addr))
+#define INT_EN_MASK (IE_BADA | IE_CERR | IE_DEB | IE_DCRC |\
+ IE_DTO | IE_CIE | IE_CEB | IE_CCRC | IE_ADMAE | IE_CTO |\
+ IE_BRR | IE_BWR | IE_TC | IE_CC)
+
+#define CON_CLKEXTFREE BIT(16)
+#define CON_PADEN BIT(15)
+#define PSTATE_CLEV BIT(24)
+#define PSTATE_DLEV (0xF << 20)
+#define PSTATE_DLEV_DAT0 (0x1 << 20)
+
int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max, int cd_gpio,
int wp_gpio);
{
int i;
- if (gd->flags & GD_FLG_RELOC) {
- printf("ELR: %lx\n", regs->elr - gd->reloc_off);
- printf("LR: %lx\n", regs->regs[30] - gd->reloc_off);
- } else {
- printf("ELR: %lx\n", regs->elr);
- printf("LR: %lx\n", regs->regs[30]);
- }
+ if (gd->flags & GD_FLG_RELOC)
+ printf("elr: %016lx lr : %016lx (reloc)\n",
+ regs->elr - gd->reloc_off,
+ regs->regs[30] - gd->reloc_off);
+ printf("elr: %016lx lr : %016lx\n", regs->elr, regs->regs[30]);
+
for (i = 0; i < 29; i += 2)
printf("x%-2d: %016lx x%-2d: %016lx\n",
i, regs->regs[i], i+1, regs->regs[i+1]);
help
Defines the MPU clock speed (in MHz).
-config TI_SECURE_DEVICE
- bool "HS Device Type Support"
- depends on OMAP54XX || AM43XX || AM33XX || ARCH_KEYSTONE
- help
- If a high secure (HS) device type is being used, this config
- must be set. This option impacts various aspects of the
- build system (to create signed boot images that can be
- authenticated) and the code. See the doc/README.ti-secure
- file for further details.
-
config TI_SECURE_EMIF_REGION_START
hex "Reserved EMIF region start address"
depends on TI_SECURE_DEVICE
__recalibrate_iodelay_end(ret);
}
+
+void late_recalibrate_iodelay(struct pad_conf_entry const *pad, int npads,
+ struct iodelay_cfg_entry const *iodelay,
+ int niodelays)
+{
+ int ret = 0;
+
+ /* unlock IODELAY CONFIG registers */
+ writel(CFG_IODELAY_UNLOCK_KEY, (*ctrl)->iodelay_config_base +
+ CFG_REG_8_OFFSET);
+
+ ret = calibrate_iodelay((*ctrl)->iodelay_config_base);
+ if (ret)
+ goto err;
+
+ ret = update_delay_mechanism((*ctrl)->iodelay_config_base);
+
+ /* Configure Mux settings */
+ do_set_mux32((*ctrl)->control_padconf_core_base, pad, npads);
+
+ /* Configure Manual IO timing modes */
+ ret = do_set_iodelay((*ctrl)->iodelay_config_base, iodelay, niodelays);
+ if (ret)
+ goto err;
+
+err:
+ /* lock IODELAY CONFIG registers */
+ writel(CFG_IODELAY_LOCK_KEY, (*ctrl)->iodelay_config_base +
+ CFG_REG_8_OFFSET);
+}
setbits_le32((*prcm)->cm_l4per_gpio4_clkctrl,
GPIO4_CLKCTRL_OPTFCLKEN_MASK);
- /* Enable 96 MHz clock for MMC1 & MMC2 */
+ /* Enable 192 MHz clock for MMC1 & MMC2 */
setbits_le32((*prcm)->cm_l3init_hsmmc1_clkctrl,
HSMMC_CLKCTRL_CLKSEL_MASK);
setbits_le32((*prcm)->cm_l3init_hsmmc2_clkctrl,
HSMMC_CLKCTRL_CLKSEL_MASK);
/* Set the correct clock dividers for mmc */
- setbits_le32((*prcm)->cm_l3init_hsmmc1_clkctrl,
- HSMMC_CLKCTRL_CLKSEL_DIV_MASK);
- setbits_le32((*prcm)->cm_l3init_hsmmc2_clkctrl,
- HSMMC_CLKCTRL_CLKSEL_DIV_MASK);
+ clrbits_le32((*prcm)->cm_l3init_hsmmc1_clkctrl,
+ HSMMC_CLKCTRL_CLKSEL_DIV_MASK);
+ clrbits_le32((*prcm)->cm_l3init_hsmmc2_clkctrl,
+ HSMMC_CLKCTRL_CLKSEL_DIV_MASK);
/* Select 32KHz clock as the source of GPTIMER1 */
setbits_le32((*prcm)->cm_wkup_gptimer1_clkctrl,
DECLARE_GLOBAL_DATA_PTR;
-int arch_fixup_fdt(void *blob)
-{
- return 0;
-}
-
int do_bootm_linux(int flag, int argc, char * const argv[],
bootm_headers_t *images)
{
#endif
}
+#if CONFIG_IS_ENABLED(MIPS_BOOT_FDT) && CONFIG_IS_ENABLED(OF_LIBFDT)
int arch_fixup_fdt(void *blob)
{
-#if CONFIG_IS_ENABLED(MIPS_BOOT_FDT) && CONFIG_IS_ENABLED(OF_LIBFDT)
u64 mem_start = virt_to_phys((void *)gd->bd->bi_memstart);
u64 mem_size = gd->ram_size;
return fdt_fixup_memory_banks(blob, &mem_start, &mem_size, 1);
-#else
- return 0;
-#endif
}
+#endif
static int boot_setup_fdt(bootm_headers_t *images)
{
DECLARE_GLOBAL_DATA_PTR;
-int arch_fixup_fdt(void *blob)
-{
- return 0;
-}
-
-
#if defined(CONFIG_SETUP_MEMORY_TAGS) || \
defined(CONFIG_CMDLINE_TAG) || \
defined(CONFIG_INITRD_TAG) || \
#define CONFIG_SYS_LINUX_LOWMEM_MAX_SIZE (768*1024*1024)
#endif
-int arch_fixup_fdt(void *blob)
-{
- return 0;
-}
-
static void boot_jump_linux(bootm_headers_t *images)
{
void (*kernel)(bd_t *, ulong r4, ulong r5, ulong r6,
config SYS_CPU
default "sandbox"
+config SANDBOX64
+ bool "Use 64-bit addresses"
+ select PHYS_64BIT
+ select HOST_64BIT
+
config SANDBOX_SPL
bool "Enable SPL for sandbox"
select SUPPORT_SPL
choice
prompt "Run sandbox on 32/64-bit host"
- default SANDBOX_64BIT
+ default HOST_64BIT
help
Sandbox can be built on 32-bit and 64-bit hosts.
The default is to build on a 64-bit host and run
on a 64-bit host. If you want to run sandbox on
a 32-bit host, change it here.
-config SANDBOX_32BIT
+config HOST_32BIT
bool "32-bit host"
+ depends on !PHYS_64BIT
-config SANDBOX_64BIT
+config HOST_64BIT
bool "64-bit host"
endchoice
config SANDBOX_BITS_PER_LONG
int
- default 32 if SANDBOX_32BIT
- default 64 if SANDBOX_64BIT
+ default 32 if HOST_32BIT
+ default 64 if HOST_64BIT
endmenu
if (enable_pci_map && !pci_map_physmem(paddr, &len, &map_dev, &ptr)) {
if (plen != len) {
printf("%s: Warning: partial map at %x, wanted %lx, got %lx\n",
- __func__, paddr, len, plen);
+ __func__, (uint)paddr, len, plen);
}
map_len = len;
return ptr;
# SPDX-License-Identifier: GPL-2.0+
#
+ifdef CONFIG_SANDBOX64
+dtb-$(CONFIG_SANDBOX) += sandbox64.dtb
+else
dtb-$(CONFIG_SANDBOX) += sandbox.dtb
+endif
dtb-$(CONFIG_UT_DM) += test.dtb
targets += $(dtb-y)
compatible = "sandbox,gpio";
#gpio-cells = <1>;
gpio-bank-name = "a";
- num-gpios = <20>;
+ sandbox,gpio-count = <20>;
};
gpio_b: gpios@1 {
compatible = "sandbox,gpio";
#gpio-cells = <2>;
gpio-bank-name = "b";
- num-gpios = <10>;
+ sandbox,gpio-count = <10>;
};
hexagon {
--- /dev/null
+/dts-v1/;
+
+#define USB_CLASS_HUB 9
+
+/ {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ model = "sandbox";
+
+ aliases {
+ eth5 = "/eth@90000000";
+ i2c0 = &i2c_0;
+ pci0 = &pci;
+ rtc0 = &rtc_0;
+ };
+
+ chosen {
+ stdout-path = "/serial";
+ };
+
+ cros_ec: cros-ec@0 {
+ reg = <0 0 0 0>;
+ compatible = "google,cros-ec-sandbox";
+
+ /*
+ * This describes the flash memory within the EC. Note
+ * that the STM32L flash erases to 0, not 0xff.
+ */
+ #address-cells = <1>;
+ #size-cells = <1>;
+ flash@8000000 {
+ reg = <0x08000000 0x20000>;
+ erase-value = <0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ /* Information for sandbox */
+ ro {
+ reg = <0 0xf000>;
+ };
+ wp-ro {
+ reg = <0xf000 0x1000>;
+ };
+ rw {
+ reg = <0x10000 0x10000>;
+ };
+ };
+ };
+
+ eth@10002000 {
+ compatible = "sandbox,eth";
+ reg = <0x0 0x10002000 0x0 0x1000>;
+ fake-host-hwaddr = [00 00 66 44 22 00];
+ };
+
+ eth@80000000 {
+ compatible = "sandbox,eth-raw";
+ reg = <0x0 0x80000000 0x0 0x1000>;
+ host-raw-interface = "eth0";
+ };
+
+ eth@90000000 {
+ compatible = "sandbox,eth-raw";
+ reg = <0x0 0x90000000 0x0 0x1000>;
+ host-raw-interface = "lo";
+ };
+
+ gpio_a: gpios@0 {
+ gpio-controller;
+ compatible = "sandbox,gpio";
+ #gpio-cells = <1>;
+ gpio-bank-name = "a";
+ sandbox,gpio-count = <20>;
+ };
+
+ gpio_b: gpios@1 {
+ gpio-controller;
+ compatible = "sandbox,gpio";
+ #gpio-cells = <2>;
+ gpio-bank-name = "b";
+ sandbox,gpio-count = <10>;
+ };
+
+ hexagon {
+ compatible = "demo-simple";
+ colour = "white";
+ sides = <6>;
+ };
+
+ i2c_0: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0 0 0 0>;
+ compatible = "sandbox,i2c";
+ clock-frequency = <400000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c0>;
+ eeprom@2c {
+ reg = <0x2c>;
+ compatible = "i2c-eeprom";
+ emul {
+ compatible = "sandbox,i2c-eeprom";
+ sandbox,filename = "i2c.bin";
+ sandbox,size = <128>;
+ };
+ };
+
+ rtc_0: rtc@43 {
+ reg = <0x43>;
+ compatible = "sandbox-rtc";
+ emul {
+ compatible = "sandbox,i2c-rtc";
+ };
+ };
+ sandbox_pmic: sandbox_pmic {
+ reg = <0x40>;
+ };
+ };
+
+ lcd {
+ u-boot,dm-pre-reloc;
+ compatible = "sandbox,lcd-sdl";
+ xres = <1366>;
+ yres = <768>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ iracibble {
+ gpios = <&gpio_a 1 0>;
+ label = "sandbox:red";
+ };
+
+ martinet {
+ gpios = <&gpio_a 2 0>;
+ label = "sandbox:green";
+ };
+ };
+
+ pci: pci-controller {
+ compatible = "sandbox,pci";
+ device_type = "pci";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges = <0x02000000 0 0x10000000 0 0x10000000 0 0x2000
+ 0x01000000 0 0x20000000 0 0x20000000 0 0x2000>;
+ pci@1f,0 {
+ compatible = "pci-generic";
+ reg = <0xf800 0 0 0 0>;
+ emul@1f,0 {
+ compatible = "sandbox,swap-case";
+ };
+ };
+ };
+
+ pinctrl {
+ compatible = "sandbox,pinctrl";
+
+ pinctrl_i2c0: i2c0 {
+ groups = "i2c";
+ function = "i2c";
+ bias-pull-up;
+ };
+
+ pinctrl_serial0: uart0 {
+ groups = "serial_a";
+ function = "serial";
+ };
+ };
+
+ reset@1 {
+ compatible = "sandbox,reset";
+ };
+
+ spi@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0 0 0 0>;
+ compatible = "sandbox,spi";
+ cs-gpios = <0>, <&gpio_a 0>;
+ firmware_storage_spi: flash@0 {
+ reg = <0>;
+ compatible = "spansion,m25p16", "sandbox,spi-flash";
+ spi-max-frequency = <40000000>;
+ sandbox,filename = "spi.bin";
+ };
+ };
+
+ spl-test {
+ u-boot,dm-pre-reloc;
+ compatible = "sandbox,spl-test";
+ boolval;
+ intval = <1>;
+ intarray = <2 3 4>;
+ byteval = [05];
+ bytearray = [06];
+ longbytearray = [09 0a 0b 0c 0d 0e 0f 10 11];
+ stringval = "message";
+ stringarray = "multi-word", "message";
+ };
+
+ spl-test2 {
+ u-boot,dm-pre-reloc;
+ compatible = "sandbox,spl-test";
+ intval = <3>;
+ intarray = <5>;
+ byteval = [08];
+ bytearray = [01 23 34];
+ longbytearray = [09 0a 0b 0c];
+ stringval = "message2";
+ stringarray = "another", "multi-word", "message";
+ };
+
+ spl-test3 {
+ u-boot,dm-pre-reloc;
+ compatible = "sandbox,spl-test";
+ stringarray = "one";
+ };
+
+ spl-test4 {
+ u-boot,dm-pre-reloc;
+ compatible = "sandbox,spl-test.2";
+ };
+
+ square {
+ compatible = "demo-shape";
+ colour = "blue";
+ sides = <4>;
+ };
+
+ timer {
+ compatible = "sandbox,timer";
+ clock-frequency = <1000000>;
+ };
+
+ tpm {
+ compatible = "google,sandbox-tpm";
+ };
+
+ triangle {
+ compatible = "demo-shape";
+ colour = "cyan";
+ sides = <3>;
+ character = <83>;
+ light-gpios = <&gpio_a 2>, <&gpio_b 6 0>;
+ };
+
+ /* Needs to be available prior to relocation */
+ uart0: serial {
+ compatible = "sandbox,serial";
+ sandbox,text-colour = "cyan";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_serial0>;
+ };
+
+ usb@0 {
+ compatible = "sandbox,usb";
+ status = "disabled";
+ hub {
+ compatible = "sandbox,usb-hub";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ flash-stick {
+ reg = <0>;
+ compatible = "sandbox,usb-flash";
+ };
+ };
+ };
+
+ usb@1 {
+ compatible = "sandbox,usb";
+ hub {
+ compatible = "usb-hub";
+ usb,device-class = <USB_CLASS_HUB>;
+ hub-emul {
+ compatible = "sandbox,usb-hub";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ flash-stick {
+ reg = <0>;
+ compatible = "sandbox,usb-flash";
+ sandbox,filepath = "flash.bin";
+ };
+ };
+ };
+ };
+
+ usb@2 {
+ compatible = "sandbox,usb";
+ status = "disabled";
+ };
+
+ spmi: spmi@0 {
+ compatible = "sandbox,spmi";
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ pm8916@0 {
+ compatible = "qcom,spmi-pmic";
+ reg = <0x0 0x1>;
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+
+ spmi_gpios: gpios@c000 {
+ compatible = "qcom,pm8916-gpio";
+ reg = <0xc000 0x400>;
+ gpio-controller;
+ gpio-count = <4>;
+ #gpio-cells = <2>;
+ gpio-bank-name="spmi";
+ };
+ };
+ };
+};
+
+#include "cros-ec-keyboard.dtsi"
+#include "sandbox_pmic.dtsi"
gpio-controller;
#gpio-cells = <1>;
gpio-bank-name = "a";
- num-gpios = <20>;
+ sandbox,gpio-count = <20>;
};
gpio_b: extra-gpios {
gpio-controller;
#gpio-cells = <5>;
gpio-bank-name = "b";
- num-gpios = <10>;
+ sandbox,gpio-count = <10>;
};
i2c@0 {
};
chosen {
+ #address-cells = <1>;
+ #size-cells = <1>;
chosen-test {
compatible = "denx,u-boot-fdt-test";
reg = <9 1>;
#define readb(addr) ((void)addr, 0)
#define readw(addr) ((void)addr, 0)
#define readl(addr) ((void)addr, 0)
+#ifdef CONFIG_SANDBOX64
+#define readq(addr) ((void)addr, 0)
+#endif
#define writeb(v, addr) ((void)addr)
#define writew(v, addr) ((void)addr)
#define writel(v, addr) ((void)addr)
+#ifdef CONFIG_SANDBOX64
+#define writeq(v, addr) ((void)addr)
+#endif
/*
* Clear and set bits in one shot. These macros can be used to clear and
#endif
/*
- * Number of bits in a C 'long' on this architecture. Set this to 32 when
- * building on a 32-bit machine.
+ * Number of bits in a C 'long' on this architecture.
*/
-#define BITS_PER_LONG 32
-
+#ifdef CONFIG_PHYS64
+#define BITS_PER_LONG 64
+#else /* CONFIG_PHYS64 */
+#define BITS_PER_LONG 32
+#endif /* CONFIG_PHYS64 */
+
+#ifdef CONFIG_PHYS64
+typedef unsigned long long dma_addr_t;
+typedef u64 phys_addr_t;
+typedef u64 phys_size_t;
+#else /* CONFIG_PHYS64 */
typedef unsigned long dma_addr_t;
typedef u32 phys_addr_t;
typedef u32 phys_size_t;
+#endif /* CONFIG_PHYS64 */
#endif /* __KERNEL__ */
return ret;
}
-int arch_fixup_fdt(void *blob)
-{
- return 0;
-}
-
int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)
{
if (flag & (BOOTM_STATE_OS_GO | BOOTM_STATE_OS_FAKE_GO)) {
ENDIANNESS += -EB
ifdef CONFIG_CPU_SH2A
-PLATFORM_CPPFLAGS += -m2a -m2a-nofpu -mb
+PLATFORM_CPPFLAGS += -m2a-nofpu -mb
else # SH2
PLATFORM_CPPFLAGS += -m3e -mb
endif
return __res;
}
-#define __HAVE_ARCH_STRNCMP
-static inline int strncmp(const char *__cs, const char *__ct, size_t __n)
-{
- register int __res;
- unsigned long __dummy;
-
- if (__n == 0)
- return 0;
-
- __asm__ __volatile__(
- "mov.b @%1+, %3\n"
- "1:\n\t"
- "mov.b @%0+, %2\n\t"
- "cmp/eq %6, %0\n\t"
- "bt/s 2f\n\t"
- " cmp/eq #0, %3\n\t"
- "bt/s 3f\n\t"
- " cmp/eq %3, %2\n\t"
- "bt/s 1b\n\t"
- " mov.b @%1+, %3\n\t"
- "add #-2, %1\n\t"
- "mov.b @%1, %3\n"
- "2:\n\t"
- "sub %3, %2\n"
- "3:"
- :"=r" (__cs), "=r" (__ct), "=&r" (__res), "=&z" (__dummy)
- : "0" (__cs), "1" (__ct), "r" (__cs+__n)
- : "t");
-
- return __res;
-}
+#undef __HAVE_ARCH_STRNCMP
+extern int strncmp(const char *__cs, const char *__ct, size_t __n);
#undef __HAVE_ARCH_MEMSET
extern void *memset(void *__s, int __c, size_t __count);
#define COMMAND_LINE_OFFSET 0x9000
-int arch_fixup_fdt(void *blob)
-{
- return 0;
-}
-
__weak void board_quiesce_devices(void)
{
}
#endif
movi a0, 0
- movi sp, (CONFIG_SYS_TEXT_ADDR - 16) & 0xfffffff0
+ movi sp, (XTENSA_SYS_TEXT_ADDR - 16) & 0xfffffff0
#ifdef CONFIG_DEBUG_UART
movi a4, debug_uart_init
SECTION_VECTOR(DoubleExceptionVector,text,XCHAL_DOUBLEEXC_VECTOR_VADDR,
FOLLOWING(.DoubleExceptionVector.literal))
- __monitor_start = CONFIG_SYS_TEXT_ADDR;
+ __monitor_start = XTENSA_SYS_TEXT_ADDR;
- SECTION_text(CONFIG_SYS_TEXT_ADDR, FOLLOWING(.DoubleExceptionVector.text))
+ SECTION_text(XTENSA_SYS_TEXT_ADDR, FOLLOWING(.DoubleExceptionVector.text))
SECTION_rodata(ALIGN(16), FOLLOWING(.text))
SECTION_u_boot_list(ALIGN(16), FOLLOWING(.rodata))
SECTION_data(ALIGN(16), FOLLOWING(.u_boot_list))
-VEXPRESS BOARD
-#M: -
+VERSATILE EXPRESS BOARDS
+M: Linus Walleij <linus.walleij@linaro.org>
S: Maintained
F: board/armltd/vexpress/
F: include/configs/vexpress_ca15_tc2.h
F: configs/vexpress_ca15_tc2_defconfig
-
-VEXPRESS_CA5X2 BOARD
-#M: Matt Waddel <matt.waddel@linaro.org>
-S: Orphan (since 2014-08)
F: include/configs/vexpress_ca5x2.h
F: configs/vexpress_ca5x2_defconfig
F: include/configs/vexpress_ca9x4.h
F: include/configs/sandbox.h
F: configs/sandbox_defconfig
+SANDBOX64 BOARD
+M: Simon Glass <sjg@chromium.org>
+M: Mario Six <mario.six@gdsys.cc>
+S: Maintained
+F: board/sandbox/
+F: include/configs/sandbox.h
+F: configs/sandbox64_defconfig
+
SANDBOX_NOBLK BOARD
M: Simon Glass <sjg@chromium.org>
S: Maintained
CONFIG_SANDBOX_BIG_ENDIAN should be defined when running on big-endian
machines.
-By default sandbox builds and runs on 64-bit hosts. If you are going to build
-and run sandbox on a 32-bit host, select CONFIG_SANDBOX_32BIT.
+There are two versions of the sandbox: One using 32-bit-wide integers, and one
+using 64-bit-wide integers. The 32-bit version can be build and run on either
+32 or 64-bit hosts by either selecting or deselecting CONFIG_SANDBOX_32BIT; by
+default, the sandbox it built for a 32-bit host. The sandbox using 64-bit-wide
+integers can only be built on 64-bit hosts.
Note that standalone/API support is not available at present.
unsigned char eeprom_buf[0x3c00], hdr[4], buf[MAX_STRING_LENGTH];
unsigned char *cp, *cp1;
-#if defined(CONFIG_USB_FUNCTION_DFU)
+#if defined(CONFIG_DFU_OVER_USB)
factory_dat.usb_vendor_id = CONFIG_USB_GADGET_VENDOR_NUM;
factory_dat.usb_product_id = CONFIG_USB_GADGET_PRODUCT_NUM;
#endif
cp1 += 3;
}
-#if defined(CONFIG_USB_FUNCTION_DFU)
+#if defined(CONFIG_DFU_OVER_USB)
/* read vid and pid for dfu mode */
if (0 <= get_factory_record_val(cp, size, (uchar *)"USBD1",
(uchar *)"vid", buf,
#include <dwc3-uboot.h>
#include <dwc3-omap-uboot.h>
#include <ti-usb-phy-uboot.h>
+#include <mmc.h>
#include "../common/board_detect.h"
#include "mux_data.h"
omap_mmc_init(1, 0, 0, -1, -1);
return 0;
}
+
+static const struct mmc_platform_fixups am57x_es1_1_mmc1_fixups = {
+ .hw_rev = "rev11",
+ .unsupported_caps = MMC_CAP(MMC_HS_200) |
+ MMC_CAP(UHS_SDR104),
+ .max_freq = 96000000,
+};
+
+static const struct mmc_platform_fixups am57x_es1_1_mmc23_fixups = {
+ .hw_rev = "rev11",
+ .unsupported_caps = MMC_CAP(MMC_HS_200) |
+ MMC_CAP(UHS_SDR104) |
+ MMC_CAP(UHS_SDR50),
+ .max_freq = 48000000,
+};
+
+const struct mmc_platform_fixups *platform_fixups_mmc(uint32_t addr)
+{
+ switch (omap_revision()) {
+ case DRA752_ES1_0:
+ case DRA752_ES1_1:
+ if (addr == OMAP_HSMMC1_BASE)
+ return &am57x_es1_1_mmc1_fixups;
+ else
+ return &am57x_es1_1_mmc23_fixups;
+ default:
+ return NULL;
+ }
+}
#endif
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_OS_BOOT)
palmas_mmc1_poweron_ldo(LDO1_VOLTAGE, LDO1_CTRL, voltage);
}
}
+
+static const struct mmc_platform_fixups dra7x_es1_1_mmc1_fixups = {
+ .hw_rev = "rev11",
+ .unsupported_caps = MMC_CAP(MMC_HS_200) |
+ MMC_CAP(UHS_SDR104),
+ .max_freq = 96000000,
+};
+
+static const struct mmc_platform_fixups dra7x_es1_1_mmc23_fixups = {
+ .hw_rev = "rev11",
+ .unsupported_caps = MMC_CAP(MMC_HS_200) |
+ MMC_CAP(UHS_SDR104) |
+ MMC_CAP(UHS_SDR50),
+ .max_freq = 48000000,
+};
+
+const struct mmc_platform_fixups *platform_fixups_mmc(uint32_t addr)
+{
+ switch (omap_revision()) {
+ case DRA752_ES1_0:
+ case DRA752_ES1_1:
+ if (addr == OMAP_HSMMC1_BASE)
+ return &dra7x_es1_1_mmc1_fixups;
+ else
+ return &dra7x_es1_1_mmc23_fixups;
+ default:
+ return NULL;
+ }
+}
#endif
#ifdef CONFIG_USB_DWC3
#ifdef CONFIG_TI_SECURE_DEVICE
void board_pmmc_image_process(ulong pmmc_image, size_t pmmc_size)
{
- int id = getenv_ulong("dev_pmmc", 10, 0);
+ int id = env_get_ulong("dev_pmmc", 10, 0);
int ret;
if (!rproc_is_initialized())
If disabled, you get the old, much simpler behaviour with a somewhat
smaller memory footprint.
+config CMDLINE_EDITING
+ bool "Enable command line editing"
+ depends on CMDLINE
+ default y
+ help
+ Enable editing and History functions for interactive command line
+ input operations
+
+config AUTO_COMPLETE
+ bool "Enable auto complete using TAB"
+ depends on CMDLINE
+ default y
+ help
+ Enable auto completion of commands using TAB.
+
+config SYS_LONGHELP
+ bool "Enable long help messages"
+ depends on CMDLINE
+ default y if CMDLINE
+ help
+ Defined when you want long help messages included
+ Do not set this option when short of memory.
+
config SYS_PROMPT
string "Shell prompt"
default "=> "
config CMD_DFU
bool "dfu"
- select USB_FUNCTION_DFU
+ select DFU
help
Enables the command "dfu" which is used to have U-Boot create a DFU
class device via USB. This command requires that the "dfu_alt_info"
dev;
ret = uclass_next_device(&dev)) {
printf("entry %d - instance %08x, ops %08x, platdata %08x\n",
- i++, map_to_sysmem(dev),
- map_to_sysmem(dev->driver->ops),
- map_to_sysmem(dev_get_platdata(dev)));
+ i++, (uint)map_to_sysmem(dev),
+ (uint)map_to_sysmem(dev->driver->ops),
+ (uint)map_to_sysmem(dev_get_platdata(dev)));
}
return cmd_process_error(cmdtp, ret);
if (argc < 4)
return CMD_RET_USAGE;
+#ifdef CONFIG_DFU_OVER_USB
char *usb_controller = argv[1];
+#endif
char *interface = argv[2];
char *devstring = argv[3];
- int ret;
-#ifdef CONFIG_DFU_TFTP
+ int ret = 0;
+#ifdef CONFIG_DFU_OVER_TFTP
unsigned long addr = 0;
if (!strcmp(argv[1], "tftp")) {
if (argc == 5)
return update_tftp(addr, interface, devstring);
}
#endif
-
+#ifdef CONFIG_DFU_OVER_USB
ret = dfu_init_env_entities(interface, devstring);
if (ret)
goto done;
done:
dfu_free_entities();
+#endif
return ret;
}
U_BOOT_CMD(dfu, CONFIG_SYS_MAXARGS, 1, do_dfu,
"Device Firmware Upgrade",
+#ifdef CONFIG_DFU_OVER_USB
"<USB_controller> <interface> <dev> [list]\n"
" - device firmware upgrade via <USB_controller>\n"
" on device <dev>, attached to interface\n"
" <interface>\n"
" [list] - list available alt settings\n"
-#ifdef CONFIG_DFU_TFTP
- "dfu tftp <interface> <dev> [<addr>]\n"
+#endif
+#ifdef CONFIG_DFU_OVER_TFTP
+#ifdef CONFIG_DFU_OVER_USB
+ "dfu "
+#endif
+ "tftp <interface> <dev> [<addr>]\n"
" - device firmware upgrade via TFTP\n"
" on device <dev>, attached to interface\n"
" <interface>\n"
the downloaded image to a non-volatile storage device. Define
this to enable the "fastboot flash" command.
+choice
+ prompt "Flash provider for FASTBOOT"
+ depends on FASTBOOT_FLASH
+
+config FASTBOOT_FLASH_MMC
+ bool "FASTBOOT on MMC"
+ depends on MMC
+
+config FASTBOOT_FLASH_NAND
+ bool "FASTBOOT on NAND"
+ depends on NAND
+
+endchoice
+
config FASTBOOT_FLASH_MMC_DEV
int "Define FASTBOOT MMC FLASH default device"
- depends on FASTBOOT_FLASH && MMC
+ depends on FASTBOOT_FLASH_MMC
default 0 if ARCH_SUNXI && MMC_SUNXI_SLOT_EXTRA = -1
default 1 if ARCH_SUNXI && MMC_SUNXI_SLOT_EXTRA != -1
help
config FASTBOOT_FLASH_NAND_DEV
int "Define FASTBOOT NAND FLASH default device"
- depends on FASTBOOT_FLASH && NAND
+ depends on FASTBOOT_FLASH_NAND
depends on CMD_MTDPARTS
default 0 if ARCH_SUNXI && NAND_SUNXI
help
ret = sdp_init(controller_index);
if (ret) {
- pr_err("SDP init failed: %d", ret);
+ pr_err("SDP init failed: %d\n", ret);
goto exit;
}
/* This command typically does not return but jumps to an image */
sdp_handle(controller_index);
- pr_err("SDP ended");
+ pr_err("SDP ended\n");
exit:
g_dnl_unregister();
endmenu
+config SUPPORT_RAW_INITRD
+ bool "Enable raw initrd images"
+ help
+ Note, defining the SUPPORT_RAW_INITRD allows user to supply
+ kernel with raw initrd images. The syntax is slightly different, the
+ address of the initrd must be augmented by it's size, in the following
+ format: "<initrd address>:<initrd size>".
+
config DEFAULT_FDT_FILE
string "Default fdt file"
help
obj-$(CONFIG_$(SPL_TPL_)BOOTSTAGE) += bootstage.o
ifdef CONFIG_SPL_BUILD
-obj-$(CONFIG_SPL_DFU_SUPPORT) += dfu.o
+ifdef CONFIG_SPL_DFU_SUPPORT
+obj-$(CONFIG_DFU_OVER_USB) += dfu.o
+endif
obj-$(CONFIG_SPL_DFU_SUPPORT) += cli_hush.o
obj-$(CONFIG_SPL_HASH_SUPPORT) += hash.o
obj-$(CONFIG_SPL_YMODEM_SUPPORT) += xyzModem.o
obj-y += cli.o
obj-$(CONFIG_FSL_DDR_INTERACTIVE) += cli_simple.o cli_readline.o
-obj-$(CONFIG_CMD_DFU) += dfu.o
+obj-$(CONFIG_DFU_OVER_USB) += dfu.o
obj-y += command.o
obj-$(CONFIG_$(SPL_)LOG) += log.o
obj-$(CONFIG_$(SPL_)LOG_CONSOLE) += log_console.o
int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[], int banks)
{
int err, nodeoffset;
- int len;
+ int len, i;
u8 tmp[MEMORY_BANKS_MAX * 16]; /* Up to 64-bit address + 64-bit size */
if (banks > MEMORY_BANKS_MAX) {
return err;
}
+ for (i = 0; i < banks; i++) {
+ if (start[i] == 0 && size[i] == 0)
+ break;
+ }
+
+ banks = i;
+
if (!banks)
return 0;
+ for (i = 0; i < banks; i++)
+ if (start[i] == 0 && size[i] == 0)
+ break;
+
+ banks = i;
+
len = fdt_pack_reg(blob, tmp, start, size, banks);
err = fdt_setprop(blob, nodeoffset, "reg", tmp, len);
return 1;
}
+__weak int arch_fixup_fdt(void *blob)
+{
+ return 0;
+}
+
int image_setup_libfdt(bootm_headers_t *images, void *blob,
int of_size, struct lmb *lmb)
{
ret = sdp_init(controller_index);
if (ret) {
- pr_err("SDP init failed: %d", ret);
+ pr_err("SDP init failed: %d\n", ret);
return -ENODEV;
}
/* This command typically does not return but jumps to an image */
sdp_handle(controller_index);
- pr_err("SDP ended");
+ pr_err("SDP ended\n");
return -EINVAL;
}
CONFIG_CMD_PING=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM_GPIO=y
CONFIG_ALTERA_PIO=y
CONFIG_MISC=y
CONFIG_CMD_PING=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM_GPIO=y
CONFIG_ALTERA_PIO=y
CONFIG_MISC=y
CONFIG_TARGET_M5208EVBE=y
CONFIG_BOOTDELAY=1
# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_IMLS=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_EXTRA_OPTIONS="SYS_SPANSION_BOOT"
CONFIG_BOOTDELAY=3
# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_STMICRO_BOOT"
CONFIG_BOOTDELAY=3
# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_SF=y
CONFIG_SYS_EXTRA_OPTIONS="NORFLASH_PS32BIT"
CONFIG_BOOTDELAY=1
# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADB is not set
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_TARGET_M5235EVB=y
CONFIG_BOOTDELAY=1
# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_TARGET_M5249EVB=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_CMDLINE_EDITING is not set
# CONFIG_AUTOBOOT is not set
CONFIG_CMD_IMLS=y
CONFIG_LOOPW=y
CONFIG_TARGET_M5253DEMO=y
CONFIG_BOOTDELAY=5
# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_IDE=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_TARGET_M5253EVBE=y
CONFIG_BOOTDELAY=5
# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_IDE=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_TARGET_M5272C3=y
CONFIG_BOOTDELAY=5
# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_IMLS=y
# CONFIG_CMD_LOADB is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_TARGET_M5275EVB=y
CONFIG_BOOTDELAY=5
# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_TARGET_M5282EVB=y
CONFIG_BOOTDELAY=5
# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_IMLS=y
# CONFIG_CMD_LOADB is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/mtdblock3 rw rootfstype=jffs2"
# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_IMLS=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_EXTRA_OPTIONS="NANDFLASH_SIZE=0"
CONFIG_BOOTDELAY=1
# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_SYS_EXTRA_OPTIONS="NANDFLASH_SIZE=16"
CONFIG_BOOTDELAY=1
# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_SYS_EXTRA_OPTIONS="NANDFLASH_SIZE=16"
CONFIG_BOOTDELAY=1
# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.1.1:/tftpboot/192.168.1.2 ip=192.168.1.2:192.168.1.1:192.168.1.1: 255.255.255.0::eth0:off:rw console=ttyS0,115200"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="-> "
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_LOADB is not set
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_CF_SPI=y
CONFIG_BOOTARGS="root=/dev/mtdblock2 rw rootfstype=jffs2 mtdparts=NAND:1M(u-boot)ro,7M(kernel)ro,-(jffs2) console=ttyS0,115200"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="-> "
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_LOADB is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_CF_SPI=y
CONFIG_BOOTARGS="root=/dev/mtdblock2 rw rootfstype=jffs2 mtdparts=NAND:1M(u-boot)ro,7M(kernel)ro,-(jffs2) console=ttyS0,115200"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="-> "
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_LOADB is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_CF_SPI=y
CONFIG_BOOTARGS="root=/dev/mtdblock2 rw rootfstype=jffs2 mtdparts=NAND:1M(u-boot)ro,7M(kernel)ro,-(jffs2) console=ttyS0,115200"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="-> "
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_LOADB is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_CF_SPI=y
CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.1.1:/tftpboot/192.168.1.2 ip=192.168.1.2:192.168.1.1:192.168.1.1: 255.255.255.0::eth0:off:rw console=ttyS0,115200"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="-> "
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_LOADB is not set
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_CF_SPI=y
CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.1.1:/tftpboot/192.168.1.2 ip=192.168.1.2:192.168.1.1:192.168.1.1: 255.255.255.0::eth0:off:rw console=ttyS0,115200"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="-> "
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_LOADB is not set
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_CF_SPI=y
CONFIG_BOOTDELAY=1
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:2M(kernel)ro,-(jffs2)"
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_DATE=y
CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_BOOTDELAY=1
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:2M(kernel)ro,-(jffs2)"
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADB is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_DATE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_BOOTDELAY=1
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:5M(kernel)ro,-(jffs2)"
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_IDE=y
CONFIG_CMD_I2C=y
CONFIG_CMD_JFFS2=y
CONFIG_ISO_PARTITION=y
CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_BOOTDELAY=1
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:5M(kernel)ro,-(jffs2)"
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_IMLS=y
CONFIG_CMD_IDE=y
CONFIG_CMD_JFFS2=y
CONFIG_ISO_PARTITION=y
CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_BOOTDELAY=1
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:5M(kernel)ro,-(jffs2)"
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_IDE=y
CONFIG_CMD_I2C=y
CONFIG_CMD_JFFS2=y
CONFIG_ISO_PARTITION=y
CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_BOOTDELAY=1
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:5M(kernel)ro,-(jffs2)"
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_IDE=y
CONFIG_CMD_I2C=y
CONFIG_CMD_JFFS2=y
CONFIG_ISO_PARTITION=y
CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_BOOTDELAY=1
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:5M(kernel)ro,-(jffs2)"
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_IDE=y
CONFIG_CMD_I2C=y
CONFIG_CMD_JFFS2=y
CONFIG_ISO_PARTITION=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_TARGET_M5475EVB=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64"
CONFIG_BOOTDELAY=1
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_TARGET_M5475EVB=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16"
CONFIG_BOOTDELAY=1
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_TARGET_M5475EVB=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16,SYS_VIDEO,SYS_USBCTRL"
CONFIG_BOOTDELAY=1
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_TARGET_M5475EVB=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_USBCTRL"
CONFIG_BOOTDELAY=1
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_TARGET_M5475EVB=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_VIDEO,SYS_USBCTRL"
CONFIG_BOOTDELAY=1
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_TARGET_M5475EVB=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=32,SYS_VIDEO,SYS_USBCTRL,SYS_DRAMSZ1=64"
CONFIG_BOOTDELAY=1
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_TARGET_M5475EVB=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=4,SYS_DRAMSZ=64"
CONFIG_BOOTDELAY=1
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_TARGET_M5485EVB=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64"
CONFIG_BOOTDELAY=1
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_TARGET_M5485EVB=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16"
CONFIG_BOOTDELAY=1
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_TARGET_M5485EVB=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16,SYS_VIDEO,SYS_USBCTRL"
CONFIG_BOOTDELAY=1
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_TARGET_M5485EVB=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_USBCTRL"
CONFIG_BOOTDELAY=1
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_TARGET_M5485EVB=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_VIDEO,SYS_USBCTRL"
CONFIG_BOOTDELAY=1
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_TARGET_M5485EVB=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=32,SYS_VIDEO,SYS_USBCTRL,SYS_DRAMSZ1=64"
CONFIG_BOOTDELAY=1
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_TARGET_M5485EVB=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=4,SYS_DRAMSZ=64"
CONFIG_BOOTDELAY=1
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_TARGET_M5485EVB=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16,SYS_VIDEO"
CONFIG_BOOTDELAY=1
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="ubi.mtd=4 root=ubi0:rootfs rw rootfstype=ubifs rootflags=sync console=ttyCPM0,115200N8 ip=${ipaddr}:::${netmask}:mcr3k:eth0:off"
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="S3K> "
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="\nEnter password - autoboot in %d sec...\n"
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=5
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PING=y
CONFIG_CMD_DATE=y
CONFIG_CMD_FAT=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nand0=e2800000.flash"
CONFIG_MTDPARTS_DEFAULT="mtdparts=e2800000.flash:512k(uboot),128k(env),6m@1m(kernel),-(fs)"
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nand0=e2800000.flash"
CONFIG_MTDPARTS_DEFAULT="mtdparts=e2800000.flash:512k(uboot),128k(env),6m@1m(kernel),-(fs)"
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
CONFIG_MTDPARTS_DEFAULT="mtdparts=e2800000.flash:512k(uboot),128k(env),6m@1m(kernel),-(fs)"
# CONFIG_ENV_IS_IN_FLASH is not set
CONFIG_ENV_IS_IN_NAND=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_NAND=y
CONFIG_MTDPARTS_DEFAULT="mtdparts=e2800000.flash:512k(uboot),128k(env),6m@1m(kernel),-(fs)"
# CONFIG_ENV_IS_IN_FLASH is not set
CONFIG_ENV_IS_IN_NAND=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_NAND=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nand0=e0600000.flash"
CONFIG_MTDPARTS_DEFAULT="mtdparts=e0600000.flash:512k(uboot),128k(env),6m@1m(kernel),-(fs)"
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_FSL_SATA=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_PING=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_PING=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
# CONFIG_PCI is not set
CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_PING=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_PING=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_PING=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_PING=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
# CONFIG_PCI is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_DATE=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_DATE=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_SATA_SIL3114=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_SATA_SIL3114=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
# CONFIG_PCI is not set
CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_FSL_SATA=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
CONFIG_CMD_PING=y
# CONFIG_CMD_HASH is not set
CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
CONFIG_CMD_PING=y
# CONFIG_CMD_HASH is not set
CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
# CONFIG_CMD_HASH is not set
CONFIG_CMD_EXT2=y
CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_SCSI_AHCI=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_HASH is not set
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_HASH is not set
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_HASH is not set
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
CONFIG_CMD_PING=y
# CONFIG_CMD_HASH is not set
CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
CONFIG_CMD_PING=y
# CONFIG_CMD_HASH is not set
CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
CONFIG_CMD_PING=y
# CONFIG_CMD_HASH is not set
CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_BOOTDELAY=10
# CONFIG_CONSOLE_MUX is not set
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_PCI=y
CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_DOS_PARTITION=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_SCSI_AHCI=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_BOOTDELAY=10
# CONFIG_CONSOLE_MUX is not set
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_PCI=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_DOS_PARTITION=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_SCSI_AHCI=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_BOOTDELAY=10
# CONFIG_CONSOLE_MUX is not set
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_PCI=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_DOS_PARTITION=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_SCSI_AHCI=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttySC0,115200 root=1f01"
CONFIG_VERSION_VARIABLE=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_BOOTD is not set
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_TPL_NAND_SUPPORT=y
CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_TPL_NAND_SUPPORT=y
CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_TPL_NAND_SUPPORT=y
CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_TPL_NAND_SUPPORT=y
CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_TPL_NAND_SUPPORT=y
CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_BOOTDELAY=-1
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_REGINFO=y
CONFIG_CMD_IMLS=y
# CONFIG_CMD_EEPROM is not set
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_TPL_NAND_SUPPORT=y
CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_TPL_NAND_SUPPORT=y
CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_TPL_NAND_SUPPORT=y
CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_TPL_NAND_SUPPORT=y
CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nor0=TQM834x-0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=TQM834x-0:256k(u-boot),256k(env),1m(kernel),2m(initrd),-(user);"
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_I2C=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc>\" to stop\n"
CONFIG_AUTOBOOT_STOP_STR="\x1b"
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="B$ "
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc>\" to stop\n"
CONFIG_DEFAULT_DEVICE_TREE="ae3xx"
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="NDS32 # "
CONFIG_CMD_IMLS=y
CONFIG_CMD_MMC=y
CONFIG_DEFAULT_DEVICE_TREE="ag101p"
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="NDS32 # "
CONFIG_CMD_IMLS=y
CONFIG_CMD_MMC=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_POWER_SUPPORT=y
CONFIG_SPL_YMODEM_SUPPORT=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
-CONFIG_CMD_PART=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:128k(SPL),128k(SPL.backup1),128k(SPL.backup2),128k(SPL.backup3),1920k(u-boot),-(UBI)"
CONFIG_CMD_UBI=y
-CONFIG_ISO_PARTITION=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_SYS_OMAP24_I2C_SPEED=1000
CONFIG_MMC_OMAP_HS=y
CONFIG_SPL=y
CONFIG_SPL_MUSB_NEW_SUPPORT=y
CONFIG_SPL_NET_SUPPORT=y
+CONFIG_SPL_NET_VCI_STRING="AM335x U-Boot SPL"
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_USB_GADGET_SUPPORT=y
CONFIG_SPL_USBETH_SUPPORT=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_TI_SECURE_DEVICE=y
CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_AM33XX=y
-CONFIG_TI_SECURE_DEVICE=y
CONFIG_ISW_ENTRY_ADDR=0x40300350
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_DEFAULT_DEVICE_TREE="am335x-evm"
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_TI_SECURE_DEVICE=y
CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_AM33XX=y
-CONFIG_TI_SECURE_DEVICE=y
CONFIG_ISW_ENTRY_ADDR=0x40301950
# CONFIG_SPL_MMC_SUPPORT is not set
# CONFIG_SPL_LIBDISK_SUPPORT is not set
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="MACH_TYPE=MACH_TYPE_IGEP0033"
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_POWER_SUPPORT=y
CONFIG_SPL_YMODEM_SUPPORT=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_SPL=y
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
-CONFIG_CMD_PART=y
CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:512k(SPL),-(UBI)"
CONFIG_CMD_UBI=y
# CONFIG_CMD_UBIFS is not set
-CONFIG_ISO_PARTITION=y
-CONFIG_EFI_PARTITION=y
CONFIG_ENV_IS_IN_UBI=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="am335x-pdu001"
CONFIG_LOCALVERSION="-EETS-1.0.0"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=1
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SPL=y
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_YMODEM_SUPPORT=y
-CONFIG_HUSH_PARSER=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
CONFIG_AUTOBOOT_STOP_STR=" "
-CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_XIMG is not set
CONFIG_CMD_MEMINFO=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
-CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_SERIES=y
+CONFIG_DISTRO_DEFAULTS=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_POWER_SUPPORT=y
CONFIG_SPL_YMODEM_SUPPORT=y
-CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot# "
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Enter 'shc' to enter prompt (times out) %d \nEnter 'noautoboot' to enter prompt without timeout\n"
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_DOS_PARTITION=y
-CONFIG_ISO_PARTITION=y
# CONFIG_SPL_ISO_PARTITION is not set
CONFIG_ENV_IS_IN_MMC=y
CONFIG_MMC_OMAP_HS=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_SHC_ICT=y
CONFIG_SERIES=y
+CONFIG_DISTRO_DEFAULTS=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_DOS_PARTITION=y
-CONFIG_ISO_PARTITION=y
# CONFIG_SPL_ISO_PARTITION is not set
CONFIG_ENV_IS_IN_MMC=y
CONFIG_MMC_OMAP_HS=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_SHC_NETBOOT=y
CONFIG_SERIES=y
+CONFIG_DISTRO_DEFAULTS=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_DOS_PARTITION=y
-CONFIG_ISO_PARTITION=y
# CONFIG_SPL_ISO_PARTITION is not set
CONFIG_ENV_IS_IN_MMC=y
CONFIG_MMC_OMAP_HS=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_SERIES=y
+CONFIG_DISTRO_DEFAULTS=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_DOS_PARTITION=y
-CONFIG_ISO_PARTITION=y
# CONFIG_SPL_ISO_PARTITION is not set
CONFIG_ENV_IS_IN_MMC=y
CONFIG_MMC_OMAP_HS=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_SHC_SDBOOT=y
CONFIG_SERIES=y
+CONFIG_DISTRO_DEFAULTS=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_DOS_PARTITION=y
-CONFIG_ISO_PARTITION=y
# CONFIG_SPL_ISO_PARTITION is not set
CONFIG_ENV_IS_IN_MMC=y
CONFIG_MMC_OMAP_HS=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_SHC_SDBOOT=y
CONFIG_SERIES=y
+CONFIG_DISTRO_DEFAULTS=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_DOS_PARTITION=y
-CONFIG_ISO_PARTITION=y
# CONFIG_SPL_ISO_PARTITION is not set
CONFIG_ENV_IS_IN_MMC=y
CONFIG_MMC_OMAP_HS=y
CONFIG_SPL=y
# CONFIG_SPL_EXT_SUPPORT is not set
CONFIG_HUSH_PARSER=y
+# CONFIG_CMDLINE_EDITING is not set
CONFIG_SYS_PROMPT="AM3517_CRANE # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_FLASH is not set
CONFIG_TARGET_AM3517_EVM=y
CONFIG_EMIF4=y
CONFIG_DEFAULT_DEVICE_TREE="am3517-evm"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=10
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
# CONFIG_SPL_EXT_SUPPORT is not set
CONFIG_SPL_MTD_SUPPORT=y
-CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="AM3517_EVM # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_EEPROM is not set
CONFIG_CMD_NAND=y
# CONFIG_CMD_SPI is not set
# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_MII is not set
CONFIG_CMD_CACHE=y
# CONFIG_CMD_TIME is not set
CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:512k(MLO),1920k(u-boot),256k(u-boot-env),8m(kernel),512k(dtb),-(rootfs)"
CONFIG_CMD_UBI=y
-CONFIG_SPL_PARTITION_UUIDS=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_MMC_OMAP_HS=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_AM43XX=y
CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1"
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_OS_BOOT=y
-CONFIG_HUSH_PARSER=y
CONFIG_CMD_SPL=y
CONFIG_CMD_SPL_NAND_OFS=0x00100000
CONFIG_CMD_SPL_WRITE_SIZE=0x40000
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nand0=nand.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=nand.0:256k(NAND.SPL),256k(NAND.SPL.backup1),256k(NAND.SPL.backup2),256k(NAND.SPL.backup3),512k(NAND.u-boot-spl-os),1m(NAND.u-boot),256k(NAND.u-boot-env),256k(NAND.u-boot-env.backup1),7m(NAND.kernel),-(NAND.file-system)"
-CONFIG_ISO_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_OF_LIST="am437x-gp-evm am437x-sk-evm am43x-epos-evm am437x-idk-evm"
CONFIG_DM=y
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_AM43XX=y
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1"
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
CONFIG_SPL_NET_SUPPORT=y
CONFIG_SPL_NET_VCI_STRING="AM43xx U-Boot SPL"
CONFIG_SPL_OS_BOOT=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_SPL=y
CONFIG_CMD_SPL_NAND_OFS=0x00100000
CONFIG_CMD_SPL_WRITE_SIZE=0x40000
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
-CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nand0=nand.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=nand.0:256k(NAND.SPL),256k(NAND.SPL.backup1),256k(NAND.SPL.backup2),256k(NAND.SPL.backup3),512k(NAND.u-boot-spl-os),1m(NAND.u-boot),256k(NAND.u-boot-env),256k(NAND.u-boot-env.backup1),7m(NAND.kernel),-(NAND.file-system)"
-CONFIG_ISO_PARTITION=y
CONFIG_ENV_IS_IN_FAT=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SYS_TEXT_BASE=0x30000000
CONFIG_AM43XX=y
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,QSPI,QSPI_BOOT"
CONFIG_QSPI_BOOT=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_DFU=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_ISO_PARTITION=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_AM43XX=y
CONFIG_ISW_ENTRY_ADDR=0x40300350
CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1"
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_USB_HOST_SUPPORT=y
CONFIG_SPL_USB_SUPPORT=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_SPL=y
CONFIG_CMD_SPL_NAND_OFS=0x00100000
CONFIG_CMD_SPL_WRITE_SIZE=0x40000
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
-CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nand0=nand.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=nand.0:256k(NAND.SPL),256k(NAND.SPL.backup1),256k(NAND.SPL.backup2),256k(NAND.SPL.backup3),512k(NAND.u-boot-spl-os),1m(NAND.u-boot),256k(NAND.u-boot-env),256k(NAND.u-boot-env.backup1),7m(NAND.kernel),-(NAND.file-system)"
-CONFIG_ISO_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_OF_LIST="am437x-gp-evm am437x-sk-evm am43x-epos-evm am437x-idk-evm"
CONFIG_ENV_IS_IN_FAT=y
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_TI_SECURE_DEVICE=y
CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_AM43XX=y
-CONFIG_TI_SECURE_DEVICE=y
CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000
CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE=0x02000000
CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE=0x01c00000
CONFIG_ISW_ENTRY_ADDR=0x403018e0
CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_IMAGE_POST_PROCESS=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1"
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
CONFIG_SPL_USB_SUPPORT=y
CONFIG_SPL_USB_GADGET_SUPPORT=y
CONFIG_SPL_USBETH_SUPPORT=y
-CONFIG_HUSH_PARSER=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nand0=nand.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=nand.0:256k(NAND.SPL),256k(NAND.SPL.backup1),256k(NAND.SPL.backup2),256k(NAND.SPL.backup3),512k(NAND.u-boot-spl-os),1m(NAND.u-boot),256k(NAND.u-boot-env),256k(NAND.u-boot-env.backup1),7m(NAND.kernel),-(NAND.file-system)"
-CONFIG_ISO_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_OF_LIST="am437x-gp-evm am437x-sk-evm am43x-epos-evm am437x-idk-evm"
CONFIG_DM=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_ARMV7_LPAE=y
CONFIG_DEFAULT_DEVICE_TREE="am572x-idk"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="androidboot.serialno=${serial#} console=ttyS2,115200 androidboot.console=ttyS2 androidboot.hardware=am57xevmboard"
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_DMA_SUPPORT=y
CONFIG_SPL_OS_BOOT=y
-CONFIG_HUSH_PARSER=y
CONFIG_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x82000000
CONFIG_FASTBOOT_BUF_SIZE=0x2F000000
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_PMIC is not set
-CONFIG_ISO_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_LIST="am57xx-beagle-x15 am57xx-beagle-x15-revb1 am57xx-beagle-x15-revc am572x-idk am571x-idk am574x-idk"
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_TI_SECURE_DEVICE=y
CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_OMAP54XX=y
-CONFIG_TI_SECURE_DEVICE=y
CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000
CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE=0x02000000
CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE=0x01c00000
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_ARMV7_LPAE=y
CONFIG_DEFAULT_DEVICE_TREE="am57xx-beagle-x15"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_IMAGE_POST_PROCESS=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="androidboot.serialno=${serial#} console=ttyS2,115200 androidboot.console=ttyS2 androidboot.hardware=am57xevmboard"
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_DMA_SUPPORT=y
-CONFIG_HUSH_PARSER=y
CONFIG_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x82000000
CONFIG_FASTBOOT_BUF_SIZE=0x2F000000
CONFIG_FASTBOOT_FLASH_MMC_DEV=1
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
-CONFIG_ISO_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_LIST="am57xx-beagle-x15 am57xx-beagle-x15-revb1 am57xx-beagle-x15-revc am572x-idk am571x-idk am574x-idk"
CONFIG_BOOTDELAY=1
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_SYS_LONGHELP is not set
CONFIG_SYS_PROMPT="amcore $ "
# CONFIG_CMD_BOOTD is not set
CONFIG_CMD_IMLS=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttySC2,38400"
CONFIG_VERSION_VARIABLE=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_BOOTD is not set
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttySC4,115200"
CONFIG_VERSION_VARIABLE=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_BOOTD is not set
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_CMD_HDMIDETECT=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6Q"
CONFIG_BOOTDELAY=1
# CONFIG_CONSOLE_MUX is not set
-# CONFIG_SYS_STDIO_DEREGISTER is not set
+CONFIG_SUPPORT_RAW_INITRD=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_SYS_TEXT_BASE=0x17800000
CONFIG_TARGET_APALIS_IMX6=y
CONFIG_CMD_HDMIDETECT=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/apalis_imx6/apalis_imx6q.cfg,MX6Q,DDR_MB=1024"
CONFIG_BOOTDELAY=1
# CONFIG_CONSOLE_MUX is not set
-# CONFIG_SYS_STDIO_DEREGISTER is not set
+CONFIG_SUPPORT_RAW_INITRD=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_TEXT_BASE=0x17800000
CONFIG_TARGET_APALIS_IMX6=y
CONFIG_CMD_HDMIDETECT=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/apalis_imx6/apalis_imx6q.cfg,MX6Q,DDR_MB=2048"
CONFIG_BOOTDELAY=1
# CONFIG_CONSOLE_MUX is not set
-# CONFIG_SYS_STDIO_DEREGISTER is not set
+CONFIG_SUPPORT_RAW_INITRD=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_IDENT_STRING=" apf27 patch 3.10"
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_BOOTDELAY=5
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttySMX0,115200 mtdparts=mxc_nand.0:1M(u-boot)ro,512K(env),512K(env2),512K(firmware),512K(dtb),5M(kernel),-(rootfs) ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs "
CONFIG_MTDPARTS_DEFAULT="mtdparts=mxc_nand.0:1M(u-boot)ro,512K(env),512K(env2),512K(firmware),512K(dtb),5M(kernel),-(rootfs)"
CONFIG_CMD_UBI=y
CONFIG_ENV_IS_IN_NAND=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_DNS=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
+CONFIG_BOOTP_SUBNETMASK=y
CONFIG_FPGA_XILINX=y
CONFIG_MXC_GPIO=y
CONFIG_MMC_MXC=y
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_TARGET_ARMADILLO_800EVA=y
CONFIG_BOOTDELAY=3
CONFIG_VERSION_VARIABLE=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_BOOTD is not set
CONFIG_BOOTARGS=" console=ttyS2,115200 rootfstype=romfs loaderversion=$loaderversion"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="URMEL > "
CONFIG_CMD_IMLS=y
CONFIG_CMD_FPGA_LOADMK=y
CONFIG_SYS_TEXT_BASE=0x10000000
CONFIG_TARGET_AT91RM9200EK=y
CONFIG_BOOTDELAY=3
-# CONFIG_SYS_STDIO_DEREGISTER is not set
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_TARGET_AT91RM9200EK=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT"
CONFIG_BOOTDELAY=3
-# CONFIG_SYS_STDIO_DEREGISTER is not set
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_NAND=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_NAND=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_NAND=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_NAND=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_MMC=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_NAND=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_NAND=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_FAT=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_NAND=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_MTDPARTS_DEFAULT="mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs)"
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_FAT=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_MTDPARTS_DEFAULT="mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs)"
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_NAND=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_MTDPARTS_DEFAULT="mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs)"
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_CMD_UBI=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_CMD_UBI=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_FAT=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_CMD_UBI=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_NAND=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_CMD_UBI=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_NAND=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CPU=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_BAV_VERSION=1
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1"
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_POWER_SUPPORT=y
CONFIG_SPL_YMODEM_SUPPORT=y
-CONFIG_HUSH_PARSER=y
CONFIG_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x82000000
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_SPL=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_ISO_PARTITION=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_BAV_VERSION=2
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1"
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_POWER_SUPPORT=y
CONFIG_SPL_YMODEM_SUPPORT=y
-CONFIG_HUSH_PARSER=y
CONFIG_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x82000000
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_SPL=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_ISO_PARTITION=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_NETCONSOLE=y
+CONFIG_BOOTP_DNS=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_SUBNETMASK=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_MMC_OMAP_HS=y
CONFIG_PHYLIB=y
CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:128k(MLO),128k(MLO.backup),128k(dtb),128k(u-boot-env),512k(u-boot),4m(kernel),128m(rootfs),-(user)"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_NETCONSOLE=y
+CONFIG_BOOTP_DNS=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_SUBNETMASK=y
CONFIG_BOOTCOUNT_LIMIT=y
# CONFIG_MMC is not set
CONFIG_NAND=y
CONFIG_CMD_MTDPARTS=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_NETCONSOLE=y
+CONFIG_BOOTP_DNS=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_SUBNETMASK=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_MMC_OMAP_HS=y
CONFIG_SPI_FLASH=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_NETCONSOLE=y
+CONFIG_BOOTP_DNS=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_SUBNETMASK=y
CONFIG_MMC_OMAP_HS=y
CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_DATE=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_NETDEVICES=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SYS_TEXT_BASE=0x80100000
CONFIG_TARGET_OMAP3_CAIRO=y
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=-2
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_OS_BOOT=y
-CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Cairo # "
-CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
CONFIG_CMD_SPL=y
CONFIG_CMD_SPL_NAND_OFS=0x240000
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_LOCK_UNLOCK=y
-CONFIG_CMD_PART=y
CONFIG_CMD_SPI=y
# CONFIG_CMD_NET is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_MTDPARTS=y
-CONFIG_ISO_PARTITION=y
-CONFIG_EFI_PARTITION=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
CONFIG_CMD_PING=y
CONFIG_CMD_DIAG=y
CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_BOOTP_DNS=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0x01C23000
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
-# CONFIG_SYS_STDIO_DEREGISTER is not set
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_SPL_EXT_SUPPORT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CPU=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=1
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_DEFAULT_FDT_FILE="am335x-chiliboard.dtb"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nand0=8000000.nand"
CONFIG_MTDPARTS_DEFAULT="mtdparts=8000000.nand:128k(NAND.SPL),128k(NAND.SPL.backup1),128k(NAND.SPL.backup2),128k(NAND.SPL.backup3),256k(NAND.u-boot-spl-os),1m(NAND.u-boot),128k(NAND.u-boot-env),128k(NAND.u-boot-env.backup1),8m(NAND.kernel),-(NAND.file-system)"
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_SPL_OF_CONTROL=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_SPL_DM=y
CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CPU=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CPU=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CROS_EC=y
CONFIG_OMAP54XX=y
CONFIG_TARGET_CL_SOM_AM57X=y
# CONFIG_SPL_NAND_SUPPORT is not set
+CONFIG_DISTRO_DEFAULTS=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
# CONFIG_SPL_EXT_SUPPORT is not set
-CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot# "
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_EEPROM_LAYOUT=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_ISO_PARTITION=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SCSI_AHCI=y
CONFIG_CMD_PCA953X=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_DISTRO_DEFAULTS=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="CM-T335 # "
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_EEPROM_LAYOUT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
-CONFIG_CMD_PART=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nand0=nand"
CONFIG_MTDPARTS_DEFAULT="mtdparts=nand:2m(spl),1m(u-boot),1m(u-boot-env),1m(dtb),4m(splash),6m(kernel),-(rootfs)"
-CONFIG_ISO_PARTITION=y
-CONFIG_EFI_PARTITION=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_CMD_PCA953X=y
CONFIG_LED_STATUS=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_DISTRO_DEFAULTS=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="CM-T43 # "
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_EEPROM_LAYOUT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
-CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_MTDPARTS=y
-CONFIG_ISO_PARTITION=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_DM=y
CONFIG_DM_GPIO=y
CONFIG_TARGET_CM_T54=y
CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC=16296
# CONFIG_SPL_NAND_SUPPORT is not set
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=3
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
CONFIG_SPL_SATA_SUPPORT=y
-CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="CM-T54 # "
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_EEPROM_LAYOUT=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_ISO_PARTITION=y
-CONFIG_EFI_PARTITION=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SCSI_AHCI=y
CONFIG_MMC_OMAP_HS=y
CONFIG_TARGET_COBRA5272=y
CONFIG_BOOTDELAY=5
# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="COBRA > "
CONFIG_CMD_IMLS=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_PING=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_BAUDRATE=19200
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_CMD_HDMIDETECT=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6DL"
CONFIG_BOOTDELAY=1
# CONFIG_CONSOLE_MUX is not set
-# CONFIG_SYS_STDIO_DEREGISTER is not set
+CONFIG_SUPPORT_RAW_INITRD=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_SYS_TEXT_BASE=0x17800000
CONFIG_TARGET_COLIBRI_IMX6=y
CONFIG_CMD_HDMIDETECT=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri_imx6/colibri_imx6.cfg,MX6DL,DDR_MB=256"
CONFIG_BOOTDELAY=1
# CONFIG_CONSOLE_MUX is not set
-# CONFIG_SYS_STDIO_DEREGISTER is not set
+CONFIG_SUPPORT_RAW_INITRD=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_IMX_RDC=y
CONFIG_IMX_BOOTAUX=y
CONFIG_DEFAULT_DEVICE_TREE="imx7-colibri"
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri_imx7/imximage.cfg,MX7D"
CONFIG_BOOTDELAY=1
# CONFIG_CONSOLE_MUX is not set
CONFIG_ARM=y
CONFIG_TARGET_COLIBRI_PXA270=y
CONFIG_SYS_TEXT_BASE=0x0
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=tty0 console=ttyS0,115200"
# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
+# CONFIG_SYS_LONGHELP is not set
CONFIG_SYS_PROMPT="$ "
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_EXPORTENV is not set
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_TEXT_BASE=0x3f401000
CONFIG_TARGET_COLIBRI_VF=y
CONFIG_DEFAULT_DEVICE_TREE="vf610-colibri"
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri_vf/imximage.cfg,IMX_NAND"
CONFIG_BOOTDELAY=1
CONFIG_LOGLEVEL=3
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="Colibri VFxx # "
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_ASKENV=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CPU=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CPU=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
+# CONFIG_SYS_LONGHELP is not set
# CONFIG_CMD_BOOTM is not set
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
+# CONFIG_SYS_LONGHELP is not set
# CONFIG_CMD_BOOTM is not set
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_TPM_TIS_LPC=y
CONFIG_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_ENV_IS_IN_NAND=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_DFU_NAND=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SYS_NS16550=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CPU=y
CONFIG_CMD_DIAG=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_BOOTP_DNS=y
CONFIG_DM=y
CONFIG_DM_I2C=y
CONFIG_DM_I2C_COMPAT=y
CONFIG_CMD_DIAG=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_BOOTP_DNS=y
CONFIG_DM=y
CONFIG_DM_I2C=y
CONFIG_DM_I2C_COMPAT=y
CONFIG_CMD_DIAG=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_BOOTP_DNS=y
CONFIG_DM=y
CONFIG_DM_I2C=y
CONFIG_DM_I2C_COMPAT=y
CONFIG_SYS_TEXT_BASE=0xBFC00000
CONFIG_TARGET_DBAU1X00=y
CONFIG_SYS_EXTRA_OPTIONS="DBAU1000"
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="DbAu1xx0 # "
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_ELF is not set
CONFIG_CMD_DHCP=y
CONFIG_MAC_PARTITION=y
# CONFIG_ISO_PARTITION is not set
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_TEXT_BASE=0xBFC00000
CONFIG_TARGET_DBAU1X00=y
CONFIG_DBAU1100=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="DbAu1xx0 # "
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_ELF is not set
CONFIG_CMD_DHCP=y
CONFIG_MAC_PARTITION=y
# CONFIG_ISO_PARTITION is not set
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_TEXT_BASE=0xBFC00000
CONFIG_TARGET_DBAU1X00=y
CONFIG_DBAU1500=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="DbAu1xx0 # "
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_ELF is not set
CONFIG_CMD_DHCP=y
CONFIG_MAC_PARTITION=y
# CONFIG_ISO_PARTITION is not set
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_TEXT_BASE=0xBFC00000
CONFIG_TARGET_DBAU1X00=y
CONFIG_DBAU1550=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="DbAu1xx0 # "
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
# CONFIG_ISO_PARTITION is not set
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_TARGET_DBAU1X00=y
CONFIG_DBAU1550=y
CONFIG_SYS_LITTLE_ENDIAN=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="DbAu1xx0 # "
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
# CONFIG_ISO_PARTITION is not set
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SYS_TEXT_BASE=0x80100000
CONFIG_TARGET_DEVKIT8000=y
+CONFIG_DISTRO_DEFAULTS=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
CONFIG_SPL_OS_BOOT=y
-CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMI is not set
CONFIG_CMD_SPL=y
CONFIG_CMD_SPL_NAND_OFS=0x680000
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_LOCK_UNLOCK=y
-CONFIG_CMD_PART=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
CONFIG_CMD_JFFS2=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nand0=nand"
CONFIG_MTDPARTS_DEFAULT="mtdparts=nand:512k(x-loader),1920k(u-boot),128k(u-boot-env),4m(kernel),-(fs)"
-CONFIG_ISO_PARTITION=y
-CONFIG_EFI_PARTITION=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CPU=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_UNZIP=y
CONFIG_CMD_DFU=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
CONFIG_CMD_SATA=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_DWC_AHSATA=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0x00900000
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHYLIB=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6Q"
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_SPL=y
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
CONFIG_SPL_DMA_SUPPORT=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run factory"
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_SPL=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
-# CONFIG_SYS_STDIO_DEREGISTER is not set
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_DEFAULT_FDT_FILE="imx6q-dms-ba16.dtb"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
-# CONFIG_SYS_STDIO_DEREGISTER is not set
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_DEFAULT_FDT_FILE="imx6q-dms-ba16.dtb"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_ARMV7_LPAE=y
CONFIG_DEFAULT_DEVICE_TREE="dra7-evm"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="androidboot.serialno=${serial#} console=ttyS0,115200 androidboot.console=ttyS0 androidboot.hardware=jacinto6evmboard"
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_DMA_SUPPORT=y
CONFIG_SPL_OS_BOOT=y
-CONFIG_HUSH_PARSER=y
CONFIG_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x82000000
CONFIG_FASTBOOT_BUF_SIZE=0x2F000000
CONFIG_CMD_SPL=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
-CONFIG_ISO_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_LIST="dra7-evm dra72-evm dra72-evm-revc dra71-evm dra76-evm"
CONFIG_PCF8575_GPIO=y
CONFIG_DM_I2C=y
CONFIG_DM_MMC=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS200_SUPPORT=y
CONFIG_MMC_OMAP_HS=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_TI_SECURE_DEVICE=y
CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_OMAP54XX=y
-CONFIG_TI_SECURE_DEVICE=y
CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000
CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE=0x02000000
CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE=0x01c00000
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_ARMV7_LPAE=y
CONFIG_DEFAULT_DEVICE_TREE="dra7-evm"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_IMAGE_POST_PROCESS=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="androidboot.serialno=${serial#} console=ttyS0,115200 androidboot.console=ttyS0 androidboot.hardware=jacinto6evmboard"
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_DMA_SUPPORT=y
-CONFIG_HUSH_PARSER=y
CONFIG_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x82000000
CONFIG_FASTBOOT_BUF_SIZE=0x2F000000
CONFIG_FASTBOOT_FLASH_MMC_DEV=1
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
-CONFIG_ISO_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_LIST="dra7-evm dra72-evm dra72-evm-revc dra71-evm dra76-evm"
CONFIG_PCF8575_GPIO=y
CONFIG_DM_I2C=y
CONFIG_DM_MMC=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS200_SUPPORT=y
CONFIG_MMC_OMAP_HS=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="am335x-draco"
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_BOOTDELAY=3
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_ENV_IS_IN_NAND=y
+CONFIG_BOOTP_DNS=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_SUBNETMASK=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_BOOTCOUNT_ENV=y
CONFIG_DFU_NAND=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
CONFIG_TARGET_DRAGONBOARD820C=y
CONFIG_IDENT_STRING="\nQualcomm-DragonBoard 820C"
CONFIG_DEFAULT_DEVICE_TREE="dragonboard820c"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyMSM0,115200n8"
+# CONFIG_USE_BOOTCOMMAND is not set
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="dragonboard820c => "
CONFIG_CMD_BOOTEFI_HELLO=y
CONFIG_CMD_MD5SUM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
-CONFIG_CMD_PXE=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIMER=y
CONFIG_CMD_PMIC=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_ENV_IS_IN_EXT4=y
CONFIG_ENV_EXT4_INTERFACE="mmc"
CONFIG_ENV_EXT4_DEVICE_AND_PART="0:1"
CONFIG_CMD_DIAG=y
CONFIG_CMD_UBI=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_BOOTP_DNS=y
# CONFIG_MMC is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_BOOTDELAY=5
# CONFIG_CONSOLE_MUX is not set
# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="\nEB+CPU5282> "
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_DATE=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_LED_STATUS=y
CONFIG_LED_STATUS0=y
CONFIG_LED_STATUS_BIT=8
CONFIG_BOOTDELAY=5
# CONFIG_CONSOLE_MUX is not set
# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADB is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_DATE=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_LED_STATUS=y
CONFIG_LED_STATUS0=y
CONFIG_LED_STATUS_BIT=8
CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:512k(xloader-nand),1024k(uboot-nand),256k(params-nand),5120k(kernel),-(ubifs)"
CONFIG_CMD_UBI=y
CONFIG_ENV_IS_IN_NAND=y
+CONFIG_BOOTP_DNS=y
CONFIG_SYS_OMAP24_I2C_SPEED=400000
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttySC0,115200"
CONFIG_VERSION_VARIABLE=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_BOOTD is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="EDB9315A> "
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_TARGET_EDISON=y
CONFIG_SMP=y
CONFIG_HUSH_PARSER=y
+# CONFIG_CMDLINE_EDITING is not set
CONFIG_CMD_CPU=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="EDMiniV2> "
CONFIG_CMD_IMLS=y
CONFIG_CMD_IDE=y
CONFIG_SILENT_CONSOLE=y
CONFIG_CONSOLE_MUX=y
# CONFIG_DISPLAY_CPUINFO is not set
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
+# CONFIG_SYS_LONGHELP is not set
CONFIG_SYS_PROMPT="ESPRESSO7420 # "
# CONFIG_AUTOBOOT is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttySC0,115200 root=1f01"
CONFIG_VERSION_VARIABLE=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_BOOTD is not set
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="am335x-draco"
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_BOOTDELAY=3
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_ENV_IS_IN_NAND=y
+CONFIG_BOOTP_DNS=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_SUBNETMASK=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_BOOTCOUNT_ENV=y
CONFIG_DFU_NAND=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_UBI=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_PRE_CONSOLE_BUFFER=y
CONFIG_PRE_CON_BUF_ADDR=0x1e720000
# CONFIG_DISPLAY_CPUINFO is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_I2C=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
+CONFIG_BOOTP_SUBNETMASK=y
CONFIG_REGMAP=y
CONFIG_CLK=y
CONFIG_DM_I2C=y
CONFIG_MTDIDS_DEFAULT="nand0=mxc_nand,nor0=physmap-flash.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=mxc_nand:50m(root1),32m(rootfb),64m(pcache),64m(app1),10m(app2),-(spool);physmap-flash.0:512k(u-boot),64k(env1),64k(env2),3776k(kernel1),3776k(kernel2)"
CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_BOOTP_DNS=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_SUBNETMASK=y
CONFIG_MXC_GPIO=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CPU=y
CONFIG_BOOTDELAY=1
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_DEFAULT_FDT_FILE="imx6q-b450v3.dtb"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_DOS_PARTITION=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_BOOTCOUNT_EXT=y
+CONFIG_SYS_BOOTCOUNT_EXT_DEVPART="1:5"
+CONFIG_SYS_BOOTCOUNT_ADDR=0x7000A000
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_NETDEVICES=y
CONFIG_BOOTDELAY=1
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_DEFAULT_FDT_FILE="imx6q-b650v3.dtb"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_DOS_PARTITION=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_BOOTCOUNT_EXT=y
+CONFIG_SYS_BOOTCOUNT_EXT_DEVPART="1:5"
+CONFIG_SYS_BOOTCOUNT_ADDR=0x7000A000
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_NETDEVICES=y
CONFIG_BOOTDELAY=1
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_DEFAULT_FDT_FILE="imx6q-b850v3.dtb"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_DOS_PARTITION=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_BOOTCOUNT_EXT=y
+CONFIG_SYS_BOOTCOUNT_EXT_DEVPART="1:5"
+CONFIG_SYS_BOOTCOUNT_ADDR=0x7000A000
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_NETDEVICES=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_NAND=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_PHYLIB=y
CONFIG_TIMER=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
-# CONFIG_SYS_STDIO_DEREGISTER is not set
+CONFIG_SUPPORT_RAW_INITRD=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
-# CONFIG_SYS_STDIO_DEREGISTER is not set
+CONFIG_SUPPORT_RAW_INITRD=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
-# CONFIG_SYS_STDIO_DEREGISTER is not set
+CONFIG_SUPPORT_RAW_INITRD=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
+# CONFIG_SYS_LONGHELP is not set
CONFIG_SYS_PROMPT="> "
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_HIGHBANK=y
CONFIG_SYS_TEXT_BASE=0x00008000
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_OF_BOARD_SETUP=y
+# CONFIG_USE_BOOTCOMMAND is not set
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_HUSH_PARSER=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds...\nPress <s> to stop or <d> to delay\n"
CONFIG_AUTOBOOT_KEYED_CTRLC=y
-CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_ISO_PARTITION=y
-CONFIG_EFI_PARTITION=y
-# CONFIG_PARTITION_UUIDS is not set
CONFIG_ENV_IS_IN_NVRAM=y
CONFIG_SCSI_AHCI=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0xfff3cf0c
# CONFIG_MMC is not set
CONFIG_SCSI=y
CONFIG_OF_LIBFDT=y
CONFIG_VERSION_VARIABLE=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Enter password - autoboot in %d seconds...\n"
CONFIG_AUTOBOOT_DELAY_STR="ids"
CONFIG_MTDIDS_DEFAULT="nor0=ff800000.flash,nand0=e1000000.flash"
CONFIG_MTDPARTS_DEFAULT="mtdparts=ff800000.flash:7m(dum),768k(BOOT-BIN),128k(BOOT-ENV),128k(BOOT-REDENV);e1000000.flash:-(ubi)"
CONFIG_CMD_UBI=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
+CONFIG_BOOTP_SUBNETMASK=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_BOOTCOUNT_I2C=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0x9
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
CONFIG_BOOTDELAY=5
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="MIPSfpga # "
# CONFIG_CMD_SAVEENV is not set
CONFIG_CMD_MEMINFO=y
CONFIG_TARGET_IMX31_PHYCORE=y
CONFIG_SYS_TEXT_BASE=0xA0000000
CONFIG_BOOTDELAY=3
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="uboot> "
CONFIG_CMD_IMLS=y
CONFIG_CMD_EEPROM=y
CONFIG_BOOTDELAY=3
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_I2C=y
CONFIG_FIT_VERBOSE=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_SPL=y
CONFIG_SPL_DMA_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_TEXT_BASE=0x17800000
CONFIG_TARGET_MX6LOGICPD=y
CONFIG_DEFAULT_DEVICE_TREE="imx6q-logicpd"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/logicpd/imx6/mx6q_2x_MT41K512M16HA.cfg,MX6Q"
CONFIG_BOOTDELAY=3
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
-CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="i.MX6 Logic # "
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MEMTEST=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND_TRIMFFS=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nand0=gpmi-nand"
CONFIG_MTDPARTS_DEFAULT="mtdparts=gpmi-nand:4m(uboot),1m(env),16m(kernel),1m(dtb),-(fs)"
CONFIG_FIT_VERBOSE=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_SPL=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_OS_BOOT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_SPL=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_OS_BOOT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_SPL=y
CONFIG_SPL_DMA_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_FIT_VERBOSE=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_SPL=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_OS_BOOT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="geam6ul> "
CONFIG_FIT_VERBOSE=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_SPL=y
CONFIG_SPL_DMA_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_FIT_VERBOSE=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="isiotmx6ul> "
CONFIG_FIT_VERBOSE=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_SPL=y
CONFIG_SPL_DMA_SUPPORT=y
CONFIG_HUSH_PARSER=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="Integrator-AP # "
CONFIG_CMD_IMLS=y
CONFIG_CMD_ARMFLASH=y
CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PCI=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="Integrator-AP # "
CONFIG_CMD_IMLS=y
CONFIG_CMD_ARMFLASH=y
CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PCI=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="Integrator-AP # "
CONFIG_CMD_IMLS=y
CONFIG_CMD_ARMFLASH=y
CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PCI=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="Integrator-AP # "
CONFIG_CMD_IMLS=y
CONFIG_CMD_ARMFLASH=y
CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PCI=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="Integrator-CP # "
CONFIG_CMD_IMLS=y
CONFIG_CMD_ARMFLASH=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="Integrator-CP # "
CONFIG_CMD_IMLS=y
CONFIG_CMD_ARMFLASH=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="Integrator-CP # "
CONFIG_CMD_IMLS=y
CONFIG_CMD_ARMFLASH=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="Integrator-CP # "
CONFIG_CMD_IMLS=y
CONFIG_CMD_ARMFLASH=y
CONFIG_CMD_DIAG=y
CONFIG_CMD_UBI=y
CONFIG_ENV_IS_IN_NAND=y
+CONFIG_BOOTP_DNS=y
# CONFIG_MMC is not set
CONFIG_SYS_NS16550=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="keystone-k2e-evm"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_HUSH_PARSER=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_GPT is not set
CONFIG_MTDIDS_DEFAULT="nand0=davinci_nand.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=davinci_nand.0:1024k(bootloader)ro,512k(params)ro,-(ubifs)"
CONFIG_CMD_UBI=y
-CONFIG_ISO_PARTITION=y
-CONFIG_EFI_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_DTB_RESELECT=y
CONFIG_MULTI_DTB_FIT=y
CONFIG_ARM=y
CONFIG_ARCH_KEYSTONE=y
+CONFIG_TI_SECURE_DEVICE=y
CONFIG_SYS_TEXT_BASE=0xC000060
CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_TARGET_K2E_EVM=y
CONFIG_DEFAULT_DEVICE_TREE="keystone-k2e-evm"
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_FIT_IMAGE_POST_PROCESS=y
CONFIG_OF_BOARD_SETUP=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
-CONFIG_HUSH_PARSER=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_GPT is not set
CONFIG_MTDIDS_DEFAULT="nand0=davinci_nand.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=davinci_nand.0:1024k(bootloader)ro,512k(params)ro,-(ubifs)"
CONFIG_CMD_UBI=y
-CONFIG_ISO_PARTITION=y
-CONFIG_EFI_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="keystone-k2g-evm"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_HUSH_PARSER=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_GPT is not set
CONFIG_MTDIDS_DEFAULT="nand0=davinci_nand.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=davinci_nand.0:1024k(bootloader)ro,512k(params)ro,-(ubifs)"
CONFIG_CMD_UBI=y
-CONFIG_ISO_PARTITION=y
-CONFIG_EFI_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_OF_LIST="keystone-k2g-generic keystone-k2g-evm keystone-k2g-ice"
CONFIG_DTB_RESELECT=y
CONFIG_ARM=y
CONFIG_ARCH_KEYSTONE=y
+CONFIG_TI_SECURE_DEVICE=y
CONFIG_SYS_TEXT_BASE=0xC000060
CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_TARGET_K2G_EVM=y
CONFIG_DEFAULT_DEVICE_TREE="keystone-k2g-evm"
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_FIT_IMAGE_POST_PROCESS=y
CONFIG_OF_BOARD_SETUP=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
-CONFIG_HUSH_PARSER=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_GPT is not set
CONFIG_MTDIDS_DEFAULT="nand0=davinci_nand.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=davinci_nand.0:1024k(bootloader)ro,512k(params)ro,-(ubifs)"
CONFIG_CMD_UBI=y
-CONFIG_ISO_PARTITION=y
-CONFIG_EFI_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
# CONFIG_BLK is not set
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="keystone-k2hk-evm"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_HUSH_PARSER=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_GPT is not set
CONFIG_MTDIDS_DEFAULT="nand0=davinci_nand.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=davinci_nand.0:1024k(bootloader)ro,512k(params)ro,-(ubifs)"
CONFIG_CMD_UBI=y
-CONFIG_ISO_PARTITION=y
-CONFIG_EFI_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_DTB_RESELECT=y
CONFIG_MULTI_DTB_FIT=y
CONFIG_ARM=y
CONFIG_ARCH_KEYSTONE=y
+CONFIG_TI_SECURE_DEVICE=y
CONFIG_SYS_TEXT_BASE=0xC000060
CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_TARGET_K2HK_EVM=y
CONFIG_DEFAULT_DEVICE_TREE="keystone-k2hk-evm"
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_FIT_IMAGE_POST_PROCESS=y
CONFIG_OF_BOARD_SETUP=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
-CONFIG_HUSH_PARSER=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_GPT is not set
CONFIG_MTDIDS_DEFAULT="nand0=davinci_nand.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=davinci_nand.0:1024k(bootloader)ro,512k(params)ro,-(ubifs)"
CONFIG_CMD_UBI=y
-CONFIG_ISO_PARTITION=y
-CONFIG_EFI_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="keystone-k2l-evm"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_HUSH_PARSER=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_GPT is not set
CONFIG_MTDIDS_DEFAULT="nand0=davinci_nand.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=davinci_nand.0:1024k(bootloader)ro,512k(params)ro,-(ubifs)"
CONFIG_CMD_UBI=y
-CONFIG_ISO_PARTITION=y
-CONFIG_EFI_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_DTB_RESELECT=y
CONFIG_MULTI_DTB_FIT=y
CONFIG_OMAP44XX=y
CONFIG_TARGET_KC1=y
# CONFIG_SPL_NAND_SUPPORT is not set
+CONFIG_DISTRO_DEFAULTS=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SPL=y
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=2
-CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="kc1 # "
CONFIG_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x82000000
CONFIG_FASTBOOT_BUF_SIZE=0x2000000
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
-CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_ISO_PARTITION=y
-CONFIG_EFI_PARTITION=y
CONFIG_SYS_OMAP24_I2C_SPEED=400000
CONFIG_MMC_OMAP_HS=y
CONFIG_SYS_NS16550=y
CONFIG_CMD_UBI=y
# CONFIG_CMD_UBIFS is not set
CONFIG_ENV_IS_IN_EEPROM=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_BOOTCOUNT_RAM=y
# CONFIG_MMC is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_CMD_UBI=y
# CONFIG_CMD_UBIFS is not set
CONFIG_ENV_IS_IN_EEPROM=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_BOOTCOUNT_RAM=y
# CONFIG_MMC is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_CMD_UBI=y
# CONFIG_CMD_UBIFS is not set
CONFIG_ENV_IS_IN_EEPROM=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_BOOTCOUNT_RAM=y
# CONFIG_MMC is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_CMD_UBIFS is not set
CONFIG_DOS_PARTITION=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0xFB000020
# CONFIG_MMC is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_MTDPARTS_DEFAULT="mtdparts=boot:768k(u-boot),128k(env),128k(envred),-(ubi0);app:-(ubi1);"
CONFIG_CMD_UBI=y
# CONFIG_CMD_UBIFS is not set
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0xE011BFF8
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
# CONFIG_PCI is not set
CONFIG_CMD_UBI=y
# CONFIG_CMD_UBIFS is not set
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_BOOTCOUNT_RAM=y
# CONFIG_MMC is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MTDPARTS_DEFAULT="mtdparts=boot:768k(u-boot),128k(env),128k(envred),-(ubi0);"
CONFIG_CMD_UBI=y
# CONFIG_CMD_UBIFS is not set
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0xE011BFF8
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
# CONFIG_PCI is not set
# CONFIG_CMD_UBIFS is not set
CONFIG_DOS_PARTITION=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0xFB000020
# CONFIG_MMC is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_CMD_UBI=y
# CONFIG_CMD_UBIFS is not set
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_BOOTCOUNT_RAM=y
# CONFIG_MMC is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MTDPARTS_DEFAULT="mtdparts=boot:768k(u-boot),128k(env),128k(envred),-(ubi0);"
CONFIG_CMD_UBI=y
# CONFIG_CMD_UBIFS is not set
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0xE0113FF8
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
# CONFIG_PCI is not set
CONFIG_CMD_UBI=y
# CONFIG_CMD_UBIFS is not set
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_BOOTCOUNT_RAM=y
# CONFIG_MMC is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MTDPARTS_DEFAULT="mtdparts=boot:768k(u-boot),128k(env),128k(envred),-(ubi0);"
CONFIG_CMD_UBI=y
# CONFIG_CMD_UBIFS is not set
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0xE0113FF8
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
# CONFIG_PCI is not set
CONFIG_CMD_UBI=y
# CONFIG_CMD_UBIFS is not set
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_BOOTCOUNT_RAM=y
# CONFIG_MMC is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_CMD_DIAG=y
CONFIG_CMD_UBI=y
# CONFIG_CMD_UBIFS is not set
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0xE0113FF8
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
# CONFIG_PCI is not set
CONFIG_MTDPARTS_DEFAULT="mtdparts=boot:768k(u-boot),128k(env),128k(envred),-(ubi0);"
CONFIG_CMD_UBI=y
# CONFIG_CMD_UBIFS is not set
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0xE0113FF8
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
# CONFIG_PCI is not set
CONFIG_CMD_DIAG=y
CONFIG_CMD_UBI=y
# CONFIG_CMD_UBIFS is not set
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0xE0113FF8
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
# CONFIG_PCI is not set
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/null console=ttySC4,115200"
CONFIG_VERSION_VARIABLE=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="KZM-A9-GT# "
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=1
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_DEFAULT_FDT_FILE="imx6ul-liteboard.dtb"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_FSL_LS_PPA=y
CONFIG_QSPI_AHB_INIT=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-qds"
+CONFIG_DISTRO_DEFAULTS=y
# CONFIG_SYS_MALLOC_F is not set
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000"
+# CONFIG_USE_BOOTCOMMAND is not set
# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_GPT=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_DATE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000"
+# CONFIG_USE_BOOTCOMMAND is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_CMD_GREPENV=y
CONFIG_CMD_GPT=y
CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_OF_CONTROL=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_TARGET_LS1021ATWR=y
CONFIG_SYS_TEXT_BASE=0x60100000
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-lpuart"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SILENT_CONSOLE=y
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_DM=y
CONFIG_TARGET_LS1021ATWR=y
CONFIG_SYS_TEXT_BASE=0x40100000
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SILENT_CONSOLE=y
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_DM=y
CONFIG_SYS_TEXT_BASE=0x60100000
CONFIG_FSL_LS_PPA=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
-CONFIG_HUSH_PARSER=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PXE=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_SYS_TEXT_BASE=0x60100000
CONFIG_FSL_LS_PPA=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-lpuart"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="LPUART"
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
-CONFIG_HUSH_PARSER=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PXE=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT"
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SPL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
-CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PXE=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_SYS_TEXT_BASE=0x60100000
CONFIG_FSL_LS_PPA=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
-CONFIG_HUSH_PARSER=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PXE=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_SYS_TEXT_BASE=0x40100000
CONFIG_FSL_LS_PPA=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT"
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
-CONFIG_HUSH_PARSER=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PXE=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
CONFIG_MTDPARTS_DEFAULT="mtdparts=spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT"
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SPL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
-CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PXE=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT,SD_BOOT_QSPI"
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SPL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
-CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PXE=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
CONFIG_MTDPARTS_DEFAULT="mtdparts=spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT"
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SPL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0
CONFIG_SPL_HASH_SUPPORT=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
-CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PXE=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT"
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SPL=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
-CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PXE=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_SYS_TEXT_BASE=0x60100000
CONFIG_SECURE_BOOT=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
-CONFIG_HUSH_PARSER=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_SYS_TEXT_BASE=0x60100000
CONFIG_FSL_LS_PPA=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
-CONFIG_HUSH_PARSER=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_SYS_TEXT_BASE=0x60100000
CONFIG_FSL_LS_PPA=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-lpuart"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="LPUART"
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
-CONFIG_HUSH_PARSER=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_SYS_TEXT_BASE=0x82000000
CONFIG_FSL_LS_PPA=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SPL=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110
-CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_TEXT_BASE=0x40100000
CONFIG_FSL_LS_PPA=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_QSPI_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:2m(uboot),14m(free)"
-CONFIG_HUSH_PARSER=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.quadspi:2m(uboot),14m(free)"
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_TEXT_BASE=0x82000000
CONFIG_FSL_LS_PPA=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SPL=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110
-CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_SYS_TEXT_BASE=0x82000000
CONFIG_FSL_LS_PPA=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT_QSPI"
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:2m(uboot),14m(free)"
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SPL=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110
-CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.quadspi:2m(uboot),14m(free)"
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_SYS_TEXT_BASE=0x82000000
CONFIG_FSL_LS_PPA=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,EMMC_BOOT"
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SPL=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110
-CONFIG_HUSH_PARSER=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_FSL_LS_PPA=y
CONFIG_QSPI_AHB_INIT=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds"
+CONFIG_DISTRO_DEFAULTS=y
# CONFIG_SYS_MALLOC_F is not set
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, QSPI_BOOT"
+# CONFIG_USE_BOOTCOMMAND is not set
# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PING=y
CONFIG_OF_CONTROL=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_FSL_LS_PPA=y
CONFIG_QSPI_AHB_INIT=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds"
+CONFIG_DISTRO_DEFAULTS=y
# CONFIG_SYS_MALLOC_F is not set
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, QSPI_BOOT"
+# CONFIG_USE_BOOTCOMMAND is not set
# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PING=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds"
+CONFIG_DISTRO_DEFAULTS=y
# CONFIG_SYS_MALLOC_F is not set
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT_QSPI"
CONFIG_SD_BOOT=y
+# CONFIG_USE_BOOTCOMMAND is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
-CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PING=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/sda2"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
+CONFIG_SUPPORT_RAW_INITRD=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DFU_MMC=y
CONFIG_DFU_SF=y
CONFIG_SPI_FLASH=y
CONFIG_TARGET_MCCMON6=y
CONFIG_SPL_SERIAL_SUPPORT=y
# CONFIG_CMD_BMODE is not set
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/liebherr/mccmon6/mon6_imximage_nor.cfg"
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SPL=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_NOR_SUPPORT=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nor0=8000000.nor"
CONFIG_MTDPARTS_DEFAULT="mtdparts=8000000.nor:32m@0x0(mccmon6-image.nor),256k@0x40000(u-boot-env.nor),1m@0x80000(u-boot.nor),8m@0x180000(kernel.nor),8m@0x980000(swupdate-kernel.nor),8m@0x1180000(swupdate-rootfs.nor),128k@0x1980000(kernel-dtb.nor),128k@0x19C0000(swupdate-kernel-dtb.nor)"
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
# CONFIG_CMD_BMODE is not set
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/liebherr/mccmon6/mon6_imximage_sd.cfg"
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SPL=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_NOR_SUPPORT=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nor0=8000000.nor"
CONFIG_MTDPARTS_DEFAULT="mtdparts=8000000.nor:32m@0x0(mccmon6-image.nor),256k@0x40000(u-boot-env.nor),1m@0x80000(u-boot.nor),8m@0x180000(kernel.nor),8m@0x980000(swupdate-kernel.nor),8m@0x1180000(swupdate-rootfs.nor),128k@0x1980000(kernel-dtb.nor),128k@0x19C0000(swupdate-kernel-dtb.nor)"
CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:512k(MLO),1m(u-boot),256k(env1),256k(env2),6m(kernel),6m(k_recovery),8m(fs_recovery),-(common_data)"
CONFIG_CMD_UBI=y
CONFIG_ENV_IS_IN_NAND=y
+CONFIG_BOOTP_DNS=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_CMD_PING=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_CMD_PING=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_NAND=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_CMD_UBI=y
# CONFIG_CMD_UBIFS is not set
CONFIG_ENV_IS_IN_EEPROM=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_BOOTCOUNT_RAM=y
# CONFIG_MMC is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SYS_OS_BASE=0x2c060000
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="U-Boot-mONStR> "
CONFIG_CMD_IMLS=y
CONFIG_CMD_SPL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_NETCONSOLE=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_SPL_DM=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHY_ATHEROS=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CPU=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=5
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_PCI=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttySC0,115200"
CONFIG_VERSION_VARIABLE=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
# CONFIG_AUTOBOOT is not set
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttySC0,115200"
CONFIG_VERSION_VARIABLE=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
# CONFIG_AUTOBOOT is not set
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttySC0,115200 root=1f01"
CONFIG_VERSION_VARIABLE=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_BOOTD is not set
CONFIG_BOOTDELAY=-1
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttySC0,38400"
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_BOOTD is not set
CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:512k(MLO),1m(u-boot),256k(env1),256k(env2),8m(ubisystem),-(rootfs)"
CONFIG_CMD_UBI=y
CONFIG_ENV_IS_IN_NAND=y
+CONFIG_BOOTP_DNS=y
CONFIG_FPGA_XILINX=y
CONFIG_SYS_OMAP24_I2C_SPEED=400000
CONFIG_MMC_OMAP_HS=y
CONFIG_ARM=y
CONFIG_TARGET_MX31ADS=y
CONFIG_SYS_TEXT_BASE=0xA0000000
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL=y
# CONFIG_SPL_FRAMEWORK is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_EFI_PARTITION=y
# CONFIG_PARTITION_UUIDS is not set
CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_BOOTP_DNS=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_SUBNETMASK=y
CONFIG_MXC_GPIO=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_NAND=y
CONFIG_DEFAULT_DEVICE_TREE="imx53-cx9020"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/beckhoff/mx53cx9020/imximage.cfg"
CONFIG_BOOTDELAY=1
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MMC=y
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MMC=y
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_I2C=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
-CONFIG_BOOTCOUNT=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_EXT=y
CONFIG_SYS_BOOTCOUNT_EXT_DEVPART="0:5"
+CONFIG_SYS_BOOTCOUNT_ADDR=0x7000A000
CONFIG_NETDEVICES=y
CONFIG_RTC_S35392A=y
CONFIG_USB=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
-# CONFIG_SYS_STDIO_DEREGISTER is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_SPL_EXT_SUPPORT=y
# CONFIG_CMD_BMODE is not set
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qarm2/imximage_mx6dl.cfg,MX6DL,DDR_MB=2048"
CONFIG_BOOTDELAY=3
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_BMODE is not set
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qarm2/imximage_mx6dl.cfg,MX6DL,MX6DL_LPDDR2,DDR_MB=512"
CONFIG_BOOTDELAY=3
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,SPL,MX6QDL"
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_SPL=y
CONFIG_SPL_USB_HOST_SUPPORT=y
CONFIG_SPL_USB_GADGET_SUPPORT=y
# CONFIG_CMD_BMODE is not set
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qarm2/imximage.cfg,MX6Q,DDR_MB=2048"
CONFIG_BOOTDELAY=3
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_BMODE is not set
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qarm2/imximage.cfg,MX6Q,MX6DQ_LPDDR2,DDR_MB=512"
CONFIG_BOOTDELAY=3
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,MX6Q,DDR_MB=1024,SABRELITE"
CONFIG_BOOTDELAY=3
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
-# CONFIG_SYS_STDIO_DEREGISTER is not set
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_FASTBOOT=y
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_SPL=y
CONFIG_SPL_EXT_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_SPL=y
CONFIG_SPL_EXT_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_BMODE is not set
CONFIG_DEFAULT_DEVICE_TREE="imx6sl-evk"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg"
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_DEFAULT_DEVICE_TREE="imx6sl-evk"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg"
CONFIG_SPI_BOOT=y
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_BMODE is not set
CONFIG_DEFAULT_DEVICE_TREE="imx6sl-evk"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_SPL_EXT_SUPPORT=y
# CONFIG_CMD_BMODE is not set
CONFIG_DEFAULT_DEVICE_TREE="imx6sll-evk"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sllevk/imximage.cfg"
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_BMODE is not set
CONFIG_DEFAULT_DEVICE_TREE="imx6sll-evk"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sllevk/imximage.cfg"
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_BMODE is not set
CONFIG_DEFAULT_DEVICE_TREE="imx6sx-sabreauto"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sxsabreauto/imximage.cfg"
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_FLASH is not set
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sxsabresd/imximage.cfg"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_FLASH is not set
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_SPL=y
CONFIG_SPL_EXT_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_SPL_EXT_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_SPL_EXT_SUPPORT=y
CONFIG_TARGET_MX6ULL_14X14_EVK=y
CONFIG_DEFAULT_DEVICE_TREE="imx6ull-14x14-evk"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6ullevk/imximage.cfg"
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_USE_IMXIMG_PLUGIN=y
CONFIG_DEFAULT_DEVICE_TREE="imx6ull-14x14-evk"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6ullevk/imximage.cfg"
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl2g.cfg,MX6DL,DDR_MB=2048"
CONFIG_BOOTDELAY=3
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
-# CONFIG_SYS_STDIO_DEREGISTER is not set
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_FASTBOOT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl.cfg,MX6DL,DDR_MB=1024"
CONFIG_BOOTDELAY=3
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
-# CONFIG_SYS_STDIO_DEREGISTER is not set
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_FASTBOOT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q2g.cfg,MX6Q,DDR_MB=2048"
CONFIG_BOOTDELAY=3
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
-# CONFIG_SYS_STDIO_DEREGISTER is not set
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_FASTBOOT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,MX6Q,DDR_MB=1024"
CONFIG_BOOTDELAY=3
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
-# CONFIG_SYS_STDIO_DEREGISTER is not set
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_FASTBOOT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s1g.cfg,MX6S,DDR_MB=1024"
CONFIG_BOOTDELAY=3
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
-# CONFIG_SYS_STDIO_DEREGISTER is not set
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_FASTBOOT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s.cfg,MX6S,DDR_MB=512"
CONFIG_BOOTDELAY=3
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
-# CONFIG_SYS_STDIO_DEREGISTER is not set
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_FASTBOOT=y
CONFIG_TARGET_NX25_AE250=y
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="RISC-V # "
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_ARCH_EXYNOS4=y
CONFIG_TARGET_ODROID=y
CONFIG_DEFAULT_DEVICE_TREE="exynos4412-odroid"
+CONFIG_DISTRO_DEFAULTS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="Please use defined boot"
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
-CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Odroid # "
-CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_XIMG is not set
CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_DFU=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
# CONFIG_CMD_MISC is not set
CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_ISO_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_DFU_MMC=y
CONFIG_SYS_I2C_S3C24X0=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_OMAP3_LOGIC=y
CONFIG_DEFAULT_DEVICE_TREE="logicpd-torpedo-37xx-devkit"
+CONFIG_DISTRO_DEFAULTS=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_OS_BOOT=y
-CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="OMAP Logic # "
CONFIG_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x82000000
CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:512k(MLO),1792k(u-boot),128k(spl-os),128k(u-boot-env),6m(kernel),-(fs)"
CONFIG_CMD_UBI=y
-CONFIG_ISO_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_SPL_OF_PLATDATA=y
+# CONFIG_ENV_IS_IN_FAT is not set
CONFIG_ENV_IS_IN_NAND=y
# CONFIG_BLK is not set
CONFIG_DM_I2C=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_OMAP3_OVERO=y
+CONFIG_DISTRO_DEFAULTS=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_OS_BOOT=y
-CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Overo # "
-CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
CONFIG_CMD_SPL=y
CONFIG_CMD_SPL_NAND_OFS=0x240000
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
-CONFIG_CMD_PART=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:512k(xloader),1792k(u-boot),256k(environ),8m(linux),-(rootfs)"
CONFIG_CMD_UBI=y
-CONFIG_ISO_PARTITION=y
-CONFIG_EFI_PARTITION=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_TARGET_OMAP3_ZOOM1=y
+CONFIG_DISTRO_DEFAULTS=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_LOCK_UNLOCK=y
-CONFIG_CMD_PART=y
CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nand0=nand"
CONFIG_MTDPARTS_DEFAULT="mtdparts=nand:512k(x-loader),1920k(u-boot),128k(u-boot-env),4m(kernel),-(fs)"
-CONFIG_ISO_PARTITION=y
-CONFIG_EFI_PARTITION=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC=16296
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_ARMV7_LPAE=y
+CONFIG_DISTRO_DEFAULTS=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
CONFIG_SPL_OS_BOOT=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_SPL=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_DFU=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_ISO_PARTITION=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SCSI_AHCI=y
CONFIG_DFU_MMC=y
CONFIG_CMD_UBI=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_BOOTP_DNS=y
CONFIG_NAND=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_BOOTARGS="console=ttymxc0,115200"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_DEFAULT_FDT_FILE="imx6ul-opos6uldev.dtb"
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
CONFIG_TARGET_ORIGEN=y
CONFIG_IDENT_STRING=" for ORIGEN"
CONFIG_DEFAULT_DEVICE_TREE="exynos4210-origen"
+CONFIG_DISTRO_DEFAULTS=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SPL=y
# CONFIG_SPL_FRAMEWORK is not set
-CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="ORIGEN # "
-CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_XIMG is not set
CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_DFU=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_NET is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_CACHE=y
# CONFIG_CMD_MISC is not set
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_ISO_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_DFU_MMC=y
CONFIG_DM_MMC=y
CONFIG_TARGET_OT1200=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/bachmann/ot1200/mx6q_4x_mt41j128.cfg,MX6Q"
CONFIG_BOOTDELAY=3
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6Q"
CONFIG_BOOTDELAY=3
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MIPS=y
CONFIG_TARGET_PB1X00=y
CONFIG_SYS_EXTRA_OPTIONS="PB1000"
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="Pb1x00 # "
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_ELF is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_ISO_PARTITION is not set
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_MTD_NOR_FLASH=y
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_EXTRA_OPTIONS="REV1"
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_POWER_SUPPORT=y
CONFIG_SPL_YMODEM_SUPPORT=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_SPL=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_ISO_PARTITION=y
-CONFIG_EFI_PARTITION=y
CONFIG_MMC_OMAP_HS=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_EXTRA_OPTIONS="REV3"
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_POWER_SUPPORT=y
CONFIG_SPL_YMODEM_SUPPORT=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_SPL=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_ISO_PARTITION=y
-CONFIG_EFI_PARTITION=y
CONFIG_MMC_OMAP_HS=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_CMD_HDMIDETECT=y
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6Q"
CONFIG_BOOTDELAY=3
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_SPL_DMA_SUPPORT=y
CONFIG_SPL_EXT_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_YMODEM_SUPPORT=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_MTDIDS_DEFAULT="nand0=nand"
CONFIG_MTDPARTS_DEFAULT="mtdparts=nand:16m(uboot),1m(env),-(rootfs)"
CONFIG_CMD_UBI=y
-CONFIG_ISO_PARTITION=y
-CONFIG_EFI_PARTITION=y
-# CONFIG_PARTITION_UUIDS is not set
# CONFIG_SPL_PARTITION_UUIDS is not set
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_DM=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_DISTRO_DEFAULTS=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_POWER_SUPPORT=y
CONFIG_SPL_YMODEM_SUPPORT=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_SPL=y
CONFIG_CMD_SPL_NAND_OFS=0x240000
CONFIG_CMD_ASKENV=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
-CONFIG_CMD_PART=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:512k(SPL),512k(SPL.backup1),512k(SPL.backup2),512k(SPL.backup3),1536k(u-boot),512k(u-boot-spl-os),512k(u-boot-env),5m(kernel),-(rootfs)"
CONFIG_CMD_DIAG=y
-CONFIG_ISO_PARTITION=y
-CONFIG_EFI_PARTITION=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_DISTRO_DEFAULTS=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
CONFIG_SPL_EXT_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="pepper# "
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_ISO_PARTITION=y
-CONFIG_EFI_PARTITION=y
CONFIG_MMC_OMAP_HS=y
CONFIG_PHYLIB=y
CONFIG_PHY_MICREL=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_CMD_HDMIDETECT=y
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_SPL_DMA_SUPPORT=y
CONFIG_SPL_EXT_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_YMODEM_SUPPORT=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
# CONFIG_CMD_NAND is not set
CONFIG_CMD_SF=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_MTDIDS_DEFAULT="nand0=gpmi-nand"
CONFIG_MTDPARTS_DEFAULT="mtdparts=gpmi-nand:-(nand);spi2.0:1024k(bootloader),64k(env1),64k(env2),-(rescue)"
CONFIG_CMD_UBI=y
-CONFIG_ISO_PARTITION=y
-CONFIG_EFI_PARTITION=y
-# CONFIG_PARTITION_UUIDS is not set
# CONFIG_SPL_PARTITION_UUIDS is not set
CONFIG_DM=y
CONFIG_MTD=y
# CONFIG_CMD_BMODE is not set
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/technexion/pico-imx6ul/imximage.cfg"
CONFIG_BOOTDELAY=3
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_DEFAULT_FDT_FILE="imx6ul-pico-hobbit.dtb"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_ENV_IS_IN_FAT=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6DL"
CONFIG_BOOTDELAY=3
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_SPL_DMA_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6Q"
CONFIG_BOOTDELAY=3
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_SPL_DMA_SUPPORT=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="pm9261> "
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
CONFIG_MTDPARTS_DEFAULT="mtdparts=physmap-flash.0:256k(u-boot)ro,64k(u-boot-env)ro,1408k(kernel),-(rootfs);nand:-(nand)"
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="u-boot-pm9263> "
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
CONFIG_MTDPARTS_DEFAULT="mtdparts=physmap-flash.0:256k(u-boot)ro,64k(u-boot-env)ro,1408k(kernel),-(rootfs);nand:-(nand)"
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_JFFS2=y
CONFIG_ENV_IS_IN_NAND=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
# CONFIG_MMC is not set
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_CMD_UBI=y
# CONFIG_CMD_UBIFS is not set
CONFIG_ENV_IS_IN_EEPROM=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_BOOTCOUNT_RAM=y
# CONFIG_MMC is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="am335x-pxm50"
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_BOOTDELAY=3
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_ENV_IS_IN_NAND=y
+CONFIG_BOOTP_DNS=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_SUBNETMASK=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_BOOTCOUNT_ENV=y
CONFIG_DFU_NAND=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_SPL_OF_CONTROL=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_SPL_DM=y
CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CPU=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CPU=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CPU=y
CONFIG_CMD_FAT=y
# CONFIG_ISO_PARTITION is not set
CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
CONFIG_LZMA=y
CONFIG_CMD_FAT=y
# CONFIG_ISO_PARTITION is not set
CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
CONFIG_LZMA=y
CONFIG_CMD_FAT=y
# CONFIG_ISO_PARTITION is not set
CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
CONFIG_LZMA=y
CONFIG_CMD_FAT=y
# CONFIG_ISO_PARTITION is not set
CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
CONFIG_LZMA=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttySC3,115200"
CONFIG_VERSION_VARIABLE=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_BOOTD is not set
CONFIG_BOOTDELAY=-1
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttySC0,115200"
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_IDE=y
CONFIG_CMD_PCI=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttySC0,115200"
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_BOOTD is not set
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_DEFAULT_FDT_FILE="r8a7795-salvator-x.dtb"
CONFIG_VERSION_VARIABLE=y
CONFIG_HUSH_PARSER=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_DEFAULT_FDT_FILE="r8a7795-h3ulcb.dtb"
CONFIG_VERSION_VARIABLE=y
CONFIG_HUSH_PARSER=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_DEFAULT_FDT_FILE="r8a7796-salvator-x.dtb"
CONFIG_VERSION_VARIABLE=y
CONFIG_HUSH_PARSER=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_DEFAULT_FDT_FILE="r8a7796-m3ulcb.dtb"
CONFIG_VERSION_VARIABLE=y
CONFIG_HUSH_PARSER=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_DEFAULT_FDT_FILE="r8a77970-eagle.dtb"
CONFIG_VERSION_VARIABLE=y
CONFIG_HUSH_PARSER=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_DEFAULT_FDT_FILE="r8a77995-draak.dtb"
CONFIG_VERSION_VARIABLE=y
CONFIG_HUSH_PARSER=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="am335x-draco"
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_BOOTDELAY=3
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_ENV_IS_IN_NAND=y
+CONFIG_BOOTP_DNS=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_SUBNETMASK=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_BOOTCOUNT_ENV=y
CONFIG_DFU_NAND=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttySC0,115200"
CONFIG_VERSION_VARIABLE=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
# CONFIG_AUTOBOOT is not set
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttySC3,115200"
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttySC7,115200"
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="am335x-rut"
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_BOOTDELAY=3
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_ENV_IS_IN_NAND=y
+CONFIG_BOOTP_DNS=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_SUBNETMASK=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_BOOTCOUNT_ENV=y
CONFIG_DFU_NAND=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
CONFIG_SYS_TEXT_BASE=0x34800000
CONFIG_TARGET_S5P_GONI=y
CONFIG_DEFAULT_DEVICE_TREE="s5pc1xx-goni"
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/mtdblock8 rootfstype=ext4 ${console} ${meminfo} ${mtdparts}"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="Goni # "
# CONFIG_AUTOBOOT is not set
# CONFIG_CMD_XIMG is not set
CONFIG_ARCH_EXYNOS4=y
CONFIG_TARGET_S5PC210_UNIVERSAL=y
CONFIG_DEFAULT_DEVICE_TREE="exynos4210-universal_c210"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="Please use defined boot"
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
-CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Universal # "
-CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_XIMG is not set
CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_DFU=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_NET is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
# CONFIG_CMD_MISC is not set
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_MTDPARTS_DEFAULT="mtdparts=samsung-onenand:128k(s-boot),896k(bootloader),256k(params),2816k(config),8m(csa),7m(kernel),1m(log),12m(modem),60m(qboot),-(UBI)"
-CONFIG_ISO_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_DFU_MMC=y
CONFIG_SYS_I2C_S3C24X0=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_som1_ek"
CONFIG_DEBUG_UART=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2"
CONFIG_SD_BOOT=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names"
CONFIG_ENV_IS_IN_FAT=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_ptc_ek"
CONFIG_DEBUG_UART=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_MMC"
CONFIG_SD_BOOT=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_MMC=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_CLK=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_ptc_ek"
CONFIG_DEBUG_UART=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_NANDFLASH"
CONFIG_NAND_BOOT=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_NAND=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_CLK=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_xplained"
CONFIG_DEBUG_UART=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_MMC"
CONFIG_SD_BOOT=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names"
CONFIG_ENV_IS_IN_FAT=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_xplained"
CONFIG_DEBUG_UART=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_FIT=y
CONFIG_SPI_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names"
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek_cmp"
CONFIG_DEBUG_UART=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_FIT=y
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_FAT=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek_cmp"
CONFIG_DEBUG_UART=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_FIT=y
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_NAND=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek_cmp"
CONFIG_DEBUG_UART=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_FIT=y
CONFIG_SPI_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d3_xplained"
CONFIG_DEBUG_UART=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_FIT=y
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names"
CONFIG_ENV_IS_IN_FAT=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d3_xplained"
CONFIG_DEBUG_UART=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_FIT=y
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names"
CONFIG_ENV_IS_IN_NAND=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek"
CONFIG_DEBUG_UART=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_FIT=y
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names"
CONFIG_ENV_IS_IN_FAT=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek"
CONFIG_DEBUG_UART=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_FIT=y
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names"
CONFIG_ENV_IS_IN_NAND=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek"
CONFIG_DEBUG_UART=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_FIT=y
CONFIG_SPI_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names"
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4_xplained"
CONFIG_DEBUG_UART=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_FIT=y
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dma-names dmas"
CONFIG_ENV_IS_IN_FAT=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_SPL_DM=y
CONFIG_CLK=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4_xplained"
CONFIG_DEBUG_UART=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_FIT=y
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dma-names dmas"
CONFIG_ENV_IS_IN_NAND=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_SPL_DM=y
CONFIG_CLK=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4_xplained"
CONFIG_DEBUG_UART=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_FIT=y
CONFIG_SPI_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dma-names dmas"
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4ek"
CONFIG_DEBUG_UART=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_FIT=y
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dma-names dmas"
CONFIG_ENV_IS_IN_FAT=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4ek"
CONFIG_DEBUG_UART=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_FIT=y
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dma-names dmas"
CONFIG_ENV_IS_IN_NAND=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4ek"
CONFIG_DEBUG_UART=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_FIT=y
CONFIG_SPI_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dma-names dmas"
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
--- /dev/null
+CONFIG_SYS_TEXT_BASE=0
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SANDBOX64=y
+CONFIG_DEFAULT_DEVICE_TREE="sandbox64"
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_FIT=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_BOOTSTAGE=y
+CONFIG_BOOTSTAGE_REPORT=y
+CONFIG_BOOTSTAGE_FDT=y
+CONFIG_BOOTSTAGE_STASH=y
+CONFIG_BOOTSTAGE_STASH_ADDR=0x0
+CONFIG_BOOTSTAGE_STASH_SIZE=0x4096
+CONFIG_CONSOLE_RECORD=y
+CONFIG_CONSOLE_RECORD_OUT_SIZE=0x1000
+CONFIG_SILENT_CONSOLE=y
+CONFIG_PRE_CONSOLE_BUFFER=y
+CONFIG_PRE_CON_BUF_ADDR=0x100000
+CONFIG_LOG=y
+CONFIG_LOG_MAX_LEVEL=6
+CONFIG_CMD_CPU=y
+CONFIG_CMD_LICENSE=y
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_ELF is not set
+CONFIG_CMD_ASKENV=y
+CONFIG_CMD_GREPENV=y
+CONFIG_CMD_ENV_CALLBACK=y
+CONFIG_CMD_ENV_FLAGS=y
+CONFIG_LOOPW=y
+CONFIG_CMD_MD5SUM=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_MX_CYCLIC=y
+CONFIG_CMD_DEMO=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_GPT_RENAME=y
+CONFIG_CMD_IDE=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_READ=y
+CONFIG_CMD_REMOTEPROC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_TFTPSRV=y
+CONFIG_CMD_RARP=y
+CONFIG_CMD_CDP=y
+CONFIG_CMD_SNTP=y
+CONFIG_CMD_DNS=y
+CONFIG_CMD_LINK_LOCAL=y
+CONFIG_CMD_ETHSW=y
+CONFIG_CMD_BMP=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_TIMER=y
+CONFIG_CMD_SOUND=y
+CONFIG_CMD_QFW=y
+CONFIG_CMD_BOOTSTAGE=y
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_TPM=y
+CONFIG_CMD_TPM_TEST=y
+CONFIG_CMD_BTRFS=y
+CONFIG_CMD_CBFS=y
+CONFIG_CMD_CRAMFS=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_CMD_LOG=y
+CONFIG_MAC_PARTITION=y
+CONFIG_AMIGA_PARTITION=y
+CONFIG_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_HOSTFILE=y
+CONFIG_NETCONSOLE=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_DEVRES=y
+CONFIG_DEBUG_DEVRES=y
+CONFIG_ADC=y
+CONFIG_ADC_SANDBOX=y
+CONFIG_CLK=y
+CONFIG_CPU=y
+CONFIG_DM_DEMO=y
+CONFIG_DM_DEMO_SIMPLE=y
+CONFIG_DM_DEMO_SHAPE=y
+CONFIG_PM8916_GPIO=y
+CONFIG_SANDBOX_GPIO=y
+CONFIG_DM_I2C_COMPAT=y
+CONFIG_I2C_CROS_EC_TUNNEL=y
+CONFIG_I2C_CROS_EC_LDO=y
+CONFIG_DM_I2C_GPIO=y
+CONFIG_SYS_I2C_SANDBOX=y
+CONFIG_I2C_MUX=y
+CONFIG_SPL_I2C_MUX=y
+CONFIG_I2C_ARB_GPIO_CHALLENGE=y
+CONFIG_CROS_EC_KEYB=y
+CONFIG_I8042_KEYB=y
+CONFIG_LED=y
+CONFIG_LED_BLINK=y
+CONFIG_LED_GPIO=y
+CONFIG_DM_MAILBOX=y
+CONFIG_SANDBOX_MBOX=y
+CONFIG_MISC=y
+CONFIG_CROS_EC=y
+CONFIG_CROS_EC_I2C=y
+CONFIG_CROS_EC_LPC=y
+CONFIG_CROS_EC_SANDBOX=y
+CONFIG_CROS_EC_SPI=y
+CONFIG_PWRSEQ=y
+CONFIG_SPL_PWRSEQ=y
+CONFIG_I2C_EEPROM=y
+CONFIG_MMC_SANDBOX=y
+CONFIG_SPI_FLASH_SANDBOX=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DM_ETH=y
+CONFIG_NVME=y
+CONFIG_PCI=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCI_SANDBOX=y
+CONFIG_PHY=y
+CONFIG_PHY_SANDBOX=y
+CONFIG_PINCTRL=y
+CONFIG_PINCONF=y
+CONFIG_PINCTRL_ROCKCHIP_RK3036=y
+CONFIG_PINCTRL_ROCKCHIP_RK3288=y
+CONFIG_PINCTRL_SANDBOX=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_SANDBOX_POWER_DOMAIN=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_ACT8846=y
+CONFIG_DM_PMIC_PFUZE100=y
+CONFIG_DM_PMIC_MAX77686=y
+CONFIG_PMIC_PM8916=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_PMIC_S2MPS11=y
+CONFIG_DM_PMIC_SANDBOX=y
+CONFIG_PMIC_S5M8767=y
+CONFIG_PMIC_TPS65090=y
+CONFIG_DM_REGULATOR=y
+CONFIG_REGULATOR_ACT8846=y
+CONFIG_DM_REGULATOR_PFUZE100=y
+CONFIG_DM_REGULATOR_MAX77686=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_REGULATOR_S5M8767=y
+CONFIG_DM_REGULATOR_SANDBOX=y
+CONFIG_REGULATOR_TPS65090=y
+CONFIG_DM_PWM=y
+CONFIG_PWM_SANDBOX=y
+CONFIG_RAM=y
+CONFIG_REMOTEPROC_SANDBOX=y
+CONFIG_DM_RESET=y
+CONFIG_SANDBOX_RESET=y
+CONFIG_DM_RTC=y
+CONFIG_SANDBOX_SERIAL=y
+CONFIG_SOUND=y
+CONFIG_SOUND_SANDBOX=y
+CONFIG_SANDBOX_SPI=y
+CONFIG_SPMI=y
+CONFIG_SPMI_SANDBOX=y
+CONFIG_SYSRESET=y
+CONFIG_TIMER=y
+CONFIG_TIMER_EARLY=y
+CONFIG_SANDBOX_TIMER=y
+CONFIG_TPM_TIS_SANDBOX=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_EMUL=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_DM_VIDEO=y
+CONFIG_CONSOLE_ROTATION=y
+CONFIG_CONSOLE_TRUETYPE=y
+CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y
+CONFIG_VIDEO_SANDBOX_SDL=y
+CONFIG_WDT=y
+CONFIG_WDT_SANDBOX=y
+CONFIG_FS_CBFS=y
+CONFIG_FS_CRAMFS=y
+CONFIG_CMD_DHRYSTONE=y
+CONFIG_TPM=y
+CONFIG_LZ4=y
+CONFIG_ERRNO_STR=y
+CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_UNIT_TEST=y
+CONFIG_UT_TIME=y
+CONFIG_UT_DM=y
+CONFIG_UT_ENV=y
+CONFIG_UT_OVERLAY=y
CONFIG_SYS_TEXT_BASE=0
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEFAULT_DEVICE_TREE="sandbox"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_ANDROID_BOOT_IMAGE=y
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_BOOTSTAGE_STASH=y
CONFIG_BOOTSTAGE_STASH_ADDR=0x0
CONFIG_BOOTSTAGE_STASH_SIZE=0x4096
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_CONSOLE_RECORD=y
CONFIG_CONSOLE_RECORD_OUT_SIZE=0x1000
CONFIG_SILENT_CONSOLE=y
-CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
CONFIG_CMD_LICENSE=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPT=y
CONFIG_CMD_IDE=y
CONFIG_CMD_I2C=y
-CONFIG_CMD_PART=y
CONFIG_CMD_PCI=y
CONFIG_CMD_REMOTEPROC=y
CONFIG_CMD_SF=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_TFTPSRV=y
CONFIG_CMD_RARP=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CDP=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_DNS=y
CONFIG_CMD_TPM_TEST=y
CONFIG_CMD_CBFS=y
CONFIG_CMD_CRAMFS=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_MAC_PARTITION=y
-CONFIG_ISO_PARTITION=y
CONFIG_AMIGA_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_OF_HOSTFILE=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
CONFIG_CMD_PING=y
# CONFIG_CMD_HASH is not set
# CONFIG_CMD_IRQ is not set
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
CONFIG_CMD_PING=y
# CONFIG_CMD_HASH is not set
# CONFIG_CMD_IRQ is not set
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
CONFIG_CMD_PING=y
# CONFIG_CMD_HASH is not set
# CONFIG_CMD_IRQ is not set
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
CONFIG_CMD_PING=y
# CONFIG_CMD_HASH is not set
# CONFIG_CMD_IRQ is not set
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
CONFIG_CMD_PING=y
# CONFIG_CMD_HASH is not set
# CONFIG_CMD_IRQ is not set
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
CONFIG_BOOTDELAY=10
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_PCI=y
CONFIG_SECOMX6Q=y
CONFIG_SECOMX6_2GB=y
CONFIG_BOOTDELAY=3
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="SECO MX6Q uQ7 U-Boot > "
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttySC2,115200 root=/dev/nfs ip=dhcp"
CONFIG_VERSION_VARIABLE=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_BOOTD is not set
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttySC2,115200 root=1f01"
CONFIG_VERSION_VARIABLE=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_BOOTD is not set
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttySC1,115200 root=/dev/nfs ip=dhcp"
CONFIG_VERSION_VARIABLE=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_BOOTD is not set
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttySC1,115200 root=/dev/nfs ip=dhcp"
CONFIG_VERSION_VARIABLE=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_BOOTD is not set
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttySC0,115200"
CONFIG_VERSION_VARIABLE=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
# CONFIG_AUTOBOOT is not set
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6QDL"
CONFIG_BOOTDELAY=1
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SILENT_CONSOLE=y
CONFIG_SILENT_U_BOOT_ONLY=y
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
CONFIG_SPL_EXT_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_DM=y
CONFIG_PHYLIB=y
CONFIG_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_ENV_IS_IN_NAND=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_DFU_NAND=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/mtdblock5 ubi.mtd=4 rootfstype=cramfs console=ttySAC0,115200n8 mem=128M mtdparts=s3c-onenand:256k(bootloader),128k@0x40000(params),3m@0x60000(kernel),16m@0x360000(test),-(UBI)"
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="SMDKC100 # "
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_ONENAND=y
CONFIG_ARCH_EXYNOS4=y
CONFIG_IDENT_STRING=" for SMDKC210/V310"
CONFIG_DEFAULT_DEVICE_TREE="exynos4210-smdkv310"
+CONFIG_DISTRO_DEFAULTS=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SPL=y
# CONFIG_SPL_FRAMEWORK is not set
-CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="SMDKV310 # "
-CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_XIMG is not set
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
-CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
# CONFIG_CMD_MISC is not set
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_ISO_PARTITION=y
CONFIG_MMC_DW=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_ENV_IS_IN_NAND=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_CMD_PCA953X=y
# CONFIG_MMC is not set
CONFIG_USB=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_ENV_IS_IN_NAND=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_CMD_PCA953X=y
# CONFIG_MMC is not set
CONFIG_USB=y
CONFIG_SYS_TEXT_BASE=0x80100000
CONFIG_TARGET_SNIPER=y
# CONFIG_SPL_NAND_SUPPORT is not set
+CONFIG_DISTRO_DEFAULTS=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SPL=y
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=2
# CONFIG_SPL_EXT_SUPPORT is not set
-CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="sniper # "
CONFIG_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x82000000
CONFIG_FASTBOOT_BUF_SIZE=0x2000000
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
-CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_ISO_PARTITION=y
-CONFIG_EFI_PARTITION=y
CONFIG_SYS_OMAP24_I2C_SPEED=400000
CONFIG_MMC_OMAP_HS=y
CONFIG_SYS_NS16550=y
CONFIG_TARGET_SOCFPGA_ARRIA10_SOCDK=y
CONFIG_IDENT_STRING="socfpga_arria10"
CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_socdk_sdmmc"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200"
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_DEFAULT_FDT_FILE="socfpga_arria10_socdk_sdmmc.dtb"
CONFIG_SPL=y
CONFIG_SPL_FPGA_SUPPORT=y
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PXE=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0"
-CONFIG_DOS_PARTITION=y
# CONFIG_SPL_DOS_PARTITION is not set
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SPL_DM=y
CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK=y
CONFIG_SPL_STACK_R_ADDR=0x00800000
CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_socdk"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
CONFIG_SPL=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_STACK_R=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_DFU=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PXE=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=ff705000.spi.0:1m(u-boot),256k(env1),256k(env2),14848k(boot),16m(rootfs),-@1536k(UBI)0"
CONFIG_CMD_UBI=y
CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK=y
CONFIG_SPL_STACK_R_ADDR=0x00800000
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socdk"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
CONFIG_SPL=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_STACK_R=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_DFU=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PXE=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=ff705000.spi.0:1m(u-boot),256k(env1),256k(env2),14848k(boot),16m(rootfs),-@1536k(UBI)0"
CONFIG_CMD_UBI=y
CONFIG_TARGET_SOCFPGA_TERASIC_DE0_NANO=y
CONFIG_SPL_STACK_R_ADDR=0x00800000
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de0_nano_soc"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_STACK_R=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_DFU=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PXE=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=ff705000.spi.0:1m(u-boot),256k(env1),256k(env2),14848k(boot),16m(rootfs),-@1536k(UBI)0"
CONFIG_CMD_UBI=y
-CONFIG_EFI_PARTITION=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SPL_DM=y
CONFIG_DFU_MMC=y
CONFIG_TARGET_SOCFPGA_TERASIC_DE10_NANO=y
CONFIG_SPL_STACK_R_ADDR=0x00800000
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de10_nano"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
CONFIG_SPL=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_STACK_R=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_DFU=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PXE=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SPL_DM=y
CONFIG_TARGET_SOCFPGA_TERASIC_DE1_SOC=y
CONFIG_SPL_STACK_R_ADDR=0x00800000
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de1_soc"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_YMODEM_SUPPORT=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PXE=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SPL_DM=y
CONFIG_TARGET_SOCFPGA_IS1=y
CONFIG_SPL_STACK_R_ADDR=0x00800000
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_is1"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200"
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
CONFIG_SPL_STACK_R=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
-CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PXE=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=ff705000.spi.0:1m(u-boot),256k(env1),256k(env2),14848k(boot),16m(rootfs),-@1536k(UBI)0"
CONFIG_CMD_UBI=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0xfffffff8
CONFIG_FPGA_SOCFPGA=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
CONFIG_TARGET_SOCFPGA_ARIES_MCVEVK=y
CONFIG_SPL_STACK_R_ADDR=0x00800000
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_mcvevk"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200"
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
CONFIG_SPL=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_STACK_R=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_DFU=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PXE=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=ff705000.spi.0:1m(u-boot),256k(env1),256k(env2),14848k(boot),16m(rootfs),-@1536k(UBI)0"
CONFIG_CMD_UBI=y
CONFIG_TARGET_SOCFPGA_TERASIC_SOCKIT=y
CONFIG_SPL_STACK_R_ADDR=0x00800000
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sockit"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
CONFIG_SPL=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_STACK_R=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_DFU=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PXE=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=ff705000.spi.0:1m(u-boot),256k(env1),256k(env2),14848k(boot),16m(rootfs),-@1536k(UBI)0"
CONFIG_CMD_UBI=y
CONFIG_TARGET_SOCFPGA_EBV_SOCRATES=y
CONFIG_SPL_STACK_R_ADDR=0x00800000
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socrates"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
CONFIG_SPL=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_STACK_R=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_DFU=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PXE=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=ff705000.spi.0:1m(u-boot),256k(env1),256k(env2),14848k(boot),16m(rootfs),-@1536k(UBI)0"
CONFIG_CMD_UBI=y
CONFIG_TARGET_SOCFPGA_SR1500=y
CONFIG_SPL_STACK_R_ADDR=0x00800000
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
CONFIG_SPL=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_STACK_R=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PXE=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=ff705000.spi.0:1m(u-boot),256k(env1),256k(env2),14848k(boot),16m(rootfs),-@1536k(UBI)0"
CONFIG_CMD_UBI=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0xfffffff8
CONFIG_FPGA_SOCFPGA=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
CONFIG_TARGET_SOCFPGA_SAMTEC_VINING_FPGA=y
CONFIG_SPL_STACK_R_ADDR=0x00800000
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_vining_fpga"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_BOOTDELAY=5
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200"
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
CONFIG_SPL=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_STACK_R=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PXE=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=ff705000.spi.0:1m(u-boot),64k(env1),64k(env2),256k(samtec1),256k(samtec2),-(rcvrfs);"
CONFIG_CMD_UBI=y
CONFIG_CMD_EXT2=y
# CONFIG_CMD_IRQ is not set
CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CPU=y
CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock7 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock7 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock7 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock7 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock7 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock7 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock7 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock7 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
CONFIG_STM32F4=y
CONFIG_TARGET_STM32F429_DISCOVERY=y
CONFIG_DEFAULT_DEVICE_TREE="stm32f429-disco"
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
CONFIG_STM32F4=y
CONFIG_TARGET_STM32F429_EVALUATION=y
CONFIG_DEFAULT_DEVICE_TREE="stm32429i-eval"
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_BOOTDELAY=3
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_STM32F4=y
CONFIG_TARGET_STM32F469_DISCOVERY=y
CONFIG_DEFAULT_DEVICE_TREE="stm32f469-disco"
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_BOOTDELAY=3
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_STM32F7=y
CONFIG_TARGET_STM32F746_DISCO=y
CONFIG_DEFAULT_DEVICE_TREE="stm32f746-disco"
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
CONFIG_STM32H7=y
CONFIG_TARGET_STM32H743_DISCO=y
CONFIG_DEFAULT_DEVICE_TREE="stm32h743i-disco"
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_BOOTDELAY=3
CONFIG_DEFAULT_FDT_FILE="stm32h743i-disco"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_STM32H7=y
CONFIG_TARGET_STM32H743_EVAL=y
CONFIG_DEFAULT_DEVICE_TREE="stm32h743i-eval"
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_BOOTDELAY=3
CONFIG_DEFAULT_FDT_FILE="stm32h743i-eval"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_SERIAL_BOOT,SYS_INPUT_CLKSRC=30000000"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
+# CONFIG_CMDLINE_EDITING is not set
CONFIG_SYS_PROMPT="stmark2 $ "
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="STV0991> "
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
CONFIG_MTDPARTS_DEFAULT="mtdparts=boot:768k(u-boot),128k(env),128k(envred),-(ubi0);"
CONFIG_CMD_UBI=y
# CONFIG_CMD_UBIFS is not set
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0xE0113FF8
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
# CONFIG_PCI is not set
CONFIG_BOOTDELAY=3
CONFIG_PRE_CONSOLE_BUFFER=y
CONFIG_PRE_CON_BUF_ADDR=0x7c000000
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Matrix U-Boot> "
CONFIG_ISO_PARTITION=y
CONFIG_AMIGA_PARTITION=y
CONFIG_EFI_PARTITION=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CPU=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CPU=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CPU=y
CONFIG_SPL_OF_TRANSLATE=y
CONFIG_SATA_MV=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_BOOTCOUNT_RAM=y
CONFIG_FPGA_ALTERA=y
CONFIG_DM_GPIO=y
# CONFIG_MMC is not set
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="am335x-draco"
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_BOOTDELAY=3
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_ENV_IS_IN_NAND=y
+CONFIG_BOOTP_DNS=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_SUBNETMASK=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_BOOTCOUNT_ENV=y
CONFIG_DFU_NAND=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="ThunderX_88XX> "
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_BOOTDELAY=1
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_HUSH_PARSER=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="U-Boot# "
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_BOOTP_DNS=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_SUBNETMASK=y
CONFIG_MMC_OMAP_HS=y
CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_TARGET_TITANIUM=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/barco/titanium/imximage.cfg"
CONFIG_BOOTDELAY=3
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Titanium > "
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=3
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_DEFAULT_FDT_FILE="imx6dl-mba6x.dtb"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=3
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_DEFAULT_FDT_FILE="imx6dl-mba6x.dtb"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=3
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_DEFAULT_FDT_FILE="imx6q-mba6x.dtb"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=3
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_DEFAULT_FDT_FILE="imx6q-mba6x.dtb"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=3
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_DEFAULT_FDT_FILE="imx6dl-mba6x.dtb"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=3
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_DEFAULT_FDT_FILE="imx6dl-mba6x.dtb"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=3
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_DEFAULT_FDT_FILE="imx6s-wru4.dtb"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0x00900000
CONFIG_LED_STATUS=y
CONFIG_LED_STATUS0=y
CONFIG_LED_STATUS_BIT=0
CONFIG_ARCH_EXYNOS4=y
CONFIG_TARGET_TRATS2=y
CONFIG_DEFAULT_DEVICE_TREE="exynos4412-trats2"
+CONFIG_DISTRO_DEFAULTS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="Please use defined boot"
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
-CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Trats2 # "
-CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_XIMG is not set
CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_DFU=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_NET is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
# CONFIG_CMD_MISC is not set
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_ISO_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_DFU_MMC=y
CONFIG_DM_I2C_GPIO=y
CONFIG_ARCH_EXYNOS4=y
CONFIG_TARGET_TRATS=y
CONFIG_DEFAULT_DEVICE_TREE="exynos4210-trats"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="Please use defined boot"
+# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
-CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Trats # "
-CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_XIMG is not set
CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_DFU=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_NET is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
# CONFIG_CMD_MISC is not set
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_ISO_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_DFU_MMC=y
CONFIG_DM_I2C_GPIO=y
CONFIG_MTDPARTS_DEFAULT="mtdparts=boot:768k(u-boot),128k(env),128k(envred),-(ubi0);"
CONFIG_CMD_UBI=y
# CONFIG_CMD_UBIFS is not set
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0xE0113FF8
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
# CONFIG_PCI is not set
CONFIG_MTDPARTS_DEFAULT="mtdparts=boot:768k(u-boot),128k(env),128k(envred),-(ubi0);"
CONFIG_CMD_UBI=y
# CONFIG_CMD_UBIFS is not set
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0xE0113FF8
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
# CONFIG_PCI is not set
CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:512k(MLO),1m(u-boot),256k(env1),256k(env2),6m(kernel),-(rootfs)"
CONFIG_CMD_UBI=y
CONFIG_ENV_IS_IN_NAND=y
+CONFIG_BOOTP_DNS=y
CONFIG_SYS_OMAP24_I2C_SPEED=400000
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_SPL_EXT_SUPPORT=y
CONFIG_SPL=y
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_CONFIG=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_SPL=y
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_CONFIG=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_LOGLEVEL=6
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_CONFIG=y
CONFIG_CMD_IMLS=y
# CONFIG_CMD_XIMG is not set
CONFIG_MTDPARTS_DEFAULT="mtdparts=atmel_nand:16m(kernel)ro,120m(root1),-(root2)"
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_VCT_PLATINUM=y
CONFIG_BOOTDELAY=5
CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="$ "
CONFIG_CMD_IMLS=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_FAT=y
CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
+CONFIG_BOOTP_SUBNETMASK=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_NETDEVICES=y
CONFIG_SMC911X=y
CONFIG_VCT_ONENAND=y
CONFIG_BOOTDELAY=5
CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="$ "
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_UBI=y
# CONFIG_CMD_UBIFS is not set
CONFIG_ENV_IS_IN_ONENAND=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
+CONFIG_BOOTP_SUBNETMASK=y
CONFIG_NETDEVICES=y
CONFIG_SMC911X=y
CONFIG_SMC911X_BASE=0x00000000
CONFIG_VCT_SMALL_IMAGE=y
CONFIG_BOOTDELAY=5
CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_AUTO_COMPLETE is not set
+# CONFIG_SYS_LONGHELP is not set
CONFIG_SYS_PROMPT="$ "
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
CONFIG_VCT_SMALL_IMAGE=y
CONFIG_BOOTDELAY=5
CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_AUTO_COMPLETE is not set
+# CONFIG_SYS_LONGHELP is not set
CONFIG_SYS_PROMPT="$ "
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
CONFIG_VCT_PLATINUMAVC=y
CONFIG_BOOTDELAY=5
CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="VCT# "
CONFIG_CMD_IMLS=y
CONFIG_CMD_EEPROM=y
CONFIG_VCT_ONENAND=y
CONFIG_BOOTDELAY=5
CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="$ "
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
CONFIG_VCT_SMALL_IMAGE=y
CONFIG_BOOTDELAY=5
CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_AUTO_COMPLETE is not set
+# CONFIG_SYS_LONGHELP is not set
CONFIG_SYS_PROMPT="$ "
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
CONFIG_VCT_SMALL_IMAGE=y
CONFIG_BOOTDELAY=5
CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_AUTO_COMPLETE is not set
+# CONFIG_SYS_LONGHELP is not set
CONFIG_SYS_PROMPT="$ "
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
CONFIG_VCT_PREMIUM=y
CONFIG_BOOTDELAY=5
CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="$ "
CONFIG_CMD_IMLS=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_FAT=y
CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
+CONFIG_BOOTP_SUBNETMASK=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_NETDEVICES=y
CONFIG_SMC911X=y
CONFIG_VCT_ONENAND=y
CONFIG_BOOTDELAY=5
CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="$ "
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_UBI=y
# CONFIG_CMD_UBIFS is not set
CONFIG_ENV_IS_IN_ONENAND=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
+CONFIG_BOOTP_SUBNETMASK=y
CONFIG_NETDEVICES=y
CONFIG_SMC911X=y
CONFIG_SMC911X_BASE=0x00000000
CONFIG_VCT_SMALL_IMAGE=y
CONFIG_BOOTDELAY=5
CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_AUTO_COMPLETE is not set
+# CONFIG_SYS_LONGHELP is not set
CONFIG_SYS_PROMPT="$ "
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
CONFIG_VCT_SMALL_IMAGE=y
CONFIG_BOOTDELAY=5
CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_AUTO_COMPLETE is not set
+# CONFIG_SYS_LONGHELP is not set
CONFIG_SYS_PROMPT="$ "
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
CONFIG_LOGLEVEL=3
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_FUSE=y
CONFIG_LOGLEVEL=3
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_FUSE=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x20f00000
CONFIG_TARGET_VINCO=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_SPI_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_SPI_FLASH=y
CONFIG_NETDEVICES=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/samtec/vining_2000/imximage.cfg"
CONFIG_BOOTDELAY=0
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_DATE=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
# CONFIG_CMD_BMODE is not set
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/warp/imximage.cfg"
CONFIG_BOOTDELAY=3
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_ENV_IS_IN_NAND=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_LZMA=y
CONFIG_OF_LIBFDT=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_ENV_IS_IN_NAND=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
CONFIG_PHYLIB=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_EFI_PARTITION=y
# CONFIG_PARTITION_UUIDS is not set
CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_BOOTP_DNS=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_SUBNETMASK=y
CONFIG_MXC_GPIO=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_NAND=y
# CONFIG_PARTITION_UUIDS is not set
# CONFIG_SPL_PARTITION_UUIDS is not set
CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_BOOTP_DNS=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_SUBNETMASK=y
CONFIG_MXC_GPIO=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_NAND=y
CONFIG_CMD_UBI=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0xD2801FF8
CONFIG_FPGA_XILINX=y
CONFIG_SYS_I2C_DW=y
# CONFIG_MMC is not set
CONFIG_ARCH_ZYNQMP=y
CONFIG_SYS_TEXT_BASE=0x10000
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-emmc"
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_FIT=y
CONFIG_BOOTDELAY=-1
+CONFIG_SUPPORT_RAW_INITRD=y
# CONFIG_DISPLAY_CPUINFO is not set
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="ZynqMP> "
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
CONFIG_ARCH_ZYNQMP=y
CONFIG_SYS_TEXT_BASE=0x10000
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-nand"
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_FIT=y
CONFIG_BOOTDELAY=-1
+CONFIG_SUPPORT_RAW_INITRD=y
# CONFIG_DISPLAY_CPUINFO is not set
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
+# CONFIG_SYS_LONGHELP is not set
CONFIG_SYS_PROMPT="ZynqMP> "
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_HASH is not set
CONFIG_CMD_JFFS2=y
# CONFIG_CMD_IRQ is not set
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
CONFIG_CMD_PCA953X=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/ccv/xpress/imximage.cfg"
CONFIG_BOOTDELAY=3
CONFIG_SYS_CONSOLE_INFO_QUIET=y
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
CONFIG_SYS_CONSOLE_INFO_QUIET=y
+CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_SPL_EXT_SUPPORT=y
# CONFIG_CONSOLE_MUX is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="$ "
CONFIG_CMD_MMC=y
CONFIG_CMD_SPI=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="zmx25> "
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="boot in %d s\n"
CONFIG_CMD_CACHE=y
CONFIG_CMD_FAT=y
CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_USB=y
# CONFIG_ZYNQ_DDRC_INIT is not set
CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-qspi-single"
CONFIG_DEBUG_UART=y
+CONFIG_DISTRO_DEFAULTS=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_BOOTDELAY=-1
+# CONFIG_USE_BOOTCOMMAND is not set
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL=y
CONFIG_SPL_STACK_R=y
# CONFIG_CMD_BOOTD is not set
# CONFIG_CMD_BOOTM is not set
# CONFIG_CMD_ELF is not set
-# CONFIG_CMD_FDT is not set
# CONFIG_CMD_GO is not set
# CONFIG_CMD_RUN is not set
# CONFIG_CMD_IMI is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4_WRITE=y
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_ISO_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
# CONFIG_SPL_FAT_SUPPORT is not set
CONFIG_DEFAULT_DEVICE_TREE="zynq-zc770-xm011"
CONFIG_DEBUG_UART=y
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
-CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run $modeboot || run distro_bootcmd"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_OS_BOOT=y
-CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Zynq> "
-CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_FPGA_LOADBP=y
CONFIG_CMD_FPGA_LOADFS=y
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_CACHE=y
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_ISO_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_BLK=y
CONFIG_FPGA_XILINX=y
# CONFIG_SPL_FAT_SUPPORT is not set
CONFIG_DEFAULT_DEVICE_TREE="zynq-zc770-xm011-x16"
CONFIG_DEBUG_UART=y
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
+# CONFIG_USE_BOOTCOMMAND is not set
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_OS_BOOT=y
-CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Zynq> "
-CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_FPGA_LOADBP=y
CONFIG_CMD_FPGA_LOADFS=y
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_CACHE=y
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_ISO_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_OF_EMBED=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_FPGA_XILINX=y
CONFIG_SPL_STACK_R_ADDR=0x200000
# CONFIG_SPL_FAT_SUPPORT is not set
CONFIG_DEFAULT_DEVICE_TREE="zynq-zc770-xm012"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
-CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run $modeboot || run distro_bootcmd"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_OS_BOOT=y
-CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Zynq> "
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_FPGA_LOADBP=y
CONFIG_CMD_FPGA_LOADFS=y
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_ISO_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_STACK_R_ADDR=0x200000
# CONFIG_SPL_FAT_SUPPORT is not set
CONFIG_DEFAULT_DEVICE_TREE="zynq-zc770-xm013"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
-CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run $modeboot || run distro_bootcmd"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_OS_BOOT=y
-CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Zynq> "
-CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_FPGA_LOADBP=y
CONFIG_CMD_FPGA_LOADFS=y
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_ISO_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_BLK=y
------------------------------------------------------------
#ifndef CONFIG_SPL_BUILD
-#include <config_distro_defaults.h>
#include <config_distro_bootcmd.h>
#endif
------------------------------------------------------------
specific boot.scr scripts are enabled. This enables distros to generate a
U-Boot-specific boot.scr script rather than extlinux.conf as the boot
configuration file. While doing so is fully supported, and
-<config_distro_defaults.h> exposes enough parameterization to boot.scr to
+CONFIG_DISTRO_DEFAULTS exposes enough parameterization to boot.scr to
allow for board-agnostic boot.scr content, this document recommends that
distros generate extlinux.conf rather than boot.scr. extlinux.conf is intended
to work across multiple bootloaders, whereas boot.scr will only work with
# Boot count configuration
#
-menu "Boot count support"
-
-config BOOTCOUNT
- bool "Enable Boot count support"
- help
- Enable boot count support, which provides the ability to store the
- number of times the board has booted on a number of different
- persistent storage mediums.
-
-config BOOTCOUNT_LIMIT
+menuconfig BOOTCOUNT_LIMIT
bool "Enable support for checking boot count limit"
help
Enable checking for exceeding the boot count limit.
More information: http://www.denx.de/wiki/DULG/UBootBootCountLimit
-config SYS_BOOTCOUNT_SINGLEWORD
- bool "Use single word to pack boot count and magic value"
+if BOOTCOUNT_LIMIT
+
+choice
+ prompt "Boot count device"
+ default BOOTCOUNT_AM33XX if AM33XX || SOC_DA8XX
+ default BOOTCOUNT_AT91 if AT91SAM9XE
+ default BOOTCOUNT_GENERIC
+
+config BOOTCOUNT_GENERIC
+ bool "Generic default boot counter"
help
- This option enables packing boot count magic value and boot count
- into single word (32 bits).
+ Generic bootcount stored at SYS_BOOTCOUNT_ADDR.
-if BOOTCOUNT
+ SYS_BOOTCOUNT_ADDR:
+ Set to the address where the bootcount and bootcount magic
+ will be stored.
config BOOTCOUNT_EXT
bool "Boot counter on EXT filesystem"
Add support for maintaining boot count in a file on an EXT
filesystem.
-if BOOTCOUNT_EXT
+config BOOTCOUNT_AM33XX
+ bool "Boot counter in AM33XX RTC IP block"
+ depends on AM33XX || SOC_DA8XX
+ help
+ A bootcount driver for the RTC IP block found on many TI platforms.
+ This requires the RTC clocks, etc, to be enabled prior to use and
+ not all boards with this IP block on it will have the RTC in use.
+
+config BOOTCOUNT_ENV
+ bool "Boot counter in environment"
+ help
+ If no softreset save registers are found on the hardware
+ "bootcount" is stored in the environment. To prevent a
+ saveenv on all reboots, the environment variable
+ "upgrade_available" is used. If "upgrade_available" is
+ 0, "bootcount" is always 0, if "upgrade_available" is
+ 1 "bootcount" is incremented in the environment.
+ So the Userspace Application must set the "upgrade_available"
+ and "bootcount" variable to 0, if a boot was successfully.
+
+config BOOTCOUNT_RAM
+ bool "Boot counter in RAM"
+ help
+ Store the bootcount in DRAM protected against against bit errors
+ due to short power loss or holding a system in RESET.
+
+config BOOTCOUNT_I2C
+ bool "Boot counter on I2C device"
+ help
+ Enable support for the bootcounter on an i2c (like RTC) device.
+ CONFIG_SYS_I2C_RTC_ADDR = i2c chip address
+ CONFIG_SYS_BOOTCOUNT_ADDR = i2c addr which is used for
+ the bootcounter.
+
+config BOOTCOUNT_AT91
+ bool "Boot counter for Atmel AT91SAM9XE"
+ depends on AT91SAM9XE
+
+endchoice
+
+config BOOTCOUNT_ALEN
+ int "I2C address length"
+ default 1
+ depends on BOOTCOUNT_I2C
+ help
+ Length of the the I2C address at SYS_BOOTCOUNT_ADDR for storing
+ the boot counter.
+
+config SYS_BOOTCOUNT_SINGLEWORD
+ bool "Use single word to pack boot count and magic value"
+ depends on BOOTCOUNT_GENERIC
+ help
+ This option enables packing boot count magic value and boot count
+ into single word (32 bits).
config SYS_BOOTCOUNT_EXT_INTERFACE
string "Interface on which to find boot counter EXT filesystem"
config SYS_BOOTCOUNT_ADDR
hex "RAM address used for reading and writing the boot counter"
- default 0x7000A000
- depends on BOOTCOUNT_EXT
+ default 0x44E3E000 if BOOTCOUNT_AM33XX
+ default 0xE0115FF8 if ARCH_LS1043A || ARCH_LS1021A
+ depends on BOOTCOUNT_AM33XX || BOOTCOUNT_GENERIC || BOOTCOUNT_EXT || \
+ BOOTCOUNT_I2C
help
Set the address used for reading and writing the boot counter.
endif
-
-endif
-
-endmenu
# SPDX-License-Identifier: GPL-2.0+
#
-obj-y += bootcount.o
-obj-$(CONFIG_AT91SAM9XE) += bootcount_at91.o
-obj-$(CONFIG_SOC_DA8XX) += bootcount_davinci.o
+obj-$(CONFIG_BOOTCOUNT_GENERIC) += bootcount.o
+obj-$(CONFIG_BOOTCOUNT_AT91) += bootcount_at91.o
obj-$(CONFIG_BOOTCOUNT_AM33XX) += bootcount_davinci.o
obj-$(CONFIG_BOOTCOUNT_RAM) += bootcount_ram.o
obj-$(CONFIG_BOOTCOUNT_ENV) += bootcount_env.o
#include <bootcount.h>
#include <linux/compiler.h>
-/*
- * Only override CONFIG_SYS_BOOTCOUNT_ADDR if not already defined. This
- * way, some boards can define it directly in their config header.
- */
-#if !defined(CONFIG_SYS_BOOTCOUNT_ADDR)
-
-#if defined(CONFIG_QE)
-#include <linux/immap_qe.h>
-#define CONFIG_SYS_BOOTCOUNT_ADDR (CONFIG_SYS_IMMR + 0x110000 + \
- QE_MURAM_SIZE - 2 * sizeof(u32))
-#endif /* defined(CONFIG_QE) */
-
-#endif /* !defined(CONFIG_SYS_BOOTCOUNT_ADDR) */
-
/* Now implement the generic default functions */
-#if defined(CONFIG_SYS_BOOTCOUNT_ADDR)
__weak void bootcount_store(ulong a)
{
void *reg = (void *)CONFIG_SYS_BOOTCOUNT_ADDR;
return raw_bootcount_load(reg);
#endif /* defined(CONFIG_SYS_BOOTCOUNT_SINGLEWORD) */
}
-#endif /* defined(CONFIG_SYS_BOOTCOUNT_ADDR) */
fdt_next_subnode(gd->fdt_blob, ofnode_to_offset(node)));
}
+ofnode ofnode_get_parent(ofnode node)
+{
+ ofnode parent;
+
+ assert(ofnode_valid(node));
+ if (ofnode_is_np(node))
+ parent = np_to_ofnode(of_get_parent(ofnode_to_np(node)));
+ else
+ parent.of_offset = fdt_parent_offset(gd->fdt_blob,
+ ofnode_to_offset(node));
+
+ return parent;
+}
+
const char *ofnode_get_name(ofnode node)
{
assert(ofnode_valid(node));
return fdt_get_name(gd->fdt_blob, ofnode_to_offset(node), NULL);
}
+ofnode ofnode_get_by_phandle(uint phandle)
+{
+ ofnode node;
+
+ if (of_live_active())
+ node = np_to_ofnode(of_find_node_by_phandle(phandle));
+ else
+ node.of_offset = fdt_node_offset_by_phandle(gd->fdt_blob,
+ phandle);
+
+ return node;
+}
+
int ofnode_read_size(ofnode node, const char *propname)
{
int len;
{
const struct dm_demo_pdata *pdata = dev_get_platdata(dev);
- printf("Hello from %08x: %s %d\n", map_to_sysmem(dev), pdata->colour,
+ printf("Hello from %08x: %s %d\n", (uint)map_to_sysmem(dev), pdata->colour,
pdata->sides);
return 0;
menu "DFU support"
-config USB_FUNCTION_DFU
+config DFU
+ bool
+ imply DFU_OVER_USB if USB_GADGET
+
+config DFU_OVER_USB
bool
select HASH
+ depends on USB_GADGET
+
+config DFU_OVER_TFTP
+ bool
+ depends on NET
-if CMD_DFU
+if DFU
config DFU_TFTP
bool "DFU via TFTP"
+ select DFU_OVER_TFTP
help
This option allows performing update of DFU-managed medium with data
sent via TFTP boot.
# SPDX-License-Identifier: GPL-2.0+
#
-obj-$(CONFIG_USB_FUNCTION_DFU) += dfu.o
+obj-$(CONFIG_DFU) += dfu.o
obj-$(CONFIG_DFU_MMC) += dfu_mmc.o
obj-$(CONFIG_DFU_NAND) += dfu_nand.o
obj-$(CONFIG_DFU_RAM) += dfu_ram.o
}
strsep(&s, "@");
- debug("%s: image name: %s strlen: %d\n", __func__, sb, strlen(sb));
+ debug("%s: image name: %s strlen: %zd\n", __func__, sb, strlen(sb));
alt_setting_num = dfu_get_alt(sb);
free(sb);
goto done;
}
- ret = dfu_write_from_mem_addr(dfu, (void *)addr, len);
+ ret = dfu_write_from_mem_addr(dfu, (void *)(uintptr_t)addr, len);
done:
dfu_free_entities();
{
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
- uc_priv->gpio_count = dev_read_u32_default(dev, "num-gpios", 0);
+ uc_priv->gpio_count = dev_read_u32_default(dev, "sandbox,gpio-count",
+ 0);
uc_priv->bank_name = dev_read_string(dev, "gpio-bank-name");
return 0;
static void __twsi_i2c_init(struct mvtwsi_registers *twsi, int speed,
int slaveadd, uint *actual_speed)
{
+ uint tmp_speed;
+
/* Reset controller */
twsi_reset(twsi);
/* Set speed */
+ tmp_speed = __twsi_i2c_set_bus_speed(twsi, speed);
if (actual_speed)
- *actual_speed = __twsi_i2c_set_bus_speed(twsi, speed);
+ *actual_speed = tmp_speed;
/* Set slave address; even though we don't use it */
writel(slaveadd, &twsi->slave_address);
writel(0, &twsi->xtnd_slave_addr);
mmc->selected_mode = mode;
mmc->tran_speed = mmc_mode2freq(mmc, mode);
mmc->ddr_mode = mmc_is_mode_ddr(mode);
- debug("selecting mode %s (freq : %d MHz)\n", mmc_mode_name(mode),
- mmc->tran_speed / 1000000);
+ pr_debug("selecting mode %s (freq : %d MHz)\n", mmc_mode_name(mode),
+ mmc->tran_speed / 1000000);
return 0;
}
}
if (mmc_set_blocklen(mmc, mmc->read_bl_len)) {
- debug("%s: Failed to set blocklen\n", __func__);
+ pr_debug("%s: Failed to set blocklen\n", __func__);
return 0;
}
cur = (blocks_todo > mmc->cfg->b_max) ?
mmc->cfg->b_max : blocks_todo;
if (mmc_read_blocks(mmc, dst, start, cur) != cur) {
- debug("%s: Failed to read blocks\n", __func__);
+ pr_debug("%s: Failed to read blocks\n", __func__);
return 0;
}
blocks_todo -= cur;
forbidden = MMC_CAP(MMC_HS_200);
if (MMC_CAP(mmc->selected_mode) & forbidden) {
- debug("selected mode (%s) is forbidden for part %d\n",
- mmc_mode_name(mmc->selected_mode), part_num);
+ pr_debug("selected mode (%s) is forbidden for part %d\n",
+ mmc_mode_name(mmc->selected_mode), part_num);
change = true;
} else if (mmc->selected_mode != mmc->best_mode) {
- debug("selected mode is not optimal\n");
+ pr_debug("selected mode is not optimal\n");
change = true;
}
if (err)
return err;
- if ((__be32_to_cpu(switch_status[4]) >> 24) != speed)
+ if (((__be32_to_cpu(switch_status[4]) >> 24) & 0xF) != speed)
return -ENOTSUPP;
return 0;
mmc->ssr.erase_offset = eo * 1000;
}
} else {
- debug("Invalid Allocation Unit Size.\n");
+ pr_debug("Invalid Allocation Unit Size.\n");
}
return 0;
{
enum bus_mode mode;
- printf("%s: widths [", text);
+ pr_debug("%s: widths [", text);
if (caps & MMC_MODE_8BIT)
- printf("8, ");
+ pr_debug("8, ");
if (caps & MMC_MODE_4BIT)
- printf("4, ");
+ pr_debug("4, ");
if (caps & MMC_MODE_1BIT)
- printf("1, ");
- printf("\b\b] modes [");
+ pr_debug("1, ");
+ pr_debug("\b\b] modes [");
for (mode = MMC_LEGACY; mode < MMC_MODES_END; mode++)
if (MMC_CAP(mode) & caps)
- printf("%s, ", mmc_mode_name(mode));
- printf("\b\b]\n");
+ pr_debug("%s, ", mmc_mode_name(mode));
+ pr_debug("\b\b]\n");
}
#endif
mmc->signal_voltage = signal_voltage;
err = mmc_set_ios(mmc);
if (err)
- debug("unable to set voltage (err %d)\n", err);
+ pr_debug("unable to set voltage (err %d)\n", err);
return err;
}
for (w = widths; w < widths + ARRAY_SIZE(widths); w++) {
if (*w & caps & mwt->widths) {
- debug("trying mode %s width %d (at %d MHz)\n",
- mmc_mode_name(mwt->mode),
- bus_width(*w),
- mmc_mode2freq(mmc, mwt->mode) / 1000000);
+ pr_debug("trying mode %s width %d (at %d MHz)\n",
+ mmc_mode_name(mwt->mode),
+ bus_width(*w),
+ mmc_mode2freq(mmc, mwt->mode) / 1000000);
/* configure the bus width (card + host) */
err = sd_select_bus_width(mmc, bus_width(*w));
err = mmc_execute_tuning(mmc,
mwt->tuning);
if (err) {
- debug("tuning failed\n");
+ pr_debug("tuning failed\n");
goto error;
}
}
}
}
- printf("unable to select a mode\n");
+ pr_err("unable to select a mode\n");
return -ENOTSUPP;
}
return 0;
if (!mmc->ext_csd) {
- debug("No ext_csd found!\n"); /* this should enver happen */
+ pr_debug("No ext_csd found!\n"); /* this should enver happen */
return -ENOTSUPP;
}
for_each_supported_width(card_caps & mwt->widths,
mmc_is_mode_ddr(mwt->mode), ecbw) {
enum mmc_voltage old_voltage;
- debug("trying mode %s width %d (at %d MHz)\n",
- mmc_mode_name(mwt->mode),
- bus_width(ecbw->cap),
- mmc_mode2freq(mmc, mwt->mode) / 1000000);
+ pr_debug("trying mode %s width %d (at %d MHz)\n",
+ mmc_mode_name(mwt->mode),
+ bus_width(ecbw->cap),
+ mmc_mode2freq(mmc, mwt->mode) / 1000000);
old_voltage = mmc->signal_voltage;
err = mmc_set_lowest_voltage(mmc, mwt->mode,
MMC_ALL_SIGNAL_VOLTAGE);
if (mwt->tuning) {
err = mmc_execute_tuning(mmc, mwt->tuning);
if (err) {
- debug("tuning failed\n");
+ pr_debug("tuning failed\n");
goto error;
}
}
MMC_VERSION_4_1,
MMC_VERSION_4_2,
MMC_VERSION_4_3,
+ MMC_VERSION_4_4,
MMC_VERSION_4_41,
MMC_VERSION_4_5,
MMC_VERSION_5_0,
ret = device_get_supply_regulator(mmc->dev, "vmmc-supply",
&mmc->vmmc_supply);
if (ret)
- debug("%s: No vmmc supply\n", mmc->dev->name);
+ pr_debug("%s: No vmmc supply\n", mmc->dev->name);
ret = device_get_supply_regulator(mmc->dev, "vqmmc-supply",
&mmc->vqmmc_supply);
if (ret)
- debug("%s: No vqmmc supply\n", mmc->dev->name);
+ pr_debug("%s: No vqmmc supply\n", mmc->dev->name);
#endif
#else /* !CONFIG_DM_MMC */
/*
int ret = regulator_set_enable(mmc->vmmc_supply, false);
if (ret) {
- debug("Error disabling VMMC supply\n");
+ pr_debug("Error disabling VMMC supply\n");
return ret;
}
}
if (no_card) {
mmc->has_init = 0;
#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
- printf("MMC: no card present\n");
+ pr_err("MMC: no card present\n");
#endif
return -ENOMEDIUM;
}
* to use the UHS modes, because we wouldn't be able to
* recover from an error during the UHS initialization.
*/
- debug("Unable to do a full power cycle. Disabling the UHS modes for safety\n");
+ pr_debug("Unable to do a full power cycle. Disabling the UHS modes for safety\n");
uhs_en = false;
mmc->host_caps &= ~UHS_CAPS;
err = mmc_power_on(mmc);
if (!err)
err = mmc_complete_init(mmc);
if (err)
- printf("%s: %d, time %lu\n", __func__, err, get_timer(start));
+ pr_info("%s: %d, time %lu\n", __func__, err, get_timer(start));
return err;
}
#endif
#include <asm/io.h>
#include <asm/arch/mmc_host_def.h>
+#ifdef CONFIG_OMAP54XX
+#include <asm/arch/mux_dra7xx.h>
+#include <asm/arch/dra7xx_iodelay.h>
+#endif
#if !defined(CONFIG_SOC_KEYSTONE)
#include <asm/gpio.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/mux.h>
#endif
#include <dm.h>
+#include <power/regulator.h>
DECLARE_GLOBAL_DATA_PTR;
#define SYSCTL_SRC (1 << 25)
#define SYSCTL_SRD (1 << 26)
+#ifdef CONFIG_IODELAY_RECALIBRATION
+struct omap_hsmmc_pinctrl_state {
+ struct pad_conf_entry *padconf;
+ int npads;
+ struct iodelay_cfg_entry *iodelay;
+ int niodelays;
+};
+#endif
+
struct omap_hsmmc_data {
struct hsmmc *base_addr;
#if !CONFIG_IS_ENABLED(DM_MMC)
struct mmc_config cfg;
#endif
+ uint bus_width;
+ uint clock;
+ ushort last_cmd;
#ifdef OMAP_HSMMC_USE_GPIO
#if CONFIG_IS_ENABLED(DM_MMC)
struct gpio_desc cd_gpio; /* Change Detect GPIO */
int cd_gpio;
int wp_gpio;
#endif
+#endif
+#if CONFIG_IS_ENABLED(DM_MMC)
+ enum bus_mode mode;
#endif
u8 controller_flags;
#ifndef CONFIG_OMAP34XX
struct omap_hsmmc_adma_desc *adma_desc_table;
uint desc_slot;
+#endif
+ const char *hw_rev;
+ struct udevice *pbias_supply;
+ uint signal_voltage;
+#ifdef CONFIG_IODELAY_RECALIBRATION
+ struct omap_hsmmc_pinctrl_state *default_pinctrl_state;
+ struct omap_hsmmc_pinctrl_state *hs_pinctrl_state;
+ struct omap_hsmmc_pinctrl_state *hs200_1_8v_pinctrl_state;
+ struct omap_hsmmc_pinctrl_state *ddr_1_8v_pinctrl_state;
+ struct omap_hsmmc_pinctrl_state *sdr12_pinctrl_state;
+ struct omap_hsmmc_pinctrl_state *sdr25_pinctrl_state;
+ struct omap_hsmmc_pinctrl_state *ddr50_pinctrl_state;
+ struct omap_hsmmc_pinctrl_state *sdr50_pinctrl_state;
+ struct omap_hsmmc_pinctrl_state *sdr104_pinctrl_state;
#endif
};
+struct omap_mmc_of_data {
+ u8 controller_flags;
+};
+
#ifndef CONFIG_OMAP34XX
struct omap_hsmmc_adma_desc {
u8 attr;
/* If we fail after 1 second wait, something is really bad */
#define MAX_RETRY_MS 1000
+#define MMC_TIMEOUT_MS 20
/* DMA transfers can take a long time if a lot a data is transferred.
* The timeout must take in account the amount of data. Let's assume
* that the bandwidth is always above 3MB/s).
*/
#define DMA_TIMEOUT_PER_MB 333
+#define OMAP_HSMMC_SUPPORTS_DUAL_VOLT BIT(0)
+#define OMAP_HSMMC_NO_1_8_V BIT(1)
#define OMAP_HSMMC_USE_ADMA BIT(2)
+#define OMAP_HSMMC_REQUIRE_IODELAY BIT(3)
static int mmc_read_data(struct hsmmc *mmc_base, char *buf, unsigned int size);
static int mmc_write_data(struct hsmmc *mmc_base, const char *buf,
unsigned int siz);
+static void omap_hsmmc_start_clock(struct hsmmc *mmc_base);
+static void omap_hsmmc_stop_clock(struct hsmmc *mmc_base);
+static void mmc_reset_controller_fsm(struct hsmmc *mmc_base, u32 bit);
static inline struct omap_hsmmc_data *omap_hsmmc_get_data(struct mmc *mmc)
{
&prcm_base->iclken1_core);
#endif
-#if defined(CONFIG_OMAP54XX) || defined(CONFIG_OMAP44XX)
+#if (defined(CONFIG_OMAP54XX) || defined(CONFIG_OMAP44XX)) &&\
+ !CONFIG_IS_ENABLED(DM_REGULATOR)
/* PBIAS config needed for MMC1 only */
if (mmc_get_blk_desc(mmc)->devnum == 0)
vmmc_pbias_config(LDO_VOLT_3V0);
writel(readl(&mmc_base->con) & ~INIT_INITSTREAM, &mmc_base->con);
}
+#if CONFIG_IS_ENABLED(DM_MMC)
+#ifdef CONFIG_IODELAY_RECALIBRATION
+static void omap_hsmmc_io_recalibrate(struct mmc *mmc)
+{
+ struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc);
+ struct omap_hsmmc_pinctrl_state *pinctrl_state;
+
+ switch (priv->mode) {
+ case MMC_HS_200:
+ pinctrl_state = priv->hs200_1_8v_pinctrl_state;
+ break;
+ case UHS_SDR104:
+ pinctrl_state = priv->sdr104_pinctrl_state;
+ break;
+ case UHS_SDR50:
+ pinctrl_state = priv->sdr50_pinctrl_state;
+ break;
+ case UHS_DDR50:
+ pinctrl_state = priv->ddr50_pinctrl_state;
+ break;
+ case UHS_SDR25:
+ pinctrl_state = priv->sdr25_pinctrl_state;
+ break;
+ case UHS_SDR12:
+ pinctrl_state = priv->sdr12_pinctrl_state;
+ break;
+ case SD_HS:
+ case MMC_HS:
+ case MMC_HS_52:
+ pinctrl_state = priv->hs_pinctrl_state;
+ break;
+ case MMC_DDR_52:
+ pinctrl_state = priv->ddr_1_8v_pinctrl_state;
+ default:
+ pinctrl_state = priv->default_pinctrl_state;
+ break;
+ }
+
+ if (!pinctrl_state)
+ pinctrl_state = priv->default_pinctrl_state;
+
+ if (priv->controller_flags & OMAP_HSMMC_REQUIRE_IODELAY) {
+ if (pinctrl_state->iodelay)
+ late_recalibrate_iodelay(pinctrl_state->padconf,
+ pinctrl_state->npads,
+ pinctrl_state->iodelay,
+ pinctrl_state->niodelays);
+ else
+ do_set_mux32((*ctrl)->control_padconf_core_base,
+ pinctrl_state->padconf,
+ pinctrl_state->npads);
+ }
+}
+#endif
+static void omap_hsmmc_set_timing(struct mmc *mmc)
+{
+ u32 val;
+ struct hsmmc *mmc_base;
+ struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc);
+
+ mmc_base = priv->base_addr;
+
+ omap_hsmmc_stop_clock(mmc_base);
+ val = readl(&mmc_base->ac12);
+ val &= ~AC12_UHSMC_MASK;
+ priv->mode = mmc->selected_mode;
+
+ if (mmc_is_mode_ddr(priv->mode))
+ writel(readl(&mmc_base->con) | DDR, &mmc_base->con);
+ else
+ writel(readl(&mmc_base->con) & ~DDR, &mmc_base->con);
+
+ switch (priv->mode) {
+ case MMC_HS_200:
+ case UHS_SDR104:
+ val |= AC12_UHSMC_SDR104;
+ break;
+ case UHS_SDR50:
+ val |= AC12_UHSMC_SDR50;
+ break;
+ case MMC_DDR_52:
+ case UHS_DDR50:
+ val |= AC12_UHSMC_DDR50;
+ break;
+ case SD_HS:
+ case MMC_HS_52:
+ case UHS_SDR25:
+ val |= AC12_UHSMC_SDR25;
+ break;
+ case MMC_LEGACY:
+ case MMC_HS:
+ case SD_LEGACY:
+ case UHS_SDR12:
+ val |= AC12_UHSMC_SDR12;
+ break;
+ default:
+ val |= AC12_UHSMC_RES;
+ break;
+ }
+ writel(val, &mmc_base->ac12);
+
+#ifdef CONFIG_IODELAY_RECALIBRATION
+ omap_hsmmc_io_recalibrate(mmc);
+#endif
+ omap_hsmmc_start_clock(mmc_base);
+}
+
+static void omap_hsmmc_conf_bus_power(struct mmc *mmc, uint signal_voltage)
+{
+ struct hsmmc *mmc_base;
+ struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc);
+ u32 hctl, ac12;
+
+ mmc_base = priv->base_addr;
+
+ hctl = readl(&mmc_base->hctl) & ~SDVS_MASK;
+ ac12 = readl(&mmc_base->ac12) & ~AC12_V1V8_SIGEN;
+
+ switch (signal_voltage) {
+ case MMC_SIGNAL_VOLTAGE_330:
+ hctl |= SDVS_3V0;
+ break;
+ case MMC_SIGNAL_VOLTAGE_180:
+ hctl |= SDVS_1V8;
+ ac12 |= AC12_V1V8_SIGEN;
+ break;
+ }
+
+ writel(hctl, &mmc_base->hctl);
+ writel(ac12, &mmc_base->ac12);
+}
+
+#if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
+static int omap_hsmmc_wait_dat0(struct udevice *dev, int state, int timeout)
+{
+ int ret = -ETIMEDOUT;
+ u32 con;
+ bool dat0_high;
+ bool target_dat0_high = !!state;
+ struct omap_hsmmc_data *priv = dev_get_priv(dev);
+ struct hsmmc *mmc_base = priv->base_addr;
+
+ con = readl(&mmc_base->con);
+ writel(con | CON_CLKEXTFREE | CON_PADEN, &mmc_base->con);
+
+ timeout = DIV_ROUND_UP(timeout, 10); /* check every 10 us. */
+ while (timeout--) {
+ dat0_high = !!(readl(&mmc_base->pstate) & PSTATE_DLEV_DAT0);
+ if (dat0_high == target_dat0_high) {
+ ret = 0;
+ break;
+ }
+ udelay(10);
+ }
+ writel(con, &mmc_base->con);
+
+ return ret;
+}
+#endif
+
+#if CONFIG_IS_ENABLED(MMC_IO_VOLTAGE)
+#if CONFIG_IS_ENABLED(DM_REGULATOR)
+static int omap_hsmmc_set_io_regulator(struct mmc *mmc, int mV)
+{
+ int ret = 0;
+ int uV = mV * 1000;
+
+ struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc);
+
+ if (!mmc->vqmmc_supply)
+ return 0;
+
+ /* Disable PBIAS */
+ ret = regulator_set_enable(priv->pbias_supply, false);
+ if (ret && ret != -ENOSYS)
+ return ret;
+
+ /* Turn off IO voltage */
+ ret = regulator_set_enable(mmc->vqmmc_supply, false);
+ if (ret && ret != -ENOSYS)
+ return ret;
+ /* Program a new IO voltage value */
+ ret = regulator_set_value(mmc->vqmmc_supply, uV);
+ if (ret)
+ return ret;
+ /* Turn on IO voltage */
+ ret = regulator_set_enable(mmc->vqmmc_supply, true);
+ if (ret && ret != -ENOSYS)
+ return ret;
+
+ /* Program PBIAS voltage*/
+ ret = regulator_set_value(priv->pbias_supply, uV);
+ if (ret && ret != -ENOSYS)
+ return ret;
+ /* Enable PBIAS */
+ ret = regulator_set_enable(priv->pbias_supply, true);
+ if (ret && ret != -ENOSYS)
+ return ret;
+
+ return 0;
+}
+#endif
+
+static int omap_hsmmc_set_signal_voltage(struct mmc *mmc)
+{
+ struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc);
+ struct hsmmc *mmc_base = priv->base_addr;
+ int mv = mmc_voltage_to_mv(mmc->signal_voltage);
+ u32 capa_mask;
+ __maybe_unused u8 palmas_ldo_volt;
+ u32 val;
+
+ if (mv < 0)
+ return -EINVAL;
+
+ if (mmc->signal_voltage == MMC_SIGNAL_VOLTAGE_330) {
+ /* Use 3.0V rather than 3.3V */
+ mv = 3000;
+ capa_mask = VS30_3V0SUP;
+ palmas_ldo_volt = LDO_VOLT_3V0;
+ } else if (mmc->signal_voltage == MMC_SIGNAL_VOLTAGE_180) {
+ capa_mask = VS18_1V8SUP;
+ palmas_ldo_volt = LDO_VOLT_1V8;
+ } else {
+ return -EOPNOTSUPP;
+ }
+
+ val = readl(&mmc_base->capa);
+ if (!(val & capa_mask))
+ return -EOPNOTSUPP;
+
+ priv->signal_voltage = mmc->signal_voltage;
+
+ omap_hsmmc_conf_bus_power(mmc, mmc->signal_voltage);
+
+#if CONFIG_IS_ENABLED(DM_REGULATOR)
+ return omap_hsmmc_set_io_regulator(mmc, mv);
+#elif (defined(CONFIG_OMAP54XX) || defined(CONFIG_OMAP44XX)) && \
+ defined(CONFIG_PALMAS_POWER)
+ if (mmc_get_blk_desc(mmc)->devnum == 0)
+ vmmc_pbias_config(palmas_ldo_volt);
+ return 0;
+#else
+ return 0;
+#endif
+}
+#endif
+
+static uint32_t omap_hsmmc_set_capabilities(struct mmc *mmc)
+{
+ struct hsmmc *mmc_base;
+ struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc);
+ u32 val;
+
+ mmc_base = priv->base_addr;
+ val = readl(&mmc_base->capa);
+
+ if (priv->controller_flags & OMAP_HSMMC_SUPPORTS_DUAL_VOLT) {
+ val |= (VS30_3V0SUP | VS18_1V8SUP);
+ } else if (priv->controller_flags & OMAP_HSMMC_NO_1_8_V) {
+ val |= VS30_3V0SUP;
+ val &= ~VS18_1V8SUP;
+ } else {
+ val |= VS18_1V8SUP;
+ val &= ~VS30_3V0SUP;
+ }
+
+ writel(val, &mmc_base->capa);
+
+ return val;
+}
+
+#ifdef MMC_SUPPORTS_TUNING
+static void omap_hsmmc_disable_tuning(struct mmc *mmc)
+{
+ struct hsmmc *mmc_base;
+ struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc);
+ u32 val;
+
+ mmc_base = priv->base_addr;
+ val = readl(&mmc_base->ac12);
+ val &= ~(AC12_SCLK_SEL);
+ writel(val, &mmc_base->ac12);
+
+ val = readl(&mmc_base->dll);
+ val &= ~(DLL_FORCE_VALUE | DLL_SWT);
+ writel(val, &mmc_base->dll);
+}
+
+static void omap_hsmmc_set_dll(struct mmc *mmc, int count)
+{
+ int i;
+ struct hsmmc *mmc_base;
+ struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc);
+ u32 val;
+
+ mmc_base = priv->base_addr;
+ val = readl(&mmc_base->dll);
+ val |= DLL_FORCE_VALUE;
+ val &= ~(DLL_FORCE_SR_C_MASK << DLL_FORCE_SR_C_SHIFT);
+ val |= (count << DLL_FORCE_SR_C_SHIFT);
+ writel(val, &mmc_base->dll);
+
+ val |= DLL_CALIB;
+ writel(val, &mmc_base->dll);
+ for (i = 0; i < 1000; i++) {
+ if (readl(&mmc_base->dll) & DLL_CALIB)
+ break;
+ }
+ val &= ~DLL_CALIB;
+ writel(val, &mmc_base->dll);
+}
+
+static int omap_hsmmc_execute_tuning(struct udevice *dev, uint opcode)
+{
+ struct omap_hsmmc_data *priv = dev_get_priv(dev);
+ struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
+ struct mmc *mmc = upriv->mmc;
+ struct hsmmc *mmc_base;
+ u32 val;
+ u8 cur_match, prev_match = 0;
+ int ret;
+ u32 phase_delay = 0;
+ u32 start_window = 0, max_window = 0;
+ u32 length = 0, max_len = 0;
+
+ mmc_base = priv->base_addr;
+ val = readl(&mmc_base->capa2);
+
+ /* clock tuning is not needed for upto 52MHz */
+ if (!((mmc->selected_mode == MMC_HS_200) ||
+ (mmc->selected_mode == UHS_SDR104) ||
+ ((mmc->selected_mode == UHS_SDR50) && (val & CAPA2_TSDR50))))
+ return 0;
+
+ val = readl(&mmc_base->dll);
+ val |= DLL_SWT;
+ writel(val, &mmc_base->dll);
+ while (phase_delay <= MAX_PHASE_DELAY) {
+ omap_hsmmc_set_dll(mmc, phase_delay);
+
+ cur_match = !mmc_send_tuning(mmc, opcode, NULL);
+
+ if (cur_match) {
+ if (prev_match) {
+ length++;
+ } else {
+ start_window = phase_delay;
+ length = 1;
+ }
+ }
+
+ if (length > max_len) {
+ max_window = start_window;
+ max_len = length;
+ }
+
+ prev_match = cur_match;
+ phase_delay += 4;
+ }
+
+ if (!max_len) {
+ ret = -EIO;
+ goto tuning_error;
+ }
+
+ val = readl(&mmc_base->ac12);
+ if (!(val & AC12_SCLK_SEL)) {
+ ret = -EIO;
+ goto tuning_error;
+ }
+
+ phase_delay = max_window + 4 * ((3 * max_len) >> 2);
+ omap_hsmmc_set_dll(mmc, phase_delay);
+
+ mmc_reset_controller_fsm(mmc_base, SYSCTL_SRD);
+ mmc_reset_controller_fsm(mmc_base, SYSCTL_SRC);
+
+ return 0;
+
+tuning_error:
+
+ omap_hsmmc_disable_tuning(mmc);
+ mmc_reset_controller_fsm(mmc_base, SYSCTL_SRD);
+ mmc_reset_controller_fsm(mmc_base, SYSCTL_SRC);
+
+ return ret;
+}
+#endif
+
+static void omap_hsmmc_send_init_stream(struct udevice *dev)
+{
+ struct omap_hsmmc_data *priv = dev_get_priv(dev);
+ struct hsmmc *mmc_base = priv->base_addr;
+
+ mmc_init_stream(mmc_base);
+}
+#endif
+
+static void mmc_enable_irq(struct mmc *mmc, struct mmc_cmd *cmd)
+{
+ struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc);
+ struct hsmmc *mmc_base = priv->base_addr;
+ u32 irq_mask = INT_EN_MASK;
+
+ /*
+ * TODO: Errata i802 indicates only DCRC interrupts can occur during
+ * tuning procedure and DCRC should be disabled. But see occurences
+ * of DEB, CIE, CEB, CCRC interupts during tuning procedure. These
+ * interrupts occur along with BRR, so the data is actually in the
+ * buffer. It has to be debugged why these interrutps occur
+ */
+ if (cmd && mmc_is_tuning_cmd(cmd->cmdidx))
+ irq_mask &= ~(IE_DEB | IE_DCRC | IE_CIE | IE_CEB | IE_CCRC);
+
+ writel(irq_mask, &mmc_base->ie);
+}
+
static int omap_hsmmc_init_setup(struct mmc *mmc)
{
struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc);
if (reg_val & MADMA_EN)
priv->controller_flags |= OMAP_HSMMC_USE_ADMA;
#endif
+
+#if CONFIG_IS_ENABLED(DM_MMC)
+ reg_val = omap_hsmmc_set_capabilities(mmc);
+ omap_hsmmc_conf_bus_power(mmc, (reg_val & VS30_3V0SUP) ?
+ MMC_SIGNAL_VOLTAGE_330 : MMC_SIGNAL_VOLTAGE_180);
+#else
writel(DTW_1_BITMODE | SDBP_PWROFF | SDVS_3V0, &mmc_base->hctl);
writel(readl(&mmc_base->capa) | VS30_3V0SUP | VS18_1V8SUP,
&mmc_base->capa);
+#endif
reg_val = readl(&mmc_base->con) & RESERVED_MASK;
writel(readl(&mmc_base->hctl) | SDBP_PWRON, &mmc_base->hctl);
- writel(IE_BADA | IE_CERR | IE_DEB | IE_DCRC | IE_DTO | IE_CIE |
- IE_CEB | IE_CCRC | IE_ADMAE | IE_CTO | IE_BRR | IE_BWR | IE_TC |
- IE_CC, &mmc_base->ie);
+ mmc_enable_irq(mmc, NULL);
+#if !CONFIG_IS_ENABLED(DM_MMC)
mmc_init_stream(mmc_base);
+#endif
return 0;
}
if (!(readl(&mmc_base->sysctl) & bit)) {
start = get_timer(0);
while (!(readl(&mmc_base->sysctl) & bit)) {
- if (get_timer(0) - start > MAX_RETRY_MS)
+ if (get_timer(0) - start > MMC_TIMEOUT_MS)
return;
}
}
struct mmc_data *data)
{
struct omap_hsmmc_data *priv = dev_get_priv(dev);
-#ifndef CONFIG_OMAP34XX
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
struct mmc *mmc = upriv->mmc;
-#endif
#endif
struct hsmmc *mmc_base;
unsigned int flags, mmc_stat;
ulong start;
+ priv->last_cmd = cmd->cmdidx;
mmc_base = priv->base_addr;
#endif
}
+ mmc_enable_irq(mmc, cmd);
+
writel(cmd->cmdarg, &mmc_base->arg);
udelay(20); /* To fix "No status update" error on eMMC */
writel((cmd->cmdidx << 24) | flags, &mmc_base->cmd);
return 0;
}
-#if !CONFIG_IS_ENABLED(DM_MMC)
-static int omap_hsmmc_set_ios(struct mmc *mmc)
+static void omap_hsmmc_stop_clock(struct hsmmc *mmc_base)
{
- struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc);
-#else
-static int omap_hsmmc_set_ios(struct udevice *dev)
+ writel(readl(&mmc_base->sysctl) & ~CEN_ENABLE, &mmc_base->sysctl);
+}
+
+static void omap_hsmmc_start_clock(struct hsmmc *mmc_base)
{
- struct omap_hsmmc_data *priv = dev_get_priv(dev);
- struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
- struct mmc *mmc = upriv->mmc;
-#endif
+ writel(readl(&mmc_base->sysctl) | CEN_ENABLE, &mmc_base->sysctl);
+}
+
+static void omap_hsmmc_set_clock(struct mmc *mmc)
+{
+ struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc);
struct hsmmc *mmc_base;
unsigned int dsor = 0;
ulong start;
+ mmc_base = priv->base_addr;
+ omap_hsmmc_stop_clock(mmc_base);
+
+ /* TODO: Is setting DTO required here? */
+ mmc_reg_out(&mmc_base->sysctl, (ICE_MASK | DTO_MASK),
+ (ICE_STOP | DTO_15THDTO));
+
+ if (mmc->clock != 0) {
+ dsor = DIV_ROUND_UP(MMC_CLOCK_REFERENCE * 1000000, mmc->clock);
+ if (dsor > CLKD_MAX)
+ dsor = CLKD_MAX;
+ } else {
+ dsor = CLKD_MAX;
+ }
+
+ mmc_reg_out(&mmc_base->sysctl, ICE_MASK | CLKD_MASK,
+ (dsor << CLKD_OFFSET) | ICE_OSCILLATE);
+
+ start = get_timer(0);
+ while ((readl(&mmc_base->sysctl) & ICS_MASK) == ICS_NOTREADY) {
+ if (get_timer(0) - start > MAX_RETRY_MS) {
+ printf("%s: timedout waiting for ics!\n", __func__);
+ return;
+ }
+ }
+
+ priv->clock = MMC_CLOCK_REFERENCE * 1000000 / dsor;
+ mmc->clock = priv->clock;
+ omap_hsmmc_start_clock(mmc_base);
+}
+
+static void omap_hsmmc_set_bus_width(struct mmc *mmc)
+{
+ struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc);
+ struct hsmmc *mmc_base;
+
mmc_base = priv->base_addr;
/* configue bus width */
switch (mmc->bus_width) {
break;
}
- /* configure clock with 96Mhz system clock.
- */
- if (mmc->clock != 0) {
- dsor = (MMC_CLOCK_REFERENCE * 1000000 / mmc->clock);
- if ((MMC_CLOCK_REFERENCE * 1000000) / dsor > mmc->clock)
- dsor++;
- }
+ priv->bus_width = mmc->bus_width;
+}
- mmc_reg_out(&mmc_base->sysctl, (ICE_MASK | DTO_MASK | CEN_MASK),
- (ICE_STOP | DTO_15THDTO));
+#if !CONFIG_IS_ENABLED(DM_MMC)
+static int omap_hsmmc_set_ios(struct mmc *mmc)
+{
+ struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc);
+#else
+static int omap_hsmmc_set_ios(struct udevice *dev)
+{
+ struct omap_hsmmc_data *priv = dev_get_priv(dev);
+ struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
+ struct mmc *mmc = upriv->mmc;
+#endif
+ struct hsmmc *mmc_base = priv->base_addr;
+ int ret = 0;
- mmc_reg_out(&mmc_base->sysctl, ICE_MASK | CLKD_MASK,
- (dsor << CLKD_OFFSET) | ICE_OSCILLATE);
+ if (priv->bus_width != mmc->bus_width)
+ omap_hsmmc_set_bus_width(mmc);
- start = get_timer(0);
- while ((readl(&mmc_base->sysctl) & ICS_MASK) == ICS_NOTREADY) {
- if (get_timer(0) - start > MAX_RETRY_MS) {
- printf("%s: timedout waiting for ics!\n", __func__);
- return -ETIMEDOUT;
- }
- }
- writel(readl(&mmc_base->sysctl) | CEN_ENABLE, &mmc_base->sysctl);
+ if (priv->clock != mmc->clock)
+ omap_hsmmc_set_clock(mmc);
- return 0;
+ if (mmc->clk_disable)
+ omap_hsmmc_stop_clock(mmc_base);
+ else
+ omap_hsmmc_start_clock(mmc_base);
+
+#if CONFIG_IS_ENABLED(DM_MMC)
+ if (priv->mode != mmc->selected_mode)
+ omap_hsmmc_set_timing(mmc);
+
+#if CONFIG_IS_ENABLED(MMC_IO_VOLTAGE)
+ if (priv->signal_voltage != mmc->signal_voltage)
+ ret = omap_hsmmc_set_signal_voltage(mmc);
+#endif
+#endif
+ return ret;
}
#ifdef OMAP_HSMMC_USE_GPIO
.get_cd = omap_hsmmc_getcd,
.get_wp = omap_hsmmc_getwp,
#endif
+#ifdef MMC_SUPPORTS_TUNING
+ .execute_tuning = omap_hsmmc_execute_tuning,
+#endif
+ .send_init_stream = omap_hsmmc_send_init_stream,
+#if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
+ .wait_dat0 = omap_hsmmc_wait_dat0,
+#endif
};
#else
static const struct mmc_ops omap_hsmmc_ops = {
struct mmc_config *cfg;
uint host_caps_val;
- priv = malloc(sizeof(*priv));
+ priv = calloc(1, sizeof(*priv));
if (priv == NULL)
return -1;
if ((get_cpu_family() == CPU_OMAP34XX) && (get_cpu_rev() <= CPU_3XX_ES21))
cfg->b_max = 1;
#endif
+
mmc = mmc_create(cfg, priv);
if (mmc == NULL)
return -1;
return 0;
}
#else
+
+#ifdef CONFIG_IODELAY_RECALIBRATION
+static struct pad_conf_entry *
+omap_hsmmc_get_pad_conf_entry(const fdt32_t *pinctrl, int count)
+{
+ int index = 0;
+ struct pad_conf_entry *padconf;
+
+ padconf = (struct pad_conf_entry *)malloc(sizeof(*padconf) * count);
+ if (!padconf) {
+ debug("failed to allocate memory\n");
+ return 0;
+ }
+
+ while (index < count) {
+ padconf[index].offset = fdt32_to_cpu(pinctrl[2 * index]);
+ padconf[index].val = fdt32_to_cpu(pinctrl[2 * index + 1]);
+ index++;
+ }
+
+ return padconf;
+}
+
+static struct iodelay_cfg_entry *
+omap_hsmmc_get_iodelay_cfg_entry(const fdt32_t *pinctrl, int count)
+{
+ int index = 0;
+ struct iodelay_cfg_entry *iodelay;
+
+ iodelay = (struct iodelay_cfg_entry *)malloc(sizeof(*iodelay) * count);
+ if (!iodelay) {
+ debug("failed to allocate memory\n");
+ return 0;
+ }
+
+ while (index < count) {
+ iodelay[index].offset = fdt32_to_cpu(pinctrl[3 * index]);
+ iodelay[index].a_delay = fdt32_to_cpu(pinctrl[3 * index + 1]);
+ iodelay[index].g_delay = fdt32_to_cpu(pinctrl[3 * index + 2]);
+ index++;
+ }
+
+ return iodelay;
+}
+
+static const fdt32_t *omap_hsmmc_get_pinctrl_entry(u32 phandle,
+ const char *name, int *len)
+{
+ const void *fdt = gd->fdt_blob;
+ int offset;
+ const fdt32_t *pinctrl;
+
+ offset = fdt_node_offset_by_phandle(fdt, phandle);
+ if (offset < 0) {
+ debug("failed to get pinctrl node %s.\n",
+ fdt_strerror(offset));
+ return 0;
+ }
+
+ pinctrl = fdt_getprop(fdt, offset, name, len);
+ if (!pinctrl) {
+ debug("failed to get property %s\n", name);
+ return 0;
+ }
+
+ return pinctrl;
+}
+
+static uint32_t omap_hsmmc_get_pad_conf_phandle(struct mmc *mmc,
+ char *prop_name)
+{
+ const void *fdt = gd->fdt_blob;
+ const __be32 *phandle;
+ int node = dev_of_offset(mmc->dev);
+
+ phandle = fdt_getprop(fdt, node, prop_name, NULL);
+ if (!phandle) {
+ debug("failed to get property %s\n", prop_name);
+ return 0;
+ }
+
+ return fdt32_to_cpu(*phandle);
+}
+
+static uint32_t omap_hsmmc_get_iodelay_phandle(struct mmc *mmc,
+ char *prop_name)
+{
+ const void *fdt = gd->fdt_blob;
+ const __be32 *phandle;
+ int len;
+ int count;
+ int node = dev_of_offset(mmc->dev);
+
+ phandle = fdt_getprop(fdt, node, prop_name, &len);
+ if (!phandle) {
+ debug("failed to get property %s\n", prop_name);
+ return 0;
+ }
+
+ /* No manual mode iodelay values if count < 2 */
+ count = len / sizeof(*phandle);
+ if (count < 2)
+ return 0;
+
+ return fdt32_to_cpu(*(phandle + 1));
+}
+
+static struct pad_conf_entry *
+omap_hsmmc_get_pad_conf(struct mmc *mmc, char *prop_name, int *npads)
+{
+ int len;
+ int count;
+ struct pad_conf_entry *padconf;
+ u32 phandle;
+ const fdt32_t *pinctrl;
+
+ phandle = omap_hsmmc_get_pad_conf_phandle(mmc, prop_name);
+ if (!phandle)
+ return ERR_PTR(-EINVAL);
+
+ pinctrl = omap_hsmmc_get_pinctrl_entry(phandle, "pinctrl-single,pins",
+ &len);
+ if (!pinctrl)
+ return ERR_PTR(-EINVAL);
+
+ count = (len / sizeof(*pinctrl)) / 2;
+ padconf = omap_hsmmc_get_pad_conf_entry(pinctrl, count);
+ if (!padconf)
+ return ERR_PTR(-EINVAL);
+
+ *npads = count;
+
+ return padconf;
+}
+
+static struct iodelay_cfg_entry *
+omap_hsmmc_get_iodelay(struct mmc *mmc, char *prop_name, int *niodelay)
+{
+ int len;
+ int count;
+ struct iodelay_cfg_entry *iodelay;
+ u32 phandle;
+ const fdt32_t *pinctrl;
+
+ phandle = omap_hsmmc_get_iodelay_phandle(mmc, prop_name);
+ /* Not all modes have manual mode iodelay values. So its not fatal */
+ if (!phandle)
+ return 0;
+
+ pinctrl = omap_hsmmc_get_pinctrl_entry(phandle, "pinctrl-pin-array",
+ &len);
+ if (!pinctrl)
+ return ERR_PTR(-EINVAL);
+
+ count = (len / sizeof(*pinctrl)) / 3;
+ iodelay = omap_hsmmc_get_iodelay_cfg_entry(pinctrl, count);
+ if (!iodelay)
+ return ERR_PTR(-EINVAL);
+
+ *niodelay = count;
+
+ return iodelay;
+}
+
+static struct omap_hsmmc_pinctrl_state *
+omap_hsmmc_get_pinctrl_by_mode(struct mmc *mmc, char *mode)
+{
+ int index;
+ int npads = 0;
+ int niodelays = 0;
+ const void *fdt = gd->fdt_blob;
+ int node = dev_of_offset(mmc->dev);
+ char prop_name[11];
+ struct omap_hsmmc_pinctrl_state *pinctrl_state;
+
+ pinctrl_state = (struct omap_hsmmc_pinctrl_state *)
+ malloc(sizeof(*pinctrl_state));
+ if (!pinctrl_state) {
+ debug("failed to allocate memory\n");
+ return 0;
+ }
+
+ index = fdt_stringlist_search(fdt, node, "pinctrl-names", mode);
+ if (index < 0) {
+ debug("fail to find %s mode %s\n", mode, fdt_strerror(index));
+ goto err_pinctrl_state;
+ }
+
+ sprintf(prop_name, "pinctrl-%d", index);
+
+ pinctrl_state->padconf = omap_hsmmc_get_pad_conf(mmc, prop_name,
+ &npads);
+ if (IS_ERR(pinctrl_state->padconf))
+ goto err_pinctrl_state;
+ pinctrl_state->npads = npads;
+
+ pinctrl_state->iodelay = omap_hsmmc_get_iodelay(mmc, prop_name,
+ &niodelays);
+ if (IS_ERR(pinctrl_state->iodelay))
+ goto err_padconf;
+ pinctrl_state->niodelays = niodelays;
+
+ return pinctrl_state;
+
+err_padconf:
+ kfree(pinctrl_state->padconf);
+
+err_pinctrl_state:
+ kfree(pinctrl_state);
+ return 0;
+}
+
+#define OMAP_HSMMC_SETUP_PINCTRL(capmask, mode, optional) \
+ do { \
+ struct omap_hsmmc_pinctrl_state *s = NULL; \
+ char str[20]; \
+ if (!(cfg->host_caps & capmask)) \
+ break; \
+ \
+ if (priv->hw_rev) { \
+ sprintf(str, "%s-%s", #mode, priv->hw_rev); \
+ s = omap_hsmmc_get_pinctrl_by_mode(mmc, str); \
+ } \
+ \
+ if (!s) \
+ s = omap_hsmmc_get_pinctrl_by_mode(mmc, #mode); \
+ \
+ if (!s && !optional) { \
+ debug("%s: no pinctrl for %s\n", \
+ mmc->dev->name, #mode); \
+ cfg->host_caps &= ~(capmask); \
+ } else { \
+ priv->mode##_pinctrl_state = s; \
+ } \
+ } while (0)
+
+static int omap_hsmmc_get_pinctrl_state(struct mmc *mmc)
+{
+ struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc);
+ struct mmc_config *cfg = omap_hsmmc_get_cfg(mmc);
+ struct omap_hsmmc_pinctrl_state *default_pinctrl;
+
+ if (!(priv->controller_flags & OMAP_HSMMC_REQUIRE_IODELAY))
+ return 0;
+
+ default_pinctrl = omap_hsmmc_get_pinctrl_by_mode(mmc, "default");
+ if (!default_pinctrl) {
+ printf("no pinctrl state for default mode\n");
+ return -EINVAL;
+ }
+
+ priv->default_pinctrl_state = default_pinctrl;
+
+ OMAP_HSMMC_SETUP_PINCTRL(MMC_CAP(UHS_SDR104), sdr104, false);
+ OMAP_HSMMC_SETUP_PINCTRL(MMC_CAP(UHS_SDR50), sdr50, false);
+ OMAP_HSMMC_SETUP_PINCTRL(MMC_CAP(UHS_DDR50), ddr50, false);
+ OMAP_HSMMC_SETUP_PINCTRL(MMC_CAP(UHS_SDR25), sdr25, false);
+ OMAP_HSMMC_SETUP_PINCTRL(MMC_CAP(UHS_SDR12), sdr12, false);
+
+ OMAP_HSMMC_SETUP_PINCTRL(MMC_CAP(MMC_HS_200), hs200_1_8v, false);
+ OMAP_HSMMC_SETUP_PINCTRL(MMC_CAP(MMC_DDR_52), ddr_1_8v, false);
+ OMAP_HSMMC_SETUP_PINCTRL(MMC_MODE_HS, hs, true);
+
+ return 0;
+}
+#endif
+
#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#ifdef CONFIG_OMAP54XX
+__weak const struct mmc_platform_fixups *platform_fixups_mmc(uint32_t addr)
+{
+ return NULL;
+}
+#endif
+
static int omap_hsmmc_ofdata_to_platdata(struct udevice *dev)
{
struct omap_hsmmc_plat *plat = dev_get_platdata(dev);
+ struct omap_mmc_of_data *of_data = (void *)dev_get_driver_data(dev);
+
struct mmc_config *cfg = &plat->cfg;
+#ifdef CONFIG_OMAP54XX
+ const struct mmc_platform_fixups *fixups;
+#endif
const void *fdt = gd->fdt_blob;
int node = dev_of_offset(dev);
- int val;
+ int ret;
plat->base_addr = map_physmem(devfdt_get_addr(dev),
sizeof(struct hsmmc *),
MAP_NOCACHE);
- cfg->host_caps = MMC_MODE_HS_52MHz | MMC_MODE_HS;
- val = fdtdec_get_int(fdt, node, "bus-width", -1);
- if (val < 0) {
- printf("error: bus-width property missing\n");
- return -ENOENT;
- }
-
- switch (val) {
- case 0x8:
- cfg->host_caps |= MMC_MODE_8BIT;
- case 0x4:
- cfg->host_caps |= MMC_MODE_4BIT;
- break;
- default:
- printf("error: invalid bus-width property\n");
- return -ENOENT;
- }
+ ret = mmc_of_parse(dev, cfg);
+ if (ret < 0)
+ return ret;
+ cfg->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
cfg->f_min = 400000;
- cfg->f_max = fdtdec_get_int(fdt, node, "max-frequency", 52000000);
cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
+ if (fdtdec_get_bool(fdt, node, "ti,dual-volt"))
+ plat->controller_flags |= OMAP_HSMMC_SUPPORTS_DUAL_VOLT;
+ if (fdtdec_get_bool(fdt, node, "no-1-8-v"))
+ plat->controller_flags |= OMAP_HSMMC_NO_1_8_V;
+ if (of_data)
+ plat->controller_flags |= of_data->controller_flags;
+
+#ifdef CONFIG_OMAP54XX
+ fixups = platform_fixups_mmc(devfdt_get_addr(dev));
+ if (fixups) {
+ plat->hw_rev = fixups->hw_rev;
+ cfg->host_caps &= ~fixups->unsupported_caps;
+ cfg->f_max = fixups->max_freq;
+ }
+#endif
#ifdef OMAP_HSMMC_USE_GPIO
plat->cd_inverted = fdtdec_get_bool(fdt, node, "cd-inverted");
struct omap_hsmmc_data *priv = dev_get_priv(dev);
struct mmc_config *cfg = &plat->cfg;
struct mmc *mmc;
+#ifdef CONFIG_IODELAY_RECALIBRATION
+ int ret;
+#endif
cfg->name = "OMAP SD/MMC";
priv->base_addr = plat->base_addr;
+ priv->controller_flags = plat->controller_flags;
+ priv->hw_rev = plat->hw_rev;
#ifdef OMAP_HSMMC_USE_GPIO
priv->cd_inverted = plat->cd_inverted;
#endif
if (mmc == NULL)
return -1;
#endif
-
+#if CONFIG_IS_ENABLED(DM_REGULATOR)
+ device_get_supply_regulator(dev, "pbias-supply",
+ &priv->pbias_supply);
+#endif
#if defined(OMAP_HSMMC_USE_GPIO) && CONFIG_IS_ENABLED(OF_CONTROL)
gpio_request_by_name(dev, "cd-gpios", 0, &priv->cd_gpio, GPIOD_IS_IN);
gpio_request_by_name(dev, "wp-gpios", 0, &priv->wp_gpio, GPIOD_IS_IN);
mmc->dev = dev;
upriv->mmc = mmc;
+#ifdef CONFIG_IODELAY_RECALIBRATION
+ ret = omap_hsmmc_get_pinctrl_state(mmc);
+ /*
+ * disable high speed modes for the platforms that require IO delay
+ * and for which we don't have this information
+ */
+ if ((ret < 0) &&
+ (priv->controller_flags & OMAP_HSMMC_REQUIRE_IODELAY)) {
+ priv->controller_flags &= ~OMAP_HSMMC_REQUIRE_IODELAY;
+ cfg->host_caps &= ~(MMC_CAP(MMC_HS_200) | MMC_CAP(MMC_DDR_52) |
+ UHS_CAPS);
+ }
+#endif
+
return omap_hsmmc_init_setup(mmc);
}
#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+
+static const struct omap_mmc_of_data dra7_mmc_of_data = {
+ .controller_flags = OMAP_HSMMC_REQUIRE_IODELAY,
+};
+
static const struct udevice_id omap_hsmmc_ids[] = {
{ .compatible = "ti,omap3-hsmmc" },
{ .compatible = "ti,omap4-hsmmc" },
{ .compatible = "ti,am33xx-hsmmc" },
+ { .compatible = "ti,dra7-hsmmc", .data = (ulong)&dra7_mmc_of_data },
{ }
};
#endif
}
static const struct udevice_id uniphier_sd_match[] = {
+ { .compatible = "renesas,sdhi-r8a7790", .data = 0 },
+ { .compatible = "renesas,sdhi-r8a7791", .data = 0 },
+ { .compatible = "renesas,sdhi-r8a7792", .data = 0 },
+ { .compatible = "renesas,sdhi-r8a7793", .data = 0 },
+ { .compatible = "renesas,sdhi-r8a7794", .data = 0 },
{ .compatible = "renesas,sdhi-r8a7795", .data = UNIPHIER_SD_CAP_64BIT },
{ .compatible = "renesas,sdhi-r8a7796", .data = UNIPHIER_SD_CAP_64BIT },
{ .compatible = "renesas,sdhi-r8a77970", .data = UNIPHIER_SD_CAP_64BIT },
{"is25lp032", INFO(0x9d6016, 0x0, 64 * 1024, 64, 0) },
{"is25lp064", INFO(0x9d6017, 0x0, 64 * 1024, 128, 0) },
{"is25lp128", INFO(0x9d6018, 0x0, 64 * 1024, 256, 0) },
+ {"is25lp256", INFO(0x9d6019, 0x0, 64 * 1024, 512, 0) },
#endif
#ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */
{"mx25l2006e", INFO(0xc22012, 0x0, 64 * 1024, 4, 0) },
#ifndef __UBOOT__
wake_up_process(ubi->bgt_thread);
#else
- /*
- * U-Boot special: We have no bgt_thread in U-Boot!
- * So just call do_work() here directly.
- */
- err = do_work(ubi);
- if (err) {
- ubi_err(ubi, "%s: work failed with error code %d",
- ubi->bgt_name, err);
- }
+ ubi_do_worker(ubi);
#endif
spin_unlock(&ubi->wl_lock);
}
#ifdef __UBOOT__
-int do_work(struct ubi_device *ubi);
+void ubi_do_worker(struct ubi_device *ubi);
#endif
#endif /* !__UBI_UBI_H__ */
* This function returns zero in case of success and a negative error code in
* case of failure.
*/
-#ifndef __UBOOT__
static int do_work(struct ubi_device *ubi)
-#else
-int do_work(struct ubi_device *ubi)
-#endif
{
int err;
struct ubi_work *wrk;
spin_unlock(&ubi->wl_lock);
}
+#ifdef __UBOOT__
+void ubi_do_worker(struct ubi_device *ubi)
+{
+ int err;
+
+ if (list_empty(&ubi->works) || ubi->ro_mode ||
+ !ubi->thread_enabled || ubi_dbg_is_bgt_disabled(ubi))
+ return;
+
+ spin_lock(&ubi->wl_lock);
+ while (!list_empty(&ubi->works)) {
+ /*
+ * call do_work, which executes exactly one work form the queue,
+ * including removeing it from the work queue.
+ */
+ spin_unlock(&ubi->wl_lock);
+ err = do_work(ubi);
+ spin_lock(&ubi->wl_lock);
+ if (err) {
+ ubi_err(ubi, "%s: work failed with error code %d",
+ ubi->bgt_name, err);
+ }
+ }
+ spin_unlock(&ubi->wl_lock);
+}
+#endif
+
/**
* __schedule_ubi_work - schedule a work.
* @ubi: UBI device description object
#ifndef __UBOOT__
if (ubi->thread_enabled && !ubi_dbg_is_bgt_disabled(ubi))
wake_up_process(ubi->bgt_thread);
-#else
- int err;
- /*
- * U-Boot special: We have no bgt_thread in U-Boot!
- * So just call do_work() here directly.
- */
- err = do_work(ubi);
- if (err) {
- ubi_err(ubi, "%s: work failed with error code %d",
- ubi->bgt_name, err);
- }
#endif
spin_unlock(&ubi->wl_lock);
}
wl_wrk->torture = torture;
schedule_ubi_work(ubi, wl_wrk);
+
+#ifdef __UBOOT__
+ ubi_do_worker(ubi);
+#endif
return 0;
}
wrk->func = &wear_leveling_worker;
if (nested)
__schedule_ubi_work(ubi, wrk);
+#ifndef __UBOOT__
else
schedule_ubi_work(ubi, wrk);
+#else
+ else {
+ schedule_ubi_work(ubi, wrk);
+ ubi_do_worker(ubi);
+ }
+#endif
return err;
out_cancel:
obj-$(CONFIG_VSC7385_ENET) += vsc7385.o
obj-$(CONFIG_XILINX_AXIEMAC) += xilinx_axi_emac.o
obj-$(CONFIG_XILINX_EMACLITE) += xilinx_emaclite.o
-obj-$(CONFIG_XILINX_LL_TEMAC) += xilinx_ll_temac.o xilinx_ll_temac_mdio.o \
- xilinx_ll_temac_fifo.o xilinx_ll_temac_sdma.o
obj-$(CONFIG_ZYNQ_GEM) += zynq_gem.o
obj-$(CONFIG_FSL_MC_ENET) += fsl-mc/
obj-$(CONFIG_FSL_MC_ENET) += ldpaa_eth/
static int sh_eth_send_common(struct sh_eth_dev *eth, void *packet, int len)
{
- int port = eth->port, ret = 0, timeout;
- struct sh_eth_info *port_info = ð->port_info[port];
+ int ret = 0, timeout;
+ struct sh_eth_info *port_info = ð->port_info[eth->port];
if (!packet || len > 0xffff) {
printf(SHETHER_NAME ": %s: Invalid argument\n", __func__);
static int sh_eth_recv_start(struct sh_eth_dev *eth)
{
- int port = eth->port, len = 0;
- struct sh_eth_info *port_info = ð->port_info[port];
+ struct sh_eth_info *port_info = ð->port_info[eth->port];
/* Check if the rx descriptor is ready */
invalidate_cache(port_info->rx_desc_cur, sizeof(struct rx_desc_s));
if (port_info->rx_desc_cur->rd0 & RD_RFE)
return -EINVAL;
- len = port_info->rx_desc_cur->rd1 & 0xffff;
-
- return len;
+ return port_info->rx_desc_cur->rd1 & 0xffff;
}
static void sh_eth_recv_finish(struct sh_eth_dev *eth)
return ret;
#else
sh_eth_write(port_info, sh_eth_read(port_info, EDMR) | EDMR_SRST, EDMR);
- udelay(3000);
+ mdelay(3);
sh_eth_write(port_info,
sh_eth_read(port_info, EDMR) & ~EDMR_SRST, EDMR);
static int sh_eth_tx_desc_init(struct sh_eth_dev *eth)
{
- int port = eth->port, i, ret = 0;
+ int i, ret = 0;
u32 alloc_desc_size = NUM_TX_DESC * sizeof(struct tx_desc_s);
- struct sh_eth_info *port_info = ð->port_info[port];
+ struct sh_eth_info *port_info = ð->port_info[eth->port];
struct tx_desc_s *cur_tx_desc;
/*
static int sh_eth_rx_desc_init(struct sh_eth_dev *eth)
{
- int port = eth->port, i, ret = 0;
+ int i, ret = 0;
u32 alloc_desc_size = NUM_RX_DESC * sizeof(struct rx_desc_s);
- struct sh_eth_info *port_info = ð->port_info[port];
+ struct sh_eth_info *port_info = ð->port_info[eth->port];
struct rx_desc_s *cur_rx_desc;
u8 *rx_buf;
static void sh_eth_tx_desc_free(struct sh_eth_dev *eth)
{
- int port = eth->port;
- struct sh_eth_info *port_info = ð->port_info[port];
+ struct sh_eth_info *port_info = ð->port_info[eth->port];
if (port_info->tx_desc_alloc) {
free(port_info->tx_desc_alloc);
static void sh_eth_rx_desc_free(struct sh_eth_dev *eth)
{
- int port = eth->port;
- struct sh_eth_info *port_info = ð->port_info[port];
+ struct sh_eth_info *port_info = ð->port_info[eth->port];
if (port_info->rx_desc_alloc) {
free(port_info->rx_desc_alloc);
#ifndef CONFIG_DM_ETH
static int sh_eth_phy_config_legacy(struct sh_eth_dev *eth)
{
- int port = eth->port, ret = 0;
- struct sh_eth_info *port_info = ð->port_info[port];
+ int ret = 0;
+ struct sh_eth_info *port_info = ð->port_info[eth->port];
struct eth_device *dev = port_info->dev;
struct phy_device *phydev;
static int sh_eth_recv_common(struct sh_eth_dev *eth)
{
- int port = eth->port, len = 0;
- struct sh_eth_info *port_info = ð->port_info[port];
+ int len = 0;
+ struct sh_eth_info *port_info = ð->port_info[eth->port];
uchar *packet = (uchar *)ADDR_TO_P2(port_info->rx_desc_cur->rd2);
len = sh_eth_recv_start(eth);
struct sh_eth_dev shdev;
struct mii_dev *bus;
- void __iomem *iobase;
+ phys_addr_t iobase;
struct clk clk;
struct gpio_desc reset_gpio;
};
struct sh_ether_priv *priv = dev_get_priv(dev);
struct eth_pdata *pdata = dev_get_platdata(dev);
struct sh_eth_dev *eth = &priv->shdev;
- int port = eth->port, ret = 0;
- struct sh_eth_info *port_info = ð->port_info[port];
+ int ret = 0;
+ struct sh_eth_info *port_info = ð->port_info[eth->port];
struct phy_device *phydev;
int mask = 0xffffffff;
struct sh_ether_priv *priv = dev_get_priv(udev);
struct sh_eth_dev *eth = &priv->shdev;
struct mii_dev *mdiodev;
- void __iomem *iobase;
int ret;
- iobase = map_physmem(pdata->iobase, 0x1000, MAP_NOCACHE);
- priv->iobase = iobase;
+ priv->iobase = pdata->iobase;
ret = clk_get_by_index(udev, 0, &priv->clk);
if (ret < 0)
- goto err_mdio_alloc;
+ return ret;
gpio_request_by_name(udev, "reset-gpios", 0, &priv->reset_gpio,
GPIOD_IS_OUT);
mdiodev = mdio_alloc();
if (!mdiodev) {
ret = -ENOMEM;
- goto err_mdio_alloc;
+ return ret;
}
mdiodev->read = bb_miiphy_read;
err_mdio_register:
mdio_free(mdiodev);
-err_mdio_alloc:
- unmap_physmem(priv->iobase, MAP_NOCACHE);
return ret;
}
if (dm_gpio_is_valid(&priv->reset_gpio))
dm_gpio_free(udev, &priv->reset_gpio);
- unmap_physmem(priv->iobase, MAP_NOCACHE);
-
return 0;
}
+++ /dev/null
-/*
- * Xilinx xps_ll_temac ethernet driver for u-boot
- *
- * supports SDMA or FIFO access and MDIO bus communication
- *
- * Copyright (C) 2011 - 2012 Stephan Linz <linz@li-pro.net>
- * Copyright (C) 2008 - 2011 Michal Simek <monstr@monstr.eu>
- * Copyright (C) 2008 - 2011 PetaLogix
- *
- * Based on Yoshio Kashiwagi kashiwagi@co-nss.co.jp driver
- * Copyright (C) 2008 Nissin Systems Co.,Ltd.
- * March 2008 created
- *
- * SPDX-License-Identifier: GPL-2.0+
- *
- * [0]: http://www.xilinx.com/support/documentation
- *
- * [S]: [0]/ip_documentation/xps_ll_temac.pdf
- * [A]: [0]/application_notes/xapp1041.pdf
- */
-
-#include <config.h>
-#include <common.h>
-#include <net.h>
-#include <netdev.h>
-#include <malloc.h>
-#include <asm/io.h>
-#include <miiphy.h>
-
-#include "xilinx_ll_temac.h"
-#include "xilinx_ll_temac_fifo.h"
-#include "xilinx_ll_temac_sdma.h"
-#include "xilinx_ll_temac_mdio.h"
-
-#if !defined(CONFIG_MII)
-# error "LL_TEMAC requires MII -- missing CONFIG_MII"
-#endif
-
-#if !defined(CONFIG_PHYLIB)
-# error "LL_TEMAC requires PHYLIB -- missing CONFIG_PHYLIB"
-#endif
-
-struct ll_temac_info {
- int flags;
- unsigned long base_addr;
- unsigned long ctrl_addr;
- char *devname;
- unsigned int phyaddr;
- char *mdio_busname;
-};
-
-/* Ethernet interface ready status */
-int ll_temac_check_status(struct temac_reg *regs, u32 mask)
-{
- unsigned timeout = 50; /* 1usec * 50 = 50usec */
-
- /*
- * Quote from LL TEMAC documentation: The bits in the RDY
- * register are asserted when there is no access in progress.
- * When an access is in progress, a bit corresponding to the
- * type of access is automatically de-asserted. The bit is
- * automatically re-asserted when the access is complete.
- */
- while (timeout && (!(in_be32(®s->rdy) & mask))) {
- timeout--;
- udelay(1);
- }
-
- if (!timeout) {
- printf("%s: Timeout on 0x%08x @%p\n", __func__,
- mask, ®s->rdy);
- return 1;
- }
-
- return 0;
-}
-
-/*
- * Indirect write to ll_temac.
- *
- * http://www.xilinx.com/support/documentation/ip_documentation/xps_ll_temac.pdf
- * page 23, second paragraph, The use of CTL0 register or CTL1 register
- */
-int ll_temac_indirect_set(struct temac_reg *regs, u16 regn, u32 reg_data)
-{
- out_be32(®s->lsw, (reg_data & MLSW_MASK));
- out_be32(®s->ctl, CTL_WEN | (regn & CTL_ADDR_MASK));
-
- if (ll_temac_check_status(regs, RSE_CFG_WR))
- return 0;
-
- return 1;
-}
-
-/*
- * Indirect read from ll_temac.
- *
- * http://www.xilinx.com/support/documentation/ip_documentation/xps_ll_temac.pdf
- * page 23, second paragraph, The use of CTL0 register or CTL1 register
- */
-int ll_temac_indirect_get(struct temac_reg *regs, u16 regn, u32* reg_data)
-{
- out_be32(®s->ctl, (regn & CTL_ADDR_MASK));
-
- if (ll_temac_check_status(regs, RSE_CFG_RR))
- return 0;
-
- *reg_data = in_be32(®s->lsw) & MLSW_MASK;
- return 1;
-}
-
-/* setting sub-controller and ll_temac to proper setting */
-static int ll_temac_setup_ctrl(struct eth_device *dev)
-{
- struct ll_temac *ll_temac = dev->priv;
- struct temac_reg *regs = (struct temac_reg *)dev->iobase;
-
- if (ll_temac->ctrlreset && ll_temac->ctrlreset(dev))
- return 0;
-
- if (ll_temac->ctrlinit && ll_temac->ctrlinit(dev))
- return 0;
-
- /* Promiscuous mode disable */
- if (!ll_temac_indirect_set(regs, TEMAC_AFM, 0))
- return 0;
-
- /* Enable Receiver - RX bit */
- if (!ll_temac_indirect_set(regs, TEMAC_RCW1, RCW1_RX))
- return 0;
-
- /* Enable Transmitter - TX bit */
- if (!ll_temac_indirect_set(regs, TEMAC_TC, TC_TX))
- return 0;
-
- return 1;
-}
-
-/*
- * Configure ll_temac based on negotiated speed and duplex
- * reported by PHY handling code
- */
-static int ll_temac_adjust_link(struct eth_device *dev)
-{
- unsigned int speed, emmc_reg;
- struct temac_reg *regs = (struct temac_reg *)dev->iobase;
- struct ll_temac *ll_temac = dev->priv;
- struct phy_device *phydev = ll_temac->phydev;
-
- if (!phydev->link) {
- printf("%s: No link.\n", phydev->dev->name);
- return 0;
- }
-
- switch (phydev->speed) {
- case 1000:
- speed = EMMC_LSPD_1000;
- break;
- case 100:
- speed = EMMC_LSPD_100;
- break;
- case 10:
- speed = EMMC_LSPD_10;
- break;
- default:
- return 0;
- }
-
- if (!ll_temac_indirect_get(regs, TEMAC_EMMC, &emmc_reg))
- return 0;
-
- emmc_reg &= ~EMMC_LSPD_MASK;
- emmc_reg |= speed;
-
- if (!ll_temac_indirect_set(regs, TEMAC_EMMC, emmc_reg))
- return 0;
-
- printf("%s: PHY is %s with %dbase%s, %s%s\n",
- dev->name, phydev->drv->name,
- phydev->speed, (phydev->port == PORT_TP) ? "T" : "X",
- (phydev->duplex) ? "FDX" : "HDX",
- (phydev->port == PORT_OTHER) ? ", unkown mode" : "");
-
- return 1;
-}
-
-/* setup mac addr */
-static int ll_temac_setup_mac_addr(struct eth_device *dev)
-{
- struct temac_reg *regs = (struct temac_reg *)dev->iobase;
- u32 val;
-
- /* set up unicast MAC address filter */
- val = ((dev->enetaddr[3] << 24) | (dev->enetaddr[2] << 16) |
- (dev->enetaddr[1] << 8) | (dev->enetaddr[0]));
- val &= UAW0_UADDR_MASK;
-
- if (!ll_temac_indirect_set(regs, TEMAC_UAW0, val))
- return 1;
-
- val = ((dev->enetaddr[5] << 8) | dev->enetaddr[4]);
- val &= UAW1_UADDR_MASK;
-
- if (!ll_temac_indirect_set(regs, TEMAC_UAW1, val))
- return 1;
-
- return 0;
-}
-
-/* halt device */
-static void ll_temac_halt(struct eth_device *dev)
-{
- struct ll_temac *ll_temac = dev->priv;
- struct temac_reg *regs = (struct temac_reg *)dev->iobase;
-
- /* Disable Receiver */
- ll_temac_indirect_set(regs, TEMAC_RCW0, 0);
-
- /* Disable Transmitter */
- ll_temac_indirect_set(regs, TEMAC_TC, 0);
-
- if (ll_temac->ctrlhalt)
- ll_temac->ctrlhalt(dev);
-
- /* Shut down the PHY, as needed */
- phy_shutdown(ll_temac->phydev);
-}
-
-static int ll_temac_init(struct eth_device *dev, bd_t *bis)
-{
- struct ll_temac *ll_temac = dev->priv;
- int ret;
-
- printf("%s: Xilinx XPS LocalLink Tri-Mode Ether MAC #%d at 0x%08lx.\n",
- dev->name, dev->index, dev->iobase);
-
- if (!ll_temac_setup_ctrl(dev))
- return -1;
-
- /* Start up the PHY */
- ret = phy_startup(ll_temac->phydev);
- if (ret) {
- printf("%s: Could not initialize PHY %s\n",
- dev->name, ll_temac->phydev->dev->name);
- return ret;
- }
-
- if (!ll_temac_adjust_link(dev)) {
- ll_temac_halt(dev);
- return -1;
- }
-
- /* If there's no link, fail */
- return ll_temac->phydev->link ? 0 : -1;
-}
-
-/*
- * Discover which PHY is attached to the device, and configure it
- * properly. If the PHY is not recognized, then return 0
- * (failure). Otherwise, return 1
- */
-static int ll_temac_phy_init(struct eth_device *dev)
-{
- struct ll_temac *ll_temac = dev->priv;
- struct phy_device *phydev;
- unsigned int supported = PHY_GBIT_FEATURES;
-
- /* interface - look at driver/net/tsec.c */
- phydev = phy_connect(ll_temac->bus, ll_temac->phyaddr,
- dev, PHY_INTERFACE_MODE_NONE);
-
- phydev->supported &= supported;
- phydev->advertising = phydev->supported;
-
- ll_temac->phydev = phydev;
-
- phy_config(phydev);
-
- return 1;
-}
-
-/*
- * Initialize a single ll_temac devices
- *
- * Returns the result of ll_temac phy interface that were initialized
- */
-int xilinx_ll_temac_initialize(bd_t *bis, struct ll_temac_info *devinf)
-{
- struct eth_device *dev;
- struct ll_temac *ll_temac;
-
- dev = calloc(1, sizeof(*dev));
- if (dev == NULL)
- return 0;
-
- ll_temac = calloc(1, sizeof(struct ll_temac));
- if (ll_temac == NULL) {
- free(dev);
- return 0;
- }
-
- /* use given name or generate its own unique name */
- if (devinf->devname) {
- strncpy(dev->name, devinf->devname, sizeof(dev->name));
- } else {
- snprintf(dev->name, sizeof(dev->name), "ll_tem.%lx",
- devinf->base_addr);
- devinf->devname = dev->name;
- }
-
- dev->iobase = devinf->base_addr;
-
- dev->priv = ll_temac;
- dev->init = ll_temac_init;
- dev->halt = ll_temac_halt;
- dev->write_hwaddr = ll_temac_setup_mac_addr;
-
- ll_temac->ctrladdr = devinf->ctrl_addr;
- if (devinf->flags & XILINX_LL_TEMAC_M_SDMA_PLB) {
- ll_temac_collect_xlplb_sdma_reg_addr(dev);
- ll_temac->in32 = ll_temac_xlplb_in32;
- ll_temac->out32 = ll_temac_xlplb_out32;
- ll_temac->ctrlinit = ll_temac_init_sdma;
- ll_temac->ctrlhalt = ll_temac_halt_sdma;
- ll_temac->ctrlreset = ll_temac_reset_sdma;
- dev->recv = ll_temac_recv_sdma;
- dev->send = ll_temac_send_sdma;
- } else {
- ll_temac->in32 = NULL;
- ll_temac->out32 = NULL;
- ll_temac->ctrlinit = NULL;
- ll_temac->ctrlhalt = NULL;
- ll_temac->ctrlreset = ll_temac_reset_fifo;
- dev->recv = ll_temac_recv_fifo;
- dev->send = ll_temac_send_fifo;
- }
-
- /* Link to specified MDIO bus */
- strncpy(ll_temac->mdio_busname, devinf->mdio_busname, MDIO_NAME_LEN);
- ll_temac->bus = miiphy_get_dev_by_name(ll_temac->mdio_busname);
-
- /* Looking for a valid PHY address if it is not yet set */
- if (devinf->phyaddr == -1)
- ll_temac->phyaddr = ll_temac_phy_addr(ll_temac->bus);
- else
- ll_temac->phyaddr = devinf->phyaddr;
-
- eth_register(dev);
-
- /* Try to initialize PHY here, and return */
- return ll_temac_phy_init(dev);
-}
-
-/*
- * Initialize a single ll_temac device with its mdio bus behind ll_temac
- *
- * Returns 1 if the ll_temac device and the mdio bus were initialized
- * otherwise returns 0
- */
-int xilinx_ll_temac_eth_init(bd_t *bis, unsigned long base_addr, int flags,
- unsigned long ctrl_addr)
-{
- struct ll_temac_info devinf;
- struct ll_temac_mdio_info mdioinf;
- int ret;
-
- /* prepare the internal driver informations */
- devinf.flags = flags;
- devinf.base_addr = base_addr;
- devinf.ctrl_addr = ctrl_addr;
- devinf.devname = NULL;
- devinf.phyaddr = -1;
-
- mdioinf.name = devinf.mdio_busname = NULL;
- mdioinf.regs = (struct temac_reg *)devinf.base_addr;
-
- ret = xilinx_ll_temac_mdio_initialize(bis, &mdioinf);
- if (ret >= 0) {
-
- /*
- * If there was no MDIO bus name then take over the
- * new automaticaly generated by the MDIO init code.
- */
- if (mdioinf.name != devinf.mdio_busname)
- devinf.mdio_busname = mdioinf.name;
-
- ret = xilinx_ll_temac_initialize(bis, &devinf);
- if (ret > 0)
- return 1;
-
- }
-
- return 0;
-}
+++ /dev/null
-/*
- * Xilinx xps_ll_temac ethernet driver for u-boot
- *
- * LL_TEMAC interface
- *
- * Copyright (C) 2011 - 2012 Stephan Linz <linz@li-pro.net>
- * Copyright (C) 2008 - 2011 Michal Simek <monstr@monstr.eu>
- * Copyright (C) 2008 - 2011 PetaLogix
- *
- * Based on Yoshio Kashiwagi kashiwagi@co-nss.co.jp driver
- * Copyright (C) 2008 Nissin Systems Co.,Ltd.
- * March 2008 created
- *
- * SPDX-License-Identifier: GPL-2.0+
- *
- * [0]: http://www.xilinx.com/support/documentation
- *
- * [S]: [0]/ip_documentation/xps_ll_temac.pdf
- * [A]: [0]/application_notes/xapp1041.pdf
- */
-#ifndef _XILINX_LL_TEMAC_
-#define _XILINX_LL_TEMAC_
-
-#include <config.h>
-#include <net.h>
-#include <phy.h>
-#include <miiphy.h>
-
-#include <asm/types.h>
-#include <asm/byteorder.h>
-
-#include "xilinx_ll_temac_sdma.h"
-
-#if !defined(__BIG_ENDIAN)
-# error LL_TEMAC requires big endianess
-#endif
-
-/*
- * TEMAC Memory and Register Definition
- *
- * [1]: [0]/ip_documentation/xps_ll_temac.pdf
- * page 19, Memory and Register Descriptions
- */
-struct temac_reg {
- /* direct soft registers (low part) */
- u32 raf; /* Reset and Address Filter */
- u32 tpf; /* Transmit Pause Frame */
- u32 ifgp; /* Transmit Inter Frame Gap Adjustment */
- u32 is; /* Interrupt Status */
- u32 ip; /* Interrupt Pending */
- u32 ie; /* Interrupt Enable */
- u32 ttag; /* Transmit VLAN Tag */
- u32 rtag; /* Receive VLAN Tag */
- /* hard TEMAC registers */
- u32 msw; /* Most Significant Word Data */
- u32 lsw; /* Least Significant Word Data */
- u32 ctl; /* Control */
- u32 rdy; /* Ready Status */
- /* direct soft registers (high part) */
- u32 uawl; /* Unicast Address Word Lower */
- u32 uawu; /* Unicast Address Word Upper */
- u32 tpid0; /* VLAN TPID Word 0 */
- u32 tpid1; /* VLAN TPID Word 1 */
-};
-
-/* Reset and Address Filter Registers (raf), [1] p25 */
-#define RAF_SR (1 << 13)
-#define RAF_EMFE (1 << 12)
-#define RAF_NFE (1 << 11)
-#define RAF_RVSTM_POS 9
-#define RAF_RVSTM_MASK (3 << RAF_RVSTM_POS)
-#define RAF_TVSTM_POS 7
-#define RAF_TVSTM_MASK (3 << RAF_TVSTM_POS)
-#define RAF_RVTM_POS 5
-#define RAF_RVTM_MASK (3 << RAF_RVTM_POS)
-#define RAF_TVTM_POS 3
-#define RAF_TVTM_MASK (3 << RAF_TVTM_POS)
-#define RAF_BCREJ (1 << 2)
-#define RAF_MCREJ (1 << 1)
-#define RAF_HTRST (1 << 0)
-
-/* Transmit Pause Frame Registers (tpf), [1] p28 */
-#define TPF_TPFV_POS 0
-#define TPF_TPFV_MASK (0xFFFF << TPF_TPFV_POS)
-
-/* Transmit Inter Frame Gap Adjustment Registers (ifgp), [1] p28 */
-#define IFGP_POS 0
-#define IFGP_MASK (0xFF << IFGP_POS)
-
-/* Interrupt Status, Pending, Enable Registers (is, ip, ie), [1] p29-33 */
-#define ISPE_MR (1 << 7)
-#define ISPE_RDL (1 << 6)
-#define ISPE_TC (1 << 5)
-#define ISPE_RFO (1 << 4)
-#define ISPE_RR (1 << 3)
-#define ISPE_RC (1 << 2)
-#define ISPE_AN (1 << 1)
-#define ISPE_HAC (1 << 0)
-
-/* Transmit, Receive VLAN Tag Registers (ttag, rtag), [1] p34-35 */
-#define TRTAG_TPID_POS 16
-#define TRTAG_TPID_MASK (0xFFFF << TRTAG_TPID_POS)
-#define TRTAG_PRIO_POS 13
-#define TRTAG_PRIO_MASK (7 << TRTAG_PRIO_POS)
-#define TRTAG_CFI (1 << 12)
-#define TRTAG_VID_POS 0
-#define TRTAG_VID_MASK (0xFFF << TRTAG_VID_POS)
-
-/* Most, Least Significant Word Data Register (msw, lsw), [1] p46 */
-#define MLSW_POS 0
-#define MLSW_MASK (~0UL << MLSW_POS)
-
-/* LSW Data Register for PHY addresses (lsw), [1] p66 */
-#define LSW_REGAD_POS 0
-#define LSW_REGAD_MASK (0x1F << LSW_REGAD_POS)
-#define LSW_PHYAD_POS 5
-#define LSW_PHYAD_MASK (0x1F << LSW_PHYAD_POS)
-
-/* LSW Data Register for PHY data (lsw), [1] p66 */
-#define LSW_REGDAT_POS 0
-#define LSW_REGDAT_MASK (0xFFFF << LSW_REGDAT_POS)
-
-/* Control Register (ctl), [1] p47 */
-#define CTL_WEN (1 << 15)
-#define CTL_ADDR_POS 0
-#define CTL_ADDR_MASK (0x3FF << CTL_ADDR_POS)
-
-/* Ready Status Register Ethernet (rdy), [1] p48 */
-#define RSE_HACS_RDY (1 << 14)
-#define RSE_CFG_WR (1 << 6)
-#define RSE_CFG_RR (1 << 5)
-#define RSE_AF_WR (1 << 4)
-#define RSE_AF_RR (1 << 3)
-#define RSE_MIIM_WR (1 << 2)
-#define RSE_MIIM_RR (1 << 1)
-#define RSE_FABR_RR (1 << 0)
-
-/* Unicast Address Word Lower, Upper Registers (uawl, uawu), [1] p35-36 */
-#define UAWL_UADDR_POS 0
-#define UAWL_UADDR_MASK (~0UL << UAWL_UADDR_POS)
-#define UAWU_UADDR_POS 0
-#define UAWU_UADDR_MASK (0xFFFF << UAWU_UADDR_POS)
-
-/* VLAN TPID Word 0, 1 Registers (tpid0, tpid1), [1] p37 */
-#define TPID0_V0_POS 0
-#define TPID0_V0_MASK (0xFFFF << TPID0_V0_POS)
-#define TPID0_V1_POS 16
-#define TPID0_V1_MASK (0xFFFF << TPID0_V1_POS)
-#define TPID1_V2_POS 0
-#define TPID1_V2_MASK (0xFFFF << TPID1_V2_POS)
-#define TPID1_V3_POS 16
-#define TPID1_V3_MASK (0xFFFF << TPID1_V3_POS)
-
-/*
- * TEMAC Indirectly Addressable Register Index Enumeration
- *
- * [0]: http://www.xilinx.com/support/documentation
- *
- * [1]: [0]/ip_documentation/xps_ll_temac.pdf
- * page 23, PLB Indirectly Addressable TEMAC Registers
- */
-enum temac_ctrl {
- TEMAC_RCW0 = 0x200,
- TEMAC_RCW1 = 0x240,
- TEMAC_TC = 0x280,
- TEMAC_FCC = 0x2C0,
- TEMAC_EMMC = 0x300,
- TEMAC_PHYC = 0x320,
- TEMAC_MC = 0x340,
- TEMAC_UAW0 = 0x380,
- TEMAC_UAW1 = 0x384,
- TEMAC_MAW0 = 0x388,
- TEMAC_MAW1 = 0x38C,
- TEMAC_AFM = 0x390,
- TEMAC_TIS = 0x3A0,
- TEMAC_TIE = 0x3A4,
- TEMAC_MIIMWD = 0x3B0,
- TEMAC_MIIMAI = 0x3B4
-};
-
-/* Receive Configuration Word 0, 1 Registers (RCW0, RCW1), [1] p50-51 */
-#define RCW0_PADDR_POS 0
-#define RCW0_PADDR_MASK (~0UL << RCW_PADDR_POS)
-#define RCW1_RST (1 << 31)
-#define RCW1_JUM (1 << 30)
-#define RCW1_FCS (1 << 29)
-#define RCW1_RX (1 << 28)
-#define RCW1_VLAN (1 << 27)
-#define RCW1_HD (1 << 26)
-#define RCW1_LT_DIS (1 << 25)
-#define RCW1_PADDR_POS 0
-#define RCW1_PADDR_MASK (0xFFFF << RCW_PADDR_POS)
-
-/* Transmit Configuration Registers (TC), [1] p52 */
-#define TC_RST (1 << 31)
-#define TC_JUM (1 << 30)
-#define TC_FCS (1 << 29)
-#define TC_TX (1 << 28)
-#define TC_VLAN (1 << 27)
-#define TC_HD (1 << 26)
-#define TC_IFG (1 << 25)
-
-/* Flow Control Configuration Registers (FCC), [1] p54 */
-#define FCC_FCTX (1 << 30)
-#define FCC_FCRX (1 << 29)
-
-/* Ethernet MAC Mode Configuration Registers (EMMC), [1] p54 */
-#define EMMC_LSPD_POS 30
-#define EMMC_LSPD_MASK (3 << EMMC_LSPD_POS)
-#define EMMC_LSPD_1000 (2 << EMMC_LSPD_POS)
-#define EMMC_LSPD_100 (1 << EMMC_LSPD_POS)
-#define EMMC_LSPD_10 0
-#define EMMC_RGMII (1 << 29)
-#define EMMC_SGMII (1 << 28)
-#define EMMC_GPCS (1 << 27)
-#define EMMC_HOST (1 << 26)
-#define EMMC_TX16 (1 << 25)
-#define EMMC_RX16 (1 << 24)
-
-/* RGMII/SGMII Configuration Registers (PHYC), [1] p56 */
-#define PHYC_SLSPD_POS 30
-#define PHYC_SLSPD_MASK (3 << EMMC_SLSPD_POS)
-#define PHYC_SLSPD_1000 (2 << EMMC_SLSPD_POS)
-#define PHYC_SLSPD_100 (1 << EMMC_SLSPD_POS)
-#define PHYC_SLSPD_10 0
-#define PHYC_RLSPD_POS 2
-#define PHYC_RLSPD_MASK (3 << EMMC_RLSPD_POS)
-#define PHYC_RLSPD_1000 (2 << EMMC_RLSPD_POS)
-#define PHYC_RLSPD_100 (1 << EMMC_RLSPD_POS)
-#define PHYC_RLSPD_10 0
-#define PHYC_RGMII_HD (1 << 1)
-#define PHYC_RGMII_LINK (1 << 0)
-
-/* Management Configuration Registers (MC), [1] p57 */
-#define MC_MDIOEN (1 << 6)
-#define MC_CLKDIV_POS 0
-#define MC_CLKDIV_MASK (0x3F << MC_CLKDIV_POS)
-
-/*
- * fHOSTCLK fMDC = fHOSTCLK
- * fMDC = ------------------- ---------> MC_CLKDIV = -------- - 1
- * (1 + MC_CLKDIV) * 2 2.5 MHz 5MHz
- */
-#define MC_CLKDIV(f, m) ((f / (2 * m)) - 1)
-#define MC_CLKDIV_25(f) MC_CLKDIV(f, 2500000)
-#define MC_CLKDIV_20(f) MC_CLKDIV(f, 2000000)
-#define MC_CLKDIV_15(f) MC_CLKDIV(f, 1500000)
-#define MC_CLKDIV_10(f) MC_CLKDIV(f, 1000000)
-
-/* Unicast Address Word 0, 1 Registers (UAW0, UAW1), [1] p58-59 */
-#define UAW0_UADDR_POS 0
-#define UAW0_UADDR_MASK (~0UL << UAW0_UADDR_POS)
-#define UAW1_UADDR_POS 0
-#define UAW1_UADDR_MASK (0xFFFF << UAW1_UADDR_POS)
-
-/* Multicast Address Word 0, 1 Registers (MAW0, MAW1), [1] p60 */
-#define MAW0_MADDR_POS 0
-#define MAW0_MADDR_MASK (~0UL << MAW0_MADDR_POS)
-#define MAW1_RNW (1 << 23)
-#define MAW1_MAIDX_POS 16
-#define MAW1_MAIDX_MASK (3 << MAW1_MAIDX_POS)
-#define MAW1_MADDR_POS 0
-#define MAW1_MADDR_MASK (0xFFFF << MAW1_MADDR_POS)
-
-/* Address Filter Mode Registers (AFM), [1] p63 */
-#define AFM_PM (1 << 31)
-
-/* Interrupt Status, Enable Registers (TIS, TIE), [1] p63-65 */
-#define TISE_CFG_W (1 << 6)
-#define TISE_CFG_R (1 << 5)
-#define TISE_AF_W (1 << 4)
-#define TISE_AF_R (1 << 3)
-#define TISE_MIIM_W (1 << 2)
-#define TISE_MIIM_R (1 << 1)
-#define TISE_FABR_R (1 << 0)
-
-/* MII Management Write Data Registers (MIIMWD), [1] p66 */
-#define MIIMWD_DATA_POS 0
-#define MIIMWD_DATA_MASK (0xFFFF << MIIMWD_DATA_POS)
-
-/* Ethernet interface ready status */
-int ll_temac_check_status(struct temac_reg *regs, u32 mask);
-
-/* Indirect write to ll_temac. */
-int ll_temac_indirect_set(struct temac_reg *regs, u16 regn, u32 reg_data);
-
-/* Indirect read from ll_temac. */
-int ll_temac_indirect_get(struct temac_reg *regs, u16 regn, u32* reg_data);
-
-struct ll_temac {
- phys_addr_t ctrladdr;
- phys_addr_t sdma_reg_addr[SDMA_CTRL_REGNUMS];
-
- unsigned (*in32)(phys_addr_t);
- void (*out32)(phys_addr_t, unsigned);
-
- int (*ctrlinit) (struct eth_device *);
- int (*ctrlhalt) (struct eth_device *);
- int (*ctrlreset) (struct eth_device *);
-
- int phyaddr;
- struct phy_device *phydev;
- struct mii_dev *bus;
- char mdio_busname[MDIO_NAME_LEN];
-};
-
-#endif /* _XILINX_LL_TEMAC_ */
+++ /dev/null
-/*
- * Xilinx xps_ll_temac ethernet driver for u-boot
- *
- * FIFO sub-controller
- *
- * Copyright (C) 2011 - 2012 Stephan Linz <linz@li-pro.net>
- * Copyright (C) 2008 - 2011 Michal Simek <monstr@monstr.eu>
- * Copyright (C) 2008 - 2011 PetaLogix
- *
- * Based on Yoshio Kashiwagi kashiwagi@co-nss.co.jp driver
- * Copyright (C) 2008 Nissin Systems Co.,Ltd.
- * March 2008 created
- *
- * CREDITS: tsec driver
- *
- * SPDX-License-Identifier: GPL-2.0+
- *
- * [0]: http://www.xilinx.com/support/documentation
- *
- * [F]: [0]/ip_documentation/xps_ll_fifo.pdf
- * [S]: [0]/ip_documentation/xps_ll_temac.pdf
- * [A]: [0]/application_notes/xapp1041.pdf
- */
-
-#include <config.h>
-#include <common.h>
-#include <net.h>
-
-#include <asm/types.h>
-#include <asm/io.h>
-
-#include "xilinx_ll_temac.h"
-#include "xilinx_ll_temac_fifo.h"
-
-int ll_temac_reset_fifo(struct eth_device *dev)
-{
- struct ll_temac *ll_temac = dev->priv;
- struct fifo_ctrl *fifo_ctrl = (void *)ll_temac->ctrladdr;
-
- out_be32(&fifo_ctrl->tdfr, LL_FIFO_TDFR_KEY);
- out_be32(&fifo_ctrl->rdfr, LL_FIFO_RDFR_KEY);
- out_be32(&fifo_ctrl->isr, ~0UL);
- out_be32(&fifo_ctrl->ier, 0);
-
- return 0;
-}
-
-int ll_temac_recv_fifo(struct eth_device *dev)
-{
- int i, length = 0;
- u32 *buf = (u32 *)net_rx_packets[0];
- struct ll_temac *ll_temac = dev->priv;
- struct fifo_ctrl *fifo_ctrl = (void *)ll_temac->ctrladdr;
-
- if (in_be32(&fifo_ctrl->isr) & LL_FIFO_ISR_RC) {
-
- /* reset isr */
- out_be32(&fifo_ctrl->isr, ~0UL);
-
- /*
- * MAYBE here:
- * while (fifo_ctrl->isr);
- */
-
- /*
- * The length is written (into RLR) by the XPS LL FIFO
- * when the packet is received across the RX LocalLink
- * interface and the receive data FIFO had enough
- * locations that all of the packet data has been saved.
- * The RLR should only be read when a receive packet is
- * available for processing (the receive occupancy is
- * not zero). Once the RLR is read, the receive packet
- * data should be read from the receive data FIFO before
- * the RLR is read again.
- *
- * [F] page 17, Receive Length Register (RLR)
- */
- if (in_be32(&fifo_ctrl->rdfo) & LL_FIFO_RDFO_MASK) {
- length = in_be32(&fifo_ctrl->rlf) & LL_FIFO_RLF_MASK;
- } else {
- printf("%s: Got error, no receive occupancy\n",
- __func__);
- return -1;
- }
-
- if (length > PKTSIZE_ALIGN) {
- printf("%s: Got error, receive package too big (%i)\n",
- __func__, length);
- ll_temac_reset_fifo(dev);
- return -1;
- }
-
- for (i = 0; i < length; i += 4)
- *buf++ = in_be32(&fifo_ctrl->rdfd);
-
- net_process_received_packet(net_rx_packets[0], length);
- }
-
- return 0;
-}
-
-int ll_temac_send_fifo(struct eth_device *dev, void *packet, int length)
-{
- int i;
- u32 *buf = (u32 *)packet;
- struct ll_temac *ll_temac = dev->priv;
- struct fifo_ctrl *fifo_ctrl = (void *)ll_temac->ctrladdr;
-
- if (length < LL_FIFO_TLF_MIN) {
- printf("%s: Got error, transmit package too small (%i)\n",
- __func__, length);
- return -1;
- }
-
- if (length > LL_FIFO_TLF_MAX) {
- printf("%s: Got error, transmit package too big (%i)\n",
- __func__, length);
- return -1;
- }
-
- for (i = 0; i < length; i += 4)
- out_be32(&fifo_ctrl->tdfd, *buf++);
-
- /*
- * Once the packet length is written to the TLR it is
- * automatically moved to the transmit data FIFO with
- * the packet data freeing up the TLR for another value.
- * The packet length must be written to the TLR after
- * the packet data is written to the transmit data FIFO.
- * It is not valid to write data for multiple packets
- * to the transmit data FIFO before writing the packet
- * length values.
- *
- * [F] page 17, Transmit Length Register (TLR)
- */
- out_be32(&fifo_ctrl->tlf, length);
-
- return 0;
-}
+++ /dev/null
-/*
- * Xilinx xps_ll_temac ethernet driver for u-boot
- *
- * FIFO sub-controller interface
- *
- * Copyright (C) 2011 - 2012 Stephan Linz <linz@li-pro.net>
- * Copyright (C) 2008 - 2011 Michal Simek <monstr@monstr.eu>
- * Copyright (C) 2008 - 2011 PetaLogix
- *
- * Based on Yoshio Kashiwagi kashiwagi@co-nss.co.jp driver
- * Copyright (C) 2008 Nissin Systems Co.,Ltd.
- * March 2008 created
- *
- * SPDX-License-Identifier: GPL-2.0+
- *
- * [0]: http://www.xilinx.com/support/documentation
- *
- * [S]: [0]/ip_documentation/xps_ll_temac.pdf
- * [A]: [0]/application_notes/xapp1041.pdf
- */
-#ifndef _XILINX_LL_TEMAC_FIFO_
-#define _XILINX_LL_TEMAC_FIFO_
-
-#include <net.h>
-
-#include <asm/types.h>
-#include <asm/byteorder.h>
-
-#if !defined(__BIG_ENDIAN)
-# error LL_TEMAC requires big endianess
-#endif
-
-/*
- * FIFO Register Definition
- *
- * Used for memory mapped access from and to (Rd/Td) the LocalLink (LL)
- * Tri-Mode Ether MAC (TEMAC) via the 2 kb full duplex FIFO Controller,
- * one for each.
- *
- * [1]: [0]/ip_documentation/xps_ll_fifo.pdf
- * page 10, Registers Definition
- */
-struct fifo_ctrl {
- u32 isr; /* Interrupt Status Register (RW) */
- u32 ier; /* Interrupt Enable Register (RW) */
- u32 tdfr; /* Transmit Data FIFO Reset (WO) */
- u32 tdfv; /* Transmit Data FIFO Vacancy (RO) */
- u32 tdfd; /* Transmit Data FIFO 32bit wide Data write port (WO) */
- u32 tlf; /* Transmit Length FIFO (WO) */
- u32 rdfr; /* Receive Data FIFO Reset (WO) */
- u32 rdfo; /* Receive Data FIFO Occupancy (RO) */
- u32 rdfd; /* Receive Data FIFO 32bit wide Data read port (RO) */
- u32 rlf; /* Receive Length FIFO (RO) */
- u32 llr; /* LocalLink Reset (WO) */
-};
-
-/* Interrupt Status Register (ISR), [1] p11 */
-#define LL_FIFO_ISR_RPURE (1 << 31) /* Receive Packet Underrun Read Err */
-#define LL_FIFO_ISR_RPORE (1 << 30) /* Receive Packet Overrun Read Err */
-#define LL_FIFO_ISR_RPUE (1 << 29) /* Receive Packet Underrun Error */
-#define LL_FIFO_ISR_TPOE (1 << 28) /* Transmit Packet Overrun Error */
-#define LL_FIFO_ISR_TC (1 << 27) /* Transmit Complete */
-#define LL_FIFO_ISR_RC (1 << 26) /* Receive Complete */
-#define LL_FIFO_ISR_TSE (1 << 25) /* Transmit Size Error */
-#define LL_FIFO_ISR_TRC (1 << 24) /* Transmit Reset Complete */
-#define LL_FIFO_ISR_RRC (1 << 23) /* Receive Reset Complete */
-
-/* Interrupt Enable Register (IER), [1] p12/p13 */
-#define LL_FIFO_IER_RPURE (1 << 31) /* Receive Packet Underrun Read Err */
-#define LL_FIFO_IER_RPORE (1 << 30) /* Receive Packet Overrun Read Err */
-#define LL_FIFO_IER_RPUE (1 << 29) /* Receive Packet Underrun Error */
-#define LL_FIFO_IER_TPOE (1 << 28) /* Transmit Packet Overrun Error */
-#define LL_FIFO_IER_TC (1 << 27) /* Transmit Complete */
-#define LL_FIFO_IER_RC (1 << 26) /* Receive Complete */
-#define LL_FIFO_IER_TSE (1 << 25) /* Transmit Size Error */
-#define LL_FIFO_IER_TRC (1 << 24) /* Transmit Reset Complete */
-#define LL_FIFO_IER_RRC (1 << 23) /* Receive Reset Complete */
-
-/* Transmit Data FIFO Reset (TDFR), [1] p13/p14 */
-#define LL_FIFO_TDFR_KEY 0x000000A5UL
-
-/* Transmit Data FIFO Vacancy (TDFV), [1] p14 */
-#define LL_FIFO_TDFV_POS 0
-#define LL_FIFO_TDFV_MASK (0x000001FFUL << LL_FIFO_TDFV_POS)
-
-/* Transmit Length FIFO (TLF), [1] p16/p17 */
-#define LL_FIFO_TLF_POS 0
-#define LL_FIFO_TLF_MASK (0x000007FFUL << LL_FIFO_TLF_POS)
-#define LL_FIFO_TLF_MIN ((4 * sizeof(u32)) & LL_FIFO_TLF_MASK)
-#define LL_FIFO_TLF_MAX ((510 * sizeof(u32)) & LL_FIFO_TLF_MASK)
-
-/* Receive Data FIFO Reset (RDFR), [1] p15 */
-#define LL_FIFO_RDFR_KEY 0x000000A5UL
-
-/* Receive Data FIFO Occupancy (RDFO), [1] p16 */
-#define LL_FIFO_RDFO_POS 0
-#define LL_FIFO_RDFO_MASK (0x000001FFUL << LL_FIFO_RDFO_POS)
-
-/* Receive Length FIFO (RLF), [1] p17/p18 */
-#define LL_FIFO_RLF_POS 0
-#define LL_FIFO_RLF_MASK (0x000007FFUL << LL_FIFO_RLF_POS)
-#define LL_FIFO_RLF_MIN ((4 * sizeof(uint32)) & LL_FIFO_RLF_MASK)
-#define LL_FIFO_RLF_MAX ((510 * sizeof(uint32)) & LL_FIFO_RLF_MASK)
-
-/* LocalLink Reset (LLR), [1] p18 */
-#define LL_FIFO_LLR_KEY 0x000000A5UL
-
-
-/* reset FIFO and IRQ, disable interrupts */
-int ll_temac_reset_fifo(struct eth_device *dev);
-
-/* receive buffered data from FIFO (polling ISR) */
-int ll_temac_recv_fifo(struct eth_device *dev);
-
-/* send buffered data to FIFO */
-int ll_temac_send_fifo(struct eth_device *dev, void *packet, int length);
-
-#endif /* _XILINX_LL_TEMAC_FIFO_ */
+++ /dev/null
-/*
- * Xilinx xps_ll_temac ethernet driver for u-boot
- *
- * MDIO bus access
- *
- * Copyright (C) 2011 - 2012 Stephan Linz <linz@li-pro.net>
- * Copyright (C) 2008 - 2011 Michal Simek <monstr@monstr.eu>
- * Copyright (C) 2008 - 2011 PetaLogix
- *
- * Based on Yoshio Kashiwagi kashiwagi@co-nss.co.jp driver
- * Copyright (C) 2008 Nissin Systems Co.,Ltd.
- * March 2008 created
- *
- * CREDITS: tsec driver
- *
- * SPDX-License-Identifier: GPL-2.0+
- *
- * [0]: http://www.xilinx.com/support/documentation
- *
- * [S]: [0]/ip_documentation/xps_ll_temac.pdf
- * [A]: [0]/application_notes/xapp1041.pdf
- */
-
-#include <config.h>
-#include <common.h>
-#include <miiphy.h>
-#include <phy.h>
-#include <malloc.h>
-#include <asm/io.h>
-
-#include "xilinx_ll_temac.h"
-#include "xilinx_ll_temac_mdio.h"
-
-#if !defined(CONFIG_MII)
-# error "LL_TEMAC requires MII -- missing CONFIG_MII"
-#endif
-
-#if !defined(CONFIG_PHYLIB)
-# error "LL_TEMAC requires PHYLIB -- missing CONFIG_PHYLIB"
-#endif
-
-/*
- * Prior to PHY access, the MDIO clock must be setup. This driver will set a
- * safe default that should work with PLB bus speeds of up to 150 MHz and keep
- * the MDIO clock below 2.5 MHz. If the user wishes faster access to the PHY
- * then the clock divisor can be set to a different value by setting the
- * correct bus speed value with CONFIG_XILINX_LL_TEMAC_CLK.
- */
-#if !defined(CONFIG_XILINX_LL_TEMAC_CLK)
-#define MDIO_CLOCK_DIV MC_CLKDIV_10(150000000)
-#else
-#define MDIO_CLOCK_DIV MC_CLKDIV_25(CONFIG_XILINX_LL_TEMAC_CLK)
-#endif
-
-static int ll_temac_mdio_setup(struct mii_dev *bus)
-{
- struct temac_reg *regs = (struct temac_reg *)bus->priv;
-
- /* setup MDIO clock */
- ll_temac_indirect_set(regs, TEMAC_MC,
- MC_MDIOEN | (MDIO_CLOCK_DIV & MC_CLKDIV_MASK));
-
- return 0;
-}
-
-/*
- * Indirect MII PHY read via ll_temac.
- *
- * http://www.xilinx.com/support/documentation/ip_documentation/xps_ll_temac.pdf
- * page 67, Using the MII Management to Access PHY Registers
- */
-int ll_temac_local_mdio_read(struct temac_reg *regs, int addr, int devad,
- int regnum)
-{
- out_be32(®s->lsw,
- ((addr << LSW_PHYAD_POS) & LSW_PHYAD_MASK) |
- (regnum & LSW_REGAD_MASK));
- out_be32(®s->ctl, TEMAC_MIIMAI);
-
- ll_temac_check_status(regs, RSE_MIIM_RR);
-
- return in_be32(®s->lsw) & LSW_REGDAT_MASK;
-}
-
-/*
- * Indirect MII PHY write via ll_temac.
- *
- * http://www.xilinx.com/support/documentation/ip_documentation/xps_ll_temac.pdf
- * page 67, Using the MII Management to Access PHY Registers
- */
-void ll_temac_local_mdio_write(struct temac_reg *regs, int addr, int devad,
- int regnum, u16 value)
-{
- out_be32(®s->lsw, (value & LSW_REGDAT_MASK));
- out_be32(®s->ctl, CTL_WEN | TEMAC_MIIMWD);
-
- out_be32(®s->lsw,
- ((addr << LSW_PHYAD_POS) & LSW_PHYAD_MASK) |
- (regnum & LSW_REGAD_MASK));
- out_be32(®s->ctl, CTL_WEN | TEMAC_MIIMAI);
-
- ll_temac_check_status(regs, RSE_MIIM_WR);
-}
-
-int ll_temac_phy_read(struct mii_dev *bus, int addr, int devad, int regnum)
-{
- struct temac_reg *regs = (struct temac_reg *)bus->priv;
-
- return ll_temac_local_mdio_read(regs, addr, devad, regnum);
-}
-
-int ll_temac_phy_write(struct mii_dev *bus, int addr, int devad, int regnum,
- u16 value)
-{
- struct temac_reg *regs = (struct temac_reg *)bus->priv;
-
- ll_temac_local_mdio_write(regs, addr, devad, regnum, value);
-
- return 0;
-}
-
-/*
- * Use MII register 1 (MII status register) to detect PHY
- *
- * A Mask used to verify certain PHY features (register content)
- * in the PHY detection register:
- * Auto-negotiation support, 10Mbps half/full duplex support
- */
-#define PHY_DETECT_REG MII_BMSR
-#define PHY_DETECT_MASK (BMSR_10FULL | BMSR_10HALF | BMSR_ANEGCAPABLE)
-
-/* Looking for a valid PHY address */
-int ll_temac_phy_addr(struct mii_dev *bus)
-{
- struct temac_reg *regs = (struct temac_reg *)bus->priv;
- unsigned short val;
- unsigned int phy;
-
- for (phy = PHY_MAX_ADDR; phy >= 0; phy--) {
- val = ll_temac_local_mdio_read(regs, phy, 0, PHY_DETECT_REG);
- if ((val != 0xFFFF) &&
- ((val & PHY_DETECT_MASK) == PHY_DETECT_MASK)) {
- /* Found a valid PHY address */
- return phy;
- }
- }
-
- return -1;
-}
-
-int xilinx_ll_temac_mdio_initialize(bd_t *bis, struct ll_temac_mdio_info *info)
-{
- struct mii_dev *bus = mdio_alloc();
-
- if (!bus) {
- printf("Failed to allocate LL_TEMAC MDIO bus: %s\n",
- info->name);
- return -1;
- }
-
- bus->read = ll_temac_phy_read;
- bus->write = ll_temac_phy_write;
- bus->reset = NULL;
-
- /* use given name or generate its own unique name */
- if (info->name) {
- strncpy(bus->name, info->name, MDIO_NAME_LEN);
- } else {
- snprintf(bus->name, MDIO_NAME_LEN, "lltemii.%p", info->regs);
- info->name = bus->name;
- }
-
- bus->priv = info->regs;
-
- ll_temac_mdio_setup(bus);
- return mdio_register(bus);
-}
+++ /dev/null
-/*
- * Xilinx xps_ll_temac ethernet driver for u-boot
- *
- * MDIO bus access interface
- *
- * Copyright (C) 2011 - 2012 Stephan Linz <linz@li-pro.net>
- * Copyright (C) 2008 - 2011 Michal Simek <monstr@monstr.eu>
- * Copyright (C) 2008 - 2011 PetaLogix
- *
- * Based on Yoshio Kashiwagi kashiwagi@co-nss.co.jp driver
- * Copyright (C) 2008 Nissin Systems Co.,Ltd.
- * March 2008 created
- *
- * SPDX-License-Identifier: GPL-2.0+
- *
- * [0]: http://www.xilinx.com/support/documentation
- *
- * [S]: [0]/ip_documentation/xps_ll_temac.pdf
- * [A]: [0]/application_notes/xapp1041.pdf
- */
-#ifndef _XILINX_LL_TEMAC_MDIO_
-#define _XILINX_LL_TEMAC_MDIO_
-
-#include <net.h>
-#include <miiphy.h>
-
-#include <asm/types.h>
-#include <asm/byteorder.h>
-
-#include "xilinx_ll_temac.h"
-
-int ll_temac_local_mdio_read(struct temac_reg *regs, int addr, int devad,
- int regnum);
-void ll_temac_local_mdio_write(struct temac_reg *regs, int addr, int devad,
- int regnum, u16 value);
-
-int ll_temac_phy_read(struct mii_dev *bus, int addr, int devad, int regnum);
-int ll_temac_phy_write(struct mii_dev *bus, int addr, int devad, int regnum,
- u16 value);
-
-int ll_temac_phy_addr(struct mii_dev *bus);
-
-struct ll_temac_mdio_info {
- struct temac_reg *regs;
- char *name;
-};
-
-int xilinx_ll_temac_mdio_initialize(bd_t *bis, struct ll_temac_mdio_info *info);
-
-#endif /* _XILINX_LL_TEMAC_MDIO_ */
+++ /dev/null
-/*
- * Xilinx xps_ll_temac ethernet driver for u-boot
- *
- * SDMA sub-controller
- *
- * Copyright (C) 2011 - 2012 Stephan Linz <linz@li-pro.net>
- * Copyright (C) 2008 - 2011 Michal Simek <monstr@monstr.eu>
- * Copyright (C) 2008 - 2011 PetaLogix
- *
- * Based on Yoshio Kashiwagi kashiwagi@co-nss.co.jp driver
- * Copyright (C) 2008 Nissin Systems Co.,Ltd.
- * March 2008 created
- *
- * CREDITS: tsec driver
- *
- * SPDX-License-Identifier: GPL-2.0+
- *
- * [0]: http://www.xilinx.com/support/documentation
- *
- * [M]: [0]/ip_documentation/mpmc.pdf
- * [S]: [0]/ip_documentation/xps_ll_temac.pdf
- * [A]: [0]/application_notes/xapp1041.pdf
- */
-
-#include <config.h>
-#include <common.h>
-#include <net.h>
-
-#include <asm/types.h>
-#include <asm/io.h>
-
-#include "xilinx_ll_temac.h"
-#include "xilinx_ll_temac_sdma.h"
-
-#define TX_BUF_CNT 2
-
-static unsigned int rx_idx; /* index of the current RX buffer */
-static unsigned int tx_idx; /* index of the current TX buffer */
-
-struct rtx_cdmac_bd {
- struct cdmac_bd rx[PKTBUFSRX];
- struct cdmac_bd tx[TX_BUF_CNT];
-};
-
-/*
- * DMA Buffer Descriptor alignment
- *
- * If the address contained in the Next Descriptor Pointer register is not
- * 8-word aligned or reaches beyond the range of available memory, the SDMA
- * halts processing and sets the CDMAC_BD_STCTRL_ERROR bit in the respective
- * status register (tx_chnl_sts or rx_chnl_sts).
- *
- * [1]: [0]/ip_documentation/mpmc.pdf
- * page 161, Next Descriptor Pointer
- */
-static struct rtx_cdmac_bd cdmac_bd __aligned(32);
-
-/* Xilinx Processor Local Bus (PLB) in/out accessors */
-inline unsigned ll_temac_xlplb_in32(phys_addr_t addr)
-{
- return in_be32((void *)addr);
-}
-inline void ll_temac_xlplb_out32(phys_addr_t addr, unsigned value)
-{
- out_be32((void *)addr, value);
-}
-
-/* collect all register addresses for Xilinx PLB in/out accessors */
-void ll_temac_collect_xlplb_sdma_reg_addr(struct eth_device *dev)
-{
- struct ll_temac *ll_temac = dev->priv;
- struct sdma_ctrl *sdma_ctrl = (void *)ll_temac->ctrladdr;
- phys_addr_t *ra = ll_temac->sdma_reg_addr;
-
- ra[TX_NXTDESC_PTR] = (phys_addr_t)&sdma_ctrl->tx_nxtdesc_ptr;
- ra[TX_CURBUF_ADDR] = (phys_addr_t)&sdma_ctrl->tx_curbuf_addr;
- ra[TX_CURBUF_LENGTH] = (phys_addr_t)&sdma_ctrl->tx_curbuf_length;
- ra[TX_CURDESC_PTR] = (phys_addr_t)&sdma_ctrl->tx_curdesc_ptr;
- ra[TX_TAILDESC_PTR] = (phys_addr_t)&sdma_ctrl->tx_taildesc_ptr;
- ra[TX_CHNL_CTRL] = (phys_addr_t)&sdma_ctrl->tx_chnl_ctrl;
- ra[TX_IRQ_REG] = (phys_addr_t)&sdma_ctrl->tx_irq_reg;
- ra[TX_CHNL_STS] = (phys_addr_t)&sdma_ctrl->tx_chnl_sts;
- ra[RX_NXTDESC_PTR] = (phys_addr_t)&sdma_ctrl->rx_nxtdesc_ptr;
- ra[RX_CURBUF_ADDR] = (phys_addr_t)&sdma_ctrl->rx_curbuf_addr;
- ra[RX_CURBUF_LENGTH] = (phys_addr_t)&sdma_ctrl->rx_curbuf_length;
- ra[RX_CURDESC_PTR] = (phys_addr_t)&sdma_ctrl->rx_curdesc_ptr;
- ra[RX_TAILDESC_PTR] = (phys_addr_t)&sdma_ctrl->rx_taildesc_ptr;
- ra[RX_CHNL_CTRL] = (phys_addr_t)&sdma_ctrl->rx_chnl_ctrl;
- ra[RX_IRQ_REG] = (phys_addr_t)&sdma_ctrl->rx_irq_reg;
- ra[RX_CHNL_STS] = (phys_addr_t)&sdma_ctrl->rx_chnl_sts;
- ra[DMA_CONTROL_REG] = (phys_addr_t)&sdma_ctrl->dma_control_reg;
-}
-
-/* Check for TX and RX channel errors. */
-static inline int ll_temac_sdma_error(struct eth_device *dev)
-{
- int err;
- struct ll_temac *ll_temac = dev->priv;
- phys_addr_t *ra = ll_temac->sdma_reg_addr;
-
- err = ll_temac->in32(ra[TX_CHNL_STS]) & CHNL_STS_ERROR;
- err |= ll_temac->in32(ra[RX_CHNL_STS]) & CHNL_STS_ERROR;
-
- return err;
-}
-
-int ll_temac_init_sdma(struct eth_device *dev)
-{
- struct ll_temac *ll_temac = dev->priv;
- struct cdmac_bd *rx_dp;
- struct cdmac_bd *tx_dp;
- phys_addr_t *ra = ll_temac->sdma_reg_addr;
- int i;
-
- printf("%s: SDMA: %d Rx buffers, %d Tx buffers\n",
- dev->name, PKTBUFSRX, TX_BUF_CNT);
-
- /* Initialize the Rx Buffer descriptors */
- for (i = 0; i < PKTBUFSRX; i++) {
- rx_dp = &cdmac_bd.rx[i];
- memset(rx_dp, 0, sizeof(*rx_dp));
- rx_dp->next_p = rx_dp;
- rx_dp->buf_len = PKTSIZE_ALIGN;
- rx_dp->phys_buf_p = (u8 *)net_rx_packets[i];
- flush_cache((u32)rx_dp->phys_buf_p, PKTSIZE_ALIGN);
- }
- flush_cache((u32)cdmac_bd.rx, sizeof(cdmac_bd.rx));
-
- /* Initialize the TX Buffer Descriptors */
- for (i = 0; i < TX_BUF_CNT; i++) {
- tx_dp = &cdmac_bd.tx[i];
- memset(tx_dp, 0, sizeof(*tx_dp));
- tx_dp->next_p = tx_dp;
- }
- flush_cache((u32)cdmac_bd.tx, sizeof(cdmac_bd.tx));
-
- /* Reset index counter to the Rx and Tx Buffer descriptors */
- rx_idx = tx_idx = 0;
-
- /* initial Rx DMA start by writing to respective TAILDESC_PTR */
- ll_temac->out32(ra[RX_CURDESC_PTR], (int)&cdmac_bd.rx[rx_idx]);
- ll_temac->out32(ra[RX_TAILDESC_PTR], (int)&cdmac_bd.rx[rx_idx]);
-
- return 0;
-}
-
-int ll_temac_halt_sdma(struct eth_device *dev)
-{
- unsigned timeout = 50; /* 1usec * 50 = 50usec */
- struct ll_temac *ll_temac = dev->priv;
- phys_addr_t *ra = ll_temac->sdma_reg_addr;
-
- /*
- * Soft reset the DMA
- *
- * Quote from MPMC documentation: Writing a 1 to this field
- * forces the DMA engine to shutdown and reset itself. After
- * setting this bit, software must poll it until the bit is
- * cleared by the DMA. This indicates that the reset process
- * is done and the pipeline has been flushed.
- */
- ll_temac->out32(ra[DMA_CONTROL_REG], DMA_CONTROL_RESET);
- while (timeout && (ll_temac->in32(ra[DMA_CONTROL_REG])
- & DMA_CONTROL_RESET)) {
- timeout--;
- udelay(1);
- }
-
- if (!timeout) {
- printf("%s: Timeout\n", __func__);
- return -1;
- }
-
- return 0;
-}
-
-int ll_temac_reset_sdma(struct eth_device *dev)
-{
- u32 r;
- struct ll_temac *ll_temac = dev->priv;
- phys_addr_t *ra = ll_temac->sdma_reg_addr;
-
- /* Soft reset the DMA. */
- if (ll_temac_halt_sdma(dev))
- return -1;
-
- /* Now clear the interrupts. */
- r = ll_temac->in32(ra[TX_CHNL_CTRL]);
- r &= ~CHNL_CTRL_IRQ_MASK;
- ll_temac->out32(ra[TX_CHNL_CTRL], r);
-
- r = ll_temac->in32(ra[RX_CHNL_CTRL]);
- r &= ~CHNL_CTRL_IRQ_MASK;
- ll_temac->out32(ra[RX_CHNL_CTRL], r);
-
- /* Now ACK pending IRQs. */
- ll_temac->out32(ra[TX_IRQ_REG], IRQ_REG_IRQ_MASK);
- ll_temac->out32(ra[RX_IRQ_REG], IRQ_REG_IRQ_MASK);
-
- /* Set tail-ptr mode, disable errors for both channels. */
- ll_temac->out32(ra[DMA_CONTROL_REG],
- /* Enable use of tail pointer register */
- DMA_CONTROL_TPE |
- /* Disable error when 2 or 4 bit coalesce cnt overfl */
- DMA_CONTROL_RXOCEID |
- /* Disable error when 2 or 4 bit coalesce cnt overfl */
- DMA_CONTROL_TXOCEID);
-
- return 0;
-}
-
-int ll_temac_recv_sdma(struct eth_device *dev)
-{
- int length, pb_idx;
- struct cdmac_bd *rx_dp = &cdmac_bd.rx[rx_idx];
- struct ll_temac *ll_temac = dev->priv;
- phys_addr_t *ra = ll_temac->sdma_reg_addr;
-
- if (ll_temac_sdma_error(dev)) {
-
- if (ll_temac_reset_sdma(dev))
- return -1;
-
- ll_temac_init_sdma(dev);
- }
-
- flush_cache((u32)rx_dp, sizeof(*rx_dp));
-
- if (!(rx_dp->sca.stctrl & CDMAC_BD_STCTRL_COMPLETED))
- return 0;
-
- if (rx_dp->sca.stctrl & (CDMAC_BD_STCTRL_SOP | CDMAC_BD_STCTRL_EOP)) {
- pb_idx = rx_idx;
- length = rx_dp->sca.app[4] & CDMAC_BD_APP4_RXBYTECNT_MASK;
- } else {
- pb_idx = -1;
- length = 0;
- printf("%s: Got part of package, unsupported (%x)\n",
- __func__, rx_dp->sca.stctrl);
- }
-
- /* flip the buffer */
- flush_cache((u32)rx_dp->phys_buf_p, length);
-
- /* reset the current descriptor */
- rx_dp->sca.stctrl = 0;
- rx_dp->sca.app[4] = 0;
- flush_cache((u32)rx_dp, sizeof(*rx_dp));
-
- /* Find next empty buffer descriptor, preparation for next iteration */
- rx_idx = (rx_idx + 1) % PKTBUFSRX;
- rx_dp = &cdmac_bd.rx[rx_idx];
- flush_cache((u32)rx_dp, sizeof(*rx_dp));
-
- /* DMA start by writing to respective TAILDESC_PTR */
- ll_temac->out32(ra[RX_CURDESC_PTR], (int)&cdmac_bd.rx[rx_idx]);
- ll_temac->out32(ra[RX_TAILDESC_PTR], (int)&cdmac_bd.rx[rx_idx]);
-
- if (length > 0 && pb_idx != -1)
- net_process_received_packet(net_rx_packets[pb_idx], length);
-
- return 0;
-}
-
-int ll_temac_send_sdma(struct eth_device *dev, void *packet, int length)
-{
- unsigned timeout = 50; /* 1usec * 50 = 50usec */
- struct cdmac_bd *tx_dp = &cdmac_bd.tx[tx_idx];
- struct ll_temac *ll_temac = dev->priv;
- phys_addr_t *ra = ll_temac->sdma_reg_addr;
-
- if (ll_temac_sdma_error(dev)) {
-
- if (ll_temac_reset_sdma(dev))
- return -1;
-
- ll_temac_init_sdma(dev);
- }
-
- tx_dp->phys_buf_p = (u8 *)packet;
- tx_dp->buf_len = length;
- tx_dp->sca.stctrl = CDMAC_BD_STCTRL_SOP | CDMAC_BD_STCTRL_EOP |
- CDMAC_BD_STCTRL_STOP_ON_END;
-
- flush_cache((u32)packet, length);
- flush_cache((u32)tx_dp, sizeof(*tx_dp));
-
- /* DMA start by writing to respective TAILDESC_PTR */
- ll_temac->out32(ra[TX_CURDESC_PTR], (int)tx_dp);
- ll_temac->out32(ra[TX_TAILDESC_PTR], (int)tx_dp);
-
- /* Find next empty buffer descriptor, preparation for next iteration */
- tx_idx = (tx_idx + 1) % TX_BUF_CNT;
- tx_dp = &cdmac_bd.tx[tx_idx];
-
- do {
- flush_cache((u32)tx_dp, sizeof(*tx_dp));
- udelay(1);
- } while (timeout-- && !(tx_dp->sca.stctrl & CDMAC_BD_STCTRL_COMPLETED));
-
- if (!timeout) {
- printf("%s: Timeout\n", __func__);
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-/*
- * Xilinx xps_ll_temac ethernet driver for u-boot
- *
- * SDMA sub-controller interface
- *
- * Copyright (C) 2011 - 2012 Stephan Linz <linz@li-pro.net>
- * Copyright (C) 2008 - 2011 Michal Simek <monstr@monstr.eu>
- * Copyright (C) 2008 - 2011 PetaLogix
- *
- * Based on Yoshio Kashiwagi kashiwagi@co-nss.co.jp driver
- * Copyright (C) 2008 Nissin Systems Co.,Ltd.
- * March 2008 created
- *
- * SPDX-License-Identifier: GPL-2.0+
- *
- * [0]: http://www.xilinx.com/support/documentation
- *
- * [S]: [0]/ip_documentation/xps_ll_temac.pdf
- * [A]: [0]/application_notes/xapp1041.pdf
- */
-#ifndef _XILINX_LL_TEMAC_SDMA_
-#define _XILINX_LL_TEMAC_SDMA_
-
-#include <net.h>
-
-#include <asm/types.h>
-#include <asm/byteorder.h>
-
-#include <linux/compiler.h>
-
-#if !defined(__BIG_ENDIAN)
-# error LL_TEMAC requires big endianess
-#endif
-
-/*
- * DMA Buffer Descriptor for CDMAC
- *
- * Used for data connection from and to (Rx/Tx) the LocalLink (LL) TEMAC via
- * the Communications Direct Memory Access Controller (CDMAC) -- one for each.
- *
- * overview:
- * ftp://ftp.xilinx.com/pub/documentation/misc/mpmc_getting_started.pdf
- *
- * [1]: [0]/ip_documentation/mpmc.pdf
- * page 140, DMA Operation Descriptors
- *
- * [2]: [0]/user_guides/ug200.pdf
- * page 229, DMA Controller -- Descriptor Format
- *
- * [3]: [0]/ip_documentation/xps_ll_temac.pdf
- * page 72, Transmit LocalLink Frame Format
- * page 73, Receive LocalLink Frame Format
- */
-struct cdmac_bd {
- struct cdmac_bd *next_p; /* Next Descriptor Pointer */
- u8 *phys_buf_p; /* Buffer Address */
- u32 buf_len; /* Buffer Length */
- union {
- u8 stctrl; /* Status/Control the DMA transfer */
- u32 app[5]; /* application specific data */
- } __packed __aligned(1) sca;
-};
-
-/* CDMAC Descriptor Status and Control (stctrl), [1] p140, [2] p230 */
-#define CDMAC_BD_STCTRL_ERROR (1 << 7)
-#define CDMAC_BD_STCTRL_IRQ_ON_END (1 << 6)
-#define CDMAC_BD_STCTRL_STOP_ON_END (1 << 5)
-#define CDMAC_BD_STCTRL_COMPLETED (1 << 4)
-#define CDMAC_BD_STCTRL_SOP (1 << 3)
-#define CDMAC_BD_STCTRL_EOP (1 << 2)
-#define CDMAC_BD_STCTRL_DMACHBUSY (1 << 1)
-
-/* CDMAC Descriptor APP0: Transmit LocalLink Footer Word 3, [3] p72 */
-#define CDMAC_BD_APP0_TXCSCNTRL (1 << 0)
-
-/* CDMAC Descriptor APP1: Transmit LocalLink Footer Word 4, [3] p73 */
-#define CDMAC_BD_APP1_TXCSBEGIN_POS 16
-#define CDMAC_BD_APP1_TXCSBEGIN_MASK (0xFFFF << CDMAC_BD_APP1_TXCSBEGIN_POS)
-#define CDMAC_BD_APP1_TXCSINSERT_POS 0
-#define CDMAC_BD_APP1_TXCSINSERT_MASK (0xFFFF << CDMAC_BD_APP1_TXCSINSERT_POS)
-
-/* CDMAC Descriptor APP2: Transmit LocalLink Footer Word 5, [3] p73 */
-#define CDMAC_BD_APP2_TXCSINIT_POS 0
-#define CDMAC_BD_APP2_TXCSINIT_MASK (0xFFFF << CDMAC_BD_APP2_TXCSINIT_POS)
-
-/* CDMAC Descriptor APP0: Receive LocalLink Footer Word 3, [3] p73 */
-#define CDMAC_BD_APP0_MADDRU_POS 0
-#define CDMAC_BD_APP0_MADDRU_MASK (0xFFFF << CDMAC_BD_APP0_MADDRU_POS)
-
-/* CDMAC Descriptor APP1: Receive LocalLink Footer Word 4, [3] p74 */
-#define CDMAC_BD_APP1_MADDRL_POS 0
-#define CDMAC_BD_APP1_MADDRL_MASK (~0UL << CDMAC_BD_APP1_MADDRL_POS)
-
-/* CDMAC Descriptor APP2: Receive LocalLink Footer Word 5, [3] p74 */
-#define CDMAC_BD_APP2_BCAST_FRAME (1 << 2)
-#define CDMAC_BD_APP2_IPC_MCAST_FRAME (1 << 1)
-#define CDMAC_BD_APP2_MAC_MCAST_FRAME (1 << 0)
-
-/* CDMAC Descriptor APP3: Receive LocalLink Footer Word 6, [3] p74 */
-#define CDMAC_BD_APP3_TLTPID_POS 16
-#define CDMAC_BD_APP3_TLTPID_MASK (0xFFFF << CDMAC_BD_APP3_TLTPID_POS)
-#define CDMAC_BD_APP3_RXCSRAW_POS 0
-#define CDMAC_BD_APP3_RXCSRAW_MASK (0xFFFF << CDMAC_BD_APP3_RXCSRAW_POS)
-
-/* CDMAC Descriptor APP4: Receive LocalLink Footer Word 7, [3] p74 */
-#define CDMAC_BD_APP4_VLANTAG_POS 16
-#define CDMAC_BD_APP4_VLANTAG_MASK (0xFFFF << CDMAC_BD_APP4_VLANTAG_POS)
-#define CDMAC_BD_APP4_RXBYTECNT_POS 0
-#define CDMAC_BD_APP4_RXBYTECNT_MASK (0x3FFF << CDMAC_BD_APP4_RXBYTECNT_POS)
-
-/*
- * SDMA Register Definition
- *
- * [0]: http://www.xilinx.com/support/documentation
- *
- * [1]: [0]/ip_documentation/mpmc.pdf
- * page 54, SDMA Register Summary
- * page 160, SDMA Registers
- *
- * [2]: [0]/user_guides/ug200.pdf
- * page 244, DMA Controller -- Programming Interface and Registers
- */
-#define SDMA_CTRL_REGTYPE u32
-#define SDMA_CTRL_REGSIZE sizeof(SDMA_CTRL_REGTYPE)
-struct sdma_ctrl {
- /* Transmit Registers */
- SDMA_CTRL_REGTYPE tx_nxtdesc_ptr; /* TX Next Description Pointer */
- SDMA_CTRL_REGTYPE tx_curbuf_addr; /* TX Current Buffer Address */
- SDMA_CTRL_REGTYPE tx_curbuf_length; /* TX Current Buffer Length */
- SDMA_CTRL_REGTYPE tx_curdesc_ptr; /* TX Current Descriptor Pointer */
- SDMA_CTRL_REGTYPE tx_taildesc_ptr; /* TX Tail Descriptor Pointer */
- SDMA_CTRL_REGTYPE tx_chnl_ctrl; /* TX Channel Control */
- SDMA_CTRL_REGTYPE tx_irq_reg; /* TX Interrupt Register */
- SDMA_CTRL_REGTYPE tx_chnl_sts; /* TX Status Register */
- /* Receive Registers */
- SDMA_CTRL_REGTYPE rx_nxtdesc_ptr; /* RX Next Descriptor Pointer */
- SDMA_CTRL_REGTYPE rx_curbuf_addr; /* RX Current Buffer Address */
- SDMA_CTRL_REGTYPE rx_curbuf_length; /* RX Current Buffer Length */
- SDMA_CTRL_REGTYPE rx_curdesc_ptr; /* RX Current Descriptor Pointer */
- SDMA_CTRL_REGTYPE rx_taildesc_ptr; /* RX Tail Descriptor Pointer */
- SDMA_CTRL_REGTYPE rx_chnl_ctrl; /* RX Channel Control */
- SDMA_CTRL_REGTYPE rx_irq_reg; /* RX Interrupt Register */
- SDMA_CTRL_REGTYPE rx_chnl_sts; /* RX Status Register */
- /* Control Registers */
- SDMA_CTRL_REGTYPE dma_control_reg; /* DMA Control Register */
-};
-
-#define SDMA_CTRL_REGNUMS sizeof(struct sdma_ctrl)/SDMA_CTRL_REGSIZE
-
-/*
- * DMAC Register Index Enumeration
- *
- * [2]: http://www.xilinx.com/support/documentation/user_guides/ug200.pdf
- * page 244, DMA Controller -- Programming Interface and Registers
- */
-enum dmac_ctrl {
- /* Transmit Registers */
- TX_NXTDESC_PTR = 0, /* TX Next Description Pointer */
- TX_CURBUF_ADDR, /* TX Current Buffer Address */
- TX_CURBUF_LENGTH, /* TX Current Buffer Length */
- TX_CURDESC_PTR, /* TX Current Descriptor Pointer */
- TX_TAILDESC_PTR, /* TX Tail Descriptor Pointer */
- TX_CHNL_CTRL, /* TX Channel Control */
- TX_IRQ_REG, /* TX Interrupt Register */
- TX_CHNL_STS, /* TX Status Register */
- /* Receive Registers */
- RX_NXTDESC_PTR, /* RX Next Descriptor Pointer */
- RX_CURBUF_ADDR, /* RX Current Buffer Address */
- RX_CURBUF_LENGTH, /* RX Current Buffer Length */
- RX_CURDESC_PTR, /* RX Current Descriptor Pointer */
- RX_TAILDESC_PTR, /* RX Tail Descriptor Pointer */
- RX_CHNL_CTRL, /* RX Channel Control */
- RX_IRQ_REG, /* RX Interrupt Register */
- RX_CHNL_STS, /* RX Status Register */
- /* Control Registers */
- DMA_CONTROL_REG /* DMA Control Register */
-};
-
-/* Rx/Tx Channel Control Register (*_chnl_ctrl), [1] p163, [2] p246/p252 */
-#define CHNL_CTRL_ITO_POS 24
-#define CHNL_CTRL_ITO_MASK (0xFF << CHNL_CTRL_ITO_POS)
-#define CHNL_CTRL_IC_POS 16
-#define CHNL_CTRL_IC_MASK (0xFF << CHNL_CTRL_IC_POS)
-#define CHNL_CTRL_MSBADDR_POS 12
-#define CHNL_CTRL_MSBADDR_MASK (0xF << CHNL_CTRL_MSBADDR_POS)
-#define CHNL_CTRL_AME (1 << 11)
-#define CHNL_CTRL_OBWC (1 << 10)
-#define CHNL_CTRL_IOE (1 << 9)
-#define CHNL_CTRL_LIC (1 << 8)
-#define CHNL_CTRL_IE (1 << 7)
-#define CHNL_CTRL_IEE (1 << 2)
-#define CHNL_CTRL_IDE (1 << 1)
-#define CHNL_CTRL_ICE (1 << 0)
-
-/* All interrupt enable bits */
-#define CHNL_CTRL_IRQ_MASK (CHNL_CTRL_IE | \
- CHNL_CTRL_IEE | \
- CHNL_CTRL_IDE | \
- CHNL_CTRL_ICE)
-
-/* Rx/Tx Interrupt Status Register (*_irq_reg), [1] p164, [2] p247/p253 */
-#define IRQ_REG_DTV_POS 24
-#define IRQ_REG_DTV_MASK (0xFF << IRQ_REG_DTV_POS)
-#define IRQ_REG_CCV_POS 16
-#define IRQ_REG_CCV_MASK (0xFF << IRQ_REG_CCV_POS)
-#define IRQ_REG_WRCQ_EMPTY (1 << 14)
-#define IRQ_REG_CIC_POS 10
-#define IRQ_REG_CIC_MASK (0xF << IRQ_REG_CIC_POS)
-#define IRQ_REG_DIC_POS 8
-#define IRQ_REG_DIC_MASK (3 << 8)
-#define IRQ_REG_PLB_RD_NMI (1 << 4)
-#define IRQ_REG_PLB_WR_NMI (1 << 3)
-#define IRQ_REG_EI (1 << 2)
-#define IRQ_REG_DI (1 << 1)
-#define IRQ_REG_CI (1 << 0)
-
-/* All interrupt bits */
-#define IRQ_REG_IRQ_MASK (IRQ_REG_PLB_RD_NMI | \
- IRQ_REG_PLB_WR_NMI | \
- IRQ_REG_EI | IRQ_REG_DI | IRQ_REG_CI)
-
-/* Rx/Tx Channel Status Register (*_chnl_sts), [1] p165, [2] p249/p255 */
-#define CHNL_STS_ERROR_TAIL (1 << 21)
-#define CHNL_STS_ERROR_CMP (1 << 20)
-#define CHNL_STS_ERROR_ADDR (1 << 19)
-#define CHNL_STS_ERROR_NXTP (1 << 18)
-#define CHNL_STS_ERROR_CURP (1 << 17)
-#define CHNL_STS_ERROR_BSYWR (1 << 16)
-#define CHNL_STS_ERROR (1 << 7)
-#define CHNL_STS_IOE (1 << 6)
-#define CHNL_STS_SOE (1 << 5)
-#define CHNL_STS_CMPLT (1 << 4)
-#define CHNL_STS_SOP (1 << 3)
-#define CHNL_STS_EOP (1 << 2)
-#define CHNL_STS_EBUSY (1 << 1)
-
-/* DMA Control Register (dma_control_reg), [1] p166, [2] p256 */
-#define DMA_CONTROL_PLBED (1 << 5)
-#define DMA_CONTROL_RXOCEID (1 << 4)
-#define DMA_CONTROL_TXOCEID (1 << 3)
-#define DMA_CONTROL_TPE (1 << 2)
-#define DMA_CONTROL_RESET (1 << 0)
-
-/* Xilinx Processor Local Bus (PLB) in/out accessors */
-unsigned ll_temac_xlplb_in32(phys_addr_t base);
-void ll_temac_xlplb_out32(phys_addr_t base, unsigned value);
-
-/* collect all register addresses for Xilinx PLB in/out accessors */
-void ll_temac_collect_xlplb_sdma_reg_addr(struct eth_device *dev);
-
-/* initialize both Rx/Tx buffer descriptors */
-int ll_temac_init_sdma(struct eth_device *dev);
-
-/* halt both Rx/Tx transfers */
-int ll_temac_halt_sdma(struct eth_device *dev);
-
-/* reset SDMA and IRQ, disable interrupts and errors */
-int ll_temac_reset_sdma(struct eth_device *dev);
-
-/* receive buffered data from SDMA (polling ISR) */
-int ll_temac_recv_sdma(struct eth_device *dev);
-
-/* send buffered data to SDMA */
-int ll_temac_send_sdma(struct eth_device *dev, void *packet, int length);
-
-#endif /* _XILINX_LL_TEMAC_SDMA_ */
ofnode node)
{
int pci_addr_cells, addr_cells, size_cells;
- phys_addr_t base = 0, size;
int cells_per_record;
const u32 *prop;
int len;
}
/* Add a region for our local memory */
+#ifdef CONFIG_NR_DRAM_BANKS
+ bd_t *bd = gd->bd;
+
+ for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
+ if (bd->bi_dram[i].size) {
+ pci_set_region(hose->regions + hose->region_count++,
+ bd->bi_dram[i].start,
+ bd->bi_dram[i].start,
+ bd->bi_dram[i].size,
+ PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
+ }
+ }
+#else
+ phys_addr_t base = 0, size;
+
size = gd->ram_size;
#ifdef CONFIG_SYS_SDRAM_BASE
base = CONFIG_SYS_SDRAM_BASE;
size = gd->pci_ram_top - base;
pci_set_region(hose->regions + hose->region_count++, base, base,
size, PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
+#endif
return 0;
}
{
#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
outb(value, (ulong)addr);
-#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN)
+#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_LITTLE_ENDIAN)
out_le32(addr, value);
#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
out_be32(addr, value);
{
#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
return inb((ulong)addr);
-#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN)
+#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_LITTLE_ENDIAN)
return in_le32(addr);
#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
return in_be32(addr);
config USB_KEYBOARD
bool "USB Keyboard support"
+ select SYS_STDIO_DEREGISTER
---help---
Say Y here if you want to use a USB keyboard for U-Boot command line
input.
ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_USB_GADGET_DOWNLOAD) += g_dnl.o
obj-$(CONFIG_USB_FUNCTION_THOR) += f_thor.o
-obj-$(CONFIG_USB_FUNCTION_DFU) += f_dfu.o
+obj-$(CONFIG_DFU_OVER_USB) += f_dfu.o
obj-$(CONFIG_USB_FUNCTION_MASS_STORAGE) += f_mass_storage.o
obj-$(CONFIG_USB_FUNCTION_FASTBOOT) += f_fastboot.o
obj-$(CONFIG_USB_FUNCTION_SDP) += f_sdp.o
NULL,
};
+static inline void *sdp_ptr(u32 val)
+{
+ return (void *)(uintptr_t)val;
+}
+
static void sdp_rx_command_complete(struct usb_ep *ep, struct usb_request *req)
{
struct f_sdp *sdp = req->context;
u8 report = data[0];
if (status != 0) {
- pr_err("Status: %d", status);
+ pr_err("Status: %d\n", status);
return;
}
if (report != 1) {
- pr_err("Unexpected report %d", report);
+ pr_err("Unexpected report %d\n", report);
return;
}
int datalen = req->length - 1;
if (status != 0) {
- pr_err("Status: %d", status);
+ pr_err("Status: %d\n", status);
return;
}
if (report != 2) {
- pr_err("Unexpected report %d", report);
+ pr_err("Unexpected report %d\n", report);
return;
}
}
if (sdp->state == SDP_STATE_RX_FILE_DATA) {
- memcpy((void *)sdp->dnl_address, req->buf + 1, datalen);
+ memcpy(sdp_ptr(sdp->dnl_address), req->buf + 1, datalen);
sdp->dnl_address += datalen;
}
sdp->state = SDP_STATE_TX_SEC_CONF;
break;
default:
- pr_err("Invalid state: %d", sdp->state);
+ pr_err("Invalid state: %d\n", sdp->state);
}
}
int status = req->status;
if (status != 0) {
- pr_err("Status: %d", status);
+ pr_err("Status: %d\n", status);
return;
}
sdp->state = SDP_STATE_IDLE;
break;
default:
- pr_err("Wrong State: %d", sdp->state);
+ pr_err("Wrong State: %d\n", sdp->state);
sdp->state = SDP_STATE_IDLE;
break;
}
}
printf("Jumping to 0x%08x\n", headerv2->entry);
- entry = (void *)headerv2->entry;
+ entry = sdp_ptr(headerv2->entry);
entry();
/* The image probably never returns hence we won't reach that point */
if (datalen > 64)
datalen = 64;
- memcpy(&data[1], (void *)sdp_func->dnl_address, datalen);
+ memcpy(&data[1], sdp_ptr(sdp_func->dnl_address), datalen);
sdp_func->in_req->length = 65;
sdp_func->dnl_bytes_remaining -= datalen;
break;
case SDP_STATE_JUMP:
printf("Jumping to header at 0x%08x\n", sdp_func->jmp_address);
- status = sdp_jump_imxheader((void *)sdp_func->jmp_address);
+ status = sdp_jump_imxheader(sdp_ptr(sdp_func->jmp_address));
/* If imx header fails, try some U-Boot specific headers */
if (status) {
struct rk_hdmi_priv *priv = dev_get_priv(dev);
struct dw_hdmi *hdmi = &priv->hdmi;
- hdmi->ioaddr = (ulong)devfdt_get_addr(dev);
+ hdmi->ioaddr = (ulong)dev_read_addr(dev);
hdmi->mpll_cfg = rockchip_mpll_cfg;
hdmi->phy_cfg = rockchip_phy_config;
* node within the VOP's 'port' list.
* @return 0 if OK, -ve if something went wrong
*/
-static int rk_display_init(struct udevice *dev, ulong fbbase, int ep_node)
+static int rk_display_init(struct udevice *dev, ulong fbbase, ofnode ep_node)
{
struct video_priv *uc_priv = dev_get_uclass_priv(dev);
- const void *blob = gd->fdt_blob;
struct rk_vop_priv *priv = dev_get_priv(dev);
int vop_id, remote_vop_id;
struct rk3288_vop *regs = priv->regs;
struct display_timing timing;
struct udevice *disp;
- int ret, remote, i, offset;
+ int ret;
+ u32 remote_phandle;
struct display_plat *disp_uc_plat;
struct clk clk;
enum video_log2_bpp l2bpp;
+ ofnode remote;
- vop_id = fdtdec_get_int(blob, ep_node, "reg", -1);
+ debug("%s(%s, %lu, %s)\n", __func__,
+ dev_read_name(dev), fbbase, ofnode_get_name(ep_node));
+
+ vop_id = ofnode_read_s32_default(ep_node, "reg", -1);
debug("vop_id=%d\n", vop_id);
- remote = fdtdec_lookup_phandle(blob, ep_node, "remote-endpoint");
- if (remote < 0)
- return -EINVAL;
- remote_vop_id = fdtdec_get_int(blob, remote, "reg", -1);
- debug("remote vop_id=%d\n", remote_vop_id);
+ ret = ofnode_read_u32(ep_node, "remote-endpoint", &remote_phandle);
+ if (ret)
+ return ret;
- for (i = 0, offset = remote; i < 3 && offset > 0; i++)
- offset = fdt_parent_offset(blob, offset);
- if (offset < 0) {
- debug("%s: Invalid remote-endpoint position\n", dev->name);
+ remote = ofnode_get_by_phandle(remote_phandle);
+ if (!ofnode_valid(remote))
return -EINVAL;
- }
+ remote_vop_id = ofnode_read_u32_default(remote, "reg", -1);
+ debug("remote vop_id=%d\n", remote_vop_id);
- ret = uclass_find_device_by_of_offset(UCLASS_DISPLAY, offset, &disp);
- if (ret) {
- debug("%s: device '%s' display not found (ret=%d)\n", __func__,
- dev->name, ret);
- return ret;
- }
+ /*
+ * The remote-endpoint references into a subnode of the encoder
+ * (i.e. HDMI, MIPI, etc.) with the DTS looking something like
+ * the following (assume 'hdmi_in_vopl' to be referenced):
+ *
+ * hdmi: hdmi@ff940000 {
+ * ports {
+ * hdmi_in: port {
+ * hdmi_in_vopb: endpoint@0 { ... };
+ * hdmi_in_vopl: endpoint@1 { ... };
+ * }
+ * }
+ * }
+ *
+ * The original code had 3 steps of "walking the parent", but
+ * a much better (as in: less likely to break if the DTS
+ * changes) way of doing this is to "find the enclosing device
+ * of UCLASS_DISPLAY".
+ */
+ while (ofnode_valid(remote)) {
+ remote = ofnode_get_parent(remote);
+ if (!ofnode_valid(remote)) {
+ debug("%s(%s): no UCLASS_DISPLAY for remote-endpoint\n",
+ __func__, dev_read_name(dev));
+ return -EINVAL;
+ }
+
+ uclass_find_device_by_ofnode(UCLASS_DISPLAY, remote, &disp);
+ if (disp)
+ break;
+ };
disp_uc_plat = dev_get_uclass_platdata(disp);
debug("Found device '%s', disp_uc_priv=%p\n", disp->name, disp_uc_plat);
int rk_vop_probe(struct udevice *dev)
{
struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
- const void *blob = gd->fdt_blob;
struct rk_vop_priv *priv = dev_get_priv(dev);
int ret = 0;
- int port, node;
+ ofnode port, node;
/* Before relocation we don't need to do anything */
if (!(gd->flags & GD_FLG_RELOC))
return 0;
- priv->regs = (struct rk3288_vop *)devfdt_get_addr(dev);
+ priv->regs = (struct rk3288_vop *)dev_read_addr(dev);
/*
* Try all the ports until we find one that works. In practice this
* clock so it is currently not possible to use more than one display
* device simultaneously.
*/
- port = fdt_subnode_offset(blob, dev_of_offset(dev), "port");
- if (port < 0)
+ port = dev_read_subnode(dev, "port");
+ if (!ofnode_valid(port)) {
+ debug("%s(%s): 'port' subnode not found\n",
+ __func__, dev_read_name(dev));
return -EINVAL;
- for (node = fdt_first_subnode(blob, port);
- node > 0;
- node = fdt_next_subnode(blob, node)) {
+ }
+
+ for (node = ofnode_first_subnode(port);
+ ofnode_valid(node);
+ node = dev_read_next_subnode(node)) {
ret = rk_display_init(dev, plat->base, node);
if (ret)
debug("Device failed: ret=%d\n", ret);
int err;
loff_t off;
+ if (!strcmp(CONFIG_ENV_EXT4_INTERFACE, "mmc"))
+ mmc_initialize(NULL);
+
part = blk_get_device_part_str(CONFIG_ENV_EXT4_INTERFACE,
CONFIG_ENV_EXT4_DEVICE_AND_PART,
&dev_desc, &info, 1);
int dev, part;
int err;
+ if (!strcmp(CONFIG_ENV_FAT_INTERFACE, "mmc"))
+ mmc_initialize(NULL);
+
part = blk_get_device_part_str(CONFIG_ENV_FAT_INTERFACE,
CONFIG_ENV_FAT_DEVICE_AND_PART,
&dev_desc, &info, 1);
ALLOC_CACHE_ALIGN_BUFFER(env_t, tmp_env1, 1);
ALLOC_CACHE_ALIGN_BUFFER(env_t, tmp_env2, 1);
+ mmc_initialize(NULL);
+
mmc = find_mmc_device(dev);
errmsg = init_mmc_for_env(mmc);
+++ /dev/null
-/*
- * Copyright 2013-2014 Red Hat, Inc.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef _CONFIG_CMD_DISTRO_DEFAULTS_H
-#define _CONFIG_CMD_DISTRO_DEFAULTS_H
-
-/*
- * List of all commands and options that when defined enables support for
- * features required by distros to support boards in a standardised and
- * consistent manner.
- */
-
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_DNS
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-#define CONFIG_BOOTP_PXE
-#define CONFIG_BOOTP_SUBNETMASK
-
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_SUPPORT_RAW_INITRD
-#define CONFIG_ENV_VARS_UBOOT_CONFIG
-
-#endif /* _CONFIG_CMD_DISTRO_DEFAULTS_H */
# endif
#endif
-#ifndef CONFIG_CMDLINE
-#undef CONFIG_CMDLINE_EDITING
-#undef CONFIG_SYS_LONGHELP
-#endif
-
#endif /* __CONFIG_FALLBACKS_H */
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/*
* FDT options
/*
* MISC
*/
-#define CONFIG_SYS_LONGHELP /* Provide extended help */
#define CONFIG_SYS_LOAD_ADDR 0xcc000000 /* Half of RAM */
#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
CONFIG_ENV_SIZE - \
CONFIG_SYS_MALLOC_LEN - \
0x10000)
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
#endif /* __CONFIG_H */
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/*
* FDT options
/*
* MISC
*/
-#define CONFIG_SYS_LONGHELP /* Provide extended help */
#define CONFIG_SYS_LOAD_ADDR 0xd4000000 /* Half of RAM */
#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
CONFIG_ENV_SIZE - \
CONFIG_SYS_MALLOC_LEN - \
0x10000)
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
#endif /* __CONFIG_H */
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING /* Command-line editing */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING /* Command-line editing */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
#if defined(CONFIG_CMD_KGDB)
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING /* Command-line editing */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING /* Command-line editing */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
""
#define CONFIG_PRAM 512 /* 512 KB */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x40010000
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
#define CONFIG_HOSTNAME M52277EVB
#define CONFIG_SYS_UBOOT_END 0x3FFFF
#define CONFIG_PRAM 2048 /* 2048 KB */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x10000)
#define CONFIG_SYS_MBAR 0xFC000000
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
#define CONFIG_MCFFEC
#ifdef CONFIG_MCFFEC
""
#define CONFIG_PRAM 512 /* 512 KB */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE+0x20000)
* BOOTP options
*/
#undef CONFIG_BOOTP_BOOTFILESIZE
-#undef CONFIG_BOOTP_BOOTPATH
-#undef CONFIG_BOOTP_GATEWAY
-#undef CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-
#define CONFIG_SYS_DEVICE_NULLDEV 1 /* include nulldev device */
-#define CONFIG_AUTO_COMPLETE 1 /* add autocompletion support */
#define CONFIG_MX_CYCLIC 1 /* enable mdc/mwc commands */
#define CONFIG_SYS_LOAD_ADDR 0x200000 /* default load address */
#define CONFIG_SYS_I2C_PINMUX_CLR (0xFFFFE7FF)
#define CONFIG_SYS_I2C_PINMUX_SET (0)
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-
#define CONFIG_SYS_LOAD_ADDR 0x00100000
#define CONFIG_SYS_MEMTEST_START 0x400
* BOOTP options
*/
#undef CONFIG_BOOTP_BOOTFILESIZE
-#undef CONFIG_BOOTP_BOOTPATH
-#undef CONFIG_BOOTP_GATEWAY
-#undef CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
#define CONFIG_SYS_ATA_ALT_OFFSET 0xC0 /* Offset for alternate registers */
#define CONFIG_SYS_ATA_STRIDE 4 /* Interval between registers */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-
#define CONFIG_SYS_LOAD_ADDR 0x00100000
#define CONFIG_SYS_MEMTEST_START 0x400
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
"save\0" \
""
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-
#define CONFIG_SYS_LOAD_ADDR 0x20000
#define CONFIG_SYS_MEMTEST_START 0x400
#define CONFIG_SYS_MEMTEST_END 0x380000
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/* Available command configuration */
#define CONFIG_SYS_I2C_PINMUX_CLR (0xFFF0)
#define CONFIG_SYS_I2C_PINMUX_SET (0x000F)
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-
#define CONFIG_SYS_LOAD_ADDR 0x800000
#define CONFIG_BOOTCOMMAND "bootm ffe40000"
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
"save\0" \
""
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-
#define CONFIG_SYS_LOAD_ADDR 0x20000
#define CONFIG_SYS_MEMTEST_START 0x400
""
#define CONFIG_PRAM 512 /* 512 KB */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x40010000
""
#define CONFIG_PRAM 512 /* 512 KB */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x40010000
""
#define CONFIG_PRAM 512 /* 512 KB */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x40010000
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/*
* NAND FLASH
#define CONFIG_PRAM 2048 /* 2048 KB */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x10000)
#define CONFIG_SYS_MBAR 0xFC000000
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/* Network configuration */
#define CONFIG_MCFFEC
#define CONFIG_PRAM 2048 /* 2048 KB */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x10000)
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/* Network configuration */
#define CONFIG_MCFFEC
#define CONFIG_PRAM 2048 /* 2048 KB */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x10000)
#define CONFIG_SYS_MBAR 0xFC000000
""
#define CONFIG_PRAM 512 /* 512 KB */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x00010000
""
#define CONFIG_PRAM 512 /* 512 KB */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x00010000
#define CONFIG_WATCHDOG 1 /* watchdog enabled */
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_CMDLINE_EDITING 1
#ifdef CONFIG_HUSH_PARSER
#define CONFIG_SYS_PROMPT_HUSH_PS2 "S3K> "
#endif
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
-#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
-
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
-#define CONFIG_CMDLINE_EDITING 1
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
-
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
-#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR+0x4500)
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600)
-#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
-
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_FSL
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR+0x4500)
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600)
-#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
-
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_FSL
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR+0x4500)
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600)
-#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
-
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_FSL
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/* Watchdog */
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING /* Command-line editing */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
#define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
-#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
#ifdef CONFIG_MMC
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
-#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
#ifdef CONFIG_MMC
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING /* Command-line editing */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING /* Command-line editing */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING /* Command-line editing */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/*
* USB
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING /* Command-line editing */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING /* Command-line editing */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING /* Command-line editing */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING /* Command-line editing */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x1000000 /* default load address */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING /* Command-line editing */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING /* Command-line editing */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 2048 /* Console I/O Buffer Size */
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING /* Command-line editing */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING /* Command-line editing */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING /* Command-line editing */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
#define MIGO_R_FLASH_BASE_1 (0xA0000000)
#define MIGO_R_FLASH_BANK_SIZE (64 * 1024 * 1024)
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate settings for this board */
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING /* Command-line editing */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING /* Command-line editing */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING /* Command-line editing */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING /* Command-line editing */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING /* Command-line editing */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING /* Command-line editing */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING /* Command-line editing */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING /* Command-line editing */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING /* Command-line editing */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING /* Command-line editing */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING /* Command-line editing */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING /* Command-line editing */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms tick */
#define CONFIG_SKIP_TRUNOFF_WATCHDOG
-#define CONFIG_CMDLINE_EDITING
-
#define CONFIG_ARCH_MAP_SYSMEM
#define CONFIG_BOOTP_SEND_HOSTNAME
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
/*
* Size of malloc() pool
#define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_CMDLINE_EDITING
-
#define CONFIG_ARCH_MAP_SYSMEM
#define CONFIG_BOOTP_SEND_HOSTNAME
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
/*
* Size of malloc() pool
#define CONFIG_ARP_TIMEOUT 200UL
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_MEMTEST_START 0x10000000
#define CONFIG_SYS_MEMTEST_END 0x10010000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-#define CONFIG_CMDLINE_EDITING
-
/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
/* SPL */
#ifndef CONFIG_NOR_BOOT
/* Bootcount using the RTC block */
-#define CONFIG_BOOTCOUNT_AM33XX
#define CONFIG_SYS_BOOTCOUNT_BE
/* USB gadget RNDIS */
# define CONFIG_RESET_TO_RETRY
#endif
-#define CONFIG_ENV_VARS_UBOOT_CONFIG
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
#ifndef CONFIG_SPL_BUILD
#undef CONFIG_TIMER
#endif
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_PING
#define CONFIG_DRIVER_TI_CPSW
#define CONFIG_MII
#define CONFIG_BOOTP_DEFAULT
-#define CONFIG_BOOTP_DNS
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_NET_RETRY_COUNT 10
#define CONFIG_PHY_ADDR 0
#define CONFIG_PHY_SMSC
#ifndef CONFIG_SPL_BUILD
-#include <config_distro_defaults.h>
-
#define MEM_LAYOUT_ENV_SETTINGS \
"scriptaddr=0x80000000\0" \
"pxefile_addr_r=0x80100000\0" \
/* SPL */
/* Bootcount using the RTC block */
-#define CONFIG_BOOTCOUNT_AM33XX
#define CONFIG_SYS_BOOTCOUNT_BE
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_USBETH_SUPPORT)
"fi; " \
"else run nandboot; fi"
-#define CONFIG_AUTO_COMPLETE 1
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
#define CONFIG_SYS_MAXARGS 32 /* max number of command */
/* args */
#define CONFIG_DRIVER_TI_EMAC_USE_RMII
#define CONFIG_MII
#define CONFIG_BOOTP_DEFAULT
-#define CONFIG_BOOTP_DNS
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_NET_RETRY_COUNT 10
"else run nandboot; fi"
/* Miscellaneous configurable options */
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_SYS_LONGHELP
/* We set the max number of command args high to avoid HUSH bugs. */
#define CONFIG_SYS_MAXARGS 64
/* CPSW Ethernet */
#define CONFIG_MII
#define CONFIG_BOOTP_DEFAULT
-#define CONFIG_BOOTP_DNS
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_NET_RETRY_COUNT 10
#endif
#include <environment/ti/dfu.h>
#include <linux/sizes.h>
-#ifdef CONFIG_SPL_BUILD
#define CONFIG_IODELAY_RECALIBRATION
-#endif
#define CONFIG_NR_DRAM_BANKS 2
#define CONFIG_HSMMC2_8BIT
/* CPSW Ethernet */
-#define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_NET_RETRY_COUNT 10
#define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */
#define CONFIG_MII /* Required in net/eth.c */
"cp.b 0x20000 0xfff00000 ${filesize}\0"
/* undef to save memory */
-#undef CONFIG_SYS_LONGHELP
-#define CONFIG_AUTO_COMPLETE 1 /* add autocompletion support */
#define CONFIG_MX_CYCLIC 1 /* enable mdc/mwc commands */
#define CONFIG_SYS_LOAD_ADDR 0x20000 /* default load address */
#define CONFIG_ENV_SIZE 0x10000
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_AUTO_COMPLETE
/*
* Diagnostics
#define CONFIG_ENV_SIZE 0x10000
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_AUTO_COMPLETE
/*
* Diagnostics
#define AP325RXA_FLASH_BANK_SIZE (128 * 1024 * 1024)
/* undef to save memory */
-#define CONFIG_SYS_LONGHELP
/* Monitor Command Prompt */
/* Buffer size for Console output */
#define CONFIG_SYS_PBSIZE 256
#define CONFIG_BITBANGMII_MULTI
/* undef to save memory */
-#define CONFIG_SYS_LONGHELP
/* Monitor Command Prompt */
/* Buffer size for Console output */
#define CONFIG_SYS_PBSIZE 256
#define CONFIG_CMD_TIME
-#define CONFIG_SUPPORT_RAW_INITRD
#define CONFIG_SYS_BOOT_RAMDISK_HIGH
#include "tegra-common-usb-gadget.h"
/* Make the HW version stuff available in U-Boot env */
#define CONFIG_VERSION_VARIABLE /* ver environment variable */
-#define CONFIG_ENV_VARS_UBOOT_CONFIG
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
/* I2C Configs */
"fbmem=32M\0 "
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_AUTO_COMPLETE
#undef CONFIG_SYS_CBSIZE
#define CONFIG_SYS_CBSIZE 1024
#undef CONFIG_SYS_MAXARGS
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-#define CONFIG_CMDLINE_EDITING
-
/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
#define CONFIG_CMD_TIME
-#define CONFIG_SUPPORT_RAW_INITRD
-
#endif /* __CONFIG_H */
/*
* BOOTP options
*/
-#define CONFIG_BOOTP_SUBNETMASK
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_DNS
#define CONFIG_BOOTP_DNS2
#define CONFIG_HOSTNAME CONFIG_BOARD_NAME
/*
* U-Boot general configurations
*/
-#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_CBSIZE 2048 /* console I/O buffer */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* Boot argument buffer size */
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_ENV_VARS_UBOOT_CONFIG
#define CONFIG_PREBOOT "run check_flash check_env;"
/*
#define ARMADILLO_800EVA_SDRAM_BASE 0x40000000
#define ARMADILLO_800EVA_SDRAM_SIZE (512 * 1024 * 1024)
-#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_PBSIZE 256
#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
-#define CONFIG_CMDLINE_EDITING
-
/* Enable cache controller */
#define CONFIG_SYS_DCACHE_OFF
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-#define CONFIG_BOOTP_SUBNETMASK
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP
#define CONFIG_BOOTCOMMAND "bootm 20080000 20300000"
#define CONFIG_ENV_OVERWRITE
#define ENABLE_JFFS 1
#endif
-#define CONFIG_CMDLINE_EDITING
-
#define CONFIG_MCFRTC
#undef RTC_DEBUG
/* default RAM address for user programs */
#define CONFIG_SYS_LOAD_ADDR 0x20000
-#define CONFIG_SYS_LONGHELP
-
#define CONFIG_FPGA_COUNT 1
#define CONFIG_FPGA_SPARTAN3
#define CONFIG_SYS_FPGA_PROG_FEEDBACK
#define CONFIG_SKIP_LOWLEVEL_INIT
#endif
-#define CONFIG_ENV_VARS_UBOOT_CONFIG
-
/* general purpose I/O */
#ifndef CONFIG_DM_GPIO
#define CONFIG_AT91_GPIO
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
#endif
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_AUTO_COMPLETE
-
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
/*
* Shell Settings
*/
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_AUTO_COMPLETE
/*
* Size of malloc() pool
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE 1
-#define CONFIG_BOOTP_BOOTPATH 1
-#define CONFIG_BOOTP_GATEWAY 1
-#define CONFIG_BOOTP_HOSTNAME 1
/*
* SDRAM: 1 bank, min 32, max 128 MB
"fatload mmc 0:1 0x22000000 uImage; bootm"
#endif
-#define CONFIG_SYS_LONGHELP 1
-#define CONFIG_CMDLINE_EDITING 1
-#define CONFIG_AUTO_COMPLETE
-
/*
* Size of malloc() pool
*/
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/* SDRAM */
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm"
#endif
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_AUTO_COMPLETE
-
/*
* Size of malloc() pool
*/
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE 1
-#define CONFIG_BOOTP_BOOTPATH 1
-#define CONFIG_BOOTP_GATEWAY 1
-#define CONFIG_BOOTP_HOSTNAME 1
/* SDRAM */
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm"
#endif
-#define CONFIG_SYS_LONGHELP 1
-#define CONFIG_CMDLINE_EDITING 1
-#define CONFIG_AUTO_COMPLETE
-
/*
* Size of malloc() pool
*/
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/* SDRAM */
#define CONFIG_NR_DRAM_BANKS 1
"bootz 0x72000000 - 0x71000000"
#endif
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_AUTO_COMPLETE
-
/*
* Size of malloc() pool
*/
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SYS_SDRAM_BASE 0x20000000
#endif
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_AUTO_COMPLETE
-
/*
* Size of malloc() pool
*/
"bootz 0x22000000 - 0x21000000"
#endif
-#define CONFIG_SYS_LONGHELP 1
-#define CONFIG_CMDLINE_EDITING 1
-#define CONFIG_AUTO_COMPLETE
-
/*
* Size of malloc() pool
*/
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/*
* define CONFIG_USB_EHCI_HCD to enable USB Hi-Speed (aka 2.0)
#define CONFIG_ENV_SIZE 0x4000
#endif
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_AUTO_COMPLETE
-
/*
* Size of malloc() pool
*/
#define CONFIG_USB_OHCI_NEW
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
-
/*
* Environment settings
*/
/*
* Console configuration
*/
-#define CONFIG_SYS_LONGHELP
/*
* Misc utility configuration
/* SPL */
#ifndef CONFIG_NOR_BOOT
-/* Bootcount using the RTC block */
-#define CONFIG_BOOTCOUNT_AM33XX
/* USB gadget RNDIS */
/* SPL */
#ifndef CONFIG_NOR_BOOT
/* Bootcount using the RTC block */
-#define CONFIG_BOOTCOUNT_AM33XX
#define CONFIG_SYS_BOOTCOUNT_BE
/* USB gadget RNDIS */
*/
/* version string, parser, etc */
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_SYS_LONGHELP
#define CONFIG_MX_CYCLIC
*/
/* version string, parser, etc */
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_SYS_LONGHELP
#define CONFIG_MX_CYCLIC
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* version string, parser, etc */
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_SYS_LONGHELP
#define CONFIG_MX_CYCLIC
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* version string, parser, etc */
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_SYS_LONGHELP
#endif /* __BCM_NORTHSTAR2_H */
/*
* Console
*/
-#define CONFIG_SYS_LONGHELP
/*
* Flash
#define CONFIG_LCD_DT_SIMPLEFB
#define LCD_BPP LCD_COLOR32
-/* Bootcount using the RTC block */
-#define CONFIG_SYS_BOOTCOUNT_ADDR 0x44E3E000
-#define CONFIG_BOOTCOUNT_AM33XX
-
/* memory */
#define CONFIG_SYS_MALLOC_LEN (5 * 1024 * 1024)
#define CONFIG_PREBOOT "run cfgscr; run brdefaultip"
/* Network defines */
-#define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */
#define CONFIG_BOOTP_SEND_HOSTNAME
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_NET_RETRY_COUNT 10
/* Network console */
#define CONFIG_ENV_OVERWRITE /* Overwrite ethaddr / serial# */
/* As stated above, the following choices are optional. */
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
/* We set the max number of command args high to avoid HUSH bugs. */
#define CONFIG_SYS_MAXARGS 64
*/
#ifdef CONFIG_DRIVER_TI_EMAC
#define CONFIG_MII
-#define CONFIG_BOOTP_DNS
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_NET_RETRY_COUNT 10
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */
#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000)
#define CONFIG_LOADADDR 0xc0700000
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_SYS_LONGHELP
#define CONFIG_MX_CYCLIC
/*
#define CONFIG_SYS_INIT_SP_ADDR (0x8001ff00)
#define CONFIG_SYS_BOOTCOUNT_LE /* Use little-endian accessors */
-#define CONFIG_SYS_BOOTCOUNT_ADDR DAVINCI_RTC_BASE
#ifndef __ASSEMBLY__
int calimain_get_osc_freq(void);
/* SPL */
/* Bootcount using the RTC block */
-#define CONFIG_BOOTCOUNT_AM33XX
#define CONFIG_SYS_BOOTCOUNT_BE
/* NAND: device related configs */
#define CONFIG_MII
#define CONFIG_BOOTP_DEFAULT
#define CONFIG_BOOTP_SEND_HOSTNAME
-#define CONFIG_BOOTP_GATEWAY
#define CONFIG_PHY_ATHEROS
#define CONFIG_SYS_RX_ETH_BUFFER 64
#define PHY_ANEG_TIMEOUT 8000
-#define CONFIG_BOOTP_DNS
#define CONFIG_BOOTP_DNS2
-#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_NET_RETRY_COUNT 10
/* Default environment */
/* Include the common distro boot environment */
#ifndef CONFIG_SPL_BUILD
-#include <config_distro_defaults.h>
#ifdef CONFIG_MMC
#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
#include "mx6_common.h"
-#ifndef CONFIG_SPL_BUILD
-#include <config_distro_defaults.h>
-#endif
-
/* Machine config */
#define CONFIG_SYS_LITTLE_ENDIAN
#define CONFIG_MACH_TYPE 4273
/*
* Miscellaneous configurable options
*/
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
#define CONFIG_TIMESTAMP
#define CONFIG_SYS_AUTOLOAD "no"
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */
/* works on */
/*
* Miscellaneous configurable options
*/
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
#define CONFIG_TIMESTAMP
#define CONFIG_SYS_AUTOLOAD "no"
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
#define CONFIG_MII
#define CONFIG_BOOTP_DEFAULT
#define CONFIG_BOOTP_SEND_HOSTNAME
-#define CONFIG_BOOTP_GATEWAY
#define CONFIG_PHY_ATHEROS
#define CONFIG_SYS_RX_ETH_BUFFER 64
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
/*---*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-
/*
*-----------------------------------------------------------------------------
* End of user parameters to be customized
/* Make the HW version stuff available in U-Boot env */
#define CONFIG_VERSION_VARIABLE /* ver environment variable */
-#define CONFIG_ENV_VARS_UBOOT_CONFIG
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
/* I2C Configs */
"video=mxcfb1:off fbmem=8M\0 "
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_AUTO_COMPLETE
#undef CONFIG_SYS_CBSIZE
#define CONFIG_SYS_CBSIZE 1024
#undef CONFIG_SYS_MAXARGS
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-#define CONFIG_CMDLINE_EDITING
-
/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
#define CONFIG_CMD_TIME
-#define CONFIG_SUPPORT_RAW_INITRD
-
#endif /* __CONFIG_H */
#define CONFIG_DISPLAY_BOARDINFO_LATE /* Calls show_board_info() */
-#define CONFIG_ENV_VARS_UBOOT_CONFIG
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
/* Size of malloc() pool */
"updlevel=2\0"
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_MEMTEST_START 0x80000000
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x0c000000)
* Environment settings
*/
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_ENV_VARS_UBOOT_CONFIG
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_NET_RETRY_COUNT 10
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
#endif
-#undef CONFIG_SYS_LONGHELP /* Saves 10 KB */
#define CONFIG_SYS_DEVICE_NULLDEV 1
-#undef CONFIG_CMDLINE_EDITING /* Saves 2.5 KB */
-#undef CONFIG_AUTO_COMPLETE /* Saves 2.5 KB */
/*
* Clock Configuration
/* Allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_ENV_VARS_UBOOT_CONFIG
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
/* NAND support */
UBI_BOOTCMD
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#undef CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_HZ 1000
-#define CONFIG_CMDLINE_EDITING
/* Physical memory map */
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_ENV_SIZE (8 * 1024)
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_SYS_LONGHELP
#define CONFIG_ENV_SIZE (8 * 1024)
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_SYS_LONGHELP
#define CONFIG_ENV_SIZE (8 * 1024)
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_SYS_LONGHELP
-
#define CONFIG_SYS_FLASH_CFI 1
#define CONFIG_FLASH_CFI_DRIVER 1
#define CONFIG_ENV_SIZE (8 * 1024)
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_SYS_LONGHELP
#define CONFIG_ENV_SIZE (8 * 1024)
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_SYS_LONGHELP
-
#define CONFIG_SYS_FLASH_CFI 1
#define CONFIG_FLASH_CFI_DRIVER 1
/*
* Command line configuration.
*/
-#ifndef CONFIG_TRAILBLAZER
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_CMDLINE_EDITING /* Command-line editing */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
-#endif /* CONFIG_TRAILBLAZER */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING /* Command-line editing */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/* SDRAM */
#define CONFIG_NR_DRAM_BANKS 1
"nand read 0x70000000 0x200000 0x300000;" \
"bootm 0x70000000"
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_AUTO_COMPLETE
-
/*
* Size of malloc() pool
*/
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING /* Command-line editing */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
*/
#ifdef CONFIG_DRIVER_TI_EMAC
#define CONFIG_MII
-#define CONFIG_BOOTP_DNS
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_NET_RETRY_COUNT 10
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */
#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000)
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_SYS_LONGHELP
#define CONFIG_MX_CYCLIC
/*
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_MALLOC_LEN 128*1024
/*
* U-Boot General Configurations
*/
-#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_CBSIZE 1024
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
-
/*
* Pass open firmware flat tree
*/
#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */
/* partition */
-#undef CONFIG_SUPPORT_RAW_INITRD
-
/* BOOTP/DHCP options */
-#define CONFIG_BOOTP_SUBNETMASK
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
#define CONFIG_BOOTP_NISDOMAIN
-#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_DNS
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_BOOTP_NTPSERVER
#include <asm/arch/imx-regs.h>
-#include <config_distro_defaults.h>
#include "mx6_common.h"
/*
#define CONFIG_SPL_TARGET "u-boot-with-spl.imx"
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG
-#define CONFIG_SUPPORT_RAW_INITRD /* bootz raw initrd support */
#define CONFIG_BOUNCE_BUFFER
#define CONFIG_BZIP2
#define CONFIG_SYS_MALLOC_LEN (4 * SZ_1M)
/* Bootcounter */
-#define CONFIG_SYS_BOOTCOUNT_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_BOOTCOUNT_BE
/* FEC ethernet */
#include <environment/ti/dfu.h>
-#ifdef CONFIG_SPL_BUILD
#define CONFIG_IODELAY_RECALIBRATION
-#endif
#define CONFIG_VERY_BIG_RAM
#define CONFIG_NR_DRAM_BANKS 2
#define CONFIG_HSMMC2_8BIT
/* CPSW Ethernet */
-#define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_NET_RETRY_COUNT 10
#define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */
#define CONFIG_MII /* Required in net/eth.c */
/* Disabled by default as some sub-commands can brick eMMC */
/*#define CONFIG_SUPPORT_EMMC_BOOT */
-#include <config_distro_defaults.h>
-
/* BOOTP options */
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_ENV_SIZE 0x2000
#define CONFIG_SYS_MMC_ENV_DEV 0 /* mmc0 = emmc, mmc1 = sd */
-#define CONFIG_ENV_VARS_UBOOT_CONFIG
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_8M)
#define CONFIG_BOOTP_BOOTFILESIZE
#ifndef CONFIG_SPL_BUILD
-#include <config_distro_defaults.h>
#include <config_distro_bootcmd.h>
#endif
BOOTENV
#define CONFIG_ENV_SIZE 0x4000
-#define CONFIG_ENV_VARS_UBOOT_CONFIG
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_8M)
*/
#ifdef CONFIG_DRIVER_TI_EMAC
#define CONFIG_MII
-#define CONFIG_BOOTP_DNS
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_NET_RETRY_COUNT 10
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */
#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000)
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_SYS_LONGHELP
#define CONFIG_MX_CYCLIC
/*
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
-#define CONFIG_CMDLINE_EDITING
#define CONFIG_MCFTMR
-#define CONFIG_SYS_LONGHELP 1
-
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_MACH_TYPE MACH_TYPE_ECO5_PK
#define CONFIG_BOOTFILE "uImage"
-#define CONFIG_AUTO_COMPLETE
/*
* Set its own mtdparts, different from common
#define CONFIG_SUPERH_ON_CHIP_R8A66597
/* undef to save memory */
-#define CONFIG_SYS_LONGHELP
/* Monitor Command Prompt */
/* Buffer size for Console output */
#define CONFIG_SYS_PBSIZE 256
/* Monitor configuration */
-#define CONFIG_SYS_LONGHELP /* Enable "long" help in mon */
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
/* Serial port hardware configuration */
/* DISK Partition support */
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_CBSIZE 2048
#define CONFIG_SYS_MAXARGS 128
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_AUTO_COMPLETE
-
/* Memory */
#define CONFIG_SYS_LOAD_ADDR 0x100000
#define CONFIG_PHYSMEM
#define CONFIG_SYS_RESET_ADDRESS 0xffff0000
/* Enable command line editing */
-#define CONFIG_CMDLINE_EDITING
/* provide extensive help */
-#define CONFIG_SYS_LONGHELP
/* additions for new relocation code, must be added to all boards */
#define CONFIG_SYS_SDRAM_BASE 0
#define CONFIG_BOARD_NAME EL6Q
-#include <config_distro_defaults.h>
#include "mx6_common.h"
#define CONFIG_IMX_THERMAL
#define CONFIG_IMX_HDMI
#define CONFIG_IMX_VIDEO_SKIP
-#include <config_distro_defaults.h>
#include "mx6_common.h"
/* 256M RAM (minimum), 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
/* SCIF */
#define CONFIG_CONS_SCIF0 1
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate
settings for this board */
/* DHCP/BOOTP options */
#ifdef CONFIG_CMD_DHCP
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
#define CONFIG_SYS_AUTOLOAD "n"
#endif
"bootm 0x22000000"
/* Misc. u-boot settings */
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_CMDLINE_EDITING
#endif
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#include <config_distro_defaults.h>
-
#endif /* __CONFIG_H */
/*
* Command definition
*/
-#define CONFIG_BOOTP_SUBNETMASK
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_DNS
#define CONFIG_NET_RETRY_COUNT 100
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
/* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
#define CONFIG_ARP_TIMEOUT 200UL
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_MEMTEST_START 0x10000000
#define CONFIG_SYS_MEMTEST_END 0x10010000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-#define CONFIG_CMDLINE_EDITING
-
/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
#define CONFIG_BCH
-#define CONFIG_BOOTCOUNT_EXT
-#define CONFIG_SYS_BOOTCOUNT_EXT_INTERFACE "mmc"
-#define CONFIG_SYS_BOOTCOUNT_EXT_DEVPART "1:5"
-#define CONFIG_SYS_BOOTCOUNT_EXT_NAME "/boot/failures"
-#define CONFIG_SYS_BOOTCOUNT_ADDR 0x7000A000
-
#endif /* __GE_BX50V3_CONFIG_H */
#ifndef __CONFIG_H
#define __CONFIG_H
-#include <config_distro_defaults.h>
-
#define CONFIG_SYS_DCACHE_OFF
#define CONFIG_SYS_BOOTMAPSZ (16 << 20)
#define CONFIG_CONS_INDEX 0
#define CONFIG_SYS_BOOTCOUNT_LE /* Use little-endian accessors */
-#define CONFIG_SYS_BOOTCOUNT_ADDR 0xfff3cf0c
#define CONFIG_MISC_INIT_R
#define CONFIG_SCSI_AHCI_PLAT
#define CONFIG_REMAKE_ELF
-#define CONFIG_SUPPORT_RAW_INITRD
-
/* Physical Memory Map */
/* CONFIG_SYS_TEXT_BASE needs to align with where ATF loads bl33.bin */
/* BOOTP options */
#define CONFIG_BOOTP_BOOTFILESIZE
-#include <config_distro_defaults.h>
-
/* Initial environment variables */
/*
/* Preserve environment on sd card */
#define CONFIG_ENV_SIZE 0x1000
-#define CONFIG_ENV_VARS_UBOOT_CONFIG
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_CMDLINE_EDITING
#define CONFIG_SYS_MAXARGS 64 /* max command args */
#endif /* __HIKEY_H */
* Command line configuration.
*/
-#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
-
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
/*
* Console configuration
*/
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_SYS_LONGHELP
/*
* Misc utility configuration
#define CONFIG_ENV_SIZE (8 * 1024)
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_SYS_LONGHELP
-
#define CONFIG_SYS_FLASH_CFI 1
#define CONFIG_FLASH_CFI_DRIVER 1
/*
* U-Boot environment setup
*/
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_BOOTP_SUBNETMASK
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_BOOTFILESIZE
/*
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_CBSIZE 1024
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* UBI Support */
#define CONFIG_MTD_PARTITIONS
-/* bootcount support */
-#define CONFIG_BOOTCOUNT_I2C
-#define CONFIG_BOOTCOUNT_ALEN 1
-#define CONFIG_SYS_BOOTCOUNT_ADDR 0x9
-
#define CONFIG_IMAGE_FORMAT_LEGACY
#endif /* __CONFIG_H */
/*----------------------------------------------------------------------
* Commands
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
/*------------------------------------------------------------
* Console Configuration
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_SYS_LONGHELP
#define CONFIG_LOADADDR 0xa0800000 /* loadaddr env var */
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x10000
#define CONFIG_SYS_LOAD_ADDR 0 /* default load address */
-#define CONFIG_CMDLINE_EDITING
-
/*
* Physical Memory Map
*/
#define CONFIG_MXC_UART_BASE UART1_BASE
#define CONSOLE_DEV "ttymxc0"
-#include <config_distro_defaults.h>
#include "mx6_common.h"
/* Size of malloc() pool */
#define CONFIG_SYS_MEMTEST_END 0x10000000
#define CONFIG_SYS_TIMERBASE 0x13000100 /* Timer1 */
#define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */
-#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) /* Size of malloc() pool */
#define CONFIG_CONS_INDEX 0
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
#ifdef CONFIG_DRIVER_TI_EMAC
#define CONFIG_DRIVER_TI_EMAC_USE_RMII
#define CONFIG_BOOTP_DEFAULT
-#define CONFIG_BOOTP_DNS
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_NET_RETRY_COUNT 10
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */
#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000)
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_SYS_LONGHELP
#define CONFIG_MX_CYCLIC
/*
* Console
*/
-#define CONFIG_AUTO_COMPLETE
-
-#define CONFIG_SYS_LONGHELP
-
#define CONFIG_SYS_CBSIZE 512
/*
*/
#include <config_defaults.h>
-#include <config_distro_defaults.h>
#endif
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#endif
#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_AUTO_COMPLETE
#define CONFIG_HUSH_INIT_VAR
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/* UBI Support for all Keymile boards */
#define CONFIG_MTD_PARTITIONS
#define CONFIG_KM_RESERVED_PRAM 0x801000
/* address for the bootcount (taken from end of RAM) */
#define BOOTCOUNT_ADDR (CONFIG_KM_RESERVED_PRAM)
-/* Use generic bootcount RAM driver */
-#define CONFIG_BOOTCOUNT_RAM
/* enable POST tests */
#define CONFIG_POST (CONFIG_SYS_POST_MEM_REGIONS)
#define CONFIG_SYS_BR1_PRELIM CONFIG_SYS_QRIO_BR_PRELIM /* QRIO Base Address */
#define CONFIG_SYS_OR1_PRELIM CONFIG_SYS_QRIO_OR_PRELIM /* QRIO Options */
-/* bootcounter in QRIO */
-#define CONFIG_SYS_BOOTCOUNT_ADDR (CONFIG_SYS_QRIO_BASE + 0x20)
-
#define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */
#define CONFIG_MISC_INIT_F
#define CONFIG_MISC_INIT_R
#define CONFIG_SYS_MAX_FLASH_SECT (512)
/* prompt */
-#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_PBSIZE 256
#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */
#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000)
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_SYS_LONGHELP
#define CONFIG_MX_CYCLIC
/*
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_HZ 1000
-#define CONFIG_CMDLINE_EDITING
-
/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
#include <asm/arch/config.h>
#include <asm/arch/stream_id_lsch2.h>
-#define CONFIG_SUPPORT_RAW_INITRD
-
#define CONFIG_DISPLAY_BOARDINFO_LATE
#define CONFIG_SYS_CLK_FREQ 125000000
#define CONFIG_HWCONFIG
#define HWCONFIG_BUFFER_SIZE 128
-#include <config_distro_defaults.h>
#ifndef CONFIG_SPL_BUILD
#define BOOT_TARGET_DEVICES(func) \
func(SCSI, scsi, 0) \
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_MAXARGS 64 /* max command args */
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
#define CONFIG_PCI_SCAN_SHOW
#endif
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
#define CONFIG_CMDLINE_TAG
-#define CONFIG_CMDLINE_EDITING
#define CONFIG_PEN_ADDR_BIG_ENDIAN
#define CONFIG_LAYERSCAPE_NS_ACCESS
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
-#define CONFIG_AUTO_COMPLETE
#define CONFIG_CMD_GREPENV
#define CONFIG_CMD_MEMINFO
#endif
#define CONFIG_CMDLINE_TAG
-#define CONFIG_CMDLINE_EDITING
#define CONFIG_PEN_ADDR_BIG_ENDIAN
#define CONFIG_LAYERSCAPE_NS_ACCESS
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_MEMTEST_START 0x80000000
#define CONFIG_SYS_MEMTEST_END 0x9fffffff
#define CONFIG_FSL_DEVICE_DISABLE
-#include <config_distro_defaults.h>
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 0) \
func(USB, usb, 0)
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_MEMTEST_START 0x80000000
#define CONFIG_SYS_MEMTEST_END 0x9fffffff
/* Link Definitions */
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
-#define CONFIG_SUPPORT_RAW_INITRD
-
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_VERY_BIG_RAM
#define HWCONFIG_BUFFER_SIZE 128
#ifndef SPL_NO_MISC
-#include <config_distro_defaults.h>
#ifndef CONFIG_SPL_BUILD
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 0) \
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
-#define CONFIG_SYS_LONGHELP
-
-#ifndef SPL_NO_MISC
-#ifndef CONFIG_CMDLINE_EDITING
-#define CONFIG_CMDLINE_EDITING 1
-#endif
-#endif
-#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_MAXARGS 64 /* max command args */
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
* Miscellaneous configurable options
*/
#define CONFIG_MISC_INIT_R
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_MEMTEST_START 0x80000000
#define CONFIG_SYS_MEMTEST_END 0x9fffffff
/* Link Definitions */
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
-#define CONFIG_SUPPORT_RAW_INITRD
-
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_VERY_BIG_RAM
#define CONFIG_HWCONFIG
#define HWCONFIG_BUFFER_SIZE 128
-#include <config_distro_defaults.h>
#ifndef CONFIG_SPL_BUILD
#define BOOT_TARGET_DEVICES(func) \
func(SCSI, scsi, 0) \
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_MAXARGS 64 /* max command args */
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
* Miscellaneous configurable options
*/
#define CONFIG_MISC_INIT_R
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_MEMTEST_START 0x80000000
#define CONFIG_SYS_MEMTEST_END 0x9fffffff
/* Link Definitions */
-#define CONFIG_SUPPORT_RAW_INITRD
-
#ifdef CONFIG_QSPI_BOOT
#define CONFIG_SYS_FSL_QSPI_BASE 0x20000000
#define CONFIG_ENV_OFFSET 0x300000 /* 3MB */
sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */
-#define CONFIG_SYS_LONGHELP
-#ifndef SPL_NO_ENV
-#define CONFIG_CMDLINE_EDITING 1
-#endif
-#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_MAXARGS 64 /* max command args */
#ifdef CONFIG_SPL
#endif
-#undef CONFIG_CMDLINE_EDITING
-#include <config_distro_defaults.h>
#define BOOT_TARGET_DEVICES(func) \
func(USB, usb, 0) \
func(MMC, mmc, 0) \
#endif
#ifndef SPL_NO_ENV
-#undef CONFIG_CMDLINE_EDITING
-#include <config_distro_defaults.h>
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 0) \
#define CONFIG_ENV_SECT_SIZE 0x40000
#endif
-#define CONFIG_SUPPORT_RAW_INITRD
-
#define CONFIG_SKIP_LOWLEVEL_INIT
#ifndef CONFIG_SPL
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_CMDLINE_EDITING 1
-#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_MAXARGS 64 /* max command args */
#define CONFIG_SPL_BSS_START_ADDR 0x80100000
#define CONFIG_MISC_INIT_R
-#undef CONFIG_CMDLINE_EDITING
-#include <config_distro_defaults.h>
-
#define BOOT_TARGET_DEVICES(func) \
func(USB, usb, 0) \
func(MMC, mmc, 0) \
#include "mv-common.h"
/* loading initramfs images without uimage header */
-#define CONFIG_SUPPORT_RAW_INITRD
/* ST M25P40 */
#undef CONFIG_ENV_SPI_MAX_HZ
/*
* U-Boot general configurations
*/
-#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* Boot argument buffer size */
-#define CONFIG_AUTO_COMPLETE /* Command auto complete */
-#define CONFIG_CMDLINE_EDITING /* Command history etc */
/*
* Serial Driver
#define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024)
#define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024)
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
-
/*
* Serial driver
*/
* Commands
*/
-#define CONFIG_SYS_LONGHELP /* verbose help, undef to save memory */
-
#endif /* _MALTA_CONFIG_H */
#ifndef __CONFIG_H
#define __CONFIG_H
-#include <config_distro_defaults.h>
#include "mx6_common.h"
#define CONFIG_SPL_LIBCOMMON_SUPPORT
"bootcmd=mmc rescan;if fatload mmc 0 82000000 loadbootscr.scr;" \
"then source 82000000;else run nandboot;fi\0"
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
-
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_CBSIZE 1024/* Console I/O Buffer Size */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
#define CONFIG_DRIVER_TI_EMAC
#define CONFIG_DRIVER_TI_EMAC_USE_RMII
#define CONFIG_MII
-#define CONFIG_BOOTP_DNS
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_NET_RETRY_COUNT 10
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/*
* SDRAM: 1 bank, min 32, max 128 MB
#endif
#define CONFIG_SYS_CBSIZE 512
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_AUTO_COMPLETE
/*
* Size of malloc() pool
#define GICD_BASE 0xc4301000
#define GICC_BASE 0xc4302000
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_CMDLINE_EDITING
-
-#include <config_distro_defaults.h>
-
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 0) \
func(MMC, mmc, 1) \
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
#if defined(CONFIG_CMD_JFFS2)
# define CONFIG_MTD_PARTITIONS
#define CONFIG_SYS_CBSIZE 512
/* max number of command args */
#define CONFIG_SYS_MAXARGS 15
-#define CONFIG_SYS_LONGHELP
/* default load address */
#define CONFIG_SYS_LOAD_ADDR 0
"setenv stdin serial\0"
#endif
-#define CONFIG_CMDLINE_EDITING
-
/* Enable flat device tree support */
#define CONFIG_LMB 1
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
-#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
-
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_DISPLAY_BOARDINFO
/* U-Boot internals */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate settings for this board */
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 32 * 1024 * 1024)
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
#define MS7720SE_FLASH_BASE_1 0xA0000000
#define MS7720SE_FLASH_BANK_SIZE (8 * 1024 * 1024)
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
/* List of legal baudrate settings for this board */
#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
#define MS7722SE_FLASH_BASE_1 (0xA0000000)
#define MS7722SE_FLASH_BANK_SIZE (8*1024 * 1024)
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate settings for this board */
#define CONFIG_SYS_SDRAM_BASE (0x8C000000)
#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024)
-#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_PBSIZE 256
#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
#define CONFIG_MACH_TYPE MACH_TYPE_AM3517_MT_VENTOUX
#define CONFIG_BOOTFILE "uImage"
-#define CONFIG_AUTO_COMPLETE
#define CONFIG_HOSTNAME mt_ventoux
/*
* Other required minimal configurations
*/
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */
#define CONFIG_SYS_MEMTEST_START 0x00800000 /* 8M */
#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
CONFIG_SYS_SCSI_MAX_LUN)
-#include <config_distro_defaults.h>
-
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 1) \
func(MMC, mmc, 0) \
/*
* Other required minimal configurations
*/
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */
#define CONFIG_SYS_MEMTEST_START 0x00800000 /* 8M */
#define CONFIG_SYS_MMC_ENV_DEV 0
/* U-Boot general configuration */
-#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_SYS_LONGHELP
/* Ethernet */
#define CONFIG_FEC_MXC
"else run netboot; fi"
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_AUTO_COMPLETE
#endif /* __CONFIG_H */
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x10000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-#define CONFIG_CMDLINE_EDITING 1
-
/*-----------------------------------------------------------------------
* Physical Memory Map
*/
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
/* memtest works on */
#define CONFIG_SYS_MEMTEST_START 0x80000000
/* default load address */
#define CONFIG_SYS_LOAD_ADDR 0x81000000
-#define CONFIG_CMDLINE_EDITING
-
/*-----------------------------------------------------------------------
* Physical Memory Map
*/
/*
* Command definition
*/
-#define CONFIG_BOOTP_SUBNETMASK
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_DNS
#define CONFIG_NET_RETRY_COUNT 100
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING
-
-#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x10000
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_MEMTEST_START 0x90000000
#define CONFIG_SYS_MEMTEST_END 0x90010000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-#define CONFIG_CMDLINE_EDITING
-
/*-----------------------------------------------------------------------
* Physical Memory Map
*/
#define CONFIG_ARP_TIMEOUT 200UL
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_MEMTEST_START 0x70000000
#define CONFIG_SYS_MEMTEST_END 0x70010000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-#define CONFIG_CMDLINE_EDITING
-
/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS 2
#define PHYS_SDRAM_1 CSD0_BASE_ADDR
#define CONFIG_CONS_INDEX 1
/* Command definition */
-#define CONFIG_SUPPORT_RAW_INITRD
#define CONFIG_LOADADDR 0x70010000 /* loadaddr env var */
#define CONFIG_ARP_TIMEOUT 200UL
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
#define CONFIG_SYS_MEMTEST_START 0x70000000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-#define CONFIG_CMDLINE_EDITING
-
/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS 2
#define PHYS_SDRAM_1 CSD0_BASE_ADDR
#define CONFIG_ARP_TIMEOUT 200UL
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_MEMTEST_START 0x70000000
#define CONFIG_SYS_MEMTEST_END 0x70010000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-#define CONFIG_CMDLINE_EDITING
-
/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM_1 CSD0_BASE_ADDR
#define CONFIG_CONS_INDEX 1
/* Command definition */
-#define CONFIG_SUPPORT_RAW_INITRD
#define CONFIG_ETHPRIME "FEC0"
#define CONFIG_ARP_TIMEOUT 200UL
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
#define CONFIG_SYS_MEMTEST_START 0x70000000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-#define CONFIG_CMDLINE_EDITING
-
/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS 2
#define PHYS_SDRAM_1 CSD0_BASE_ADDR
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_FSL_ESDHC_NUM 2
-#define CONFIG_SUPPORT_RAW_INITRD /* bootz raw initrd support */
-
/* Eth Configs */
#define CONFIG_MII
#define CONFIG_BAUDRATE 115200
/* Command definition */
-#define CONFIG_SUPPORT_RAW_INITRD
#define CONFIG_ETHPRIME "FEC0"
#define CONFIG_ARP_TIMEOUT 200UL
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_MAXARGS 48 /* max number of command args */
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-#define CONFIG_CMDLINE_EDITING
-
/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS 2
#define PHYS_SDRAM_1 CSD0_BASE_ADDR
#define CONFIG_ARP_TIMEOUT 200UL
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_MEMTEST_START 0x70000000
#define CONFIG_SYS_MEMTEST_END 0x70010000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-#define CONFIG_CMDLINE_EDITING
-
/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS 2
#define PHYS_SDRAM_1 CSD0_BASE_ADDR
#define CONFIG_CONS_INDEX 1
/* Filesystems and image support */
-#define CONFIG_SUPPORT_RAW_INITRD
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_CBSIZE 512
#define CONFIG_SYS_MAXARGS 32
#ifndef __MX6CUBOXI_CONFIG_H
#define __MX6CUBOXI_CONFIG_H
-#include <config_distro_defaults.h>
#include "mx6_common.h"
#include "imx6_spl.h"
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_HZ 1000
-#define CONFIG_CMDLINE_EDITING
-
/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
#define CONFIG_CONS_INDEX 1
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_CBSIZE 512
#define CONFIG_SYS_MAXARGS 32
#define CONFIG_CONS_INDEX 1
#define CONFIG_BAUDRATE 115200
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_AUTO_COMPLETE
-
#define CONFIG_SYS_CACHELINE_SIZE 64
/* Miscellaneous configurable options */
#define CONFIG_SYS_MAXARGS 256
-#define CONFIG_CMDLINE_EDITING
-
/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SPL_TEXT_BASE 0x00001000
/* U-Boot general configuration */
-#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* Boot argument buffer size */
-#define CONFIG_AUTO_COMPLETE /* Command auto complete */
-#define CONFIG_CMDLINE_EDITING /* Command history etc */
/* Booting Linux */
#define CONFIG_CMDLINE_TAG
/*
* Commands configuration
*/
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
/*
* mv-common.h should be defined after CMD configs since it used them
#define CONFIG_ENV_SIZE (8 * 1024)
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_SYS_LONGHELP
/* commands to include */
-#define CONFIG_CMDLINE_EDITING /* add command line history */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
-
#define CONFIG_SYS_I2C
/*
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + 0x01F00000)/*31MB*/
#define CONFIG_MISC_INIT_R
#define CONFIG_KEYBOARD
-#include <config_distro_defaults.h>
#include "mx6_common.h"
/* U-Boot Commands */
/*
* Command line configuration
*/
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
/*
* Environment settings
/*
* Console configuration
*/
-#define CONFIG_SYS_LONGHELP
#endif /* _CONFIG_NSIM_H_ */
*/
#define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_CMDLINE_EDITING
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_BOOTP_SERVERIP
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
/*
/* Environment */
#define CONFIG_PREBOOT "usb start"
-#include <config_distro_defaults.h>
-
#define MEM_LAYOUT_ENV_SETTINGS \
DEFAULT_LINUX_BOOT_ENV
#define CONFIG_MII
#undef CONFIG_DRIVER_TI_EMAC_USE_RMII
#define CONFIG_BOOTP_DEFAULT
-#define CONFIG_BOOTP_DNS
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_NET_RETRY_COUNT 10
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */
#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000)
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_SYS_LONGHELP
#define CONFIG_MX_CYCLIC
/*
#define S5P_CHECK_DIDLE 0xBAD00000
#define S5P_CHECK_LPA 0xABAD0000
-#define CONFIG_SUPPORT_RAW_INITRD
-
/* MMC SPL */
#define COPY_BL2_FNPTR_ADDR 0x02020030
#define CONFIG_SPL_TEXT_BASE 0x02021410
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING /* Command-line editing */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING /* Command-line editing */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_MALLOC_LEN 128*1024
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
"nand write ${ram_addr} root ${filesize}; fi\0"
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
#define CONFIG_SYS_MEMTEST_START 0x80010000
#define CONFIG_SYS_MEMTEST_END 0x87C00000
#ifndef __PCM058_CONFIG_H
#define __PCM058_CONFIG_H
-#include <config_distro_defaults.h>
-
#ifdef CONFIG_SPL
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
#ifndef __PCM058_CONFIG_H
#define __PCM058_CONFIG_H
-#include <config_distro_defaults.h>
-
#ifdef CONFIG_SPL
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
/*----------------------------------------------------------------------
* Commands
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
/*------------------------------------------------------------
* Console Configuration
*/
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
-#define CONFIG_CMDLINE_EDITING 1
/*-----------------------------------------------------------------------
* Networking Configuration
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/*--------------------------------------------------
* USB Configuration
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_HZ 1000
-#define CONFIG_CMDLINE_EDITING
-
/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/* Enable the watchdog */
#define CONFIG_AT91SAM9_WATCHDOG
"bootz 0x22000000 - 0x21000000"
#endif
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_AUTO_COMPLETE
-
/*
* Size of malloc() pool
*/
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE 1
-#define CONFIG_BOOTP_BOOTPATH 1
-#define CONFIG_BOOTP_GATEWAY 1
-#define CONFIG_BOOTP_HOSTNAME 1
/* SDRAM */
#define CONFIG_NR_DRAM_BANKS 1
#error "Undefined memory device"
#endif
-#define CONFIG_SYS_LONGHELP 1
-#define CONFIG_CMDLINE_EDITING 1
-
/*
* Size of malloc() pool
*/
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE 1
-#define CONFIG_BOOTP_BOOTPATH 1
-#define CONFIG_BOOTP_GATEWAY 1
-#define CONFIG_BOOTP_HOSTNAME 1
/* SDRAM */
#define CONFIG_NR_DRAM_BANKS 1
#error "Undefined memory device"
#endif
-#define CONFIG_SYS_LONGHELP 1
-#define CONFIG_CMDLINE_EDITING 1
-
/*
* Size of malloc() pool
*/
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE 1
-#define CONFIG_BOOTP_BOOTPATH 1
-#define CONFIG_BOOTP_GATEWAY 1
-#define CONFIG_BOOTP_HOSTNAME 1
#define CONFIG_JFFS2_CMDLINE 1
#define CONFIG_JFFS2_NAND 1
#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
#define CONFIG_BOOTCOMMAND "nand read 0x72000000 0x200000 0x200000; bootm"
-#define CONFIG_SYS_LONGHELP 1
-#define CONFIG_CMDLINE_EDITING 1
-#define CONFIG_AUTO_COMPLETE
-
/*
* Size of malloc() pool
*/
func(MMC, mmc, 0) \
func(DHCP, dhcp, na)
#ifndef CONFIG_SPL_BUILD
-#include <config_distro_defaults.h>
#include <config_distro_bootcmd.h>
#endif
#define CONFIG_SYS_MMC_ENV_DEV 0
#define CONFIG_ENV_OFFSET (0x780 * 512) /* env_mmc_blknum */
#define CONFIG_ENV_SIZE 0x10000 /* env_mmc_nblks bytes */
-#define CONFIG_ENV_VARS_UBOOT_CONFIG
/* Monitor Command Prompt */
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_CBSIZE 512
#define CONFIG_SYS_MAXARGS 64
/* Environment options */
#define CONFIG_ENV_SIZE SZ_64K
-#include <config_distro_defaults.h>
-
#define BOOT_TARGET_DEVICES(func) \
func(SCSI, scsi, 0)
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
#define CONFIG_SYS_MALLOC_LEN (256 << 10)
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
#define CONFIG_SYS_MALLOC_LEN (256 << 10)
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING /* Command-line editing */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
/* undef to save memory */
-#define CONFIG_SYS_LONGHELP
/* List of legal baudrate settings for this board */
#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
#define CONFIG_SYS_SDRAM_BASE 0x8C000000
#define CONFIG_SYS_SDRAM_SIZE 0x04000000
-#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_PBSIZE 256
#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
#define CONFIG_SYS_SDRAM_BASE (0x08000000)
#define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024)
-#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_PBSIZE 256
#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
-#define CONFIG_CMDLINE_EDITING
#undef CONFIG_SHOW_BOOT_PROGRESS
#endif
/* console */
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_PBSIZE 256
#define CONFIG_SYS_BAUDRATE_TABLE { 38400, 115200 }
#define CONFIG_REMAKE_ELF
/* boot option */
-#define CONFIG_SUPPORT_RAW_INITRD
-#define CONFIG_AUTO_COMPLETE
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
-#define CONFIG_CMDLINE_EDITING
#undef CONFIG_SHOW_BOOT_PROGRESS
/* console */
#define CONFIG_SYS_CBSIZE 2048
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_MAXARGS 64
#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400 }
#include <linux/sizes.h>
#ifndef CONFIG_SPL_BUILD
-#include <config_distro_defaults.h>
/* First try to boot from SD (index 0), then eMMC (index 1) */
#if CONFIG_IS_ENABLED(CMD_MMC)
/* Environment */
#define CONFIG_ENV_SIZE SZ_16K
-#define CONFIG_ENV_VARS_UBOOT_CONFIG
#define CONFIG_SYS_LOAD_ADDR 0x1000000
#define CONFIG_PREBOOT "usb start"
/* Shell */
-#define CONFIG_CMDLINE_EDITING
/* ATAGs support for bootm/bootz */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_CMDLINE_TAG
#define CONFIG_INITRD_TAG
-#include <config_distro_defaults.h>
-
/* Environment */
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
#define ENV_DEVICE_SETTINGS \
#define RSK7203_FLASH_BASE_1 0x20000000 /* Non cache */
#define RSK7203_FLASH_BANK_SIZE (4 * 1024 * 1024)
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
/* List of legal baudrate settings for this board */
#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
#define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE }
-#define CONFIG_SYS_LONGHELP 1 /* undef to save memory */
#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
/* Serial */
#define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE }
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_PBSIZE 256 /* Print Buffer Size */
/* Serial */
#ifndef __CONFIG_H
#define __CONFIG_H
-#ifndef CONFIG_SPL_BUILD
-#include <config_distro_defaults.h>
-#endif
-
#include <asm/arch/imx-regs.h>
#define CONFIG_S32V234
#if 0
/* Ethernet config */
-#define CONFIG_CMD_PING
#define CONFIG_CMD_MII
#define CONFIG_FEC_MXC
#define CONFIG_MII
#include <config_distro_bootcmd.h>
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
#define CONFIG_SYS_PROMPT "=> "
-#undef CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
#define CONFIG_CMD_MEMTEST
#define CONFIG_SYS_MEMTEST_START (DDR_BASE_ADDR)
#if 0
/* Configure PXE */
-#define CONFIG_BOOTP_PXE
#define CONFIG_BOOTP_PXE_CLIENTARCH 0x100
#endif
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
#endif
#define CONFIG_CMDLINE_TAG
#define CONFIG_REVISION_TAG
#define CONFIG_INITRD_TAG
-#define CONFIG_CMDLINE_EDITING
/* Size of malloc() pool before and after relocation */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 << 20))
#define CONFIG_MISC_INIT_R
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_ENV_VARS_UBOOT_CONFIG
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
#define CONFIG_EXTRA_ENV_SETTINGS \
CONFIG_UPDATEB \
"opts=always_resume=1\0" \
"dfu_alt_info=" CONFIG_DFU_ALT "\0"
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
/* memtest works on */
#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
#define CONFIG_ENV_COMMON_BOOT "${console} ${meminfo}"
-#define CONFIG_ENV_VARS_UBOOT_CONFIG
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
#define CONFIG_EXTRA_ENV_SETTINGS \
#define CONFIG_ENV_SIZE (8 * 1024)
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_SYS_LONGHELP
#define CONFIG_MALLOC_F_ADDR 0x0010000
#define CONFIG_SYS_MALLOC_LEN (32 << 20) /* 32MB */
-#define CONFIG_SYS_LONGHELP /* #undef to save memory */
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_DISPLAY_BOARDINFO_LATE
/* turn on command-line edit/c/auto */
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_AUTO_COMPLETE
#define CONFIG_ENV_SIZE 8192
#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
115200}
-/* include default commands */
-#include <config_distro_defaults.h>
-
#define BOOT_TARGET_DEVICES(func) \
func(HOST, host, 1) \
func(HOST, host, 0)
#define CONFIG_KEEP_SERVERADDR
#define CONFIG_UDP_CHECKSUM
#define CONFIG_TIMESTAMP
-#define CONFIG_BOOTP_DNS
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_BOOTP_SERVERIP
#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR+0x4500)
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600)
-#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
-
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_FSL
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
* Miscellaneous configurable options
*/
-#define CONFIG_CMDLINE_EDITING /* undef to save memory */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
/*
* For booting Linux, the board info and command line data
#define CONFIG_ENV_SIZE (8 * 1024)
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_SYS_LONGHELP
-
#define CONFIG_SYS_FLASH_CFI 1
#define CONFIG_FLASH_CFI_DRIVER 1
#define CONFIG_DISPLAY_BOARDINFO
#undef CONFIG_SHOW_BOOT_PROGRESS
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_AUTO_COMPLETE
/* MEMORY */
#define SH7752EVB_SDRAM_BASE (0x40000000)
#define SH7752EVB_SDRAM_SIZE (512 * 1024 * 1024)
-#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_PBSIZE 256
#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
#define CONFIG_DISPLAY_BOARDINFO
#undef CONFIG_SHOW_BOOT_PROGRESS
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_AUTO_COMPLETE
/* MEMORY */
#define SH7753EVB_SDRAM_BASE (0x40000000)
#define SH7753EVB_SDRAM_SIZE (512 * 1024 * 1024)
-#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_PBSIZE 256
#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
#define SH7757LCR_SDRAM_ECC_SETTING 0x0f000000 /* 240MByte */
#define SH7757LCR_SDRAM_DVC_SIZE (16 * 1024 * 1024)
-#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_PBSIZE 256
#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
/* SCIF */
#define CONFIG_CONS_SCIF2 1
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate
settings for this board */
#define SH7785LCR_USB_BASE (0xb4000000)
#endif
-#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_PBSIZE 256
#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
#define SHMIN_SDRAM_BASE (0x8C000000)
#define SHMIN_FLASH_BASE_1 (0xA0000000)
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
/* List of legal baudrate settings for this board */
#define CONFIG_SYS_BAUDRATE_TABLE { 9600,14400,19200,38400,57600,115200 }
#define CONFIG_ENV_SIZE (0x2000)
#define CONFIG_SYS_MALLOC_LEN (16 * 1024 * 1024)
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#ifdef CONFIG_SIEMENS_MACH_TYPE
#define CONFIG_MACH_TYPE CONFIG_SIEMENS_MACH_TYPE
#endif
/* commands to include */
-#define CONFIG_ENV_VARS_UBOOT_CONFIG
#ifndef CONFIG_SPL_BUILD
#define CONFIG_ROOTPATH "/opt/eldk"
#endif
#define CONFIG_ENV_OVERWRITE 1
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_AUTOLOAD "yes"
/* Clock Defines */
#define CONFIG_DRIVER_TI_CPSW
#define CONFIG_MII
#define CONFIG_BOOTP_DEFAULT
-#define CONFIG_BOOTP_DNS
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_NET_RETRY_COUNT 10
/* NAND support */
#define CONFIG_RESET_TO_RETRY
#define CONFIG_BOOT_RETRY_TIME 60
-#define CONFIG_BOOTCOUNT_ENV
-
#endif /* ! __CONFIG_SIEMENS_AM33X_COMMON_H */
#ifndef __SKSIMX6_CONFIG_H
#define __SKSIMX6_CONFIG_H
-#include <config_distro_defaults.h>
-
#include "mx6_common.h"
#include "imx6_spl.h"
/* setting board specific options */
#define CONFIG_MACH_TYPE MACH_TYPE_SMARTWEB
-#define CONFIG_AUTO_COMPLETE
#define CONFIG_ENV_OVERWRITE 1 /* Overwrite ethaddr / serial# */
-#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_AUTOLOAD "yes"
#define CONFIG_RESET_TO_RETRY
/* BOOTP and DHCP options */
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
#define CONFIG_NFSBOOTCOMMAND \
"setenv autoload yes; setenv autoboot yes; " \
"setenv bootargs ${basicargs} ${mtdparts} " \
/* General Boot Parameter */
#define CONFIG_BOOTCOMMAND "run flashboot"
#define CONFIG_SYS_CBSIZE 512
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_CMDLINE_EDITING
/*
* RAM Memory address where to put the
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_CMDLINE_TAG
#define CONFIG_INITRD_TAG
-#define CONFIG_CMDLINE_EDITING
/*
* Size of malloc() pool
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
/* memtest works on */
#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_LOAD_ADDR 0x23000000
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/* Environment settings */
#define CONFIG_ENV_OFFSET (512 << 10)
#define CONFIG_ENV_OVERWRITE
/* Console settings */
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_AUTO_COMPLETE
/* U-Boot memory settings */
#define CONFIG_SYS_MALLOC_LEN (1 << 20)
#define CONFIG_SYS_LOAD_ADDR 0x23000000
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/* Environment settings */
#define CONFIG_ENV_OFFSET (512 << 10)
"altbootcmd=run boot_mmc ; run boot_usb ; run boot_safe ; run boot_working\0"
/* Console settings */
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_AUTO_COMPLETE
/* U-Boot memory settings */
#define CONFIG_SYS_MALLOC_LEN (1 << 20)
/* Command line configuration */
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
#define CONFIG_CMD_MMC
#define CONFIG_CMD_CACHE
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
-#define CONFIG_AUTO_COMPLETE
-
-#define CONFIG_SYS_LONGHELP
-
#define CONFIG_SYS_CBSIZE 512
/*
*/
#include <config_defaults.h>
-#include <config_distro_defaults.h>
#endif
/*
* U-Boot general configurations
*/
-#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
/* Print buffer size */
#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* Boot argument buffer size */
-#define CONFIG_AUTO_COMPLETE /* Command auto complete */
-#define CONFIG_CMDLINE_EDITING /* Command history etc */
#ifndef CONFIG_SYS_HOSTNAME
#define CONFIG_SYS_HOSTNAME CONFIG_SYS_BOARD
/* Extra Environment */
#ifndef CONFIG_SPL_BUILD
-#include <config_distro_defaults.h>
#ifdef CONFIG_CMD_DHCP
#define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na)
/*
* Bootcounter
*/
-/* last 2 lwords in OCRAM */
-#define CONFIG_SYS_BOOTCOUNT_ADDR 0xfffffff8
#define CONFIG_SYS_BOOTCOUNT_BE
#endif /* __CONFIG_SOCFPGA_IS1_H__ */
/*
* Bootcounter
*/
-/* last 2 lwords in OCRAM */
-#define CONFIG_SYS_BOOTCOUNT_ADDR 0xfffffff8
#define CONFIG_SYS_BOOTCOUNT_BE
/* Environment setting for SPI flash */
#define CONFIG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200}
-#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
-#define CONFIG_AUTO_COMPLETE 1 /* add autocompletion support */
-
/*
* I2C
*/
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
#define CONFIG_SYS_MEMTEST_START 0x00800000
#define CONFIG_SYS_MEMTEST_END 0x04000000
#define CONFIG_SYS_MALLOC_LEN (1024*1024)
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_CMDLINE_EDITING
#define CONFIG_SYS_LOAD_ADDR 0x00800000
#define CONFIG_SYS_FLASH_EMPTY_INFO
#define CONFIG_SYS_HZ_CLOCK 1000000000 /* 1 GHz */
-#include <config_distro_defaults.h>
/* Environment */
#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
-#define CONFIG_ENV_VARS_UBOOT_CONFIG
-
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 0) \
func(USB, usb, 0) \
/* Extra Commands */
#define CONFIG_CMD_ASKENV
-#define CONFIG_SYS_LONGHELP
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_USB_ETHER_SMSC95XX
/* NET Configs */
-#define CONFIG_BOOTP_SUBNETMASK
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-#define CONFIG_BOOTP_BOOTPATH
#endif /* __CONFIG_H */
#define CONFIG_BOOTCOMMAND \
"run bootcmd_romfs"
-#define CONFIG_ENV_VARS_UBOOT_CONFIG
#define CONFIG_EXTRA_ENV_SETTINGS \
"bootargs_romfs=uclinux.physaddr=0x08180000 root=/dev/mtdblock0\0" \
"bootcmd_romfs=setenv bootargs ${bootargs} ${bootargs_romfs};" \
/*
* Command line configuration.
*/
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
#endif /* __CONFIG_H */
#define CONFIG_BOOTCOMMAND \
"run boot_sd"
-#define CONFIG_ENV_VARS_UBOOT_CONFIG
#define CONFIG_EXTRA_ENV_SETTINGS \
"boot_sd=mmc dev 0;fatload mmc 0 0x00700000 stm32429i-eval.dtb; fatload mmc 0 0x00008000 zImage; icache off; bootz 0x00008000 - 0x00700000"
/*
* Command line configuration.
*/
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
#endif /* __CONFIG_H */
#define CONFIG_BOOTCOMMAND \
"run boot_sd"
-#define CONFIG_ENV_VARS_UBOOT_CONFIG
#define CONFIG_EXTRA_ENV_SETTINGS \
"boot_sd=mmc dev 0;fatload mmc 0 0x00700000 stm32f469-disco.dtb; fatload mmc 0 0x00008000 zImage; icache off; bootz 0x00008000 - 0x00700000"
/*
* Command line configuration.
*/
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
#endif /* __CONFIG_H */
#define CONFIG_BOOTCOMMAND \
"run bootcmd_romfs"
-#define CONFIG_ENV_VARS_UBOOT_CONFIG
#define CONFIG_EXTRA_ENV_SETTINGS \
"bootargs_romfs=uclinux.physaddr=0x08180000 root=/dev/mtdblock0\0" \
"bootcmd_romfs=setenv bootargs ${bootargs} ${bootargs_romfs};" \
/*
* Command line configuration.
*/
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
#define CONFIG_CMD_CACHE
#define CONFIG_BOARD_LATE_INIT
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_BOOTARGS \
"console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
-#define CONFIG_ENV_VARS_UBOOT_CONFIG
-
/*
* Command line configuration.
*/
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
#define CONFIG_CMD_CACHE
#define CONFIG_BOARD_LATE_INIT
#define CONFIG_BOOTARGS \
"console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
-#define CONFIG_ENV_VARS_UBOOT_CONFIG
-
/*
* Command line configuration.
*/
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
#define CONFIG_CMD_CACHE
#define CONFIG_BOARD_LATE_INIT
#define CONFIG_EXTRA_CLOCK
#define CONFIG_PRAM 2048 /* 2048 KB */
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
/* Print Buffer Size */
* Command line configuration.
*/
-#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
-
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
#define CONFIG_SYS_MEMTEST_END 1024*1024
/* Misc configuration */
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_CMDLINE_EDITING
#define CONFIG_BOOTCOMMAND "go 0x40040000"
#define CONFIG_MISC_INIT_R
#ifndef CONFIG_SPL_BUILD
-#include <config_distro_defaults.h>
#ifdef CONFIG_ARM64
/*
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING /* Command-line editing */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
/* NAND devices */
-#define CONFIG_AUTO_COMPLETE
-
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
#define CONFIG_SYS_MAXARGS 32 /* max number of command */
#define CONFIG_DRIVER_TI_EMAC
#define CONFIG_DRIVER_TI_EMAC_USE_RMII
#define CONFIG_MII
-#define CONFIG_BOOTP_DNS
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_NET_RETRY_COUNT 10
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
/* turn on command-line edit/hist/auto */
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_ALT_MEMTEST 1
#define CONFIG_SYS_MEMTEST_START (0x82000000) /* memtest */
#define CONFIG_ENV_SIZE (SZ_128K) /* 1 sector = 128 kB */
#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm"
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_AUTO_COMPLETE
-
/*
* Size of malloc() pool
*/
* Command line configuration
*/
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
-
/*
* Environment settings
*/
/*
* Console configuration
*/
-#define CONFIG_SYS_LONGHELP
#endif /* _CONFIG_TB100_H_ */
/*
* Size of malloc() pool
*/
-#ifdef CONFIG_USB_FUNCTION_DFU
+#ifdef CONFIG_DFU_OVER_USB
#define CONFIG_SYS_MALLOC_LEN (SZ_4M + \
CONFIG_SYS_DFU_DATA_BUF_SIZE + \
CONFIG_SYS_DFU_MAX_FILE_SIZE)
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
/* Environment */
-#define CONFIG_ENV_VARS_UBOOT_CONFIG
#define CONFIG_ENV_SIZE 0x2000 /* Total Size Environment */
/*
#define CONFIG_ENV_OVERWRITE
/* turn on command-line edit/hist/auto */
-#define CONFIG_CMDLINE_EDITING
/*
* Increasing the size of the IO buffer as default nfsargs size is more
/* Misc utility code */
#define CONFIG_BOUNCE_BUFFER
-#ifndef CONFIG_SPL_BUILD
-#include <config_distro_defaults.h>
-#endif
-
#endif /* _TEGRA_COMMON_H_ */
/*
* Bootcounter
*/
-#define CONFIG_BOOTCOUNT_RAM
/* Max size of RAM minus BOOTCOUNT_ADDR is the bootcounter address */
#define BOOTCOUNT_ADDR 0x1000
/* BOOTP options */
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-#define CONFIG_BOOTP_PXE
/* Miscellaneous configurable options */
#define CONFIG_SYS_LOAD_ADDR (MEM_BASE)
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_CMDLINE_EDITING 1
#define CONFIG_SYS_MAXARGS 64 /* max command args */
#define CONFIG_NO_RELOCATION 1
#define PLL_REF_CLK 50000000 /* 50 MHz */
#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
#define CONFIG_SYS_MALLOC_LEN (1024 << 10)
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_MACH_TYPE MACH_TYPE_TI8148EVM
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
/* commands to include */
-#define CONFIG_ENV_VARS_UBOOT_CONFIG
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
#define CONFIG_EXTRA_ENV_SETTINGS \
"loadaddr=0x80200000\0" \
/* Ethernet */
#define CONFIG_DRIVER_TI_CPSW
#define CONFIG_MII
-#define CONFIG_BOOTP_DNS
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_NET_RETRY_COUNT 10
#define CONFIG_PHY_ET1011C
#define CONFIG_PHY_ET1011C_TX_CLK_FIX
#define CONFIG_DRIVER_TI_EMAC
#define CONFIG_MII
-#define CONFIG_BOOTP_DNS
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_NET_RETRY_COUNT 10
/* Since SPL did pll and ddr initialization for us,
#ifndef CONFIG_SPL_BUILD
/* Network defines. */
-#define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_NET_RETRY_COUNT 10
#define CONFIG_MII /* Required in net/eth.c */
#endif
#define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */
-/*
- * RTC related defines. To use bootcount you must set bootlimit in the
- * environment to a non-zero value and enable CONFIG_BOOTCOUNT_LIMIT
- * in the board config.
- */
-#define CONFIG_SYS_BOOTCOUNT_ADDR 0x44E3E000
-
/*
* SPL related defines. The Public RAM memory map the ROM defines the
* area between 0x402F0400 and 0x4030B800 as a download area and
* console baudrate of 115200 and use the default baud rate table.
*/
#define CONFIG_SYS_MALLOC_LEN SZ_32M
-#define CONFIG_ENV_VARS_UBOOT_CONFIG /* Strongly encouraged */
#define CONFIG_ENV_OVERWRITE /* Overwrite ethaddr / serial# */
/* As stated above, the following choices are optional. */
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
/* We set the max number of command args high to avoid HUSH bugs. */
#define CONFIG_SYS_MAXARGS 64
#define CONFIG_MTD_DEVICE /* Required for mtdparts */
#endif
-#define CONFIG_SUPPORT_RAW_INITRD
-
/*
* Our platforms make use of SPL to initalize the hardware (primarily
* memory) enough for full U-Boot to be loaded. We make use of the general
#define NETARGS ""
#endif
-#include <config_distro_defaults.h>
-
#endif /* __CONFIG_TI_ARMV7_COMMON_H__ */
#define CONFIG_PHY_MARVELL
#define CONFIG_MII
#define CONFIG_BOOTP_DEFAULT
-#define CONFIG_BOOTP_DNS
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_NET_RETRY_COUNT 32
* Command
*/
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* Boot argument buffer size */
-#define CONFIG_AUTO_COMPLETE /* Command auto complete */
-#define CONFIG_CMDLINE_EDITING /* Command history etc */
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
/* USB, USB storage, USB ethernet */
/* LED */
/* Bootcounter */
-#define CONFIG_SYS_BOOTCOUNT_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_BOOTCOUNT_BE
#endif /* __CONFIG_TQMA6_WRU4_H */
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_ENV_VARS_UBOOT_CONFIG
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
/* Tizen - partitions definitions */
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_ENV_VARS_UBOOT_CONFIG
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
/* Tizen - partitions definitions */
#endif /* CONFIG_FLASHCARD */
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING /* enable cmdline history */
-#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0 + 0x00000000)
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-#define CONFIG_CMDLINE_EDITING
-
/*-----------------------------------------------------------------------
* Physical Memory Map
*/
/* Include the common distro boot environment */
#ifndef CONFIG_SPL_BUILD
-#include <config_distro_defaults.h>
#ifdef CONFIG_MMC
#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
#ifndef __CONFIG_H
#define __CONFIG_H
-#include <config_distro_defaults.h>
#include "mx6_common.h"
#include "imx6_spl.h"
/* serial console configuration */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-
-#define CONFIG_CMDLINE_EDITING /* add command line history */
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_BOOTM_LEN (32 << 20)
-#define CONFIG_CMDLINE_EDITING /* add command line history */
-
#if defined(CONFIG_ARM64)
/* ARM Trusted Firmware */
#define BOOT_IMAGES \
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/* SDRAM */
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_EXTRA_ENV_SETTINGS \
"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_SYS_LONGHELP
-
/*
* Size of malloc() pool
*/
#include <asm/arch/imx-regs.h>
-#include <config_distro_defaults.h>
-
/* U-Boot environment */
#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
#define CONFIG_ENV_SIZE (8 * 1024)
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-#define CONFIG_BOOTP_SUBNETMASK
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
-#define CONFIG_CMDLINE_EDITING /* add command line history */
/*
* FLASH and environment organization
#if defined(CONFIG_VCT_SMALL_IMAGE)
#undef CONFIG_SYS_I2C_SOFT
#undef CONFIG_SOURCE
-#undef CONFIG_SYS_LONGHELP
#undef CONFIG_TIMESTAMP
#endif /* CONFIG_VCT_SMALL_IMAGE */
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
-#define CONFIG_CMDLINE_EDITING 1
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
-
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_REMAKE_ELF
-#define CONFIG_SUPPORT_RAW_INITRD
-
/* Link Definitions */
#if defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) || \
defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM)
/* BOOTP options */
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-#define CONFIG_BOOTP_PXE
/* Miscellaneous configurable options */
#define CONFIG_SYS_LOAD_ADDR (V2M_BASE + 0x10000000)
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_CMDLINE_EDITING
#define CONFIG_SYS_MAXARGS 64 /* max command args */
#ifdef CONFIG_TARGET_VEXPRESS64_JUNO
/* BOOTP options */
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/* Miscellaneous configurable options */
#define CONFIG_SYS_LOAD_ADDR (V2M_BASE + 0x8000)
GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET
-#include <config_distro_defaults.h>
-
/* Basic environment settings */
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 1) \
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
-#define CONFIG_SYS_LONGHELP
#endif /* VEXPRESS_COMMON_H */
"else run netboot; fi"
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#undef CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_MEMTEST_START 0x80010000
#define CONFIG_SYS_MEMTEST_END 0x87C00000
#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR + 0x4500)
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR + 0x4600)
-#define CONFIG_CMDLINE_EDITING /* add command line history */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
-
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_FSL
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
#ifndef __CONFIG_H
#define __CONFIG_H
-#include <config_distro_defaults.h>
#include "mx6_common.h"
#include "imx6_spl.h"
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/* SDRAM */
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_MAXARGS 16
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_AUTO_COMPLETE
/*
* Size of malloc() pool
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/* SDRAM */
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_PBSIZE \
(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_AUTO_COMPLETE
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (2 * 1024 * 1024)
/*
* Command definition
*/
-#define CONFIG_BOOTP_SUBNETMASK
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_DNS
#define CONFIG_NET_RETRY_COUNT 100
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING
-
-#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x10000
/*
* U-Boot General Configurations
*/
-#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_CBSIZE 1024
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
-
/*
* NAND chip timings for FIXME: which one?
*/
#define CONFIG_SYS_MEMTEST_START 0x00800000
#define CONFIG_SYS_MEMTEST_END 0x04000000
#define CONFIG_SYS_MALLOC_LEN (8 << 20)
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_LOAD_ADDR 0x00800000
-/* Use last 2 lwords in internal SRAM for bootcounter */
-#define CONFIG_SYS_BOOTCOUNT_ADDR (CONFIG_SRAM_BASE + \
- CONFIG_SRAM_SIZE)
-
#define CONFIG_HOSTNAME x600
#define CONFIG_UBI_PART ubi0
#define CONFIG_UBIFS_VOLUME rootfs
9600, 19200, 38400, 115200}
#define CONFIG_SYS_NS16550_PORT_MAPPED
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_AUTO_COMPLETE
-
/*-----------------------------------------------------------------------
* Command line configuration.
*/
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_CBSIZE 512
#define CONFIG_SYS_MEMTEST_START 0x00100000
#define CONFIG_TFTP_TSIZE
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/* Default environment */
#define CONFIG_ROOTPATH "/opt/nfsroot"
/* BOOTP options */
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
#define CONFIG_BOOTP_MAY_FAIL
-#define CONFIG_BOOTP_DNS
-#define CONFIG_BOOTP_PXE
-#define CONFIG_BOOTP_SUBNETMASK
-
-/* Diff from config_distro_defaults.h */
-#define CONFIG_SUPPORT_RAW_INITRD
-#if !defined(CONFIG_SPL_BUILD)
-#define CONFIG_ENV_VARS_UBOOT_CONFIG
-#endif
-#define CONFIG_AUTO_COMPLETE
#if defined(CONFIG_MMC_SDHCI_ZYNQ)
# define CONFIG_SUPPORT_EMMC_BOOT
/* Console I/O Buffer Size */
#define CONFIG_SYS_CBSIZE 2048
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_CMDLINE_EDITING
#define CONFIG_PANIC_HANG
#define CONFIG_SYS_MAXARGS 64
#undef CONFIG_EXTRA_ENV_SETTINGS
#undef CONFIG_SYS_MALLOC_LEN
#undef CONFIG_ENV_SIZE
-#undef CONFIG_CMDLINE_EDITING
-#undef CONFIG_AUTO_COMPLETE
#undef CONFIG_ZLIB
#undef CONFIG_GZIP
#undef CONFIG_CMD_ENV
#undef CONFIG_MP
#undef CONFIG_SYS_INIT_SP_ADDR
-#undef CONFIG_SYS_LONGHELP
#undef CONFIG_MTD_DEVICE
#undef CONFIG_BOOTM_NETBSD
#undef CONFIG_BOOTM_VXWORKS
/* BOOTP options */
#undef CONFIG_BOOTP_BOOTFILESIZE
-#undef CONFIG_BOOTP_BOOTPATH
-#undef CONFIG_BOOTP_GATEWAY
-#undef CONFIG_BOOTP_HOSTNAME
#undef CONFIG_BOOTP_MAY_FAIL
-#undef CONFIG_BOOTP_PXE
#undef CONFIG_CMD_UNZIP
#undef CONFIG_NR_DRAM_BANKS
#define CONFIG_ENV_SIZE 0x10000
#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MALLOC_LEN 0x800000
-#define CONFIG_SYS_LONGHELP
#endif /* __CONFIG_ZYNQMP_MINI_EMMC_H */
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_CMDLINE_EDITING 1 /* Command-line editing */
#define CONFIG_LOADADDR 0x1000000 /* default location for tftp and bootm */
#define CONFIG_PREBOOT /* enable preboot variable */
#define CONFIG_INTEGRITY /* support booting INTEGRITY OS */
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
-#define CONFIG_AUTO_COMPLETE 1 /* add autocompletion support */
#define CONFIG_LOADADDR 0x1000000 /* default location for tftp and bootm */
#define CONFIG_PREBOOT /* enable preboot variable */
#define CONFIG_INTEGRITY /* support booting INTEGRITY OS */
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
-#define CONFIG_AUTO_COMPLETE 1 /* add autocompletion support */
#define CONFIG_LOADADDR 0x1000000 /* default location for tftp and bootm */
#define CONFIG_PREBOOT /* enable preboot variable */
#define CONFIG_INTEGRITY /* support booting INTEGRITY OS */
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
-#define CONFIG_AUTO_COMPLETE 1 /* add autocompletion support */
#define CONFIG_LOADADDR 0x1000000 /* default location for tftp and bootm */
#define CONFIG_PREBOOT /* enable preboot variable */
#define CONFIG_INTEGRITY /* support booting INTEGRITY OS */
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_HZ 1000
-#define CONFIG_CMDLINE_EDITING
-
/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
#define CONFIG_SYS_MEMORY_SIZE CONFIG_SYS_SDRAM_SIZE
#endif
-#define CONFIG_SYS_MEMORY_TOP MEMADDR(CONFIG_SYS_MEMORY_SIZE)
-#define CONFIG_SYS_TEXT_ADDR \
- (CONFIG_SYS_MEMORY_TOP - CONFIG_SYS_MONITOR_LEN)
+#define XTENSA_SYS_TEXT_ADDR \
+ (MEMADDR(CONFIG_SYS_MEMORY_SIZE) - CONFIG_SYS_MONITOR_LEN)
/* Used by tftpboot; env var 'loadaddr' */
#define CONFIG_SYS_LOAD_ADDR MEMADDR(0x02000000)
/* U-Boot autoboot configuration */
/*==============================*/
-#define CONFIG_AUTO_COMPLETE /* Support tab autocompletion */
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_SYS_LONGHELP
#define CONFIG_MX_CYCLIC
#define CONFIG_SHOW_BOOT_PROGRESS
#endif
#endif
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-
#define CONFIG_SYS_DEVICE_NULLDEV 1
/*
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM + (512*1024))
#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM + PHYS_SDRAM_SIZE)
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_CMDLINE_EDITING
-
#define CONFIG_PREBOOT ""
#if defined(CONFIG_ZYNQ_GEM)
# define CONFIG_MII
# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
-# define CONFIG_BOOTP_BOOTPATH
-# define CONFIG_BOOTP_GATEWAY
-# define CONFIG_BOOTP_HOSTNAME
# define CONFIG_BOOTP_MAY_FAIL
#endif
#ifdef CONFIG_SPL_BUILD
#define BOOTENV
#else
-#include <config_distro_defaults.h>
#ifdef CONFIG_CMD_MMC
#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
/* Miscellaneous configurable options */
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_SYS_LONGHELP
#define CONFIG_CLOCKS
#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
#undef CONFIG_EXTRA_ENV_SETTINGS
#undef CONFIG_BOARD_LATE_INIT
#undef CONFIG_ENV_SIZE
-#undef CONFIG_CMDLINE_EDITING
-#undef CONFIG_AUTO_COMPLETE
#undef CONFIG_ZLIB
#undef CONFIG_GZIP
-#undef CONFIG_SYS_LONGHELP
-
#undef CONFIG_SYS_CBSIZE
#undef CONFIG_BOOTM_VXWORKS
#undef CONFIG_BOOTM_LINUX
*/
ofnode ofnode_next_subnode(ofnode node);
+/**
+ * ofnode_get_parent() - get the ofnode's parent (enclosing ofnode)
+ *
+ * @node: valid node to look up
+ * @return ofnode reference of the parent node
+ */
+ofnode ofnode_get_parent(ofnode node);
+
/**
* ofnode_get_name() - get the name of a node
*
*/
const char *ofnode_get_name(ofnode node);
+/**
+ * ofnode_get_by_phandle() - get ofnode from phandle
+ *
+ * @phandle: phandle to look up
+ * @return ofnode reference to the phandle
+ */
+ofnode ofnode_get_by_phandle(uint phandle);
+
/**
* ofnode_read_size() - read the size of a property
*
typedef phys_addr_t fdt_addr_t;
typedef phys_size_t fdt_size_t;
#ifdef CONFIG_PHYS_64BIT
-#define FDT_ADDR_T_NONE (-1ULL)
+#define FDT_ADDR_T_NONE (-1U)
#define fdt_addr_to_cpu(reg) be64_to_cpu(reg)
#define fdt_size_to_cpu(reg) be64_to_cpu(reg)
typedef fdt64_t fdt_val_t;
#define MMC_VERSION_4_1 MAKE_MMC_VERSION(4, 1, 0)
#define MMC_VERSION_4_2 MAKE_MMC_VERSION(4, 2, 0)
#define MMC_VERSION_4_3 MAKE_MMC_VERSION(4, 3, 0)
+#define MMC_VERSION_4_4 MAKE_MMC_VERSION(4, 4, 0)
#define MMC_VERSION_4_41 MAKE_MMC_VERSION(4, 4, 1)
#define MMC_VERSION_4_5 MAKE_MMC_VERSION(4, 5, 0)
#define MMC_VERSION_5_0 MAKE_MMC_VERSION(5, 0, 0)
int uec_standard_init(bd_t *bis);
int uli526x_initialize(bd_t *bis);
int armada100_fec_register(unsigned long base_addr);
-int xilinx_ll_temac_eth_init(bd_t *bis, unsigned long base_addr, int flags,
- unsigned long ctrl_addr);
-/*
- * As long as the Xilinx xps_ll_temac ethernet driver has not its own interface
- * exported by a public hader file, we need a global definition at this point.
- */
-#if defined(CONFIG_XILINX_LL_TEMAC)
-#define XILINX_LL_TEMAC_M_FIFO 0 /* use FIFO Ctrl */
-#define XILINX_LL_TEMAC_M_SDMA_PLB (1 << 0)/* use SDMA Ctrl via PLB */
-#define XILINX_LL_TEMAC_M_SDMA_DCR (1 << 1)/* use SDMA Ctrl via DCR */
-#endif
/* Boards with PCI network controllers can call this from their board_eth_init()
* function to initialize whatever's on board.
If unset, timeout and maximum are hard-defined as 1 second
and 10 timouts per TFTP transfer.
+config BOOTP_BOOTPATH
+ bool "Enable BOOTP BOOTPATH"
+
+config BOOTP_DNS
+ bool "Enable bootp DNS"
+
+config BOOTP_GATEWAY
+ bool "Enable BOOTP gateway"
+
+config BOOTP_HOSTNAME
+ bool "Enable BOOTP hostname"
+
+config BOOTP_PXE
+ bool "Enable BOOTP PXE"
+
+config BOOTP_SUBNETMASK
+ bool "Enable BOOTP subnetmask"
+
config BOOTP_PXE_CLIENTARCH
hex
default 0x16 if ARM64
CONFIG_ATMEL_NAND_HW_PMECC
CONFIG_ATMEL_SPI0
CONFIG_AT_TRANS
-CONFIG_AUTO_COMPLETE
CONFIG_AUTO_ZRELADDR
CONFIG_BACKSIDE_L2_CACHE
CONFIG_BARIX_IPAM390
CONFIG_BOARD_TAURUS
CONFIG_BOARD_TYPES
CONFIG_BOOGER
-CONFIG_BOOM
CONFIG_BOOTBLOCK
-CONFIG_BOOTCOUNT_ALEN
-CONFIG_BOOTCOUNT_AM33XX
-CONFIG_BOOTCOUNT_ENV
-CONFIG_BOOTCOUNT_I2C
-CONFIG_BOOTCOUNT_LIMIT
-CONFIG_BOOTCOUNT_RAM
CONFIG_BOOTFILE
CONFIG_BOOTMAPSZ
CONFIG_BOOTMODE
CONFIG_BOOTP_
CONFIG_BOOTP_BOOTFILE
CONFIG_BOOTP_BOOTFILESIZE
-CONFIG_BOOTP_BOOTPATH
CONFIG_BOOTP_DEFAULT
CONFIG_BOOTP_DHCP_REQUEST_DELAY
-CONFIG_BOOTP_DNS
CONFIG_BOOTP_DNS2
-CONFIG_BOOTP_GATEWAY
-CONFIG_BOOTP_HOSTNAME
CONFIG_BOOTP_ID_CACHE_SIZE
CONFIG_BOOTP_MAY_FAIL
CONFIG_BOOTP_NISDOMAIN
CONFIG_BOOTP_NTPSERVER
-CONFIG_BOOTP_PXE
CONFIG_BOOTP_RANDOM_DELAY
CONFIG_BOOTP_SEND_HOSTNAME
CONFIG_BOOTP_SERVERIP
-CONFIG_BOOTP_SUBNETMASK
CONFIG_BOOTP_TIMEOFFSET
CONFIG_BOOTP_VENDOREX
CONFIG_BOOTROM_ERR_REG
CONFIG_CLOCKS_IN_MHZ
CONFIG_CLOCK_SYNTHESIZER
CONFIG_CM922T_XA10
-CONFIG_CMDLINE_EDITING
CONFIG_CMDLINE_PS_SUPPORT
CONFIG_CMDLINE_TAG
CONFIG_CM_INIT
CONFIG_DEBUG_FS
CONFIG_DEBUG_LED
CONFIG_DEBUG_LOCK_ALLOC
-CONFIG_DEBUG_SECTION_MISMATCH
CONFIG_DEBUG_SEMIHOSTING
CONFIG_DEBUG_UART_LINFLEXUART
CONFIG_DEBUG_WRITECOUNT
CONFIG_ENV_UBIFS_OPTION
CONFIG_ENV_UBI_MTD
CONFIG_ENV_UBI_VOLUME_REDUND
-CONFIG_ENV_VARS_UBOOT_CONFIG
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
CONFIG_ENV_VERSION
CONFIG_EP9301
CONFIG_FTPMU010_BASE
CONFIG_FTPMU010_POWER
CONFIG_FTPWM010_BASE
-CONFIG_FTRACE_MCOUNT_RECORD
CONFIG_FTRTC010_BASE
CONFIG_FTRTC010_EXTCLK
CONFIG_FTRTC010_PCLK
CONFIG_FTWDT010_WATCHDOG
CONFIG_FZOTG266HD0A_BASE
CONFIG_GATEWAYIP
-CONFIG_GCOV_KERNEL
-CONFIG_GCOV_PROFILE_ALL
CONFIG_GICV2
CONFIG_GICV3
CONFIG_GLOBAL_DATA_NOT_REG10
CONFIG_HIDE_LOGO_VERSION
CONFIG_HIGH_BATS
CONFIG_HIKEY_GPIO
-CONFIG_HIS_DRIVER
CONFIG_HITACHI_SX14
CONFIG_HOSTNAME
CONFIG_HOST_MAX_DEVICES
CONFIG_JFFS2_SUMMARY
CONFIG_JRSTARTR_JR0
CONFIG_JTAG_CONSOLE
-CONFIG_KASAN
CONFIG_KCLK_DIS
CONFIG_KEEP_SERVERADDR
CONFIG_KERNEL_OFFSET
CONFIG_MMC_SUNXI_SLOT
CONFIG_MMC_TRACE
CONFIG_MMU
-CONFIG_MODVERSIONS
CONFIG_MONITOR_IS_IN_RAM
CONFIG_MP
CONFIG_MPC8308
CONFIG_SHARP_LQ035Q7DH06
CONFIG_SHEEVA_88SV131
CONFIG_SHEEVA_88SV331xV5
-CONFIG_SHELL
CONFIG_SHMIN
CONFIG_SHOW_ACTIVITY
CONFIG_SHOW_BOOT_PROGRESS
CONFIG_SUPERH_ON_CHIP_R8A66597
CONFIG_SUPPORT_EMMC_BOOT
CONFIG_SUPPORT_EMMC_RPMB
-CONFIG_SUPPORT_RAW_INITRD
CONFIG_SUVD3
CONFIG_SXNI855T
CONFIG_SYSFLAGS_ADDR
CONFIG_SYS_BOOK3E_HV
CONFIG_SYS_BOOTCOUNT_BE
CONFIG_SYS_BOOTCOUNT_LE
-CONFIG_SYS_BOOTCOUNT_SINGLEWORD
CONFIG_SYS_BOOTFILE_PREFIX
CONFIG_SYS_BOOTMAPSZ
CONFIG_SYS_BOOTM_LEN
CONFIG_SYS_LOADS_BAUD_CHANGE
CONFIG_SYS_LOAD_ADDR
CONFIG_SYS_LOAD_ADDR2
-CONFIG_SYS_LONGHELP
CONFIG_SYS_LOW
CONFIG_SYS_LOWBOOT
CONFIG_SYS_LOWMEM_BASE
CONFIG_X86_REFCODE_RUN_ADDR
CONFIG_XGI_XG22_BASE
CONFIG_XILINX_GPIO
-CONFIG_XILINX_LL_TEMAC_CLK
CONFIG_XILINX_SPI_IDLE_VAL
CONFIG_XILINX_TB_WATCHDOG
CONFIG_XR16L2751
#
# This file extracts default envs from built u-boot
-# usage: get_default_envs.sh > u-boot-env-default.txt
+# usage: get_default_envs.sh [build dir] > u-boot-env-default.txt
set -ue
-ENV_OBJ_FILE="env_common.o"
+: "${OBJCOPY:=${CROSS_COMPILE:-}objcopy}"
+
+ENV_OBJ_FILE="built-in.o"
ENV_OBJ_FILE_COPY="copy_${ENV_OBJ_FILE}"
echoerr() { echo "$@" 1>&2; }
-path=$(readlink -f $0)
-env_obj_file_path=$(find ${path%/scripts*} -not -path "*/spl/*" \
+if [ "$#" -eq 1 ]; then
+ path=${1}
+else
+ path=$(readlink -f $0)
+ path=${path%/scripts*}
+fi
+
+env_obj_file_path=$(find ${path} -path "*/env/*" -not -path "*/spl/*" \
-name "${ENV_OBJ_FILE}")
[ -z "${env_obj_file_path}" ] && \
{ echoerr "File '${ENV_OBJ_FILE}' not found!"; exit 1; }
cp ${env_obj_file_path} ${ENV_OBJ_FILE_COPY}
# NOTE: objcopy saves its output to file passed in
-# (copy_env_common.o in this case)
-objcopy -O binary -j ".rodata.default_environment" ${ENV_OBJ_FILE_COPY}
+# (copy_${ENV_OBJ_FILE} in this case)
+
+${OBJCOPY} -O binary -j ".rodata.default_environment" ${ENV_OBJ_FILE_COPY}
# Replace default '\0' with '\n' and sort entries
tr '\0' '\n' < ${ENV_OBJ_FILE_COPY} | sort -u
#include <openssl/err.h>
#include <openssl/evp.h>
-#if OPENSSL_VERSION_NUMBER < 0x10100000L || defined(LIBRESSL_VERSION_NUMBER)
+#if OPENSSL_VERSION_NUMBER < 0x10100000L || \
+ (defined(LIBRESSL_VERSION_NUMBER) && LIBRESSL_VERSION_NUMBER < 0x2070000fL)
static void RSA_get0_key(const RSA *r,
const BIGNUM **n, const BIGNUM **e, const BIGNUM **d)
{
*d = r->d;
}
-#else
+#elif !defined(LIBRESSL_VERSION_NUMBER)
void EVP_MD_CTX_cleanup(EVP_MD_CTX *ctx)
{
EVP_MD_CTX_reset(ctx);