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arm64: mvebu: Add pin control nodes to A8K family DTS files
authorKonstantin Porotchkin <kostap@marvell.com>
Thu, 8 Dec 2016 10:22:30 +0000 (12:22 +0200)
committerStefan Roese <sr@denx.de>
Mon, 12 Dec 2016 08:04:52 +0000 (09:04 +0100)
Add pin control nodes to APN806, CP-master, CP-slave and
Armada-7040 and Armada-8040 boards DTS files

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
arch/arm/dts/armada-7040-db.dts patch | blob | blame | history
arch/arm/dts/armada-8040-db.dts patch | blob | blame | history
arch/arm/dts/armada-ap806.dtsi patch | blob | blame | history
arch/arm/dts/armada-cp110-master.dtsi patch | blob | blame | history
arch/arm/dts/armada-cp110-slave.dtsi patch | blob | blame | history
doc/device-tree-bindings/pinctrl/marvell,mvebu-pinctrl.txt patch | blob | blame | history

diff --git a/arch/arm/dts/armada-7040-db.dts b/arch/arm/dts/armada-7040-db.dts
index 1e4d676f6773cc840d967b4730674539b31159a0..466c6dcc3f3b25c7038b0ae0a63074a012a2aedf 100644 (file)
--- a/arch/arm/dts/armada-7040-db.dts
+++ b/arch/arm/dts/armada-7040-db.dts
@@ -66,6 +66,16 @@
        };
 };
 
+&ap_pinctl {
+          /* MPP Bus:
+           * SDIO  [0-5]
+           * UART0 [11,19]
+           */
+                 /* 0 1 2 3 4 5 6 7 8 9 */
+       pin-func = < 1 1 1 1 1 1 0 0 0 0
+                    0 3 0 0 0 0 0 0 0 3 >;
+};
+
 &uart0 {
        status = "okay";
 };
@@ -76,11 +86,37 @@
 };
 
 &cpm_i2c0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&cpm_i2c0_pins>;
        status = "okay";
        clock-frequency = <100000>;
 };
 
+&cpm_pinctl {
+               /* MPP Bus:
+                * TDM   [0-11]
+                * SPI   [13-16]
+                * SATA1 [28]
+                * UART0 [29-30]
+                * SMI   [32,34]
+                * XSMI  [35-36]
+                * I2C   [37-38]
+                * RGMII1[44-55]
+                * SD    [56-62]
+                */
+               /*   0   1   2   3   4   5   6   7   8   9 */
+       pin-func = < 4   4   4   4   4   4   4   4   4   4
+                    4   4   0   3   3   3   3   0   0   0
+                    0   0   0   0   0   0   0   0   9   0xA
+                    0xA 0   7   0   7   7   7   2   2   0
+                    0   0   0   0   1   1   1   1   1   1
+                    1   1   1   1   1   1   0xE 0xE 0xE 0xE
+                    0xE 0xE 0xE >;
+};
+
 &cpm_spi1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&cpm_spi0_pins>;
        status = "okay";
 
        spi-flash@0 {
diff --git a/arch/arm/dts/armada-8040-db.dts b/arch/arm/dts/armada-8040-db.dts
index 86666a128c1ef1786c89d7fdc891c1fbf2afa81d..40def9d6cddff4551c1ded6b13c08fbfe241b382 100644 (file)
--- a/arch/arm/dts/armada-8040-db.dts
+++ b/arch/arm/dts/armada-8040-db.dts
@@ -71,6 +71,41 @@
        status = "okay";
 };
 
+&ap_pinctl {
+       /* MPP Bus:
+        * SDIO  [0-10]
+        * UART0 [11,19]
+        */
+                 /* 0 1 2 3 4 5 6 7 8 9 */
+       pin-func = < 1 1 1 1 1 1 1 1 1 1
+                    1 3 0 0 0 0 0 0 0 3 >;
+};
+
+&cpm_pinctl {
+       /* MPP Bus:
+        * [0-31] = 0xff: Keep default CP0_shared_pins:
+        * [11] CLKOUT_MPP_11 (out)
+        * [23] LINK_RD_IN_CP2CP (in)
+        * [25] CLKOUT_MPP_25 (out)
+        * [29] AVS_FB_IN_CP2CP (in)
+        * [32,34] SMI
+        * [31]    GPIO: push button/Wake
+        * [35-36] GPIO
+        * [37-38] I2C
+        * [40-41] SATA[0/1]_PRESENT_ACTIVEn
+        * [42-43] XSMI
+        * [44-55] RGMII1
+        * [56-62] SD
+        */
+               /*   0    1    2    3    4    5    6    7    8    9 */
+       pin-func = < 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
+                    0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
+                    0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
+                    0xff 0    7    0    7    0    0    2    2    0
+                    0    0    8    8    1    1    1    1    1    1
+                    1    1    1    1    1    1    0xe  0xe  0xe  0xe
+                    0xe  0xe  0xe >;
+};
 
 /* CON5 on CP0 expansion */
 &cpm_pcie2 {
@@ -78,6 +113,8 @@
 };
 
 &cpm_i2c0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&cpm_i2c0_pins>;
        status = "okay";
        clock-frequency = <100000>;
 };
@@ -97,12 +134,31 @@
        status = "okay";
 };
 
+&cps_pinctl {
+       /* MPP Bus:
+        * [0-11]  RGMII0
+        * [13-16] SPI1
+        * [27,31] GE_MDIO/MDC
+        * [32-62] = 0xff: Keep default CP1_shared_pins:
+        */
+               /*   0    1    2    3    4    5    6    7    8    9 */
+       pin-func = < 0x3  0x3  0x3  0x3  0x3  0x3  0x3  0x3  0x3  0x3
+                    0x3  0x3  0xff 0x3  0x3  0x3  0x3  0xff 0xff 0xff
+                    0xff 0xff 0xff 0xff 0xff 0xff 0xff 0x8  0xff 0xff
+                    0xff 0x8  0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
+                    0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
+                    0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
+                    0xff 0xff 0xff >;
+};
+
 /* CON5 on CP1 expansion */
 &cps_pcie2 {
        status = "okay";
 };
 
 &cps_spi1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&cps_spi1_pins>;
        status = "okay";
 
        spi-flash@0 {
diff --git a/arch/arm/dts/armada-ap806.dtsi b/arch/arm/dts/armada-ap806.dtsi
index d315b29cd0583213488a5018913414474904b024..efb383b9f394cd29bdc3e5e67bff778bd3e14852 100644 (file)
--- a/arch/arm/dts/armada-ap806.dtsi
+++ b/arch/arm/dts/armada-ap806.dtsi
@@ -140,6 +140,24 @@
                                marvell,spi-base = <128>, <136>, <144>, <152>;
                        };
 
+                       ap_pinctl: ap-pinctl@6F4000 {
+                               compatible = "marvell,armada-ap806-pinctrl";
+                               bank-name ="apn-806";
+                               reg = <0x6F4000 0x10>;
+                               pin-count = <20>;
+                               max-func = <3>;
+
+                               ap_i2c0_pins: i2c-pins-0 {
+                                       marvell,pins = < 4 5 >;
+                                       marvell,function = <3>;
+                               };
+                               ap_emmc_pins: emmc-pins-0 {
+                                       marvell,pins = < 0 1 2 3 4 5 6 7
+                                                        8 9 10 >;
+                                       marvell,function = <1>;
+                               };
+                       };
+
                        xor@400000 {
                                compatible = "marvell,mv-xor-v2";
                                reg = <0x400000 0x1000>,
diff --git a/arch/arm/dts/armada-cp110-master.dtsi b/arch/arm/dts/armada-cp110-master.dtsi
index 422d7544012df6733f68f9499c1d44a9b1af5c5e..d637867615fd190b44a55efcfbea8efaf9451b4a 100644 (file)
--- a/arch/arm/dts/armada-cp110-master.dtsi
+++ b/arch/arm/dts/armada-cp110-master.dtsi
@@ -81,6 +81,38 @@
                                        "cpm-usb3dev", "cpm-eip150", "cpm-eip197";
                        };
 
+                       cpm_pinctl: cpm-pinctl@440000 {
+                               compatible = "marvell,mvebu-pinctrl",
+                                            "marvell,a70x0-pinctrl",
+                                            "marvell,a80x0-cp0-pinctrl";
+                               bank-name ="cp0-110";
+                               reg = <0x440000 0x20>;
+                               pin-count = <63>;
+                               max-func = <0xf>;
+
+                               cpm_i2c0_pins: cpm-i2c-pins-0 {
+                                       marvell,pins = < 37 38 >;
+                                       marvell,function = <2>;
+                               };
+                               cpm_ge2_rgmii_pins: cpm-ge-rgmii-pins-0 {
+                                       marvell,pins = < 44 45 46 47 48 49 50 51
+                                                        52 53 54 55 >;
+                                       marvell,function = <1>;
+                               };
+                               pca0_pins: cpm-pca0_pins {
+                                       marvell,pins = <62>;
+                                       marvell,function = <0>;
+                               };
+                               cpm_sdhci_pins: cpm-sdhi-pins-0 {
+                                       marvell,pins = < 56 57 58 59 60 61 >;
+                                       marvell,function = <14>;
+                               };
+                               cpm_spi0_pins: cpm-spi-pins-0 {
+                                       marvell,pins = < 13 14 15 16 >;
+                                       marvell,function = <3>;
+                               };
+                       };
+
                        cpm_sata0: sata@540000 {
                                compatible = "marvell,armada-8k-ahci";
                                reg = <0x540000 0x30000>;
diff --git a/arch/arm/dts/armada-cp110-slave.dtsi b/arch/arm/dts/armada-cp110-slave.dtsi
index a7f77b95153c91e34b7d8eb06e6f1d69c2517be2..92ef55cf267218834f9e63dcee0f4c5826d31d23 100644 (file)
--- a/arch/arm/dts/armada-cp110-slave.dtsi
+++ b/arch/arm/dts/armada-cp110-slave.dtsi
@@ -81,6 +81,25 @@
                                        "cps-usb3dev", "cps-eip150", "cps-eip197";
                        };
 
+                       cps_pinctl: cps-pinctl@440000 {
+                               compatible = "marvell,mvebu-pinctrl",
+                                            "marvell,a80x0-cp1-pinctrl";
+                               bank-name ="cp1-110";
+                               reg = <0x440000 0x20>;
+                               pin-count = <63>;
+                               max-func = <0xf>;
+
+                               cps_ge1_rgmii_pins: cps-ge-rgmii-pins-0 {
+                                       marvell,pins = < 0  1  2  3  4  5  6  7
+                                                        8  9  10 11 >;
+                                       marvell,function = <3>;
+                               };
+                               cps_spi1_pins: cps-spi-pins-1 {
+                                       marvell,pins = < 13 14 15 16 >;
+                                       marvell,function = <3>;
+                               };
+                       };
+
                        cps_sata0: sata@540000 {
                                compatible = "marvell,armada-8k-ahci";
                                reg = <0x540000 0x30000>;
diff --git a/doc/device-tree-bindings/pinctrl/marvell,mvebu-pinctrl.txt b/doc/device-tree-bindings/pinctrl/marvell,mvebu-pinctrl.txt
index 0973db8ae69a062cf82e0c20960157ca6f2c5501..5f86c0a00bfa75c5c04cd7cfc76509f6b746a2b4 100644 (file)
--- a/doc/device-tree-bindings/pinctrl/marvell,mvebu-pinctrl.txt
+++ b/doc/device-tree-bindings/pinctrl/marvell,mvebu-pinctrl.txt
@@ -37,10 +37,10 @@ Example:
                                pin-count = <20>;
                                max-func = <3>;
                                /* MPP Bus:
-                                       SPI0 [0-3]
-                                       I2C0 [4-5]
-                                       UART0 [11,19]
-                               */
+                                * SPI0 [0-3]
+                                * I2C0 [4-5]
+                                * UART0 [11,19]
+                                */
                                          /* 0 1 2 3 4 5 6 7 8 9 */
                                pin-func = < 3 3 3 3 3 3 0 0 0 0
                                             0 3 0 0 0 0 0 0 0 3>;
@@ -59,20 +59,20 @@ Example:
                                pin-count = <63>;
                                max-func = <0xf>;
                                /* MPP Bus:
-                                  [0-31] = 0xff: Keep default CP0_shared_pins:
-                                  [11] CLKOUT_MPP_11 (out)
-                                  [23] LINK_RD_IN_CP2CP (in)
-                                  [25] CLKOUT_MPP_25 (out)
-                                  [29] AVS_FB_IN_CP2CP (in)
-                                  [32,34] SMI
-                                  [31]    GPIO: push button/Wake
-                                  [35-36] GPIO
-                                  [37-38] I2C
-                                  [40-41] SATA[0/1]_PRESENT_ACTIVEn
-                                  [42-43] XSMI
-                                  [44-55] RGMII1
-                                  [56-62] SD
-                               */
+                                * [0-31] = 0xff: Keep default CP0_shared_pins:
+                                * [11] CLKOUT_MPP_11 (out)
+                                * [23] LINK_RD_IN_CP2CP (in)
+                                * [25] CLKOUT_MPP_25 (out)
+                                * [29] AVS_FB_IN_CP2CP (in)
+                                * [32,34] SMI
+                                * [31]    GPIO: push button/Wake
+                                * [35-36] GPIO
+                                * [37-38] I2C
+                                * [40-41] SATA[0/1]_PRESENT_ACTIVEn
+                                * [42-43] XSMI
+                                * [44-55] RGMII1
+                                * [56-62] SD
+                                */
                                        /*   0    1    2    3    4    5    6    7    8    9 */
                                pin-func = < 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
                                             0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
@@ -95,10 +95,10 @@ Example:
                                pin-count = <63>;
                                max-func = <0xf>;
                                /* MPP Bus:
-                                  [0-11]  RGMII0
-                                  [27,31] GE_MDIO/MDC
-                                  [32-62] = 0xff: Keep default CP1_shared_pins:
-                               */
+                                * [0-11]  RGMII0
+                                * [27,31] GE_MDIO/MDC
+                                * [32-62] = 0xff: Keep default CP1_shared_pins:
+                                */
                                        /*   0    1    2    3    4    5    6    7    8    9 */
                                pin-func = < 0x3  0x3  0x3  0x3  0x3  0x3  0x3  0x3  0x3  0x3
                                             0x3  0x3  0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
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