]> git.ipfire.org Git - people/ms/u-boot.git/commitdiff
board: sama5d3xek: Convert to CONFIG_DM_VIDEO
authorWenyou Yang <wenyou.yang@atmel.com>
Mon, 18 Sep 2017 07:25:58 +0000 (15:25 +0800)
committerAnatolij Gustschin <agust@denx.de>
Fri, 29 Sep 2017 15:50:04 +0000 (17:50 +0200)
Convert the board to support the video driver model, add the device
tree node, and remove the unnecessary code.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
arch/arm/dts/sama5d36ek_cmp.dts
arch/arm/dts/sama5d3_lcd.dtsi
arch/arm/dts/sama5d3xdm.dtsi
board/atmel/sama5d3xek/sama5d3xek.c
configs/sama5d36ek_cmp_mmc_defconfig
configs/sama5d36ek_cmp_nandflash_defconfig
configs/sama5d36ek_cmp_spiflash_defconfig
configs/sama5d3xek_mmc_defconfig
configs/sama5d3xek_nandflash_defconfig
configs/sama5d3xek_spiflash_defconfig
include/configs/sama5d3xek.h

index be41490f63fb0e7fa78e05ddb22d5d95ecc02301..c17bc9f0dce66ab0c714c45444e99aee69f89326 100644 (file)
@@ -8,6 +8,7 @@
 /dts-v1/;
 #include "sama5d36.dtsi"
 #include "sama5d3xmb_cmp.dtsi"
+#include "sama5d3xdm.dtsi"
 
 / {
        model = "Atmel SAMA5D36-EK";
index 14d7c2bc75ca8a5308b425c81ea7517d3e78219a..10fb3a97ea499f5cf0cbbe017856ac63d852aa26 100644 (file)
        ahb {
                apb {
                        hlcdc: hlcdc@f0030000 {
-                               compatible = "atmel,sama5d3-hlcdc";
+                               compatible = "atmel,at91sam9x5-hlcdc";
                                reg = <0xf0030000 0x2000>;
                                interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
                                clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;
                                clock-names = "periph_clk","sys_clk", "slow_clk";
                                status = "disabled";
-
-                               hlcdc-display-controller {
-                                       compatible = "atmel,hlcdc-display-controller";
-                                       #address-cells = <1>;
-                                       #size-cells = <0>;
-
-                                       port@0 {
-                                               #address-cells = <1>;
-                                               #size-cells = <0>;
-                                               reg = <0>;
-                                       };
-                               };
-
-                               hlcdc_pwm: hlcdc-pwm {
-                                       compatible = "atmel,hlcdc-pwm";
-                                       pinctrl-names = "default";
-                                       pinctrl-0 = <&pinctrl_lcd_pwm>;
-                                       #pwm-cells = <3>;
-                               };
                        };
 
                        pinctrl@fffff200 {
index 035ab72b39903c474aeb60c80a44ee0f9207d489..b3df9af2b42da3b566d258bc2b91f4578cd773d5 100644 (file)
 / {
        ahb {
                apb {
+                       hlcdc: hlcdc@f0030000 {
+                               atmel,vl-bpix = <4>;
+                               atmel,output-mode = <24>;
+                               atmel,guard-time = <1>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb888_alt>;
+                               status = "okay";
+                               u-boot,dm-pre-reloc;
+
+                               display-timings {
+                                       u-boot,dm-pre-reloc;
+                                       800x480 {
+                                               clock-frequency = <24000000>;
+                                               hactive = <800>;
+                                               vactive = <480>;
+                                               hsync-len = <5>;
+                                               hfront-porch = <64>;
+                                               hback-porch = <64>;
+                                               vfront-porch = <22>;
+                                               vback-porch = <21>;
+                                               vsync-len = <5>;
+                                               u-boot,dm-pre-reloc;
+                                       };
+                               };
+                       };
+
                        i2c1: i2c@f0018000 {
                                qt1070: keyboard@1b {
                                        compatible = "qt1070";
index 6d473fc06dbd94e67cc64796d55d0a642c300939..98d846fd79e250e3169f492674ebcfcec7d66865 100644 (file)
@@ -13,9 +13,7 @@
 #include <asm/arch/gpio.h>
 #include <asm/arch/clk.h>
 #include <debug_uart.h>
-#include <lcd.h>
 #include <linux/ctype.h>
-#include <atmel_hlcdc.h>
 #include <phy.h>
 #include <micrel.h>
 #include <spl.h>
@@ -132,80 +130,6 @@ static void sama5d3xek_mci_hw_init(void)
 }
 #endif
 
-#ifdef CONFIG_LCD
-vidinfo_t panel_info = {
-       .vl_col = 800,
-       .vl_row = 480,
-       .vl_clk = 24000000,
-       .vl_bpix = LCD_BPP,
-       .vl_tft = 1,
-       .vl_hsync_len = 128,
-       .vl_left_margin = 64,
-       .vl_right_margin = 64,
-       .vl_vsync_len = 2,
-       .vl_upper_margin = 22,
-       .vl_lower_margin = 21,
-       .mmio = ATMEL_BASE_LCDC,
-};
-
-void lcd_enable(void)
-{
-}
-
-void lcd_disable(void)
-{
-}
-
-static void sama5d3xek_lcd_hw_init(void)
-{
-       gd->fb_base = CONFIG_SAMA5D3_LCD_BASE;
-
-       /* The higher 8 bit of LCD is board related */
-       at91_pio3_set_c_periph(AT91_PIO_PORTC, 14, 0);  /* LCDD16 */
-       at91_pio3_set_c_periph(AT91_PIO_PORTC, 13, 0);  /* LCDD17 */
-       at91_pio3_set_c_periph(AT91_PIO_PORTC, 12, 0);  /* LCDD18 */
-       at91_pio3_set_c_periph(AT91_PIO_PORTC, 11, 0);  /* LCDD19 */
-       at91_pio3_set_c_periph(AT91_PIO_PORTC, 10, 0);  /* LCDD20 */
-       at91_pio3_set_c_periph(AT91_PIO_PORTC, 15, 0);  /* LCDD21 */
-       at91_pio3_set_c_periph(AT91_PIO_PORTE, 27, 0);  /* LCDD22 */
-       at91_pio3_set_c_periph(AT91_PIO_PORTE, 28, 0);  /* LCDD23 */
-
-       /* Configure lower 16 bit of LCD and enable clock */
-       at91_lcd_hw_init();
-}
-
-#ifdef CONFIG_LCD_INFO
-#include <nand.h>
-#include <version.h>
-
-void lcd_show_board_info(void)
-{
-       ulong dram_size;
-       uint64_t nand_size;
-       int i;
-       char temp[32];
-
-       lcd_printf("%s\n", U_BOOT_VERSION);
-       lcd_printf("(C) 2013 ATMEL Corp\n");
-       lcd_printf("at91@atmel.com\n");
-       lcd_printf("%s CPU at %s MHz\n", get_cpu_name(),
-                  strmhz(temp, get_cpu_clk_rate()));
-
-       dram_size = 0;
-       for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
-               dram_size += gd->bd->bi_dram[i].size;
-
-       nand_size = 0;
-#ifdef CONFIG_NAND_ATMEL
-       for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
-               nand_size += get_nand_dev_by_index(i)->size;
-#endif
-       lcd_printf("%ld MB SDRAM, %lld MB NAND\n",
-                  dram_size >> 20, nand_size >> 20);
-}
-#endif /* CONFIG_LCD_INFO */
-#endif /* CONFIG_LCD */
-
 #ifdef CONFIG_DEBUG_UART_BOARD_INIT
 void board_debug_uart_init(void)
 {
@@ -239,10 +163,6 @@ int board_init(void)
 #endif
 #ifdef CONFIG_GENERIC_ATMEL_MCI
        sama5d3xek_mci_hw_init();
-#endif
-#ifdef CONFIG_LCD
-       if (has_lcdc())
-               sama5d3xek_lcd_hw_init();
 #endif
        return 0;
 }
@@ -268,6 +188,9 @@ int board_late_init(void)
 
        strcat(name, "ek.dtb");
        env_set("dtb_name", name);
+#endif
+#ifdef CONFIG_DM_VIDEO
+       at91_video_show_board_info();
 #endif
        return 0;
 }
index b6c60cbcae69340b229ad3c51710882e3a1b0e40..7c27812c3ffeec95be906a94610018cd736c06e6 100644 (file)
@@ -55,4 +55,5 @@ CONFIG_DM_SPI=y
 CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
-CONFIG_LCD=y
+CONFIG_DM_VIDEO=y
+CONFIG_ATMEL_HLCD=y
index 01b57efe03da530de16229930de6ed167bb4ac08..09508dafa4995733912bb4f7958bed251bb480e4 100644 (file)
@@ -55,5 +55,6 @@ CONFIG_DM_SPI=y
 CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
-CONFIG_LCD=y
 CONFIG_FAT_WRITE=y
+CONFIG_DM_VIDEO=y
+CONFIG_ATMEL_HLCD=y
index e29e3a809811fc1d8108d234d52ea2c06afb5ca1..1c004ef2ac6ea76449f69b566385858dcb75e115 100644 (file)
@@ -55,5 +55,6 @@ CONFIG_DM_SPI=y
 CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
-CONFIG_LCD=y
+CONFIG_DM_VIDEO=y
+CONFIG_ATMEL_HLCD=y
 CONFIG_FAT_WRITE=y
index f45449fd93f6514fb3ac4f564245b29083939b2e..8b4c37a12530084256dd1b0a1285e9040675f5c8 100644 (file)
@@ -81,4 +81,5 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_ATMEL_USBA=y
-CONFIG_LCD=y
+CONFIG_DM_VIDEO=y
+CONFIG_ATMEL_HLCD=y
index 6217600f01d2941513d9de23c1945554b1f738b6..f9d4b8db3a81fb3e95e88c50a1c5e25b39668979 100644 (file)
@@ -76,5 +76,6 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_ATMEL_USBA=y
-CONFIG_LCD=y
+CONFIG_DM_VIDEO=y
+CONFIG_ATMEL_HLCD=y
 CONFIG_FAT_WRITE=y
index 2fe08e4e59a30f07b67b9ac86a1313a27beb1ebc..7399b3e51f074896216f6b583c507496ba623fe6 100644 (file)
@@ -77,5 +77,6 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_ATMEL_USBA=y
-CONFIG_LCD=y
+CONFIG_DM_VIDEO=y
+CONFIG_ATMEL_HLCD=y
 CONFIG_FAT_WRITE=y
index bd93a1e84c37aaff8eabf9e2877ac9b7eef9490c..9ec1e76052685855713fc27d0b0b1ec7fd57a11e 100644 (file)
  */
 #define ATMEL_PMC_UHP                  (1 <<  6)
 
-/* LCD */
-#define LCD_BPP                                LCD_COLOR16
-#define LCD_OUTPUT_BPP                  24
-#define CONFIG_LCD_LOGO
-#define CONFIG_LCD_INFO
-#define CONFIG_LCD_INFO_BELOW_LOGO
-#define CONFIG_ATMEL_HLCD
-#define CONFIG_ATMEL_LCD_RGB565
-
 /* board specific (not enough SRAM) */
 #define CONFIG_SAMA5D3_LCD_BASE                0x23E00000