Jon Nettleton [Mon, 13 Nov 2017 05:04:30 +0000 (07:04 +0200)]
arm: mvebu: clearfog: Fix SPI-NOR flash access
The production variant of the SPI flash used by the clearfog
devices are based on winbond chips. Additionally enable
SPI_FLASH_BAR since some variants will have 16MB of flash
that requires this to be enabled.
Remove the default speed and mode; these values are taken from the
device tree when CONFIG_DM_SPI_FLASH is enabled.
Add default bus, so that 'sf' detects the SPI flash by default.
Signed-off-by: Jon Nettleton <jon@solid-run.com>
[baruch: remove speed/mode; add bus; move winbond to defconfig] Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Stefan Roese <sr@denx.de>
Jon Nettleton [Mon, 6 Nov 2017 08:33:21 +0000 (10:33 +0200)]
arm: mvebu: clearfog: enable XHCI USB
Enable the driver by default for the clearfog boards since the external
port is configured for XHCI.
Signed-off-by: Jon Nettleton <jon@solid-run.com>
[baruch: split from the SoC setup patch] Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Stefan Roese <sr@denx.de>
Jon Nettleton [Mon, 6 Nov 2017 08:33:20 +0000 (10:33 +0200)]
arm: mvebu: Add board_setup for xhci hardware
This fixes the USB 3.0 support for the a38x SOC.
Signed-off-by: Jon Nettleton <jon@solid-run.com>
[baruch: use fdt_addr_t] Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Stefan Roese <sr@denx.de>
Jon Nettleton [Mon, 6 Nov 2017 08:33:19 +0000 (10:33 +0200)]
mvebu: usb: xhci: a38x support
This makes the initial changes need to support the
a38x series of SOCs. It adds the device-tree identifier
as well as changing the board_support function to take
the IO address designated by device-tree.
Signed-off-by: Jon Nettleton <jon@solid-run.com>
[baruch: use fdt_addr_t; update 37xx and 8K implementations] Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Stefan Roese <sr@denx.de>
Ashish Kumar [Mon, 6 Nov 2017 07:49:28 +0000 (13:19 +0530)]
armv8: ls1088ardb: Add distro boot support
Distro boot support gives flexibility to run distro RFS like Ubuntu
being deployed from SD card or SATA drive. If it fails to detect
external storage, fall back to qspi/sd boot.
Enable this by default in RDB's defconfig by selecting
CONFIG_DISTRO_DEFAULTS
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Zhang Ying <zhangying@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Kurt Kanzenbach [Fri, 20 Oct 2017 09:44:25 +0000 (11:44 +0200)]
mtd: nand: fsl-ifc: fix support of multiple NAND devices
Currently the chipselect used to identify the corresponding NAND chip
is stored at the controller and only set during fsl_ifc_chip_init().
This way, only the last NAND chip is working, as the previous value
of cs_nand gets overwritten.
In order to solve this issue the chipselect is computed on demand by
evaluating the bank variable. Thus, the correct chipselect for each
NAND chip operation is used.
Tested on hardware with two NAND chips connected to the IFC
controller.
Signed-off-by: Kurt Kanzenbach <kurt@linutronix.de> Acked-by: Scott Wood <oss@buserror.net>
[YS: reformatted commit message] Reviewed-by: York Sun <york.sun@nxp.com>
After adding the "mdelay(500);"
line that was lost in the path the error is gone.
Signed-off-by: Werner Böllmann <Werner.Boellmann@fh-dortmund.de>
[Rebased and updated change and commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
Jagan Teki [Fri, 10 Nov 2017 11:48:44 +0000 (17:18 +0530)]
rockchip: configs: vyasa: Update falcon offsets
Update the falcon offsets for args to 16MB and kernel to 17MB
Since the below commit updated U-Boot proper location along
with rockchip boot image offsets
"spl: set SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR to 0x4000 for rockchip"
(sha1: 8f4d62b403db45dfa8b1cadb9da9096c79b7df47)
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Jagan Teki [Fri, 10 Nov 2017 11:48:43 +0000 (17:18 +0530)]
rockchip: doc: Fix U-Boot proper location for falcon
This patch fixed U-Boot proper location has been
missed to update in bewlo commit
"rockchip: doc: update U-Boot location info"
(sha1: 73e6dbe855f357a8330cfd53ff3033303611c1ad)
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
The U-Boot location has been moved to block 16384.
This is 8MB, not 4MB.
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
The following error has been observed on i.MX25 with a high-speed SDSC
card:
Data Write Failed in PIO Mode.
It was caused by the timeout set on PRSSTAT.BWEN, which was triggered
because this bit takes 15 ms to be set after writing the first block to
DATPORT with this card. Without this timeout, all the blocks are
properly written.
This timeout was implemented by decrementing a variable, so it was
depending on the CPU frequency. Fix this issue by setting this timeout
to a long enough absolute duration (500 ms).
Fabio Estevam [Fri, 3 Nov 2017 15:40:10 +0000 (13:40 -0200)]
mx51: Select the ESDHC_A001 erratum
When a high speed card is connected to mx51evk the following error is seen:
U-Boot 2017.11-rc2 (Oct 18 2017 - 13:49:26 -0200)
CPU: Freescale i.MX51 rev3.0 at 800 MHz
Reset cause: POR
Board: MX51EVK
DRAM: 512 MiB
MMC: FSL_SDHC: 0, FSL_SDHC: 1
*** Warning - read failed, using default environment
In: serial
Out: serial
Err: serial
Net: FEC
Hit any key to stop autoboot: 0
=> saveenv
Saving Environment to MMC...
Writing to MMC(0)... failed
The root cause for the failure is the eSDHC-A001 erratum:
"eSDHC-A001 : Data timeout counter (SYSCTL[DTOCV]) is not reliable for
values of 0x4,0x8, and 0xC" that is listed
on some PowerArchitecture chips:
https://www.nxp.com/files-static/32bit/doc/errata/MPC8379ECE.pdf
Even though eSDHC-A001 is not documented on the i.MX51 errata document,
I have confirmed with the NXP design team that this erratum does affect
i.MX51, so fix the problem by selecting SYS_FSL_ERRATUM_ESDHC_A001
at SoC level.
The i.MX51 ts4800 board already selects this option, but it is better
to move this selection to the i.MX51 SoC level instead.
Successfully tested with a high speed SD card on a mx51evk board.
CPU: Freescale i.MX25 rev1.2 at 399 MHz
Reset cause: POR
Board: MX25PDK
I2C: ready
DRAM: 64 MiB
No arch specific invalidate_icache_all available!
MMC: FSL_SDHC: 0
*** Warning - read failed, using default environment
In: serial
Out: serial
Err: serial
Net: FEC
Hit any key to stop autoboot: 0
=> saveenv
Saving Environment to MMC...
Writing to MMC(0)... failed
, which prevents any usage of the SD card.
The root cause for the failure is the eSDHC-A001 erratum:
"eSDHC-A001 : Data timeout counter (SYSCTL[DTOCV]) is not reliable for
values of 0x4,0x8, and 0xC" that is listed
on some PowerArchitecture chips:
https://www.nxp.com/files-static/32bit/doc/errata/MPC8379ECE.pdf
Even though eSDHC-A001 is not documented on the i.MX25 errata document,
I have confirmed with the NXP design team that this erratum does affect
i.MX25, so fix the problem by selecting SYS_FSL_ERRATUM_ESDHC_A001
at SoC level.
Successfully tested with a high speed SD card on a mx25pdk board.
Fabio Estevam [Fri, 3 Nov 2017 15:40:08 +0000 (13:40 -0200)]
mx25: Move MX25 selection to Kconfig
The motivation for moving MX25 selection to Kconfig is to be
able to better handle MX25 specific errata, so that an errata option
can be selected at SoC level instead of board level.
This selection method also aligns with the way other i.MX SoCs are
selected in U-Boot.
Kever Yang [Thu, 2 Nov 2017 07:16:36 +0000 (15:16 +0800)]
rockchip: remove SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR from defconfig
Use default value 0x4000 for SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR instead
of define a new one.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Kever Yang [Thu, 2 Nov 2017 07:16:35 +0000 (15:16 +0800)]
rockchip: doc: update U-Boot location info
Update rockchip U-Boot location to 0x4000/16384.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Kever Yang [Thu, 2 Nov 2017 07:16:34 +0000 (15:16 +0800)]
spl: set SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR to 0x4000 for rockchip
Rockchip use a 'loader2' partition for U-Boot, so u-boot.bin or
u-boot.itb load by SPL need to locate at0x4000. Detail here:
http://opensource.rock-chips.com/wiki_Boot_option
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Klaus Goger [Mon, 6 Nov 2017 22:02:56 +0000 (23:02 +0100)]
rockchip: board: puma_rk3399: make env location selectable via Kconfig
The environment storage location is selectable via Kconfig. We support
eMMC, SD and SPI-NOR as location for U-Boot. This adds support to store
the environment in the SPI-NOR additional to the default eMMC location.
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich [Mon, 6 Nov 2017 22:02:53 +0000 (23:02 +0100)]
rockchip: dts: rk3399-puma: update USB configuration
This change updates the USB configuration for the RK3399-Q7 in the DTS:
* fixes the OTG board configuration by enabling it ('okay')
* improves the speed of 'usb start' by disabling the unused EHCI/OHCI
controllers
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
To correctly model the usbhub_enable regulator for U-Boot, we need
to change the settings to:
* the GPIO polarity is GPIO_ACTIVE_LOW
* should be set to inactive (enable-active-low) when boot-on settings
are applied
* it can be changed at runtime (i.e. remove the always-on)
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Philipp Tomsich [Mon, 6 Nov 2017 22:02:51 +0000 (23:02 +0100)]
rockchip: dts: rk3399-puma: fix the modelling of BIOS_DISABLE
The fixed regulator for overriding BIOS_DISABLE had been modelling
backwards (i.e. the GPIO polarity and the enable-active-low/high
property had both been inverted), causing the 'regulator' command
to always print/expect 'disabled'/'enabled' backwards.
This fixes the mix-up and models it correctly:
* the GPIO is low-active
* the regulator should be enabled (enable-active-high) during
boot-on initialisation
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Kever Yang [Tue, 31 Oct 2017 07:52:20 +0000 (15:52 +0800)]
rockchip: config: use common CONFIG_ENV_SIZE for all SoCs
All Rockchip SoCs use 32KB as CONFIG_ENV_SIZE.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Kever Yang [Tue, 31 Oct 2017 07:52:19 +0000 (15:52 +0800)]
rockchip: config: sync the ENV offset from rockchip legacy U-Boot
Using the ENV offset from rockchip legacy U-Boot for all SoCs,
the offset is 4MB-32KB
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Kever Yang [Fri, 3 Nov 2017 08:11:04 +0000 (16:11 +0800)]
rockchip: rock: remove CONFIG_ENV_OFFSET
We use the same default ENV setting in rockchip_common.h for all SoC.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Jan Kundrát [Fri, 3 Nov 2017 02:06:35 +0000 (03:06 +0100)]
Do not attempt to use the systemwide libfdt
U-Boot bundles a patched copy of libfdt, so it's wrong to attempt to
include it <like/this>. This breaks the build for me when I have dtc
fully installed in my host -- as happened earlier tonight with
Buildroot, for example.
There are several other occurrences throughout the code where '<libfdt'
matches. I'm not modifying these because I have no clue why the
<systemwide> include style is being used -- IMHO wrongly.
Signed-off-by: Jan Kundrát <jan.kundrat@cesnet.cz>
Shawn Guo [Thu, 2 Nov 2017 08:46:34 +0000 (16:46 +0800)]
disk: part_dos: fix part_get_info_extended() function
The check in part_get_info_extended() for a successful partition
searching misses a condition for extended partition. In case of
(ext_part_sector == 0), we should anyway mark the partition as found,
even if it's an extended partition, i.e. (is_extended(pt->sys_ind) == 0).
Otherwise, the extended partition (type 0x0f) will never be identified,
and the following recursive call to part_get_info_extended() will get a
wrong 'part_num' and 'which_part' parameter. In the end, all those
partitions in extended table will not be identified.
Let's add the missing OR condition of (ext_part_sector == 0) for
is_extended() check to fix the problem.
The issue is discovered by running fastboot flash to an extended
partition on eMMC.
Lukasz Majewski [Fri, 27 Oct 2017 10:28:10 +0000 (12:28 +0200)]
gpt: Use cache aligned buffers for gpt_h and gpt_e
Before this patch one could receive following errors when executing
"gpt write" command on machine with cache enabled:
display5 factory > gpt write mmc ${mmcdev} ${partitions}
Writing GPT:
CACHE: Misaligned operation at range [4ef8f7f0, 4ef8f9f0]
CACHE: Misaligned operation at range [4ef8f9f8, 4ef939f8]
CACHE: Misaligned operation at range [4ef8f9f8, 4ef939f8]
CACHE: Misaligned operation at range [4ef8f7f0, 4ef8f9f0]
success!
To alleviate this problem - the calloc()s have been replaced with
malloc_cache_aligned() and memset().
After those changes the buffers are properly aligned (with both start
address and size) to SoC cache line.
Masahiro Yamada [Fri, 27 Oct 2017 06:04:20 +0000 (15:04 +0900)]
tools: image: allow to sign image nodes without -K option
If -K option is missing when you sign image nodes, it fails with
an unclear error message:
tools/mkimage Can't add hashes to FIT blob: -1
It is hard to figure out the cause of the failure.
In contrast, when you sign configuration nodes, -K is optional because
fit_config_process_sig() returns successfully if keydest is unset.
Probably this is a preferred behavior when you want to update FIT with
the same key; you do not have to update the public key in this case.
So, this commit changes fit_image_process_sig() to continue signing
without keydest. If ->add_verify_data() fails, show a clearer error
message, which has been borrowed from fit_config_process_sig().
Masahiro Yamada [Fri, 27 Oct 2017 04:25:21 +0000 (13:25 +0900)]
tools: image: fix "algo" property of public key for verified boot
The "algo_name" points to a property in a blob being edited. The
pointer becomes stale when fit_image_write_sig() inserts signatures.
Then crypto->add_verify_data() writes wrong data to the public key
destination.
Stephen Warren [Fri, 27 Oct 2017 00:23:35 +0000 (18:23 -0600)]
test/py: regenerate persistent GPT image if code changes
test_gpt generates a persistent disk image which can be re-used across
multiple test runs. Currently, if the Python code that generates the disk
image change, the image is not regenerated, which could cause test
failures e.g. if a test was updated to expect some new partition name or
size, yet the persistent disk image contained the old name or size. This
change introduces functionality to regenerate the disk image if the
instructions to generate the image have changed.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Stefan Agner [Thu, 26 Oct 2017 12:57:53 +0000 (14:57 +0200)]
tools: env: allow to print U-Boot version
The fw_env utility family has a default environment compiled in
which ties it quite strongly to the U-Boot source/config it has
been built with. Allow to display the U-Boot version it has been
built with using the -v/--version argument.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
Tom Rini [Sat, 21 Oct 2017 16:54:02 +0000 (12:54 -0400)]
MAINTAINERS: Add missing boards and config entries
As part of my usual round of build testing, output about missing
MAINTAINERS information was not logged, and thus often overlooked.
Correct that mistake by ensuring that I log the output of
genboardscfg.py every time. As part of that, address a number of
missing MAINTAINERS entires. In the case of a missing file, I have put
the original submitter down. In the rest of the cases I have added the
config (and sometimes relevant header file) to the existing set of file
globs.
Dongjin Kim [Sun, 29 Oct 2017 16:39:59 +0000 (12:39 -0400)]
ARM: dts: exynos: fix property values of LDO15/17 for ODROID-XU3/4
Looking at the schematic, LDO15 and LDO17 are tied as a power source of a
builtin network chipset. The voltage on LDO15 is corrected to 3.3V and the
name of LDO17 is corrected to "vdd_ldo17".
Signed-off-by: Dongjin Kim <tobetter@gmail.com> Reviewed-by: Lukasz Majewski <lukma@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
We move all instances of CONFIG_MTDIDS_DEFAULT and
CONFIG_MTDPARTS_DEFAULT from the header files to the defconfig files.
There's a few cases here where we need to expand upon what was in the
header file.
Tested-by: Adam Ford <aford173@gmail.com> #omap3_logic Signed-off-by: Tom Rini <trini@konsulko.com>
Michal Simek [Thu, 2 Nov 2017 14:45:34 +0000 (15:45 +0100)]
scsi: ceva: Start port in probe
The patch:
"dm: ahci: Unwind the confusing init code"
(sha1: 7cf1afce7fa3fe64189020fe14b93f7326dd0758)
introduce bug for ceva sata because port didn't start.
On the other hand the dwc_ahci.c was fixed correctly.
Do the same change for ceva too.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Tested-by: Mian Yousaf Kaukab <yousaf.kaukab@suse.com>
The RK3368-uQ7 uses a KSZ9031 PHY on-module. Enable PHY_MICREL_KSZ90X1
in the associated defconfig.
References: da3b9e7f ("Move PHY_MICREL and PHY_MICREL_KSZ90X1 to Kconfig") Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
The RK3368-uQ7 uses a KSZ9031 PHY on-module. Enable PHY_MICREL_KSZ90X1
in the associated defconfig (this somehow got lost with da3b9e7f).
References: da3b9e7f ("Move PHY_MICREL and PHY_MICREL_KSZ90X1 to Kconfig") Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Kever Yang [Thu, 26 Oct 2017 06:45:02 +0000 (14:45 +0800)]
rockchip: evb-rk3328: remove CONFIG_ENV_OFFSET
Remove CONFIG_ENV_OFFSET for there already have one in rockchip_common.h
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Kever Yang [Wed, 25 Oct 2017 08:24:48 +0000 (16:24 +0800)]
rockchip: rk3328: fix rockchip_get_cru api
The API for get priv pointer is wrong, fix it.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Kever Yang [Thu, 12 Oct 2017 07:27:29 +0000 (15:27 +0800)]
rockchip: rk3399: init CPU clock when rkclk_init()
Init the CPU and its buses to speed up the boot time.
Move rkclk_init() to a place after rk3399_configure_cpu has defined
at the same time, or else there will be a warning.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Klaus Goger [Fri, 6 Oct 2017 17:24:08 +0000 (19:24 +0200)]
rockchip: configs: only add available BOOT_TARGET_DEVICES
BOOT_TARGET_DEVICES should only be added if the corresponding u-boot
command is enabled.
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Klaus Goger [Fri, 6 Oct 2017 17:24:09 +0000 (19:24 +0200)]
rockchip: configs: use rockchip-common.h for rk3368
rockchip-common.h already defines values that are missing from
rk3368_common.h
For example BOOT_TARGET_DEVICES was defined empty and therefore
distroboot had no boot targets.
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
CPU: Freescale i.MX6SL rev1.0 792 MHz (running at 396 MHz)
CPU: Commercial temperature grade (0C to 95C) at 33C
Reset cause: POR
Board: MX6SLEVK
I2C: ready
DRAM: 1 GiB
MMC: FSL_SDHC: 0
MMC Device 1 not found
*** Warning - No MMC card found, using default environment
As mx6slevk_spl_defconfig does not use CONFIG_DM_MMC and its
board file does not register the mmc controller for U-Boot proper,
let's fix this by adding CONFIG_DM_MMC=y and device tree support.
While at it, add more DM drivers, so that it becomes closer to
mx6slevk_defconfig.
Stefan Agner [Tue, 17 Oct 2017 11:59:19 +0000 (13:59 +0200)]
configs: vf610: increase maximum size and enforce correct limit
On Vybrid SoCs U-Boot gets loaded into GFX SRAM which is 512KiB.
Currently 32KiB is reserved for the IMX header. However, this is
not reflected in the size limit. In v2017.11-rc2 the actual size
limit (512KiB-32KiB) has been reached for Colibri VF61, which
lead to a successful build of U-Boot but not a working binary.
The IMX header is much smaller than 32KiB, typically around 1KiB.
Decrease the reserved size to 4KiB and specify the correct U-Boot
size limit. Apply this new base address and limit for all Vybrid
based boards.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
projects / people / ms / u-boot.git / log
