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00e5a55c BS |
1 | From: Suresh Siddha <suresh.b.siddha@intel.com> |
2 | Subject: x86: fix intel x86_64 llc_shared_map/cpu_llc_id anomolies | |
3 | References: bnc#464329 | |
4 | Patch-Mainline: In .28 x86 -tip tree, soon in .29, will possibly/hopefully pop up in stable trees | |
5 | Signed-off-by: Thomas Renninger <trenn@suse.de> | |
6 | ||
7 | Date: Thu Dec 18 18:09:21 2008 -0800 | |
8 | commit 345077cd98ff5532b2d1158013c3fec7b1ae85ec | |
9 | ||
10 | Impact: fix wrong cache sharing detection on platforms supporting > 8 bit apicid's | |
11 | ||
12 | In the presence of extended topology eumeration leaf 0xb provided | |
13 | by cpuid, 32bit extended initial_apicid in cpuinfo_x86 struct will be | |
14 | updated by detect_extended_topology(). At this instance, we should also | |
15 | reinit the apicid (which could also potentially be extended to 32bit). | |
16 | ||
17 | With out this there will potentially be duplicate apicid's populated in the | |
18 | per cpu's cpuinfo_x86 struct, resulting in wrong cache sharing topology etc | |
19 | detected by init_intel_cacheinfo(). | |
20 | ||
21 | Reported-by: Dimitri Sivanich <sivanich@sgi.com> | |
22 | Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> | |
23 | Acked-by: Dimitri Sivanich <sivanich@sgi.com> | |
24 | Signed-off-by: Ingo Molnar <mingo@elte.hu> | |
25 | Cc: <stable@kernel.org> | |
26 | ||
27 | --- | |
28 | arch/x86/kernel/cpu/addon_cpuid_features.c | 8 ++++++++ | |
29 | arch/x86/kernel/cpu/intel.c | 9 +++++++-- | |
30 | 2 files changed, 15 insertions(+), 2 deletions(-) | |
31 | ||
32 | --- a/arch/x86/kernel/cpu/addon_cpuid_features.c | |
33 | +++ b/arch/x86/kernel/cpu/addon_cpuid_features.c | |
34 | @@ -120,9 +120,17 @@ void __cpuinit detect_extended_topology( | |
35 | c->cpu_core_id = phys_pkg_id(c->initial_apicid, ht_mask_width) | |
36 | & core_select_mask; | |
37 | c->phys_proc_id = phys_pkg_id(c->initial_apicid, core_plus_mask_width); | |
38 | + /* | |
39 | + * Reinit the apicid, now that we have extended initial_apicid. | |
40 | + */ | |
41 | + c->apicid = phys_pkg_id(c->initial_apicid, 0); | |
42 | #else | |
43 | c->cpu_core_id = phys_pkg_id(ht_mask_width) & core_select_mask; | |
44 | c->phys_proc_id = phys_pkg_id(core_plus_mask_width); | |
45 | + /* | |
46 | + * Reinit the apicid, now that we have extended initial_apicid. | |
47 | + */ | |
48 | + c->apicid = phys_pkg_id(0); | |
49 | #endif | |
50 | c->x86_max_cores = (core_level_siblings / smp_num_siblings); | |
51 | ||
52 | --- a/arch/x86/kernel/cpu/intel.c | |
53 | +++ b/arch/x86/kernel/cpu/intel.c | |
54 | @@ -151,6 +151,13 @@ static void __cpuinit init_intel(struct | |
55 | } | |
56 | #endif | |
57 | ||
58 | + /* | |
59 | + * Detect the extended topology information if available. This | |
60 | + * will reinitialise the initial_apicid which will be used | |
61 | + * in init_intel_cacheinfo() | |
62 | + */ | |
63 | + detect_extended_topology(c); | |
64 | + | |
65 | l2 = init_intel_cacheinfo(c); | |
66 | if (c->cpuid_level > 9) { | |
67 | unsigned eax = cpuid_eax(10); | |
68 | @@ -196,8 +203,6 @@ static void __cpuinit init_intel(struct | |
69 | if (p) | |
70 | strcpy(c->x86_model_id, p); | |
71 | ||
72 | - detect_extended_topology(c); | |
73 | - | |
74 | if (!cpu_has(c, X86_FEATURE_XTOPOLOGY)) { | |
75 | /* | |
76 | * let's use the legacy cpuid vector 0x1 and 0x4 for topology |