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Commit | Line | Data |
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2cb7cef9 BS |
1 | From: Suresh Siddha <suresh.b.siddha@intel.com> |
2 | Subject: x64, x2apic/intr-remap: x2apic cluster mode support | |
3 | References: fate #303948 and fate #303984 | |
4 | Patch-Mainline: queued for .28 | |
5 | Commit-ID: 12a67cf6851871ca8df42025c94f140c303d0f7f | |
6 | ||
7 | Signed-off-by: Thomas Renninger <trenn@suse.de> | |
8 | ||
9 | x2apic cluster mode support. | |
10 | ||
11 | Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> | |
12 | Cc: akpm@linux-foundation.org | |
13 | Cc: arjan@linux.intel.com | |
14 | Cc: andi@firstfloor.org | |
15 | Cc: ebiederm@xmission.com | |
16 | Cc: jbarnes@virtuousgeek.org | |
17 | Cc: steiner@sgi.com | |
18 | Signed-off-by: Ingo Molnar <mingo@elte.hu> | |
19 | ||
20 | --- | |
21 | arch/x86/kernel/Makefile | 1 | |
22 | arch/x86/kernel/genapic_64.c | 3 | |
23 | arch/x86/kernel/genx2apic_cluster.c | 135 ++++++++++++++++++++++++++++++++++++ | |
24 | include/asm-x86/genapic_64.h | 1 | |
25 | 4 files changed, 140 insertions(+) | |
26 | ||
27 | Index: linux-2.6.26/arch/x86/kernel/Makefile | |
28 | =================================================================== | |
29 | --- linux-2.6.26.orig/arch/x86/kernel/Makefile | |
30 | +++ linux-2.6.26/arch/x86/kernel/Makefile | |
31 | @@ -103,6 +103,7 @@ obj-$(CONFIG_OLPC) += olpc.o | |
32 | # 64 bit specific files | |
33 | ifeq ($(CONFIG_X86_64),y) | |
34 | obj-y += genapic_64.o genapic_flat_64.o genx2apic_uv_x.o tlb_uv.o | |
35 | + obj-y += genx2apic_cluster.o | |
36 | obj-y += bios_uv.o | |
37 | obj-$(CONFIG_X86_PM_TIMER) += pmtimer_64.o | |
38 | obj-$(CONFIG_AUDIT) += audit_64.o | |
39 | Index: linux-2.6.26/arch/x86/kernel/genapic_64.c | |
40 | =================================================================== | |
41 | --- linux-2.6.26.orig/arch/x86/kernel/genapic_64.c | |
42 | +++ linux-2.6.26/arch/x86/kernel/genapic_64.c | |
43 | @@ -16,6 +16,7 @@ | |
44 | #include <linux/ctype.h> | |
45 | #include <linux/init.h> | |
46 | #include <linux/hardirq.h> | |
47 | +#include <linux/dmar.h> | |
48 | ||
49 | #include <asm/smp.h> | |
50 | #include <asm/ipi.h> | |
51 | @@ -38,6 +39,8 @@ void __init setup_apic_routing(void) | |
52 | { | |
53 | if (uv_system_type == UV_NON_UNIQUE_APIC) | |
54 | genapic = &apic_x2apic_uv_x; | |
55 | + else if (cpu_has_x2apic && intr_remapping_enabled) | |
56 | + genapic = &apic_x2apic_cluster; | |
57 | else | |
58 | #ifdef CONFIG_ACPI | |
59 | /* | |
60 | Index: linux-2.6.26/arch/x86/kernel/genx2apic_cluster.c | |
61 | =================================================================== | |
62 | --- /dev/null | |
63 | +++ linux-2.6.26/arch/x86/kernel/genx2apic_cluster.c | |
64 | @@ -0,0 +1,135 @@ | |
65 | +#include <linux/threads.h> | |
66 | +#include <linux/cpumask.h> | |
67 | +#include <linux/string.h> | |
68 | +#include <linux/kernel.h> | |
69 | +#include <linux/ctype.h> | |
70 | +#include <linux/init.h> | |
71 | +#include <asm/smp.h> | |
72 | +#include <asm/ipi.h> | |
73 | +#include <asm/genapic.h> | |
74 | + | |
75 | +DEFINE_PER_CPU(u32, x86_cpu_to_logical_apicid); | |
76 | + | |
77 | +/* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */ | |
78 | + | |
79 | +static cpumask_t x2apic_target_cpus(void) | |
80 | +{ | |
81 | + return cpumask_of_cpu(0); | |
82 | +} | |
83 | + | |
84 | +/* | |
85 | + * for now each logical cpu is in its own vector allocation domain. | |
86 | + */ | |
87 | +static cpumask_t x2apic_vector_allocation_domain(int cpu) | |
88 | +{ | |
89 | + cpumask_t domain = CPU_MASK_NONE; | |
90 | + cpu_set(cpu, domain); | |
91 | + return domain; | |
92 | +} | |
93 | + | |
94 | +static void __x2apic_send_IPI_dest(unsigned int apicid, int vector, | |
95 | + unsigned int dest) | |
96 | +{ | |
97 | + unsigned long cfg; | |
98 | + | |
99 | + cfg = __prepare_ICR(0, vector, dest); | |
100 | + | |
101 | + /* | |
102 | + * send the IPI. | |
103 | + */ | |
104 | + x2apic_icr_write(cfg, apicid); | |
105 | +} | |
106 | + | |
107 | +/* | |
108 | + * for now, we send the IPI's one by one in the cpumask. | |
109 | + * TBD: Based on the cpu mask, we can send the IPI's to the cluster group | |
110 | + * at once. We have 16 cpu's in a cluster. This will minimize IPI register | |
111 | + * writes. | |
112 | + */ | |
113 | +static void x2apic_send_IPI_mask(cpumask_t mask, int vector) | |
114 | +{ | |
115 | + unsigned long flags; | |
116 | + unsigned long query_cpu; | |
117 | + | |
118 | + local_irq_save(flags); | |
119 | + for_each_cpu_mask(query_cpu, mask) { | |
120 | + __x2apic_send_IPI_dest(per_cpu(x86_cpu_to_logical_apicid, query_cpu), | |
121 | + vector, APIC_DEST_LOGICAL); | |
122 | + } | |
123 | + local_irq_restore(flags); | |
124 | +} | |
125 | + | |
126 | +static void x2apic_send_IPI_allbutself(int vector) | |
127 | +{ | |
128 | + cpumask_t mask = cpu_online_map; | |
129 | + | |
130 | + cpu_clear(smp_processor_id(), mask); | |
131 | + | |
132 | + if (!cpus_empty(mask)) | |
133 | + x2apic_send_IPI_mask(mask, vector); | |
134 | +} | |
135 | + | |
136 | +static void x2apic_send_IPI_all(int vector) | |
137 | +{ | |
138 | + x2apic_send_IPI_mask(cpu_online_map, vector); | |
139 | +} | |
140 | + | |
141 | +static int x2apic_apic_id_registered(void) | |
142 | +{ | |
143 | + return 1; | |
144 | +} | |
145 | + | |
146 | +static unsigned int x2apic_cpu_mask_to_apicid(cpumask_t cpumask) | |
147 | +{ | |
148 | + int cpu; | |
149 | + | |
150 | + /* | |
151 | + * We're using fixed IRQ delivery, can only return one phys APIC ID. | |
152 | + * May as well be the first. | |
153 | + */ | |
154 | + cpu = first_cpu(cpumask); | |
155 | + if ((unsigned)cpu < NR_CPUS) | |
156 | + return per_cpu(x86_cpu_to_logical_apicid, cpu); | |
157 | + else | |
158 | + return BAD_APICID; | |
159 | +} | |
160 | + | |
161 | +static unsigned int x2apic_read_id(void) | |
162 | +{ | |
163 | + return apic_read(APIC_ID); | |
164 | +} | |
165 | + | |
166 | +static unsigned int phys_pkg_id(int index_msb) | |
167 | +{ | |
168 | + return x2apic_read_id() >> index_msb; | |
169 | +} | |
170 | + | |
171 | +static void x2apic_send_IPI_self(int vector) | |
172 | +{ | |
173 | + apic_write(APIC_SELF_IPI, vector); | |
174 | +} | |
175 | + | |
176 | +static void init_x2apic_ldr(void) | |
177 | +{ | |
178 | + int cpu = smp_processor_id(); | |
179 | + | |
180 | + per_cpu(x86_cpu_to_logical_apicid, cpu) = apic_read(APIC_LDR); | |
181 | + return; | |
182 | +} | |
183 | + | |
184 | +struct genapic apic_x2apic_cluster = { | |
185 | + .name = "cluster x2apic", | |
186 | + .int_delivery_mode = dest_LowestPrio, | |
187 | + .int_dest_mode = (APIC_DEST_LOGICAL != 0), | |
188 | + .target_cpus = x2apic_target_cpus, | |
189 | + .vector_allocation_domain = x2apic_vector_allocation_domain, | |
190 | + .apic_id_registered = x2apic_apic_id_registered, | |
191 | + .init_apic_ldr = init_x2apic_ldr, | |
192 | + .send_IPI_all = x2apic_send_IPI_all, | |
193 | + .send_IPI_allbutself = x2apic_send_IPI_allbutself, | |
194 | + .send_IPI_mask = x2apic_send_IPI_mask, | |
195 | + .send_IPI_self = x2apic_send_IPI_self, | |
196 | + .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid, | |
197 | + .phys_pkg_id = phys_pkg_id, | |
198 | + .read_apic_id = x2apic_read_id, | |
199 | +}; | |
200 | Index: linux-2.6.26/include/asm-x86/genapic_64.h | |
201 | =================================================================== | |
202 | --- linux-2.6.26.orig/include/asm-x86/genapic_64.h | |
203 | +++ linux-2.6.26/include/asm-x86/genapic_64.h | |
204 | @@ -35,6 +35,7 @@ extern struct genapic *genapic; | |
205 | ||
206 | extern struct genapic apic_flat; | |
207 | extern struct genapic apic_physflat; | |
208 | +extern struct genapic apic_x2apic_cluster; | |
209 | extern int acpi_madt_oem_check(char *, char *); | |
210 | ||
211 | extern void apic_send_IPI_self(int vector); |