]>
Commit | Line | Data |
---|---|---|
2cb7cef9 BS |
1 | From: Yinghai Lu <yhlu.kernel@gmail.com> |
2 | Subject: x86: let 32bit use apic_ops too | |
3 | References: fate #303948 and fate #303984 | |
4 | Patch-Mainline: queued for .28 | |
5 | Commit-ID: c535b6a1a685eb23f96e2c221777d6c1e05080d5 | |
6 | ||
7 | Signed-off-by: Thomas Renninger <trenn@suse.de> | |
8 | ||
9 | Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com> | |
10 | Cc: Suresh Siddha <suresh.b.siddha@intel.com> | |
11 | Signed-off-by: Ingo Molnar <mingo@elte.hu> | |
12 | ||
13 | --- | |
14 | arch/x86/kernel/apic_32.c | 38 ++++++++++++++++++++++++++++++-------- | |
15 | include/asm-x86/apic.h | 4 ---- | |
16 | 2 files changed, 30 insertions(+), 12 deletions(-) | |
17 | ||
18 | Index: linux-2.6.26/arch/x86/kernel/apic_32.c | |
19 | =================================================================== | |
20 | --- linux-2.6.26.orig/arch/x86/kernel/apic_32.c | |
21 | +++ linux-2.6.26/arch/x86/kernel/apic_32.c | |
22 | @@ -145,19 +145,13 @@ static int modern_apic(void) | |
23 | return lapic_get_version() >= 0x14; | |
24 | } | |
25 | ||
26 | -void apic_icr_write(u32 low, u32 id) | |
27 | -{ | |
28 | - apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(id)); | |
29 | - apic_write(APIC_ICR, low); | |
30 | -} | |
31 | - | |
32 | -void apic_wait_icr_idle(void) | |
33 | +void xapic_wait_icr_idle(void) | |
34 | { | |
35 | while (apic_read(APIC_ICR) & APIC_ICR_BUSY) | |
36 | cpu_relax(); | |
37 | } | |
38 | ||
39 | -u32 safe_apic_wait_icr_idle(void) | |
40 | +u32 safe_xapic_wait_icr_idle(void) | |
41 | { | |
42 | u32 send_status; | |
43 | int timeout; | |
44 | @@ -173,6 +167,34 @@ u32 safe_apic_wait_icr_idle(void) | |
45 | return send_status; | |
46 | } | |
47 | ||
48 | +void xapic_icr_write(u32 low, u32 id) | |
49 | +{ | |
50 | + apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(id)); | |
51 | + apic_write(APIC_ICR, low); | |
52 | +} | |
53 | + | |
54 | +u64 xapic_icr_read(void) | |
55 | +{ | |
56 | + u32 icr1, icr2; | |
57 | + | |
58 | + icr2 = apic_read(APIC_ICR2); | |
59 | + icr1 = apic_read(APIC_ICR); | |
60 | + | |
61 | + return icr1 | ((u64)icr2 << 32); | |
62 | +} | |
63 | + | |
64 | +static struct apic_ops xapic_ops = { | |
65 | + .read = native_apic_mem_read, | |
66 | + .write = native_apic_mem_write, | |
67 | + .icr_read = xapic_icr_read, | |
68 | + .icr_write = xapic_icr_write, | |
69 | + .wait_icr_idle = xapic_wait_icr_idle, | |
70 | + .safe_wait_icr_idle = safe_xapic_wait_icr_idle, | |
71 | +}; | |
72 | + | |
73 | +struct apic_ops __read_mostly *apic_ops = &xapic_ops; | |
74 | +EXPORT_SYMBOL_GPL(apic_ops); | |
75 | + | |
76 | /** | |
77 | * enable_NMI_through_LVT0 - enable NMI through local vector table 0 | |
78 | */ | |
79 | Index: linux-2.6.26/include/asm-x86/apic.h | |
80 | =================================================================== | |
81 | --- linux-2.6.26.orig/include/asm-x86/apic.h | |
82 | +++ linux-2.6.26/include/asm-x86/apic.h | |
83 | @@ -49,10 +49,6 @@ extern int disable_apic; | |
84 | #ifdef CONFIG_PARAVIRT | |
85 | #include <asm/paravirt.h> | |
86 | #else | |
87 | -#ifndef CONFIG_X86_64 | |
88 | -#define apic_write native_apic_mem_write | |
89 | -#define apic_read native_apic_mem_read | |
90 | -#endif | |
91 | #define setup_boot_clock setup_boot_APIC_clock | |
92 | #define setup_secondary_clock setup_secondary_APIC_clock | |
93 | #endif |