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[people/pmueller/ipfire-2.x.git] / src / atl1c / atl1c_main.c
1 /*
2 * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved.
3 *
4 * Derived from Intel e1000 driver
5 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the Free
9 * Software Foundation; either version 2 of the License, or (at your option)
10 * any later version.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc., 59
19 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 */
21
22 #include "atl1c.h"
23
24 #define ATL1C_DRV_VERSION "1.0.0.1-NAPI"
25 char atl1c_driver_name[] = "atl1c";
26 char atl1c_driver_version[] = ATL1C_DRV_VERSION;
27 #define PCI_DEVICE_ID_ATTANSIC_L2C 0x1062
28 #define PCI_DEVICE_ID_ATTANSIC_L1C 0x1063
29 /*
30 * atl1c_pci_tbl - PCI Device ID Table
31 *
32 * Wildcard entries (PCI_ANY_ID) should come last
33 * Last entry must be all 0s
34 *
35 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
36 * Class, Class Mask, private data (not used) }
37 */
38 static struct pci_device_id atl1c_pci_tbl[] = {
39 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)},
40 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)},
41 /* required last entry */
42 { 0 }
43 };
44 MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl);
45
46 MODULE_AUTHOR("Jie Yang <jie.yang@atheros.com>");
47 MODULE_DESCRIPTION("Atheros 1000M Ethernet Network Driver");
48 MODULE_LICENSE("GPL");
49 MODULE_VERSION(ATL1C_DRV_VERSION);
50
51 static int atl1c_stop_mac(struct atl1c_hw *hw);
52 static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw);
53 static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw);
54 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw);
55 static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup);
56 static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter);
57 static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, u8 que,
58 int *work_done, int work_to_do);
59
60 static const u16 atl1c_pay_load_size[] = {
61 128, 256, 512, 1024, 2048, 4096,
62 };
63
64 static const u16 atl1c_rfd_prod_idx_regs[AT_MAX_RECEIVE_QUEUE] =
65 {
66 REG_MB_RFD0_PROD_IDX,
67 REG_MB_RFD1_PROD_IDX,
68 REG_MB_RFD2_PROD_IDX,
69 REG_MB_RFD3_PROD_IDX
70 };
71
72 static const u16 atl1c_rfd_addr_lo_regs[AT_MAX_RECEIVE_QUEUE] =
73 {
74 REG_RFD0_HEAD_ADDR_LO,
75 REG_RFD1_HEAD_ADDR_LO,
76 REG_RFD2_HEAD_ADDR_LO,
77 REG_RFD3_HEAD_ADDR_LO
78 };
79
80 static const u16 atl1c_rrd_addr_lo_regs[AT_MAX_RECEIVE_QUEUE] =
81 {
82 REG_RRD0_HEAD_ADDR_LO,
83 REG_RRD1_HEAD_ADDR_LO,
84 REG_RRD2_HEAD_ADDR_LO,
85 REG_RRD3_HEAD_ADDR_LO
86 };
87
88 static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |
89 NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP;
90
91 /*
92 * atl1c_init_pcie - init PCIE module
93 */
94 static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag)
95 {
96 u32 data;
97 u32 pci_cmd;
98 struct pci_dev *pdev = hw->adapter->pdev;
99
100 AT_READ_REG(hw, PCI_COMMAND, &pci_cmd);
101 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
102 pci_cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
103 PCI_COMMAND_IO);
104 AT_WRITE_REG(hw, PCI_COMMAND, pci_cmd);
105
106 /*
107 * Clear any PowerSaveing Settings
108 */
109 pci_enable_wake(pdev, PCI_D3hot, 0);
110 pci_enable_wake(pdev, PCI_D3cold, 0);
111
112 /*
113 * Mask some pcie error bits
114 */
115 AT_READ_REG(hw, REG_PCIE_UC_SEVERITY, &data);
116 data &= ~PCIE_UC_SERVRITY_DLP;
117 data &= ~PCIE_UC_SERVRITY_FCP;
118 AT_WRITE_REG(hw, REG_PCIE_UC_SEVERITY, data);
119
120 if (flag & ATL1C_PCIE_L0S_L1_DISABLE)
121 atl1c_disable_l0s_l1(hw);
122 if (flag & ATL1C_PCIE_PHY_RESET)
123 AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_DEFAULT);
124 else
125 AT_WRITE_REG(hw, REG_GPHY_CTRL,
126 GPHY_CTRL_DEFAULT | GPHY_CTRL_EXT_RESET);
127
128 msleep(1);
129 }
130
131 /*
132 * atl1c_irq_enable - Enable default interrupt generation settings
133 * @adapter: board private structure
134 */
135 static inline void atl1c_irq_enable(struct atl1c_adapter *adapter)
136 {
137 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
138 AT_WRITE_REG(&adapter->hw, REG_ISR, 0x7FFFFFFF);
139 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
140 AT_WRITE_FLUSH(&adapter->hw);
141 }
142 }
143
144 /*
145 * atl1c_irq_disable - Mask off interrupt generation on the NIC
146 * @adapter: board private structure
147 */
148 static inline void atl1c_irq_disable(struct atl1c_adapter *adapter)
149 {
150 atomic_inc(&adapter->irq_sem);
151 AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
152 AT_WRITE_FLUSH(&adapter->hw);
153 synchronize_irq(adapter->pdev->irq);
154 }
155
156 /*
157 * atl1c_irq_reset - reset interrupt confiure on the NIC
158 * @adapter: board private structure
159 */
160 static inline void atl1c_irq_reset(struct atl1c_adapter *adapter)
161 {
162 atomic_set(&adapter->irq_sem, 1);
163 atl1c_irq_enable(adapter);
164 }
165
166 /*
167 * atl1c_wait_until_idle - wait up to AT_HW_MAX_IDLE_DELAY reads
168 * of the idle status register until the device is actually idle
169 */
170 static u32 atl1c_wait_until_idle(struct atl1c_hw *hw)
171 {
172 int timeout;
173 u32 data;
174
175 for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) {
176 AT_READ_REG(hw, REG_IDLE_STATUS, &data);
177 if ((data & IDLE_STATUS_MASK) == 0)
178 return 0;
179 msleep(1);
180 }
181 return data;
182 }
183
184 /*
185 * atl1c_phy_config - Timer Call-back
186 * @data: pointer to netdev cast into an unsigned long
187 */
188 static void atl1c_phy_config(unsigned long data)
189 {
190 struct atl1c_adapter *adapter = (struct atl1c_adapter *) data;
191 struct atl1c_hw *hw = &adapter->hw;
192 unsigned long flags;
193
194 spin_lock_irqsave(&adapter->mdio_lock, flags);
195 atl1c_restart_autoneg(hw);
196 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
197 }
198
199 void atl1c_reinit_locked(struct atl1c_adapter *adapter)
200 {
201
202 WARN_ON(in_interrupt());
203 atl1c_down(adapter);
204 atl1c_up(adapter);
205 clear_bit(__AT_RESETTING, &adapter->flags);
206 }
207
208 static void atl1c_reset_task(struct work_struct *work)
209 {
210 struct atl1c_adapter *adapter;
211 struct net_device *netdev;
212
213 adapter = container_of(work, struct atl1c_adapter, reset_task);
214 netdev = adapter->netdev;
215
216 netif_device_detach(netdev);
217 atl1c_down(adapter);
218 atl1c_up(adapter);
219 netif_device_attach(netdev);
220 }
221
222 static void atl1c_check_link_status(struct atl1c_adapter *adapter)
223 {
224 struct atl1c_hw *hw = &adapter->hw;
225 struct net_device *netdev = adapter->netdev;
226 struct pci_dev *pdev = adapter->pdev;
227 int err;
228 unsigned long flags;
229 u16 speed, duplex, phy_data;
230
231 spin_lock_irqsave(&adapter->mdio_lock, flags);
232 /* MII_BMSR must read twise */
233 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
234 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
235 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
236
237 if ((phy_data & BMSR_LSTATUS) == 0) {
238 /* link down */
239 if (netif_carrier_ok(netdev)) {
240 hw->hibernate = true;
241 if (atl1c_stop_mac(hw) != 0)
242 if (netif_msg_hw(adapter))
243 dev_warn(&pdev->dev,
244 "stop mac failed\n");
245 atl1c_set_aspm(hw, false);
246 }
247 netif_carrier_off(netdev);
248 } else {
249 /* Link Up */
250 hw->hibernate = false;
251 spin_lock_irqsave(&adapter->mdio_lock, flags);
252 err = atl1c_get_speed_and_duplex(hw, &speed, &duplex);
253 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
254 if (unlikely(err))
255 return;
256 /* link result is our setting */
257 if (adapter->link_speed != speed ||
258 adapter->link_duplex != duplex) {
259 adapter->link_speed = speed;
260 adapter->link_duplex = duplex;
261 atl1c_set_aspm(hw, true);
262 atl1c_enable_tx_ctrl(hw);
263 atl1c_enable_rx_ctrl(hw);
264 atl1c_setup_mac_ctrl(adapter);
265 if (netif_msg_link(adapter))
266 dev_info(&pdev->dev,
267 "%s: %s NIC Link is Up<%d Mbps %s>\n",
268 atl1c_driver_name, netdev->name,
269 adapter->link_speed,
270 adapter->link_duplex == FULL_DUPLEX ?
271 "Full Duplex" : "Half Duplex");
272 }
273 if (!netif_carrier_ok(netdev))
274 netif_carrier_on(netdev);
275 }
276 }
277
278 /*
279 * atl1c_link_chg_task - deal with link change event Out of interrupt context
280 * @netdev: network interface device structure
281 */
282 static void atl1c_link_chg_task(struct work_struct *work)
283 {
284 struct atl1c_adapter *adapter;
285
286 adapter = container_of(work, struct atl1c_adapter, link_chg_task);
287 atl1c_check_link_status(adapter);
288 }
289
290 static void atl1c_link_chg_event(struct atl1c_adapter *adapter)
291 {
292 struct net_device *netdev = adapter->netdev;
293 struct pci_dev *pdev = adapter->pdev;
294 u16 phy_data;
295 u16 link_up;
296
297 spin_lock(&adapter->mdio_lock);
298 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
299 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
300 spin_unlock(&adapter->mdio_lock);
301 link_up = phy_data & BMSR_LSTATUS;
302 /* notify upper layer link down ASAP */
303 if (!link_up) {
304 if (netif_carrier_ok(netdev)) {
305 /* old link state: Up */
306 netif_carrier_off(netdev);
307 if (netif_msg_link(adapter))
308 dev_info(&pdev->dev,
309 "%s: %s NIC Link is Down\n",
310 atl1c_driver_name, netdev->name);
311 adapter->link_speed = SPEED_0;
312 }
313 }
314 schedule_work(&adapter->link_chg_task);
315 }
316
317 static void atl1c_del_timer(struct atl1c_adapter *adapter)
318 {
319 del_timer_sync(&adapter->phy_config_timer);
320 }
321
322 static void atl1c_cancel_work(struct atl1c_adapter *adapter)
323 {
324 cancel_work_sync(&adapter->reset_task);
325 cancel_work_sync(&adapter->link_chg_task);
326 }
327
328 /*
329 * atl1c_tx_timeout - Respond to a Tx Hang
330 * @netdev: network interface device structure
331 */
332 static void atl1c_tx_timeout(struct net_device *netdev)
333 {
334 struct atl1c_adapter *adapter = netdev_priv(netdev);
335
336 /* Do the reset outside of interrupt context */
337 schedule_work(&adapter->reset_task);
338 }
339
340 /*
341 * atl1c_set_multi - Multicast and Promiscuous mode set
342 * @netdev: network interface device structure
343 *
344 * The set_multi entry point is called whenever the multicast address
345 * list or the network interface flags are updated. This routine is
346 * responsible for configuring the hardware for proper multicast,
347 * promiscuous mode, and all-multi behavior.
348 */
349 static void atl1c_set_multi(struct net_device *netdev)
350 {
351 struct atl1c_adapter *adapter = netdev_priv(netdev);
352 struct atl1c_hw *hw = &adapter->hw;
353 struct dev_mc_list *mc_ptr;
354 u32 mac_ctrl_data;
355 u32 hash_value;
356
357 /* Check for Promiscuous and All Multicast modes */
358 AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data);
359
360 if (netdev->flags & IFF_PROMISC) {
361 mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
362 } else if (netdev->flags & IFF_ALLMULTI) {
363 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
364 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN;
365 } else {
366 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
367 }
368
369 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
370
371 /* clear the old settings from the multicast hash table */
372 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
373 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
374
375 /* comoute mc addresses' hash value ,and put it into hash table */
376 for (mc_ptr = netdev->mc_list; mc_ptr; mc_ptr = mc_ptr->next) {
377 hash_value = atl1c_hash_mc_addr(hw, mc_ptr->dmi_addr);
378 atl1c_hash_set(hw, hash_value);
379 }
380 }
381
382 static void atl1c_vlan_rx_register(struct net_device *netdev,
383 struct vlan_group *grp)
384 {
385 struct atl1c_adapter *adapter = netdev_priv(netdev);
386 struct pci_dev *pdev = adapter->pdev;
387 u32 mac_ctrl_data = 0;
388
389 if (netif_msg_pktdata(adapter))
390 dev_dbg(&pdev->dev, "atl1c_vlan_rx_register\n");
391
392 atl1c_irq_disable(adapter);
393
394 adapter->vlgrp = grp;
395 AT_READ_REG(&adapter->hw, REG_MAC_CTRL, &mac_ctrl_data);
396
397 if (grp) {
398 /* enable VLAN tag insert/strip */
399 mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
400 } else {
401 /* disable VLAN tag insert/strip */
402 mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN;
403 }
404
405 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
406 atl1c_irq_enable(adapter);
407 }
408
409 static void atl1c_restore_vlan(struct atl1c_adapter *adapter)
410 {
411 struct pci_dev *pdev = adapter->pdev;
412
413 if (netif_msg_pktdata(adapter))
414 dev_dbg(&pdev->dev, "atl1c_restore_vlan !");
415 atl1c_vlan_rx_register(adapter->netdev, adapter->vlgrp);
416 }
417 /*
418 * atl1c_set_mac - Change the Ethernet Address of the NIC
419 * @netdev: network interface device structure
420 * @p: pointer to an address structure
421 *
422 * Returns 0 on success, negative on failure
423 */
424 static int atl1c_set_mac_addr(struct net_device *netdev, void *p)
425 {
426 struct atl1c_adapter *adapter = netdev_priv(netdev);
427 struct sockaddr *addr = p;
428
429 if (!is_valid_ether_addr(addr->sa_data))
430 return -EADDRNOTAVAIL;
431
432 if (netif_running(netdev))
433 return -EBUSY;
434
435 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
436 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
437
438 atl1c_hw_set_mac_addr(&adapter->hw);
439
440 return 0;
441 }
442
443 static void atl1c_set_rxbufsize(struct atl1c_adapter *adapter,
444 struct net_device *dev)
445 {
446 int mtu = dev->mtu;
447
448 adapter->rx_buffer_len = mtu > AT_RX_BUF_SIZE ?
449 roundup(mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN, 8) : AT_RX_BUF_SIZE;
450 }
451 /*
452 * atl1c_change_mtu - Change the Maximum Transfer Unit
453 * @netdev: network interface device structure
454 * @new_mtu: new value for maximum frame size
455 *
456 * Returns 0 on success, negative on failure
457 */
458 static int atl1c_change_mtu(struct net_device *netdev, int new_mtu)
459 {
460 struct atl1c_adapter *adapter = netdev_priv(netdev);
461 int old_mtu = netdev->mtu;
462 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
463
464 if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
465 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
466 if (netif_msg_link(adapter))
467 dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
468 return -EINVAL;
469 }
470 /* set MTU */
471 if (old_mtu != new_mtu && netif_running(netdev)) {
472 while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
473 msleep(1);
474 netdev->mtu = new_mtu;
475 adapter->hw.max_frame_size = new_mtu;
476 atl1c_set_rxbufsize(adapter, netdev);
477 atl1c_down(adapter);
478 atl1c_up(adapter);
479 clear_bit(__AT_RESETTING, &adapter->flags);
480 if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) {
481 u32 phy_data;
482
483 AT_READ_REG(&adapter->hw, 0x1414, &phy_data);
484 phy_data |= 0x10000000;
485 AT_WRITE_REG(&adapter->hw, 0x1414, phy_data);
486 }
487
488 }
489 return 0;
490 }
491
492 /*
493 * caller should hold mdio_lock
494 */
495 static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
496 {
497 struct atl1c_adapter *adapter = netdev_priv(netdev);
498 u16 result;
499
500 atl1c_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result);
501 return result;
502 }
503
504 static void atl1c_mdio_write(struct net_device *netdev, int phy_id,
505 int reg_num, int val)
506 {
507 struct atl1c_adapter *adapter = netdev_priv(netdev);
508
509 atl1c_write_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, val);
510 }
511
512 /*
513 * atl1c_mii_ioctl -
514 * @netdev:
515 * @ifreq:
516 * @cmd:
517 */
518 static int atl1c_mii_ioctl(struct net_device *netdev,
519 struct ifreq *ifr, int cmd)
520 {
521 struct atl1c_adapter *adapter = netdev_priv(netdev);
522 struct pci_dev *pdev = adapter->pdev;
523 struct mii_ioctl_data *data = if_mii(ifr);
524 unsigned long flags;
525 int retval = 0;
526
527 if (!netif_running(netdev))
528 return -EINVAL;
529
530 spin_lock_irqsave(&adapter->mdio_lock, flags);
531 switch (cmd) {
532 case SIOCGMIIPHY:
533 data->phy_id = 0;
534 break;
535
536 case SIOCGMIIREG:
537 if (!capable(CAP_NET_ADMIN)) {
538 retval = -EPERM;
539 goto out;
540 }
541 if (atl1c_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
542 &data->val_out)) {
543 retval = -EIO;
544 goto out;
545 }
546 break;
547
548 case SIOCSMIIREG:
549 if (!capable(CAP_NET_ADMIN)) {
550 retval = -EPERM;
551 goto out;
552 }
553 if (data->reg_num & ~(0x1F)) {
554 retval = -EFAULT;
555 goto out;
556 }
557
558 dev_dbg(&pdev->dev, "<atl1c_mii_ioctl> write %x %x",
559 data->reg_num, data->val_in);
560 if (atl1c_write_phy_reg(&adapter->hw,
561 data->reg_num, data->val_in)) {
562 retval = -EIO;
563 goto out;
564 }
565 break;
566
567 default:
568 retval = -EOPNOTSUPP;
569 break;
570 }
571 out:
572 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
573 return retval;
574 }
575
576 /*
577 * atl1c_ioctl -
578 * @netdev:
579 * @ifreq:
580 * @cmd:
581 */
582 static int atl1c_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
583 {
584 switch (cmd) {
585 case SIOCGMIIPHY:
586 case SIOCGMIIREG:
587 case SIOCSMIIREG:
588 return atl1c_mii_ioctl(netdev, ifr, cmd);
589 default:
590 return -EOPNOTSUPP;
591 }
592 }
593
594 /*
595 * atl1c_alloc_queues - Allocate memory for all rings
596 * @adapter: board private structure to initialize
597 *
598 */
599 static int __devinit atl1c_alloc_queues(struct atl1c_adapter *adapter)
600 {
601 return 0;
602 }
603
604 static void atl1c_set_mac_type(struct atl1c_hw *hw)
605 {
606 switch (hw->device_id) {
607 case PCI_DEVICE_ID_ATTANSIC_L2C:
608 hw->nic_type = athr_l2c;
609 break;
610
611 case PCI_DEVICE_ID_ATTANSIC_L1C:
612 hw->nic_type = athr_l1c;
613 break;
614
615 default:
616 break;
617 }
618 }
619
620 static int atl1c_setup_mac_funcs(struct atl1c_hw *hw)
621 {
622 u32 phy_status_data;
623 u32 link_ctrl_data;
624
625 atl1c_set_mac_type(hw);
626 AT_READ_REG(hw, REG_PHY_STATUS, &phy_status_data);
627 AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data);
628
629 hw->ctrl_flags = ATL1C_INTR_CLEAR_ON_READ |
630 ATL1C_INTR_MODRT_ENABLE |
631 ATL1C_RX_IPV6_CHKSUM |
632 ATL1C_TXQ_MODE_ENHANCE;
633 if (link_ctrl_data & LINK_CTRL_L0S_EN)
634 hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT;
635 if (link_ctrl_data & LINK_CTRL_L1_EN)
636 hw->ctrl_flags |= ATL1C_ASPM_L1_SUPPORT;
637
638 if (hw->nic_type == athr_l1c) {
639 hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON;
640 hw->ctrl_flags |= ATL1C_LINK_CAP_1000M;
641 }
642 return 0;
643 }
644 /*
645 * atl1c_sw_init - Initialize general software structures (struct atl1c_adapter)
646 * @adapter: board private structure to initialize
647 *
648 * atl1c_sw_init initializes the Adapter private data structure.
649 * Fields are initialized based on PCI device information and
650 * OS network device settings (MTU size).
651 */
652 static int __devinit atl1c_sw_init(struct atl1c_adapter *adapter)
653 {
654 struct atl1c_hw *hw = &adapter->hw;
655 struct pci_dev *pdev = adapter->pdev;
656
657 adapter->wol = 0;
658 adapter->link_speed = SPEED_0;
659 adapter->link_duplex = FULL_DUPLEX;
660 adapter->num_rx_queues = AT_DEF_RECEIVE_QUEUE;
661 adapter->tpd_ring[0].count = 1024;
662 adapter->rfd_ring[0].count = 512;
663
664 hw->vendor_id = pdev->vendor;
665 hw->device_id = pdev->device;
666 hw->subsystem_vendor_id = pdev->subsystem_vendor;
667 hw->subsystem_id = pdev->subsystem_device;
668
669 /* before link up, we assume hibernate is true */
670 hw->hibernate = true;
671 hw->media_type = MEDIA_TYPE_AUTO_SENSOR;
672 if (atl1c_setup_mac_funcs(hw) != 0) {
673 dev_err(&pdev->dev, "set mac function pointers failed\n");
674 return -1;
675 }
676 hw->intr_mask = IMR_NORMAL_MASK;
677 hw->phy_configured = false;
678 hw->preamble_len = 7;
679 hw->max_frame_size = adapter->netdev->mtu;
680 if (adapter->num_rx_queues < 2) {
681 hw->rss_type = atl1c_rss_disable;
682 hw->rss_mode = atl1c_rss_mode_disable;
683 } else {
684 hw->rss_type = atl1c_rss_ipv4;
685 hw->rss_mode = atl1c_rss_mul_que_mul_int;
686 hw->rss_hash_bits = 16;
687 }
688 hw->autoneg_advertised = ADVERTISED_Autoneg;
689 hw->indirect_tab = 0xE4E4E4E4;
690 hw->base_cpu = 0;
691
692 hw->ict = 50000; /* 100ms */
693 hw->smb_timer = 200000; /* 400ms */
694 hw->cmb_tpd = 4;
695 hw->cmb_tx_timer = 1; /* 2 us */
696 hw->rx_imt = 200;
697 hw->tx_imt = 1000;
698
699 hw->tpd_burst = 5;
700 hw->rfd_burst = 8;
701 hw->dma_order = atl1c_dma_ord_out;
702 hw->dmar_block = atl1c_dma_req_1024;
703 hw->dmaw_block = atl1c_dma_req_1024;
704 hw->dmar_dly_cnt = 15;
705 hw->dmaw_dly_cnt = 4;
706
707 if (atl1c_alloc_queues(adapter)) {
708 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
709 return -ENOMEM;
710 }
711 /* TODO */
712 atl1c_set_rxbufsize(adapter, adapter->netdev);
713 atomic_set(&adapter->irq_sem, 1);
714 spin_lock_init(&adapter->mdio_lock);
715 spin_lock_init(&adapter->tx_lock);
716 set_bit(__AT_DOWN, &adapter->flags);
717
718 return 0;
719 }
720
721 /*
722 * atl1c_clean_tx_ring - Free Tx-skb
723 * @adapter: board private structure
724 */
725 static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter,
726 enum atl1c_trans_queue type)
727 {
728 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
729 struct atl1c_buffer *buffer_info;
730 struct pci_dev *pdev = adapter->pdev;
731 u16 index, ring_count;
732
733 ring_count = tpd_ring->count;
734 for (index = 0; index < ring_count; index++) {
735 buffer_info = &tpd_ring->buffer_info[index];
736 if (buffer_info->state == ATL1_BUFFER_FREE)
737 continue;
738 if (buffer_info->dma)
739 pci_unmap_single(pdev, buffer_info->dma,
740 buffer_info->length,
741 PCI_DMA_TODEVICE);
742 if (buffer_info->skb)
743 dev_kfree_skb(buffer_info->skb);
744 buffer_info->dma = 0;
745 buffer_info->skb = NULL;
746 buffer_info->state = ATL1_BUFFER_FREE;
747 }
748
749 /* Zero out Tx-buffers */
750 memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) *
751 ring_count);
752 atomic_set(&tpd_ring->next_to_clean, 0);
753 tpd_ring->next_to_use = 0;
754 }
755
756 /*
757 * atl1c_clean_rx_ring - Free rx-reservation skbs
758 * @adapter: board private structure
759 */
760 static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter)
761 {
762 struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
763 struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
764 struct atl1c_buffer *buffer_info;
765 struct pci_dev *pdev = adapter->pdev;
766 int i, j;
767
768 for (i = 0; i < adapter->num_rx_queues; i++) {
769 for (j = 0; j < rfd_ring[i].count; j++) {
770 buffer_info = &rfd_ring[i].buffer_info[j];
771 if (buffer_info->state == ATL1_BUFFER_FREE)
772 continue;
773 if (buffer_info->dma)
774 pci_unmap_single(pdev, buffer_info->dma,
775 buffer_info->length,
776 PCI_DMA_FROMDEVICE);
777 if (buffer_info->skb)
778 dev_kfree_skb(buffer_info->skb);
779 buffer_info->state = ATL1_BUFFER_FREE;
780 buffer_info->skb = NULL;
781 }
782 /* zero out the descriptor ring */
783 memset(rfd_ring[i].desc, 0, rfd_ring[i].size);
784 rfd_ring[i].next_to_clean = 0;
785 rfd_ring[i].next_to_use = 0;
786 rrd_ring[i].next_to_use = 0;
787 rrd_ring[i].next_to_clean = 0;
788 }
789 }
790
791 /*
792 * Read / Write Ptr Initialize:
793 */
794 static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter)
795 {
796 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
797 struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
798 struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
799 struct atl1c_buffer *buffer_info;
800 int i, j;
801
802 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
803 tpd_ring[i].next_to_use = 0;
804 atomic_set(&tpd_ring[i].next_to_clean, 0);
805 buffer_info = tpd_ring[i].buffer_info;
806 for (j = 0; j < tpd_ring->count; j++)
807 buffer_info[i].state = ATL1_BUFFER_FREE;
808 }
809 for (i = 0; i < adapter->num_rx_queues; i++) {
810 rfd_ring[i].next_to_use = 0;
811 rfd_ring[i].next_to_clean = 0;
812 rrd_ring[i].next_to_use = 0;
813 rrd_ring[i].next_to_clean = 0;
814 for (j = 0; j < rfd_ring[i].count; j++) {
815 buffer_info = &rfd_ring[i].buffer_info[j];
816 buffer_info->state = ATL1_BUFFER_FREE;
817 }
818 }
819 }
820
821 /*
822 * atl1c_free_ring_resources - Free Tx / RX descriptor Resources
823 * @adapter: board private structure
824 *
825 * Free all transmit software resources
826 */
827 static void atl1c_free_ring_resources(struct atl1c_adapter *adapter)
828 {
829 struct pci_dev *pdev = adapter->pdev;
830
831 pci_free_consistent(pdev, adapter->ring_header.size,
832 adapter->ring_header.desc,
833 adapter->ring_header.dma);
834 adapter->ring_header.desc = NULL;
835
836 /* Note: just free tdp_ring.buffer_info,
837 * it contain rfd_ring.buffer_info, do not double free */
838 if (adapter->tpd_ring[0].buffer_info) {
839 kfree(adapter->tpd_ring[0].buffer_info);
840 adapter->tpd_ring[0].buffer_info = NULL;
841 }
842 }
843
844 /*
845 * atl1c_setup_mem_resources - allocate Tx / RX descriptor resources
846 * @adapter: board private structure
847 *
848 * Return 0 on success, negative on failure
849 */
850 static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter)
851 {
852 struct pci_dev *pdev = adapter->pdev;
853 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
854 struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
855 struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
856 struct atl1c_ring_header *ring_header = &adapter->ring_header;
857 int num_rx_queues = adapter->num_rx_queues;
858 int size;
859 int i;
860 int count = 0;
861 int rx_desc_count = 0;
862 u32 offset = 0;
863
864 rrd_ring[0].count = rfd_ring[0].count;
865 for (i = 1; i < AT_MAX_TRANSMIT_QUEUE; i++)
866 tpd_ring[i].count = tpd_ring[0].count;
867
868 for (i = 1; i < adapter->num_rx_queues; i++)
869 rfd_ring[i].count = rrd_ring[i].count = rfd_ring[0].count;
870
871 /* 2 tpd queue, one high priority queue,
872 * another normal priority queue */
873 size = sizeof(struct atl1c_buffer) * (tpd_ring->count * 2 +
874 rfd_ring->count * num_rx_queues);
875 tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
876 if (unlikely(!tpd_ring->buffer_info)) {
877 dev_err(&pdev->dev, "kzalloc failed, size = %d\n",
878 size);
879 goto err_nomem;
880 }
881 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
882 tpd_ring[i].buffer_info =
883 (struct atl1c_buffer *) (tpd_ring->buffer_info + count);
884 count += tpd_ring[i].count;
885 }
886
887 for (i = 0; i < num_rx_queues; i++) {
888 rfd_ring[i].buffer_info =
889 (struct atl1c_buffer *) (tpd_ring->buffer_info + count);
890 count += rfd_ring[i].count;
891 rx_desc_count += rfd_ring[i].count;
892 }
893 /*
894 * real ring DMA buffer
895 * each ring/block may need up to 8 bytes for alignment, hence the
896 * additional bytes tacked onto the end.
897 */
898 ring_header->size = size =
899 sizeof(struct atl1c_tpd_desc) * tpd_ring->count * 2 +
900 sizeof(struct atl1c_rx_free_desc) * rx_desc_count +
901 sizeof(struct atl1c_recv_ret_status) * rx_desc_count +
902 sizeof(struct atl1c_hw_stats) +
903 8 * 4 + 8 * 2 * num_rx_queues;
904
905 ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
906 &ring_header->dma);
907 if (unlikely(!ring_header->desc)) {
908 dev_err(&pdev->dev, "pci_alloc_consistend failed\n");
909 goto err_nomem;
910 }
911 memset(ring_header->desc, 0, ring_header->size);
912 /* init TPD ring */
913
914 tpd_ring[0].dma = roundup(ring_header->dma, 8);
915 offset = tpd_ring[0].dma - ring_header->dma;
916 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
917 tpd_ring[i].dma = ring_header->dma + offset;
918 tpd_ring[i].desc = (u8 *) ring_header->desc + offset;
919 tpd_ring[i].size =
920 sizeof(struct atl1c_tpd_desc) * tpd_ring[i].count;
921 offset += roundup(tpd_ring[i].size, 8);
922 }
923 /* init RFD ring */
924 for (i = 0; i < num_rx_queues; i++) {
925 rfd_ring[i].dma = ring_header->dma + offset;
926 rfd_ring[i].desc = (u8 *) ring_header->desc + offset;
927 rfd_ring[i].size = sizeof(struct atl1c_rx_free_desc) *
928 rfd_ring[i].count;
929 offset += roundup(rfd_ring[i].size, 8);
930 }
931
932 /* init RRD ring */
933 for (i = 0; i < num_rx_queues; i++) {
934 rrd_ring[i].dma = ring_header->dma + offset;
935 rrd_ring[i].desc = (u8 *) ring_header->desc + offset;
936 rrd_ring[i].size = sizeof(struct atl1c_recv_ret_status) *
937 rrd_ring[i].count;
938 offset += roundup(rrd_ring[i].size, 8);
939 }
940
941 adapter->smb.dma = ring_header->dma + offset;
942 adapter->smb.smb = (u8 *)ring_header->desc + offset;
943 return 0;
944
945 err_nomem:
946 kfree(tpd_ring->buffer_info);
947 return -ENOMEM;
948 }
949
950 static void atl1c_configure_des_ring(struct atl1c_adapter *adapter)
951 {
952 struct atl1c_hw *hw = &adapter->hw;
953 struct atl1c_rfd_ring *rfd_ring = (struct atl1c_rfd_ring *)
954 adapter->rfd_ring;
955 struct atl1c_rrd_ring *rrd_ring = (struct atl1c_rrd_ring *)
956 adapter->rrd_ring;
957 struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
958 adapter->tpd_ring;
959 struct atl1c_cmb *cmb = (struct atl1c_cmb *) &adapter->cmb;
960 struct atl1c_smb *smb = (struct atl1c_smb *) &adapter->smb;
961 int i;
962
963 /* TPD */
964 AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI,
965 (u32)((tpd_ring[atl1c_trans_normal].dma &
966 AT_DMA_HI_ADDR_MASK) >> 32));
967 /* just enable normal priority TX queue */
968 AT_WRITE_REG(hw, REG_NTPD_HEAD_ADDR_LO,
969 (u32)(tpd_ring[atl1c_trans_normal].dma &
970 AT_DMA_LO_ADDR_MASK));
971 AT_WRITE_REG(hw, REG_HTPD_HEAD_ADDR_LO,
972 (u32)(tpd_ring[atl1c_trans_high].dma &
973 AT_DMA_LO_ADDR_MASK));
974 AT_WRITE_REG(hw, REG_TPD_RING_SIZE,
975 (u32)(tpd_ring[0].count & TPD_RING_SIZE_MASK));
976
977
978 /* RFD */
979 AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI,
980 (u32)((rfd_ring[0].dma & AT_DMA_HI_ADDR_MASK) >> 32));
981 for (i = 0; i < adapter->num_rx_queues; i++)
982 AT_WRITE_REG(hw, atl1c_rfd_addr_lo_regs[i],
983 (u32)(rfd_ring[i].dma & AT_DMA_LO_ADDR_MASK));
984
985 AT_WRITE_REG(hw, REG_RFD_RING_SIZE,
986 rfd_ring[0].count & RFD_RING_SIZE_MASK);
987 AT_WRITE_REG(hw, REG_RX_BUF_SIZE,
988 adapter->rx_buffer_len & RX_BUF_SIZE_MASK);
989
990 /* RRD */
991 for (i = 0; i < adapter->num_rx_queues; i++)
992 AT_WRITE_REG(hw, atl1c_rrd_addr_lo_regs[i],
993 (u32)(rrd_ring[i].dma & AT_DMA_LO_ADDR_MASK));
994 AT_WRITE_REG(hw, REG_RRD_RING_SIZE,
995 (rrd_ring[0].count & RRD_RING_SIZE_MASK));
996
997 /* CMB */
998 AT_WRITE_REG(hw, REG_CMB_BASE_ADDR_LO, cmb->dma & AT_DMA_LO_ADDR_MASK);
999
1000 /* SMB */
1001 AT_WRITE_REG(hw, REG_SMB_BASE_ADDR_HI,
1002 (u32)((smb->dma & AT_DMA_HI_ADDR_MASK) >> 32));
1003 AT_WRITE_REG(hw, REG_SMB_BASE_ADDR_LO,
1004 (u32)(smb->dma & AT_DMA_LO_ADDR_MASK));
1005 /* Load all of base address above */
1006 AT_WRITE_REG(hw, REG_LOAD_PTR, 1);
1007 }
1008
1009 static void atl1c_configure_tx(struct atl1c_adapter *adapter)
1010 {
1011 struct atl1c_hw *hw = &adapter->hw;
1012 u32 dev_ctrl_data;
1013 u32 max_pay_load;
1014 u16 tx_offload_thresh;
1015 u32 txq_ctrl_data;
1016 u32 extra_size = 0; /* Jumbo frame threshold in QWORD unit */
1017
1018 extra_size = ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN;
1019 tx_offload_thresh = MAX_TX_OFFLOAD_THRESH;
1020 AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH,
1021 (tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK);
1022 AT_READ_REG(hw, REG_DEVICE_CTRL, &dev_ctrl_data);
1023 max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_PAYLOAD_SHIFT) &
1024 DEVICE_CTRL_MAX_PAYLOAD_MASK;
1025 hw->dmaw_block = min(max_pay_load, hw->dmaw_block);
1026 max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_RREQ_SZ_SHIFT) &
1027 DEVICE_CTRL_MAX_RREQ_SZ_MASK;
1028 hw->dmar_block = min(max_pay_load, hw->dmar_block);
1029
1030 txq_ctrl_data = (hw->tpd_burst & TXQ_NUM_TPD_BURST_MASK) <<
1031 TXQ_NUM_TPD_BURST_SHIFT;
1032 if (hw->ctrl_flags & ATL1C_TXQ_MODE_ENHANCE)
1033 txq_ctrl_data |= TXQ_CTRL_ENH_MODE;
1034 txq_ctrl_data |= (atl1c_pay_load_size[hw->dmar_block] &
1035 TXQ_TXF_BURST_NUM_MASK) << TXQ_TXF_BURST_NUM_SHIFT;
1036
1037 AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data);
1038 }
1039
1040 static void atl1c_configure_rx(struct atl1c_adapter *adapter)
1041 {
1042 struct atl1c_hw *hw = &adapter->hw;
1043 u32 rxq_ctrl_data;
1044
1045 rxq_ctrl_data = (hw->rfd_burst & RXQ_RFD_BURST_NUM_MASK) <<
1046 RXQ_RFD_BURST_NUM_SHIFT;
1047
1048 if (hw->ctrl_flags & ATL1C_RX_IPV6_CHKSUM)
1049 rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN;
1050 if (hw->rss_type == atl1c_rss_ipv4)
1051 rxq_ctrl_data |= RSS_HASH_IPV4;
1052 if (hw->rss_type == atl1c_rss_ipv4_tcp)
1053 rxq_ctrl_data |= RSS_HASH_IPV4_TCP;
1054 if (hw->rss_type == atl1c_rss_ipv6)
1055 rxq_ctrl_data |= RSS_HASH_IPV6;
1056 if (hw->rss_type == atl1c_rss_ipv6_tcp)
1057 rxq_ctrl_data |= RSS_HASH_IPV6_TCP;
1058 if (hw->rss_type != atl1c_rss_disable)
1059 rxq_ctrl_data |= RRS_HASH_CTRL_EN;
1060
1061 rxq_ctrl_data |= (hw->rss_mode & RSS_MODE_MASK) <<
1062 RSS_MODE_SHIFT;
1063 rxq_ctrl_data |= (hw->rss_hash_bits & RSS_HASH_BITS_MASK) <<
1064 RSS_HASH_BITS_SHIFT;
1065 if (hw->ctrl_flags & ATL1C_ASPM_CTRL_MON)
1066 rxq_ctrl_data |= (ASPM_THRUPUT_LIMIT_100M &
1067 ASPM_THRUPUT_LIMIT_MASK) << ASPM_THRUPUT_LIMIT_SHIFT;
1068
1069 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
1070 }
1071
1072 static void atl1c_configure_rss(struct atl1c_adapter *adapter)
1073 {
1074 struct atl1c_hw *hw = &adapter->hw;
1075
1076 AT_WRITE_REG(hw, REG_IDT_TABLE, hw->indirect_tab);
1077 AT_WRITE_REG(hw, REG_BASE_CPU_NUMBER, hw->base_cpu);
1078 }
1079
1080 static void atl1c_configure_dma(struct atl1c_adapter *adapter)
1081 {
1082 struct atl1c_hw *hw = &adapter->hw;
1083 u32 dma_ctrl_data;
1084
1085 dma_ctrl_data = DMA_CTRL_DMAR_REQ_PRI;
1086 if (hw->ctrl_flags & ATL1C_CMB_ENABLE)
1087 dma_ctrl_data |= DMA_CTRL_CMB_EN;
1088 if (hw->ctrl_flags & ATL1C_SMB_ENABLE)
1089 dma_ctrl_data |= DMA_CTRL_SMB_EN;
1090 else
1091 dma_ctrl_data |= MAC_CTRL_SMB_DIS;
1092
1093 switch (hw->dma_order) {
1094 case atl1c_dma_ord_in:
1095 dma_ctrl_data |= DMA_CTRL_DMAR_IN_ORDER;
1096 break;
1097 case atl1c_dma_ord_enh:
1098 dma_ctrl_data |= DMA_CTRL_DMAR_ENH_ORDER;
1099 break;
1100 case atl1c_dma_ord_out:
1101 dma_ctrl_data |= DMA_CTRL_DMAR_OUT_ORDER;
1102 break;
1103 default:
1104 break;
1105 }
1106
1107 dma_ctrl_data |= (((u32)hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
1108 << DMA_CTRL_DMAR_BURST_LEN_SHIFT;
1109 dma_ctrl_data |= (((u32)hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK)
1110 << DMA_CTRL_DMAW_BURST_LEN_SHIFT;
1111 dma_ctrl_data |= (((u32)hw->dmar_dly_cnt) & DMA_CTRL_DMAR_DLY_CNT_MASK)
1112 << DMA_CTRL_DMAR_DLY_CNT_SHIFT;
1113 dma_ctrl_data |= (((u32)hw->dmaw_dly_cnt) & DMA_CTRL_DMAW_DLY_CNT_MASK)
1114 << DMA_CTRL_DMAW_DLY_CNT_SHIFT;
1115
1116 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);
1117 }
1118
1119 /*
1120 * Stop the mac, transmit and receive units
1121 * hw - Struct containing variables accessed by shared code
1122 * return : 0 or idle status (if error)
1123 */
1124 static int atl1c_stop_mac(struct atl1c_hw *hw)
1125 {
1126 u32 data;
1127
1128 AT_READ_REG(hw, REG_RXQ_CTRL, &data);
1129 data &= ~(RXQ1_CTRL_EN | RXQ2_CTRL_EN |
1130 RXQ3_CTRL_EN | RXQ_CTRL_EN);
1131 AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
1132
1133 AT_READ_REG(hw, REG_TXQ_CTRL, &data);
1134 data &= ~TXQ_CTRL_EN;
1135 AT_WRITE_REG(hw, REG_TWSI_CTRL, data);
1136
1137 atl1c_wait_until_idle(hw);
1138
1139 AT_READ_REG(hw, REG_MAC_CTRL, &data);
1140 data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN);
1141 AT_WRITE_REG(hw, REG_MAC_CTRL, data);
1142
1143 return (int)atl1c_wait_until_idle(hw);
1144 }
1145
1146 static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw)
1147 {
1148 u32 data;
1149
1150 AT_READ_REG(hw, REG_RXQ_CTRL, &data);
1151 switch (hw->adapter->num_rx_queues) {
1152 case 4:
1153 data |= (RXQ3_CTRL_EN | RXQ2_CTRL_EN | RXQ1_CTRL_EN);
1154 break;
1155 case 3:
1156 data |= (RXQ2_CTRL_EN | RXQ1_CTRL_EN);
1157 break;
1158 case 2:
1159 data |= RXQ1_CTRL_EN;
1160 break;
1161 default:
1162 break;
1163 }
1164 data |= RXQ_CTRL_EN;
1165 AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
1166 }
1167
1168 static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw)
1169 {
1170 u32 data;
1171
1172 AT_READ_REG(hw, REG_TXQ_CTRL, &data);
1173 data |= TXQ_CTRL_EN;
1174 AT_WRITE_REG(hw, REG_TXQ_CTRL, data);
1175 }
1176
1177 /*
1178 * Reset the transmit and receive units; mask and clear all interrupts.
1179 * hw - Struct containing variables accessed by shared code
1180 * return : 0 or idle status (if error)
1181 */
1182 static int atl1c_reset_mac(struct atl1c_hw *hw)
1183 {
1184 struct atl1c_adapter *adapter = (struct atl1c_adapter *)hw->adapter;
1185 struct pci_dev *pdev = adapter->pdev;
1186 int ret;
1187
1188 AT_WRITE_REG(hw, REG_IMR, 0);
1189 AT_WRITE_REG(hw, REG_ISR, ISR_DIS_INT);
1190
1191 ret = atl1c_stop_mac(hw);
1192 if (ret)
1193 return ret;
1194 /*
1195 * Issue Soft Reset to the MAC. This will reset the chip's
1196 * transmit, receive, DMA. It will not effect
1197 * the current PCI configuration. The global reset bit is self-
1198 * clearing, and should clear within a microsecond.
1199 */
1200 AT_WRITE_REGW(hw, REG_MASTER_CTRL, MASTER_CTRL_SOFT_RST);
1201 AT_WRITE_FLUSH(hw);
1202 msleep(10);
1203 /* Wait at least 10ms for All module to be Idle */
1204
1205 if (atl1c_wait_until_idle(hw)) {
1206 dev_err(&pdev->dev,
1207 "MAC state machine can't be idle since"
1208 " disabled for 10ms second\n");
1209 return -1;
1210 }
1211 return 0;
1212 }
1213
1214 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw)
1215 {
1216 u32 pm_ctrl_data;
1217
1218 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
1219 pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
1220 PM_CTRL_L1_ENTRY_TIMER_SHIFT);
1221 pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1;
1222 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1223 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1224 pm_ctrl_data &= ~PM_CTRL_MAC_ASPM_CHK;
1225 pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1;
1226
1227 pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN;
1228 pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN;
1229 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN;
1230 AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
1231 }
1232
1233 /*
1234 * Set ASPM state.
1235 * Enable/disable L0s/L1 depend on link state.
1236 */
1237 static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup)
1238 {
1239 u32 pm_ctrl_data;
1240
1241 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
1242
1243 pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1;
1244 pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
1245 PM_CTRL_L1_ENTRY_TIMER_SHIFT);
1246
1247 pm_ctrl_data |= PM_CTRL_MAC_ASPM_CHK;
1248
1249 if (linkup) {
1250 pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN;
1251 pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1;
1252
1253 pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN;
1254 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN;
1255 } else {
1256 pm_ctrl_data &= ~PM_CTRL_SERDES_BUDS_RX_L1_EN;
1257 pm_ctrl_data &= ~PM_CTRL_SERDES_L1_EN;
1258 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1259 pm_ctrl_data &= ~PM_CTRL_SERDES_PLL_L1_EN;
1260
1261 pm_ctrl_data |= PM_CTRL_CLK_SWH_L1;
1262
1263 if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT)
1264 pm_ctrl_data |= PM_CTRL_ASPM_L1_EN;
1265 else
1266 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1267 }
1268
1269 AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
1270 }
1271
1272 static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter)
1273 {
1274 struct atl1c_hw *hw = &adapter->hw;
1275 struct net_device *netdev = adapter->netdev;
1276 u32 mac_ctrl_data;
1277
1278 mac_ctrl_data = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN;
1279 mac_ctrl_data |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
1280
1281 if (adapter->link_duplex == FULL_DUPLEX) {
1282 hw->mac_duplex = true;
1283 mac_ctrl_data |= MAC_CTRL_DUPLX;
1284 }
1285
1286 if (adapter->link_speed == SPEED_1000)
1287 hw->mac_speed = atl1c_mac_speed_1000;
1288 else
1289 hw->mac_speed = atl1c_mac_speed_10_100;
1290
1291 mac_ctrl_data |= (hw->mac_speed & MAC_CTRL_SPEED_MASK) <<
1292 MAC_CTRL_SPEED_SHIFT;
1293
1294 mac_ctrl_data |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
1295 mac_ctrl_data |= ((hw->preamble_len & MAC_CTRL_PRMLEN_MASK) <<
1296 MAC_CTRL_PRMLEN_SHIFT);
1297
1298 if (adapter->vlgrp)
1299 mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
1300
1301 mac_ctrl_data |= MAC_CTRL_BC_EN;
1302 if (netdev->flags & IFF_PROMISC)
1303 mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
1304 if (netdev->flags & IFF_ALLMULTI)
1305 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
1306
1307 mac_ctrl_data |= MAC_CTRL_SINGLE_PAUSE_EN;
1308 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
1309 }
1310
1311 /*
1312 * atl1c_configure - Configure Transmit&Receive Unit after Reset
1313 * @adapter: board private structure
1314 *
1315 * Configure the Tx /Rx unit of the MAC after a reset.
1316 */
1317 static int atl1c_configure(struct atl1c_adapter *adapter)
1318 {
1319 struct atl1c_hw *hw = &adapter->hw;
1320 u32 master_ctrl_data = 0;
1321 u32 intr_modrt_data;
1322
1323 /* clear interrupt status */
1324 AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF);
1325 /* Clear any WOL status */
1326 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
1327 /* set Interrupt Clear Timer
1328 * HW will enable self to assert interrupt event to system after
1329 * waiting x-time for software to notify it accept interrupt.
1330 */
1331 AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER,
1332 hw->ict & INT_RETRIG_TIMER_MASK);
1333
1334 atl1c_configure_des_ring(adapter);
1335
1336 if (hw->ctrl_flags & ATL1C_INTR_MODRT_ENABLE) {
1337 intr_modrt_data = (hw->tx_imt & IRQ_MODRT_TIMER_MASK) <<
1338 IRQ_MODRT_TX_TIMER_SHIFT;
1339 intr_modrt_data |= (hw->rx_imt & IRQ_MODRT_TIMER_MASK) <<
1340 IRQ_MODRT_RX_TIMER_SHIFT;
1341 AT_WRITE_REG(hw, REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data);
1342 master_ctrl_data |=
1343 MASTER_CTRL_TX_ITIMER_EN | MASTER_CTRL_RX_ITIMER_EN;
1344 }
1345
1346 if (hw->ctrl_flags & ATL1C_INTR_CLEAR_ON_READ)
1347 master_ctrl_data |= MASTER_CTRL_INT_RDCLR;
1348
1349 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
1350
1351 if (hw->ctrl_flags & ATL1C_CMB_ENABLE) {
1352 AT_WRITE_REG(hw, REG_CMB_TPD_THRESH,
1353 hw->cmb_tpd & CMB_TPD_THRESH_MASK);
1354 AT_WRITE_REG(hw, REG_CMB_TX_TIMER,
1355 hw->cmb_tx_timer & CMB_TX_TIMER_MASK);
1356 }
1357
1358 if (hw->ctrl_flags & ATL1C_SMB_ENABLE)
1359 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER,
1360 hw->smb_timer & SMB_STAT_TIMER_MASK);
1361 /* set MTU */
1362 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
1363 VLAN_HLEN + ETH_FCS_LEN);
1364 /* HDS, disable */
1365 AT_WRITE_REG(hw, REG_HDS_CTRL, 0);
1366
1367 atl1c_configure_tx(adapter);
1368 atl1c_configure_rx(adapter);
1369 atl1c_configure_rss(adapter);
1370 atl1c_configure_dma(adapter);
1371
1372 return 0;
1373 }
1374
1375 static void atl1c_update_hw_stats(struct atl1c_adapter *adapter)
1376 {
1377 u16 hw_reg_addr = 0;
1378 unsigned long *stats_item = NULL;
1379 u32 data;
1380
1381 /* update rx status */
1382 hw_reg_addr = REG_MAC_RX_STATUS_BIN;
1383 stats_item = &adapter->hw_stats.rx_ok;
1384 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) {
1385 AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
1386 *stats_item += data;
1387 stats_item++;
1388 hw_reg_addr += 4;
1389 }
1390 /* update tx status */
1391 hw_reg_addr = REG_MAC_TX_STATUS_BIN;
1392 stats_item = &adapter->hw_stats.tx_ok;
1393 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) {
1394 AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
1395 *stats_item += data;
1396 stats_item++;
1397 hw_reg_addr += 4;
1398 }
1399 }
1400
1401 /*
1402 * atl1c_get_stats - Get System Network Statistics
1403 * @netdev: network interface device structure
1404 *
1405 * Returns the address of the device statistics structure.
1406 * The statistics are actually updated from the timer callback.
1407 */
1408 static struct net_device_stats *atl1c_get_stats(struct net_device *netdev)
1409 {
1410 struct atl1c_adapter *adapter = netdev_priv(netdev);
1411 struct atl1c_hw_stats *hw_stats = &adapter->hw_stats;
1412 struct net_device_stats *net_stats = &adapter->net_stats;
1413
1414 atl1c_update_hw_stats(adapter);
1415 net_stats->rx_packets = hw_stats->rx_ok;
1416 net_stats->tx_packets = hw_stats->tx_ok;
1417 net_stats->rx_bytes = hw_stats->rx_byte_cnt;
1418 net_stats->tx_bytes = hw_stats->tx_byte_cnt;
1419 net_stats->multicast = hw_stats->rx_mcast;
1420 net_stats->collisions = hw_stats->tx_1_col +
1421 hw_stats->tx_2_col * 2 +
1422 hw_stats->tx_late_col + hw_stats->tx_abort_col;
1423 net_stats->rx_errors = hw_stats->rx_frag + hw_stats->rx_fcs_err +
1424 hw_stats->rx_len_err + hw_stats->rx_sz_ov +
1425 hw_stats->rx_rrd_ov + hw_stats->rx_align_err;
1426 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov;
1427 net_stats->rx_length_errors = hw_stats->rx_len_err;
1428 net_stats->rx_crc_errors = hw_stats->rx_fcs_err;
1429 net_stats->rx_frame_errors = hw_stats->rx_align_err;
1430 net_stats->rx_over_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
1431
1432 net_stats->rx_missed_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
1433
1434 net_stats->tx_errors = hw_stats->tx_late_col + hw_stats->tx_abort_col +
1435 hw_stats->tx_underrun + hw_stats->tx_trunc;
1436 net_stats->tx_fifo_errors = hw_stats->tx_underrun;
1437 net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
1438 net_stats->tx_window_errors = hw_stats->tx_late_col;
1439
1440 return &adapter->net_stats;
1441 }
1442
1443 static inline void atl1c_clear_phy_int(struct atl1c_adapter *adapter)
1444 {
1445 u16 phy_data;
1446
1447 spin_lock(&adapter->mdio_lock);
1448 atl1c_read_phy_reg(&adapter->hw, MII_ISR, &phy_data);
1449 spin_unlock(&adapter->mdio_lock);
1450 }
1451
1452 static bool atl1c_clean_tx_irq(struct atl1c_adapter *adapter,
1453 enum atl1c_trans_queue type)
1454 {
1455 struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
1456 &adapter->tpd_ring[type];
1457 struct atl1c_buffer *buffer_info;
1458 u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1459 u16 hw_next_to_clean;
1460 u16 shift;
1461 u32 data;
1462
1463 if (type == atl1c_trans_high)
1464 shift = MB_HTPD_CONS_IDX_SHIFT;
1465 else
1466 shift = MB_NTPD_CONS_IDX_SHIFT;
1467
1468 AT_READ_REG(&adapter->hw, REG_MB_PRIO_CONS_IDX, &data);
1469 hw_next_to_clean = (data >> shift) & MB_PRIO_PROD_IDX_MASK;
1470
1471 while (next_to_clean != hw_next_to_clean) {
1472 buffer_info = &tpd_ring->buffer_info[next_to_clean];
1473 if (buffer_info->state == ATL1_BUFFER_BUSY) {
1474 pci_unmap_page(adapter->pdev, buffer_info->dma,
1475 buffer_info->length, PCI_DMA_TODEVICE);
1476 buffer_info->dma = 0;
1477 if (buffer_info->skb) {
1478 dev_kfree_skb_irq(buffer_info->skb);
1479 buffer_info->skb = NULL;
1480 }
1481 buffer_info->state = ATL1_BUFFER_FREE;
1482 }
1483 if (++next_to_clean == tpd_ring->count)
1484 next_to_clean = 0;
1485 atomic_set(&tpd_ring->next_to_clean, next_to_clean);
1486 }
1487
1488 if (netif_queue_stopped(adapter->netdev) &&
1489 netif_carrier_ok(adapter->netdev)) {
1490 netif_wake_queue(adapter->netdev);
1491 }
1492
1493 return true;
1494 }
1495
1496 /*
1497 * atl1c_intr - Interrupt Handler
1498 * @irq: interrupt number
1499 * @data: pointer to a network interface device structure
1500 * @pt_regs: CPU registers structure
1501 */
1502 static irqreturn_t atl1c_intr(int irq, void *data)
1503 {
1504 struct net_device *netdev = data;
1505 struct atl1c_adapter *adapter = netdev_priv(netdev);
1506 struct pci_dev *pdev = adapter->pdev;
1507 struct atl1c_hw *hw = &adapter->hw;
1508 int max_ints = AT_MAX_INT_WORK;
1509 int handled = IRQ_NONE;
1510 u32 status;
1511 u32 reg_data;
1512
1513 do {
1514 AT_READ_REG(hw, REG_ISR, &reg_data);
1515 status = reg_data & hw->intr_mask;
1516
1517 if (status == 0 || (status & ISR_DIS_INT) != 0) {
1518 if (max_ints != AT_MAX_INT_WORK)
1519 handled = IRQ_HANDLED;
1520 break;
1521 }
1522 /* link event */
1523 if (status & ISR_GPHY)
1524 atl1c_clear_phy_int(adapter);
1525 /* Ack ISR */
1526 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
1527 if (status & ISR_RX_PKT) {
1528 if (likely(napi_schedule_prep(&adapter->napi))) {
1529 hw->intr_mask &= ~ISR_RX_PKT;
1530 AT_WRITE_REG(hw, REG_IMR, hw->intr_mask);
1531 __napi_schedule(&adapter->napi);
1532 }
1533 }
1534 if (status & ISR_TX_PKT)
1535 atl1c_clean_tx_irq(adapter, atl1c_trans_normal);
1536
1537 handled = IRQ_HANDLED;
1538 /* check if PCIE PHY Link down */
1539 if (status & ISR_ERROR) {
1540 if (netif_msg_hw(adapter))
1541 dev_err(&pdev->dev,
1542 "atl1c hardware error (status = 0x%x)\n",
1543 status & ISR_ERROR);
1544 /* reset MAC */
1545 hw->intr_mask &= ~ISR_ERROR;
1546 AT_WRITE_REG(hw, REG_IMR, hw->intr_mask);
1547 schedule_work(&adapter->reset_task);
1548 break;
1549 }
1550
1551 if (status & ISR_OVER)
1552 if (netif_msg_intr(adapter))
1553 dev_warn(&pdev->dev,
1554 "TX/RX over flow (status = 0x%x)\n",
1555 status & ISR_OVER);
1556
1557 /* link event */
1558 if (status & (ISR_GPHY | ISR_MANUAL)) {
1559 adapter->net_stats.tx_carrier_errors++;
1560 atl1c_link_chg_event(adapter);
1561 break;
1562 }
1563
1564 } while (--max_ints > 0);
1565 /* re-enable Interrupt*/
1566 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
1567 return handled;
1568 }
1569
1570 static inline void atl1c_rx_checksum(struct atl1c_adapter *adapter,
1571 struct sk_buff *skb, struct atl1c_recv_ret_status *prrs)
1572 {
1573 /*
1574 * The pid field in RRS in not correct sometimes, so we
1575 * cannot figure out if the packet is fragmented or not,
1576 * so we tell the KERNEL CHECKSUM_NONE
1577 */
1578 skb->ip_summed = CHECKSUM_NONE;
1579 }
1580
1581 static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter, const int ringid)
1582 {
1583 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[ringid];
1584 struct pci_dev *pdev = adapter->pdev;
1585 struct atl1c_buffer *buffer_info, *next_info;
1586 struct sk_buff *skb;
1587 void *vir_addr = NULL;
1588 u16 num_alloc = 0;
1589 u16 rfd_next_to_use, next_next;
1590 struct atl1c_rx_free_desc *rfd_desc;
1591
1592 next_next = rfd_next_to_use = rfd_ring->next_to_use;
1593 if (++next_next == rfd_ring->count)
1594 next_next = 0;
1595 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1596 next_info = &rfd_ring->buffer_info[next_next];
1597
1598 while (next_info->state == ATL1_BUFFER_FREE) {
1599 rfd_desc = ATL1C_RFD_DESC(rfd_ring, rfd_next_to_use);
1600
1601 skb = dev_alloc_skb(adapter->rx_buffer_len);
1602 if (unlikely(!skb)) {
1603 if (netif_msg_rx_err(adapter))
1604 dev_warn(&pdev->dev, "alloc rx buffer failed\n");
1605 break;
1606 }
1607
1608 /*
1609 * Make buffer alignment 2 beyond a 16 byte boundary
1610 * this will result in a 16 byte aligned IP header after
1611 * the 14 byte MAC header is removed
1612 */
1613 vir_addr = skb->data;
1614 buffer_info->state = ATL1_BUFFER_BUSY;
1615 buffer_info->skb = skb;
1616 buffer_info->length = adapter->rx_buffer_len;
1617 buffer_info->dma = pci_map_single(pdev, vir_addr,
1618 buffer_info->length,
1619 PCI_DMA_FROMDEVICE);
1620 rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
1621 rfd_next_to_use = next_next;
1622 if (++next_next == rfd_ring->count)
1623 next_next = 0;
1624 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1625 next_info = &rfd_ring->buffer_info[next_next];
1626 num_alloc++;
1627 }
1628
1629 if (num_alloc) {
1630 /* TODO: update mailbox here */
1631 wmb();
1632 rfd_ring->next_to_use = rfd_next_to_use;
1633 AT_WRITE_REG(&adapter->hw, atl1c_rfd_prod_idx_regs[ringid],
1634 rfd_ring->next_to_use & MB_RFDX_PROD_IDX_MASK);
1635 }
1636
1637 return num_alloc;
1638 }
1639
1640 static void atl1c_clean_rrd(struct atl1c_rrd_ring *rrd_ring,
1641 struct atl1c_recv_ret_status *rrs, u16 num)
1642 {
1643 u16 i;
1644 /* the relationship between rrd and rfd is one map one */
1645 for (i = 0; i < num; i++, rrs = ATL1C_RRD_DESC(rrd_ring,
1646 rrd_ring->next_to_clean)) {
1647 rrs->word3 &= ~RRS_RXD_UPDATED;
1648 if (++rrd_ring->next_to_clean == rrd_ring->count)
1649 rrd_ring->next_to_clean = 0;
1650 }
1651 }
1652
1653 static void atl1c_clean_rfd(struct atl1c_rfd_ring *rfd_ring,
1654 struct atl1c_recv_ret_status *rrs, u16 num)
1655 {
1656 u16 i;
1657 u16 rfd_index;
1658 struct atl1c_buffer *buffer_info = rfd_ring->buffer_info;
1659
1660 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
1661 RRS_RX_RFD_INDEX_MASK;
1662 for (i = 0; i < num; i++) {
1663 buffer_info[rfd_index].skb = NULL;
1664 buffer_info[rfd_index].state = ATL1_BUFFER_FREE;
1665 if (++rfd_index == rfd_ring->count)
1666 rfd_index = 0;
1667 }
1668 rfd_ring->next_to_clean = rfd_index;
1669 }
1670
1671 static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, u8 que,
1672 int *work_done, int work_to_do)
1673 {
1674 u16 rfd_num, rfd_index;
1675 u16 count = 0;
1676 u16 length;
1677 struct pci_dev *pdev = adapter->pdev;
1678 struct net_device *netdev = adapter->netdev;
1679 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[que];
1680 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring[que];
1681 struct sk_buff *skb;
1682 struct atl1c_recv_ret_status *rrs;
1683 struct atl1c_buffer *buffer_info;
1684
1685 while (1) {
1686 if (*work_done >= work_to_do)
1687 break;
1688 rrs = ATL1C_RRD_DESC(rrd_ring, rrd_ring->next_to_clean);
1689 if (likely(RRS_RXD_IS_VALID(rrs->word3))) {
1690 rfd_num = (rrs->word0 >> RRS_RX_RFD_CNT_SHIFT) &
1691 RRS_RX_RFD_CNT_MASK;
1692 if (unlikely(rfd_num != 1))
1693 /* TODO support mul rfd*/
1694 if (netif_msg_rx_err(adapter))
1695 dev_warn(&pdev->dev,
1696 "Multi rfd not support yet!\n");
1697 goto rrs_checked;
1698 } else {
1699 break;
1700 }
1701 rrs_checked:
1702 atl1c_clean_rrd(rrd_ring, rrs, rfd_num);
1703 if (rrs->word3 & (RRS_RX_ERR_SUM | RRS_802_3_LEN_ERR)) {
1704 atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
1705 if (netif_msg_rx_err(adapter))
1706 dev_warn(&pdev->dev,
1707 "wrong packet! rrs word3 is %x\n",
1708 rrs->word3);
1709 continue;
1710 }
1711
1712 length = le16_to_cpu((rrs->word3 >> RRS_PKT_SIZE_SHIFT) &
1713 RRS_PKT_SIZE_MASK);
1714 /* Good Receive */
1715 if (likely(rfd_num == 1)) {
1716 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
1717 RRS_RX_RFD_INDEX_MASK;
1718 buffer_info = &rfd_ring->buffer_info[rfd_index];
1719 pci_unmap_single(pdev, buffer_info->dma,
1720 buffer_info->length, PCI_DMA_FROMDEVICE);
1721 skb = buffer_info->skb;
1722 } else {
1723 /* TODO */
1724 if (netif_msg_rx_err(adapter))
1725 dev_warn(&pdev->dev,
1726 "Multi rfd not support yet!\n");
1727 break;
1728 }
1729 atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
1730 skb_put(skb, length - ETH_FCS_LEN);
1731 skb->protocol = eth_type_trans(skb, netdev);
1732 skb->dev = netdev;
1733 atl1c_rx_checksum(adapter, skb, rrs);
1734 if (unlikely(adapter->vlgrp) && rrs->word3 & RRS_VLAN_INS) {
1735 u16 vlan;
1736
1737 AT_TAG_TO_VLAN(rrs->vlan_tag, vlan);
1738 vlan = le16_to_cpu(vlan);
1739 vlan_hwaccel_receive_skb(skb, adapter->vlgrp, vlan);
1740 } else
1741 netif_receive_skb(skb);
1742
1743 netdev->last_rx = jiffies;
1744 (*work_done)++;
1745 count++;
1746 }
1747 if (count)
1748 atl1c_alloc_rx_buffer(adapter, que);
1749 }
1750
1751 /*
1752 * atl1c_clean - NAPI Rx polling callback
1753 * @adapter: board private structure
1754 */
1755 static int atl1c_clean(struct napi_struct *napi, int budget)
1756 {
1757 struct atl1c_adapter *adapter =
1758 container_of(napi, struct atl1c_adapter, napi);
1759 int work_done = 0;
1760
1761 /* Keep link state information with original netdev */
1762 if (!netif_carrier_ok(adapter->netdev))
1763 goto quit_polling;
1764 /* just enable one RXQ */
1765 atl1c_clean_rx_irq(adapter, 0, &work_done, budget);
1766
1767 if (work_done < budget) {
1768 quit_polling:
1769 napi_complete(napi);
1770 adapter->hw.intr_mask |= ISR_RX_PKT;
1771 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
1772 }
1773 return work_done;
1774 }
1775
1776 #ifdef CONFIG_NET_POLL_CONTROLLER
1777
1778 /*
1779 * Polling 'interrupt' - used by things like netconsole to send skbs
1780 * without having to re-enable interrupts. It's not called while
1781 * the interrupt routine is executing.
1782 */
1783 static void atl1c_netpoll(struct net_device *netdev)
1784 {
1785 struct atl1c_adapter *adapter = netdev_priv(netdev);
1786
1787 disable_irq(adapter->pdev->irq);
1788 atl1c_intr(adapter->pdev->irq, netdev);
1789 enable_irq(adapter->pdev->irq);
1790 }
1791 #endif
1792
1793 static inline u16 atl1c_tpd_avail(struct atl1c_adapter *adapter, enum atl1c_trans_queue type)
1794 {
1795 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
1796 u16 next_to_use = 0;
1797 u16 next_to_clean = 0;
1798
1799 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1800 next_to_use = tpd_ring->next_to_use;
1801
1802 return (u16)(next_to_clean > next_to_use) ?
1803 (next_to_clean - next_to_use - 1) :
1804 (tpd_ring->count + next_to_clean - next_to_use - 1);
1805 }
1806
1807 /*
1808 * get next usable tpd
1809 * Note: should call atl1c_tdp_avail to make sure
1810 * there is enough tpd to use
1811 */
1812 static struct atl1c_tpd_desc *atl1c_get_tpd(struct atl1c_adapter *adapter,
1813 enum atl1c_trans_queue type)
1814 {
1815 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
1816 struct atl1c_tpd_desc *tpd_desc;
1817 u16 next_to_use = 0;
1818
1819 next_to_use = tpd_ring->next_to_use;
1820 if (++tpd_ring->next_to_use == tpd_ring->count)
1821 tpd_ring->next_to_use = 0;
1822 tpd_desc = ATL1C_TPD_DESC(tpd_ring, next_to_use);
1823 memset(tpd_desc, 0, sizeof(struct atl1c_tpd_desc));
1824 return tpd_desc;
1825 }
1826
1827 static struct atl1c_buffer *
1828 atl1c_get_tx_buffer(struct atl1c_adapter *adapter, struct atl1c_tpd_desc *tpd)
1829 {
1830 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
1831
1832 return &tpd_ring->buffer_info[tpd -
1833 (struct atl1c_tpd_desc *)tpd_ring->desc];
1834 }
1835
1836 /* Calculate the transmit packet descript needed*/
1837 static u16 atl1c_cal_tpd_req(const struct sk_buff *skb)
1838 {
1839 u16 tpd_req;
1840 u16 proto_hdr_len = 0;
1841
1842 tpd_req = skb_shinfo(skb)->nr_frags + 1;
1843
1844 if (skb_is_gso(skb)) {
1845 proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
1846 if (proto_hdr_len < skb_headlen(skb))
1847 tpd_req++;
1848 if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6)
1849 tpd_req++;
1850 }
1851 return tpd_req;
1852 }
1853
1854 static int atl1c_tso_csum(struct atl1c_adapter *adapter,
1855 struct sk_buff *skb,
1856 struct atl1c_tpd_desc **tpd,
1857 enum atl1c_trans_queue type)
1858 {
1859 struct pci_dev *pdev = adapter->pdev;
1860 u8 hdr_len;
1861 u32 real_len;
1862 unsigned short offload_type;
1863 int err;
1864
1865 if (skb_is_gso(skb)) {
1866 if (skb_header_cloned(skb)) {
1867 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
1868 if (unlikely(err))
1869 return -1;
1870 }
1871 offload_type = skb_shinfo(skb)->gso_type;
1872
1873 if (offload_type & SKB_GSO_TCPV4) {
1874 real_len = (((unsigned char *)ip_hdr(skb) - skb->data)
1875 + ntohs(ip_hdr(skb)->tot_len));
1876
1877 if (real_len < skb->len)
1878 pskb_trim(skb, real_len);
1879
1880 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
1881 if (unlikely(skb->len == hdr_len)) {
1882 /* only xsum need */
1883 if (netif_msg_tx_queued(adapter))
1884 dev_warn(&pdev->dev,
1885 "IPV4 tso with zero data??\n");
1886 goto check_sum;
1887 } else {
1888 ip_hdr(skb)->check = 0;
1889 tcp_hdr(skb)->check = ~csum_tcpudp_magic(
1890 ip_hdr(skb)->saddr,
1891 ip_hdr(skb)->daddr,
1892 0, IPPROTO_TCP, 0);
1893 (*tpd)->word1 |= 1 << TPD_IPV4_PACKET_SHIFT;
1894 }
1895 }
1896
1897 if (offload_type & SKB_GSO_TCPV6) {
1898 struct atl1c_tpd_ext_desc *etpd =
1899 *(struct atl1c_tpd_ext_desc **)(tpd);
1900
1901 memset(etpd, 0, sizeof(struct atl1c_tpd_ext_desc));
1902 *tpd = atl1c_get_tpd(adapter, type);
1903 ipv6_hdr(skb)->payload_len = 0;
1904 /* check payload == 0 byte ? */
1905 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
1906 if (unlikely(skb->len == hdr_len)) {
1907 /* only xsum need */
1908 if (netif_msg_tx_queued(adapter))
1909 dev_warn(&pdev->dev,
1910 "IPV6 tso with zero data??\n");
1911 goto check_sum;
1912 } else
1913 tcp_hdr(skb)->check = ~csum_ipv6_magic(
1914 &ipv6_hdr(skb)->saddr,
1915 &ipv6_hdr(skb)->daddr,
1916 0, IPPROTO_TCP, 0);
1917 etpd->word1 |= 1 << TPD_LSO_EN_SHIFT;
1918 etpd->word1 |= 1 << TPD_LSO_VER_SHIFT;
1919 etpd->pkt_len = cpu_to_le32(skb->len);
1920 (*tpd)->word1 |= 1 << TPD_LSO_VER_SHIFT;
1921 }
1922
1923 (*tpd)->word1 |= 1 << TPD_LSO_EN_SHIFT;
1924 (*tpd)->word1 |= (skb_transport_offset(skb) & TPD_TCPHDR_OFFSET_MASK) <<
1925 TPD_TCPHDR_OFFSET_SHIFT;
1926 (*tpd)->word1 |= (skb_shinfo(skb)->gso_size & TPD_MSS_MASK) <<
1927 TPD_MSS_SHIFT;
1928 return 0;
1929 }
1930
1931 check_sum:
1932 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
1933 u8 css, cso;
1934 cso = skb_transport_offset(skb);
1935
1936 if (unlikely(cso & 0x1)) {
1937 if (netif_msg_tx_err(adapter))
1938 dev_err(&adapter->pdev->dev,
1939 "payload offset should not an event number\n");
1940 return -1;
1941 } else {
1942 css = cso + skb->csum_offset;
1943
1944 (*tpd)->word1 |= ((cso >> 1) & TPD_PLOADOFFSET_MASK) <<
1945 TPD_PLOADOFFSET_SHIFT;
1946 (*tpd)->word1 |= ((css >> 1) & TPD_CCSUM_OFFSET_MASK) <<
1947 TPD_CCSUM_OFFSET_SHIFT;
1948 (*tpd)->word1 |= 1 << TPD_CCSUM_EN_SHIFT;
1949 }
1950 }
1951 return 0;
1952 }
1953
1954 static void atl1c_tx_map(struct atl1c_adapter *adapter,
1955 struct sk_buff *skb, struct atl1c_tpd_desc *tpd,
1956 enum atl1c_trans_queue type)
1957 {
1958 struct atl1c_tpd_desc *use_tpd = NULL;
1959 struct atl1c_buffer *buffer_info = NULL;
1960 u16 buf_len = skb_headlen(skb);
1961 u16 map_len = 0;
1962 u16 mapped_len = 0;
1963 u16 hdr_len = 0;
1964 u16 nr_frags;
1965 u16 f;
1966 int tso;
1967
1968 nr_frags = skb_shinfo(skb)->nr_frags;
1969 tso = (tpd->word1 >> TPD_LSO_EN_SHIFT) & TPD_LSO_EN_MASK;
1970 if (tso) {
1971 /* TSO */
1972 map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
1973 use_tpd = tpd;
1974
1975 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
1976 buffer_info->length = map_len;
1977 buffer_info->dma = pci_map_single(adapter->pdev,
1978 skb->data, hdr_len, PCI_DMA_TODEVICE);
1979 buffer_info->state = ATL1_BUFFER_BUSY;
1980 mapped_len += map_len;
1981 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
1982 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
1983 }
1984
1985 if (mapped_len < buf_len) {
1986 /* mapped_len == 0, means we should use the first tpd,
1987 which is given by caller */
1988 if (mapped_len == 0)
1989 use_tpd = tpd;
1990 else {
1991 use_tpd = atl1c_get_tpd(adapter, type);
1992 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
1993 use_tpd = atl1c_get_tpd(adapter, type);
1994 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
1995 }
1996 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
1997 buffer_info->length = buf_len - mapped_len;
1998 buffer_info->dma =
1999 pci_map_single(adapter->pdev, skb->data + mapped_len,
2000 buffer_info->length, PCI_DMA_TODEVICE);
2001 buffer_info->state = ATL1_BUFFER_BUSY;
2002
2003 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2004 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2005 }
2006
2007 for (f = 0; f < nr_frags; f++) {
2008 struct skb_frag_struct *frag;
2009
2010 frag = &skb_shinfo(skb)->frags[f];
2011
2012 use_tpd = atl1c_get_tpd(adapter, type);
2013 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
2014
2015 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2016 buffer_info->length = frag->size;
2017 buffer_info->dma =
2018 pci_map_page(adapter->pdev, frag->page,
2019 frag->page_offset,
2020 buffer_info->length,
2021 PCI_DMA_TODEVICE);
2022 buffer_info->state = ATL1_BUFFER_BUSY;
2023
2024 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2025 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2026 }
2027
2028 /* The last tpd */
2029 use_tpd->word1 |= 1 << TPD_EOP_SHIFT;
2030 /* The last buffer info contain the skb address,
2031 so it will be free after unmap */
2032 buffer_info->skb = skb;
2033 }
2034
2035 static void atl1c_tx_queue(struct atl1c_adapter *adapter, struct sk_buff *skb,
2036 struct atl1c_tpd_desc *tpd, enum atl1c_trans_queue type)
2037 {
2038 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
2039 u32 prod_data;
2040
2041 AT_READ_REG(&adapter->hw, REG_MB_PRIO_PROD_IDX, &prod_data);
2042 switch (type) {
2043 case atl1c_trans_high:
2044 prod_data &= 0xFFFF0000;
2045 prod_data |= tpd_ring->next_to_use & 0xFFFF;
2046 break;
2047 case atl1c_trans_normal:
2048 prod_data &= 0x0000FFFF;
2049 prod_data |= (tpd_ring->next_to_use & 0xFFFF) << 16;
2050 break;
2051 default:
2052 break;
2053 }
2054 wmb();
2055 AT_WRITE_REG(&adapter->hw, REG_MB_PRIO_PROD_IDX, prod_data);
2056 }
2057
2058 static int atl1c_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2059 {
2060 struct atl1c_adapter *adapter = netdev_priv(netdev);
2061 unsigned long flags;
2062 u16 tpd_req = 1;
2063 struct atl1c_tpd_desc *tpd;
2064 enum atl1c_trans_queue type = atl1c_trans_normal;
2065
2066 if (test_bit(__AT_DOWN, &adapter->flags)) {
2067 dev_kfree_skb_any(skb);
2068 return NETDEV_TX_OK;
2069 }
2070
2071 tpd_req = atl1c_cal_tpd_req(skb);
2072 if (!spin_trylock_irqsave(&adapter->tx_lock, flags)) {
2073 if (netif_msg_pktdata(adapter))
2074 dev_info(&adapter->pdev->dev, "tx locked\n");
2075 return NETDEV_TX_LOCKED;
2076 }
2077 if (skb->mark == 0x01)
2078 type = atl1c_trans_high;
2079 else
2080 type = atl1c_trans_normal;
2081
2082 if (atl1c_tpd_avail(adapter, type) < tpd_req) {
2083 /* no enough descriptor, just stop queue */
2084 netif_stop_queue(netdev);
2085 spin_unlock_irqrestore(&adapter->tx_lock, flags);
2086 return NETDEV_TX_BUSY;
2087 }
2088
2089 tpd = atl1c_get_tpd(adapter, type);
2090
2091 /* do TSO and check sum */
2092 if (atl1c_tso_csum(adapter, skb, &tpd, type) != 0) {
2093 spin_unlock_irqrestore(&adapter->tx_lock, flags);
2094 dev_kfree_skb_any(skb);
2095 return NETDEV_TX_OK;
2096 }
2097
2098 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
2099 u16 vlan = vlan_tx_tag_get(skb);
2100 __le16 tag;
2101
2102 vlan = cpu_to_le16(vlan);
2103 AT_VLAN_TO_TAG(vlan, tag);
2104 tpd->word1 |= 1 << TPD_INS_VTAG_SHIFT;
2105 tpd->vlan_tag = tag;
2106 }
2107
2108 if (skb_network_offset(skb) != ETH_HLEN)
2109 tpd->word1 |= 1 << TPD_ETH_TYPE_SHIFT; /* Ethernet frame */
2110
2111 atl1c_tx_map(adapter, skb, tpd, type);
2112 atl1c_tx_queue(adapter, skb, tpd, type);
2113
2114 spin_unlock_irqrestore(&adapter->tx_lock, flags);
2115 return NETDEV_TX_OK;
2116 }
2117
2118 static void atl1c_free_irq(struct atl1c_adapter *adapter)
2119 {
2120 struct net_device *netdev = adapter->netdev;
2121
2122 free_irq(adapter->pdev->irq, netdev);
2123
2124 if (adapter->have_msi)
2125 pci_disable_msi(adapter->pdev);
2126 }
2127
2128 static int atl1c_request_irq(struct atl1c_adapter *adapter)
2129 {
2130 struct pci_dev *pdev = adapter->pdev;
2131 struct net_device *netdev = adapter->netdev;
2132 int flags = 0;
2133 int err = 0;
2134
2135 adapter->have_msi = true;
2136 err = pci_enable_msi(adapter->pdev);
2137 if (err) {
2138 if (netif_msg_ifup(adapter))
2139 dev_err(&pdev->dev,
2140 "Unable to allocate MSI interrupt Error: %d\n",
2141 err);
2142 adapter->have_msi = false;
2143 } else
2144 netdev->irq = pdev->irq;
2145
2146 if (!adapter->have_msi)
2147 flags |= IRQF_SHARED;
2148 err = request_irq(adapter->pdev->irq, &atl1c_intr, flags,
2149 netdev->name, netdev);
2150 if (err) {
2151 if (netif_msg_ifup(adapter))
2152 dev_err(&pdev->dev,
2153 "Unable to allocate interrupt Error: %d\n",
2154 err);
2155 if (adapter->have_msi)
2156 pci_disable_msi(adapter->pdev);
2157 return err;
2158 }
2159 if (netif_msg_ifup(adapter))
2160 dev_dbg(&pdev->dev, "atl1c_request_irq OK\n");
2161 return err;
2162 }
2163
2164 int atl1c_up(struct atl1c_adapter *adapter)
2165 {
2166 struct net_device *netdev = adapter->netdev;
2167 int num;
2168 int err;
2169 int i;
2170
2171 netif_carrier_off(netdev);
2172 atl1c_init_ring_ptrs(adapter);
2173 atl1c_set_multi(netdev);
2174 atl1c_restore_vlan(adapter);
2175
2176 for (i = 0; i < adapter->num_rx_queues; i++) {
2177 num = atl1c_alloc_rx_buffer(adapter, i);
2178 if (unlikely(num == 0)) {
2179 err = -ENOMEM;
2180 goto err_alloc_rx;
2181 }
2182 }
2183
2184 if (atl1c_configure(adapter)) {
2185 err = -EIO;
2186 goto err_up;
2187 }
2188
2189 err = atl1c_request_irq(adapter);
2190 if (unlikely(err))
2191 goto err_up;
2192
2193 clear_bit(__AT_DOWN, &adapter->flags);
2194 napi_enable(&adapter->napi);
2195 atl1c_irq_enable(adapter);
2196 atl1c_check_link_status(adapter);
2197 netif_start_queue(netdev);
2198 return err;
2199
2200 err_up:
2201 err_alloc_rx:
2202 atl1c_clean_rx_ring(adapter);
2203 return err;
2204 }
2205
2206 void atl1c_down(struct atl1c_adapter *adapter)
2207 {
2208 struct net_device *netdev = adapter->netdev;
2209
2210 atl1c_del_timer(adapter);
2211 atl1c_cancel_work(adapter);
2212
2213 /* signal that we're down so the interrupt handler does not
2214 * reschedule our watchdog timer */
2215 set_bit(__AT_DOWN, &adapter->flags);
2216 netif_carrier_off(netdev);
2217 napi_disable(&adapter->napi);
2218 atl1c_irq_disable(adapter);
2219 atl1c_free_irq(adapter);
2220 AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT);
2221 /* reset MAC to disable all RX/TX */
2222 atl1c_reset_mac(&adapter->hw);
2223 msleep(1);
2224
2225 adapter->link_speed = SPEED_0;
2226 adapter->link_duplex = -1;
2227 atl1c_clean_tx_ring(adapter, atl1c_trans_normal);
2228 atl1c_clean_tx_ring(adapter, atl1c_trans_high);
2229 atl1c_clean_rx_ring(adapter);
2230 }
2231
2232 /*
2233 * atl1c_open - Called when a network interface is made active
2234 * @netdev: network interface device structure
2235 *
2236 * Returns 0 on success, negative value on failure
2237 *
2238 * The open entry point is called when a network interface is made
2239 * active by the system (IFF_UP). At this point all resources needed
2240 * for transmit and receive operations are allocated, the interrupt
2241 * handler is registered with the OS, the watchdog timer is started,
2242 * and the stack is notified that the interface is ready.
2243 */
2244 static int atl1c_open(struct net_device *netdev)
2245 {
2246 struct atl1c_adapter *adapter = netdev_priv(netdev);
2247 int err;
2248
2249 /* disallow open during test */
2250 if (test_bit(__AT_TESTING, &adapter->flags))
2251 return -EBUSY;
2252
2253 /* allocate rx/tx dma buffer & descriptors */
2254 err = atl1c_setup_ring_resources(adapter);
2255 if (unlikely(err))
2256 return err;
2257
2258 err = atl1c_up(adapter);
2259 if (unlikely(err))
2260 goto err_up;
2261
2262 if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) {
2263 u32 phy_data;
2264
2265 AT_READ_REG(&adapter->hw, REG_MDIO_CTRL, &phy_data);
2266 phy_data |= MDIO_AP_EN;
2267 AT_WRITE_REG(&adapter->hw, REG_MDIO_CTRL, phy_data);
2268 }
2269 return 0;
2270
2271 err_up:
2272 atl1c_free_irq(adapter);
2273 atl1c_free_ring_resources(adapter);
2274 atl1c_reset_mac(&adapter->hw);
2275 return err;
2276 }
2277
2278 /*
2279 * atl1c_close - Disables a network interface
2280 * @netdev: network interface device structure
2281 *
2282 * Returns 0, this is not allowed to fail
2283 *
2284 * The close entry point is called when an interface is de-activated
2285 * by the OS. The hardware is still under the drivers control, but
2286 * needs to be disabled. A global MAC reset is issued to stop the
2287 * hardware, and all transmit and receive resources are freed.
2288 */
2289 static int atl1c_close(struct net_device *netdev)
2290 {
2291 struct atl1c_adapter *adapter = netdev_priv(netdev);
2292
2293 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2294 atl1c_down(adapter);
2295 atl1c_free_ring_resources(adapter);
2296 return 0;
2297 }
2298
2299 static int atl1c_suspend(struct pci_dev *pdev, pm_message_t state)
2300 {
2301 struct net_device *netdev = pci_get_drvdata(pdev);
2302 struct atl1c_adapter *adapter = netdev_priv(netdev);
2303 struct atl1c_hw *hw = &adapter->hw;
2304 u32 ctrl;
2305 u32 mac_ctrl_data;
2306 u32 master_ctrl_data;
2307 u32 wol_ctrl_data;
2308 u16 mii_bmsr_data;
2309 u16 save_autoneg_advertised;
2310 u16 mii_intr_status_data;
2311 u32 wufc = adapter->wol;
2312 u32 i;
2313 int retval = 0;
2314
2315 if (netif_running(netdev)) {
2316 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2317 atl1c_down(adapter);
2318 }
2319 netif_device_detach(netdev);
2320 atl1c_disable_l0s_l1(hw);
2321 retval = pci_save_state(pdev);
2322 if (retval)
2323 return retval;
2324 if (wufc) {
2325 AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data);
2326 master_ctrl_data &= ~MASTER_CTRL_CLK_SEL_DIS;
2327
2328 /* get link status */
2329 atl1c_read_phy_reg(hw, MII_BMSR, (u16 *)&mii_bmsr_data);
2330 atl1c_read_phy_reg(hw, MII_BMSR, (u16 *)&mii_bmsr_data);
2331 save_autoneg_advertised = hw->autoneg_advertised;
2332 hw->autoneg_advertised = ADVERTISED_10baseT_Half;
2333 if (atl1c_restart_autoneg(hw) != 0)
2334 if (netif_msg_link(adapter))
2335 dev_warn(&pdev->dev, "phy autoneg failed\n");
2336 hw->phy_configured = false; /* re-init PHY when resume */
2337 hw->autoneg_advertised = save_autoneg_advertised;
2338 /* turn on magic packet wol */
2339 if (wufc & AT_WUFC_MAG)
2340 wol_ctrl_data = WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
2341
2342 if (wufc & AT_WUFC_LNKC) {
2343 for (i = 0; i < AT_SUSPEND_LINK_TIMEOUT; i++) {
2344 msleep(100);
2345 atl1c_read_phy_reg(hw, MII_BMSR,
2346 (u16 *)&mii_bmsr_data);
2347 if (mii_bmsr_data & BMSR_LSTATUS)
2348 break;
2349 }
2350 if ((mii_bmsr_data & BMSR_LSTATUS) == 0)
2351 if (netif_msg_link(adapter))
2352 dev_warn(&pdev->dev,
2353 "%s: Link may change"
2354 "when suspend\n",
2355 atl1c_driver_name);
2356 wol_ctrl_data |= WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN;
2357 /* only link up can wake up */
2358 if (atl1c_write_phy_reg(hw, MII_IER, IER_LINK_UP) != 0) {
2359 if (netif_msg_link(adapter))
2360 dev_err(&pdev->dev,
2361 "%s: read write phy "
2362 "register failed.\n",
2363 atl1c_driver_name);
2364 goto wol_dis;
2365 }
2366 }
2367 /* clear phy interrupt */
2368 atl1c_read_phy_reg(hw, MII_ISR, &mii_intr_status_data);
2369 /* Config MAC Ctrl register */
2370 mac_ctrl_data = MAC_CTRL_RX_EN;
2371 /* set to 10/100M halt duplex */
2372 mac_ctrl_data |= atl1c_mac_speed_10_100 << MAC_CTRL_SPEED_SHIFT;
2373 mac_ctrl_data |= (((u32)adapter->hw.preamble_len &
2374 MAC_CTRL_PRMLEN_MASK) <<
2375 MAC_CTRL_PRMLEN_SHIFT);
2376
2377 if (adapter->vlgrp)
2378 mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
2379
2380 /* magic packet maybe Broadcast&multicast&Unicast frame */
2381 if (wufc & AT_WUFC_MAG)
2382 mac_ctrl_data |= MAC_CTRL_BC_EN;
2383
2384 if (netif_msg_hw(adapter))
2385 dev_dbg(&pdev->dev,
2386 "%s: suspend MAC=0x%x\n",
2387 atl1c_driver_name, mac_ctrl_data);
2388 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
2389 AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl_data);
2390 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
2391
2392 /* pcie patch */
2393 AT_READ_REG(hw, REG_PCIE_PHYMISC, &ctrl);
2394 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2395 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
2396
2397 pci_enable_wake(pdev, pci_choose_state(pdev, state), 1);
2398 goto suspend_exit;
2399 }
2400 wol_dis:
2401
2402 /* WOL disabled */
2403 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
2404
2405 /* pcie patch */
2406 AT_READ_REG(hw, REG_PCIE_PHYMISC, &ctrl);
2407 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2408 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
2409
2410 atl1c_phy_disable(hw);
2411 hw->phy_configured = false; /* re-init PHY when resume */
2412
2413 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
2414 suspend_exit:
2415
2416 pci_disable_device(pdev);
2417 pci_set_power_state(pdev, pci_choose_state(pdev, state));
2418
2419 return 0;
2420 }
2421
2422 static int atl1c_resume(struct pci_dev *pdev)
2423 {
2424 struct net_device *netdev = pci_get_drvdata(pdev);
2425 struct atl1c_adapter *adapter = netdev_priv(netdev);
2426
2427 pci_set_power_state(pdev, PCI_D0);
2428 pci_restore_state(pdev);
2429 pci_enable_wake(pdev, PCI_D3hot, 0);
2430 pci_enable_wake(pdev, PCI_D3cold, 0);
2431
2432 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
2433
2434 atl1c_phy_reset(&adapter->hw);
2435 atl1c_reset_mac(&adapter->hw);
2436 netif_device_attach(netdev);
2437 if (netif_running(netdev))
2438 atl1c_up(adapter);
2439
2440 return 0;
2441 }
2442
2443 static void atl1c_shutdown(struct pci_dev *pdev)
2444 {
2445 atl1c_suspend(pdev, PMSG_SUSPEND);
2446 }
2447
2448 #ifdef HAVE_NET_DEVICE_OPS
2449 static const struct net_device_ops atl1c_netdev_ops = {
2450 .ndo_open = atl1c_open,
2451 .ndo_stop = atl1c_close,
2452 .ndo_validate_addr = eth_validate_addr,
2453 .ndo_start_xmit = atl1c_xmit_frame,
2454 .ndo_set_mac_address = atl1c_set_mac_addr,
2455 .ndo_set_multicast_list = atl1c_set_multi,
2456 .ndo_change_mtu = atl1c_change_mtu,
2457 .ndo_do_ioctl = atl1c_ioctl,
2458 .ndo_tx_timeout = atl1c_tx_timeout,
2459 .ndo_get_stats = atl1c_get_stats,
2460 .ndo_vlan_rx_register = atl1c_vlan_rx_register,
2461 #ifdef CONFIG_NET_POLL_CONTROLLER
2462 .ndo_poll_controller = atl1c_netpoll,
2463 #endif /*HAVE_NET_DEVICE_OPS*/
2464 };
2465 #endif
2466
2467 static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
2468 {
2469 SET_NETDEV_DEV(netdev, &pdev->dev);
2470 pci_set_drvdata(pdev, netdev);
2471
2472 netdev->irq = pdev->irq;
2473
2474 #ifdef HAVE_NET_DEVICE_OPS
2475 netdev->netdev_ops = &atl1c_netdev_ops;
2476 #else
2477 netdev->open = &atl1c_open;
2478 netdev->stop = &atl1c_close;
2479 netdev->hard_start_xmit = &atl1c_xmit_frame;
2480 netdev->set_mac_address = &atl1c_set_mac_addr;
2481 netdev->set_multicast_list = &atl1c_set_multi;
2482 netdev->change_mtu = &atl1c_change_mtu;
2483 netdev->do_ioctl = &atl1c_ioctl;
2484 netdev->tx_timeout = &atl1c_tx_timeout;
2485 netdev->get_stats = &atl1c_get_stats;
2486 netdev->vlan_rx_register = atl1c_vlan_rx_register;
2487 #endif /*HAVE_NET_DEVICE_OPS*/
2488
2489 netdev->watchdog_timeo = AT_TX_WATCHDOG;
2490 atl1c_set_ethtool_ops(netdev);
2491
2492 /* TODO: add when ready */
2493 netdev->features = NETIF_F_SG |
2494 NETIF_F_HW_CSUM |
2495 NETIF_F_HW_VLAN_TX |
2496 NETIF_F_HW_VLAN_RX |
2497 NETIF_F_TSO |
2498 NETIF_F_TSO6;
2499 return 0;
2500 }
2501
2502 /*
2503 * atl1c_probe - Device Initialization Routine
2504 * @pdev: PCI device information struct
2505 * @ent: entry in atl1c_pci_tbl
2506 *
2507 * Returns 0 on success, negative on failure
2508 *
2509 * atl1c_probe initializes an adapter identified by a pci_dev structure.
2510 * The OS initialization, configuring of the adapter private structure,
2511 * and a hardware reset occur.
2512 */
2513 static int __devinit atl1c_probe(struct pci_dev *pdev,
2514 const struct pci_device_id *ent)
2515 {
2516 struct net_device *netdev;
2517 struct atl1c_adapter *adapter;
2518 static int cards_found;
2519
2520 int err = 0;
2521
2522 /* enable device (incl. PCI PM wakeup and hotplug setup) */
2523 err = pci_enable_device_mem(pdev);
2524 if (err) {
2525 dev_err(&pdev->dev, "cannot enable PCI device\n");
2526 return err;
2527 }
2528
2529 /*
2530 * The atl1c chip can DMA to 64-bit addresses, but it uses a single
2531 * shared register for the high 32 bits, so only a single, aligned,
2532 * 4 GB physical address range can be used at a time.
2533 *
2534 * Supporting 64-bit DMA on this hardware is more trouble than it's
2535 * worth. It is far easier to limit to 32-bit DMA than update
2536 * various kernel subsystems to support the mechanics required by a
2537 * fixed-high-32-bit system.
2538 */
2539 if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) ||
2540 (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) {
2541 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
2542 goto err_dma;
2543 }
2544
2545 err = pci_request_regions(pdev, atl1c_driver_name);
2546 if (err) {
2547 dev_err(&pdev->dev, "cannot obtain PCI resources\n");
2548 goto err_pci_reg;
2549 }
2550
2551 pci_set_master(pdev);
2552
2553 netdev = alloc_etherdev(sizeof(struct atl1c_adapter));
2554 if (netdev == NULL) {
2555 err = -ENOMEM;
2556 dev_err(&pdev->dev, "etherdev alloc failed\n");
2557 goto err_alloc_etherdev;
2558 }
2559
2560 err = atl1c_init_netdev(netdev, pdev);
2561 if (err) {
2562 dev_err(&pdev->dev, "init netdevice failed\n");
2563 goto err_init_netdev;
2564 }
2565 adapter = netdev_priv(netdev);
2566 adapter->bd_number = cards_found;
2567 adapter->netdev = netdev;
2568 adapter->pdev = pdev;
2569 adapter->hw.adapter = adapter;
2570 adapter->msg_enable = netif_msg_init(-1, atl1c_default_msg);
2571 adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
2572 if (!adapter->hw.hw_addr) {
2573 err = -EIO;
2574 dev_err(&pdev->dev, "cannot map device registers\n");
2575 goto err_ioremap;
2576 }
2577 netdev->base_addr = (unsigned long)adapter->hw.hw_addr;
2578
2579 /* init mii data */
2580 adapter->mii.dev = netdev;
2581 adapter->mii.mdio_read = atl1c_mdio_read;
2582 adapter->mii.mdio_write = atl1c_mdio_write;
2583 adapter->mii.phy_id_mask = 0x1f;
2584 adapter->mii.reg_num_mask = MDIO_REG_ADDR_MASK;
2585 netif_napi_add(netdev, &adapter->napi, atl1c_clean, 64);
2586 setup_timer(&adapter->phy_config_timer, atl1c_phy_config,
2587 (unsigned long)adapter);
2588 /* setup the private structure */
2589 err = atl1c_sw_init(adapter);
2590 if (err) {
2591 dev_err(&pdev->dev, "net device private data init failed\n");
2592 goto err_sw_init;
2593 }
2594 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE |
2595 ATL1C_PCIE_PHY_RESET);
2596
2597 /* Init GPHY as early as possible due to power saving issue */
2598 atl1c_phy_reset(&adapter->hw);
2599
2600 err = atl1c_reset_mac(&adapter->hw);
2601 if (err) {
2602 err = -EIO;
2603 goto err_reset;
2604 }
2605
2606 device_init_wakeup(&pdev->dev, 1);
2607 /* reset the controller to
2608 * put the device in a known good starting state */
2609 err = atl1c_phy_init(&adapter->hw);
2610 if (err) {
2611 err = -EIO;
2612 goto err_reset;
2613 }
2614 if (atl1c_read_mac_addr(&adapter->hw) != 0) {
2615 err = -EIO;
2616 dev_err(&pdev->dev, "get mac address failed\n");
2617 goto err_eeprom;
2618 }
2619 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
2620 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
2621 if (netif_msg_probe(adapter))
2622 dev_dbg(&pdev->dev,
2623 "mac address : %02x-%02x-%02x-%02x-%02x-%02x\n",
2624 adapter->hw.mac_addr[0], adapter->hw.mac_addr[1],
2625 adapter->hw.mac_addr[2], adapter->hw.mac_addr[3],
2626 adapter->hw.mac_addr[4], adapter->hw.mac_addr[5]);
2627
2628 atl1c_hw_set_mac_addr(&adapter->hw);
2629 INIT_WORK(&adapter->reset_task, atl1c_reset_task);
2630 INIT_WORK(&adapter->link_chg_task, atl1c_link_chg_task);
2631 err = register_netdev(netdev);
2632 if (err) {
2633 dev_err(&pdev->dev, "register netdevice failed\n");
2634 goto err_register;
2635 }
2636
2637 if (netif_msg_probe(adapter))
2638 dev_info(&pdev->dev, "version %s\n", ATL1C_DRV_VERSION);
2639 cards_found++;
2640 return 0;
2641
2642 err_reset:
2643 err_register:
2644 err_sw_init:
2645 err_eeprom:
2646 iounmap(adapter->hw.hw_addr);
2647 err_init_netdev:
2648 err_ioremap:
2649 free_netdev(netdev);
2650 err_alloc_etherdev:
2651 pci_release_regions(pdev);
2652 err_pci_reg:
2653 err_dma:
2654 pci_disable_device(pdev);
2655 return err;
2656 }
2657
2658 /*
2659 * atl1c_remove - Device Removal Routine
2660 * @pdev: PCI device information struct
2661 *
2662 * atl1c_remove is called by the PCI subsystem to alert the driver
2663 * that it should release a PCI device. The could be caused by a
2664 * Hot-Plug event, or because the driver is going to be removed from
2665 * memory.
2666 */
2667 static void __devexit atl1c_remove(struct pci_dev *pdev)
2668 {
2669 struct net_device *netdev = pci_get_drvdata(pdev);
2670 struct atl1c_adapter *adapter = netdev_priv(netdev);
2671
2672 unregister_netdev(netdev);
2673 atl1c_phy_disable(&adapter->hw);
2674
2675 iounmap(adapter->hw.hw_addr);
2676
2677 pci_release_regions(pdev);
2678 pci_disable_device(pdev);
2679 free_netdev(netdev);
2680 }
2681
2682 /*
2683 * atl1c_io_error_detected - called when PCI error is detected
2684 * @pdev: Pointer to PCI device
2685 * @state: The current pci connection state
2686 *
2687 * This function is called after a PCI bus error affecting
2688 * this device has been detected.
2689 */
2690 static pci_ers_result_t atl1c_io_error_detected(struct pci_dev *pdev,
2691 pci_channel_state_t state)
2692 {
2693 struct net_device *netdev = pci_get_drvdata(pdev);
2694 struct atl1c_adapter *adapter = netdev_priv(netdev);
2695
2696 netif_device_detach(netdev);
2697
2698 if (netif_running(netdev))
2699 atl1c_down(adapter);
2700
2701 pci_disable_device(pdev);
2702
2703 /* Request a slot slot reset. */
2704 return PCI_ERS_RESULT_NEED_RESET;
2705 }
2706
2707 /*
2708 * atl1c_io_slot_reset - called after the pci bus has been reset.
2709 * @pdev: Pointer to PCI device
2710 *
2711 * Restart the card from scratch, as if from a cold-boot. Implementation
2712 * resembles the first-half of the e1000_resume routine.
2713 */
2714 static pci_ers_result_t atl1c_io_slot_reset(struct pci_dev *pdev)
2715 {
2716 struct net_device *netdev = pci_get_drvdata(pdev);
2717 struct atl1c_adapter *adapter = netdev_priv(netdev);
2718
2719 if (pci_enable_device(pdev)) {
2720 if (netif_msg_hw(adapter))
2721 dev_err(&pdev->dev,
2722 "Cannot re-enable PCI device after reset\n");
2723 return PCI_ERS_RESULT_DISCONNECT;
2724 }
2725 pci_set_master(pdev);
2726
2727 pci_enable_wake(pdev, PCI_D3hot, 0);
2728 pci_enable_wake(pdev, PCI_D3cold, 0);
2729
2730 atl1c_reset_mac(&adapter->hw);
2731
2732 return PCI_ERS_RESULT_RECOVERED;
2733 }
2734
2735 /*
2736 * atl1c_io_resume - called when traffic can start flowing again.
2737 * @pdev: Pointer to PCI device
2738 *
2739 * This callback is called when the error recovery driver tells us that
2740 * its OK to resume normal operation. Implementation resembles the
2741 * second-half of the atl1c_resume routine.
2742 */
2743 static void atl1c_io_resume(struct pci_dev *pdev)
2744 {
2745 struct net_device *netdev = pci_get_drvdata(pdev);
2746 struct atl1c_adapter *adapter = netdev_priv(netdev);
2747
2748 if (netif_running(netdev)) {
2749 if (atl1c_up(adapter)) {
2750 if (netif_msg_hw(adapter))
2751 dev_err(&pdev->dev,
2752 "Cannot bring device back up after reset\n");
2753 return;
2754 }
2755 }
2756
2757 netif_device_attach(netdev);
2758 }
2759
2760 static struct pci_error_handlers atl1c_err_handler = {
2761 .error_detected = atl1c_io_error_detected,
2762 .slot_reset = atl1c_io_slot_reset,
2763 .resume = atl1c_io_resume,
2764 };
2765
2766 static struct pci_driver atl1c_driver = {
2767 .name = atl1c_driver_name,
2768 .id_table = atl1c_pci_tbl,
2769 .probe = atl1c_probe,
2770 .remove = __devexit_p(atl1c_remove),
2771 /* Power Managment Hooks */
2772 .suspend = atl1c_suspend,
2773 .resume = atl1c_resume,
2774 .shutdown = atl1c_shutdown,
2775 .err_handler = &atl1c_err_handler
2776 };
2777
2778 /*
2779 * atl1c_init_module - Driver Registration Routine
2780 *
2781 * atl1c_init_module is the first routine called when the driver is
2782 * loaded. All it does is register with the PCI subsystem.
2783 */
2784 static int __init atl1c_init_module(void)
2785 {
2786 return pci_register_driver(&atl1c_driver);
2787 }
2788
2789 /*
2790 * atl1c_exit_module - Driver Exit Cleanup Routine
2791 *
2792 * atl1c_exit_module is called just before the driver is removed
2793 * from memory.
2794 */
2795 static void __exit atl1c_exit_module(void)
2796 {
2797 pci_unregister_driver(&atl1c_driver);
2798 }
2799
2800 module_init(atl1c_init_module);
2801 module_exit(atl1c_exit_module);
Peter's tree of IPFire 2.x