src/hwinfo/src/int10/pci.h

   1 /*
   2  * Copyright 1999 Egbert Eich
   3  *
   4  * Permission to use, copy, modify, distribute, and sell this software and its
   5  * documentation for any purpose is hereby granted without fee, provided that
   6  * the above copyright notice appear in all copies and that both that
   7  * copyright notice and this permission notice appear in supporting
   8  * documentation, and that the name of the authors not be used in
   9  * advertising or publicity pertaining to distribution of the software without
  10  * specific, written prior permission.  The authors makes no representations
  11  * about the suitability of this software for any purpose.  It is provided
  12  * "as is" without express or implied warranty.
  13  *
  14  * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
  15  * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
  16  * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
  17  * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
  18  * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  19  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  20  * PERFORMANCE OF THIS SOFTWARE.
  21  */
  22 #include "v86bios.h"
  23
  24 #ifndef V86_PCI_H
  25 #define V86_PCI_H
  26
  27 typedef union {
  28         struct {
  29                 unsigned int    zero:2;
  30                 unsigned int    reg:6;
  31                 unsigned int    func:3;
  32                 unsigned int    dev:5;
  33                 unsigned int    bus:8;
  34                 unsigned int    reserved:7;
  35                 unsigned int    enable:1;
  36         } pci;
  37         CARD32 l;
  38 } PciSlot;
  39
  40 typedef struct pciBusRec {
  41         CARD8 primary;
  42         CARD8 secondary;
  43         CARD32 bctl;
  44         PciSlot Slot;
  45         struct pciBusRec *next;
  46         struct pciBusRec *pBus;
  47 } PciBusRec, *PciBusPtr;
  48
  49 typedef struct pciStructRec {
  50         CARD16 VendorID;
  51         CARD16 DeviceID;
  52         CARD8 Interface;
  53         CARD8 BaseClass;
  54         CARD8 SubClass;
  55         CARD32 RomBase;
  56         CARD32 bus;
  57         CARD8 dev;
  58         CARD8 func;
  59         CARD32 cmd_st;
  60         int active;
  61         PciSlot Slot;
  62         struct pciStructRec *next;
  63         PciBusPtr pBus;
  64 } PciStructRec , *PciStructPtr;
  65
  66
  67 extern PciStructPtr CurrentPci;
  68 extern PciStructPtr PciList;
  69 extern PciStructPtr BootBios;
  70 extern int pciMaxBus;
  71
  72 extern CARD32 findPci(CARD16 slotBX);
  73 extern CARD16 pciSlotBX(PciStructPtr);
  74 PciStructPtr findPciDevice(CARD16 vendorID, CARD16 deviceID, char n);
  75 PciStructPtr findPciClass(CARD8 intf, CARD8 subClass, CARD16 class, char n);
  76
  77 extern CARD8 PciRead8(int offset, CARD32 slot);
  78 extern CARD16 PciRead16(int offset, CARD32 slot);
  79 extern CARD32 PciRead32(int offset, CARD32 slot);
  80
  81 extern void PciWrite8(int offset,CARD8 byte, CARD32 slot);
  82 extern void PciWrite16(int offset,CARD16 word, CARD32 slot);
  83 extern void PciWrite32(int offset,CARD32 lg, CARD32 slot);
  84
  85 extern void scan_pci(int);
  86 extern void pciVideoDisable(void);
  87 extern void pciVideoRestore(void);
  88 extern void EnableCurrent(void);
  89 extern int mapPciRom(PciStructPtr pciP);
  90 extern int cfg1out(CARD16 addr, CARD32 val);
  91 extern int cfg1in(CARD16 addr, CARD32 *val);
  92 extern void list_pci(void);
  93 extern PciStructPtr findPciByIDs(int bus, int dev, int func);
  94
  95 #define PCI_MODE2_ENABLE_REG  0xCF8
  96 #define PCI_MODE2_FORWARD_REG  0xCFA
  97 #define PCI_MODE1_ADDRESS_REG  0xCF8
  98 #define PCI_MODE1_DATA_REG  0xCFC
  99 #if defined(__alpha__) || defined(__sparc__)
 100 #define PCI_EN 0x00000000
 101 #else
 102 #define PCI_EN 0x80000000
 103 #endif
 104 #define MAX_DEV_PER_VENDOR_CFG1  32
 105 #define BRIDGE_CLASS(x) (x == 0x06)
 106 #define BRIDGE_PCI_CLASS(x) (x == 0x04)
 107 #define BRIDGE_HOST_CLASS(x) (x == 0x00)
 108 #define PCI_CLASS_PREHISTORIC 0x00
 109 #define PCI_SUBCLASS_PREHISTORIC_VGA 0x01
 110 #define PCI_CLASS_DISPLAY 0x03
 111 #define PCI_SUBCLASS_DISPLAY_VGA 0x00
 112 #define PCI_SUBCLASS_DISPLAY_XGA 0x01
 113 #define PCI_SUBCLASS_DISPLAY_MISC 0x80
 114 #define VIDEO_CLASS(b,s) \
 115         (((b) == PCI_CLASS_PREHISTORIC && (s) == PCI_SUBCLASS_PREHISTORIC_VGA) || \
 116          ((b) == PCI_CLASS_DISPLAY && (s) == PCI_SUBCLASS_DISPLAY_VGA) ||\
 117          ((b) == PCI_CLASS_DISPLAY && (s) == PCI_SUBCLASS_DISPLAY_XGA) ||\
 118          ((b) == PCI_CLASS_DISPLAY && (s) == PCI_SUBCLASS_DISPLAY_MISC))
 119 #define PCI_MULTIFUNC_DEV  0x80
 120 #define MAX_PCI_DEVICES   64
 121 #define PCI_MAXBUS 16
 122 #define PCI_IS_MEM 0x00000001
 123 #define MAX_PCI_ROM_SIZE (1024 * 1024 * 16)
 124
 125 #define IS_MEM32(x) ((x & 0x7) == 0 && x != 0)
 126 #define IS_MEM64(x) ((x & 0x7) == 0x4)
 127 #endif