src/patches/qemu-0.9.1-gcc4-hacks.patch

   1 2008-01-12  Mike Kronenberg  <mike.kronenberg@kronenberg.org>
   2
   3         * softmmu_header.h: Fix for QEMU 0.9.1.
   4
   5 2005-10-28  Gwenole Beauchesne  <gbeauchesne@mandriva.com>
   6
   7         * Various additional hacks for GCC4.
   8
   9 --- qemu-0.7.2/target-i386/ops_sse.h.gcc4-hacks 2005-09-04 19:11:31.000000000 +0200
  10 +++ qemu-0.7.2/target-i386/ops_sse.h    2005-10-28 10:09:21.000000000 +0200
  11 @@ -34,6 +34,12 @@
  12  #define Q(n) XMM_Q(n)
  13  #define SUFFIX _xmm
  14  #endif
  15 +#if defined(__i386__) && __GNUC__ >= 4
  16 +#define RegCopy(d, s) __builtin_memcpy(&(d), &(s), sizeof(d))
  17 +#endif
  18 +#ifndef RegCopy
  19 +#define RegCopy(d, s) d = s
  20 +#endif
  21
  22  void OPPROTO glue(op_psrlw, SUFFIX)(void)
  23  {
  24 @@ -570,7 +576,7 @@ void OPPROTO glue(op_pshufw, SUFFIX) (vo
  25      r.W(1) = s->W((order >> 2) & 3);
  26      r.W(2) = s->W((order >> 4) & 3);
  27      r.W(3) = s->W((order >> 6) & 3);
  28 -    *d = r;
  29 +    RegCopy(*d, r);
  30  }
  31  #else
  32  void OPPROTO op_shufps(void)
  33 --- qemu-0.7.2/target-i386/helper.c.gcc4-hacks  2005-09-04 19:11:31.000000000 +0200
  34 +++ qemu-0.7.2/target-i386/helper.c     2005-10-28 10:09:21.000000000 +0200
  35 @@ -3130,8 +3130,15 @@ void helper_fxrstor(target_ulong ptr, in
  36          nb_xmm_regs = 8 << data64;
  37          addr = ptr + 0xa0;
  38          for(i = 0; i < nb_xmm_regs; i++) {
  39 +#if defined(__i386__) && __GNUC__ >= 4
  40 +            env->xmm_regs[i].XMM_L(0) = ldl(addr);
  41 +            env->xmm_regs[i].XMM_L(1) = ldl(addr + 4);
  42 +            env->xmm_regs[i].XMM_L(2) = ldl(addr + 8);
  43 +            env->xmm_regs[i].XMM_L(3) = ldl(addr + 12);
  44 +#else
  45              env->xmm_regs[i].XMM_Q(0) = ldq(addr);
  46              env->xmm_regs[i].XMM_Q(1) = ldq(addr + 8);
  47 +#endif
  48              addr += 16;
  49          }
  50      }
  51 --- qemu-0.7.2/cpu-all.h.gcc4-hacks     2005-09-04 19:11:31.000000000 +0200
  52 +++ qemu-0.7.2/cpu-all.h        2005-10-28 10:09:21.000000000 +0200
  53 @@ -339,7 +339,13 @@
  54
  55  static inline void stq_le_p(void *ptr, uint64_t v)
  56  {
  57 +#if defined(__i386__) && __GNUC__ >= 4
  58 +    const union { uint64_t v; uint32_t p[2]; } x = { .v = v };
  59 +    ((uint32_t *)ptr)[0] = x.p[0];
  60 +    ((uint32_t *)ptr)[1] = x.p[1];
  61 +#else
  62      *(uint64_t *)ptr = v;
  63 +#endif
  64  }
  65
  66  /* float access */
  67 --- qemu-0.7.2/softmmu_header.h.gcc4-hacks      2005-10-28 10:08:08.000000000 +0200
  68 +++ qemu-0.7.2/softmmu_header.h 2005-10-28 10:09:21.000000000 +0200
  69 @@ -104,7 +104,7 @@
  70  void REGPARM(2) glue(glue(__st, SUFFIX), MMUSUFFIX)(target_ulong addr, DATA_TYPE v, int mmu_idx);
  71
  72  #if (DATA_SIZE <= 4) && (TARGET_LONG_BITS == 32) && defined(__i386__) && \
  73 -    (ACCESS_TYPE < NB_MMU_MODES) && defined(ASM_SOFTMMU)
  74 +    (ACCESS_TYPE < NB_MMU_MODES) && defined(ASM_SOFTMMU) && (__GNUC__ < 4)
  75
  76  #define CPU_TLB_ENTRY_BITS 4
  77
  78 @@ -131,7 +131,7 @@ static inline RES_TYPE glue(glue(ld, USU
  79                    "m" (*(uint32_t *)offsetof(CPUState, tlb_read[CPU_MEM_INDEX][0].address)),
  80                    "i" (CPU_MEM_INDEX),
  81                    "m" (*(uint8_t *)&glue(glue(__ld, SUFFIX), MMUSUFFIX))
  82 -                  : "%eax", "%ecx", "%edx", "memory", "cc");
  83 +                  : "%eax", "%edx", "memory", "cc");
  84      return res;
  85  }
  86
  87 @@ -178,13 +178,14 @@ static inline int glue(glue(lds, SUFFIX)
  88                    "m" (*(uint32_t *)offsetof(CPUState, tlb_read[CPU_MEM_INDEX][0].address)),
  89                    "i" (CPU_MEM_INDEX),
  90                    "m" (*(uint8_t *)&glue(glue(__ld, SUFFIX), MMUSUFFIX))
  91 -                  : "%eax", "%ecx", "%edx", "memory", "cc");
  92 +                  : "%eax", "%edx", "memory", "cc");
  93      return res;
  94  }
  95  #endif
  96
  97 -static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v)
  98 +static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE val)
  99  {
 100 +    RES_TYPE v = val;
 101      asm volatile ("movl %0, %%edx\n"
 102                    "movl %0, %%eax\n"
 103                    "shrl %3, %%edx\n"
 104 @@ -236,16 +237,14 @@
 105                    "2:\n"
 106                    :
 107                    : "r" (ptr),
 108 -/* NOTE: 'q' would be needed as constraint, but we could not use it
 109 -   with T1 ! */
 110 -                  "r" (v),
 111 +                  "q" (v),
 112                    "i" ((CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS),
 113                    "i" (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS),
 114                    "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)),
 115                    "m" (*(uint32_t *)offsetof(CPUState, tlb_table[CPU_MMU_INDEX][0].addr_write)),
 116                    "i" (CPU_MMU_INDEX),
 117                    "m" (*(uint8_t *)&glue(glue(__st, SUFFIX), MMUSUFFIX))
 118 -                  : "%eax", "%ecx", "%edx", "memory", "cc");
 119 +                  : "%eax", "%edx", "memory", "cc");
 120  }
 121
 122  #else