]> git.ipfire.org Git - people/pmueller/ipfire-2.x.git/blob - src/patches/suse-2.6.27.25/patches.drivers/bnx2x-Reset-HW-before-use.patch
Updated xen patches taken from suse.
[people/pmueller/ipfire-2.x.git] / src / patches / suse-2.6.27.25 / patches.drivers / bnx2x-Reset-HW-before-use.patch
1 From 81f75bbf67c7a26ea1266ac93b9319bb985d588d Mon Sep 17 00:00:00 2001
2 From: Eilon Greenstein <eilong@broadcom.com>
3 Date: Thu, 22 Jan 2009 03:37:31 +0000
4 Subject: bnx2x: Reset HW before use
5 Acked-by: Karsten Keil <kkeil@novell.com>
6 Reference: bnc#472500
7
8 To avoid complications, make sure that the HW is in reset (as it should be)
9 before trying to take it out of reset. In normal flows, the HW is indeed in rest
10 so this should have no effect
11
12 Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
13 Signed-off-by: David S. Miller <davem@davemloft.net>
14 ---
15 drivers/net/bnx2x_main.c | 17 +++++++++--------
16 1 files changed, 9 insertions(+), 8 deletions(-)
17
18 Index: linux-2.6.27-bnx2x_2/drivers/net/bnx2x_main.c
19 ===================================================================
20 --- linux-2.6.27-bnx2x_2.orig/drivers/net/bnx2x_main.c
21 +++ linux-2.6.27-bnx2x_2/drivers/net/bnx2x_main.c
22 @@ -5151,12 +5151,21 @@ static void enable_blocks_attention(stru
23 }
24
25
26 +static void bnx2x_reset_common(struct bnx2x *bp)
27 +{
28 + /* reset_common */
29 + REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_CLEAR,
30 + 0xd3ffff7f);
31 + REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_CLEAR, 0x1403);
32 +}
33 +
34 static int bnx2x_init_common(struct bnx2x *bp)
35 {
36 u32 val, i;
37
38 DP(BNX2X_MSG_MCP, "starting common init func %d\n", BP_FUNC(bp));
39
40 + bnx2x_reset_common(bp);
41 REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_SET, 0xffffffff);
42 REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_SET, 0xfffc);
43
44 @@ -6643,14 +6652,6 @@ static void bnx2x_reset_port(struct bnx2
45 /* TODO: Close Doorbell port? */
46 }
47
48 -static void bnx2x_reset_common(struct bnx2x *bp)
49 -{
50 - /* reset_common */
51 - REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_CLEAR,
52 - 0xd3ffff7f);
53 - REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_CLEAR, 0x1403);
54 -}
55 -
56 static void bnx2x_reset_chip(struct bnx2x *bp, u32 reset_code)
57 {
58 DP(BNX2X_MSG_MCP, "function %d reset_code %x\n",