]> git.ipfire.org Git - people/pmueller/ipfire-2.x.git/blob - src/patches/suse-2.6.27.25/patches.drivers/r8169-use-pci_find_capability-for-the-PCI-E-features
Reenabled linux-xen and xen-image build
[people/pmueller/ipfire-2.x.git] / src / patches / suse-2.6.27.25 / patches.drivers / r8169-use-pci_find_capability-for-the-PCI-E-features
1 Commit-Id: 9c14ceafa5ca7f57225a43fb0785c56ddc7f1823
2 From: Francois Romieu <romieu@fr.zoreil.com>
3 Date: Sat, 5 Jul 2008 00:21:15 +0200
4 Acked-by: Karsten Keil <kkeil@novell.com>
5 Reference: bnc#448168
6 Subject: [PATCH] r8169: use pci_find_capability for the PCI-E features
7
8 Signed-off-by: Francois Romieu <romieu@fr.zoreil.com>
9 Cc: Edward Hsu <edward_hsu@realtek.com.tw>
10
11 ---
12 drivers/net/r8169.c | 32 ++++++++++++++++++++++++--------
13 1 file changed, 24 insertions(+), 8 deletions(-)
14
15 --- a/drivers/net/r8169.c
16 +++ b/drivers/net/r8169.c
17 @@ -61,6 +61,7 @@ static const int multicast_filter_limit
18 /* MAC address length */
19 #define MAC_ADDR_LEN 6
20
21 +#define MAX_READ_REQUEST_SHIFT 12
22 #define RX_FIFO_THRESH 7 /* 7 means NO threshold, Rx buffer level before first PCI xfer. */
23 #define RX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */
24 #define TX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */
25 @@ -428,6 +429,7 @@ struct rtl8169_private {
26 void (*hw_start)(struct net_device *);
27 unsigned int (*phy_reset_pending)(void __iomem *);
28 unsigned int (*link_ok)(void __iomem *);
29 + int pcie_cap;
30 struct delayed_work task;
31 unsigned features;
32
33 @@ -1687,6 +1689,10 @@ rtl8169_init_one(struct pci_dev *pdev, c
34 goto err_out_free_res_4;
35 }
36
37 + tp->pcie_cap = pci_find_capability(pdev, PCI_CAP_ID_EXP);
38 + if (!tp->pcie_cap && netif_msg_probe(tp))
39 + dev_info(&pdev->dev, "no PCI Express capability\n");
40 +
41 RTL_W16(IntrMask, 0x0000);
42
43 /* Soft reset the chip. */
44 @@ -2079,13 +2085,19 @@ static void rtl_hw_start_8169(struct net
45 RTL_W16(IntrMask, tp->intr_event);
46 }
47
48 -static void rtl_tx_performance_tweak(struct pci_dev *pdev, u8 force)
49 +static void rtl_tx_performance_tweak(struct pci_dev *pdev, u16 force)
50 {
51 - u8 ctl;
52 + struct net_device *dev = pci_get_drvdata(pdev);
53 + struct rtl8169_private *tp = netdev_priv(dev);
54 + int cap = tp->pcie_cap;
55 +
56 + if (cap) {
57 + u16 ctl;
58
59 - pci_read_config_byte(pdev, 0x69, &ctl);
60 - ctl = (ctl & ~0x70) | force;
61 - pci_write_config_byte(pdev, 0x69, ctl);
62 + pci_read_config_word(pdev, cap + PCI_EXP_DEVCTL, &ctl);
63 + ctl = (ctl & ~PCI_EXP_DEVCTL_READRQ) | force;
64 + pci_write_config_word(pdev, cap + PCI_EXP_DEVCTL, ctl);
65 + }
66 }
67
68 static void rtl_hw_start_8168(struct net_device *dev)
69 @@ -2106,7 +2118,7 @@ static void rtl_hw_start_8168(struct net
70
71 RTL_W16(CPlusCmd, tp->cp_cmd);
72
73 - rtl_tx_performance_tweak(pdev, 0x50);
74 + rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
75
76 RTL_W16(IntrMitigate, 0x5151);
77
78 @@ -2139,8 +2151,12 @@ static void rtl_hw_start_8101(struct net
79
80 if ((tp->mac_version == RTL_GIGA_MAC_VER_13) ||
81 (tp->mac_version == RTL_GIGA_MAC_VER_16)) {
82 - pci_write_config_word(pdev, 0x68, 0x00);
83 - pci_write_config_word(pdev, 0x69, 0x08);
84 + int cap = tp->pcie_cap;
85 +
86 + if (cap) {
87 + pci_write_config_word(pdev, cap + PCI_EXP_DEVCTL,
88 + PCI_EXP_DEVCTL_NOSNOOP_EN);
89 + }
90 }
91
92 RTL_W8(Cfg9346, Cfg9346_Unlock);