src/patches/suse-2.6.27.39/patches.drivers/r8169-additional-8101-and-8102-support

   1 Commit-Id: 2857ffb7b8913ef713533ac5783abd70a20529e4
   2 From: Francois Romieu <romieu@fr.zoreil.com>
   3 Date: Sat, 2 Aug 2008 21:08:49 +0200
   4 Acked-by: Karsten Keil <kkeil@novell.com>
   5 Reference: bnc#448168
   6 Subject: [PATCH] r8169: additional 8101 and 8102 support
   7
   8 Signed-off-by: Ivan Vecera <ivecera@redhat.com>
   9 Signed-off-by: Francois Romieu <romieu@fr.zoreil.com>
  10 Cc: Edward Hsu <edward_hsu@realtek.com.tw>
  11
  12 ---
  13  drivers/net/r8169.c |  124 +++++++++++++++++++++++++++++++++++++++++++++++++++-
  14  1 file changed, 122 insertions(+), 2 deletions(-)
  15
  16 --- a/drivers/net/r8169.c
  17 +++ b/drivers/net/r8169.c
  18 @@ -95,6 +95,10 @@ enum mac_version {
  19         RTL_GIGA_MAC_VER_04 = 0x04, // 8169SB
  20         RTL_GIGA_MAC_VER_05 = 0x05, // 8110SCd
  21         RTL_GIGA_MAC_VER_06 = 0x06, // 8110SCe
  22 +       RTL_GIGA_MAC_VER_07 = 0x07, // 8102e
  23 +       RTL_GIGA_MAC_VER_08 = 0x08, // 8102e
  24 +       RTL_GIGA_MAC_VER_09 = 0x09, // 8102e
  25 +       RTL_GIGA_MAC_VER_10 = 0x0a, // 8101e
  26         RTL_GIGA_MAC_VER_11 = 0x0b, // 8168Bb
  27         RTL_GIGA_MAC_VER_12 = 0x0c, // 8168Be
  28         RTL_GIGA_MAC_VER_13 = 0x0d, // 8101Eb
  29 @@ -121,6 +125,10 @@ static const struct {
  30         _R("RTL8169sb/8110sb",  RTL_GIGA_MAC_VER_04, 0xff7e1880), // 8169SB
  31         _R("RTL8169sc/8110sc",  RTL_GIGA_MAC_VER_05, 0xff7e1880), // 8110SCd
  32         _R("RTL8169sc/8110sc",  RTL_GIGA_MAC_VER_06, 0xff7e1880), // 8110SCe
  33 +       _R("RTL8102e",          RTL_GIGA_MAC_VER_07, 0xff7e1880), // PCI-E
  34 +       _R("RTL8102e",          RTL_GIGA_MAC_VER_08, 0xff7e1880), // PCI-E
  35 +       _R("RTL8102e",          RTL_GIGA_MAC_VER_09, 0xff7e1880), // PCI-E
  36 +       _R("RTL8101e",          RTL_GIGA_MAC_VER_10, 0xff7e1880), // PCI-E
  37         _R("RTL8168b/8111b",    RTL_GIGA_MAC_VER_11, 0xff7e1880), // PCI-E
  38         _R("RTL8168b/8111b",    RTL_GIGA_MAC_VER_12, 0xff7e1880), // PCI-E
  39         _R("RTL8101e",          RTL_GIGA_MAC_VER_13, 0xff7e1880), // PCI-E 8139
  40 @@ -853,8 +861,12 @@ static int rtl8169_set_speed_xmii(struct
  41                 }
  42         }
  43
  44 -       /* The 8100e/8101e do Fast Ethernet only. */
  45 -       if ((tp->mac_version == RTL_GIGA_MAC_VER_13) ||
  46 +       /* The 8100e/8101e/8102e do Fast Ethernet only. */
  47 +       if ((tp->mac_version == RTL_GIGA_MAC_VER_07) ||
  48 +           (tp->mac_version == RTL_GIGA_MAC_VER_08) ||
  49 +           (tp->mac_version == RTL_GIGA_MAC_VER_09) ||
  50 +           (tp->mac_version == RTL_GIGA_MAC_VER_10) ||
  51 +           (tp->mac_version == RTL_GIGA_MAC_VER_13) ||
  52             (tp->mac_version == RTL_GIGA_MAC_VER_14) ||
  53             (tp->mac_version == RTL_GIGA_MAC_VER_15) ||
  54             (tp->mac_version == RTL_GIGA_MAC_VER_16)) {
  55 @@ -1235,8 +1247,17 @@ static void rtl8169_get_mac_version(stru
  56                 { 0x7c800000, 0x30000000,       RTL_GIGA_MAC_VER_11 },
  57
  58                 /* 8101 family. */
  59 +               { 0x7cf00000, 0x34a00000,       RTL_GIGA_MAC_VER_09 },
  60 +               { 0x7cf00000, 0x24a00000,       RTL_GIGA_MAC_VER_09 },
  61 +               { 0x7cf00000, 0x34900000,       RTL_GIGA_MAC_VER_08 },
  62 +               { 0x7cf00000, 0x24900000,       RTL_GIGA_MAC_VER_08 },
  63 +               { 0x7cf00000, 0x34800000,       RTL_GIGA_MAC_VER_07 },
  64 +               { 0x7cf00000, 0x24800000,       RTL_GIGA_MAC_VER_07 },
  65                 { 0x7cf00000, 0x34000000,       RTL_GIGA_MAC_VER_13 },
  66 +               { 0x7cf00000, 0x34300000,       RTL_GIGA_MAC_VER_10 },
  67                 { 0x7cf00000, 0x34200000,       RTL_GIGA_MAC_VER_16 },
  68 +               { 0x7c800000, 0x34800000,       RTL_GIGA_MAC_VER_09 },
  69 +               { 0x7c800000, 0x24800000,       RTL_GIGA_MAC_VER_09 },
  70                 { 0x7c800000, 0x34000000,       RTL_GIGA_MAC_VER_16 },
  71                 /* FIXME: where did these entries come from ? -- FR */
  72                 { 0xfc800000, 0x38800000,       RTL_GIGA_MAC_VER_15 },
  73 @@ -1398,6 +1419,22 @@ static void rtl8168cx_hw_phy_config(void
  74         rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init));
  75  }
  76
  77 +static void rtl8102e_hw_phy_config(void __iomem *ioaddr)
  78 +{
  79 +       struct phy_reg phy_reg_init[] = {
  80 +               { 0x1f, 0x0003 },
  81 +               { 0x08, 0x441d },
  82 +               { 0x01, 0x9100 },
  83 +               { 0x1f, 0x0000 }
  84 +       };
  85 +
  86 +       mdio_write(ioaddr, 0x1f, 0x0000);
  87 +       mdio_patch(ioaddr, 0x11, 1 << 12);
  88 +       mdio_patch(ioaddr, 0x19, 1 << 13);
  89 +
  90 +       rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init));
  91 +}
  92 +
  93  static void rtl_hw_phy_config(struct net_device *dev)
  94  {
  95         struct rtl8169_private *tp = netdev_priv(dev);
  96 @@ -1415,6 +1452,11 @@ static void rtl_hw_phy_config(struct net
  97         case RTL_GIGA_MAC_VER_04:
  98                 rtl8169sb_hw_phy_config(ioaddr);
  99                 break;
 100 +       case RTL_GIGA_MAC_VER_07:
 101 +       case RTL_GIGA_MAC_VER_08:
 102 +       case RTL_GIGA_MAC_VER_09:
 103 +               rtl8102e_hw_phy_config(ioaddr);
 104 +               break;
 105         case RTL_GIGA_MAC_VER_18:
 106                 rtl8168cp_hw_phy_config(ioaddr);
 107                 break;
 108 @@ -2277,6 +2319,70 @@ static void rtl_hw_start_8168(struct net
 109         RTL_W16(IntrMask, tp->intr_event);
 110  }
 111
 112 +#define R810X_CPCMD_QUIRK_MASK (\
 113 +       EnableBist | \
 114 +       Mac_dbgo_oe | \
 115 +       Force_half_dup | \
 116 +       Force_half_dup | \
 117 +       Force_txflow_en | \
 118 +       Cxpl_dbg_sel | \
 119 +       ASF | \
 120 +       PktCntrDisable | \
 121 +       PCIDAC | \
 122 +       PCIMulRW)
 123 +
 124 +static void rtl_hw_start_8102e_1(void __iomem *ioaddr, struct pci_dev *pdev)
 125 +{
 126 +       static struct ephy_info e_info_8102e_1[] = {
 127 +               { 0x01, 0, 0x6e65 },
 128 +               { 0x02, 0, 0x091f },
 129 +               { 0x03, 0, 0xc2f9 },
 130 +               { 0x06, 0, 0xafb5 },
 131 +               { 0x07, 0, 0x0e00 },
 132 +               { 0x19, 0, 0xec80 },
 133 +               { 0x01, 0, 0x2e65 },
 134 +               { 0x01, 0, 0x6e65 }
 135 +       };
 136 +       u8 cfg1;
 137 +
 138 +       rtl_csi_access_enable(ioaddr);
 139 +
 140 +       RTL_W8(DBG_REG, FIX_NAK_1);
 141 +
 142 +       rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
 143 +
 144 +       RTL_W8(Config1,
 145 +              LEDS1 | LEDS0 | Speed_down | MEMMAP | IOMAP | VPD | PMEnable);
 146 +       RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);
 147 +
 148 +       cfg1 = RTL_R8(Config1);
 149 +       if ((cfg1 & LEDS0) && (cfg1 & LEDS1))
 150 +               RTL_W8(Config1, cfg1 & ~LEDS0);
 151 +
 152 +       RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R810X_CPCMD_QUIRK_MASK);
 153 +
 154 +       rtl_ephy_init(ioaddr, e_info_8102e_1, ARRAY_SIZE(e_info_8102e_1));
 155 +}
 156 +
 157 +static void rtl_hw_start_8102e_2(void __iomem *ioaddr, struct pci_dev *pdev)
 158 +{
 159 +       rtl_csi_access_enable(ioaddr);
 160 +
 161 +       rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
 162 +
 163 +       RTL_W8(Config1, MEMMAP | IOMAP | VPD | PMEnable);
 164 +       RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);
 165 +
 166 +       RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R810X_CPCMD_QUIRK_MASK);
 167 +}
 168 +
 169 +static void rtl_hw_start_8102e_3(void __iomem *ioaddr, struct pci_dev *pdev)
 170 +{
 171 +       rtl_hw_start_8102e_2(ioaddr, pdev);
 172 +
 173 +       rtl_ephy_write(ioaddr, 0x03, 0xc2f9);
 174 +}
 175 +
 176  static void rtl_hw_start_8101(struct net_device *dev)
 177  {
 178         struct rtl8169_private *tp = netdev_priv(dev);
 179 @@ -2293,6 +2399,20 @@ static void rtl_hw_start_8101(struct net
 180                 }
 181         }
 182
 183 +       switch (tp->mac_version) {
 184 +       case RTL_GIGA_MAC_VER_07:
 185 +               rtl_hw_start_8102e_1(ioaddr, pdev);
 186 +               break;
 187 +
 188 +       case RTL_GIGA_MAC_VER_08:
 189 +               rtl_hw_start_8102e_3(ioaddr, pdev);
 190 +               break;
 191 +
 192 +       case RTL_GIGA_MAC_VER_09:
 193 +               rtl_hw_start_8102e_2(ioaddr, pdev);
 194 +               break;
 195 +       }
 196 +
 197         RTL_W8(Cfg9346, Cfg9346_Unlock);
 198
 199         RTL_W8(EarlyTxThres, EarlyTxThld);