]> git.ipfire.org Git - people/pmueller/ipfire-2.x.git/blob - src/patches/suse-2.6.27.39/patches.drivers/staging-add-realtek-8192-pci-wireless-driver.patch
projects / people / pmueller / ipfire-2.x.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
Fix oinkmaster patch.
[people/pmueller/ipfire-2.x.git] / src / patches / suse-2.6.27.39 / patches.drivers / staging-add-realtek-8192-pci-wireless-driver.patch
1 From 182d8c60e20c48eadc68a1e83432dd0680b9e6cd Mon Sep 17 00:00:00 2001
2 From: Greg Kroah-Hartman <gregkh@suse.de>
3 Date: Tue, 4 Aug 2009 15:57:55 -0700
4 Subject: Staging: add Realtek 8192 PCI wireless driver
5 Patch-mainline: 2.6.32
6 References: bnc#525903
7
8 From: Greg Kroah-Hartman <gregkh@suse.de>
9
10 This wireless driver should work for the Realtek 8192 PCI devices.
11
12 It comes directly from Realtek and has been tested to work on at least
13 one laptop in the wild.
14
15 Cc: Anthony Wong <awong1@novell.com>
16 Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
17
18 ---
19 drivers/staging/Kconfig | 2
20 drivers/staging/Makefile | 1
21 drivers/staging/rtl8192e/Kconfig | 6
22 drivers/staging/rtl8192e/Makefile | 34
23 drivers/staging/rtl8192e/dot11d.h | 102
24 drivers/staging/rtl8192e/ieee80211.h | 2802 +++++
25 drivers/staging/rtl8192e/ieee80211/EndianFree.h | 199
26 drivers/staging/rtl8192e/ieee80211/aes.c | 469
27 drivers/staging/rtl8192e/ieee80211/api.c | 246
28 drivers/staging/rtl8192e/ieee80211/arc4.c | 103
29 drivers/staging/rtl8192e/ieee80211/autoload.c | 40
30 drivers/staging/rtl8192e/ieee80211/cipher.c | 299
31 drivers/staging/rtl8192e/ieee80211/compress.c | 64
32 drivers/staging/rtl8192e/ieee80211/crypto_compat.h | 90
33 drivers/staging/rtl8192e/ieee80211/digest.c | 108
34 drivers/staging/rtl8192e/ieee80211/dot11d.c | 239
35 drivers/staging/rtl8192e/ieee80211/dot11d.h | 102
36 drivers/staging/rtl8192e/ieee80211/ieee80211.h | 2802 +++++
37 drivers/staging/rtl8192e/ieee80211/ieee80211_crypt.c | 273
38 drivers/staging/rtl8192e/ieee80211/ieee80211_crypt.h | 93
39 drivers/staging/rtl8192e/ieee80211/ieee80211_crypt_ccmp.c | 534 +
40 drivers/staging/rtl8192e/ieee80211/ieee80211_crypt_tkip.c | 1034 ++
41 drivers/staging/rtl8192e/ieee80211/ieee80211_crypt_wep.c | 397
42 drivers/staging/rtl8192e/ieee80211/ieee80211_module.c | 432
43 drivers/staging/rtl8192e/ieee80211/ieee80211_rx.c | 2802 +++++
44 drivers/staging/rtl8192e/ieee80211/ieee80211_softmac.c | 3548 +++++++
45 drivers/staging/rtl8192e/ieee80211/ieee80211_softmac_wx.c | 692 +
46 drivers/staging/rtl8192e/ieee80211/ieee80211_tx.c | 933 +
47 drivers/staging/rtl8192e/ieee80211/ieee80211_wx.c | 1032 ++
48 drivers/staging/rtl8192e/ieee80211/internal.h | 115
49 drivers/staging/rtl8192e/ieee80211/kmap_types.h | 20
50 drivers/staging/rtl8192e/ieee80211/michael_mic.c | 194
51 drivers/staging/rtl8192e/ieee80211/proc.c | 116
52 drivers/staging/rtl8192e/ieee80211/rtl819x_BA.h | 69
53 drivers/staging/rtl8192e/ieee80211/rtl819x_BAProc.c | 779 +
54 drivers/staging/rtl8192e/ieee80211/rtl819x_HT.h | 481
55 drivers/staging/rtl8192e/ieee80211/rtl819x_HTProc.c | 1719 +++
56 drivers/staging/rtl8192e/ieee80211/rtl819x_Qos.h | 749 +
57 drivers/staging/rtl8192e/ieee80211/rtl819x_TS.h | 56
58 drivers/staging/rtl8192e/ieee80211/rtl819x_TSProc.c | 659 +
59 drivers/staging/rtl8192e/ieee80211/rtl_crypto.h | 399
60 drivers/staging/rtl8192e/ieee80211/scatterwalk.c | 126
61 drivers/staging/rtl8192e/ieee80211/scatterwalk.h | 51
62 drivers/staging/rtl8192e/ieee80211_crypt.h | 86
63 drivers/staging/rtl8192e/r8180_93cx6.c | 146
64 drivers/staging/rtl8192e/r8180_93cx6.h | 40
65 drivers/staging/rtl8192e/r8190_rtl8256.c | 1161 ++
66 drivers/staging/rtl8192e/r8190_rtl8256.h | 28
67 drivers/staging/rtl8192e/r8192E.h | 1554 +++
68 drivers/staging/rtl8192e/r8192E_core.c | 6928 ++++++++++++++
69 drivers/staging/rtl8192e/r8192E_dm.c | 4115 ++++++++
70 drivers/staging/rtl8192e/r8192E_dm.h | 320
71 drivers/staging/rtl8192e/r8192E_hw.h | 811 +
72 drivers/staging/rtl8192e/r8192E_wx.c | 1409 ++
73 drivers/staging/rtl8192e/r8192E_wx.h | 22
74 drivers/staging/rtl8192e/r8192_pm.c | 181
75 drivers/staging/rtl8192e/r8192_pm.h | 28
76 drivers/staging/rtl8192e/r819xE_cmdpkt.c | 820 +
77 drivers/staging/rtl8192e/r819xE_cmdpkt.h | 207
78 drivers/staging/rtl8192e/r819xE_firmware.c | 620 +
79 drivers/staging/rtl8192e/r819xE_firmware.h | 68
80 drivers/staging/rtl8192e/r819xE_firmware_img.h | 2778 +++++
81 drivers/staging/rtl8192e/r819xE_phy.c | 3352 ++++++
82 drivers/staging/rtl8192e/r819xE_phy.h | 125
83 drivers/staging/rtl8192e/r819xE_phyreg.h | 878 +
84 drivers/staging/rtl8192e/r819xP_firmware_img.h | 3637 +++++++
85 66 files changed, 54325 insertions(+)
86
87 --- a/drivers/staging/Kconfig
88 +++ b/drivers/staging/Kconfig
89 @@ -57,6 +57,8 @@ source "drivers/staging/benet/Kconfig"
90
91 source "drivers/staging/rtl8187se/Kconfig"
92
93 +source "drivers/staging/rtl8192e/Kconfig"
94 +
95 source "drivers/staging/hv/Kconfig"
96
97 endif # STAGING
98 --- a/drivers/staging/Makefile
99 +++ b/drivers/staging/Makefile
100 @@ -20,4 +20,5 @@ obj-$(CONFIG_RT2870) += rt2870/
101 obj-$(CONFIG_RT3070) += rt3070/
102 obj-$(CONFIG_BENET) += benet/
103 obj-$(CONFIG_RTL8187SE) += rtl8187se/
104 +obj-$(CONFIG_RTL8192E) += rtl8192e/
105 obj-$(CONFIG_HYPERV) += hv/
106 --- /dev/null
107 +++ b/drivers/staging/rtl8192e/Kconfig
108 @@ -0,0 +1,6 @@
109 +config RTL8192E
110 + tristate "RealTek RTL8192E Wireless LAN NIC driver"
111 + depends on PCI
112 + depends on WIRELESS_EXT
113 + default N
114 + ---help---
115 --- /dev/null
116 +++ b/drivers/staging/rtl8192e/Makefile
117 @@ -0,0 +1,34 @@
118 +NIC_SELECT = RTL8192E
119 +
120 +
121 +EXTRA_CFLAGS += -DRTL8192E
122 +EXTRA_CFLAGS += -std=gnu89
123 +EXTRA_CFLAGS += -O2
124 +EXTRA_CFLAGS += -DTHOMAS_TURBO
125 +EXTRA_CFLAGS += -DENABLE_DOT11D
126 +
127 +r8192_pci-objs := \
128 + r8192E_core.o \
129 + r8180_93cx6.o \
130 + r8192E_wx.o \
131 + r8190_rtl8256.o \
132 + r819xE_phy.o \
133 + r819xE_firmware.o \
134 + r819xE_cmdpkt.o \
135 + r8192E_dm.o \
136 + ieee80211/ieee80211_rx.o \
137 + ieee80211/ieee80211_softmac.o \
138 + ieee80211/ieee80211_tx.o \
139 + ieee80211/ieee80211_wx.o \
140 + ieee80211/ieee80211_module.o \
141 + ieee80211/ieee80211_softmac_wx.o \
142 + ieee80211/rtl819x_HTProc.o \
143 + ieee80211/rtl819x_TSProc.o \
144 + ieee80211/rtl819x_BAProc.o \
145 + ieee80211/dot11d.o \
146 + ieee80211/ieee80211_crypt.o \
147 + ieee80211/ieee80211_crypt_tkip.o \
148 + ieee80211/ieee80211_crypt_ccmp.o \
149 + ieee80211/ieee80211_crypt_wep.o
150 +
151 +obj-$(CONFIG_RTL8192E) += r8192_pci.o
152 --- /dev/null
153 +++ b/drivers/staging/rtl8192e/dot11d.h
154 @@ -0,0 +1,102 @@
155 +#ifndef __INC_DOT11D_H
156 +#define __INC_DOT11D_H
157 +
158 +#ifdef ENABLE_DOT11D
159 +#include "ieee80211.h"
160 +
161 +//#define ENABLE_DOT11D
162 +
163 +//#define DOT11D_MAX_CHNL_NUM 83
164 +
165 +typedef struct _CHNL_TXPOWER_TRIPLE {
166 + u8 FirstChnl;
167 + u8 NumChnls;
168 + u8 MaxTxPowerInDbm;
169 +}CHNL_TXPOWER_TRIPLE, *PCHNL_TXPOWER_TRIPLE;
170 +
171 +typedef enum _DOT11D_STATE {
172 + DOT11D_STATE_NONE = 0,
173 + DOT11D_STATE_LEARNED,
174 + DOT11D_STATE_DONE,
175 +}DOT11D_STATE;
176 +
177 +typedef struct _RT_DOT11D_INFO {
178 + //DECLARE_RT_OBJECT(RT_DOT11D_INFO);
179 +
180 + bool bEnabled; // dot11MultiDomainCapabilityEnabled
181 +
182 + u16 CountryIeLen; // > 0 if CountryIeBuf[] contains valid country information element.
183 + u8 CountryIeBuf[MAX_IE_LEN];
184 + u8 CountryIeSrcAddr[6]; // Source AP of the country IE.
185 + u8 CountryIeWatchdog;
186 +
187 + u8 channel_map[MAX_CHANNEL_NUMBER+1]; //!!!Value 0: Invalid, 1: Valid (active scan), 2: Valid (passive scan)
188 + //u8 ChnlListLen; // #Bytes valid in ChnlList[].
189 + //u8 ChnlList[DOT11D_MAX_CHNL_NUM];
190 + u8 MaxTxPwrDbmList[MAX_CHANNEL_NUMBER+1];
191 +
192 + DOT11D_STATE State;
193 +}RT_DOT11D_INFO, *PRT_DOT11D_INFO;
194 +#define eqMacAddr(a,b) ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 )
195 +#define cpMacAddr(des,src) ((des)[0]=(src)[0],(des)[1]=(src)[1],(des)[2]=(src)[2],(des)[3]=(src)[3],(des)[4]=(src)[4],(des)[5]=(src)[5])
196 +#define GET_DOT11D_INFO(__pIeeeDev) ((PRT_DOT11D_INFO)((__pIeeeDev)->pDot11dInfo))
197 +
198 +#define IS_DOT11D_ENABLE(__pIeeeDev) GET_DOT11D_INFO(__pIeeeDev)->bEnabled
199 +#define IS_COUNTRY_IE_VALID(__pIeeeDev) (GET_DOT11D_INFO(__pIeeeDev)->CountryIeLen > 0)
200 +
201 +#define IS_EQUAL_CIE_SRC(__pIeeeDev, __pTa) eqMacAddr(GET_DOT11D_INFO(__pIeeeDev)->CountryIeSrcAddr, __pTa)
202 +#define UPDATE_CIE_SRC(__pIeeeDev, __pTa) cpMacAddr(GET_DOT11D_INFO(__pIeeeDev)->CountryIeSrcAddr, __pTa)
203 +
204 +#define IS_COUNTRY_IE_CHANGED(__pIeeeDev, __Ie) \
205 + (((__Ie).Length == 0 || (__Ie).Length != GET_DOT11D_INFO(__pIeeeDev)->CountryIeLen) ? \
206 + FALSE : \
207 + (!memcmp(GET_DOT11D_INFO(__pIeeeDev)->CountryIeBuf, (__Ie).Octet, (__Ie).Length)))
208 +
209 +#define CIE_WATCHDOG_TH 1
210 +#define GET_CIE_WATCHDOG(__pIeeeDev) GET_DOT11D_INFO(__pIeeeDev)->CountryIeWatchdog
211 +#define RESET_CIE_WATCHDOG(__pIeeeDev) GET_CIE_WATCHDOG(__pIeeeDev) = 0
212 +#define UPDATE_CIE_WATCHDOG(__pIeeeDev) ++GET_CIE_WATCHDOG(__pIeeeDev)
213 +
214 +#define IS_DOT11D_STATE_DONE(__pIeeeDev) (GET_DOT11D_INFO(__pIeeeDev)->State == DOT11D_STATE_DONE)
215 +
216 +
217 +void
218 +Dot11d_Init(
219 + struct ieee80211_device *dev
220 + );
221 +
222 +void
223 +Dot11d_Reset(
224 + struct ieee80211_device *dev
225 + );
226 +
227 +void
228 +Dot11d_UpdateCountryIe(
229 + struct ieee80211_device *dev,
230 + u8 * pTaddr,
231 + u16 CoutryIeLen,
232 + u8 * pCoutryIe
233 + );
234 +
235 +u8
236 +DOT11D_GetMaxTxPwrInDbm(
237 + struct ieee80211_device *dev,
238 + u8 Channel
239 + );
240 +
241 +void
242 +DOT11D_ScanComplete(
243 + struct ieee80211_device * dev
244 + );
245 +
246 +int IsLegalChannel(
247 + struct ieee80211_device * dev,
248 + u8 channel
249 +);
250 +
251 +int ToLegalChannel(
252 + struct ieee80211_device * dev,
253 + u8 channel
254 +);
255 +#endif //ENABLE_DOT11D
256 +#endif // #ifndef __INC_DOT11D_H
257 --- /dev/null
258 +++ b/drivers/staging/rtl8192e/ieee80211.h
259 @@ -0,0 +1,2802 @@
260 +/*
261 + * Merged with mainline ieee80211.h in Aug 2004. Original ieee802_11
262 + * remains copyright by the original authors
263 + *
264 + * Portions of the merged code are based on Host AP (software wireless
265 + * LAN access point) driver for Intersil Prism2/2.5/3.
266 + *
267 + * Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
268 + * <jkmaline@cc.hut.fi>
269 + * Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
270 + *
271 + * Adaption to a generic IEEE 802.11 stack by James Ketrenos
272 + * <jketreno@linux.intel.com>
273 + * Copyright (c) 2004, Intel Corporation
274 + *
275 + * Modified for Realtek's wi-fi cards by Andrea Merello
276 + * <andreamrl@tiscali.it>
277 + *
278 + * This program is free software; you can redistribute it and/or modify
279 + * it under the terms of the GNU General Public License version 2 as
280 + * published by the Free Software Foundation. See README and COPYING for
281 + * more details.
282 + */
283 +#ifndef IEEE80211_H
284 +#define IEEE80211_H
285 +#include <linux/if_ether.h> /* ETH_ALEN */
286 +#include <linux/kernel.h> /* ARRAY_SIZE */
287 +#include <linux/version.h>
288 +#include <linux/module.h>
289 +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
290 +#include <linux/jiffies.h>
291 +#else
292 +#include <linux/jffs.h>
293 +#include <linux/tqueue.h>
294 +#endif
295 +#include <linux/timer.h>
296 +#include <linux/sched.h>
297 +
298 +#include <linux/delay.h>
299 +#include <linux/wireless.h>
300 +
301 +#include "ieee80211/rtl819x_HT.h"
302 +#include "ieee80211/rtl819x_BA.h"
303 +#include "ieee80211/rtl819x_TS.h"
304 +
305 +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
306 +#ifndef bool
307 +typedef enum{false = 0, true} bool;
308 +#endif
309 +#endif
310 +
311 +#ifndef IW_MODE_MONITOR
312 +#define IW_MODE_MONITOR 6
313 +#endif
314 +
315 +#ifndef IWEVCUSTOM
316 +#define IWEVCUSTOM 0x8c02
317 +#endif
318 +
319 +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
320 +#ifndef __bitwise
321 +#define __bitwise __attribute__((bitwise))
322 +#endif
323 +typedef __u16 __le16;
324 +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,4,27))
325 +struct iw_spy_data{
326 + /* --- Standard spy support --- */
327 + int spy_number;
328 + u_char spy_address[IW_MAX_SPY][ETH_ALEN];
329 + struct iw_quality spy_stat[IW_MAX_SPY];
330 + /* --- Enhanced spy support (event) */
331 + struct iw_quality spy_thr_low; /* Low threshold */
332 + struct iw_quality spy_thr_high; /* High threshold */
333 + u_char spy_thr_under[IW_MAX_SPY];
334 +};
335 +#endif
336 +#endif
337 +
338 +#ifndef container_of
339 +/**
340 + * container_of - cast a member of a structure out to the containing structure
341 + *
342 + * @ptr: the pointer to the member.
343 + * @type: the type of the container struct this is embedded in.
344 + * @member: the name of the member within the struct.
345 + *
346 + */
347 +#define container_of(ptr, type, member) ({ \
348 + const typeof( ((type *)0)->member ) *__mptr = (ptr); \
349 + (type *)( (char *)__mptr - offsetof(type,member) );})
350 +#endif
351 +
352 +#define KEY_TYPE_NA 0x0
353 +#define KEY_TYPE_WEP40 0x1
354 +#define KEY_TYPE_TKIP 0x2
355 +#define KEY_TYPE_CCMP 0x4
356 +#define KEY_TYPE_WEP104 0x5
357 +
358 +/* added for rtl819x tx procedure */
359 +#define MAX_QUEUE_SIZE 0x10
360 +
361 +//
362 +// 8190 queue mapping
363 +//
364 +#define BK_QUEUE 0
365 +#define BE_QUEUE 1
366 +#define VI_QUEUE 2
367 +#define VO_QUEUE 3
368 +#define HCCA_QUEUE 4
369 +#define TXCMD_QUEUE 5
370 +#define MGNT_QUEUE 6
371 +#define HIGH_QUEUE 7
372 +#define BEACON_QUEUE 8
373 +
374 +#define LOW_QUEUE BE_QUEUE
375 +#define NORMAL_QUEUE MGNT_QUEUE
376 +
377 +//added by amy for ps
378 +#define SWRF_TIMEOUT 50
379 +
380 +//added by amy for LEAP related
381 +#define IE_CISCO_FLAG_POSITION 0x08 // Flag byte: byte 8, numbered from 0.
382 +#define SUPPORT_CKIP_MIC 0x08 // bit3
383 +#define SUPPORT_CKIP_PK 0x10 // bit4
384 +/* defined for skb cb field */
385 +/* At most 28 byte */
386 +typedef struct cb_desc {
387 + /* Tx Desc Related flags (8-9) */
388 + u8 bLastIniPkt:1;
389 + u8 bCmdOrInit:1;
390 + u8 bFirstSeg:1;
391 + u8 bLastSeg:1;
392 + u8 bEncrypt:1;
393 + u8 bTxDisableRateFallBack:1;
394 + u8 bTxUseDriverAssingedRate:1;
395 + u8 bHwSec:1; //indicate whether use Hw security. WB
396 +
397 + u8 reserved1;
398 +
399 + /* Tx Firmware Relaged flags (10-11)*/
400 + u8 bCTSEnable:1;
401 + u8 bRTSEnable:1;
402 + u8 bUseShortGI:1;
403 + u8 bUseShortPreamble:1;
404 + u8 bTxEnableFwCalcDur:1;
405 + u8 bAMPDUEnable:1;
406 + u8 bRTSSTBC:1;
407 + u8 RTSSC:1;
408 +
409 + u8 bRTSBW:1;
410 + u8 bPacketBW:1;
411 + u8 bRTSUseShortPreamble:1;
412 + u8 bRTSUseShortGI:1;
413 + u8 bMulticast:1;
414 + u8 bBroadcast:1;
415 + //u8 reserved2:2;
416 + u8 drv_agg_enable:1;
417 + u8 reserved2:1;
418 +
419 + /* Tx Desc related element(12-19) */
420 + u8 rata_index;
421 + u8 queue_index;
422 + //u8 reserved3;
423 + //u8 reserved4;
424 + u16 txbuf_size;
425 + //u8 reserved5;
426 + u8 RATRIndex;
427 + u8 reserved6;
428 + u8 reserved7;
429 + u8 reserved8;
430 +
431 + /* Tx firmware related element(20-27) */
432 + u8 data_rate;
433 + u8 rts_rate;
434 + u8 ampdu_factor;
435 + u8 ampdu_density;
436 + //u8 reserved9;
437 + //u8 reserved10;
438 + //u8 reserved11;
439 + u8 DrvAggrNum;
440 + u16 pkt_size;
441 + u8 reserved12;
442 +}cb_desc, *pcb_desc;
443 +
444 +/*--------------------------Define -------------------------------------------*/
445 +#define MGN_1M 0x02
446 +#define MGN_2M 0x04
447 +#define MGN_5_5M 0x0b
448 +#define MGN_11M 0x16
449 +
450 +#define MGN_6M 0x0c
451 +#define MGN_9M 0x12
452 +#define MGN_12M 0x18
453 +#define MGN_18M 0x24
454 +#define MGN_24M 0x30
455 +#define MGN_36M 0x48
456 +#define MGN_48M 0x60
457 +#define MGN_54M 0x6c
458 +
459 +#define MGN_MCS0 0x80
460 +#define MGN_MCS1 0x81
461 +#define MGN_MCS2 0x82
462 +#define MGN_MCS3 0x83
463 +#define MGN_MCS4 0x84
464 +#define MGN_MCS5 0x85
465 +#define MGN_MCS6 0x86
466 +#define MGN_MCS7 0x87
467 +#define MGN_MCS8 0x88
468 +#define MGN_MCS9 0x89
469 +#define MGN_MCS10 0x8a
470 +#define MGN_MCS11 0x8b
471 +#define MGN_MCS12 0x8c
472 +#define MGN_MCS13 0x8d
473 +#define MGN_MCS14 0x8e
474 +#define MGN_MCS15 0x8f
475 +
476 +//----------------------------------------------------------------------------
477 +// 802.11 Management frame Reason Code field
478 +//----------------------------------------------------------------------------
479 +enum _ReasonCode{
480 + unspec_reason = 0x1,
481 + auth_not_valid = 0x2,
482 + deauth_lv_ss = 0x3,
483 + inactivity = 0x4,
484 + ap_overload = 0x5,
485 + class2_err = 0x6,
486 + class3_err = 0x7,
487 + disas_lv_ss = 0x8,
488 + asoc_not_auth = 0x9,
489 +
490 + //----MIC_CHECK
491 + mic_failure = 0xe,
492 + //----END MIC_CHECK
493 +
494 + // Reason code defined in 802.11i D10.0 p.28.
495 + invalid_IE = 0x0d,
496 + four_way_tmout = 0x0f,
497 + two_way_tmout = 0x10,
498 + IE_dismatch = 0x11,
499 + invalid_Gcipher = 0x12,
500 + invalid_Pcipher = 0x13,
501 + invalid_AKMP = 0x14,
502 + unsup_RSNIEver = 0x15,
503 + invalid_RSNIE = 0x16,
504 + auth_802_1x_fail= 0x17,
505 + ciper_reject = 0x18,
506 +
507 + // Reason code defined in 7.3.1.7, 802.1e D13.0, p.42. Added by Annie, 2005-11-15.
508 + QoS_unspec = 0x20, // 32
509 + QAP_bandwidth = 0x21, // 33
510 + poor_condition = 0x22, // 34
511 + no_facility = 0x23, // 35
512 + // Where is 36???
513 + req_declined = 0x25, // 37
514 + invalid_param = 0x26, // 38
515 + req_not_honored= 0x27, // 39
516 + TS_not_created = 0x2F, // 47
517 + DL_not_allowed = 0x30, // 48
518 + dest_not_exist = 0x31, // 49
519 + dest_not_QSTA = 0x32, // 50
520 +};
521 +
522 +
523 +
524 +#define aSifsTime (((priv->ieee80211->current_network.mode == IEEE_A)||(priv->ieee80211->current_network.mode == IEEE_N_24G)||(priv->ieee80211->current_network.mode == IEEE_N_5G))? 16 : 10)
525 +
526 +#define MGMT_QUEUE_NUM 5
527 +
528 +#define IEEE_CMD_SET_WPA_PARAM 1
529 +#define IEEE_CMD_SET_WPA_IE 2
530 +#define IEEE_CMD_SET_ENCRYPTION 3
531 +#define IEEE_CMD_MLME 4
532 +
533 +#define IEEE_PARAM_WPA_ENABLED 1
534 +#define IEEE_PARAM_TKIP_COUNTERMEASURES 2
535 +#define IEEE_PARAM_DROP_UNENCRYPTED 3
536 +#define IEEE_PARAM_PRIVACY_INVOKED 4
537 +#define IEEE_PARAM_AUTH_ALGS 5
538 +#define IEEE_PARAM_IEEE_802_1X 6
539 +//It should consistent with the driver_XXX.c
540 +// David, 2006.9.26
541 +#define IEEE_PARAM_WPAX_SELECT 7
542 +//Added for notify the encryption type selection
543 +// David, 2006.9.26
544 +#define IEEE_PROTO_WPA 1
545 +#define IEEE_PROTO_RSN 2
546 +//Added for notify the encryption type selection
547 +// David, 2006.9.26
548 +#define IEEE_WPAX_USEGROUP 0
549 +#define IEEE_WPAX_WEP40 1
550 +#define IEEE_WPAX_TKIP 2
551 +#define IEEE_WPAX_WRAP 3
552 +#define IEEE_WPAX_CCMP 4
553 +#define IEEE_WPAX_WEP104 5
554 +
555 +#define IEEE_KEY_MGMT_IEEE8021X 1
556 +#define IEEE_KEY_MGMT_PSK 2
557 +
558 +#define IEEE_MLME_STA_DEAUTH 1
559 +#define IEEE_MLME_STA_DISASSOC 2
560 +
561 +
562 +#define IEEE_CRYPT_ERR_UNKNOWN_ALG 2
563 +#define IEEE_CRYPT_ERR_UNKNOWN_ADDR 3
564 +#define IEEE_CRYPT_ERR_CRYPT_INIT_FAILED 4
565 +#define IEEE_CRYPT_ERR_KEY_SET_FAILED 5
566 +#define IEEE_CRYPT_ERR_TX_KEY_SET_FAILED 6
567 +#define IEEE_CRYPT_ERR_CARD_CONF_FAILED 7
568 +
569 +
570 +#define IEEE_CRYPT_ALG_NAME_LEN 16
571 +
572 +#define MAX_IE_LEN 0xff
573 +
574 +// added for kernel conflict
575 +#define ieee80211_crypt_deinit_entries ieee80211_crypt_deinit_entries_rsl
576 +#define ieee80211_crypt_deinit_handler ieee80211_crypt_deinit_handler_rsl
577 +#define ieee80211_crypt_delayed_deinit ieee80211_crypt_delayed_deinit_rsl
578 +#define ieee80211_register_crypto_ops ieee80211_register_crypto_ops_rsl
579 +#define ieee80211_unregister_crypto_ops ieee80211_unregister_crypto_ops_rsl
580 +#define ieee80211_get_crypto_ops ieee80211_get_crypto_ops_rsl
581 +
582 +#define ieee80211_ccmp_null ieee80211_ccmp_null_rsl
583 +
584 +#define ieee80211_tkip_null ieee80211_tkip_null_rsl
585 +
586 +#define ieee80211_wep_null ieee80211_wep_null_rsl
587 +
588 +#define free_ieee80211 free_ieee80211_rsl
589 +#define alloc_ieee80211 alloc_ieee80211_rsl
590 +
591 +#define ieee80211_rx ieee80211_rx_rsl
592 +#define ieee80211_rx_mgt ieee80211_rx_mgt_rsl
593 +
594 +#define ieee80211_get_beacon ieee80211_get_beacon_rsl
595 +#define ieee80211_wake_queue ieee80211_wake_queue_rsl
596 +#define ieee80211_stop_queue ieee80211_stop_queue_rsl
597 +#define ieee80211_reset_queue ieee80211_reset_queue_rsl
598 +#define ieee80211_softmac_stop_protocol ieee80211_softmac_stop_protocol_rsl
599 +#define ieee80211_softmac_start_protocol ieee80211_softmac_start_protocol_rsl
600 +#define ieee80211_is_shortslot ieee80211_is_shortslot_rsl
601 +#define ieee80211_is_54g ieee80211_is_54g_rsl
602 +#define ieee80211_wpa_supplicant_ioctl ieee80211_wpa_supplicant_ioctl_rsl
603 +#define ieee80211_ps_tx_ack ieee80211_ps_tx_ack_rsl
604 +#define ieee80211_softmac_xmit ieee80211_softmac_xmit_rsl
605 +#define ieee80211_stop_send_beacons ieee80211_stop_send_beacons_rsl
606 +#define notify_wx_assoc_event notify_wx_assoc_event_rsl
607 +#define SendDisassociation SendDisassociation_rsl
608 +#define ieee80211_disassociate ieee80211_disassociate_rsl
609 +#define ieee80211_start_send_beacons ieee80211_start_send_beacons_rsl
610 +#define ieee80211_stop_scan ieee80211_stop_scan_rsl
611 +#define ieee80211_send_probe_requests ieee80211_send_probe_requests_rsl
612 +#define ieee80211_softmac_scan_syncro ieee80211_softmac_scan_syncro_rsl
613 +#define ieee80211_start_scan_syncro ieee80211_start_scan_syncro_rsl
614 +
615 +#define ieee80211_wx_get_essid ieee80211_wx_get_essid_rsl
616 +#define ieee80211_wx_set_essid ieee80211_wx_set_essid_rsl
617 +#define ieee80211_wx_set_rate ieee80211_wx_set_rate_rsl
618 +#define ieee80211_wx_get_rate ieee80211_wx_get_rate_rsl
619 +#define ieee80211_wx_set_wap ieee80211_wx_set_wap_rsl
620 +#define ieee80211_wx_get_wap ieee80211_wx_get_wap_rsl
621 +#define ieee80211_wx_set_mode ieee80211_wx_set_mode_rsl
622 +#define ieee80211_wx_get_mode ieee80211_wx_get_mode_rsl
623 +#define ieee80211_wx_set_scan ieee80211_wx_set_scan_rsl
624 +#define ieee80211_wx_get_freq ieee80211_wx_get_freq_rsl
625 +#define ieee80211_wx_set_freq ieee80211_wx_set_freq_rsl
626 +#define ieee80211_wx_set_rawtx ieee80211_wx_set_rawtx_rsl
627 +#define ieee80211_wx_get_name ieee80211_wx_get_name_rsl
628 +#define ieee80211_wx_set_power ieee80211_wx_set_power_rsl
629 +#define ieee80211_wx_get_power ieee80211_wx_get_power_rsl
630 +#define ieee80211_wlan_frequencies ieee80211_wlan_frequencies_rsl
631 +#define ieee80211_wx_set_rts ieee80211_wx_set_rts_rsl
632 +#define ieee80211_wx_get_rts ieee80211_wx_get_rts_rsl
633 +
634 +#define ieee80211_txb_free ieee80211_txb_free_rsl
635 +
636 +#define ieee80211_wx_set_gen_ie ieee80211_wx_set_gen_ie_rsl
637 +#define ieee80211_wx_get_scan ieee80211_wx_get_scan_rsl
638 +#define ieee80211_wx_set_encode ieee80211_wx_set_encode_rsl
639 +#define ieee80211_wx_get_encode ieee80211_wx_get_encode_rsl
640 +#if WIRELESS_EXT >= 18
641 +#define ieee80211_wx_set_mlme ieee80211_wx_set_mlme_rsl
642 +#define ieee80211_wx_set_auth ieee80211_wx_set_auth_rsl
643 +#define ieee80211_wx_set_encode_ext ieee80211_wx_set_encode_ext_rsl
644 +#define ieee80211_wx_get_encode_ext ieee80211_wx_get_encode_ext_rsl
645 +#endif
646 +
647 +
648 +typedef struct ieee_param {
649 + u32 cmd;
650 + u8 sta_addr[ETH_ALEN];
651 + union {
652 + struct {
653 + u8 name;
654 + u32 value;
655 + } wpa_param;
656 + struct {
657 + u32 len;
658 + u8 reserved[32];
659 + u8 data[0];
660 + } wpa_ie;
661 + struct{
662 + int command;
663 + int reason_code;
664 + } mlme;
665 + struct {
666 + u8 alg[IEEE_CRYPT_ALG_NAME_LEN];
667 + u8 set_tx;
668 + u32 err;
669 + u8 idx;
670 + u8 seq[8]; /* sequence counter (set: RX, get: TX) */
671 + u16 key_len;
672 + u8 key[0];
673 + } crypt;
674 + } u;
675 +}ieee_param;
676 +
677 +
678 +#if WIRELESS_EXT < 17
679 +#define IW_QUAL_QUAL_INVALID 0x10
680 +#define IW_QUAL_LEVEL_INVALID 0x20
681 +#define IW_QUAL_NOISE_INVALID 0x40
682 +#define IW_QUAL_QUAL_UPDATED 0x1
683 +#define IW_QUAL_LEVEL_UPDATED 0x2
684 +#define IW_QUAL_NOISE_UPDATED 0x4
685 +#endif
686 +
687 +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
688 +static inline void tq_init(struct tq_struct * task, void(*func)(void *), void *data)
689 +{
690 + task->routine = func;
691 + task->data = data;
692 + //task->next = NULL;
693 + INIT_LIST_HEAD(&task->list);
694 + task->sync = 0;
695 +}
696 +#endif
697 +
698 +// linux under 2.6.9 release may not support it, so modify it for common use
699 +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,9))
700 +//#define MSECS(t) (1000 * ((t) / HZ) + 1000 * ((t) % HZ) / HZ)
701 +#define MSECS(t) (HZ * ((t) / 1000) + (HZ * ((t) % 1000)) / 1000)
702 +static inline unsigned long msleep_interruptible_rsl(unsigned int msecs)
703 +{
704 + unsigned long timeout = MSECS(msecs) + 1;
705 +
706 + while (timeout) {
707 + set_current_state(TASK_INTERRUPTIBLE);
708 + timeout = schedule_timeout(timeout);
709 + }
710 + return timeout;
711 +}
712 +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,4,31))
713 +static inline void msleep(unsigned int msecs)
714 +{
715 + unsigned long timeout = MSECS(msecs) + 1;
716 +
717 + while (timeout) {
718 + set_current_state(TASK_UNINTERRUPTIBLE);
719 + timeout = schedule_timeout(timeout);
720 + }
721 +}
722 +#endif
723 +#else
724 +#define MSECS(t) msecs_to_jiffies(t)
725 +#define msleep_interruptible_rsl msleep_interruptible
726 +#endif
727 +
728 +#define IEEE80211_DATA_LEN 2304
729 +/* Maximum size for the MA-UNITDATA primitive, 802.11 standard section
730 + 6.2.1.1.2.
731 +
732 + The figure in section 7.1.2 suggests a body size of up to 2312
733 + bytes is allowed, which is a bit confusing, I suspect this
734 + represents the 2304 bytes of real data, plus a possible 8 bytes of
735 + WEP IV and ICV. (this interpretation suggested by Ramiro Barreiro) */
736 +#define IEEE80211_1ADDR_LEN 10
737 +#define IEEE80211_2ADDR_LEN 16
738 +#define IEEE80211_3ADDR_LEN 24
739 +#define IEEE80211_4ADDR_LEN 30
740 +#define IEEE80211_FCS_LEN 4
741 +#define IEEE80211_HLEN (IEEE80211_4ADDR_LEN)
742 +#define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN)
743 +#define IEEE80211_MGMT_HDR_LEN 24
744 +#define IEEE80211_DATA_HDR3_LEN 24
745 +#define IEEE80211_DATA_HDR4_LEN 30
746 +
747 +#define MIN_FRAG_THRESHOLD 256U
748 +#define MAX_FRAG_THRESHOLD 2346U
749 +
750 +
751 +/* Frame control field constants */
752 +#define IEEE80211_FCTL_VERS 0x0003
753 +#define IEEE80211_FCTL_FTYPE 0x000c
754 +#define IEEE80211_FCTL_STYPE 0x00f0
755 +#define IEEE80211_FCTL_FRAMETYPE 0x00fc
756 +#define IEEE80211_FCTL_TODS 0x0100
757 +#define IEEE80211_FCTL_FROMDS 0x0200
758 +#define IEEE80211_FCTL_DSTODS 0x0300 //added by david
759 +#define IEEE80211_FCTL_MOREFRAGS 0x0400
760 +#define IEEE80211_FCTL_RETRY 0x0800
761 +#define IEEE80211_FCTL_PM 0x1000
762 +#define IEEE80211_FCTL_MOREDATA 0x2000
763 +#define IEEE80211_FCTL_WEP 0x4000
764 +#define IEEE80211_FCTL_ORDER 0x8000
765 +
766 +#define IEEE80211_FTYPE_MGMT 0x0000
767 +#define IEEE80211_FTYPE_CTL 0x0004
768 +#define IEEE80211_FTYPE_DATA 0x0008
769 +
770 +/* management */
771 +#define IEEE80211_STYPE_ASSOC_REQ 0x0000
772 +#define IEEE80211_STYPE_ASSOC_RESP 0x0010
773 +#define IEEE80211_STYPE_REASSOC_REQ 0x0020
774 +#define IEEE80211_STYPE_REASSOC_RESP 0x0030
775 +#define IEEE80211_STYPE_PROBE_REQ 0x0040
776 +#define IEEE80211_STYPE_PROBE_RESP 0x0050
777 +#define IEEE80211_STYPE_BEACON 0x0080
778 +#define IEEE80211_STYPE_ATIM 0x0090
779 +#define IEEE80211_STYPE_DISASSOC 0x00A0
780 +#define IEEE80211_STYPE_AUTH 0x00B0
781 +#define IEEE80211_STYPE_DEAUTH 0x00C0
782 +#define IEEE80211_STYPE_MANAGE_ACT 0x00D0
783 +
784 +/* control */
785 +#define IEEE80211_STYPE_PSPOLL 0x00A0
786 +#define IEEE80211_STYPE_RTS 0x00B0
787 +#define IEEE80211_STYPE_CTS 0x00C0
788 +#define IEEE80211_STYPE_ACK 0x00D0
789 +#define IEEE80211_STYPE_CFEND 0x00E0
790 +#define IEEE80211_STYPE_CFENDACK 0x00F0
791 +#define IEEE80211_STYPE_BLOCKACK 0x0094
792 +
793 +/* data */
794 +#define IEEE80211_STYPE_DATA 0x0000
795 +#define IEEE80211_STYPE_DATA_CFACK 0x0010
796 +#define IEEE80211_STYPE_DATA_CFPOLL 0x0020
797 +#define IEEE80211_STYPE_DATA_CFACKPOLL 0x0030
798 +#define IEEE80211_STYPE_NULLFUNC 0x0040
799 +#define IEEE80211_STYPE_CFACK 0x0050
800 +#define IEEE80211_STYPE_CFPOLL 0x0060
801 +#define IEEE80211_STYPE_CFACKPOLL 0x0070
802 +#define IEEE80211_STYPE_QOS_DATA 0x0080 //added for WMM 2006/8/2
803 +#define IEEE80211_STYPE_QOS_NULL 0x00C0
804 +
805 +#define IEEE80211_SCTL_FRAG 0x000F
806 +#define IEEE80211_SCTL_SEQ 0xFFF0
807 +
808 +/* QOS control */
809 +#define IEEE80211_QCTL_TID 0x000F
810 +
811 +#define FC_QOS_BIT BIT7
812 +#define IsDataFrame(pdu) ( ((pdu[0] & 0x0C)==0x08) ? true : false )
813 +#define IsLegacyDataFrame(pdu) (IsDataFrame(pdu) && (!(pdu[0]&FC_QOS_BIT)) )
814 +//added by wb. Is this right?
815 +#define IsQoSDataFrame(pframe) ((*(u16*)pframe&(IEEE80211_STYPE_QOS_DATA|IEEE80211_FTYPE_DATA)) == (IEEE80211_STYPE_QOS_DATA|IEEE80211_FTYPE_DATA))
816 +#define Frame_Order(pframe) (*(u16*)pframe&IEEE80211_FCTL_ORDER)
817 +#define SN_LESS(a, b) (((a-b)&0x800)!=0)
818 +#define SN_EQUAL(a, b) (a == b)
819 +#define MAX_DEV_ADDR_SIZE 8
820 +typedef enum _ACT_CATEGORY{
821 + ACT_CAT_QOS = 1,
822 + ACT_CAT_DLS = 2,
823 + ACT_CAT_BA = 3,
824 + ACT_CAT_HT = 7,
825 + ACT_CAT_WMM = 17,
826 +} ACT_CATEGORY, *PACT_CATEGORY;
827 +
828 +typedef enum _TS_ACTION{
829 + ACT_ADDTSREQ = 0,
830 + ACT_ADDTSRSP = 1,
831 + ACT_DELTS = 2,
832 + ACT_SCHEDULE = 3,
833 +} TS_ACTION, *PTS_ACTION;
834 +
835 +typedef enum _BA_ACTION{
836 + ACT_ADDBAREQ = 0,
837 + ACT_ADDBARSP = 1,
838 + ACT_DELBA = 2,
839 +} BA_ACTION, *PBA_ACTION;
840 +
841 +typedef enum _InitialGainOpType{
842 + IG_Backup=0,
843 + IG_Restore,
844 + IG_Max
845 +}InitialGainOpType;
846 +
847 +/* debug macros */
848 +#define CONFIG_IEEE80211_DEBUG
849 +#ifdef CONFIG_IEEE80211_DEBUG
850 +extern u32 ieee80211_debug_level;
851 +#define IEEE80211_DEBUG(level, fmt, args...) \
852 +do { if (ieee80211_debug_level & (level)) \
853 + printk(KERN_DEBUG "ieee80211: " fmt, ## args); } while (0)
854 +//wb added to debug out data buf
855 +//if you want print DATA buffer related BA, please set ieee80211_debug_level to DATA|BA
856 +#define IEEE80211_DEBUG_DATA(level, data, datalen) \
857 + do{ if ((ieee80211_debug_level & (level)) == (level)) \
858 + { \
859 + int i; \
860 + u8* pdata = (u8*) data; \
861 + printk(KERN_DEBUG "ieee80211: %s()\n", __FUNCTION__); \
862 + for(i=0; i<(int)(datalen); i++) \
863 + { \
864 + printk("%2x ", pdata[i]); \
865 + if ((i+1)%16 == 0) printk("\n"); \
866 + } \
867 + printk("\n"); \
868 + } \
869 + } while (0)
870 +#else
871 +#define IEEE80211_DEBUG(level, fmt, args...) do {} while (0)
872 +#define IEEE80211_DEBUG_DATA(level, data, datalen) do {} while(0)
873 +#endif /* CONFIG_IEEE80211_DEBUG */
874 +
875 +/* debug macros not dependent on CONFIG_IEEE80211_DEBUG */
876 +
877 +#define MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x"
878 +#define MAC_ARG(x) ((u8*)(x))[0],((u8*)(x))[1],((u8*)(x))[2],((u8*)(x))[3],((u8*)(x))[4],((u8*)(x))[5]
879 +
880 +/*
881 + * To use the debug system;
882 + *
883 + * If you are defining a new debug classification, simply add it to the #define
884 + * list here in the form of:
885 + *
886 + * #define IEEE80211_DL_xxxx VALUE
887 + *
888 + * shifting value to the left one bit from the previous entry. xxxx should be
889 + * the name of the classification (for example, WEP)
890 + *
891 + * You then need to either add a IEEE80211_xxxx_DEBUG() macro definition for your
892 + * classification, or use IEEE80211_DEBUG(IEEE80211_DL_xxxx, ...) whenever you want
893 + * to send output to that classification.
894 + *
895 + * To add your debug level to the list of levels seen when you perform
896 + *
897 + * % cat /proc/net/ipw/debug_level
898 + *
899 + * you simply need to add your entry to the ipw_debug_levels array.
900 + *
901 + * If you do not see debug_level in /proc/net/ipw then you do not have
902 + * CONFIG_IEEE80211_DEBUG defined in your kernel configuration
903 + *
904 + */
905 +
906 +#define IEEE80211_DL_INFO (1<<0)
907 +#define IEEE80211_DL_WX (1<<1)
908 +#define IEEE80211_DL_SCAN (1<<2)
909 +#define IEEE80211_DL_STATE (1<<3)
910 +#define IEEE80211_DL_MGMT (1<<4)
911 +#define IEEE80211_DL_FRAG (1<<5)
912 +#define IEEE80211_DL_EAP (1<<6)
913 +#define IEEE80211_DL_DROP (1<<7)
914 +
915 +#define IEEE80211_DL_TX (1<<8)
916 +#define IEEE80211_DL_RX (1<<9)
917 +
918 +#define IEEE80211_DL_HT (1<<10) //HT
919 +#define IEEE80211_DL_BA (1<<11) //ba
920 +#define IEEE80211_DL_TS (1<<12) //TS
921 +#define IEEE80211_DL_QOS (1<<13)
922 +#define IEEE80211_DL_REORDER (1<<14)
923 +#define IEEE80211_DL_IOT (1<<15)
924 +#define IEEE80211_DL_IPS (1<<16)
925 +#define IEEE80211_DL_TRACE (1<<29) //trace function, need to user net_ratelimit() together in order not to print too much to the screen
926 +#define IEEE80211_DL_DATA (1<<30) //use this flag to control whether print data buf out.
927 +#define IEEE80211_DL_ERR (1<<31) //always open
928 +#define IEEE80211_ERROR(f, a...) printk(KERN_ERR "ieee80211: " f, ## a)
929 +#define IEEE80211_WARNING(f, a...) printk(KERN_WARNING "ieee80211: " f, ## a)
930 +#define IEEE80211_DEBUG_INFO(f, a...) IEEE80211_DEBUG(IEEE80211_DL_INFO, f, ## a)
931 +
932 +#define IEEE80211_DEBUG_WX(f, a...) IEEE80211_DEBUG(IEEE80211_DL_WX, f, ## a)
933 +#define IEEE80211_DEBUG_SCAN(f, a...) IEEE80211_DEBUG(IEEE80211_DL_SCAN, f, ## a)
934 +#define IEEE80211_DEBUG_STATE(f, a...) IEEE80211_DEBUG(IEEE80211_DL_STATE, f, ## a)
935 +#define IEEE80211_DEBUG_MGMT(f, a...) IEEE80211_DEBUG(IEEE80211_DL_MGMT, f, ## a)
936 +#define IEEE80211_DEBUG_FRAG(f, a...) IEEE80211_DEBUG(IEEE80211_DL_FRAG, f, ## a)
937 +#define IEEE80211_DEBUG_EAP(f, a...) IEEE80211_DEBUG(IEEE80211_DL_EAP, f, ## a)
938 +#define IEEE80211_DEBUG_DROP(f, a...) IEEE80211_DEBUG(IEEE80211_DL_DROP, f, ## a)
939 +#define IEEE80211_DEBUG_TX(f, a...) IEEE80211_DEBUG(IEEE80211_DL_TX, f, ## a)
940 +#define IEEE80211_DEBUG_RX(f, a...) IEEE80211_DEBUG(IEEE80211_DL_RX, f, ## a)
941 +#define IEEE80211_DEBUG_QOS(f, a...) IEEE80211_DEBUG(IEEE80211_DL_QOS, f, ## a)
942 +
943 +#ifdef CONFIG_IEEE80211_DEBUG
944 +/* Added by Annie, 2005-11-22. */
945 +#define MAX_STR_LEN 64
946 +/* I want to see ASCII 33 to 126 only. Otherwise, I print '?'. Annie, 2005-11-22.*/
947 +#define PRINTABLE(_ch) (_ch>'!' && _ch<'~')
948 +#define IEEE80211_PRINT_STR(_Comp, _TitleString, _Ptr, _Len) \
949 + if((_Comp) & level) \
950 + { \
951 + int __i; \
952 + u8 buffer[MAX_STR_LEN]; \
953 + int length = (_Len<MAX_STR_LEN)? _Len : (MAX_STR_LEN-1) ; \
954 + memset(buffer, 0, MAX_STR_LEN); \
955 + memcpy(buffer, (u8 *)_Ptr, length ); \
956 + for( __i=0; __i<MAX_STR_LEN; __i++ ) \
957 + { \
958 + if( !PRINTABLE(buffer[__i]) ) buffer[__i] = '?'; \
959 + } \
960 + buffer[length] = '\0'; \
961 + printk("Rtl819x: "); \
962 + printk(_TitleString); \
963 + printk(": %d, <%s>\n", _Len, buffer); \
964 + }
965 +#else
966 +#define IEEE80211_PRINT_STR(_Comp, _TitleString, _Ptr, _Len) do {} while (0)
967 +#endif
968 +
969 +#include <linux/netdevice.h>
970 +#include <linux/if_arp.h> /* ARPHRD_ETHER */
971 +
972 +#ifndef WIRELESS_SPY
973 +#define WIRELESS_SPY // enable iwspy support
974 +#endif
975 +#include <net/iw_handler.h> // new driver API
976 +
977 +#ifndef ETH_P_PAE
978 +#define ETH_P_PAE 0x888E /* Port Access Entity (IEEE 802.1X) */
979 +#endif /* ETH_P_PAE */
980 +
981 +#define ETH_P_PREAUTH 0x88C7 /* IEEE 802.11i pre-authentication */
982 +
983 +#ifndef ETH_P_80211_RAW
984 +#define ETH_P_80211_RAW (ETH_P_ECONET + 1)
985 +#endif
986 +
987 +/* IEEE 802.11 defines */
988 +
989 +#define P80211_OUI_LEN 3
990 +
991 +struct ieee80211_snap_hdr {
992 +
993 + u8 dsap; /* always 0xAA */
994 + u8 ssap; /* always 0xAA */
995 + u8 ctrl; /* always 0x03 */
996 + u8 oui[P80211_OUI_LEN]; /* organizational universal id */
997 +
998 +} __attribute__ ((packed));
999 +
1000 +#define SNAP_SIZE sizeof(struct ieee80211_snap_hdr)
1001 +
1002 +#define WLAN_FC_GET_VERS(fc) ((fc) & IEEE80211_FCTL_VERS)
1003 +#define WLAN_FC_GET_TYPE(fc) ((fc) & IEEE80211_FCTL_FTYPE)
1004 +#define WLAN_FC_GET_STYPE(fc) ((fc) & IEEE80211_FCTL_STYPE)
1005 +
1006 +#define WLAN_FC_GET_FRAMETYPE(fc) ((fc) & IEEE80211_FCTL_FRAMETYPE)
1007 +#define WLAN_GET_SEQ_FRAG(seq) ((seq) & IEEE80211_SCTL_FRAG)
1008 +#define WLAN_GET_SEQ_SEQ(seq) (((seq) & IEEE80211_SCTL_SEQ) >> 4)
1009 +
1010 +/* Authentication algorithms */
1011 +#define WLAN_AUTH_OPEN 0
1012 +#define WLAN_AUTH_SHARED_KEY 1
1013 +#define WLAN_AUTH_LEAP 2
1014 +
1015 +#define WLAN_AUTH_CHALLENGE_LEN 128
1016 +
1017 +#define WLAN_CAPABILITY_BSS (1<<0)
1018 +#define WLAN_CAPABILITY_IBSS (1<<1)
1019 +#define WLAN_CAPABILITY_CF_POLLABLE (1<<2)
1020 +#define WLAN_CAPABILITY_CF_POLL_REQUEST (1<<3)
1021 +#define WLAN_CAPABILITY_PRIVACY (1<<4)
1022 +#define WLAN_CAPABILITY_SHORT_PREAMBLE (1<<5)
1023 +#define WLAN_CAPABILITY_PBCC (1<<6)
1024 +#define WLAN_CAPABILITY_CHANNEL_AGILITY (1<<7)
1025 +#define WLAN_CAPABILITY_SPECTRUM_MGMT (1<<8)
1026 +#define WLAN_CAPABILITY_QOS (1<<9)
1027 +#define WLAN_CAPABILITY_SHORT_SLOT (1<<10)
1028 +#define WLAN_CAPABILITY_DSSS_OFDM (1<<13)
1029 +
1030 +/* 802.11g ERP information element */
1031 +#define WLAN_ERP_NON_ERP_PRESENT (1<<0)
1032 +#define WLAN_ERP_USE_PROTECTION (1<<1)
1033 +#define WLAN_ERP_BARKER_PREAMBLE (1<<2)
1034 +
1035 +/* Status codes */
1036 +enum ieee80211_statuscode {
1037 + WLAN_STATUS_SUCCESS = 0,
1038 + WLAN_STATUS_UNSPECIFIED_FAILURE = 1,
1039 + WLAN_STATUS_CAPS_UNSUPPORTED = 10,
1040 + WLAN_STATUS_REASSOC_NO_ASSOC = 11,
1041 + WLAN_STATUS_ASSOC_DENIED_UNSPEC = 12,
1042 + WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG = 13,
1043 + WLAN_STATUS_UNKNOWN_AUTH_TRANSACTION = 14,
1044 + WLAN_STATUS_CHALLENGE_FAIL = 15,
1045 + WLAN_STATUS_AUTH_TIMEOUT = 16,
1046 + WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA = 17,
1047 + WLAN_STATUS_ASSOC_DENIED_RATES = 18,
1048 + /* 802.11b */
1049 + WLAN_STATUS_ASSOC_DENIED_NOSHORTPREAMBLE = 19,
1050 + WLAN_STATUS_ASSOC_DENIED_NOPBCC = 20,
1051 + WLAN_STATUS_ASSOC_DENIED_NOAGILITY = 21,
1052 + /* 802.11h */
1053 + WLAN_STATUS_ASSOC_DENIED_NOSPECTRUM = 22,
1054 + WLAN_STATUS_ASSOC_REJECTED_BAD_POWER = 23,
1055 + WLAN_STATUS_ASSOC_REJECTED_BAD_SUPP_CHAN = 24,
1056 + /* 802.11g */
1057 + WLAN_STATUS_ASSOC_DENIED_NOSHORTTIME = 25,
1058 + WLAN_STATUS_ASSOC_DENIED_NODSSSOFDM = 26,
1059 + /* 802.11i */
1060 + WLAN_STATUS_INVALID_IE = 40,
1061 + WLAN_STATUS_INVALID_GROUP_CIPHER = 41,
1062 + WLAN_STATUS_INVALID_PAIRWISE_CIPHER = 42,
1063 + WLAN_STATUS_INVALID_AKMP = 43,
1064 + WLAN_STATUS_UNSUPP_RSN_VERSION = 44,
1065 + WLAN_STATUS_INVALID_RSN_IE_CAP = 45,
1066 + WLAN_STATUS_CIPHER_SUITE_REJECTED = 46,
1067 +};
1068 +
1069 +/* Reason codes */
1070 +enum ieee80211_reasoncode {
1071 + WLAN_REASON_UNSPECIFIED = 1,
1072 + WLAN_REASON_PREV_AUTH_NOT_VALID = 2,
1073 + WLAN_REASON_DEAUTH_LEAVING = 3,
1074 + WLAN_REASON_DISASSOC_DUE_TO_INACTIVITY = 4,
1075 + WLAN_REASON_DISASSOC_AP_BUSY = 5,
1076 + WLAN_REASON_CLASS2_FRAME_FROM_NONAUTH_STA = 6,
1077 + WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA = 7,
1078 + WLAN_REASON_DISASSOC_STA_HAS_LEFT = 8,
1079 + WLAN_REASON_STA_REQ_ASSOC_WITHOUT_AUTH = 9,
1080 + /* 802.11h */
1081 + WLAN_REASON_DISASSOC_BAD_POWER = 10,
1082 + WLAN_REASON_DISASSOC_BAD_SUPP_CHAN = 11,
1083 + /* 802.11i */
1084 + WLAN_REASON_INVALID_IE = 13,
1085 + WLAN_REASON_MIC_FAILURE = 14,
1086 + WLAN_REASON_4WAY_HANDSHAKE_TIMEOUT = 15,
1087 + WLAN_REASON_GROUP_KEY_HANDSHAKE_TIMEOUT = 16,
1088 + WLAN_REASON_IE_DIFFERENT = 17,
1089 + WLAN_REASON_INVALID_GROUP_CIPHER = 18,
1090 + WLAN_REASON_INVALID_PAIRWISE_CIPHER = 19,
1091 + WLAN_REASON_INVALID_AKMP = 20,
1092 + WLAN_REASON_UNSUPP_RSN_VERSION = 21,
1093 + WLAN_REASON_INVALID_RSN_IE_CAP = 22,
1094 + WLAN_REASON_IEEE8021X_FAILED = 23,
1095 + WLAN_REASON_CIPHER_SUITE_REJECTED = 24,
1096 +};
1097 +
1098 +#define IEEE80211_STATMASK_SIGNAL (1<<0)
1099 +#define IEEE80211_STATMASK_RSSI (1<<1)
1100 +#define IEEE80211_STATMASK_NOISE (1<<2)
1101 +#define IEEE80211_STATMASK_RATE (1<<3)
1102 +#define IEEE80211_STATMASK_WEMASK 0x7
1103 +
1104 +#define IEEE80211_CCK_MODULATION (1<<0)
1105 +#define IEEE80211_OFDM_MODULATION (1<<1)
1106 +
1107 +#define IEEE80211_24GHZ_BAND (1<<0)
1108 +#define IEEE80211_52GHZ_BAND (1<<1)
1109 +
1110 +#define IEEE80211_CCK_RATE_LEN 4
1111 +#define IEEE80211_CCK_RATE_1MB 0x02
1112 +#define IEEE80211_CCK_RATE_2MB 0x04
1113 +#define IEEE80211_CCK_RATE_5MB 0x0B
1114 +#define IEEE80211_CCK_RATE_11MB 0x16
1115 +#define IEEE80211_OFDM_RATE_LEN 8
1116 +#define IEEE80211_OFDM_RATE_6MB 0x0C
1117 +#define IEEE80211_OFDM_RATE_9MB 0x12
1118 +#define IEEE80211_OFDM_RATE_12MB 0x18
1119 +#define IEEE80211_OFDM_RATE_18MB 0x24
1120 +#define IEEE80211_OFDM_RATE_24MB 0x30
1121 +#define IEEE80211_OFDM_RATE_36MB 0x48
1122 +#define IEEE80211_OFDM_RATE_48MB 0x60
1123 +#define IEEE80211_OFDM_RATE_54MB 0x6C
1124 +#define IEEE80211_BASIC_RATE_MASK 0x80
1125 +
1126 +#define IEEE80211_CCK_RATE_1MB_MASK (1<<0)
1127 +#define IEEE80211_CCK_RATE_2MB_MASK (1<<1)
1128 +#define IEEE80211_CCK_RATE_5MB_MASK (1<<2)
1129 +#define IEEE80211_CCK_RATE_11MB_MASK (1<<3)
1130 +#define IEEE80211_OFDM_RATE_6MB_MASK (1<<4)
1131 +#define IEEE80211_OFDM_RATE_9MB_MASK (1<<5)
1132 +#define IEEE80211_OFDM_RATE_12MB_MASK (1<<6)
1133 +#define IEEE80211_OFDM_RATE_18MB_MASK (1<<7)
1134 +#define IEEE80211_OFDM_RATE_24MB_MASK (1<<8)
1135 +#define IEEE80211_OFDM_RATE_36MB_MASK (1<<9)
1136 +#define IEEE80211_OFDM_RATE_48MB_MASK (1<<10)
1137 +#define IEEE80211_OFDM_RATE_54MB_MASK (1<<11)
1138 +
1139 +#define IEEE80211_CCK_RATES_MASK 0x0000000F
1140 +#define IEEE80211_CCK_BASIC_RATES_MASK (IEEE80211_CCK_RATE_1MB_MASK | \
1141 + IEEE80211_CCK_RATE_2MB_MASK)
1142 +#define IEEE80211_CCK_DEFAULT_RATES_MASK (IEEE80211_CCK_BASIC_RATES_MASK | \
1143 + IEEE80211_CCK_RATE_5MB_MASK | \
1144 + IEEE80211_CCK_RATE_11MB_MASK)
1145 +
1146 +#define IEEE80211_OFDM_RATES_MASK 0x00000FF0
1147 +#define IEEE80211_OFDM_BASIC_RATES_MASK (IEEE80211_OFDM_RATE_6MB_MASK | \
1148 + IEEE80211_OFDM_RATE_12MB_MASK | \
1149 + IEEE80211_OFDM_RATE_24MB_MASK)
1150 +#define IEEE80211_OFDM_DEFAULT_RATES_MASK (IEEE80211_OFDM_BASIC_RATES_MASK | \
1151 + IEEE80211_OFDM_RATE_9MB_MASK | \
1152 + IEEE80211_OFDM_RATE_18MB_MASK | \
1153 + IEEE80211_OFDM_RATE_36MB_MASK | \
1154 + IEEE80211_OFDM_RATE_48MB_MASK | \
1155 + IEEE80211_OFDM_RATE_54MB_MASK)
1156 +#define IEEE80211_DEFAULT_RATES_MASK (IEEE80211_OFDM_DEFAULT_RATES_MASK | \
1157 + IEEE80211_CCK_DEFAULT_RATES_MASK)
1158 +
1159 +#define IEEE80211_NUM_OFDM_RATES 8
1160 +#define IEEE80211_NUM_CCK_RATES 4
1161 +#define IEEE80211_OFDM_SHIFT_MASK_A 4
1162 +
1163 +
1164 +/* this is stolen and modified from the madwifi driver*/
1165 +#define IEEE80211_FC0_TYPE_MASK 0x0c
1166 +#define IEEE80211_FC0_TYPE_DATA 0x08
1167 +#define IEEE80211_FC0_SUBTYPE_MASK 0xB0
1168 +#define IEEE80211_FC0_SUBTYPE_QOS 0x80
1169 +
1170 +#define IEEE80211_QOS_HAS_SEQ(fc) \
1171 + (((fc) & (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == \
1172 + (IEEE80211_FC0_TYPE_DATA | IEEE80211_FC0_SUBTYPE_QOS))
1173 +
1174 +/* this is stolen from ipw2200 driver */
1175 +#define IEEE_IBSS_MAC_HASH_SIZE 31
1176 +struct ieee_ibss_seq {
1177 + u8 mac[ETH_ALEN];
1178 + u16 seq_num[17];
1179 + u16 frag_num[17];
1180 + unsigned long packet_time[17];
1181 + struct list_head list;
1182 +};
1183 +
1184 +/* NOTE: This data is for statistical purposes; not all hardware provides this
1185 + * information for frames received. Not setting these will not cause
1186 + * any adverse affects. */
1187 +struct ieee80211_rx_stats {
1188 +#if 1
1189 + u32 mac_time[2];
1190 + s8 rssi;
1191 + u8 signal;
1192 + u8 noise;
1193 + u16 rate; /* in 100 kbps */
1194 + u8 received_channel;
1195 + u8 control;
1196 + u8 mask;
1197 + u8 freq;
1198 + u16 len;
1199 + u64 tsf;
1200 + u32 beacon_time;
1201 + u8 nic_type;
1202 + u16 Length;
1203 + // u8 DataRate; // In 0.5 Mbps
1204 + u8 SignalQuality; // in 0-100 index.
1205 + s32 RecvSignalPower; // Real power in dBm for this packet, no beautification and aggregation.
1206 + s8 RxPower; // in dBm Translate from PWdB
1207 + u8 SignalStrength; // in 0-100 index.
1208 + u16 bHwError:1;
1209 + u16 bCRC:1;
1210 + u16 bICV:1;
1211 + u16 bShortPreamble:1;
1212 + u16 Antenna:1; //for rtl8185
1213 + u16 Decrypted:1; //for rtl8185, rtl8187
1214 + u16 Wakeup:1; //for rtl8185
1215 + u16 Reserved0:1; //for rtl8185
1216 + u8 AGC;
1217 + u32 TimeStampLow;
1218 + u32 TimeStampHigh;
1219 + bool bShift;
1220 + bool bIsQosData; // Added by Annie, 2005-12-22.
1221 + u8 UserPriority;
1222 +
1223 + //1!!!!!!!!!!!!!!!!!!!!!!!!!!!
1224 + //1Attention Please!!!<11n or 8190 specific code should be put below this line>
1225 + //1!!!!!!!!!!!!!!!!!!!!!!!!!!!
1226 +
1227 + u8 RxDrvInfoSize;
1228 + u8 RxBufShift;
1229 + bool bIsAMPDU;
1230 + bool bFirstMPDU;
1231 + bool bContainHTC;
1232 + bool RxIs40MHzPacket;
1233 + u32 RxPWDBAll;
1234 + u8 RxMIMOSignalStrength[4]; // in 0~100 index
1235 + s8 RxMIMOSignalQuality[2];
1236 + bool bPacketMatchBSSID;
1237 + bool bIsCCK;
1238 + bool bPacketToSelf;
1239 + //added by amy
1240 + u8* virtual_address;
1241 + u16 packetlength; // Total packet length: Must equal to sum of all FragLength
1242 + u16 fraglength; // FragLength should equal to PacketLength in non-fragment case
1243 + u16 fragoffset; // Data offset for this fragment
1244 + u16 ntotalfrag;
1245 + bool bisrxaggrsubframe;
1246 + bool bPacketBeacon; //cosa add for rssi
1247 + bool bToSelfBA; //cosa add for rssi
1248 + char cck_adc_pwdb[4]; //cosa add for rx path selection
1249 + u16 Seq_Num;
1250 +#endif
1251 +
1252 +};
1253 +
1254 +/* IEEE 802.11 requires that STA supports concurrent reception of at least
1255 + * three fragmented frames. This define can be increased to support more
1256 + * concurrent frames, but it should be noted that each entry can consume about
1257 + * 2 kB of RAM and increasing cache size will slow down frame reassembly. */
1258 +#define IEEE80211_FRAG_CACHE_LEN 4
1259 +
1260 +struct ieee80211_frag_entry {
1261 + unsigned long first_frag_time;
1262 + unsigned int seq;
1263 + unsigned int last_frag;
1264 + struct sk_buff *skb;
1265 + u8 src_addr[ETH_ALEN];
1266 + u8 dst_addr[ETH_ALEN];
1267 +};
1268 +
1269 +struct ieee80211_stats {
1270 + unsigned int tx_unicast_frames;
1271 + unsigned int tx_multicast_frames;
1272 + unsigned int tx_fragments;
1273 + unsigned int tx_unicast_octets;
1274 + unsigned int tx_multicast_octets;
1275 + unsigned int tx_deferred_transmissions;
1276 + unsigned int tx_single_retry_frames;
1277 + unsigned int tx_multiple_retry_frames;
1278 + unsigned int tx_retry_limit_exceeded;
1279 + unsigned int tx_discards;
1280 + unsigned int rx_unicast_frames;
1281 + unsigned int rx_multicast_frames;
1282 + unsigned int rx_fragments;
1283 + unsigned int rx_unicast_octets;
1284 + unsigned int rx_multicast_octets;
1285 + unsigned int rx_fcs_errors;
1286 + unsigned int rx_discards_no_buffer;
1287 + unsigned int tx_discards_wrong_sa;
1288 + unsigned int rx_discards_undecryptable;
1289 + unsigned int rx_message_in_msg_fragments;
1290 + unsigned int rx_message_in_bad_msg_fragments;
1291 +};
1292 +
1293 +struct ieee80211_device;
1294 +
1295 +#include "ieee80211_crypt.h"
1296 +
1297 +#define SEC_KEY_1 (1<<0)
1298 +#define SEC_KEY_2 (1<<1)
1299 +#define SEC_KEY_3 (1<<2)
1300 +#define SEC_KEY_4 (1<<3)
1301 +#define SEC_ACTIVE_KEY (1<<4)
1302 +#define SEC_AUTH_MODE (1<<5)
1303 +#define SEC_UNICAST_GROUP (1<<6)
1304 +#define SEC_LEVEL (1<<7)
1305 +#define SEC_ENABLED (1<<8)
1306 +#define SEC_ENCRYPT (1<<9)
1307 +
1308 +#define SEC_LEVEL_0 0 /* None */
1309 +#define SEC_LEVEL_1 1 /* WEP 40 and 104 bit */
1310 +#define SEC_LEVEL_2 2 /* Level 1 + TKIP */
1311 +#define SEC_LEVEL_2_CKIP 3 /* Level 1 + CKIP */
1312 +#define SEC_LEVEL_3 4 /* Level 2 + CCMP */
1313 +
1314 +#define SEC_ALG_NONE 0
1315 +#define SEC_ALG_WEP 1
1316 +#define SEC_ALG_TKIP 2
1317 +#define SEC_ALG_CCMP 3
1318 +
1319 +#define WEP_KEYS 4
1320 +#define WEP_KEY_LEN 13
1321 +#define SCM_KEY_LEN 32
1322 +#define SCM_TEMPORAL_KEY_LENGTH 16
1323 +
1324 +struct ieee80211_security {
1325 + u16 active_key:2,
1326 + enabled:1,
1327 + auth_mode:2,
1328 + auth_algo:4,
1329 + unicast_uses_group:1,
1330 + encrypt:1;
1331 + u8 key_sizes[WEP_KEYS];
1332 + u8 keys[WEP_KEYS][SCM_KEY_LEN];
1333 + u8 level;
1334 + u16 flags;
1335 +} __attribute__ ((packed));
1336 +
1337 +
1338 +/*
1339 + 802.11 data frame from AP
1340 + ,-------------------------------------------------------------------.
1341 +Bytes | 2 | 2 | 6 | 6 | 6 | 2 | 0..2312 | 4 |
1342 + |------|------|---------|---------|---------|------|---------|------|
1343 +Desc. | ctrl | dura | DA/RA | TA | SA | Sequ | frame | fcs |
1344 + | | tion | (BSSID) | | | ence | data | |
1345 + `-------------------------------------------------------------------'
1346 +Total: 28-2340 bytes
1347 +*/
1348 +
1349 +/* Management Frame Information Element Types */
1350 +enum ieee80211_mfie {
1351 + MFIE_TYPE_SSID = 0,
1352 + MFIE_TYPE_RATES = 1,
1353 + MFIE_TYPE_FH_SET = 2,
1354 + MFIE_TYPE_DS_SET = 3,
1355 + MFIE_TYPE_CF_SET = 4,
1356 + MFIE_TYPE_TIM = 5,
1357 + MFIE_TYPE_IBSS_SET = 6,
1358 + MFIE_TYPE_COUNTRY = 7,
1359 + MFIE_TYPE_HOP_PARAMS = 8,
1360 + MFIE_TYPE_HOP_TABLE = 9,
1361 + MFIE_TYPE_REQUEST = 10,
1362 + MFIE_TYPE_CHALLENGE = 16,
1363 + MFIE_TYPE_POWER_CONSTRAINT = 32,
1364 + MFIE_TYPE_POWER_CAPABILITY = 33,
1365 + MFIE_TYPE_TPC_REQUEST = 34,
1366 + MFIE_TYPE_TPC_REPORT = 35,
1367 + MFIE_TYPE_SUPP_CHANNELS = 36,
1368 + MFIE_TYPE_CSA = 37,
1369 + MFIE_TYPE_MEASURE_REQUEST = 38,
1370 + MFIE_TYPE_MEASURE_REPORT = 39,
1371 + MFIE_TYPE_QUIET = 40,
1372 + MFIE_TYPE_IBSS_DFS = 41,
1373 + MFIE_TYPE_ERP = 42,
1374 + MFIE_TYPE_RSN = 48,
1375 + MFIE_TYPE_RATES_EX = 50,
1376 + MFIE_TYPE_HT_CAP= 45,
1377 + MFIE_TYPE_HT_INFO= 61,
1378 + MFIE_TYPE_AIRONET=133,
1379 + MFIE_TYPE_GENERIC = 221,
1380 + MFIE_TYPE_QOS_PARAMETER = 222,
1381 +};
1382 +
1383 +/* Minimal header; can be used for passing 802.11 frames with sufficient
1384 + * information to determine what type of underlying data type is actually
1385 + * stored in the data. */
1386 +struct ieee80211_hdr {
1387 + __le16 frame_ctl;
1388 + __le16 duration_id;
1389 + u8 payload[0];
1390 +} __attribute__ ((packed));
1391 +
1392 +struct ieee80211_hdr_1addr {
1393 + __le16 frame_ctl;
1394 + __le16 duration_id;
1395 + u8 addr1[ETH_ALEN];
1396 + u8 payload[0];
1397 +} __attribute__ ((packed));
1398 +
1399 +struct ieee80211_hdr_2addr {
1400 + __le16 frame_ctl;
1401 + __le16 duration_id;
1402 + u8 addr1[ETH_ALEN];
1403 + u8 addr2[ETH_ALEN];
1404 + u8 payload[0];
1405 +} __attribute__ ((packed));
1406 +
1407 +struct ieee80211_hdr_3addr {
1408 + __le16 frame_ctl;
1409 + __le16 duration_id;
1410 + u8 addr1[ETH_ALEN];
1411 + u8 addr2[ETH_ALEN];
1412 + u8 addr3[ETH_ALEN];
1413 + __le16 seq_ctl;
1414 + u8 payload[0];
1415 +} __attribute__ ((packed));
1416 +
1417 +struct ieee80211_hdr_4addr {
1418 + __le16 frame_ctl;
1419 + __le16 duration_id;
1420 + u8 addr1[ETH_ALEN];
1421 + u8 addr2[ETH_ALEN];
1422 + u8 addr3[ETH_ALEN];
1423 + __le16 seq_ctl;
1424 + u8 addr4[ETH_ALEN];
1425 + u8 payload[0];
1426 +} __attribute__ ((packed));
1427 +
1428 +struct ieee80211_hdr_3addrqos {
1429 + __le16 frame_ctl;
1430 + __le16 duration_id;
1431 + u8 addr1[ETH_ALEN];
1432 + u8 addr2[ETH_ALEN];
1433 + u8 addr3[ETH_ALEN];
1434 + __le16 seq_ctl;
1435 + u8 payload[0];
1436 + __le16 qos_ctl;
1437 +} __attribute__ ((packed));
1438 +
1439 +struct ieee80211_hdr_4addrqos {
1440 + __le16 frame_ctl;
1441 + __le16 duration_id;
1442 + u8 addr1[ETH_ALEN];
1443 + u8 addr2[ETH_ALEN];
1444 + u8 addr3[ETH_ALEN];
1445 + __le16 seq_ctl;
1446 + u8 addr4[ETH_ALEN];
1447 + u8 payload[0];
1448 + __le16 qos_ctl;
1449 +} __attribute__ ((packed));
1450 +
1451 +struct ieee80211_info_element {
1452 + u8 id;
1453 + u8 len;
1454 + u8 data[0];
1455 +} __attribute__ ((packed));
1456 +
1457 +struct ieee80211_authentication {
1458 + struct ieee80211_hdr_3addr header;
1459 + __le16 algorithm;
1460 + __le16 transaction;
1461 + __le16 status;
1462 + /*challenge*/
1463 + struct ieee80211_info_element info_element[0];
1464 +} __attribute__ ((packed));
1465 +
1466 +struct ieee80211_disassoc {
1467 + struct ieee80211_hdr_3addr header;
1468 + __le16 reason;
1469 +} __attribute__ ((packed));
1470 +
1471 +struct ieee80211_probe_request {
1472 + struct ieee80211_hdr_3addr header;
1473 + /* SSID, supported rates */
1474 + struct ieee80211_info_element info_element[0];
1475 +} __attribute__ ((packed));
1476 +
1477 +struct ieee80211_probe_response {
1478 + struct ieee80211_hdr_3addr header;
1479 + u32 time_stamp[2];
1480 + __le16 beacon_interval;
1481 + __le16 capability;
1482 + /* SSID, supported rates, FH params, DS params,
1483 + * CF params, IBSS params, TIM (if beacon), RSN */
1484 + struct ieee80211_info_element info_element[0];
1485 +} __attribute__ ((packed));
1486 +
1487 +/* Alias beacon for probe_response */
1488 +#define ieee80211_beacon ieee80211_probe_response
1489 +
1490 +struct ieee80211_assoc_request_frame {
1491 + struct ieee80211_hdr_3addr header;
1492 + __le16 capability;
1493 + __le16 listen_interval;
1494 + /* SSID, supported rates, RSN */
1495 + struct ieee80211_info_element info_element[0];
1496 +} __attribute__ ((packed));
1497 +
1498 +struct ieee80211_reassoc_request_frame {
1499 + struct ieee80211_hdr_3addr header;
1500 + __le16 capability;
1501 + __le16 listen_interval;
1502 + u8 current_ap[ETH_ALEN];
1503 + /* SSID, supported rates, RSN */
1504 + struct ieee80211_info_element info_element[0];
1505 +} __attribute__ ((packed));
1506 +
1507 +struct ieee80211_assoc_response_frame {
1508 + struct ieee80211_hdr_3addr header;
1509 + __le16 capability;
1510 + __le16 status;
1511 + __le16 aid;
1512 + struct ieee80211_info_element info_element[0]; /* supported rates */
1513 +} __attribute__ ((packed));
1514 +
1515 +struct ieee80211_txb {
1516 + u8 nr_frags;
1517 + u8 encrypted;
1518 + u8 queue_index;
1519 + u8 rts_included;
1520 + u16 reserved;
1521 + __le16 frag_size;
1522 + __le16 payload_size;
1523 + struct sk_buff *fragments[0];
1524 +};
1525 +
1526 +#define MAX_TX_AGG_COUNT 16
1527 +struct ieee80211_drv_agg_txb {
1528 + u8 nr_drv_agg_frames;
1529 + struct sk_buff *tx_agg_frames[MAX_TX_AGG_COUNT];
1530 +}__attribute__((packed));
1531 +
1532 +#define MAX_SUBFRAME_COUNT 64
1533 +struct ieee80211_rxb {
1534 + u8 nr_subframes;
1535 + struct sk_buff *subframes[MAX_SUBFRAME_COUNT];
1536 + u8 dst[ETH_ALEN];
1537 + u8 src[ETH_ALEN];
1538 +}__attribute__((packed));
1539 +
1540 +typedef union _frameqos {
1541 + u16 shortdata;
1542 + u8 chardata[2];
1543 + struct {
1544 + u16 tid:4;
1545 + u16 eosp:1;
1546 + u16 ack_policy:2;
1547 + u16 reserved:1;
1548 + u16 txop:8;
1549 + }field;
1550 +}frameqos,*pframeqos;
1551 +
1552 +/* SWEEP TABLE ENTRIES NUMBER*/
1553 +#define MAX_SWEEP_TAB_ENTRIES 42
1554 +#define MAX_SWEEP_TAB_ENTRIES_PER_PACKET 7
1555 +/* MAX_RATES_LENGTH needs to be 12. The spec says 8, and many APs
1556 + * only use 8, and then use extended rates for the remaining supported
1557 + * rates. Other APs, however, stick all of their supported rates on the
1558 + * main rates information element... */
1559 +#define MAX_RATES_LENGTH ((u8)12)
1560 +#define MAX_RATES_EX_LENGTH ((u8)16)
1561 +#define MAX_NETWORK_COUNT 128
1562 +
1563 +#define MAX_CHANNEL_NUMBER 161
1564 +#define IEEE80211_SOFTMAC_SCAN_TIME 100
1565 +//(HZ / 2)
1566 +#define IEEE80211_SOFTMAC_ASSOC_RETRY_TIME (HZ * 2)
1567 +
1568 +#define CRC_LENGTH 4U
1569 +
1570 +#define MAX_WPA_IE_LEN 64
1571 +
1572 +#define NETWORK_EMPTY_ESSID (1<<0)
1573 +#define NETWORK_HAS_OFDM (1<<1)
1574 +#define NETWORK_HAS_CCK (1<<2)
1575 +
1576 +/* QoS structure */
1577 +#define NETWORK_HAS_QOS_PARAMETERS (1<<3)
1578 +#define NETWORK_HAS_QOS_INFORMATION (1<<4)
1579 +#define NETWORK_HAS_QOS_MASK (NETWORK_HAS_QOS_PARAMETERS | \
1580 + NETWORK_HAS_QOS_INFORMATION)
1581 +/* 802.11h */
1582 +#define NETWORK_HAS_POWER_CONSTRAINT (1<<5)
1583 +#define NETWORK_HAS_CSA (1<<6)
1584 +#define NETWORK_HAS_QUIET (1<<7)
1585 +#define NETWORK_HAS_IBSS_DFS (1<<8)
1586 +#define NETWORK_HAS_TPC_REPORT (1<<9)
1587 +
1588 +#define NETWORK_HAS_ERP_VALUE (1<<10)
1589 +
1590 +#define QOS_QUEUE_NUM 4
1591 +#define QOS_OUI_LEN 3
1592 +#define QOS_OUI_TYPE 2
1593 +#define QOS_ELEMENT_ID 221
1594 +#define QOS_OUI_INFO_SUB_TYPE 0
1595 +#define QOS_OUI_PARAM_SUB_TYPE 1
1596 +#define QOS_VERSION_1 1
1597 +#define QOS_AIFSN_MIN_VALUE 2
1598 +#if 1
1599 +struct ieee80211_qos_information_element {
1600 + u8 elementID;
1601 + u8 length;
1602 + u8 qui[QOS_OUI_LEN];
1603 + u8 qui_type;
1604 + u8 qui_subtype;
1605 + u8 version;
1606 + u8 ac_info;
1607 +} __attribute__ ((packed));
1608 +
1609 +struct ieee80211_qos_ac_parameter {
1610 + u8 aci_aifsn;
1611 + u8 ecw_min_max;
1612 + __le16 tx_op_limit;
1613 +} __attribute__ ((packed));
1614 +
1615 +struct ieee80211_qos_parameter_info {
1616 + struct ieee80211_qos_information_element info_element;
1617 + u8 reserved;
1618 + struct ieee80211_qos_ac_parameter ac_params_record[QOS_QUEUE_NUM];
1619 +} __attribute__ ((packed));
1620 +
1621 +struct ieee80211_qos_parameters {
1622 + __le16 cw_min[QOS_QUEUE_NUM];
1623 + __le16 cw_max[QOS_QUEUE_NUM];
1624 + u8 aifs[QOS_QUEUE_NUM];
1625 + u8 flag[QOS_QUEUE_NUM];
1626 + __le16 tx_op_limit[QOS_QUEUE_NUM];
1627 +} __attribute__ ((packed));
1628 +
1629 +struct ieee80211_qos_data {
1630 + struct ieee80211_qos_parameters parameters;
1631 + int active;
1632 + int supported;
1633 + u8 param_count;
1634 + u8 old_param_count;
1635 +};
1636 +
1637 +struct ieee80211_tim_parameters {
1638 + u8 tim_count;
1639 + u8 tim_period;
1640 +} __attribute__ ((packed));
1641 +
1642 +//#else
1643 +struct ieee80211_wmm_ac_param {
1644 + u8 ac_aci_acm_aifsn;
1645 + u8 ac_ecwmin_ecwmax;
1646 + u16 ac_txop_limit;
1647 +};
1648 +
1649 +struct ieee80211_wmm_ts_info {
1650 + u8 ac_dir_tid;
1651 + u8 ac_up_psb;
1652 + u8 reserved;
1653 +} __attribute__ ((packed));
1654 +
1655 +struct ieee80211_wmm_tspec_elem {
1656 + struct ieee80211_wmm_ts_info ts_info;
1657 + u16 norm_msdu_size;
1658 + u16 max_msdu_size;
1659 + u32 min_serv_inter;
1660 + u32 max_serv_inter;
1661 + u32 inact_inter;
1662 + u32 suspen_inter;
1663 + u32 serv_start_time;
1664 + u32 min_data_rate;
1665 + u32 mean_data_rate;
1666 + u32 peak_data_rate;
1667 + u32 max_burst_size;
1668 + u32 delay_bound;
1669 + u32 min_phy_rate;
1670 + u16 surp_band_allow;
1671 + u16 medium_time;
1672 +}__attribute__((packed));
1673 +#endif
1674 +enum eap_type {
1675 + EAP_PACKET = 0,
1676 + EAPOL_START,
1677 + EAPOL_LOGOFF,
1678 + EAPOL_KEY,
1679 + EAPOL_ENCAP_ASF_ALERT
1680 +};
1681 +
1682 +static const char *eap_types[] = {
1683 + [EAP_PACKET] = "EAP-Packet",
1684 + [EAPOL_START] = "EAPOL-Start",
1685 + [EAPOL_LOGOFF] = "EAPOL-Logoff",
1686 + [EAPOL_KEY] = "EAPOL-Key",
1687 + [EAPOL_ENCAP_ASF_ALERT] = "EAPOL-Encap-ASF-Alert"
1688 +};
1689 +
1690 +static inline const char *eap_get_type(int type)
1691 +{
1692 + return ((u32)type >= ARRAY_SIZE(eap_types)) ? "Unknown" : eap_types[type];
1693 +}
1694 +//added by amy for reorder
1695 +static inline u8 Frame_QoSTID(u8* buf)
1696 +{
1697 + struct ieee80211_hdr_3addr *hdr;
1698 + u16 fc;
1699 + hdr = (struct ieee80211_hdr_3addr *)buf;
1700 + fc = le16_to_cpu(hdr->frame_ctl);
1701 + return (u8)((frameqos*)(buf + (((fc & IEEE80211_FCTL_TODS)&&(fc & IEEE80211_FCTL_FROMDS))? 30 : 24)))->field.tid;
1702 +}
1703 +
1704 +//added by amy for reorder
1705 +
1706 +struct eapol {
1707 + u8 snap[6];
1708 + u16 ethertype;
1709 + u8 version;
1710 + u8 type;
1711 + u16 length;
1712 +} __attribute__ ((packed));
1713 +
1714 +struct ieee80211_softmac_stats{
1715 + unsigned int rx_ass_ok;
1716 + unsigned int rx_ass_err;
1717 + unsigned int rx_probe_rq;
1718 + unsigned int tx_probe_rs;
1719 + unsigned int tx_beacons;
1720 + unsigned int rx_auth_rq;
1721 + unsigned int rx_auth_rs_ok;
1722 + unsigned int rx_auth_rs_err;
1723 + unsigned int tx_auth_rq;
1724 + unsigned int no_auth_rs;
1725 + unsigned int no_ass_rs;
1726 + unsigned int tx_ass_rq;
1727 + unsigned int rx_ass_rq;
1728 + unsigned int tx_probe_rq;
1729 + unsigned int reassoc;
1730 + unsigned int swtxstop;
1731 + unsigned int swtxawake;
1732 + unsigned char CurrentShowTxate;
1733 + unsigned char last_packet_rate;
1734 + unsigned int txretrycount;
1735 +};
1736 +
1737 +#define BEACON_PROBE_SSID_ID_POSITION 12
1738 +
1739 +struct ieee80211_info_element_hdr {
1740 + u8 id;
1741 + u8 len;
1742 +} __attribute__ ((packed));
1743 +
1744 +/*
1745 + * These are the data types that can make up management packets
1746 + *
1747 + u16 auth_algorithm;
1748 + u16 auth_sequence;
1749 + u16 beacon_interval;
1750 + u16 capability;
1751 + u8 current_ap[ETH_ALEN];
1752 + u16 listen_interval;
1753 + struct {
1754 + u16 association_id:14, reserved:2;
1755 + } __attribute__ ((packed));
1756 + u32 time_stamp[2];
1757 + u16 reason;
1758 + u16 status;
1759 +*/
1760 +
1761 +#define IEEE80211_DEFAULT_TX_ESSID "Penguin"
1762 +#define IEEE80211_DEFAULT_BASIC_RATE 2 //1Mbps
1763 +
1764 +enum {WMM_all_frame, WMM_two_frame, WMM_four_frame, WMM_six_frame};
1765 +#define MAX_SP_Len (WMM_all_frame << 4)
1766 +#define IEEE80211_QOS_TID 0x0f
1767 +#define QOS_CTL_NOTCONTAIN_ACK (0x01 << 5)
1768 +
1769 +#define IEEE80211_DTIM_MBCAST 4
1770 +#define IEEE80211_DTIM_UCAST 2
1771 +#define IEEE80211_DTIM_VALID 1
1772 +#define IEEE80211_DTIM_INVALID 0
1773 +
1774 +#define IEEE80211_PS_DISABLED 0
1775 +#define IEEE80211_PS_UNICAST IEEE80211_DTIM_UCAST
1776 +#define IEEE80211_PS_MBCAST IEEE80211_DTIM_MBCAST
1777 +
1778 +//added by David for QoS 2006/6/30
1779 +//#define WMM_Hang_8187
1780 +#ifdef WMM_Hang_8187
1781 +#undef WMM_Hang_8187
1782 +#endif
1783 +
1784 +#define WME_AC_BK 0x00
1785 +#define WME_AC_BE 0x01
1786 +#define WME_AC_VI 0x02
1787 +#define WME_AC_VO 0x03
1788 +#define WME_ACI_MASK 0x03
1789 +#define WME_AIFSN_MASK 0x03
1790 +#define WME_AC_PRAM_LEN 16
1791 +
1792 +#define MAX_RECEIVE_BUFFER_SIZE 9100
1793 +
1794 +//UP Mapping to AC, using in MgntQuery_SequenceNumber() and maybe for DSCP
1795 +//#define UP2AC(up) ((up<3) ? ((up==0)?1:0) : (up>>1))
1796 +#if 1
1797 +#define UP2AC(up) ( \
1798 + ((up) < 1) ? WME_AC_BE : \
1799 + ((up) < 3) ? WME_AC_BK : \
1800 + ((up) < 4) ? WME_AC_BE : \
1801 + ((up) < 6) ? WME_AC_VI : \
1802 + WME_AC_VO)
1803 +#endif
1804 +//AC Mapping to UP, using in Tx part for selecting the corresponding TX queue
1805 +#define AC2UP(_ac) ( \
1806 + ((_ac) == WME_AC_VO) ? 6 : \
1807 + ((_ac) == WME_AC_VI) ? 5 : \
1808 + ((_ac) == WME_AC_BK) ? 1 : \
1809 + 0)
1810 +
1811 +#define ETHER_ADDR_LEN 6 /* length of an Ethernet address */
1812 +#define ETHERNET_HEADER_SIZE 14 /* length of two Ethernet address plus ether type*/
1813 +
1814 +struct ether_header {
1815 + u8 ether_dhost[ETHER_ADDR_LEN];
1816 + u8 ether_shost[ETHER_ADDR_LEN];
1817 + u16 ether_type;
1818 +} __attribute__((packed));
1819 +
1820 +#ifndef ETHERTYPE_PAE
1821 +#define ETHERTYPE_PAE 0x888e /* EAPOL PAE/802.1x */
1822 +#endif
1823 +#ifndef ETHERTYPE_IP
1824 +#define ETHERTYPE_IP 0x0800 /* IP protocol */
1825 +#endif
1826 +
1827 +typedef struct _bss_ht{
1828 +
1829 + bool support_ht;
1830 +
1831 + // HT related elements
1832 + u8 ht_cap_buf[32];
1833 + u16 ht_cap_len;
1834 + u8 ht_info_buf[32];
1835 + u16 ht_info_len;
1836 +
1837 + HT_SPEC_VER ht_spec_ver;
1838 + //HT_CAPABILITY_ELE bdHTCapEle;
1839 + //HT_INFORMATION_ELE bdHTInfoEle;
1840 +
1841 + bool aggregation;
1842 + bool long_slot_time;
1843 +}bss_ht, *pbss_ht;
1844 +
1845 +typedef enum _erp_t{
1846 + ERP_NonERPpresent = 0x01,
1847 + ERP_UseProtection = 0x02,
1848 + ERP_BarkerPreambleMode = 0x04,
1849 +} erp_t;
1850 +
1851 +
1852 +struct ieee80211_network {
1853 + /* These entries are used to identify a unique network */
1854 + u8 bssid[ETH_ALEN];
1855 + u8 channel;
1856 + /* Ensure null-terminated for any debug msgs */
1857 + u8 ssid[IW_ESSID_MAX_SIZE + 1];
1858 + u8 ssid_len;
1859 +#if 1
1860 + struct ieee80211_qos_data qos_data;
1861 +#else
1862 + // Qos related. Added by Annie, 2005-11-01.
1863 + BSS_QOS BssQos;
1864 +#endif
1865 +
1866 + //added by amy for LEAP
1867 + bool bWithAironetIE;
1868 + bool bCkipSupported;
1869 + bool bCcxRmEnable;
1870 + u16 CcxRmState[2];
1871 + // CCXv4 S59, MBSSID.
1872 + bool bMBssidValid;
1873 + u8 MBssidMask;
1874 + u8 MBssid[6];
1875 + // CCX 2 S38, WLAN Device Version Number element. Annie, 2006-08-20.
1876 + bool bWithCcxVerNum;
1877 + u8 BssCcxVerNumber;
1878 + /* These are network statistics */
1879 + struct ieee80211_rx_stats stats;
1880 + u16 capability;
1881 + u8 rates[MAX_RATES_LENGTH];
1882 + u8 rates_len;
1883 + u8 rates_ex[MAX_RATES_EX_LENGTH];
1884 + u8 rates_ex_len;
1885 + unsigned long last_scanned;
1886 + u8 mode;
1887 + u32 flags;
1888 + u32 last_associate;
1889 + u32 time_stamp[2];
1890 + u16 beacon_interval;
1891 + u16 listen_interval;
1892 + u16 atim_window;
1893 + u8 erp_value;
1894 + u8 wpa_ie[MAX_WPA_IE_LEN];
1895 + size_t wpa_ie_len;
1896 + u8 rsn_ie[MAX_WPA_IE_LEN];
1897 + size_t rsn_ie_len;
1898 +
1899 + struct ieee80211_tim_parameters tim;
1900 + u8 dtim_period;
1901 + u8 dtim_data;
1902 + u32 last_dtim_sta_time[2];
1903 +
1904 + //appeded for QoS
1905 + u8 wmm_info;
1906 + struct ieee80211_wmm_ac_param wmm_param[4];
1907 + u8 QoS_Enable;
1908 +#ifdef THOMAS_TURBO
1909 + u8 Turbo_Enable;//enable turbo mode, added by thomas
1910 +#endif
1911 +#ifdef ENABLE_DOT11D
1912 + u16 CountryIeLen;
1913 + u8 CountryIeBuf[MAX_IE_LEN];
1914 +#endif
1915 + // HT Related, by amy, 2008.04.29
1916 + BSS_HT bssht;
1917 + // Add to handle broadcom AP management frame CCK rate.
1918 + bool broadcom_cap_exist;
1919 + bool ralink_cap_exist;
1920 + bool atheros_cap_exist;
1921 + bool cisco_cap_exist;
1922 + bool unknown_cap_exist;
1923 +// u8 berp_info;
1924 + bool berp_info_valid;
1925 + bool buseprotection;
1926 + //put at the end of the structure.
1927 + struct list_head list;
1928 +};
1929 +
1930 +#if 1
1931 +enum ieee80211_state {
1932 +
1933 + /* the card is not linked at all */
1934 + IEEE80211_NOLINK = 0,
1935 +
1936 + /* IEEE80211_ASSOCIATING* are for BSS client mode
1937 + * the driver shall not perform RX filtering unless
1938 + * the state is LINKED.
1939 + * The driver shall just check for the state LINKED and
1940 + * defaults to NOLINK for ALL the other states (including
1941 + * LINKED_SCANNING)
1942 + */
1943 +
1944 + /* the association procedure will start (wq scheduling)*/
1945 + IEEE80211_ASSOCIATING,
1946 + IEEE80211_ASSOCIATING_RETRY,
1947 +
1948 + /* the association procedure is sending AUTH request*/
1949 + IEEE80211_ASSOCIATING_AUTHENTICATING,
1950 +
1951 + /* the association procedure has successfully authentcated
1952 + * and is sending association request
1953 + */
1954 + IEEE80211_ASSOCIATING_AUTHENTICATED,
1955 +
1956 + /* the link is ok. the card associated to a BSS or linked
1957 + * to a ibss cell or acting as an AP and creating the bss
1958 + */
1959 + IEEE80211_LINKED,
1960 +
1961 + /* same as LINKED, but the driver shall apply RX filter
1962 + * rules as we are in NO_LINK mode. As the card is still
1963 + * logically linked, but it is doing a syncro site survey
1964 + * then it will be back to LINKED state.
1965 + */
1966 + IEEE80211_LINKED_SCANNING,
1967 +
1968 +};
1969 +#else
1970 +enum ieee80211_state {
1971 + IEEE80211_UNINITIALIZED = 0,
1972 + IEEE80211_INITIALIZED,
1973 + IEEE80211_ASSOCIATING,
1974 + IEEE80211_ASSOCIATED,
1975 + IEEE80211_AUTHENTICATING,
1976 + IEEE80211_AUTHENTICATED,
1977 + IEEE80211_SHUTDOWN
1978 +};
1979 +#endif
1980 +
1981 +#define DEFAULT_MAX_SCAN_AGE (15 * HZ)
1982 +#define DEFAULT_FTS 2346
1983 +
1984 +#define CFG_IEEE80211_RESERVE_FCS (1<<0)
1985 +#define CFG_IEEE80211_COMPUTE_FCS (1<<1)
1986 +#define CFG_IEEE80211_RTS (1<<2)
1987 +
1988 +#define IEEE80211_24GHZ_MIN_CHANNEL 1
1989 +#define IEEE80211_24GHZ_MAX_CHANNEL 14
1990 +#define IEEE80211_24GHZ_CHANNELS (IEEE80211_24GHZ_MAX_CHANNEL - \
1991 + IEEE80211_24GHZ_MIN_CHANNEL + 1)
1992 +
1993 +#define IEEE80211_52GHZ_MIN_CHANNEL 34
1994 +#define IEEE80211_52GHZ_MAX_CHANNEL 165
1995 +#define IEEE80211_52GHZ_CHANNELS (IEEE80211_52GHZ_MAX_CHANNEL - \
1996 + IEEE80211_52GHZ_MIN_CHANNEL + 1)
1997 +
1998 +#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,11))
1999 +extern inline int is_multicast_ether_addr(const u8 *addr)
2000 +{
2001 + return ((addr[0] != 0xff) && (0x01 & addr[0]));
2002 +}
2003 +#endif
2004 +
2005 +#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,13))
2006 +extern inline int is_broadcast_ether_addr(const u8 *addr)
2007 +{
2008 + return ((addr[0] == 0xff) && (addr[1] == 0xff) && (addr[2] == 0xff) && \
2009 + (addr[3] == 0xff) && (addr[4] == 0xff) && (addr[5] == 0xff));
2010 +}
2011 +#endif
2012 +
2013 +typedef struct tx_pending_t{
2014 + int frag;
2015 + struct ieee80211_txb *txb;
2016 +}tx_pending_t;
2017 +
2018 +typedef struct _bandwidth_autoswitch
2019 +{
2020 + long threshold_20Mhzto40Mhz;
2021 + long threshold_40Mhzto20Mhz;
2022 + bool bforced_tx20Mhz;
2023 + bool bautoswitch_enable;
2024 +}bandwidth_autoswitch,*pbandwidth_autoswitch;
2025 +
2026 +
2027 +//added by amy for order
2028 +
2029 +#define REORDER_WIN_SIZE 128
2030 +#define REORDER_ENTRY_NUM 128
2031 +typedef struct _RX_REORDER_ENTRY
2032 +{
2033 + struct list_head List;
2034 + u16 SeqNum;
2035 + struct ieee80211_rxb* prxb;
2036 +} RX_REORDER_ENTRY, *PRX_REORDER_ENTRY;
2037 +//added by amy for order
2038 +typedef enum _Fsync_State{
2039 + Default_Fsync,
2040 + HW_Fsync,
2041 + SW_Fsync
2042 +}Fsync_State;
2043 +
2044 +// Power save mode configured.
2045 +typedef enum _RT_PS_MODE
2046 +{
2047 + eActive, // Active/Continuous access.
2048 + eMaxPs, // Max power save mode.
2049 + eFastPs // Fast power save mode.
2050 +}RT_PS_MODE;
2051 +
2052 +typedef enum _IPS_CALLBACK_FUNCION
2053 +{
2054 + IPS_CALLBACK_NONE = 0,
2055 + IPS_CALLBACK_MGNT_LINK_REQUEST = 1,
2056 + IPS_CALLBACK_JOIN_REQUEST = 2,
2057 +}IPS_CALLBACK_FUNCION;
2058 +
2059 +typedef enum _RT_JOIN_ACTION{
2060 + RT_JOIN_INFRA = 1,
2061 + RT_JOIN_IBSS = 2,
2062 + RT_START_IBSS = 3,
2063 + RT_NO_ACTION = 4,
2064 +}RT_JOIN_ACTION;
2065 +
2066 +typedef struct _IbssParms{
2067 + u16 atimWin;
2068 +}IbssParms, *PIbssParms;
2069 +#define MAX_NUM_RATES 264 // Max num of support rates element: 8, Max num of ext. support rate: 255. 061122, by rcnjko.
2070 +
2071 +// RF state.
2072 +typedef enum _RT_RF_POWER_STATE
2073 +{
2074 + eRfOn,
2075 + eRfSleep,
2076 + eRfOff
2077 +}RT_RF_POWER_STATE;
2078 +
2079 +typedef struct _RT_POWER_SAVE_CONTROL
2080 +{
2081 +
2082 + //
2083 + // Inactive Power Save(IPS) : Disable RF when disconnected
2084 + //
2085 + bool bInactivePs;
2086 + bool bIPSModeBackup;
2087 + bool bSwRfProcessing;
2088 + RT_RF_POWER_STATE eInactivePowerState;
2089 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
2090 + struct work_struct InactivePsWorkItem;
2091 +#else
2092 + struct tq_struct InactivePsWorkItem;
2093 +#endif
2094 + struct timer_list InactivePsTimer;
2095 +
2096 + // Return point for join action
2097 + IPS_CALLBACK_FUNCION ReturnPoint;
2098 +
2099 + // Recored Parameters for rescheduled JoinRequest
2100 + bool bTmpBssDesc;
2101 + RT_JOIN_ACTION tmpJoinAction;
2102 + struct ieee80211_network tmpBssDesc;
2103 +
2104 + // Recored Parameters for rescheduled MgntLinkRequest
2105 + bool bTmpScanOnly;
2106 + bool bTmpActiveScan;
2107 + bool bTmpFilterHiddenAP;
2108 + bool bTmpUpdateParms;
2109 + u8 tmpSsidBuf[33];
2110 + OCTET_STRING tmpSsid2Scan;
2111 + bool bTmpSsid2Scan;
2112 + u8 tmpNetworkType;
2113 + u8 tmpChannelNumber;
2114 + u16 tmpBcnPeriod;
2115 + u8 tmpDtimPeriod;
2116 + u16 tmpmCap;
2117 + OCTET_STRING tmpSuppRateSet;
2118 + u8 tmpSuppRateBuf[MAX_NUM_RATES];
2119 + bool bTmpSuppRate;
2120 + IbssParms tmpIbpm;
2121 + bool bTmpIbpm;
2122 +
2123 + //
2124 + // Leisre Poswer Save : Disable RF if connected but traffic is not busy
2125 + //
2126 + bool bLeisurePs;
2127 +
2128 +}RT_POWER_SAVE_CONTROL,*PRT_POWER_SAVE_CONTROL;
2129 +
2130 +typedef u32 RT_RF_CHANGE_SOURCE;
2131 +#define RF_CHANGE_BY_SW BIT31
2132 +#define RF_CHANGE_BY_HW BIT30
2133 +#define RF_CHANGE_BY_PS BIT29
2134 +#define RF_CHANGE_BY_IPS BIT28
2135 +#define RF_CHANGE_BY_INIT 0 // Do not change the RFOff reason. Defined by Bruce, 2008-01-17.
2136 +
2137 +#ifdef ENABLE_DOT11D
2138 +typedef enum
2139 +{
2140 + COUNTRY_CODE_FCC = 0,
2141 + COUNTRY_CODE_IC = 1,
2142 + COUNTRY_CODE_ETSI = 2,
2143 + COUNTRY_CODE_SPAIN = 3,
2144 + COUNTRY_CODE_FRANCE = 4,
2145 + COUNTRY_CODE_MKK = 5,
2146 + COUNTRY_CODE_MKK1 = 6,
2147 + COUNTRY_CODE_ISRAEL = 7,
2148 + COUNTRY_CODE_TELEC,
2149 + COUNTRY_CODE_MIC,
2150 + COUNTRY_CODE_GLOBAL_DOMAIN
2151 +}country_code_type_t;
2152 +#endif
2153 +
2154 +#define RT_MAX_LD_SLOT_NUM 10
2155 +typedef struct _RT_LINK_DETECT_T{
2156 +
2157 + u32 NumRecvBcnInPeriod;
2158 + u32 NumRecvDataInPeriod;
2159 +
2160 + u32 RxBcnNum[RT_MAX_LD_SLOT_NUM]; // number of Rx beacon / CheckForHang_period to determine link status
2161 + u32 RxDataNum[RT_MAX_LD_SLOT_NUM]; // number of Rx data / CheckForHang_period to determine link status
2162 + u16 SlotNum; // number of CheckForHang period to determine link status
2163 + u16 SlotIndex;
2164 +
2165 + u32 NumTxOkInPeriod;
2166 + u32 NumRxOkInPeriod;
2167 + bool bBusyTraffic;
2168 +}RT_LINK_DETECT_T, *PRT_LINK_DETECT_T;
2169 +
2170 +
2171 +struct ieee80211_device {
2172 + struct net_device *dev;
2173 + struct ieee80211_security sec;
2174 +
2175 + //hw security related
2176 +// u8 hwsec_support; //support?
2177 + u8 hwsec_active; //hw security active.
2178 + bool is_silent_reset;
2179 + bool is_roaming;
2180 + bool ieee_up;
2181 + //added by amy
2182 + bool bSupportRemoteWakeUp;
2183 + RT_PS_MODE dot11PowerSaveMode; // Power save mode configured.
2184 + bool actscanning;
2185 + bool beinretry;
2186 + RT_RF_POWER_STATE eRFPowerState;
2187 + RT_RF_CHANGE_SOURCE RfOffReason;
2188 + bool is_set_key;
2189 + //11n spec related I wonder if These info structure need to be moved out of ieee80211_device
2190 +
2191 + //11n HT below
2192 + PRT_HIGH_THROUGHPUT pHTInfo;
2193 + //struct timer_list SwBwTimer;
2194 +// spinlock_t chnlop_spinlock;
2195 + spinlock_t bw_spinlock;
2196 +
2197 + spinlock_t reorder_spinlock;
2198 + // for HT operation rate set. we use this one for HT data rate to seperate different descriptors
2199 + //the way fill this is the same as in the IE
2200 + u8 Regdot11HTOperationalRateSet[16]; //use RATR format
2201 + u8 dot11HTOperationalRateSet[16]; //use RATR format
2202 + u8 RegHTSuppRateSet[16];
2203 + u8 HTCurrentOperaRate;
2204 + u8 HTHighestOperaRate;
2205 + //wb added for rate operation mode to firmware
2206 + u8 bTxDisableRateFallBack;
2207 + u8 bTxUseDriverAssingedRate;
2208 + atomic_t atm_chnlop;
2209 + atomic_t atm_swbw;
2210 +// u8 HTHighestOperaRate;
2211 +// u8 HTCurrentOperaRate;
2212 +
2213 + // 802.11e and WMM Traffic Stream Info (TX)
2214 + struct list_head Tx_TS_Admit_List;
2215 + struct list_head Tx_TS_Pending_List;
2216 + struct list_head Tx_TS_Unused_List;
2217 + TX_TS_RECORD TxTsRecord[TOTAL_TS_NUM];
2218 + // 802.11e and WMM Traffic Stream Info (RX)
2219 + struct list_head Rx_TS_Admit_List;
2220 + struct list_head Rx_TS_Pending_List;
2221 + struct list_head Rx_TS_Unused_List;
2222 + RX_TS_RECORD RxTsRecord[TOTAL_TS_NUM];
2223 +//#ifdef TO_DO_LIST
2224 + RX_REORDER_ENTRY RxReorderEntry[128];
2225 + struct list_head RxReorder_Unused_List;
2226 +//#endif
2227 + // Qos related. Added by Annie, 2005-11-01.
2228 +// PSTA_QOS pStaQos;
2229 + u8 ForcedPriority; // Force per-packet priority 1~7. (default: 0, not to force it.)
2230 +
2231 +
2232 + /* Bookkeeping structures */
2233 + struct net_device_stats stats;
2234 + struct ieee80211_stats ieee_stats;
2235 + struct ieee80211_softmac_stats softmac_stats;
2236 +
2237 + /* Probe / Beacon management */
2238 + struct list_head network_free_list;
2239 + struct list_head network_list;
2240 + struct ieee80211_network *networks;
2241 + int scans;
2242 + int scan_age;
2243 +
2244 + int iw_mode; /* operating mode (IW_MODE_*) */
2245 + struct iw_spy_data spy_data;
2246 +
2247 + spinlock_t lock;
2248 + spinlock_t wpax_suitlist_lock;
2249 +
2250 + int tx_headroom; /* Set to size of any additional room needed at front
2251 + * of allocated Tx SKBs */
2252 + u32 config;
2253 +
2254 + /* WEP and other encryption related settings at the device level */
2255 + int open_wep; /* Set to 1 to allow unencrypted frames */
2256 + int auth_mode;
2257 + int reset_on_keychange; /* Set to 1 if the HW needs to be reset on
2258 + * WEP key changes */
2259 +
2260 + /* If the host performs {en,de}cryption, then set to 1 */
2261 + int host_encrypt;
2262 + int host_encrypt_msdu;
2263 + int host_decrypt;
2264 + /* host performs multicast decryption */
2265 + int host_mc_decrypt;
2266 +
2267 + /* host should strip IV and ICV from protected frames */
2268 + /* meaningful only when hardware decryption is being used */
2269 + int host_strip_iv_icv;
2270 +
2271 + int host_open_frag;
2272 + int host_build_iv;
2273 + int ieee802_1x; /* is IEEE 802.1X used */
2274 +
2275 + /* WPA data */
2276 + bool bHalfWirelessN24GMode;
2277 + int wpa_enabled;
2278 + int drop_unencrypted;
2279 + int tkip_countermeasures;
2280 + int privacy_invoked;
2281 + size_t wpa_ie_len;
2282 + u8 *wpa_ie;
2283 + u8 ap_mac_addr[6];
2284 + u16 pairwise_key_type;
2285 + u16 group_key_type;
2286 + struct list_head crypt_deinit_list;
2287 + struct ieee80211_crypt_data *crypt[WEP_KEYS];
2288 + int tx_keyidx; /* default TX key index (crypt[tx_keyidx]) */
2289 + struct timer_list crypt_deinit_timer;
2290 + int crypt_quiesced;
2291 +
2292 + int bcrx_sta_key; /* use individual keys to override default keys even
2293 + * with RX of broad/multicast frames */
2294 +
2295 + /* Fragmentation structures */
2296 + // each streaming contain a entry
2297 + struct ieee80211_frag_entry frag_cache[17][IEEE80211_FRAG_CACHE_LEN];
2298 + unsigned int frag_next_idx[17];
2299 + u16 fts; /* Fragmentation Threshold */
2300 +#define DEFAULT_RTS_THRESHOLD 2346U
2301 +#define MIN_RTS_THRESHOLD 1
2302 +#define MAX_RTS_THRESHOLD 2346U
2303 + u16 rts; /* RTS threshold */
2304 +
2305 + /* Association info */
2306 + u8 bssid[ETH_ALEN];
2307 +
2308 + /* This stores infos for the current network.
2309 + * Either the network we are associated in INFRASTRUCTURE
2310 + * or the network that we are creating in MASTER mode.
2311 + * ad-hoc is a mixture ;-).
2312 + * Note that in infrastructure mode, even when not associated,
2313 + * fields bssid and essid may be valid (if wpa_set and essid_set
2314 + * are true) as thy carry the value set by the user via iwconfig
2315 + */
2316 + struct ieee80211_network current_network;
2317 +
2318 + enum ieee80211_state state;
2319 +
2320 + int short_slot;
2321 + int reg_mode;
2322 + int mode; /* A, B, G */
2323 + int modulation; /* CCK, OFDM */
2324 + int freq_band; /* 2.4Ghz, 5.2Ghz, Mixed */
2325 + int abg_true; /* ABG flag */
2326 +
2327 + /* used for forcing the ibss workqueue to terminate
2328 + * without wait for the syncro scan to terminate
2329 + */
2330 + short sync_scan_hurryup;
2331 +
2332 + int perfect_rssi;
2333 + int worst_rssi;
2334 +
2335 + u16 prev_seq_ctl; /* used to drop duplicate frames */
2336 +
2337 + /* map of allowed channels. 0 is dummy */
2338 + // FIXME: remeber to default to a basic channel plan depending of the PHY type
2339 +#ifdef ENABLE_DOT11D
2340 + void* pDot11dInfo;
2341 + bool bGlobalDomain;
2342 +#else
2343 + int channel_map[MAX_CHANNEL_NUMBER+1];
2344 +#endif
2345 + int rate; /* current rate */
2346 + int basic_rate;
2347 + //FIXME: pleace callback, see if redundant with softmac_features
2348 + short active_scan;
2349 +
2350 + /* this contains flags for selectively enable softmac support */
2351 + u16 softmac_features;
2352 +
2353 + /* if the sequence control field is not filled by HW */
2354 + u16 seq_ctrl[5];
2355 +
2356 + /* association procedure transaction sequence number */
2357 + u16 associate_seq;
2358 +
2359 + /* AID for RTXed association responses */
2360 + u16 assoc_id;
2361 +
2362 + /* power save mode related*/
2363 + u8 ack_tx_to_ieee;
2364 + short ps;
2365 + short sta_sleep;
2366 + int ps_timeout;
2367 + int ps_period;
2368 + struct tasklet_struct ps_task;
2369 + u32 ps_th;
2370 + u32 ps_tl;
2371 +
2372 + short raw_tx;
2373 + /* used if IEEE_SOFTMAC_TX_QUEUE is set */
2374 + short queue_stop;
2375 + short scanning;
2376 + short proto_started;
2377 +
2378 + struct semaphore wx_sem;
2379 + struct semaphore scan_sem;
2380 +
2381 + spinlock_t mgmt_tx_lock;
2382 + spinlock_t beacon_lock;
2383 +
2384 + short beacon_txing;
2385 +
2386 + short wap_set;
2387 + short ssid_set;
2388 +
2389 + u8 wpax_type_set; //{added by David, 2006.9.28}
2390 + u32 wpax_type_notify; //{added by David, 2006.9.26}
2391 +
2392 + /* QoS related flag */
2393 + char init_wmmparam_flag;
2394 + /* set on initialization */
2395 + u8 qos_support;
2396 +
2397 + /* for discarding duplicated packets in IBSS */
2398 + struct list_head ibss_mac_hash[IEEE_IBSS_MAC_HASH_SIZE];
2399 +
2400 + /* for discarding duplicated packets in BSS */
2401 + u16 last_rxseq_num[17]; /* rx seq previous per-tid */
2402 + u16 last_rxfrag_num[17];/* tx frag previous per-tid */
2403 + unsigned long last_packet_time[17];
2404 +
2405 + /* for PS mode */
2406 + unsigned long last_rx_ps_time;
2407 +
2408 + /* used if IEEE_SOFTMAC_SINGLE_QUEUE is set */
2409 + struct sk_buff *mgmt_queue_ring[MGMT_QUEUE_NUM];
2410 + int mgmt_queue_head;
2411 + int mgmt_queue_tail;
2412 +//{ added for rtl819x
2413 +#define IEEE80211_QUEUE_LIMIT 128
2414 + u8 AsocRetryCount;
2415 + unsigned int hw_header;
2416 + struct sk_buff_head skb_waitQ[MAX_QUEUE_SIZE];
2417 + struct sk_buff_head skb_aggQ[MAX_QUEUE_SIZE];
2418 + struct sk_buff_head skb_drv_aggQ[MAX_QUEUE_SIZE];
2419 + u32 sta_edca_param[4];
2420 + bool aggregation;
2421 + // Enable/Disable Rx immediate BA capability.
2422 + bool enable_rx_imm_BA;
2423 + bool bibsscoordinator;
2424 +
2425 + //+by amy for DM ,080515
2426 + //Dynamic Tx power for near/far range enable/Disable , by amy , 2008-05-15
2427 + bool bdynamic_txpower_enable;
2428 +
2429 + bool bCTSToSelfEnable;
2430 + u8 CTSToSelfTH;
2431 +
2432 + u32 fsync_time_interval;
2433 + u32 fsync_rate_bitmap;
2434 + u8 fsync_rssi_threshold;
2435 + bool bfsync_enable;
2436 +
2437 + u8 fsync_multiple_timeinterval; // FsyncMultipleTimeInterval * FsyncTimeInterval
2438 + u32 fsync_firstdiff_ratethreshold; // low threshold
2439 + u32 fsync_seconddiff_ratethreshold; // decrease threshold
2440 + Fsync_State fsync_state;
2441 + bool bis_any_nonbepkts;
2442 + //20Mhz 40Mhz AutoSwitch Threshold
2443 + bandwidth_autoswitch bandwidth_auto_switch;
2444 + //for txpower tracking
2445 + bool FwRWRF;
2446 +
2447 + //added by amy for AP roaming
2448 + RT_LINK_DETECT_T LinkDetectInfo;
2449 + //added by amy for ps
2450 + RT_POWER_SAVE_CONTROL PowerSaveControl;
2451 +//}
2452 + /* used if IEEE_SOFTMAC_TX_QUEUE is set */
2453 + struct tx_pending_t tx_pending;
2454 +
2455 + /* used if IEEE_SOFTMAC_ASSOCIATE is set */
2456 + struct timer_list associate_timer;
2457 +
2458 + /* used if IEEE_SOFTMAC_BEACONS is set */
2459 + struct timer_list beacon_timer;
2460 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
2461 + struct work_struct associate_complete_wq;
2462 + struct work_struct associate_procedure_wq;
2463 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
2464 + struct delayed_work softmac_scan_wq;
2465 + struct delayed_work associate_retry_wq;
2466 + struct delayed_work start_ibss_wq;
2467 + struct delayed_work hw_wakeup_wq;
2468 + struct delayed_work hw_sleep_wq;
2469 +#else
2470 + struct work_struct softmac_scan_wq;
2471 + struct work_struct associate_retry_wq;
2472 + struct work_struct start_ibss_wq;
2473 + struct work_struct hw_wakeup_wq;
2474 + struct work_struct hw_sleep_wq;
2475 +#endif
2476 + struct work_struct wx_sync_scan_wq;
2477 + struct workqueue_struct *wq;
2478 +#else
2479 + /* used for periodly scan */
2480 + struct timer_list scan_timer;
2481 +
2482 + struct tq_struct associate_complete_wq;
2483 + struct tq_struct associate_retry_wq;
2484 + struct tq_struct start_ibss_wq;
2485 + struct tq_struct associate_procedure_wq;
2486 + struct tq_struct softmac_scan_wq;
2487 + struct tq_struct wx_sync_scan_wq;
2488 +
2489 +#endif
2490 + // Qos related. Added by Annie, 2005-11-01.
2491 + //STA_QOS StaQos;
2492 +
2493 + //u32 STA_EDCA_PARAM[4];
2494 + //CHANNEL_ACCESS_SETTING ChannelAccessSetting;
2495 +
2496 +
2497 + /* Callback functions */
2498 + void (*set_security)(struct net_device *dev,
2499 + struct ieee80211_security *sec);
2500 +
2501 + /* Used to TX data frame by using txb structs.
2502 + * this is not used if in the softmac_features
2503 + * is set the flag IEEE_SOFTMAC_TX_QUEUE
2504 + */
2505 + int (*hard_start_xmit)(struct ieee80211_txb *txb,
2506 + struct net_device *dev);
2507 +
2508 + int (*reset_port)(struct net_device *dev);
2509 + int (*is_queue_full) (struct net_device * dev, int pri);
2510 +
2511 + int (*handle_management) (struct net_device * dev,
2512 + struct ieee80211_network * network, u16 type);
2513 + int (*is_qos_active) (struct net_device *dev, struct sk_buff *skb);
2514 +
2515 + /* Softmac-generated frames (mamagement) are TXed via this
2516 + * callback if the flag IEEE_SOFTMAC_SINGLE_QUEUE is
2517 + * not set. As some cards may have different HW queues that
2518 + * one might want to use for data and management frames
2519 + * the option to have two callbacks might be useful.
2520 + * This fucntion can't sleep.
2521 + */
2522 + int (*softmac_hard_start_xmit)(struct sk_buff *skb,
2523 + struct net_device *dev);
2524 +
2525 + /* used instead of hard_start_xmit (not softmac_hard_start_xmit)
2526 + * if the IEEE_SOFTMAC_TX_QUEUE feature is used to TX data
2527 + * frames. I the option IEEE_SOFTMAC_SINGLE_QUEUE is also set
2528 + * then also management frames are sent via this callback.
2529 + * This function can't sleep.
2530 + */
2531 + void (*softmac_data_hard_start_xmit)(struct sk_buff *skb,
2532 + struct net_device *dev,int rate);
2533 +
2534 + /* stops the HW queue for DATA frames. Useful to avoid
2535 + * waste time to TX data frame when we are reassociating
2536 + * This function can sleep.
2537 + */
2538 + void (*data_hard_stop)(struct net_device *dev);
2539 +
2540 + /* OK this is complementar to data_poll_hard_stop */
2541 + void (*data_hard_resume)(struct net_device *dev);
2542 +
2543 + /* ask to the driver to retune the radio .
2544 + * This function can sleep. the driver should ensure
2545 + * the radio has been swithced before return.
2546 + */
2547 + void (*set_chan)(struct net_device *dev,short ch);
2548 +
2549 + /* These are not used if the ieee stack takes care of
2550 + * scanning (IEEE_SOFTMAC_SCAN feature set).
2551 + * In this case only the set_chan is used.
2552 + *
2553 + * The syncro version is similar to the start_scan but
2554 + * does not return until all channels has been scanned.
2555 + * this is called in user context and should sleep,
2556 + * it is called in a work_queue when swithcing to ad-hoc mode
2557 + * or in behalf of iwlist scan when the card is associated
2558 + * and root user ask for a scan.
2559 + * the fucntion stop_scan should stop both the syncro and
2560 + * background scanning and can sleep.
2561 + * The fucntion start_scan should initiate the background
2562 + * scanning and can't sleep.
2563 + */
2564 + void (*scan_syncro)(struct net_device *dev);
2565 + void (*start_scan)(struct net_device *dev);
2566 + void (*stop_scan)(struct net_device *dev);
2567 +
2568 + /* indicate the driver that the link state is changed
2569 + * for example it may indicate the card is associated now.
2570 + * Driver might be interested in this to apply RX filter
2571 + * rules or simply light the LINK led
2572 + */
2573 + void (*link_change)(struct net_device *dev);
2574 +
2575 + /* these two function indicates to the HW when to start
2576 + * and stop to send beacons. This is used when the
2577 + * IEEE_SOFTMAC_BEACONS is not set. For now the
2578 + * stop_send_bacons is NOT guaranteed to be called only
2579 + * after start_send_beacons.
2580 + */
2581 + void (*start_send_beacons) (struct net_device *dev);
2582 + void (*stop_send_beacons) (struct net_device *dev);
2583 +
2584 + /* power save mode related */
2585 + void (*sta_wake_up) (struct net_device *dev);
2586 +// void (*ps_request_tx_ack) (struct net_device *dev);
2587 + void (*enter_sleep_state) (struct net_device *dev, u32 th, u32 tl);
2588 + short (*ps_is_queue_empty) (struct net_device *dev);
2589 +#if 0
2590 + /* Typical STA methods */
2591 + int (*handle_auth) (struct net_device * dev,
2592 + struct ieee80211_auth * auth);
2593 + int (*handle_deauth) (struct net_device * dev,
2594 + struct ieee80211_deauth * auth);
2595 + int (*handle_action) (struct net_device * dev,
2596 + struct ieee80211_action * action,
2597 + struct ieee80211_rx_stats * stats);
2598 + int (*handle_disassoc) (struct net_device * dev,
2599 + struct ieee80211_disassoc * assoc);
2600 +#endif
2601 + int (*handle_beacon) (struct net_device * dev, struct ieee80211_beacon * beacon, struct ieee80211_network * network);
2602 +#if 0
2603 + int (*handle_probe_response) (struct net_device * dev,
2604 + struct ieee80211_probe_response * resp,
2605 + struct ieee80211_network * network);
2606 + int (*handle_probe_request) (struct net_device * dev,
2607 + struct ieee80211_probe_request * req,
2608 + struct ieee80211_rx_stats * stats);
2609 +#endif
2610 + int (*handle_assoc_response) (struct net_device * dev, struct ieee80211_assoc_response_frame * resp, struct ieee80211_network * network);
2611 +
2612 +#if 0
2613 + /* Typical AP methods */
2614 + int (*handle_assoc_request) (struct net_device * dev);
2615 + int (*handle_reassoc_request) (struct net_device * dev,
2616 + struct ieee80211_reassoc_request * req);
2617 +#endif
2618 +
2619 + /* check whether Tx hw resouce available */
2620 + short (*check_nic_enough_desc)(struct net_device *dev, int queue_index);
2621 + //added by wb for HT related
2622 +// void (*SwChnlByTimerHandler)(struct net_device *dev, int channel);
2623 + void (*SetBWModeHandler)(struct net_device *dev, HT_CHANNEL_WIDTH Bandwidth, HT_EXTCHNL_OFFSET Offset);
2624 +// void (*UpdateHalRATRTableHandler)(struct net_device* dev, u8* pMcsRate);
2625 + bool (*GetNmodeSupportBySecCfg)(struct net_device* dev);
2626 + void (*SetWirelessMode)(struct net_device* dev, u8 wireless_mode);
2627 + bool (*GetHalfNmodeSupportByAPsHandler)(struct net_device* dev);
2628 + void (*InitialGainHandler)(struct net_device *dev, u8 Operation);
2629 +
2630 + /* This must be the last item so that it points to the data
2631 + * allocated beyond this structure by alloc_ieee80211 */
2632 + u8 priv[0];
2633 +};
2634 +
2635 +#define IEEE_A (1<<0)
2636 +#define IEEE_B (1<<1)
2637 +#define IEEE_G (1<<2)
2638 +#define IEEE_N_24G (1<<4)
2639 +#define IEEE_N_5G (1<<5)
2640 +#define IEEE_MODE_MASK (IEEE_A|IEEE_B|IEEE_G)
2641 +
2642 +/* Generate a 802.11 header */
2643 +
2644 +/* Uses the channel change callback directly
2645 + * instead of [start/stop] scan callbacks
2646 + */
2647 +#define IEEE_SOFTMAC_SCAN (1<<2)
2648 +
2649 +/* Perform authentication and association handshake */
2650 +#define IEEE_SOFTMAC_ASSOCIATE (1<<3)
2651 +
2652 +/* Generate probe requests */
2653 +#define IEEE_SOFTMAC_PROBERQ (1<<4)
2654 +
2655 +/* Generate respones to probe requests */
2656 +#define IEEE_SOFTMAC_PROBERS (1<<5)
2657 +
2658 +/* The ieee802.11 stack will manages the netif queue
2659 + * wake/stop for the driver, taking care of 802.11
2660 + * fragmentation. See softmac.c for details. */
2661 +#define IEEE_SOFTMAC_TX_QUEUE (1<<7)
2662 +
2663 +/* Uses only the softmac_data_hard_start_xmit
2664 + * even for TX management frames.
2665 + */
2666 +#define IEEE_SOFTMAC_SINGLE_QUEUE (1<<8)
2667 +
2668 +/* Generate beacons. The stack will enqueue beacons
2669 + * to the card
2670 + */
2671 +#define IEEE_SOFTMAC_BEACONS (1<<6)
2672 +
2673 +static inline void *ieee80211_priv(struct net_device *dev)
2674 +{
2675 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
2676 + return ((struct ieee80211_device *)netdev_priv(dev))->priv;
2677 +#else
2678 + return ((struct ieee80211_device *)dev->priv)->priv;
2679 +#endif
2680 +}
2681 +
2682 +extern inline int ieee80211_is_empty_essid(const char *essid, int essid_len)
2683 +{
2684 + /* Single white space is for Linksys APs */
2685 + if (essid_len == 1 && essid[0] == ' ')
2686 + return 1;
2687 +
2688 + /* Otherwise, if the entire essid is 0, we assume it is hidden */
2689 + while (essid_len) {
2690 + essid_len--;
2691 + if (essid[essid_len] != '\0')
2692 + return 0;
2693 + }
2694 +
2695 + return 1;
2696 +}
2697 +
2698 +extern inline int ieee80211_is_valid_mode(struct ieee80211_device *ieee, int mode)
2699 +{
2700 + /*
2701 + * It is possible for both access points and our device to support
2702 + * combinations of modes, so as long as there is one valid combination
2703 + * of ap/device supported modes, then return success
2704 + *
2705 + */
2706 + if ((mode & IEEE_A) &&
2707 + (ieee->modulation & IEEE80211_OFDM_MODULATION) &&
2708 + (ieee->freq_band & IEEE80211_52GHZ_BAND))
2709 + return 1;
2710 +
2711 + if ((mode & IEEE_G) &&
2712 + (ieee->modulation & IEEE80211_OFDM_MODULATION) &&
2713 + (ieee->freq_band & IEEE80211_24GHZ_BAND))
2714 + return 1;
2715 +
2716 + if ((mode & IEEE_B) &&
2717 + (ieee->modulation & IEEE80211_CCK_MODULATION) &&
2718 + (ieee->freq_band & IEEE80211_24GHZ_BAND))
2719 + return 1;
2720 +
2721 + return 0;
2722 +}
2723 +
2724 +extern inline int ieee80211_get_hdrlen(u16 fc)
2725 +{
2726 + int hdrlen = IEEE80211_3ADDR_LEN;
2727 +
2728 + switch (WLAN_FC_GET_TYPE(fc)) {
2729 + case IEEE80211_FTYPE_DATA:
2730 + if ((fc & IEEE80211_FCTL_FROMDS) && (fc & IEEE80211_FCTL_TODS))
2731 + hdrlen = IEEE80211_4ADDR_LEN; /* Addr4 */
2732 + if(IEEE80211_QOS_HAS_SEQ(fc))
2733 + hdrlen += 2; /* QOS ctrl*/
2734 + break;
2735 + case IEEE80211_FTYPE_CTL:
2736 + switch (WLAN_FC_GET_STYPE(fc)) {
2737 + case IEEE80211_STYPE_CTS:
2738 + case IEEE80211_STYPE_ACK:
2739 + hdrlen = IEEE80211_1ADDR_LEN;
2740 + break;
2741 + default:
2742 + hdrlen = IEEE80211_2ADDR_LEN;
2743 + break;
2744 + }
2745 + break;
2746 + }
2747 +
2748 + return hdrlen;
2749 +}
2750 +
2751 +static inline u8 *ieee80211_get_payload(struct ieee80211_hdr *hdr)
2752 +{
2753 + switch (ieee80211_get_hdrlen(le16_to_cpu(hdr->frame_ctl))) {
2754 + case IEEE80211_1ADDR_LEN:
2755 + return ((struct ieee80211_hdr_1addr *)hdr)->payload;
2756 + case IEEE80211_2ADDR_LEN:
2757 + return ((struct ieee80211_hdr_2addr *)hdr)->payload;
2758 + case IEEE80211_3ADDR_LEN:
2759 + return ((struct ieee80211_hdr_3addr *)hdr)->payload;
2760 + case IEEE80211_4ADDR_LEN:
2761 + return ((struct ieee80211_hdr_4addr *)hdr)->payload;
2762 + }
2763 + return NULL;
2764 +}
2765 +
2766 +static inline int ieee80211_is_ofdm_rate(u8 rate)
2767 +{
2768 + switch (rate & ~IEEE80211_BASIC_RATE_MASK) {
2769 + case IEEE80211_OFDM_RATE_6MB:
2770 + case IEEE80211_OFDM_RATE_9MB:
2771 + case IEEE80211_OFDM_RATE_12MB:
2772 + case IEEE80211_OFDM_RATE_18MB:
2773 + case IEEE80211_OFDM_RATE_24MB:
2774 + case IEEE80211_OFDM_RATE_36MB:
2775 + case IEEE80211_OFDM_RATE_48MB:
2776 + case IEEE80211_OFDM_RATE_54MB:
2777 + return 1;
2778 + }
2779 + return 0;
2780 +}
2781 +
2782 +static inline int ieee80211_is_cck_rate(u8 rate)
2783 +{
2784 + switch (rate & ~IEEE80211_BASIC_RATE_MASK) {
2785 + case IEEE80211_CCK_RATE_1MB:
2786 + case IEEE80211_CCK_RATE_2MB:
2787 + case IEEE80211_CCK_RATE_5MB:
2788 + case IEEE80211_CCK_RATE_11MB:
2789 + return 1;
2790 + }
2791 + return 0;
2792 +}
2793 +
2794 +
2795 +/* ieee80211.c */
2796 +extern void free_ieee80211(struct net_device *dev);
2797 +extern struct net_device *alloc_ieee80211(int sizeof_priv);
2798 +
2799 +extern int ieee80211_set_encryption(struct ieee80211_device *ieee);
2800 +
2801 +/* ieee80211_tx.c */
2802 +
2803 +extern int ieee80211_encrypt_fragment(
2804 + struct ieee80211_device *ieee,
2805 + struct sk_buff *frag,
2806 + int hdr_len);
2807 +
2808 +extern int ieee80211_xmit(struct sk_buff *skb,
2809 + struct net_device *dev);
2810 +extern void ieee80211_txb_free(struct ieee80211_txb *);
2811 +
2812 +
2813 +/* ieee80211_rx.c */
2814 +extern int ieee80211_rx(struct ieee80211_device *ieee, struct sk_buff *skb,
2815 + struct ieee80211_rx_stats *rx_stats);
2816 +extern void ieee80211_rx_mgt(struct ieee80211_device *ieee,
2817 + struct ieee80211_hdr_4addr *header,
2818 + struct ieee80211_rx_stats *stats);
2819 +
2820 +/* ieee80211_wx.c */
2821 +extern int ieee80211_wx_get_scan(struct ieee80211_device *ieee,
2822 + struct iw_request_info *info,
2823 + union iwreq_data *wrqu, char *key);
2824 +extern int ieee80211_wx_set_encode(struct ieee80211_device *ieee,
2825 + struct iw_request_info *info,
2826 + union iwreq_data *wrqu, char *key);
2827 +extern int ieee80211_wx_get_encode(struct ieee80211_device *ieee,
2828 + struct iw_request_info *info,
2829 + union iwreq_data *wrqu, char *key);
2830 +#if WIRELESS_EXT >= 18
2831 +extern int ieee80211_wx_get_encode_ext(struct ieee80211_device *ieee,
2832 + struct iw_request_info *info,
2833 + union iwreq_data* wrqu, char *extra);
2834 +extern int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee,
2835 + struct iw_request_info *info,
2836 + union iwreq_data* wrqu, char *extra);
2837 +extern int ieee80211_wx_set_auth(struct ieee80211_device *ieee,
2838 + struct iw_request_info *info,
2839 + struct iw_param *data, char *extra);
2840 +extern int ieee80211_wx_set_mlme(struct ieee80211_device *ieee,
2841 + struct iw_request_info *info,
2842 + union iwreq_data *wrqu, char *extra);
2843 +#endif
2844 +extern int ieee80211_wx_set_gen_ie(struct ieee80211_device *ieee, u8 *ie, size_t len);
2845 +
2846 +/* ieee80211_softmac.c */
2847 +extern short ieee80211_is_54g(struct ieee80211_network net);
2848 +extern short ieee80211_is_shortslot(struct ieee80211_network net);
2849 +extern int ieee80211_rx_frame_softmac(struct ieee80211_device *ieee, struct sk_buff *skb,
2850 + struct ieee80211_rx_stats *rx_stats, u16 type,
2851 + u16 stype);
2852 +extern void ieee80211_softmac_new_net(struct ieee80211_device *ieee, struct ieee80211_network *net);
2853 +
2854 +void SendDisassociation(struct ieee80211_device *ieee, u8* asSta, u8 asRsn);
2855 +extern void ieee80211_softmac_xmit(struct ieee80211_txb *txb, struct ieee80211_device *ieee);
2856 +
2857 +extern void ieee80211_stop_send_beacons(struct ieee80211_device *ieee);
2858 +extern void notify_wx_assoc_event(struct ieee80211_device *ieee);
2859 +extern void ieee80211_softmac_check_all_nets(struct ieee80211_device *ieee);
2860 +extern void ieee80211_start_bss(struct ieee80211_device *ieee);
2861 +extern void ieee80211_start_master_bss(struct ieee80211_device *ieee);
2862 +extern void ieee80211_start_ibss(struct ieee80211_device *ieee);
2863 +extern void ieee80211_softmac_init(struct ieee80211_device *ieee);
2864 +extern void ieee80211_softmac_free(struct ieee80211_device *ieee);
2865 +extern void ieee80211_associate_abort(struct ieee80211_device *ieee);
2866 +extern void ieee80211_disassociate(struct ieee80211_device *ieee);
2867 +extern void ieee80211_stop_scan(struct ieee80211_device *ieee);
2868 +extern void ieee80211_start_scan_syncro(struct ieee80211_device *ieee);
2869 +extern void ieee80211_check_all_nets(struct ieee80211_device *ieee);
2870 +extern void ieee80211_start_protocol(struct ieee80211_device *ieee);
2871 +extern void ieee80211_stop_protocol(struct ieee80211_device *ieee);
2872 +extern void ieee80211_softmac_start_protocol(struct ieee80211_device *ieee);
2873 +extern void ieee80211_softmac_stop_protocol(struct ieee80211_device *ieee);
2874 +extern void ieee80211_reset_queue(struct ieee80211_device *ieee);
2875 +extern void ieee80211_wake_queue(struct ieee80211_device *ieee);
2876 +extern void ieee80211_stop_queue(struct ieee80211_device *ieee);
2877 +extern struct sk_buff *ieee80211_get_beacon(struct ieee80211_device *ieee);
2878 +extern void ieee80211_start_send_beacons(struct ieee80211_device *ieee);
2879 +extern void ieee80211_stop_send_beacons(struct ieee80211_device *ieee);
2880 +extern int ieee80211_wpa_supplicant_ioctl(struct ieee80211_device *ieee, struct iw_point *p);
2881 +extern void notify_wx_assoc_event(struct ieee80211_device *ieee);
2882 +extern void ieee80211_ps_tx_ack(struct ieee80211_device *ieee, short success);
2883 +
2884 +extern void softmac_mgmt_xmit(struct sk_buff *skb, struct ieee80211_device *ieee);
2885 +
2886 +/* ieee80211_crypt_ccmp&tkip&wep.c */
2887 +extern void ieee80211_tkip_null(void);
2888 +extern void ieee80211_wep_null(void);
2889 +extern void ieee80211_ccmp_null(void);
2890 +
2891 +/* ieee80211_softmac_wx.c */
2892 +
2893 +extern int ieee80211_wx_get_wap(struct ieee80211_device *ieee,
2894 + struct iw_request_info *info,
2895 + union iwreq_data *wrqu, char *ext);
2896 +
2897 +extern int ieee80211_wx_set_wap(struct ieee80211_device *ieee,
2898 + struct iw_request_info *info,
2899 + union iwreq_data *awrq,
2900 + char *extra);
2901 +
2902 +extern int ieee80211_wx_get_essid(struct ieee80211_device *ieee, struct iw_request_info *a,union iwreq_data *wrqu,char *b);
2903 +
2904 +extern int ieee80211_wx_set_rate(struct ieee80211_device *ieee,
2905 + struct iw_request_info *info,
2906 + union iwreq_data *wrqu, char *extra);
2907 +
2908 +extern int ieee80211_wx_get_rate(struct ieee80211_device *ieee,
2909 + struct iw_request_info *info,
2910 + union iwreq_data *wrqu, char *extra);
2911 +
2912 +extern int ieee80211_wx_set_mode(struct ieee80211_device *ieee, struct iw_request_info *a,
2913 + union iwreq_data *wrqu, char *b);
2914 +
2915 +extern int ieee80211_wx_set_scan(struct ieee80211_device *ieee, struct iw_request_info *a,
2916 + union iwreq_data *wrqu, char *b);
2917 +
2918 +extern int ieee80211_wx_set_essid(struct ieee80211_device *ieee,
2919 + struct iw_request_info *a,
2920 + union iwreq_data *wrqu, char *extra);
2921 +
2922 +extern int ieee80211_wx_get_mode(struct ieee80211_device *ieee, struct iw_request_info *a,
2923 + union iwreq_data *wrqu, char *b);
2924 +
2925 +extern int ieee80211_wx_set_freq(struct ieee80211_device *ieee, struct iw_request_info *a,
2926 + union iwreq_data *wrqu, char *b);
2927 +
2928 +extern int ieee80211_wx_get_freq(struct ieee80211_device *ieee, struct iw_request_info *a,
2929 + union iwreq_data *wrqu, char *b);
2930 +
2931 +//extern void ieee80211_wx_sync_scan_wq(struct ieee80211_device *ieee);
2932 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
2933 +extern void ieee80211_wx_sync_scan_wq(struct work_struct *work);
2934 +#else
2935 + extern void ieee80211_wx_sync_scan_wq(struct ieee80211_device *ieee);
2936 +#endif
2937 +
2938 +
2939 +extern int ieee80211_wx_set_rawtx(struct ieee80211_device *ieee,
2940 + struct iw_request_info *info,
2941 + union iwreq_data *wrqu, char *extra);
2942 +
2943 +extern int ieee80211_wx_get_name(struct ieee80211_device *ieee,
2944 + struct iw_request_info *info,
2945 + union iwreq_data *wrqu, char *extra);
2946 +
2947 +extern int ieee80211_wx_set_power(struct ieee80211_device *ieee,
2948 + struct iw_request_info *info,
2949 + union iwreq_data *wrqu, char *extra);
2950 +
2951 +extern int ieee80211_wx_get_power(struct ieee80211_device *ieee,
2952 + struct iw_request_info *info,
2953 + union iwreq_data *wrqu, char *extra);
2954 +
2955 +extern int ieee80211_wx_set_rts(struct ieee80211_device *ieee,
2956 + struct iw_request_info *info,
2957 + union iwreq_data *wrqu, char *extra);
2958 +
2959 +extern int ieee80211_wx_get_rts(struct ieee80211_device *ieee,
2960 + struct iw_request_info *info,
2961 + union iwreq_data *wrqu, char *extra);
2962 +//HT
2963 +#define MAX_RECEIVE_BUFFER_SIZE 9100 //
2964 +extern void HTDebugHTCapability(u8* CapIE, u8* TitleString );
2965 +extern void HTDebugHTInfo(u8* InfoIE, u8* TitleString);
2966 +
2967 +void HTSetConnectBwMode(struct ieee80211_device* ieee, HT_CHANNEL_WIDTH Bandwidth, HT_EXTCHNL_OFFSET Offset);
2968 +extern void HTUpdateDefaultSetting(struct ieee80211_device* ieee);
2969 +extern void HTConstructCapabilityElement(struct ieee80211_device* ieee, u8* posHTCap, u8* len, u8 isEncrypt);
2970 +extern void HTConstructInfoElement(struct ieee80211_device* ieee, u8* posHTInfo, u8* len, u8 isEncrypt);
2971 +extern void HTConstructRT2RTAggElement(struct ieee80211_device* ieee, u8* posRT2RTAgg, u8* len);
2972 +extern void HTOnAssocRsp(struct ieee80211_device *ieee);
2973 +extern void HTInitializeHTInfo(struct ieee80211_device* ieee);
2974 +extern void HTInitializeBssDesc(PBSS_HT pBssHT);
2975 +extern void HTResetSelfAndSavePeerSetting(struct ieee80211_device* ieee, struct ieee80211_network * pNetwork);
2976 +extern void HTUpdateSelfAndPeerSetting(struct ieee80211_device* ieee, struct ieee80211_network * pNetwork);
2977 +extern u8 HTGetHighestMCSRate(struct ieee80211_device* ieee, u8* pMCSRateSet, u8* pMCSFilter);
2978 +extern u8 MCS_FILTER_ALL[];
2979 +extern u16 MCS_DATA_RATE[2][2][77] ;
2980 +extern u8 HTCCheck(struct ieee80211_device* ieee, u8* pFrame);
2981 +//extern void HTSetConnectBwModeCallback(unsigned long data);
2982 +extern void HTResetIOTSetting(PRT_HIGH_THROUGHPUT pHTInfo);
2983 +extern bool IsHTHalfNmodeAPs(struct ieee80211_device* ieee);
2984 +extern u16 HTHalfMcsToDataRate(struct ieee80211_device* ieee, u8 nMcsRate);
2985 +extern u16 HTMcsToDataRate( struct ieee80211_device* ieee, u8 nMcsRate);
2986 +extern u16 TxCountToDataRate( struct ieee80211_device* ieee, u8 nDataRate);
2987 +//function in BAPROC.c
2988 +extern int ieee80211_rx_ADDBAReq( struct ieee80211_device* ieee, struct sk_buff *skb);
2989 +extern int ieee80211_rx_ADDBARsp( struct ieee80211_device* ieee, struct sk_buff *skb);
2990 +extern int ieee80211_rx_DELBA(struct ieee80211_device* ieee,struct sk_buff *skb);
2991 +extern void TsInitAddBA( struct ieee80211_device* ieee, PTX_TS_RECORD pTS, u8 Policy, u8 bOverwritePending);
2992 +extern void TsInitDelBA( struct ieee80211_device* ieee, PTS_COMMON_INFO pTsCommonInfo, TR_SELECT TxRxSelect);
2993 +extern void BaSetupTimeOut(unsigned long data);
2994 +extern void TxBaInactTimeout(unsigned long data);
2995 +extern void RxBaInactTimeout(unsigned long data);
2996 +extern void ResetBaEntry( PBA_RECORD pBA);
2997 +//function in TS.c
2998 +extern bool GetTs(
2999 + struct ieee80211_device* ieee,
3000 + PTS_COMMON_INFO *ppTS,
3001 + u8* Addr,
3002 + u8 TID,
3003 + TR_SELECT TxRxSelect, //Rx:1, Tx:0
3004 + bool bAddNewTs
3005 + );
3006 +extern void TSInitialize(struct ieee80211_device *ieee);
3007 +extern void TsStartAddBaProcess(struct ieee80211_device* ieee, PTX_TS_RECORD pTxTS);
3008 +extern void RemovePeerTS(struct ieee80211_device* ieee, u8* Addr);
3009 +extern void RemoveAllTS(struct ieee80211_device* ieee);
3010 +void ieee80211_softmac_scan_syncro(struct ieee80211_device *ieee);
3011 +
3012 +extern const long ieee80211_wlan_frequencies[];
3013 +
3014 +extern inline void ieee80211_increment_scans(struct ieee80211_device *ieee)
3015 +{
3016 + ieee->scans++;
3017 +}
3018 +
3019 +extern inline int ieee80211_get_scans(struct ieee80211_device *ieee)
3020 +{
3021 + return ieee->scans;
3022 +}
3023 +
3024 +static inline const char *escape_essid(const char *essid, u8 essid_len) {
3025 + static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
3026 + const char *s = essid;
3027 + char *d = escaped;
3028 +
3029 + if (ieee80211_is_empty_essid(essid, essid_len)) {
3030 + memcpy(escaped, "<hidden>", sizeof("<hidden>"));
3031 + return escaped;
3032 + }
3033 +
3034 + essid_len = min(essid_len, (u8)IW_ESSID_MAX_SIZE);
3035 + while (essid_len--) {
3036 + if (*s == '\0') {
3037 + *d++ = '\\';
3038 + *d++ = '0';
3039 + s++;
3040 + } else {
3041 + *d++ = *s++;
3042 + }
3043 + }
3044 + *d = '\0';
3045 + return escaped;
3046 +}
3047 +
3048 +/* For the function is more related to hardware setting, it's better to use the
3049 + * ieee handler to refer to it.
3050 + */
3051 +extern short check_nic_enough_desc(struct net_device *dev, int queue_index);
3052 +extern int ieee80211_data_xmit(struct sk_buff *skb, struct net_device *dev);
3053 +extern int ieee80211_parse_info_param(struct ieee80211_device *ieee,
3054 + struct ieee80211_info_element *info_element,
3055 + u16 length,
3056 + struct ieee80211_network *network,
3057 + struct ieee80211_rx_stats *stats);
3058 +
3059 +void ieee80211_indicate_packets(struct ieee80211_device *ieee, struct ieee80211_rxb** prxbIndicateArray,u8 index);
3060 +#define RT_ASOC_RETRY_LIMIT 5
3061 +#endif /* IEEE80211_H */
3062 --- /dev/null
3063 +++ b/drivers/staging/rtl8192e/ieee80211/EndianFree.h
3064 @@ -0,0 +1,199 @@
3065 +#ifndef __INC_ENDIANFREE_H
3066 +#define __INC_ENDIANFREE_H
3067 +
3068 +/*
3069 + * Call endian free function when
3070 + * 1. Read/write packet content.
3071 + * 2. Before write integer to IO.
3072 + * 3. After read integer from IO.
3073 + */
3074 +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
3075 +#ifndef bool
3076 +typedef enum{false = 0, true} bool;
3077 +#endif
3078 +#endif
3079 +
3080 +#define __MACHINE_LITTLE_ENDIAN 1234 /* LSB first: i386, vax */
3081 +#define __MACHINE_BIG_ENDIAN 4321 /* MSB first: 68000, ibm, net, ppc */
3082 +
3083 +#define BYTE_ORDER __MACHINE_LITTLE_ENDIAN
3084 +
3085 +#if BYTE_ORDER == __MACHINE_LITTLE_ENDIAN
3086 +// Convert data
3087 +#define EF1Byte(_val) ((u8)(_val))
3088 +#define EF2Byte(_val) ((u16)(_val))
3089 +#define EF4Byte(_val) ((u32)(_val))
3090 +
3091 +#else
3092 +// Convert data
3093 +#define EF1Byte(_val) ((u8)(_val))
3094 +#define EF2Byte(_val) (((((u16)(_val))&0x00ff)<<8)|((((u16)(_val))&0xff00)>>8))
3095 +#define EF4Byte(_val) (((((u32)(_val))&0x000000ff)<<24)|\
3096 + ((((u32)(_val))&0x0000ff00)<<8)|\
3097 + ((((u32)(_val))&0x00ff0000)>>8)|\
3098 + ((((u32)(_val))&0xff000000)>>24))
3099 +#endif
3100 +
3101 +// Read data from memory
3102 +#define ReadEF1Byte(_ptr) EF1Byte(*((u8 *)(_ptr)))
3103 +#define ReadEF2Byte(_ptr) EF2Byte(*((u16 *)(_ptr)))
3104 +#define ReadEF4Byte(_ptr) EF4Byte(*((u32 *)(_ptr)))
3105 +
3106 +// Write data to memory
3107 +#define WriteEF1Byte(_ptr, _val) (*((u8 *)(_ptr)))=EF1Byte(_val)
3108 +#define WriteEF2Byte(_ptr, _val) (*((u16 *)(_ptr)))=EF2Byte(_val)
3109 +#define WriteEF4Byte(_ptr, _val) (*((u32 *)(_ptr)))=EF4Byte(_val)
3110 +// Convert Host system specific byte ording (litten or big endia) to Network byte ording (big endian).
3111 +// 2006.05.07, by rcnjko.
3112 +#if BYTE_ORDER == __MACHINE_LITTLE_ENDIAN
3113 +#define H2N1BYTE(_val) ((u8)(_val))
3114 +#define H2N2BYTE(_val) (((((u16)(_val))&0x00ff)<<8)|\
3115 + ((((u16)(_val))&0xff00)>>8))
3116 +#define H2N4BYTE(_val) (((((u32)(_val))&0x000000ff)<<24)|\
3117 + ((((u32)(_val))&0x0000ff00)<<8) |\
3118 + ((((u32)(_val))&0x00ff0000)>>8) |\
3119 + ((((u32)(_val))&0xff000000)>>24))
3120 +#else
3121 +#define H2N1BYTE(_val) ((u8)(_val))
3122 +#define H2N2BYTE(_val) ((u16)(_val))
3123 +#define H2N4BYTE(_val) ((u32)(_val))
3124 +#endif
3125 +
3126 +// Convert from Network byte ording (big endian) to Host system specific byte ording (litten or big endia).
3127 +// 2006.05.07, by rcnjko.
3128 +#if BYTE_ORDER == __MACHINE_LITTLE_ENDIAN
3129 +#define N2H1BYTE(_val) ((u8)(_val))
3130 +#define N2H2BYTE(_val) (((((u16)(_val))&0x00ff)<<8)|\
3131 + ((((u16)(_val))&0xff00)>>8))
3132 +#define N2H4BYTE(_val) (((((u32)(_val))&0x000000ff)<<24)|\
3133 + ((((u32)(_val))&0x0000ff00)<<8) |\
3134 + ((((u32)(_val))&0x00ff0000)>>8) |\
3135 + ((((u32)(_val))&0xff000000)>>24))
3136 +#else
3137 +#define N2H1BYTE(_val) ((u8)(_val))
3138 +#define N2H2BYTE(_val) ((u16)(_val))
3139 +#define N2H4BYTE(_val) ((u32)(_val))
3140 +#endif
3141 +
3142 +//
3143 +// Example:
3144 +// BIT_LEN_MASK_32(0) => 0x00000000
3145 +// BIT_LEN_MASK_32(1) => 0x00000001
3146 +// BIT_LEN_MASK_32(2) => 0x00000003
3147 +// BIT_LEN_MASK_32(32) => 0xFFFFFFFF
3148 +//
3149 +#define BIT_LEN_MASK_32(__BitLen) (0xFFFFFFFF >> (32 - (__BitLen)))
3150 +//
3151 +// Example:
3152 +// BIT_OFFSET_LEN_MASK_32(0, 2) => 0x00000003
3153 +// BIT_OFFSET_LEN_MASK_32(16, 2) => 0x00030000
3154 +//
3155 +#define BIT_OFFSET_LEN_MASK_32(__BitOffset, __BitLen) (BIT_LEN_MASK_32(__BitLen) << (__BitOffset))
3156 +
3157 +//
3158 +// Description:
3159 +// Return 4-byte value in host byte ordering from
3160 +// 4-byte pointer in litten-endian system.
3161 +//
3162 +#define LE_P4BYTE_TO_HOST_4BYTE(__pStart) (EF4Byte(*((u32 *)(__pStart))))
3163 +
3164 +//
3165 +// Description:
3166 +// Translate subfield (continuous bits in little-endian) of 4-byte value in litten byte to
3167 +// 4-byte value in host byte ordering.
3168 +//
3169 +#define LE_BITS_TO_4BYTE(__pStart, __BitOffset, __BitLen) \
3170 + ( \
3171 + ( LE_P4BYTE_TO_HOST_4BYTE(__pStart) >> (__BitOffset) ) \
3172 + & \
3173 + BIT_LEN_MASK_32(__BitLen) \
3174 + )
3175 +
3176 +//
3177 +// Description:
3178 +// Mask subfield (continuous bits in little-endian) of 4-byte value in litten byte oredering
3179 +// and return the result in 4-byte value in host byte ordering.
3180 +//
3181 +#define LE_BITS_CLEARED_TO_4BYTE(__pStart, __BitOffset, __BitLen) \
3182 + ( \
3183 + LE_P4BYTE_TO_HOST_4BYTE(__pStart) \
3184 + & \
3185 + ( ~BIT_OFFSET_LEN_MASK_32(__BitOffset, __BitLen) ) \
3186 + )
3187 +
3188 +//
3189 +// Description:
3190 +// Set subfield of little-endian 4-byte value to specified value.
3191 +//
3192 +#define SET_BITS_TO_LE_4BYTE(__pStart, __BitOffset, __BitLen, __Value) \
3193 + *((u32 *)(__pStart)) = \
3194 + EF4Byte( \
3195 + LE_BITS_CLEARED_TO_4BYTE(__pStart, __BitOffset, __BitLen) \
3196 + | \
3197 + ( (((u32)__Value) & BIT_LEN_MASK_32(__BitLen)) << (__BitOffset) ) \
3198 + );
3199 +
3200 +
3201 +#define BIT_LEN_MASK_16(__BitLen) \
3202 + (0xFFFF >> (16 - (__BitLen)))
3203 +
3204 +#define BIT_OFFSET_LEN_MASK_16(__BitOffset, __BitLen) \
3205 + (BIT_LEN_MASK_16(__BitLen) << (__BitOffset))
3206 +
3207 +#define LE_P2BYTE_TO_HOST_2BYTE(__pStart) \
3208 + (EF2Byte(*((u16 *)(__pStart))))
3209 +
3210 +#define LE_BITS_TO_2BYTE(__pStart, __BitOffset, __BitLen) \
3211 + ( \
3212 + ( LE_P2BYTE_TO_HOST_2BYTE(__pStart) >> (__BitOffset) ) \
3213 + & \
3214 + BIT_LEN_MASK_16(__BitLen) \
3215 + )
3216 +
3217 +#define LE_BITS_CLEARED_TO_2BYTE(__pStart, __BitOffset, __BitLen) \
3218 + ( \
3219 + LE_P2BYTE_TO_HOST_2BYTE(__pStart) \
3220 + & \
3221 + ( ~BIT_OFFSET_LEN_MASK_16(__BitOffset, __BitLen) ) \
3222 + )
3223 +
3224 +#define SET_BITS_TO_LE_2BYTE(__pStart, __BitOffset, __BitLen, __Value) \
3225 + *((u16 *)(__pStart)) = \
3226 + EF2Byte( \
3227 + LE_BITS_CLEARED_TO_2BYTE(__pStart, __BitOffset, __BitLen) \
3228 + | \
3229 + ( (((u16)__Value) & BIT_LEN_MASK_16(__BitLen)) << (__BitOffset) ) \
3230 + );
3231 +
3232 +#define BIT_LEN_MASK_8(__BitLen) \
3233 + (0xFF >> (8 - (__BitLen)))
3234 +
3235 +#define BIT_OFFSET_LEN_MASK_8(__BitOffset, __BitLen) \
3236 + (BIT_LEN_MASK_8(__BitLen) << (__BitOffset))
3237 +
3238 +#define LE_P1BYTE_TO_HOST_1BYTE(__pStart) \
3239 + (EF1Byte(*((u8 *)(__pStart))))
3240 +
3241 +#define LE_BITS_TO_1BYTE(__pStart, __BitOffset, __BitLen) \
3242 + ( \
3243 + ( LE_P1BYTE_TO_HOST_1BYTE(__pStart) >> (__BitOffset) ) \
3244 + & \
3245 + BIT_LEN_MASK_8(__BitLen) \
3246 + )
3247 +
3248 +#define LE_BITS_CLEARED_TO_1BYTE(__pStart, __BitOffset, __BitLen) \
3249 + ( \
3250 + LE_P1BYTE_TO_HOST_1BYTE(__pStart) \
3251 + & \
3252 + ( ~BIT_OFFSET_LEN_MASK_8(__BitOffset, __BitLen) ) \
3253 + )
3254 +
3255 +#define SET_BITS_TO_LE_1BYTE(__pStart, __BitOffset, __BitLen, __Value) \
3256 + *((u8 *)(__pStart)) = \
3257 + EF1Byte( \
3258 + LE_BITS_CLEARED_TO_1BYTE(__pStart, __BitOffset, __BitLen) \
3259 + | \
3260 + ( (((u8)__Value) & BIT_LEN_MASK_8(__BitLen)) << (__BitOffset) ) \
3261 + );
3262 +
3263 +#endif // #ifndef __INC_ENDIANFREE_H
3264 --- /dev/null
3265 +++ b/drivers/staging/rtl8192e/ieee80211/aes.c
3266 @@ -0,0 +1,469 @@
3267 +/*
3268 + * Cryptographic API.
3269 + *
3270 + * AES Cipher Algorithm.
3271 + *
3272 + * Based on Brian Gladman's code.
3273 + *
3274 + * Linux developers:
3275 + * Alexander Kjeldaas <astor@fast.no>
3276 + * Herbert Valerio Riedel <hvr@hvrlab.org>
3277 + * Kyle McMartin <kyle@debian.org>
3278 + * Adam J. Richter <adam@yggdrasil.com> (conversion to 2.5 API).
3279 + *
3280 + * This program is free software; you can redistribute it and/or modify
3281 + * it under the terms of the GNU General Public License as published by
3282 + * the Free Software Foundation; either version 2 of the License, or
3283 + * (at your option) any later version.
3284 + *
3285 + * ---------------------------------------------------------------------------
3286 + * Copyright (c) 2002, Dr Brian Gladman <brg@gladman.me.uk>, Worcester, UK.
3287 + * All rights reserved.
3288 + *
3289 + * LICENSE TERMS
3290 + *
3291 + * The free distribution and use of this software in both source and binary
3292 + * form is allowed (with or without changes) provided that:
3293 + *
3294 + * 1. distributions of this source code include the above copyright
3295 + * notice, this list of conditions and the following disclaimer;
3296 + *
3297 + * 2. distributions in binary form include the above copyright
3298 + * notice, this list of conditions and the following disclaimer
3299 + * in the documentation and/or other associated materials;
3300 + *
3301 + * 3. the copyright holder's name is not used to endorse products
3302 + * built using this software without specific written permission.
3303 + *
3304 + * ALTERNATIVELY, provided that this notice is retained in full, this product
3305 + * may be distributed under the terms of the GNU General Public License (GPL),
3306 + * in which case the provisions of the GPL apply INSTEAD OF those given above.
3307 + *
3308 + * DISCLAIMER
3309 + *
3310 + * This software is provided 'as is' with no explicit or implied warranties
3311 + * in respect of its properties, including, but not limited to, correctness
3312 + * and/or fitness for purpose.
3313 + * ---------------------------------------------------------------------------
3314 + */
3315 +
3316 +/* Some changes from the Gladman version:
3317 + s/RIJNDAEL(e_key)/E_KEY/g
3318 + s/RIJNDAEL(d_key)/D_KEY/g
3319 +*/
3320 +
3321 +#include <linux/module.h>
3322 +#include <linux/init.h>
3323 +#include <linux/types.h>
3324 +#include <linux/errno.h>
3325 +//#include <linux/crypto.h>
3326 +#include "rtl_crypto.h"
3327 +#include <asm/byteorder.h>
3328 +
3329 +#define AES_MIN_KEY_SIZE 16
3330 +#define AES_MAX_KEY_SIZE 32
3331 +
3332 +#define AES_BLOCK_SIZE 16
3333 +
3334 +static inline
3335 +u32 generic_rotr32 (const u32 x, const unsigned bits)
3336 +{
3337 + const unsigned n = bits % 32;
3338 + return (x >> n) | (x << (32 - n));
3339 +}
3340 +
3341 +static inline
3342 +u32 generic_rotl32 (const u32 x, const unsigned bits)
3343 +{
3344 + const unsigned n = bits % 32;
3345 + return (x << n) | (x >> (32 - n));
3346 +}
3347 +
3348 +#define rotl generic_rotl32
3349 +#define rotr generic_rotr32
3350 +
3351 +/*
3352 + * #define byte(x, nr) ((unsigned char)((x) >> (nr*8)))
3353 + */
3354 +inline static u8
3355 +byte(const u32 x, const unsigned n)
3356 +{
3357 + return x >> (n << 3);
3358 +}
3359 +
3360 +#define u32_in(x) le32_to_cpu(*(const u32 *)(x))
3361 +#define u32_out(to, from) (*(u32 *)(to) = cpu_to_le32(from))
3362 +
3363 +struct aes_ctx {
3364 + int key_length;
3365 + u32 E[60];
3366 + u32 D[60];
3367 +};
3368 +
3369 +#define E_KEY ctx->E
3370 +#define D_KEY ctx->D
3371 +
3372 +static u8 pow_tab[256] __initdata;
3373 +static u8 log_tab[256] __initdata;
3374 +static u8 sbx_tab[256] __initdata;
3375 +static u8 isb_tab[256] __initdata;
3376 +static u32 rco_tab[10];
3377 +static u32 ft_tab[4][256];
3378 +static u32 it_tab[4][256];
3379 +
3380 +static u32 fl_tab[4][256];
3381 +static u32 il_tab[4][256];
3382 +
3383 +static inline u8 __init
3384 +f_mult (u8 a, u8 b)
3385 +{
3386 + u8 aa = log_tab[a], cc = aa + log_tab[b];
3387 +
3388 + return pow_tab[cc + (cc < aa ? 1 : 0)];
3389 +}
3390 +
3391 +#define ff_mult(a,b) (a && b ? f_mult(a, b) : 0)
3392 +
3393 +#define f_rn(bo, bi, n, k) \
3394 + bo[n] = ft_tab[0][byte(bi[n],0)] ^ \
3395 + ft_tab[1][byte(bi[(n + 1) & 3],1)] ^ \
3396 + ft_tab[2][byte(bi[(n + 2) & 3],2)] ^ \
3397 + ft_tab[3][byte(bi[(n + 3) & 3],3)] ^ *(k + n)
3398 +
3399 +#define i_rn(bo, bi, n, k) \
3400 + bo[n] = it_tab[0][byte(bi[n],0)] ^ \
3401 + it_tab[1][byte(bi[(n + 3) & 3],1)] ^ \
3402 + it_tab[2][byte(bi[(n + 2) & 3],2)] ^ \
3403 + it_tab[3][byte(bi[(n + 1) & 3],3)] ^ *(k + n)
3404 +
3405 +#define ls_box(x) \
3406 + ( fl_tab[0][byte(x, 0)] ^ \
3407 + fl_tab[1][byte(x, 1)] ^ \
3408 + fl_tab[2][byte(x, 2)] ^ \
3409 + fl_tab[3][byte(x, 3)] )
3410 +
3411 +#define f_rl(bo, bi, n, k) \
3412 + bo[n] = fl_tab[0][byte(bi[n],0)] ^ \
3413 + fl_tab[1][byte(bi[(n + 1) & 3],1)] ^ \
3414 + fl_tab[2][byte(bi[(n + 2) & 3],2)] ^ \
3415 + fl_tab[3][byte(bi[(n + 3) & 3],3)] ^ *(k + n)
3416 +
3417 +#define i_rl(bo, bi, n, k) \
3418 + bo[n] = il_tab[0][byte(bi[n],0)] ^ \
3419 + il_tab[1][byte(bi[(n + 3) & 3],1)] ^ \
3420 + il_tab[2][byte(bi[(n + 2) & 3],2)] ^ \
3421 + il_tab[3][byte(bi[(n + 1) & 3],3)] ^ *(k + n)
3422 +
3423 +static void __init
3424 +gen_tabs (void)
3425 +{
3426 + u32 i, t;
3427 + u8 p, q;
3428 +
3429 + /* log and power tables for GF(2**8) finite field with
3430 + 0x011b as modular polynomial - the simplest primitive
3431 + root is 0x03, used here to generate the tables */
3432 +
3433 + for (i = 0, p = 1; i < 256; ++i) {
3434 + pow_tab[i] = (u8) p;
3435 + log_tab[p] = (u8) i;
3436 +
3437 + p ^= (p << 1) ^ (p & 0x80 ? 0x01b : 0);
3438 + }
3439 +
3440 + log_tab[1] = 0;
3441 +
3442 + for (i = 0, p = 1; i < 10; ++i) {
3443 + rco_tab[i] = p;
3444 +
3445 + p = (p << 1) ^ (p & 0x80 ? 0x01b : 0);
3446 + }
3447 +
3448 + for (i = 0; i < 256; ++i) {
3449 + p = (i ? pow_tab[255 - log_tab[i]] : 0);
3450 + q = ((p >> 7) | (p << 1)) ^ ((p >> 6) | (p << 2));
3451 + p ^= 0x63 ^ q ^ ((q >> 6) | (q << 2));
3452 + sbx_tab[i] = p;
3453 + isb_tab[p] = (u8) i;
3454 + }
3455 +
3456 + for (i = 0; i < 256; ++i) {
3457 + p = sbx_tab[i];
3458 +
3459 + t = p;
3460 + fl_tab[0][i] = t;
3461 + fl_tab[1][i] = rotl (t, 8);
3462 + fl_tab[2][i] = rotl (t, 16);
3463 + fl_tab[3][i] = rotl (t, 24);
3464 +
3465 + t = ((u32) ff_mult (2, p)) |
3466 + ((u32) p << 8) |
3467 + ((u32) p << 16) | ((u32) ff_mult (3, p) << 24);
3468 +
3469 + ft_tab[0][i] = t;
3470 + ft_tab[1][i] = rotl (t, 8);
3471 + ft_tab[2][i] = rotl (t, 16);
3472 + ft_tab[3][i] = rotl (t, 24);
3473 +
3474 + p = isb_tab[i];
3475 +
3476 + t = p;
3477 + il_tab[0][i] = t;
3478 + il_tab[1][i] = rotl (t, 8);
3479 + il_tab[2][i] = rotl (t, 16);
3480 + il_tab[3][i] = rotl (t, 24);
3481 +
3482 + t = ((u32) ff_mult (14, p)) |
3483 + ((u32) ff_mult (9, p) << 8) |
3484 + ((u32) ff_mult (13, p) << 16) |
3485 + ((u32) ff_mult (11, p) << 24);
3486 +
3487 + it_tab[0][i] = t;
3488 + it_tab[1][i] = rotl (t, 8);
3489 + it_tab[2][i] = rotl (t, 16);
3490 + it_tab[3][i] = rotl (t, 24);
3491 + }
3492 +}
3493 +
3494 +#define star_x(x) (((x) & 0x7f7f7f7f) << 1) ^ ((((x) & 0x80808080) >> 7) * 0x1b)
3495 +
3496 +#define imix_col(y,x) \
3497 + u = star_x(x); \
3498 + v = star_x(u); \
3499 + w = star_x(v); \
3500 + t = w ^ (x); \
3501 + (y) = u ^ v ^ w; \
3502 + (y) ^= rotr(u ^ t, 8) ^ \
3503 + rotr(v ^ t, 16) ^ \
3504 + rotr(t,24)
3505 +
3506 +/* initialise the key schedule from the user supplied key */
3507 +
3508 +#define loop4(i) \
3509 +{ t = rotr(t, 8); t = ls_box(t) ^ rco_tab[i]; \
3510 + t ^= E_KEY[4 * i]; E_KEY[4 * i + 4] = t; \
3511 + t ^= E_KEY[4 * i + 1]; E_KEY[4 * i + 5] = t; \
3512 + t ^= E_KEY[4 * i + 2]; E_KEY[4 * i + 6] = t; \
3513 + t ^= E_KEY[4 * i + 3]; E_KEY[4 * i + 7] = t; \
3514 +}
3515 +
3516 +#define loop6(i) \
3517 +{ t = rotr(t, 8); t = ls_box(t) ^ rco_tab[i]; \
3518 + t ^= E_KEY[6 * i]; E_KEY[6 * i + 6] = t; \
3519 + t ^= E_KEY[6 * i + 1]; E_KEY[6 * i + 7] = t; \
3520 + t ^= E_KEY[6 * i + 2]; E_KEY[6 * i + 8] = t; \
3521 + t ^= E_KEY[6 * i + 3]; E_KEY[6 * i + 9] = t; \
3522 + t ^= E_KEY[6 * i + 4]; E_KEY[6 * i + 10] = t; \
3523 + t ^= E_KEY[6 * i + 5]; E_KEY[6 * i + 11] = t; \
3524 +}
3525 +
3526 +#define loop8(i) \
3527 +{ t = rotr(t, 8); ; t = ls_box(t) ^ rco_tab[i]; \
3528 + t ^= E_KEY[8 * i]; E_KEY[8 * i + 8] = t; \
3529 + t ^= E_KEY[8 * i + 1]; E_KEY[8 * i + 9] = t; \
3530 + t ^= E_KEY[8 * i + 2]; E_KEY[8 * i + 10] = t; \
3531 + t ^= E_KEY[8 * i + 3]; E_KEY[8 * i + 11] = t; \
3532 + t = E_KEY[8 * i + 4] ^ ls_box(t); \
3533 + E_KEY[8 * i + 12] = t; \
3534 + t ^= E_KEY[8 * i + 5]; E_KEY[8 * i + 13] = t; \
3535 + t ^= E_KEY[8 * i + 6]; E_KEY[8 * i + 14] = t; \
3536 + t ^= E_KEY[8 * i + 7]; E_KEY[8 * i + 15] = t; \
3537 +}
3538 +
3539 +static int
3540 +aes_set_key(void *ctx_arg, const u8 *in_key, unsigned int key_len, u32 *flags)
3541 +{
3542 + struct aes_ctx *ctx = ctx_arg;
3543 + u32 i, t, u, v, w;
3544 +
3545 + if (key_len != 16 && key_len != 24 && key_len != 32) {
3546 + *flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
3547 + return -EINVAL;
3548 + }
3549 +
3550 + ctx->key_length = key_len;
3551 +
3552 + E_KEY[0] = u32_in (in_key);
3553 + E_KEY[1] = u32_in (in_key + 4);
3554 + E_KEY[2] = u32_in (in_key + 8);
3555 + E_KEY[3] = u32_in (in_key + 12);
3556 +
3557 + switch (key_len) {
3558 + case 16:
3559 + t = E_KEY[3];
3560 + for (i = 0; i < 10; ++i)
3561 + loop4 (i);
3562 + break;
3563 +
3564 + case 24:
3565 + E_KEY[4] = u32_in (in_key + 16);
3566 + t = E_KEY[5] = u32_in (in_key + 20);
3567 + for (i = 0; i < 8; ++i)
3568 + loop6 (i);
3569 + break;
3570 +
3571 + case 32:
3572 + E_KEY[4] = u32_in (in_key + 16);
3573 + E_KEY[5] = u32_in (in_key + 20);
3574 + E_KEY[6] = u32_in (in_key + 24);
3575 + t = E_KEY[7] = u32_in (in_key + 28);
3576 + for (i = 0; i < 7; ++i)
3577 + loop8 (i);
3578 + break;
3579 + }
3580 +
3581 + D_KEY[0] = E_KEY[0];
3582 + D_KEY[1] = E_KEY[1];
3583 + D_KEY[2] = E_KEY[2];
3584 + D_KEY[3] = E_KEY[3];
3585 +
3586 + for (i = 4; i < key_len + 24; ++i) {
3587 + imix_col (D_KEY[i], E_KEY[i]);
3588 + }
3589 +
3590 + return 0;
3591 +}
3592 +
3593 +/* encrypt a block of text */
3594 +
3595 +#define f_nround(bo, bi, k) \
3596 + f_rn(bo, bi, 0, k); \
3597 + f_rn(bo, bi, 1, k); \
3598 + f_rn(bo, bi, 2, k); \
3599 + f_rn(bo, bi, 3, k); \
3600 + k += 4
3601 +
3602 +#define f_lround(bo, bi, k) \
3603 + f_rl(bo, bi, 0, k); \
3604 + f_rl(bo, bi, 1, k); \
3605 + f_rl(bo, bi, 2, k); \
3606 + f_rl(bo, bi, 3, k)
3607 +
3608 +static void aes_encrypt(void *ctx_arg, u8 *out, const u8 *in)
3609 +{
3610 + const struct aes_ctx *ctx = ctx_arg;
3611 + u32 b0[4], b1[4];
3612 + const u32 *kp = E_KEY + 4;
3613 +
3614 + b0[0] = u32_in (in) ^ E_KEY[0];
3615 + b0[1] = u32_in (in + 4) ^ E_KEY[1];
3616 + b0[2] = u32_in (in + 8) ^ E_KEY[2];
3617 + b0[3] = u32_in (in + 12) ^ E_KEY[3];
3618 +
3619 + if (ctx->key_length > 24) {
3620 + f_nround (b1, b0, kp);
3621 + f_nround (b0, b1, kp);
3622 + }
3623 +
3624 + if (ctx->key_length > 16) {
3625 + f_nround (b1, b0, kp);
3626 + f_nround (b0, b1, kp);
3627 + }
3628 +
3629 + f_nround (b1, b0, kp);
3630 + f_nround (b0, b1, kp);
3631 + f_nround (b1, b0, kp);
3632 + f_nround (b0, b1, kp);
3633 + f_nround (b1, b0, kp);
3634 + f_nround (b0, b1, kp);
3635 + f_nround (b1, b0, kp);
3636 + f_nround (b0, b1, kp);
3637 + f_nround (b1, b0, kp);
3638 + f_lround (b0, b1, kp);
3639 +
3640 + u32_out (out, b0[0]);
3641 + u32_out (out + 4, b0[1]);
3642 + u32_out (out + 8, b0[2]);
3643 + u32_out (out + 12, b0[3]);
3644 +}
3645 +
3646 +/* decrypt a block of text */
3647 +
3648 +#define i_nround(bo, bi, k) \
3649 + i_rn(bo, bi, 0, k); \
3650 + i_rn(bo, bi, 1, k); \
3651 + i_rn(bo, bi, 2, k); \
3652 + i_rn(bo, bi, 3, k); \
3653 + k -= 4
3654 +
3655 +#define i_lround(bo, bi, k) \
3656 + i_rl(bo, bi, 0, k); \
3657 + i_rl(bo, bi, 1, k); \
3658 + i_rl(bo, bi, 2, k); \
3659 + i_rl(bo, bi, 3, k)
3660 +
3661 +static void aes_decrypt(void *ctx_arg, u8 *out, const u8 *in)
3662 +{
3663 + const struct aes_ctx *ctx = ctx_arg;
3664 + u32 b0[4], b1[4];
3665 + const int key_len = ctx->key_length;
3666 + const u32 *kp = D_KEY + key_len + 20;
3667 +
3668 + b0[0] = u32_in (in) ^ E_KEY[key_len + 24];
3669 + b0[1] = u32_in (in + 4) ^ E_KEY[key_len + 25];
3670 + b0[2] = u32_in (in + 8) ^ E_KEY[key_len + 26];
3671 + b0[3] = u32_in (in + 12) ^ E_KEY[key_len + 27];
3672 +
3673 + if (key_len > 24) {
3674 + i_nround (b1, b0, kp);
3675 + i_nround (b0, b1, kp);
3676 + }
3677 +
3678 + if (key_len > 16) {
3679 + i_nround (b1, b0, kp);
3680 + i_nround (b0, b1, kp);
3681 + }
3682 +
3683 + i_nround (b1, b0, kp);
3684 + i_nround (b0, b1, kp);
3685 + i_nround (b1, b0, kp);
3686 + i_nround (b0, b1, kp);
3687 + i_nround (b1, b0, kp);
3688 + i_nround (b0, b1, kp);
3689 + i_nround (b1, b0, kp);
3690 + i_nround (b0, b1, kp);
3691 + i_nround (b1, b0, kp);
3692 + i_lround (b0, b1, kp);
3693 +
3694 + u32_out (out, b0[0]);
3695 + u32_out (out + 4, b0[1]);
3696 + u32_out (out + 8, b0[2]);
3697 + u32_out (out + 12, b0[3]);
3698 +}
3699 +
3700 +
3701 +static struct crypto_alg aes_alg = {
3702 + .cra_name = "aes",
3703 + .cra_flags = CRYPTO_ALG_TYPE_CIPHER,
3704 + .cra_blocksize = AES_BLOCK_SIZE,
3705 + .cra_ctxsize = sizeof(struct aes_ctx),
3706 + .cra_module = THIS_MODULE,
3707 + .cra_list = LIST_HEAD_INIT(aes_alg.cra_list),
3708 + .cra_u = {
3709 + .cipher = {
3710 + .cia_min_keysize = AES_MIN_KEY_SIZE,
3711 + .cia_max_keysize = AES_MAX_KEY_SIZE,
3712 + .cia_setkey = aes_set_key,
3713 + .cia_encrypt = aes_encrypt,
3714 + .cia_decrypt = aes_decrypt
3715 + }
3716 + }
3717 +};
3718 +
3719 +static int __init aes_init(void)
3720 +{
3721 + gen_tabs();
3722 + return crypto_register_alg(&aes_alg);
3723 +}
3724 +
3725 +static void __exit aes_fini(void)
3726 +{
3727 + crypto_unregister_alg(&aes_alg);
3728 +}
3729 +
3730 +module_init(aes_init);
3731 +module_exit(aes_fini);
3732 +
3733 +MODULE_DESCRIPTION("Rijndael (AES) Cipher Algorithm");
3734 +MODULE_LICENSE("Dual BSD/GPL");
3735 +
3736 --- /dev/null
3737 +++ b/drivers/staging/rtl8192e/ieee80211/api.c
3738 @@ -0,0 +1,246 @@
3739 +/*
3740 + * Scatterlist Cryptographic API.
3741 + *
3742 + * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
3743 + * Copyright (c) 2002 David S. Miller (davem@redhat.com)
3744 + *
3745 + * Portions derived from Cryptoapi, by Alexander Kjeldaas <astor@fast.no>
3746 + * and Nettle, by Niels Mé°ˆler.
3747 + *
3748 + * This program is free software; you can redistribute it and/or modify it
3749 + * under the terms of the GNU General Public License as published by the Free
3750 + * Software Foundation; either version 2 of the License, or (at your option)
3751 + * any later version.
3752 + *
3753 + */
3754 +#include "kmap_types.h"
3755 +
3756 +#include <linux/init.h>
3757 +#include <linux/module.h>
3758 +//#include <linux/crypto.h>
3759 +#include "rtl_crypto.h"
3760 +#include <linux/errno.h>
3761 +#include <linux/rwsem.h>
3762 +#include <linux/slab.h>
3763 +#include "internal.h"
3764 +
3765 +LIST_HEAD(crypto_alg_list);
3766 +DECLARE_RWSEM(crypto_alg_sem);
3767 +
3768 +static inline int crypto_alg_get(struct crypto_alg *alg)
3769 +{
3770 + return try_inc_mod_count(alg->cra_module);
3771 +}
3772 +
3773 +static inline void crypto_alg_put(struct crypto_alg *alg)
3774 +{
3775 + if (alg->cra_module)
3776 + __MOD_DEC_USE_COUNT(alg->cra_module);
3777 +}
3778 +
3779 +struct crypto_alg *crypto_alg_lookup(const char *name)
3780 +{
3781 + struct crypto_alg *q, *alg = NULL;
3782 +
3783 + if (!name)
3784 + return NULL;
3785 +
3786 + down_read(&crypto_alg_sem);
3787 +
3788 + list_for_each_entry(q, &crypto_alg_list, cra_list) {
3789 + if (!(strcmp(q->cra_name, name))) {
3790 + if (crypto_alg_get(q))
3791 + alg = q;
3792 + break;
3793 + }
3794 + }
3795 +
3796 + up_read(&crypto_alg_sem);
3797 + return alg;
3798 +}
3799 +
3800 +static int crypto_init_flags(struct crypto_tfm *tfm, u32 flags)
3801 +{
3802 + tfm->crt_flags = 0;
3803 +
3804 + switch (crypto_tfm_alg_type(tfm)) {
3805 + case CRYPTO_ALG_TYPE_CIPHER:
3806 + return crypto_init_cipher_flags(tfm, flags);
3807 +
3808 + case CRYPTO_ALG_TYPE_DIGEST:
3809 + return crypto_init_digest_flags(tfm, flags);
3810 +
3811 + case CRYPTO_ALG_TYPE_COMPRESS:
3812 + return crypto_init_compress_flags(tfm, flags);
3813 +
3814 + default:
3815 + break;
3816 + }
3817 +
3818 + BUG();
3819 + return -EINVAL;
3820 +}
3821 +
3822 +static int crypto_init_ops(struct crypto_tfm *tfm)
3823 +{
3824 + switch (crypto_tfm_alg_type(tfm)) {
3825 + case CRYPTO_ALG_TYPE_CIPHER:
3826 + return crypto_init_cipher_ops(tfm);
3827 +
3828 + case CRYPTO_ALG_TYPE_DIGEST:
3829 + return crypto_init_digest_ops(tfm);
3830 +
3831 + case CRYPTO_ALG_TYPE_COMPRESS:
3832 + return crypto_init_compress_ops(tfm);
3833 +
3834 + default:
3835 + break;
3836 + }
3837 +
3838 + BUG();
3839 + return -EINVAL;
3840 +}
3841 +
3842 +static void crypto_exit_ops(struct crypto_tfm *tfm)
3843 +{
3844 + switch (crypto_tfm_alg_type(tfm)) {
3845 + case CRYPTO_ALG_TYPE_CIPHER:
3846 + crypto_exit_cipher_ops(tfm);
3847 + break;
3848 +
3849 + case CRYPTO_ALG_TYPE_DIGEST:
3850 + crypto_exit_digest_ops(tfm);
3851 + break;
3852 +
3853 + case CRYPTO_ALG_TYPE_COMPRESS:
3854 + crypto_exit_compress_ops(tfm);
3855 + break;
3856 +
3857 + default:
3858 + BUG();
3859 +
3860 + }
3861 +}
3862 +
3863 +struct crypto_tfm *crypto_alloc_tfm(const char *name, u32 flags)
3864 +{
3865 + struct crypto_tfm *tfm = NULL;
3866 + struct crypto_alg *alg;
3867 +
3868 + alg = crypto_alg_mod_lookup(name);
3869 + if (alg == NULL)
3870 + goto out;
3871 +
3872 + tfm = kmalloc(sizeof(*tfm) + alg->cra_ctxsize, GFP_KERNEL);
3873 + if (tfm == NULL)
3874 + goto out_put;
3875 +
3876 + memset(tfm, 0, sizeof(*tfm) + alg->cra_ctxsize);
3877 +
3878 + tfm->__crt_alg = alg;
3879 +
3880 + if (crypto_init_flags(tfm, flags))
3881 + goto out_free_tfm;
3882 +
3883 + if (crypto_init_ops(tfm)) {
3884 + crypto_exit_ops(tfm);
3885 + goto out_free_tfm;
3886 + }
3887 +
3888 + goto out;
3889 +
3890 +out_free_tfm:
3891 + kfree(tfm);
3892 + tfm = NULL;
3893 +out_put:
3894 + crypto_alg_put(alg);
3895 +out:
3896 + return tfm;
3897 +}
3898 +
3899 +void crypto_free_tfm(struct crypto_tfm *tfm)
3900 +{
3901 + struct crypto_alg *alg = tfm->__crt_alg;
3902 + int size = sizeof(*tfm) + alg->cra_ctxsize;
3903 +
3904 + crypto_exit_ops(tfm);
3905 + crypto_alg_put(alg);
3906 + memset(tfm, 0, size);
3907 + kfree(tfm);
3908 +}
3909 +
3910 +int crypto_register_alg(struct crypto_alg *alg)
3911 +{
3912 + int ret = 0;
3913 + struct crypto_alg *q;
3914 +
3915 + down_write(&crypto_alg_sem);
3916 +
3917 + list_for_each_entry(q, &crypto_alg_list, cra_list) {
3918 + if (!(strcmp(q->cra_name, alg->cra_name))) {
3919 + ret = -EEXIST;
3920 + goto out;
3921 + }
3922 + }
3923 +
3924 + list_add_tail(&alg->cra_list, &crypto_alg_list);
3925 +out:
3926 + up_write(&crypto_alg_sem);
3927 + return ret;
3928 +}
3929 +
3930 +int crypto_unregister_alg(struct crypto_alg *alg)
3931 +{
3932 + int ret = -ENOENT;
3933 + struct crypto_alg *q;
3934 +
3935 + BUG_ON(!alg->cra_module);
3936 +
3937 + down_write(&crypto_alg_sem);
3938 + list_for_each_entry(q, &crypto_alg_list, cra_list) {
3939 + if (alg == q) {
3940 + list_del(&alg->cra_list);
3941 + ret = 0;
3942 + goto out;
3943 + }
3944 + }
3945 +out:
3946 + up_write(&crypto_alg_sem);
3947 + return ret;
3948 +}
3949 +
3950 +int crypto_alg_available(const char *name, u32 flags)
3951 +{
3952 + int ret = 0;
3953 + struct crypto_alg *alg = crypto_alg_mod_lookup(name);
3954 +
3955 + if (alg) {
3956 + crypto_alg_put(alg);
3957 + ret = 1;
3958 + }
3959 +
3960 + return ret;
3961 +}
3962 +
3963 +static int __init init_crypto(void)
3964 +{
3965 + printk(KERN_INFO "Initializing Cryptographic API\n");
3966 + crypto_init_proc();
3967 + return 0;
3968 +}
3969 +
3970 +__initcall(init_crypto);
3971 +
3972 +/*
3973 +EXPORT_SYMBOL_GPL(crypto_register_alg);
3974 +EXPORT_SYMBOL_GPL(crypto_unregister_alg);
3975 +EXPORT_SYMBOL_GPL(crypto_alloc_tfm);
3976 +EXPORT_SYMBOL_GPL(crypto_free_tfm);
3977 +EXPORT_SYMBOL_GPL(crypto_alg_available);
3978 +*/
3979 +
3980 +EXPORT_SYMBOL_NOVERS(crypto_register_alg);
3981 +EXPORT_SYMBOL_NOVERS(crypto_unregister_alg);
3982 +EXPORT_SYMBOL_NOVERS(crypto_alloc_tfm);
3983 +EXPORT_SYMBOL_NOVERS(crypto_free_tfm);
3984 +EXPORT_SYMBOL_NOVERS(crypto_alg_available);
3985 --- /dev/null
3986 +++ b/drivers/staging/rtl8192e/ieee80211/arc4.c
3987 @@ -0,0 +1,103 @@
3988 +/*
3989 + * Cryptographic API
3990 + *
3991 + * ARC4 Cipher Algorithm
3992 + *
3993 + * Jon Oberheide <jon@oberheide.org>
3994 + *
3995 + * This program is free software; you can redistribute it and/or modify
3996 + * it under the terms of the GNU General Public License as published by
3997 + * the Free Software Foundation; either version 2 of the License, or
3998 + * (at your option) any later version.
3999 + *
4000 + */
4001 +#include <linux/module.h>
4002 +#include <linux/init.h>
4003 +#include "rtl_crypto.h"
4004 +
4005 +#define ARC4_MIN_KEY_SIZE 1
4006 +#define ARC4_MAX_KEY_SIZE 256
4007 +#define ARC4_BLOCK_SIZE 1
4008 +
4009 +struct arc4_ctx {
4010 + u8 S[256];
4011 + u8 x, y;
4012 +};
4013 +
4014 +static int arc4_set_key(void *ctx_arg, const u8 *in_key, unsigned int key_len, u32 *flags)
4015 +{
4016 + struct arc4_ctx *ctx = ctx_arg;
4017 + int i, j = 0, k = 0;
4018 +
4019 + ctx->x = 1;
4020 + ctx->y = 0;
4021 +
4022 + for(i = 0; i < 256; i++)
4023 + ctx->S[i] = i;
4024 +
4025 + for(i = 0; i < 256; i++)
4026 + {
4027 + u8 a = ctx->S[i];
4028 + j = (j + in_key[k] + a) & 0xff;
4029 + ctx->S[i] = ctx->S[j];
4030 + ctx->S[j] = a;
4031 + if((unsigned int)++k >= key_len)
4032 + k = 0;
4033 + }
4034 +
4035 + return 0;
4036 +}
4037 +
4038 +static void arc4_crypt(void *ctx_arg, u8 *out, const u8 *in)
4039 +{
4040 + struct arc4_ctx *ctx = ctx_arg;
4041 +
4042 + u8 *const S = ctx->S;
4043 + u8 x = ctx->x;
4044 + u8 y = ctx->y;
4045 + u8 a, b;
4046 +
4047 + a = S[x];
4048 + y = (y + a) & 0xff;
4049 + b = S[y];
4050 + S[x] = b;
4051 + S[y] = a;
4052 + x = (x + 1) & 0xff;
4053 + *out++ = *in ^ S[(a + b) & 0xff];
4054 +
4055 + ctx->x = x;
4056 + ctx->y = y;
4057 +}
4058 +
4059 +static struct crypto_alg arc4_alg = {
4060 + .cra_name = "arc4",
4061 + .cra_flags = CRYPTO_ALG_TYPE_CIPHER,
4062 + .cra_blocksize = ARC4_BLOCK_SIZE,
4063 + .cra_ctxsize = sizeof(struct arc4_ctx),
4064 + .cra_module = THIS_MODULE,
4065 + .cra_list = LIST_HEAD_INIT(arc4_alg.cra_list),
4066 + .cra_u = { .cipher = {
4067 + .cia_min_keysize = ARC4_MIN_KEY_SIZE,
4068 + .cia_max_keysize = ARC4_MAX_KEY_SIZE,
4069 + .cia_setkey = arc4_set_key,
4070 + .cia_encrypt = arc4_crypt,
4071 + .cia_decrypt = arc4_crypt } }
4072 +};
4073 +
4074 +static int __init arc4_init(void)
4075 +{
4076 + return crypto_register_alg(&arc4_alg);
4077 +}
4078 +
4079 +
4080 +static void __exit arc4_exit(void)
4081 +{
4082 + crypto_unregister_alg(&arc4_alg);
4083 +}
4084 +
4085 +module_init(arc4_init);
4086 +module_exit(arc4_exit);
4087 +
4088 +MODULE_LICENSE("GPL");
4089 +MODULE_DESCRIPTION("ARC4 Cipher Algorithm");
4090 +MODULE_AUTHOR("Jon Oberheide <jon@oberheide.org>");
4091 --- /dev/null
4092 +++ b/drivers/staging/rtl8192e/ieee80211/autoload.c
4093 @@ -0,0 +1,40 @@
4094 +/*
4095 + * Cryptographic API.
4096 + *
4097 + * Algorithm autoloader.
4098 + *
4099 + * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
4100 + *
4101 + * This program is free software; you can redistribute it and/or modify it
4102 + * under the terms of the GNU General Public License as published by the Free
4103 + * Software Foundation; either version 2 of the License, or (at your option)
4104 + * any later version.
4105 + *
4106 + */
4107 +#include "kmap_types.h"
4108 +
4109 +#include <linux/kernel.h>
4110 +//#include <linux/crypto.h>
4111 +#include "rtl_crypto.h"
4112 +#include <linux/string.h>
4113 +#include <linux/kmod.h>
4114 +#include "internal.h"
4115 +
4116 +/*
4117 + * A far more intelligent version of this is planned. For now, just
4118 + * try an exact match on the name of the algorithm.
4119 + */
4120 +void crypto_alg_autoload(const char *name)
4121 +{
4122 + request_module(name);
4123 +}
4124 +
4125 +struct crypto_alg *crypto_alg_mod_lookup(const char *name)
4126 +{
4127 + struct crypto_alg *alg = crypto_alg_lookup(name);
4128 + if (alg == NULL) {
4129 + crypto_alg_autoload(name);
4130 + alg = crypto_alg_lookup(name);
4131 + }
4132 + return alg;
4133 +}
4134 --- /dev/null
4135 +++ b/drivers/staging/rtl8192e/ieee80211/cipher.c
4136 @@ -0,0 +1,299 @@
4137 +/*
4138 + * Cryptographic API.
4139 + *
4140 + * Cipher operations.
4141 + *
4142 + * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
4143 + *
4144 + * This program is free software; you can redistribute it and/or modify it
4145 + * under the terms of the GNU General Public License as published by the Free
4146 + * Software Foundation; either version 2 of the License, or (at your option)
4147 + * any later version.
4148 + *
4149 + */
4150 +#include <linux/kernel.h>
4151 +//#include <linux/crypto.h>
4152 +#include "rtl_crypto.h"
4153 +#include <linux/errno.h>
4154 +#include <linux/mm.h>
4155 +#include <linux/slab.h>
4156 +#include <asm/scatterlist.h>
4157 +#include "internal.h"
4158 +#include "scatterwalk.h"
4159 +
4160 +typedef void (cryptfn_t)(void *, u8 *, const u8 *);
4161 +typedef void (procfn_t)(struct crypto_tfm *, u8 *,
4162 + u8*, cryptfn_t, int enc, void *, int);
4163 +
4164 +static inline void xor_64(u8 *a, const u8 *b)
4165 +{
4166 + ((u32 *)a)[0] ^= ((u32 *)b)[0];
4167 + ((u32 *)a)[1] ^= ((u32 *)b)[1];
4168 +}
4169 +
4170 +static inline void xor_128(u8 *a, const u8 *b)
4171 +{
4172 + ((u32 *)a)[0] ^= ((u32 *)b)[0];
4173 + ((u32 *)a)[1] ^= ((u32 *)b)[1];
4174 + ((u32 *)a)[2] ^= ((u32 *)b)[2];
4175 + ((u32 *)a)[3] ^= ((u32 *)b)[3];
4176 +}
4177 +
4178 +
4179 +/*
4180 + * Generic encrypt/decrypt wrapper for ciphers, handles operations across
4181 + * multiple page boundaries by using temporary blocks. In user context,
4182 + * the kernel is given a chance to schedule us once per block.
4183 + */
4184 +static int crypt(struct crypto_tfm *tfm,
4185 + struct scatterlist *dst,
4186 + struct scatterlist *src,
4187 + unsigned int nbytes, cryptfn_t crfn,
4188 + procfn_t prfn, int enc, void *info)
4189 +{
4190 + struct scatter_walk walk_in, walk_out;
4191 + const unsigned int bsize = crypto_tfm_alg_blocksize(tfm);
4192 + u8 tmp_src[bsize];
4193 + u8 tmp_dst[bsize];
4194 +
4195 + if (!nbytes)
4196 + return 0;
4197 +
4198 + if (nbytes % bsize) {
4199 + tfm->crt_flags |= CRYPTO_TFM_RES_BAD_BLOCK_LEN;
4200 + return -EINVAL;
4201 + }
4202 +
4203 + scatterwalk_start(&walk_in, src);
4204 + scatterwalk_start(&walk_out, dst);
4205 +
4206 + for(;;) {
4207 + u8 *src_p, *dst_p;
4208 + int in_place;
4209 +
4210 + scatterwalk_map(&walk_in, 0);
4211 + scatterwalk_map(&walk_out, 1);
4212 + src_p = scatterwalk_whichbuf(&walk_in, bsize, tmp_src);
4213 + dst_p = scatterwalk_whichbuf(&walk_out, bsize, tmp_dst);
4214 + in_place = scatterwalk_samebuf(&walk_in, &walk_out,
4215 + src_p, dst_p);
4216 +
4217 + nbytes -= bsize;
4218 +
4219 + scatterwalk_copychunks(src_p, &walk_in, bsize, 0);
4220 +
4221 + prfn(tfm, dst_p, src_p, crfn, enc, info, in_place);
4222 +
4223 + scatterwalk_done(&walk_in, 0, nbytes);
4224 +
4225 + scatterwalk_copychunks(dst_p, &walk_out, bsize, 1);
4226 + scatterwalk_done(&walk_out, 1, nbytes);
4227 +
4228 + if (!nbytes)
4229 + return 0;
4230 +
4231 + crypto_yield(tfm);
4232 + }
4233 +}
4234 +
4235 +static void cbc_process(struct crypto_tfm *tfm, u8 *dst, u8 *src,
4236 + cryptfn_t fn, int enc, void *info, int in_place)
4237 +{
4238 + u8 *iv = info;
4239 +
4240 + /* Null encryption */
4241 + if (!iv)
4242 + return;
4243 +
4244 + if (enc) {
4245 + tfm->crt_u.cipher.cit_xor_block(iv, src);
4246 + fn(crypto_tfm_ctx(tfm), dst, iv);
4247 + memcpy(iv, dst, crypto_tfm_alg_blocksize(tfm));
4248 + } else {
4249 + u8 stack[in_place ? crypto_tfm_alg_blocksize(tfm) : 0];
4250 + u8 *buf = in_place ? stack : dst;
4251 +
4252 + fn(crypto_tfm_ctx(tfm), buf, src);
4253 + tfm->crt_u.cipher.cit_xor_block(buf, iv);
4254 + memcpy(iv, src, crypto_tfm_alg_blocksize(tfm));
4255 + if (buf != dst)
4256 + memcpy(dst, buf, crypto_tfm_alg_blocksize(tfm));
4257 + }
4258 +}
4259 +
4260 +static void ecb_process(struct crypto_tfm *tfm, u8 *dst, u8 *src,
4261 + cryptfn_t fn, int enc, void *info, int in_place)
4262 +{
4263 + fn(crypto_tfm_ctx(tfm), dst, src);
4264 +}
4265 +
4266 +static int setkey(struct crypto_tfm *tfm, const u8 *key, unsigned int keylen)
4267 +{
4268 + struct cipher_alg *cia = &tfm->__crt_alg->cra_cipher;
4269 +
4270 + if (keylen < cia->cia_min_keysize || keylen > cia->cia_max_keysize) {
4271 + tfm->crt_flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
4272 + return -EINVAL;
4273 + } else
4274 + return cia->cia_setkey(crypto_tfm_ctx(tfm), key, keylen,
4275 + &tfm->crt_flags);
4276 +}
4277 +
4278 +static int ecb_encrypt(struct crypto_tfm *tfm,
4279 + struct scatterlist *dst,
4280 + struct scatterlist *src, unsigned int nbytes)
4281 +{
4282 + return crypt(tfm, dst, src, nbytes,
4283 + tfm->__crt_alg->cra_cipher.cia_encrypt,
4284 + ecb_process, 1, NULL);
4285 +}
4286 +
4287 +static int ecb_decrypt(struct crypto_tfm *tfm,
4288 + struct scatterlist *dst,
4289 + struct scatterlist *src,
4290 + unsigned int nbytes)
4291 +{
4292 + return crypt(tfm, dst, src, nbytes,
4293 + tfm->__crt_alg->cra_cipher.cia_decrypt,
4294 + ecb_process, 1, NULL);
4295 +}
4296 +
4297 +static int cbc_encrypt(struct crypto_tfm *tfm,
4298 + struct scatterlist *dst,
4299 + struct scatterlist *src,
4300 + unsigned int nbytes)
4301 +{
4302 + return crypt(tfm, dst, src, nbytes,
4303 + tfm->__crt_alg->cra_cipher.cia_encrypt,
4304 + cbc_process, 1, tfm->crt_cipher.cit_iv);
4305 +}
4306 +
4307 +static int cbc_encrypt_iv(struct crypto_tfm *tfm,
4308 + struct scatterlist *dst,
4309 + struct scatterlist *src,
4310 + unsigned int nbytes, u8 *iv)
4311 +{
4312 + return crypt(tfm, dst, src, nbytes,
4313 + tfm->__crt_alg->cra_cipher.cia_encrypt,
4314 + cbc_process, 1, iv);
4315 +}
4316 +
4317 +static int cbc_decrypt(struct crypto_tfm *tfm,
4318 + struct scatterlist *dst,
4319 + struct scatterlist *src,
4320 + unsigned int nbytes)
4321 +{
4322 + return crypt(tfm, dst, src, nbytes,
4323 + tfm->__crt_alg->cra_cipher.cia_decrypt,
4324 + cbc_process, 0, tfm->crt_cipher.cit_iv);
4325 +}
4326 +
4327 +static int cbc_decrypt_iv(struct crypto_tfm *tfm,
4328 + struct scatterlist *dst,
4329 + struct scatterlist *src,
4330 + unsigned int nbytes, u8 *iv)
4331 +{
4332 + return crypt(tfm, dst, src, nbytes,
4333 + tfm->__crt_alg->cra_cipher.cia_decrypt,
4334 + cbc_process, 0, iv);
4335 +}
4336 +
4337 +static int nocrypt(struct crypto_tfm *tfm,
4338 + struct scatterlist *dst,
4339 + struct scatterlist *src,
4340 + unsigned int nbytes)
4341 +{
4342 + return -ENOSYS;
4343 +}
4344 +
4345 +static int nocrypt_iv(struct crypto_tfm *tfm,
4346 + struct scatterlist *dst,
4347 + struct scatterlist *src,
4348 + unsigned int nbytes, u8 *iv)
4349 +{
4350 + return -ENOSYS;
4351 +}
4352 +
4353 +int crypto_init_cipher_flags(struct crypto_tfm *tfm, u32 flags)
4354 +{
4355 + u32 mode = flags & CRYPTO_TFM_MODE_MASK;
4356 +
4357 + tfm->crt_cipher.cit_mode = mode ? mode : CRYPTO_TFM_MODE_ECB;
4358 + if (flags & CRYPTO_TFM_REQ_WEAK_KEY)
4359 + tfm->crt_flags = CRYPTO_TFM_REQ_WEAK_KEY;
4360 +
4361 + return 0;
4362 +}
4363 +
4364 +int crypto_init_cipher_ops(struct crypto_tfm *tfm)
4365 +{
4366 + int ret = 0;
4367 + struct cipher_tfm *ops = &tfm->crt_cipher;
4368 +
4369 + ops->cit_setkey = setkey;
4370 +
4371 + switch (tfm->crt_cipher.cit_mode) {
4372 + case CRYPTO_TFM_MODE_ECB:
4373 + ops->cit_encrypt = ecb_encrypt;
4374 + ops->cit_decrypt = ecb_decrypt;
4375 + break;
4376 +
4377 + case CRYPTO_TFM_MODE_CBC:
4378 + ops->cit_encrypt = cbc_encrypt;
4379 + ops->cit_decrypt = cbc_decrypt;
4380 + ops->cit_encrypt_iv = cbc_encrypt_iv;
4381 + ops->cit_decrypt_iv = cbc_decrypt_iv;
4382 + break;
4383 +
4384 + case CRYPTO_TFM_MODE_CFB:
4385 + ops->cit_encrypt = nocrypt;
4386 + ops->cit_decrypt = nocrypt;
4387 + ops->cit_encrypt_iv = nocrypt_iv;
4388 + ops->cit_decrypt_iv = nocrypt_iv;
4389 + break;
4390 +
4391 + case CRYPTO_TFM_MODE_CTR:
4392 + ops->cit_encrypt = nocrypt;
4393 + ops->cit_decrypt = nocrypt;
4394 + ops->cit_encrypt_iv = nocrypt_iv;
4395 + ops->cit_decrypt_iv = nocrypt_iv;
4396 + break;
4397 +
4398 + default:
4399 + BUG();
4400 + }
4401 +
4402 + if (ops->cit_mode == CRYPTO_TFM_MODE_CBC) {
4403 +
4404 + switch (crypto_tfm_alg_blocksize(tfm)) {
4405 + case 8:
4406 + ops->cit_xor_block = xor_64;
4407 + break;
4408 +
4409 + case 16:
4410 + ops->cit_xor_block = xor_128;
4411 + break;
4412 +
4413 + default:
4414 + printk(KERN_WARNING "%s: block size %u not supported\n",
4415 + crypto_tfm_alg_name(tfm),
4416 + crypto_tfm_alg_blocksize(tfm));
4417 + ret = -EINVAL;
4418 + goto out;
4419 + }
4420 +
4421 + ops->cit_ivsize = crypto_tfm_alg_blocksize(tfm);
4422 + ops->cit_iv = kmalloc(ops->cit_ivsize, GFP_KERNEL);
4423 + if (ops->cit_iv == NULL)
4424 + ret = -ENOMEM;
4425 + }
4426 +
4427 +out:
4428 + return ret;
4429 +}
4430 +
4431 +void crypto_exit_cipher_ops(struct crypto_tfm *tfm)
4432 +{
4433 + if (tfm->crt_cipher.cit_iv)
4434 + kfree(tfm->crt_cipher.cit_iv);
4435 +}
4436 --- /dev/null
4437 +++ b/drivers/staging/rtl8192e/ieee80211/compress.c
4438 @@ -0,0 +1,64 @@
4439 +/*
4440 + * Cryptographic API.
4441 + *
4442 + * Compression operations.
4443 + *
4444 + * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
4445 + *
4446 + * This program is free software; you can redistribute it and/or modify it
4447 + * under the terms of the GNU General Public License as published by the Free
4448 + * Software Foundation; either version 2 of the License, or (at your option)
4449 + * any later version.
4450 + *
4451 + */
4452 +#include <linux/types.h>
4453 +//#include <linux/crypto.h>
4454 +#include "rtl_crypto.h"
4455 +#include <linux/errno.h>
4456 +#include <asm/scatterlist.h>
4457 +#include <linux/string.h>
4458 +#include "internal.h"
4459 +
4460 +static int crypto_compress(struct crypto_tfm *tfm,
4461 + const u8 *src, unsigned int slen,
4462 + u8 *dst, unsigned int *dlen)
4463 +{
4464 + return tfm->__crt_alg->cra_compress.coa_compress(crypto_tfm_ctx(tfm),
4465 + src, slen, dst,
4466 + dlen);
4467 +}
4468 +
4469 +static int crypto_decompress(struct crypto_tfm *tfm,
4470 + const u8 *src, unsigned int slen,
4471 + u8 *dst, unsigned int *dlen)
4472 +{
4473 + return tfm->__crt_alg->cra_compress.coa_decompress(crypto_tfm_ctx(tfm),
4474 + src, slen, dst,
4475 + dlen);
4476 +}
4477 +
4478 +int crypto_init_compress_flags(struct crypto_tfm *tfm, u32 flags)
4479 +{
4480 + return flags ? -EINVAL : 0;
4481 +}
4482 +
4483 +int crypto_init_compress_ops(struct crypto_tfm *tfm)
4484 +{
4485 + int ret = 0;
4486 + struct compress_tfm *ops = &tfm->crt_compress;
4487 +
4488 + ret = tfm->__crt_alg->cra_compress.coa_init(crypto_tfm_ctx(tfm));
4489 + if (ret)
4490 + goto out;
4491 +
4492 + ops->cot_compress = crypto_compress;
4493 + ops->cot_decompress = crypto_decompress;
4494 +
4495 +out:
4496 + return ret;
4497 +}
4498 +
4499 +void crypto_exit_compress_ops(struct crypto_tfm *tfm)
4500 +{
4501 + tfm->__crt_alg->cra_compress.coa_exit(crypto_tfm_ctx(tfm));
4502 +}
4503 --- /dev/null
4504 +++ b/drivers/staging/rtl8192e/ieee80211/crypto_compat.h
4505 @@ -0,0 +1,90 @@
4506 +/*
4507 + * Header file to maintain compatibility among different kernel versions.
4508 + *
4509 + * Copyright (c) 2004-2006 <lawrence_wang@realsil.com.cn>
4510 + *
4511 + * This program is free software; you can redistribute it and/or modify
4512 + * it under the terms of the GNU General Public License version 2 as
4513 + * published by the Free Software Foundation. See README and COPYING for
4514 + * more details.
4515 + */
4516 +
4517 +#include <linux/crypto.h>
4518 +
4519 +static inline int crypto_cipher_encrypt(struct crypto_tfm *tfm,
4520 + struct scatterlist *dst,
4521 + struct scatterlist *src,
4522 + unsigned int nbytes)
4523 +{
4524 + BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
4525 + return tfm->crt_cipher.cit_encrypt(tfm, dst, src, nbytes);
4526 +}
4527 +
4528 +
4529 +static inline int crypto_cipher_decrypt(struct crypto_tfm *tfm,
4530 + struct scatterlist *dst,
4531 + struct scatterlist *src,
4532 + unsigned int nbytes)
4533 +{
4534 + BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
4535 + return tfm->crt_cipher.cit_decrypt(tfm, dst, src, nbytes);
4536 +}
4537 +
4538 +#if 0
4539 +/*
4540 + * crypto_free_tfm - Free crypto transform
4541 + * @tfm: Transform to free
4542 + *
4543 + * crypto_free_tfm() frees up the transform and any associated resources,
4544 + * then drops the refcount on the associated algorithm.
4545 + */
4546 +void crypto_free_tfm(struct crypto_tfm *tfm)
4547 +{
4548 + struct crypto_alg *alg;
4549 + int size;
4550 +
4551 + if (unlikely(!tfm))
4552 + return;
4553 +
4554 + alg = tfm->__crt_alg;
4555 + size = sizeof(*tfm) + alg->cra_ctxsize;
4556 +
4557 + if (alg->cra_exit)
4558 + alg->cra_exit(tfm);
4559 + crypto_exit_ops(tfm);
4560 + crypto_mod_put(alg);
4561 + memset(tfm, 0, size);
4562 + kfree(tfm);
4563 +}
4564 +
4565 +#endif
4566 +#if 1
4567 + struct crypto_tfm *crypto_alloc_tfm(const char *name, u32 flags)
4568 +{
4569 + struct crypto_tfm *tfm = NULL;
4570 + int err;
4571 + printk("call crypto_alloc_tfm!!!\n");
4572 + do {
4573 + struct crypto_alg *alg;
4574 +
4575 + alg = crypto_alg_mod_lookup(name, 0, CRYPTO_ALG_ASYNC);
4576 + err = PTR_ERR(alg);
4577 + if (IS_ERR(alg))
4578 + continue;
4579 +
4580 + tfm = __crypto_alloc_tfm(alg, flags);
4581 + err = 0;
4582 + if (IS_ERR(tfm)) {
4583 + crypto_mod_put(alg);
4584 + err = PTR_ERR(tfm);
4585 + tfm = NULL;
4586 + }
4587 + } while (err == -EAGAIN && !signal_pending(current));
4588 +
4589 + return tfm;
4590 +}
4591 +#endif
4592 +//EXPORT_SYMBOL_GPL(crypto_alloc_tfm);
4593 +//EXPORT_SYMBOL_GPL(crypto_free_tfm);
4594 +
4595 +
4596 --- /dev/null
4597 +++ b/drivers/staging/rtl8192e/ieee80211/digest.c
4598 @@ -0,0 +1,108 @@
4599 +/*
4600 + * Cryptographic API.
4601 + *
4602 + * Digest operations.
4603 + *
4604 + * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
4605 + *
4606 + * This program is free software; you can redistribute it and/or modify it
4607 + * under the terms of the GNU General Public License as published by the Free
4608 + * Software Foundation; either version 2 of the License, or (at your option)
4609 + * any later version.
4610 + *
4611 + */
4612 +//#include <linux/crypto.h>
4613 +#include "rtl_crypto.h"
4614 +#include <linux/mm.h>
4615 +#include <linux/errno.h>
4616 +#include <linux/highmem.h>
4617 +#include <asm/scatterlist.h>
4618 +#include "internal.h"
4619 +
4620 +static void init(struct crypto_tfm *tfm)
4621 +{
4622 + tfm->__crt_alg->cra_digest.dia_init(crypto_tfm_ctx(tfm));
4623 +}
4624 +
4625 +static void update(struct crypto_tfm *tfm,
4626 + struct scatterlist *sg, unsigned int nsg)
4627 +{
4628 + unsigned int i;
4629 +
4630 + for (i = 0; i < nsg; i++) {
4631 +
4632 + struct page *pg = sg[i].page;
4633 + unsigned int offset = sg[i].offset;
4634 + unsigned int l = sg[i].length;
4635 +
4636 + do {
4637 + unsigned int bytes_from_page = min(l, ((unsigned int)
4638 + (PAGE_SIZE)) -
4639 + offset);
4640 + char *p = crypto_kmap(pg, 0) + offset;
4641 +
4642 + tfm->__crt_alg->cra_digest.dia_update
4643 + (crypto_tfm_ctx(tfm), p,
4644 + bytes_from_page);
4645 + crypto_kunmap(p, 0);
4646 + crypto_yield(tfm);
4647 + offset = 0;
4648 + pg++;
4649 + l -= bytes_from_page;
4650 + } while (l > 0);
4651 + }
4652 +}
4653 +
4654 +static void final(struct crypto_tfm *tfm, u8 *out)
4655 +{
4656 + tfm->__crt_alg->cra_digest.dia_final(crypto_tfm_ctx(tfm), out);
4657 +}
4658 +
4659 +static int setkey(struct crypto_tfm *tfm, const u8 *key, unsigned int keylen)
4660 +{
4661 + u32 flags;
4662 + if (tfm->__crt_alg->cra_digest.dia_setkey == NULL)
4663 + return -ENOSYS;
4664 + return tfm->__crt_alg->cra_digest.dia_setkey(crypto_tfm_ctx(tfm),
4665 + key, keylen, &flags);
4666 +}
4667 +
4668 +static void digest(struct crypto_tfm *tfm,
4669 + struct scatterlist *sg, unsigned int nsg, u8 *out)
4670 +{
4671 + unsigned int i;
4672 +
4673 + tfm->crt_digest.dit_init(tfm);
4674 +
4675 + for (i = 0; i < nsg; i++) {
4676 + char *p = crypto_kmap(sg[i].page, 0) + sg[i].offset;
4677 + tfm->__crt_alg->cra_digest.dia_update(crypto_tfm_ctx(tfm),
4678 + p, sg[i].length);
4679 + crypto_kunmap(p, 0);
4680 + crypto_yield(tfm);
4681 + }
4682 + crypto_digest_final(tfm, out);
4683 +}
4684 +
4685 +int crypto_init_digest_flags(struct crypto_tfm *tfm, u32 flags)
4686 +{
4687 + return flags ? -EINVAL : 0;
4688 +}
4689 +
4690 +int crypto_init_digest_ops(struct crypto_tfm *tfm)
4691 +{
4692 + struct digest_tfm *ops = &tfm->crt_digest;
4693 +
4694 + ops->dit_init = init;
4695 + ops->dit_update = update;
4696 + ops->dit_final = final;
4697 + ops->dit_digest = digest;
4698 + ops->dit_setkey = setkey;
4699 +
4700 + return crypto_alloc_hmac_block(tfm);
4701 +}
4702 +
4703 +void crypto_exit_digest_ops(struct crypto_tfm *tfm)
4704 +{
4705 + crypto_free_hmac_block(tfm);
4706 +}
4707 --- /dev/null
4708 +++ b/drivers/staging/rtl8192e/ieee80211/dot11d.c
4709 @@ -0,0 +1,239 @@
4710 +#ifdef ENABLE_DOT11D
4711 +//-----------------------------------------------------------------------------
4712 +// File:
4713 +// Dot11d.c
4714 +//
4715 +// Description:
4716 +// Implement 802.11d.
4717 +//
4718 +//-----------------------------------------------------------------------------
4719 +
4720 +#include "dot11d.h"
4721 +
4722 +void
4723 +Dot11d_Init(struct ieee80211_device *ieee)
4724 +{
4725 + PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(ieee);
4726 +
4727 + pDot11dInfo->bEnabled = 0;
4728 +
4729 + pDot11dInfo->State = DOT11D_STATE_NONE;
4730 + pDot11dInfo->CountryIeLen = 0;
4731 + memset(pDot11dInfo->channel_map, 0, MAX_CHANNEL_NUMBER+1);
4732 + memset(pDot11dInfo->MaxTxPwrDbmList, 0xFF, MAX_CHANNEL_NUMBER+1);
4733 + RESET_CIE_WATCHDOG(ieee);
4734 +
4735 + printk("Dot11d_Init()\n");
4736 +}
4737 +
4738 +//
4739 +// Description:
4740 +// Reset to the state as we are just entering a regulatory domain.
4741 +//
4742 +void
4743 +Dot11d_Reset(struct ieee80211_device *ieee)
4744 +{
4745 + u32 i;
4746 + PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(ieee);
4747 +#if 0
4748 + if(!pDot11dInfo->bEnabled)
4749 + return;
4750 +#endif
4751 + // Clear old channel map
4752 + memset(pDot11dInfo->channel_map, 0, MAX_CHANNEL_NUMBER+1);
4753 + memset(pDot11dInfo->MaxTxPwrDbmList, 0xFF, MAX_CHANNEL_NUMBER+1);
4754 + // Set new channel map
4755 + for (i=1; i<=11; i++) {
4756 + (pDot11dInfo->channel_map)[i] = 1;
4757 + }
4758 + for (i=12; i<=14; i++) {
4759 + (pDot11dInfo->channel_map)[i] = 2;
4760 + }
4761 +
4762 + pDot11dInfo->State = DOT11D_STATE_NONE;
4763 + pDot11dInfo->CountryIeLen = 0;
4764 + RESET_CIE_WATCHDOG(ieee);
4765 +
4766 + //printk("Dot11d_Reset()\n");
4767 +}
4768 +
4769 +//
4770 +// Description:
4771 +// Update country IE from Beacon or Probe Resopnse
4772 +// and configure PHY for operation in the regulatory domain.
4773 +//
4774 +// TODO:
4775 +// Configure Tx power.
4776 +//
4777 +// Assumption:
4778 +// 1. IS_DOT11D_ENABLE() is TRUE.
4779 +// 2. Input IE is an valid one.
4780 +//
4781 +void
4782 +Dot11d_UpdateCountryIe(
4783 + struct ieee80211_device *dev,
4784 + u8 * pTaddr,
4785 + u16 CoutryIeLen,
4786 + u8 * pCoutryIe
4787 + )
4788 +{
4789 + PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(dev);
4790 + u8 i, j, NumTriples, MaxChnlNum;
4791 + PCHNL_TXPOWER_TRIPLE pTriple;
4792 +
4793 + memset(pDot11dInfo->channel_map, 0, MAX_CHANNEL_NUMBER+1);
4794 + memset(pDot11dInfo->MaxTxPwrDbmList, 0xFF, MAX_CHANNEL_NUMBER+1);
4795 + MaxChnlNum = 0;
4796 + NumTriples = (CoutryIeLen - 3) / 3; // skip 3-byte country string.
4797 + pTriple = (PCHNL_TXPOWER_TRIPLE)(pCoutryIe + 3);
4798 + for(i = 0; i < NumTriples; i++)
4799 + {
4800 + if(MaxChnlNum >= pTriple->FirstChnl)
4801 + { // It is not in a monotonically increasing order, so stop processing.
4802 + printk("Dot11d_UpdateCountryIe(): Invalid country IE, skip it........1\n");
4803 + return;
4804 + }
4805 + if(MAX_CHANNEL_NUMBER < (pTriple->FirstChnl + pTriple->NumChnls))
4806 + { // It is not a valid set of channel id, so stop processing.
4807 + printk("Dot11d_UpdateCountryIe(): Invalid country IE, skip it........2\n");
4808 + return;
4809 + }
4810 +
4811 + for(j = 0 ; j < pTriple->NumChnls; j++)
4812 + {
4813 + pDot11dInfo->channel_map[pTriple->FirstChnl + j] = 1;
4814 + pDot11dInfo->MaxTxPwrDbmList[pTriple->FirstChnl + j] = pTriple->MaxTxPowerInDbm;
4815 + MaxChnlNum = pTriple->FirstChnl + j;
4816 + }
4817 +
4818 + pTriple = (PCHNL_TXPOWER_TRIPLE)((u8*)pTriple + 3);
4819 + }
4820 +#if 1
4821 + //printk("Dot11d_UpdateCountryIe(): Channel List:\n");
4822 + printk("Channel List:");
4823 + for(i=1; i<= MAX_CHANNEL_NUMBER; i++)
4824 + if(pDot11dInfo->channel_map[i] > 0)
4825 + printk(" %d", i);
4826 + printk("\n");
4827 +#endif
4828 +
4829 + UPDATE_CIE_SRC(dev, pTaddr);
4830 +
4831 + pDot11dInfo->CountryIeLen = CoutryIeLen;
4832 + memcpy(pDot11dInfo->CountryIeBuf, pCoutryIe,CoutryIeLen);
4833 + pDot11dInfo->State = DOT11D_STATE_LEARNED;
4834 +}
4835 +
4836 +
4837 +u8
4838 +DOT11D_GetMaxTxPwrInDbm(
4839 + struct ieee80211_device *dev,
4840 + u8 Channel
4841 + )
4842 +{
4843 + PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(dev);
4844 + u8 MaxTxPwrInDbm = 255;
4845 +
4846 + if(MAX_CHANNEL_NUMBER < Channel)
4847 + {
4848 + printk("DOT11D_GetMaxTxPwrInDbm(): Invalid Channel\n");
4849 + return MaxTxPwrInDbm;
4850 + }
4851 + if(pDot11dInfo->channel_map[Channel])
4852 + {
4853 + MaxTxPwrInDbm = pDot11dInfo->MaxTxPwrDbmList[Channel];
4854 + }
4855 +
4856 + return MaxTxPwrInDbm;
4857 +}
4858 +
4859 +
4860 +void
4861 +DOT11D_ScanComplete(
4862 + struct ieee80211_device * dev
4863 + )
4864 +{
4865 + PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(dev);
4866 +
4867 + switch(pDot11dInfo->State)
4868 + {
4869 + case DOT11D_STATE_LEARNED:
4870 + pDot11dInfo->State = DOT11D_STATE_DONE;
4871 + break;
4872 +
4873 + case DOT11D_STATE_DONE:
4874 + if( GET_CIE_WATCHDOG(dev) == 0 )
4875 + { // Reset country IE if previous one is gone.
4876 + Dot11d_Reset(dev);
4877 + }
4878 + break;
4879 + case DOT11D_STATE_NONE:
4880 + break;
4881 + }
4882 +}
4883 +
4884 +int IsLegalChannel(
4885 + struct ieee80211_device * dev,
4886 + u8 channel
4887 +)
4888 +{
4889 + PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(dev);
4890 +
4891 + if(MAX_CHANNEL_NUMBER < channel)
4892 + {
4893 + printk("IsLegalChannel(): Invalid Channel\n");
4894 + return 0;
4895 + }
4896 + if(pDot11dInfo->channel_map[channel] > 0)
4897 + return 1;
4898 + return 0;
4899 +}
4900 +
4901 +int ToLegalChannel(
4902 + struct ieee80211_device * dev,
4903 + u8 channel
4904 +)
4905 +{
4906 + PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(dev);
4907 + u8 default_chn = 0;
4908 + u32 i = 0;
4909 +
4910 + for (i=1; i<= MAX_CHANNEL_NUMBER; i++)
4911 + {
4912 + if(pDot11dInfo->channel_map[i] > 0)
4913 + {
4914 + default_chn = i;
4915 + break;
4916 + }
4917 + }
4918 +
4919 + if(MAX_CHANNEL_NUMBER < channel)
4920 + {
4921 + printk("IsLegalChannel(): Invalid Channel\n");
4922 + return default_chn;
4923 + }
4924 +
4925 + if(pDot11dInfo->channel_map[channel] > 0)
4926 + return channel;
4927 +
4928 + return default_chn;
4929 +}
4930 +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
4931 +//EXPORT_SYMBOL(Dot11d_Init);
4932 +//EXPORT_SYMBOL(Dot11d_Reset);
4933 +//EXPORT_SYMBOL(Dot11d_UpdateCountryIe);
4934 +//EXPORT_SYMBOL(DOT11D_GetMaxTxPwrInDbm);
4935 +//EXPORT_SYMBOL(DOT11D_ScanComplete);
4936 +//EXPORT_SYMBOL(IsLegalChannel);
4937 +//EXPORT_SYMBOL(ToLegalChannel);
4938 +#else
4939 +EXPORT_SYMBOL_NOVERS(Dot11d_Init);
4940 +EXPORT_SYMBOL_NOVERS(Dot11d_Reset);
4941 +EXPORT_SYMBOL_NOVERS(Dot11d_UpdateCountryIe);
4942 +EXPORT_SYMBOL_NOVERS(DOT11D_GetMaxTxPwrInDbm);
4943 +EXPORT_SYMBOL_NOVERS(DOT11D_ScanComplete);
4944 +EXPORT_SYMBOL_NOVERS(IsLegalChannel);
4945 +EXPORT_SYMBOL_NOVERS(ToLegalChannel);
4946 +#endif
4947 +
4948 +#endif
4949 --- /dev/null
4950 +++ b/drivers/staging/rtl8192e/ieee80211/dot11d.h
4951 @@ -0,0 +1,102 @@
4952 +#ifndef __INC_DOT11D_H
4953 +#define __INC_DOT11D_H
4954 +
4955 +#ifdef ENABLE_DOT11D
4956 +#include "ieee80211.h"
4957 +
4958 +//#define ENABLE_DOT11D
4959 +
4960 +//#define DOT11D_MAX_CHNL_NUM 83
4961 +
4962 +typedef struct _CHNL_TXPOWER_TRIPLE {
4963 + u8 FirstChnl;
4964 + u8 NumChnls;
4965 + u8 MaxTxPowerInDbm;
4966 +}CHNL_TXPOWER_TRIPLE, *PCHNL_TXPOWER_TRIPLE;
4967 +
4968 +typedef enum _DOT11D_STATE {
4969 + DOT11D_STATE_NONE = 0,
4970 + DOT11D_STATE_LEARNED,
4971 + DOT11D_STATE_DONE,
4972 +}DOT11D_STATE;
4973 +
4974 +typedef struct _RT_DOT11D_INFO {
4975 + //DECLARE_RT_OBJECT(RT_DOT11D_INFO);
4976 +
4977 + bool bEnabled; // dot11MultiDomainCapabilityEnabled
4978 +
4979 + u16 CountryIeLen; // > 0 if CountryIeBuf[] contains valid country information element.
4980 + u8 CountryIeBuf[MAX_IE_LEN];
4981 + u8 CountryIeSrcAddr[6]; // Source AP of the country IE.
4982 + u8 CountryIeWatchdog;
4983 +
4984 + u8 channel_map[MAX_CHANNEL_NUMBER+1]; //!!!Value 0: Invalid, 1: Valid (active scan), 2: Valid (passive scan)
4985 + //u8 ChnlListLen; // #Bytes valid in ChnlList[].
4986 + //u8 ChnlList[DOT11D_MAX_CHNL_NUM];
4987 + u8 MaxTxPwrDbmList[MAX_CHANNEL_NUMBER+1];
4988 +
4989 + DOT11D_STATE State;
4990 +}RT_DOT11D_INFO, *PRT_DOT11D_INFO;
4991 +#define eqMacAddr(a,b) ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 )
4992 +#define cpMacAddr(des,src) ((des)[0]=(src)[0],(des)[1]=(src)[1],(des)[2]=(src)[2],(des)[3]=(src)[3],(des)[4]=(src)[4],(des)[5]=(src)[5])
4993 +#define GET_DOT11D_INFO(__pIeeeDev) ((PRT_DOT11D_INFO)((__pIeeeDev)->pDot11dInfo))
4994 +
4995 +#define IS_DOT11D_ENABLE(__pIeeeDev) GET_DOT11D_INFO(__pIeeeDev)->bEnabled
4996 +#define IS_COUNTRY_IE_VALID(__pIeeeDev) (GET_DOT11D_INFO(__pIeeeDev)->CountryIeLen > 0)
4997 +
4998 +#define IS_EQUAL_CIE_SRC(__pIeeeDev, __pTa) eqMacAddr(GET_DOT11D_INFO(__pIeeeDev)->CountryIeSrcAddr, __pTa)
4999 +#define UPDATE_CIE_SRC(__pIeeeDev, __pTa) cpMacAddr(GET_DOT11D_INFO(__pIeeeDev)->CountryIeSrcAddr, __pTa)
5000 +
5001 +#define IS_COUNTRY_IE_CHANGED(__pIeeeDev, __Ie) \
5002 + (((__Ie).Length == 0 || (__Ie).Length != GET_DOT11D_INFO(__pIeeeDev)->CountryIeLen) ? \
5003 + FALSE : \
5004 + (!memcmp(GET_DOT11D_INFO(__pIeeeDev)->CountryIeBuf, (__Ie).Octet, (__Ie).Length)))
5005 +
5006 +#define CIE_WATCHDOG_TH 1
5007 +#define GET_CIE_WATCHDOG(__pIeeeDev) GET_DOT11D_INFO(__pIeeeDev)->CountryIeWatchdog
5008 +#define RESET_CIE_WATCHDOG(__pIeeeDev) GET_CIE_WATCHDOG(__pIeeeDev) = 0
5009 +#define UPDATE_CIE_WATCHDOG(__pIeeeDev) ++GET_CIE_WATCHDOG(__pIeeeDev)
5010 +
5011 +#define IS_DOT11D_STATE_DONE(__pIeeeDev) (GET_DOT11D_INFO(__pIeeeDev)->State == DOT11D_STATE_DONE)
5012 +
5013 +
5014 +void
5015 +Dot11d_Init(
5016 + struct ieee80211_device *dev
5017 + );
5018 +
5019 +void
5020 +Dot11d_Reset(
5021 + struct ieee80211_device *dev
5022 + );
5023 +
5024 +void
5025 +Dot11d_UpdateCountryIe(
5026 + struct ieee80211_device *dev,
5027 + u8 * pTaddr,
5028 + u16 CoutryIeLen,
5029 + u8 * pCoutryIe
5030 + );
5031 +
5032 +u8
5033 +DOT11D_GetMaxTxPwrInDbm(
5034 + struct ieee80211_device *dev,
5035 + u8 Channel
5036 + );
5037 +
5038 +void
5039 +DOT11D_ScanComplete(
5040 + struct ieee80211_device * dev
5041 + );
5042 +
5043 +int IsLegalChannel(
5044 + struct ieee80211_device * dev,
5045 + u8 channel
5046 +);
5047 +
5048 +int ToLegalChannel(
5049 + struct ieee80211_device * dev,
5050 + u8 channel
5051 +);
5052 +#endif //ENABLE_DOT11D
5053 +#endif // #ifndef __INC_DOT11D_H
5054 --- /dev/null
5055 +++ b/drivers/staging/rtl8192e/ieee80211/ieee80211.h
5056 @@ -0,0 +1,2802 @@
5057 +/*
5058 + * Merged with mainline ieee80211.h in Aug 2004. Original ieee802_11
5059 + * remains copyright by the original authors
5060 + *
5061 + * Portions of the merged code are based on Host AP (software wireless
5062 + * LAN access point) driver for Intersil Prism2/2.5/3.
5063 + *
5064 + * Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
5065 + * <jkmaline@cc.hut.fi>
5066 + * Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
5067 + *
5068 + * Adaption to a generic IEEE 802.11 stack by James Ketrenos
5069 + * <jketreno@linux.intel.com>
5070 + * Copyright (c) 2004, Intel Corporation
5071 + *
5072 + * Modified for Realtek's wi-fi cards by Andrea Merello
5073 + * <andreamrl@tiscali.it>
5074 + *
5075 + * This program is free software; you can redistribute it and/or modify
5076 + * it under the terms of the GNU General Public License version 2 as
5077 + * published by the Free Software Foundation. See README and COPYING for
5078 + * more details.
5079 + */
5080 +#ifndef IEEE80211_H
5081 +#define IEEE80211_H
5082 +#include <linux/if_ether.h> /* ETH_ALEN */
5083 +#include <linux/kernel.h> /* ARRAY_SIZE */
5084 +#include <linux/version.h>
5085 +#include <linux/module.h>
5086 +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
5087 +#include <linux/jiffies.h>
5088 +#else
5089 +#include <linux/jffs.h>
5090 +#include <linux/tqueue.h>
5091 +#endif
5092 +#include <linux/timer.h>
5093 +#include <linux/sched.h>
5094 +
5095 +#include <linux/delay.h>
5096 +#include <linux/wireless.h>
5097 +
5098 +#include "rtl819x_HT.h"
5099 +#include "rtl819x_BA.h"
5100 +#include "rtl819x_TS.h"
5101 +
5102 +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
5103 +#ifndef bool
5104 +typedef enum{false = 0, true} bool;
5105 +#endif
5106 +#endif
5107 +
5108 +#ifndef IW_MODE_MONITOR
5109 +#define IW_MODE_MONITOR 6
5110 +#endif
5111 +
5112 +#ifndef IWEVCUSTOM
5113 +#define IWEVCUSTOM 0x8c02
5114 +#endif
5115 +
5116 +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
5117 +#ifndef __bitwise
5118 +#define __bitwise __attribute__((bitwise))
5119 +#endif
5120 +typedef __u16 __le16;
5121 +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,4,27))
5122 +struct iw_spy_data{
5123 + /* --- Standard spy support --- */
5124 + int spy_number;
5125 + u_char spy_address[IW_MAX_SPY][ETH_ALEN];
5126 + struct iw_quality spy_stat[IW_MAX_SPY];
5127 + /* --- Enhanced spy support (event) */
5128 + struct iw_quality spy_thr_low; /* Low threshold */
5129 + struct iw_quality spy_thr_high; /* High threshold */
5130 + u_char spy_thr_under[IW_MAX_SPY];
5131 +};
5132 +#endif
5133 +#endif
5134 +
5135 +#ifndef container_of
5136 +/**
5137 + * container_of - cast a member of a structure out to the containing structure
5138 + *
5139 + * @ptr: the pointer to the member.
5140 + * @type: the type of the container struct this is embedded in.
5141 + * @member: the name of the member within the struct.
5142 + *
5143 + */
5144 +#define container_of(ptr, type, member) ({ \
5145 + const typeof( ((type *)0)->member ) *__mptr = (ptr); \
5146 + (type *)( (char *)__mptr - offsetof(type,member) );})
5147 +#endif
5148 +
5149 +#define KEY_TYPE_NA 0x0
5150 +#define KEY_TYPE_WEP40 0x1
5151 +#define KEY_TYPE_TKIP 0x2
5152 +#define KEY_TYPE_CCMP 0x4
5153 +#define KEY_TYPE_WEP104 0x5
5154 +
5155 +/* added for rtl819x tx procedure */
5156 +#define MAX_QUEUE_SIZE 0x10
5157 +
5158 +//
5159 +// 8190 queue mapping
5160 +//
5161 +#define BK_QUEUE 0
5162 +#define BE_QUEUE 1
5163 +#define VI_QUEUE 2
5164 +#define VO_QUEUE 3
5165 +#define HCCA_QUEUE 4
5166 +#define TXCMD_QUEUE 5
5167 +#define MGNT_QUEUE 6
5168 +#define HIGH_QUEUE 7
5169 +#define BEACON_QUEUE 8
5170 +
5171 +#define LOW_QUEUE BE_QUEUE
5172 +#define NORMAL_QUEUE MGNT_QUEUE
5173 +
5174 +//added by amy for ps
5175 +#define SWRF_TIMEOUT 50
5176 +
5177 +//added by amy for LEAP related
5178 +#define IE_CISCO_FLAG_POSITION 0x08 // Flag byte: byte 8, numbered from 0.
5179 +#define SUPPORT_CKIP_MIC 0x08 // bit3
5180 +#define SUPPORT_CKIP_PK 0x10 // bit4
5181 +/* defined for skb cb field */
5182 +/* At most 28 byte */
5183 +typedef struct cb_desc {
5184 + /* Tx Desc Related flags (8-9) */
5185 + u8 bLastIniPkt:1;
5186 + u8 bCmdOrInit:1;
5187 + u8 bFirstSeg:1;
5188 + u8 bLastSeg:1;
5189 + u8 bEncrypt:1;
5190 + u8 bTxDisableRateFallBack:1;
5191 + u8 bTxUseDriverAssingedRate:1;
5192 + u8 bHwSec:1; //indicate whether use Hw security. WB
5193 +
5194 + u8 reserved1;
5195 +
5196 + /* Tx Firmware Relaged flags (10-11)*/
5197 + u8 bCTSEnable:1;
5198 + u8 bRTSEnable:1;
5199 + u8 bUseShortGI:1;
5200 + u8 bUseShortPreamble:1;
5201 + u8 bTxEnableFwCalcDur:1;
5202 + u8 bAMPDUEnable:1;
5203 + u8 bRTSSTBC:1;
5204 + u8 RTSSC:1;
5205 +
5206 + u8 bRTSBW:1;
5207 + u8 bPacketBW:1;
5208 + u8 bRTSUseShortPreamble:1;
5209 + u8 bRTSUseShortGI:1;
5210 + u8 bMulticast:1;
5211 + u8 bBroadcast:1;
5212 + //u8 reserved2:2;
5213 + u8 drv_agg_enable:1;
5214 + u8 reserved2:1;
5215 +
5216 + /* Tx Desc related element(12-19) */
5217 + u8 rata_index;
5218 + u8 queue_index;
5219 + //u8 reserved3;
5220 + //u8 reserved4;
5221 + u16 txbuf_size;
5222 + //u8 reserved5;
5223 + u8 RATRIndex;
5224 + u8 reserved6;
5225 + u8 reserved7;
5226 + u8 reserved8;
5227 +
5228 + /* Tx firmware related element(20-27) */
5229 + u8 data_rate;
5230 + u8 rts_rate;
5231 + u8 ampdu_factor;
5232 + u8 ampdu_density;
5233 + //u8 reserved9;
5234 + //u8 reserved10;
5235 + //u8 reserved11;
5236 + u8 DrvAggrNum;
5237 + u16 pkt_size;
5238 + u8 reserved12;
5239 +}cb_desc, *pcb_desc;
5240 +
5241 +/*--------------------------Define -------------------------------------------*/
5242 +#define MGN_1M 0x02
5243 +#define MGN_2M 0x04
5244 +#define MGN_5_5M 0x0b
5245 +#define MGN_11M 0x16
5246 +
5247 +#define MGN_6M 0x0c
5248 +#define MGN_9M 0x12
5249 +#define MGN_12M 0x18
5250 +#define MGN_18M 0x24
5251 +#define MGN_24M 0x30
5252 +#define MGN_36M 0x48
5253 +#define MGN_48M 0x60
5254 +#define MGN_54M 0x6c
5255 +
5256 +#define MGN_MCS0 0x80
5257 +#define MGN_MCS1 0x81
5258 +#define MGN_MCS2 0x82
5259 +#define MGN_MCS3 0x83
5260 +#define MGN_MCS4 0x84
5261 +#define MGN_MCS5 0x85
5262 +#define MGN_MCS6 0x86
5263 +#define MGN_MCS7 0x87
5264 +#define MGN_MCS8 0x88
5265 +#define MGN_MCS9 0x89
5266 +#define MGN_MCS10 0x8a
5267 +#define MGN_MCS11 0x8b
5268 +#define MGN_MCS12 0x8c
5269 +#define MGN_MCS13 0x8d
5270 +#define MGN_MCS14 0x8e
5271 +#define MGN_MCS15 0x8f
5272 +
5273 +//----------------------------------------------------------------------------
5274 +// 802.11 Management frame Reason Code field
5275 +//----------------------------------------------------------------------------
5276 +enum _ReasonCode{
5277 + unspec_reason = 0x1,
5278 + auth_not_valid = 0x2,
5279 + deauth_lv_ss = 0x3,
5280 + inactivity = 0x4,
5281 + ap_overload = 0x5,
5282 + class2_err = 0x6,
5283 + class3_err = 0x7,
5284 + disas_lv_ss = 0x8,
5285 + asoc_not_auth = 0x9,
5286 +
5287 + //----MIC_CHECK
5288 + mic_failure = 0xe,
5289 + //----END MIC_CHECK
5290 +
5291 + // Reason code defined in 802.11i D10.0 p.28.
5292 + invalid_IE = 0x0d,
5293 + four_way_tmout = 0x0f,
5294 + two_way_tmout = 0x10,
5295 + IE_dismatch = 0x11,
5296 + invalid_Gcipher = 0x12,
5297 + invalid_Pcipher = 0x13,
5298 + invalid_AKMP = 0x14,
5299 + unsup_RSNIEver = 0x15,
5300 + invalid_RSNIE = 0x16,
5301 + auth_802_1x_fail= 0x17,
5302 + ciper_reject = 0x18,
5303 +
5304 + // Reason code defined in 7.3.1.7, 802.1e D13.0, p.42. Added by Annie, 2005-11-15.
5305 + QoS_unspec = 0x20, // 32
5306 + QAP_bandwidth = 0x21, // 33
5307 + poor_condition = 0x22, // 34
5308 + no_facility = 0x23, // 35
5309 + // Where is 36???
5310 + req_declined = 0x25, // 37
5311 + invalid_param = 0x26, // 38
5312 + req_not_honored= 0x27, // 39
5313 + TS_not_created = 0x2F, // 47
5314 + DL_not_allowed = 0x30, // 48
5315 + dest_not_exist = 0x31, // 49
5316 + dest_not_QSTA = 0x32, // 50
5317 +};
5318 +
5319 +
5320 +
5321 +#define aSifsTime (((priv->ieee80211->current_network.mode == IEEE_A)||(priv->ieee80211->current_network.mode == IEEE_N_24G)||(priv->ieee80211->current_network.mode == IEEE_N_5G))? 16 : 10)
5322 +
5323 +#define MGMT_QUEUE_NUM 5
5324 +
5325 +#define IEEE_CMD_SET_WPA_PARAM 1
5326 +#define IEEE_CMD_SET_WPA_IE 2
5327 +#define IEEE_CMD_SET_ENCRYPTION 3
5328 +#define IEEE_CMD_MLME 4
5329 +
5330 +#define IEEE_PARAM_WPA_ENABLED 1
5331 +#define IEEE_PARAM_TKIP_COUNTERMEASURES 2
5332 +#define IEEE_PARAM_DROP_UNENCRYPTED 3
5333 +#define IEEE_PARAM_PRIVACY_INVOKED 4
5334 +#define IEEE_PARAM_AUTH_ALGS 5
5335 +#define IEEE_PARAM_IEEE_802_1X 6
5336 +//It should consistent with the driver_XXX.c
5337 +// David, 2006.9.26
5338 +#define IEEE_PARAM_WPAX_SELECT 7
5339 +//Added for notify the encryption type selection
5340 +// David, 2006.9.26
5341 +#define IEEE_PROTO_WPA 1
5342 +#define IEEE_PROTO_RSN 2
5343 +//Added for notify the encryption type selection
5344 +// David, 2006.9.26
5345 +#define IEEE_WPAX_USEGROUP 0
5346 +#define IEEE_WPAX_WEP40 1
5347 +#define IEEE_WPAX_TKIP 2
5348 +#define IEEE_WPAX_WRAP 3
5349 +#define IEEE_WPAX_CCMP 4
5350 +#define IEEE_WPAX_WEP104 5
5351 +
5352 +#define IEEE_KEY_MGMT_IEEE8021X 1
5353 +#define IEEE_KEY_MGMT_PSK 2
5354 +
5355 +#define IEEE_MLME_STA_DEAUTH 1
5356 +#define IEEE_MLME_STA_DISASSOC 2
5357 +
5358 +
5359 +#define IEEE_CRYPT_ERR_UNKNOWN_ALG 2
5360 +#define IEEE_CRYPT_ERR_UNKNOWN_ADDR 3
5361 +#define IEEE_CRYPT_ERR_CRYPT_INIT_FAILED 4
5362 +#define IEEE_CRYPT_ERR_KEY_SET_FAILED 5
5363 +#define IEEE_CRYPT_ERR_TX_KEY_SET_FAILED 6
5364 +#define IEEE_CRYPT_ERR_CARD_CONF_FAILED 7
5365 +
5366 +
5367 +#define IEEE_CRYPT_ALG_NAME_LEN 16
5368 +
5369 +#define MAX_IE_LEN 0xff
5370 +
5371 +// added for kernel conflict
5372 +#define ieee80211_crypt_deinit_entries ieee80211_crypt_deinit_entries_rsl
5373 +#define ieee80211_crypt_deinit_handler ieee80211_crypt_deinit_handler_rsl
5374 +#define ieee80211_crypt_delayed_deinit ieee80211_crypt_delayed_deinit_rsl
5375 +#define ieee80211_register_crypto_ops ieee80211_register_crypto_ops_rsl
5376 +#define ieee80211_unregister_crypto_ops ieee80211_unregister_crypto_ops_rsl
5377 +#define ieee80211_get_crypto_ops ieee80211_get_crypto_ops_rsl
5378 +
5379 +#define ieee80211_ccmp_null ieee80211_ccmp_null_rsl
5380 +
5381 +#define ieee80211_tkip_null ieee80211_tkip_null_rsl
5382 +
5383 +#define ieee80211_wep_null ieee80211_wep_null_rsl
5384 +
5385 +#define free_ieee80211 free_ieee80211_rsl
5386 +#define alloc_ieee80211 alloc_ieee80211_rsl
5387 +
5388 +#define ieee80211_rx ieee80211_rx_rsl
5389 +#define ieee80211_rx_mgt ieee80211_rx_mgt_rsl
5390 +
5391 +#define ieee80211_get_beacon ieee80211_get_beacon_rsl
5392 +#define ieee80211_wake_queue ieee80211_wake_queue_rsl
5393 +#define ieee80211_stop_queue ieee80211_stop_queue_rsl
5394 +#define ieee80211_reset_queue ieee80211_reset_queue_rsl
5395 +#define ieee80211_softmac_stop_protocol ieee80211_softmac_stop_protocol_rsl
5396 +#define ieee80211_softmac_start_protocol ieee80211_softmac_start_protocol_rsl
5397 +#define ieee80211_is_shortslot ieee80211_is_shortslot_rsl
5398 +#define ieee80211_is_54g ieee80211_is_54g_rsl
5399 +#define ieee80211_wpa_supplicant_ioctl ieee80211_wpa_supplicant_ioctl_rsl
5400 +#define ieee80211_ps_tx_ack ieee80211_ps_tx_ack_rsl
5401 +#define ieee80211_softmac_xmit ieee80211_softmac_xmit_rsl
5402 +#define ieee80211_stop_send_beacons ieee80211_stop_send_beacons_rsl
5403 +#define notify_wx_assoc_event notify_wx_assoc_event_rsl
5404 +#define SendDisassociation SendDisassociation_rsl
5405 +#define ieee80211_disassociate ieee80211_disassociate_rsl
5406 +#define ieee80211_start_send_beacons ieee80211_start_send_beacons_rsl
5407 +#define ieee80211_stop_scan ieee80211_stop_scan_rsl
5408 +#define ieee80211_send_probe_requests ieee80211_send_probe_requests_rsl
5409 +#define ieee80211_softmac_scan_syncro ieee80211_softmac_scan_syncro_rsl
5410 +#define ieee80211_start_scan_syncro ieee80211_start_scan_syncro_rsl
5411 +
5412 +#define ieee80211_wx_get_essid ieee80211_wx_get_essid_rsl
5413 +#define ieee80211_wx_set_essid ieee80211_wx_set_essid_rsl
5414 +#define ieee80211_wx_set_rate ieee80211_wx_set_rate_rsl
5415 +#define ieee80211_wx_get_rate ieee80211_wx_get_rate_rsl
5416 +#define ieee80211_wx_set_wap ieee80211_wx_set_wap_rsl
5417 +#define ieee80211_wx_get_wap ieee80211_wx_get_wap_rsl
5418 +#define ieee80211_wx_set_mode ieee80211_wx_set_mode_rsl
5419 +#define ieee80211_wx_get_mode ieee80211_wx_get_mode_rsl
5420 +#define ieee80211_wx_set_scan ieee80211_wx_set_scan_rsl
5421 +#define ieee80211_wx_get_freq ieee80211_wx_get_freq_rsl
5422 +#define ieee80211_wx_set_freq ieee80211_wx_set_freq_rsl
5423 +#define ieee80211_wx_set_rawtx ieee80211_wx_set_rawtx_rsl
5424 +#define ieee80211_wx_get_name ieee80211_wx_get_name_rsl
5425 +#define ieee80211_wx_set_power ieee80211_wx_set_power_rsl
5426 +#define ieee80211_wx_get_power ieee80211_wx_get_power_rsl
5427 +#define ieee80211_wlan_frequencies ieee80211_wlan_frequencies_rsl
5428 +#define ieee80211_wx_set_rts ieee80211_wx_set_rts_rsl
5429 +#define ieee80211_wx_get_rts ieee80211_wx_get_rts_rsl
5430 +
5431 +#define ieee80211_txb_free ieee80211_txb_free_rsl
5432 +
5433 +#define ieee80211_wx_set_gen_ie ieee80211_wx_set_gen_ie_rsl
5434 +#define ieee80211_wx_get_scan ieee80211_wx_get_scan_rsl
5435 +#define ieee80211_wx_set_encode ieee80211_wx_set_encode_rsl
5436 +#define ieee80211_wx_get_encode ieee80211_wx_get_encode_rsl
5437 +#if WIRELESS_EXT >= 18
5438 +#define ieee80211_wx_set_mlme ieee80211_wx_set_mlme_rsl
5439 +#define ieee80211_wx_set_auth ieee80211_wx_set_auth_rsl
5440 +#define ieee80211_wx_set_encode_ext ieee80211_wx_set_encode_ext_rsl
5441 +#define ieee80211_wx_get_encode_ext ieee80211_wx_get_encode_ext_rsl
5442 +#endif
5443 +
5444 +
5445 +typedef struct ieee_param {
5446 + u32 cmd;
5447 + u8 sta_addr[ETH_ALEN];
5448 + union {
5449 + struct {
5450 + u8 name;
5451 + u32 value;
5452 + } wpa_param;
5453 + struct {
5454 + u32 len;
5455 + u8 reserved[32];
5456 + u8 data[0];
5457 + } wpa_ie;
5458 + struct{
5459 + int command;
5460 + int reason_code;
5461 + } mlme;
5462 + struct {
5463 + u8 alg[IEEE_CRYPT_ALG_NAME_LEN];
5464 + u8 set_tx;
5465 + u32 err;
5466 + u8 idx;
5467 + u8 seq[8]; /* sequence counter (set: RX, get: TX) */
5468 + u16 key_len;
5469 + u8 key[0];
5470 + } crypt;
5471 + } u;
5472 +}ieee_param;
5473 +
5474 +
5475 +#if WIRELESS_EXT < 17
5476 +#define IW_QUAL_QUAL_INVALID 0x10
5477 +#define IW_QUAL_LEVEL_INVALID 0x20
5478 +#define IW_QUAL_NOISE_INVALID 0x40
5479 +#define IW_QUAL_QUAL_UPDATED 0x1
5480 +#define IW_QUAL_LEVEL_UPDATED 0x2
5481 +#define IW_QUAL_NOISE_UPDATED 0x4
5482 +#endif
5483 +
5484 +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
5485 +static inline void tq_init(struct tq_struct * task, void(*func)(void *), void *data)
5486 +{
5487 + task->routine = func;
5488 + task->data = data;
5489 + //task->next = NULL;
5490 + INIT_LIST_HEAD(&task->list);
5491 + task->sync = 0;
5492 +}
5493 +#endif
5494 +
5495 +// linux under 2.6.9 release may not support it, so modify it for common use
5496 +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,9))
5497 +//#define MSECS(t) (1000 * ((t) / HZ) + 1000 * ((t) % HZ) / HZ)
5498 +#define MSECS(t) (HZ * ((t) / 1000) + (HZ * ((t) % 1000)) / 1000)
5499 +static inline unsigned long msleep_interruptible_rsl(unsigned int msecs)
5500 +{
5501 + unsigned long timeout = MSECS(msecs) + 1;
5502 +
5503 + while (timeout) {
5504 + set_current_state(TASK_INTERRUPTIBLE);
5505 + timeout = schedule_timeout(timeout);
5506 + }
5507 + return timeout;
5508 +}
5509 +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,4,31))
5510 +static inline void msleep(unsigned int msecs)
5511 +{
5512 + unsigned long timeout = MSECS(msecs) + 1;
5513 +
5514 + while (timeout) {
5515 + set_current_state(TASK_UNINTERRUPTIBLE);
5516 + timeout = schedule_timeout(timeout);
5517 + }
5518 +}
5519 +#endif
5520 +#else
5521 +#define MSECS(t) msecs_to_jiffies(t)
5522 +#define msleep_interruptible_rsl msleep_interruptible
5523 +#endif
5524 +
5525 +#define IEEE80211_DATA_LEN 2304
5526 +/* Maximum size for the MA-UNITDATA primitive, 802.11 standard section
5527 + 6.2.1.1.2.
5528 +
5529 + The figure in section 7.1.2 suggests a body size of up to 2312
5530 + bytes is allowed, which is a bit confusing, I suspect this
5531 + represents the 2304 bytes of real data, plus a possible 8 bytes of
5532 + WEP IV and ICV. (this interpretation suggested by Ramiro Barreiro) */
5533 +#define IEEE80211_1ADDR_LEN 10
5534 +#define IEEE80211_2ADDR_LEN 16
5535 +#define IEEE80211_3ADDR_LEN 24
5536 +#define IEEE80211_4ADDR_LEN 30
5537 +#define IEEE80211_FCS_LEN 4
5538 +#define IEEE80211_HLEN (IEEE80211_4ADDR_LEN)
5539 +#define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN)
5540 +#define IEEE80211_MGMT_HDR_LEN 24
5541 +#define IEEE80211_DATA_HDR3_LEN 24
5542 +#define IEEE80211_DATA_HDR4_LEN 30
5543 +
5544 +#define MIN_FRAG_THRESHOLD 256U
5545 +#define MAX_FRAG_THRESHOLD 2346U
5546 +
5547 +
5548 +/* Frame control field constants */
5549 +#define IEEE80211_FCTL_VERS 0x0003
5550 +#define IEEE80211_FCTL_FTYPE 0x000c
5551 +#define IEEE80211_FCTL_STYPE 0x00f0
5552 +#define IEEE80211_FCTL_FRAMETYPE 0x00fc
5553 +#define IEEE80211_FCTL_TODS 0x0100
5554 +#define IEEE80211_FCTL_FROMDS 0x0200
5555 +#define IEEE80211_FCTL_DSTODS 0x0300 //added by david
5556 +#define IEEE80211_FCTL_MOREFRAGS 0x0400
5557 +#define IEEE80211_FCTL_RETRY 0x0800
5558 +#define IEEE80211_FCTL_PM 0x1000
5559 +#define IEEE80211_FCTL_MOREDATA 0x2000
5560 +#define IEEE80211_FCTL_WEP 0x4000
5561 +#define IEEE80211_FCTL_ORDER 0x8000
5562 +
5563 +#define IEEE80211_FTYPE_MGMT 0x0000
5564 +#define IEEE80211_FTYPE_CTL 0x0004
5565 +#define IEEE80211_FTYPE_DATA 0x0008
5566 +
5567 +/* management */
5568 +#define IEEE80211_STYPE_ASSOC_REQ 0x0000
5569 +#define IEEE80211_STYPE_ASSOC_RESP 0x0010
5570 +#define IEEE80211_STYPE_REASSOC_REQ 0x0020
5571 +#define IEEE80211_STYPE_REASSOC_RESP 0x0030
5572 +#define IEEE80211_STYPE_PROBE_REQ 0x0040
5573 +#define IEEE80211_STYPE_PROBE_RESP 0x0050
5574 +#define IEEE80211_STYPE_BEACON 0x0080
5575 +#define IEEE80211_STYPE_ATIM 0x0090
5576 +#define IEEE80211_STYPE_DISASSOC 0x00A0
5577 +#define IEEE80211_STYPE_AUTH 0x00B0
5578 +#define IEEE80211_STYPE_DEAUTH 0x00C0
5579 +#define IEEE80211_STYPE_MANAGE_ACT 0x00D0
5580 +
5581 +/* control */
5582 +#define IEEE80211_STYPE_PSPOLL 0x00A0
5583 +#define IEEE80211_STYPE_RTS 0x00B0
5584 +#define IEEE80211_STYPE_CTS 0x00C0
5585 +#define IEEE80211_STYPE_ACK 0x00D0
5586 +#define IEEE80211_STYPE_CFEND 0x00E0
5587 +#define IEEE80211_STYPE_CFENDACK 0x00F0
5588 +#define IEEE80211_STYPE_BLOCKACK 0x0094
5589 +
5590 +/* data */
5591 +#define IEEE80211_STYPE_DATA 0x0000
5592 +#define IEEE80211_STYPE_DATA_CFACK 0x0010
5593 +#define IEEE80211_STYPE_DATA_CFPOLL 0x0020
5594 +#define IEEE80211_STYPE_DATA_CFACKPOLL 0x0030
5595 +#define IEEE80211_STYPE_NULLFUNC 0x0040
5596 +#define IEEE80211_STYPE_CFACK 0x0050
5597 +#define IEEE80211_STYPE_CFPOLL 0x0060
5598 +#define IEEE80211_STYPE_CFACKPOLL 0x0070
5599 +#define IEEE80211_STYPE_QOS_DATA 0x0080 //added for WMM 2006/8/2
5600 +#define IEEE80211_STYPE_QOS_NULL 0x00C0
5601 +
5602 +#define IEEE80211_SCTL_FRAG 0x000F
5603 +#define IEEE80211_SCTL_SEQ 0xFFF0
5604 +
5605 +/* QOS control */
5606 +#define IEEE80211_QCTL_TID 0x000F
5607 +
5608 +#define FC_QOS_BIT BIT7
5609 +#define IsDataFrame(pdu) ( ((pdu[0] & 0x0C)==0x08) ? true : false )
5610 +#define IsLegacyDataFrame(pdu) (IsDataFrame(pdu) && (!(pdu[0]&FC_QOS_BIT)) )
5611 +//added by wb. Is this right?
5612 +#define IsQoSDataFrame(pframe) ((*(u16*)pframe&(IEEE80211_STYPE_QOS_DATA|IEEE80211_FTYPE_DATA)) == (IEEE80211_STYPE_QOS_DATA|IEEE80211_FTYPE_DATA))
5613 +#define Frame_Order(pframe) (*(u16*)pframe&IEEE80211_FCTL_ORDER)
5614 +#define SN_LESS(a, b) (((a-b)&0x800)!=0)
5615 +#define SN_EQUAL(a, b) (a == b)
5616 +#define MAX_DEV_ADDR_SIZE 8
5617 +typedef enum _ACT_CATEGORY{
5618 + ACT_CAT_QOS = 1,
5619 + ACT_CAT_DLS = 2,
5620 + ACT_CAT_BA = 3,
5621 + ACT_CAT_HT = 7,
5622 + ACT_CAT_WMM = 17,
5623 +} ACT_CATEGORY, *PACT_CATEGORY;
5624 +
5625 +typedef enum _TS_ACTION{
5626 + ACT_ADDTSREQ = 0,
5627 + ACT_ADDTSRSP = 1,
5628 + ACT_DELTS = 2,
5629 + ACT_SCHEDULE = 3,
5630 +} TS_ACTION, *PTS_ACTION;
5631 +
5632 +typedef enum _BA_ACTION{
5633 + ACT_ADDBAREQ = 0,
5634 + ACT_ADDBARSP = 1,
5635 + ACT_DELBA = 2,
5636 +} BA_ACTION, *PBA_ACTION;
5637 +
5638 +typedef enum _InitialGainOpType{
5639 + IG_Backup=0,
5640 + IG_Restore,
5641 + IG_Max
5642 +}InitialGainOpType;
5643 +
5644 +/* debug macros */
5645 +#define CONFIG_IEEE80211_DEBUG
5646 +#ifdef CONFIG_IEEE80211_DEBUG
5647 +extern u32 ieee80211_debug_level;
5648 +#define IEEE80211_DEBUG(level, fmt, args...) \
5649 +do { if (ieee80211_debug_level & (level)) \
5650 + printk(KERN_DEBUG "ieee80211: " fmt, ## args); } while (0)
5651 +//wb added to debug out data buf
5652 +//if you want print DATA buffer related BA, please set ieee80211_debug_level to DATA|BA
5653 +#define IEEE80211_DEBUG_DATA(level, data, datalen) \
5654 + do{ if ((ieee80211_debug_level & (level)) == (level)) \
5655 + { \
5656 + int i; \
5657 + u8* pdata = (u8*) data; \
5658 + printk(KERN_DEBUG "ieee80211: %s()\n", __FUNCTION__); \
5659 + for(i=0; i<(int)(datalen); i++) \
5660 + { \
5661 + printk("%2x ", pdata[i]); \
5662 + if ((i+1)%16 == 0) printk("\n"); \
5663 + } \
5664 + printk("\n"); \
5665 + } \
5666 + } while (0)
5667 +#else
5668 +#define IEEE80211_DEBUG(level, fmt, args...) do {} while (0)
5669 +#define IEEE80211_DEBUG_DATA(level, data, datalen) do {} while(0)
5670 +#endif /* CONFIG_IEEE80211_DEBUG */
5671 +
5672 +/* debug macros not dependent on CONFIG_IEEE80211_DEBUG */
5673 +
5674 +#define MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x"
5675 +#define MAC_ARG(x) ((u8*)(x))[0],((u8*)(x))[1],((u8*)(x))[2],((u8*)(x))[3],((u8*)(x))[4],((u8*)(x))[5]
5676 +
5677 +/*
5678 + * To use the debug system;
5679 + *
5680 + * If you are defining a new debug classification, simply add it to the #define
5681 + * list here in the form of:
5682 + *
5683 + * #define IEEE80211_DL_xxxx VALUE
5684 + *
5685 + * shifting value to the left one bit from the previous entry. xxxx should be
5686 + * the name of the classification (for example, WEP)
5687 + *
5688 + * You then need to either add a IEEE80211_xxxx_DEBUG() macro definition for your
5689 + * classification, or use IEEE80211_DEBUG(IEEE80211_DL_xxxx, ...) whenever you want
5690 + * to send output to that classification.
5691 + *
5692 + * To add your debug level to the list of levels seen when you perform
5693 + *
5694 + * % cat /proc/net/ipw/debug_level
5695 + *
5696 + * you simply need to add your entry to the ipw_debug_levels array.
5697 + *
5698 + * If you do not see debug_level in /proc/net/ipw then you do not have
5699 + * CONFIG_IEEE80211_DEBUG defined in your kernel configuration
5700 + *
5701 + */
5702 +
5703 +#define IEEE80211_DL_INFO (1<<0)
5704 +#define IEEE80211_DL_WX (1<<1)
5705 +#define IEEE80211_DL_SCAN (1<<2)
5706 +#define IEEE80211_DL_STATE (1<<3)
5707 +#define IEEE80211_DL_MGMT (1<<4)
5708 +#define IEEE80211_DL_FRAG (1<<5)
5709 +#define IEEE80211_DL_EAP (1<<6)
5710 +#define IEEE80211_DL_DROP (1<<7)
5711 +
5712 +#define IEEE80211_DL_TX (1<<8)
5713 +#define IEEE80211_DL_RX (1<<9)
5714 +
5715 +#define IEEE80211_DL_HT (1<<10) //HT
5716 +#define IEEE80211_DL_BA (1<<11) //ba
5717 +#define IEEE80211_DL_TS (1<<12) //TS
5718 +#define IEEE80211_DL_QOS (1<<13)
5719 +#define IEEE80211_DL_REORDER (1<<14)
5720 +#define IEEE80211_DL_IOT (1<<15)
5721 +#define IEEE80211_DL_IPS (1<<16)
5722 +#define IEEE80211_DL_TRACE (1<<29) //trace function, need to user net_ratelimit() together in order not to print too much to the screen
5723 +#define IEEE80211_DL_DATA (1<<30) //use this flag to control whether print data buf out.
5724 +#define IEEE80211_DL_ERR (1<<31) //always open
5725 +#define IEEE80211_ERROR(f, a...) printk(KERN_ERR "ieee80211: " f, ## a)
5726 +#define IEEE80211_WARNING(f, a...) printk(KERN_WARNING "ieee80211: " f, ## a)
5727 +#define IEEE80211_DEBUG_INFO(f, a...) IEEE80211_DEBUG(IEEE80211_DL_INFO, f, ## a)
5728 +
5729 +#define IEEE80211_DEBUG_WX(f, a...) IEEE80211_DEBUG(IEEE80211_DL_WX, f, ## a)
5730 +#define IEEE80211_DEBUG_SCAN(f, a...) IEEE80211_DEBUG(IEEE80211_DL_SCAN, f, ## a)
5731 +#define IEEE80211_DEBUG_STATE(f, a...) IEEE80211_DEBUG(IEEE80211_DL_STATE, f, ## a)
5732 +#define IEEE80211_DEBUG_MGMT(f, a...) IEEE80211_DEBUG(IEEE80211_DL_MGMT, f, ## a)
5733 +#define IEEE80211_DEBUG_FRAG(f, a...) IEEE80211_DEBUG(IEEE80211_DL_FRAG, f, ## a)
5734 +#define IEEE80211_DEBUG_EAP(f, a...) IEEE80211_DEBUG(IEEE80211_DL_EAP, f, ## a)
5735 +#define IEEE80211_DEBUG_DROP(f, a...) IEEE80211_DEBUG(IEEE80211_DL_DROP, f, ## a)
5736 +#define IEEE80211_DEBUG_TX(f, a...) IEEE80211_DEBUG(IEEE80211_DL_TX, f, ## a)
5737 +#define IEEE80211_DEBUG_RX(f, a...) IEEE80211_DEBUG(IEEE80211_DL_RX, f, ## a)
5738 +#define IEEE80211_DEBUG_QOS(f, a...) IEEE80211_DEBUG(IEEE80211_DL_QOS, f, ## a)
5739 +
5740 +#ifdef CONFIG_IEEE80211_DEBUG
5741 +/* Added by Annie, 2005-11-22. */
5742 +#define MAX_STR_LEN 64
5743 +/* I want to see ASCII 33 to 126 only. Otherwise, I print '?'. Annie, 2005-11-22.*/
5744 +#define PRINTABLE(_ch) (_ch>'!' && _ch<'~')
5745 +#define IEEE80211_PRINT_STR(_Comp, _TitleString, _Ptr, _Len) \
5746 + if((_Comp) & level) \
5747 + { \
5748 + int __i; \
5749 + u8 buffer[MAX_STR_LEN]; \
5750 + int length = (_Len<MAX_STR_LEN)? _Len : (MAX_STR_LEN-1) ; \
5751 + memset(buffer, 0, MAX_STR_LEN); \
5752 + memcpy(buffer, (u8 *)_Ptr, length ); \
5753 + for( __i=0; __i<MAX_STR_LEN; __i++ ) \
5754 + { \
5755 + if( !PRINTABLE(buffer[__i]) ) buffer[__i] = '?'; \
5756 + } \
5757 + buffer[length] = '\0'; \
5758 + printk("Rtl819x: "); \
5759 + printk(_TitleString); \
5760 + printk(": %d, <%s>\n", _Len, buffer); \
5761 + }
5762 +#else
5763 +#define IEEE80211_PRINT_STR(_Comp, _TitleString, _Ptr, _Len) do {} while (0)
5764 +#endif
5765 +
5766 +#include <linux/netdevice.h>
5767 +#include <linux/if_arp.h> /* ARPHRD_ETHER */
5768 +
5769 +#ifndef WIRELESS_SPY
5770 +#define WIRELESS_SPY // enable iwspy support
5771 +#endif
5772 +#include <net/iw_handler.h> // new driver API
5773 +
5774 +#ifndef ETH_P_PAE
5775 +#define ETH_P_PAE 0x888E /* Port Access Entity (IEEE 802.1X) */
5776 +#endif /* ETH_P_PAE */
5777 +
5778 +#define ETH_P_PREAUTH 0x88C7 /* IEEE 802.11i pre-authentication */
5779 +
5780 +#ifndef ETH_P_80211_RAW
5781 +#define ETH_P_80211_RAW (ETH_P_ECONET + 1)
5782 +#endif
5783 +
5784 +/* IEEE 802.11 defines */
5785 +
5786 +#define P80211_OUI_LEN 3
5787 +
5788 +struct ieee80211_snap_hdr {
5789 +
5790 + u8 dsap; /* always 0xAA */
5791 + u8 ssap; /* always 0xAA */
5792 + u8 ctrl; /* always 0x03 */
5793 + u8 oui[P80211_OUI_LEN]; /* organizational universal id */
5794 +
5795 +} __attribute__ ((packed));
5796 +
5797 +#define SNAP_SIZE sizeof(struct ieee80211_snap_hdr)
5798 +
5799 +#define WLAN_FC_GET_VERS(fc) ((fc) & IEEE80211_FCTL_VERS)
5800 +#define WLAN_FC_GET_TYPE(fc) ((fc) & IEEE80211_FCTL_FTYPE)
5801 +#define WLAN_FC_GET_STYPE(fc) ((fc) & IEEE80211_FCTL_STYPE)
5802 +
5803 +#define WLAN_FC_GET_FRAMETYPE(fc) ((fc) & IEEE80211_FCTL_FRAMETYPE)
5804 +#define WLAN_GET_SEQ_FRAG(seq) ((seq) & IEEE80211_SCTL_FRAG)
5805 +#define WLAN_GET_SEQ_SEQ(seq) (((seq) & IEEE80211_SCTL_SEQ) >> 4)
5806 +
5807 +/* Authentication algorithms */
5808 +#define WLAN_AUTH_OPEN 0
5809 +#define WLAN_AUTH_SHARED_KEY 1
5810 +#define WLAN_AUTH_LEAP 2
5811 +
5812 +#define WLAN_AUTH_CHALLENGE_LEN 128
5813 +
5814 +#define WLAN_CAPABILITY_BSS (1<<0)
5815 +#define WLAN_CAPABILITY_IBSS (1<<1)
5816 +#define WLAN_CAPABILITY_CF_POLLABLE (1<<2)
5817 +#define WLAN_CAPABILITY_CF_POLL_REQUEST (1<<3)
5818 +#define WLAN_CAPABILITY_PRIVACY (1<<4)
5819 +#define WLAN_CAPABILITY_SHORT_PREAMBLE (1<<5)
5820 +#define WLAN_CAPABILITY_PBCC (1<<6)
5821 +#define WLAN_CAPABILITY_CHANNEL_AGILITY (1<<7)
5822 +#define WLAN_CAPABILITY_SPECTRUM_MGMT (1<<8)
5823 +#define WLAN_CAPABILITY_QOS (1<<9)
5824 +#define WLAN_CAPABILITY_SHORT_SLOT (1<<10)
5825 +#define WLAN_CAPABILITY_DSSS_OFDM (1<<13)
5826 +
5827 +/* 802.11g ERP information element */
5828 +#define WLAN_ERP_NON_ERP_PRESENT (1<<0)
5829 +#define WLAN_ERP_USE_PROTECTION (1<<1)
5830 +#define WLAN_ERP_BARKER_PREAMBLE (1<<2)
5831 +
5832 +/* Status codes */
5833 +enum ieee80211_statuscode {
5834 + WLAN_STATUS_SUCCESS = 0,
5835 + WLAN_STATUS_UNSPECIFIED_FAILURE = 1,
5836 + WLAN_STATUS_CAPS_UNSUPPORTED = 10,
5837 + WLAN_STATUS_REASSOC_NO_ASSOC = 11,
5838 + WLAN_STATUS_ASSOC_DENIED_UNSPEC = 12,
5839 + WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG = 13,
5840 + WLAN_STATUS_UNKNOWN_AUTH_TRANSACTION = 14,
5841 + WLAN_STATUS_CHALLENGE_FAIL = 15,
5842 + WLAN_STATUS_AUTH_TIMEOUT = 16,
5843 + WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA = 17,
5844 + WLAN_STATUS_ASSOC_DENIED_RATES = 18,
5845 + /* 802.11b */
5846 + WLAN_STATUS_ASSOC_DENIED_NOSHORTPREAMBLE = 19,
5847 + WLAN_STATUS_ASSOC_DENIED_NOPBCC = 20,
5848 + WLAN_STATUS_ASSOC_DENIED_NOAGILITY = 21,
5849 + /* 802.11h */
5850 + WLAN_STATUS_ASSOC_DENIED_NOSPECTRUM = 22,
5851 + WLAN_STATUS_ASSOC_REJECTED_BAD_POWER = 23,
5852 + WLAN_STATUS_ASSOC_REJECTED_BAD_SUPP_CHAN = 24,
5853 + /* 802.11g */
5854 + WLAN_STATUS_ASSOC_DENIED_NOSHORTTIME = 25,
5855 + WLAN_STATUS_ASSOC_DENIED_NODSSSOFDM = 26,
5856 + /* 802.11i */
5857 + WLAN_STATUS_INVALID_IE = 40,
5858 + WLAN_STATUS_INVALID_GROUP_CIPHER = 41,
5859 + WLAN_STATUS_INVALID_PAIRWISE_CIPHER = 42,
5860 + WLAN_STATUS_INVALID_AKMP = 43,
5861 + WLAN_STATUS_UNSUPP_RSN_VERSION = 44,
5862 + WLAN_STATUS_INVALID_RSN_IE_CAP = 45,
5863 + WLAN_STATUS_CIPHER_SUITE_REJECTED = 46,
5864 +};
5865 +
5866 +/* Reason codes */
5867 +enum ieee80211_reasoncode {
5868 + WLAN_REASON_UNSPECIFIED = 1,
5869 + WLAN_REASON_PREV_AUTH_NOT_VALID = 2,
5870 + WLAN_REASON_DEAUTH_LEAVING = 3,
5871 + WLAN_REASON_DISASSOC_DUE_TO_INACTIVITY = 4,
5872 + WLAN_REASON_DISASSOC_AP_BUSY = 5,
5873 + WLAN_REASON_CLASS2_FRAME_FROM_NONAUTH_STA = 6,
5874 + WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA = 7,
5875 + WLAN_REASON_DISASSOC_STA_HAS_LEFT = 8,
5876 + WLAN_REASON_STA_REQ_ASSOC_WITHOUT_AUTH = 9,
5877 + /* 802.11h */
5878 + WLAN_REASON_DISASSOC_BAD_POWER = 10,
5879 + WLAN_REASON_DISASSOC_BAD_SUPP_CHAN = 11,
5880 + /* 802.11i */
5881 + WLAN_REASON_INVALID_IE = 13,
5882 + WLAN_REASON_MIC_FAILURE = 14,
5883 + WLAN_REASON_4WAY_HANDSHAKE_TIMEOUT = 15,
5884 + WLAN_REASON_GROUP_KEY_HANDSHAKE_TIMEOUT = 16,
5885 + WLAN_REASON_IE_DIFFERENT = 17,
5886 + WLAN_REASON_INVALID_GROUP_CIPHER = 18,
5887 + WLAN_REASON_INVALID_PAIRWISE_CIPHER = 19,
5888 + WLAN_REASON_INVALID_AKMP = 20,
5889 + WLAN_REASON_UNSUPP_RSN_VERSION = 21,
5890 + WLAN_REASON_INVALID_RSN_IE_CAP = 22,
5891 + WLAN_REASON_IEEE8021X_FAILED = 23,
5892 + WLAN_REASON_CIPHER_SUITE_REJECTED = 24,
5893 +};
5894 +
5895 +#define IEEE80211_STATMASK_SIGNAL (1<<0)
5896 +#define IEEE80211_STATMASK_RSSI (1<<1)
5897 +#define IEEE80211_STATMASK_NOISE (1<<2)
5898 +#define IEEE80211_STATMASK_RATE (1<<3)
5899 +#define IEEE80211_STATMASK_WEMASK 0x7
5900 +
5901 +#define IEEE80211_CCK_MODULATION (1<<0)
5902 +#define IEEE80211_OFDM_MODULATION (1<<1)
5903 +
5904 +#define IEEE80211_24GHZ_BAND (1<<0)
5905 +#define IEEE80211_52GHZ_BAND (1<<1)
5906 +
5907 +#define IEEE80211_CCK_RATE_LEN 4
5908 +#define IEEE80211_CCK_RATE_1MB 0x02
5909 +#define IEEE80211_CCK_RATE_2MB 0x04
5910 +#define IEEE80211_CCK_RATE_5MB 0x0B
5911 +#define IEEE80211_CCK_RATE_11MB 0x16
5912 +#define IEEE80211_OFDM_RATE_LEN 8
5913 +#define IEEE80211_OFDM_RATE_6MB 0x0C
5914 +#define IEEE80211_OFDM_RATE_9MB 0x12
5915 +#define IEEE80211_OFDM_RATE_12MB 0x18
5916 +#define IEEE80211_OFDM_RATE_18MB 0x24
5917 +#define IEEE80211_OFDM_RATE_24MB 0x30
5918 +#define IEEE80211_OFDM_RATE_36MB 0x48
5919 +#define IEEE80211_OFDM_RATE_48MB 0x60
5920 +#define IEEE80211_OFDM_RATE_54MB 0x6C
5921 +#define IEEE80211_BASIC_RATE_MASK 0x80
5922 +
5923 +#define IEEE80211_CCK_RATE_1MB_MASK (1<<0)
5924 +#define IEEE80211_CCK_RATE_2MB_MASK (1<<1)
5925 +#define IEEE80211_CCK_RATE_5MB_MASK (1<<2)
5926 +#define IEEE80211_CCK_RATE_11MB_MASK (1<<3)
5927 +#define IEEE80211_OFDM_RATE_6MB_MASK (1<<4)
5928 +#define IEEE80211_OFDM_RATE_9MB_MASK (1<<5)
5929 +#define IEEE80211_OFDM_RATE_12MB_MASK (1<<6)
5930 +#define IEEE80211_OFDM_RATE_18MB_MASK (1<<7)
5931 +#define IEEE80211_OFDM_RATE_24MB_MASK (1<<8)
5932 +#define IEEE80211_OFDM_RATE_36MB_MASK (1<<9)
5933 +#define IEEE80211_OFDM_RATE_48MB_MASK (1<<10)
5934 +#define IEEE80211_OFDM_RATE_54MB_MASK (1<<11)
5935 +
5936 +#define IEEE80211_CCK_RATES_MASK 0x0000000F
5937 +#define IEEE80211_CCK_BASIC_RATES_MASK (IEEE80211_CCK_RATE_1MB_MASK | \
5938 + IEEE80211_CCK_RATE_2MB_MASK)
5939 +#define IEEE80211_CCK_DEFAULT_RATES_MASK (IEEE80211_CCK_BASIC_RATES_MASK | \
5940 + IEEE80211_CCK_RATE_5MB_MASK | \
5941 + IEEE80211_CCK_RATE_11MB_MASK)
5942 +
5943 +#define IEEE80211_OFDM_RATES_MASK 0x00000FF0
5944 +#define IEEE80211_OFDM_BASIC_RATES_MASK (IEEE80211_OFDM_RATE_6MB_MASK | \
5945 + IEEE80211_OFDM_RATE_12MB_MASK | \
5946 + IEEE80211_OFDM_RATE_24MB_MASK)
5947 +#define IEEE80211_OFDM_DEFAULT_RATES_MASK (IEEE80211_OFDM_BASIC_RATES_MASK | \
5948 + IEEE80211_OFDM_RATE_9MB_MASK | \
5949 + IEEE80211_OFDM_RATE_18MB_MASK | \
5950 + IEEE80211_OFDM_RATE_36MB_MASK | \
5951 + IEEE80211_OFDM_RATE_48MB_MASK | \
5952 + IEEE80211_OFDM_RATE_54MB_MASK)
5953 +#define IEEE80211_DEFAULT_RATES_MASK (IEEE80211_OFDM_DEFAULT_RATES_MASK | \
5954 + IEEE80211_CCK_DEFAULT_RATES_MASK)
5955 +
5956 +#define IEEE80211_NUM_OFDM_RATES 8
5957 +#define IEEE80211_NUM_CCK_RATES 4
5958 +#define IEEE80211_OFDM_SHIFT_MASK_A 4
5959 +
5960 +
5961 +/* this is stolen and modified from the madwifi driver*/
5962 +#define IEEE80211_FC0_TYPE_MASK 0x0c
5963 +#define IEEE80211_FC0_TYPE_DATA 0x08
5964 +#define IEEE80211_FC0_SUBTYPE_MASK 0xB0
5965 +#define IEEE80211_FC0_SUBTYPE_QOS 0x80
5966 +
5967 +#define IEEE80211_QOS_HAS_SEQ(fc) \
5968 + (((fc) & (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == \
5969 + (IEEE80211_FC0_TYPE_DATA | IEEE80211_FC0_SUBTYPE_QOS))
5970 +
5971 +/* this is stolen from ipw2200 driver */
5972 +#define IEEE_IBSS_MAC_HASH_SIZE 31
5973 +struct ieee_ibss_seq {
5974 + u8 mac[ETH_ALEN];
5975 + u16 seq_num[17];
5976 + u16 frag_num[17];
5977 + unsigned long packet_time[17];
5978 + struct list_head list;
5979 +};
5980 +
5981 +/* NOTE: This data is for statistical purposes; not all hardware provides this
5982 + * information for frames received. Not setting these will not cause
5983 + * any adverse affects. */
5984 +struct ieee80211_rx_stats {
5985 +#if 1
5986 + u32 mac_time[2];
5987 + s8 rssi;
5988 + u8 signal;
5989 + u8 noise;
5990 + u16 rate; /* in 100 kbps */
5991 + u8 received_channel;
5992 + u8 control;
5993 + u8 mask;
5994 + u8 freq;
5995 + u16 len;
5996 + u64 tsf;
5997 + u32 beacon_time;
5998 + u8 nic_type;
5999 + u16 Length;
6000 + // u8 DataRate; // In 0.5 Mbps
6001 + u8 SignalQuality; // in 0-100 index.
6002 + s32 RecvSignalPower; // Real power in dBm for this packet, no beautification and aggregation.
6003 + s8 RxPower; // in dBm Translate from PWdB
6004 + u8 SignalStrength; // in 0-100 index.
6005 + u16 bHwError:1;
6006 + u16 bCRC:1;
6007 + u16 bICV:1;
6008 + u16 bShortPreamble:1;
6009 + u16 Antenna:1; //for rtl8185
6010 + u16 Decrypted:1; //for rtl8185, rtl8187
6011 + u16 Wakeup:1; //for rtl8185
6012 + u16 Reserved0:1; //for rtl8185
6013 + u8 AGC;
6014 + u32 TimeStampLow;
6015 + u32 TimeStampHigh;
6016 + bool bShift;
6017 + bool bIsQosData; // Added by Annie, 2005-12-22.
6018 + u8 UserPriority;
6019 +
6020 + //1!!!!!!!!!!!!!!!!!!!!!!!!!!!
6021 + //1Attention Please!!!<11n or 8190 specific code should be put below this line>
6022 + //1!!!!!!!!!!!!!!!!!!!!!!!!!!!
6023 +
6024 + u8 RxDrvInfoSize;
6025 + u8 RxBufShift;
6026 + bool bIsAMPDU;
6027 + bool bFirstMPDU;
6028 + bool bContainHTC;
6029 + bool RxIs40MHzPacket;
6030 + u32 RxPWDBAll;
6031 + u8 RxMIMOSignalStrength[4]; // in 0~100 index
6032 + s8 RxMIMOSignalQuality[2];
6033 + bool bPacketMatchBSSID;
6034 + bool bIsCCK;
6035 + bool bPacketToSelf;
6036 + //added by amy
6037 + u8* virtual_address;
6038 + u16 packetlength; // Total packet length: Must equal to sum of all FragLength
6039 + u16 fraglength; // FragLength should equal to PacketLength in non-fragment case
6040 + u16 fragoffset; // Data offset for this fragment
6041 + u16 ntotalfrag;
6042 + bool bisrxaggrsubframe;
6043 + bool bPacketBeacon; //cosa add for rssi
6044 + bool bToSelfBA; //cosa add for rssi
6045 + char cck_adc_pwdb[4]; //cosa add for rx path selection
6046 + u16 Seq_Num;
6047 +#endif
6048 +
6049 +};
6050 +
6051 +/* IEEE 802.11 requires that STA supports concurrent reception of at least
6052 + * three fragmented frames. This define can be increased to support more
6053 + * concurrent frames, but it should be noted that each entry can consume about
6054 + * 2 kB of RAM and increasing cache size will slow down frame reassembly. */
6055 +#define IEEE80211_FRAG_CACHE_LEN 4
6056 +
6057 +struct ieee80211_frag_entry {
6058 + unsigned long first_frag_time;
6059 + unsigned int seq;
6060 + unsigned int last_frag;
6061 + struct sk_buff *skb;
6062 + u8 src_addr[ETH_ALEN];
6063 + u8 dst_addr[ETH_ALEN];
6064 +};
6065 +
6066 +struct ieee80211_stats {
6067 + unsigned int tx_unicast_frames;
6068 + unsigned int tx_multicast_frames;
6069 + unsigned int tx_fragments;
6070 + unsigned int tx_unicast_octets;
6071 + unsigned int tx_multicast_octets;
6072 + unsigned int tx_deferred_transmissions;
6073 + unsigned int tx_single_retry_frames;
6074 + unsigned int tx_multiple_retry_frames;
6075 + unsigned int tx_retry_limit_exceeded;
6076 + unsigned int tx_discards;
6077 + unsigned int rx_unicast_frames;
6078 + unsigned int rx_multicast_frames;
6079 + unsigned int rx_fragments;
6080 + unsigned int rx_unicast_octets;
6081 + unsigned int rx_multicast_octets;
6082 + unsigned int rx_fcs_errors;
6083 + unsigned int rx_discards_no_buffer;
6084 + unsigned int tx_discards_wrong_sa;
6085 + unsigned int rx_discards_undecryptable;
6086 + unsigned int rx_message_in_msg_fragments;
6087 + unsigned int rx_message_in_bad_msg_fragments;
6088 +};
6089 +
6090 +struct ieee80211_device;
6091 +
6092 +#include "ieee80211_crypt.h"
6093 +
6094 +#define SEC_KEY_1 (1<<0)
6095 +#define SEC_KEY_2 (1<<1)
6096 +#define SEC_KEY_3 (1<<2)
6097 +#define SEC_KEY_4 (1<<3)
6098 +#define SEC_ACTIVE_KEY (1<<4)
6099 +#define SEC_AUTH_MODE (1<<5)
6100 +#define SEC_UNICAST_GROUP (1<<6)
6101 +#define SEC_LEVEL (1<<7)
6102 +#define SEC_ENABLED (1<<8)
6103 +#define SEC_ENCRYPT (1<<9)
6104 +
6105 +#define SEC_LEVEL_0 0 /* None */
6106 +#define SEC_LEVEL_1 1 /* WEP 40 and 104 bit */
6107 +#define SEC_LEVEL_2 2 /* Level 1 + TKIP */
6108 +#define SEC_LEVEL_2_CKIP 3 /* Level 1 + CKIP */
6109 +#define SEC_LEVEL_3 4 /* Level 2 + CCMP */
6110 +
6111 +#define SEC_ALG_NONE 0
6112 +#define SEC_ALG_WEP 1
6113 +#define SEC_ALG_TKIP 2
6114 +#define SEC_ALG_CCMP 3
6115 +
6116 +#define WEP_KEYS 4
6117 +#define WEP_KEY_LEN 13
6118 +#define SCM_KEY_LEN 32
6119 +#define SCM_TEMPORAL_KEY_LENGTH 16
6120 +
6121 +struct ieee80211_security {
6122 + u16 active_key:2,
6123 + enabled:1,
6124 + auth_mode:2,
6125 + auth_algo:4,
6126 + unicast_uses_group:1,
6127 + encrypt:1;
6128 + u8 key_sizes[WEP_KEYS];
6129 + u8 keys[WEP_KEYS][SCM_KEY_LEN];
6130 + u8 level;
6131 + u16 flags;
6132 +} __attribute__ ((packed));
6133 +
6134 +
6135 +/*
6136 + 802.11 data frame from AP
6137 + ,-------------------------------------------------------------------.
6138 +Bytes | 2 | 2 | 6 | 6 | 6 | 2 | 0..2312 | 4 |
6139 + |------|------|---------|---------|---------|------|---------|------|
6140 +Desc. | ctrl | dura | DA/RA | TA | SA | Sequ | frame | fcs |
6141 + | | tion | (BSSID) | | | ence | data | |
6142 + `-------------------------------------------------------------------'
6143 +Total: 28-2340 bytes
6144 +*/
6145 +
6146 +/* Management Frame Information Element Types */
6147 +enum ieee80211_mfie {
6148 + MFIE_TYPE_SSID = 0,
6149 + MFIE_TYPE_RATES = 1,
6150 + MFIE_TYPE_FH_SET = 2,
6151 + MFIE_TYPE_DS_SET = 3,
6152 + MFIE_TYPE_CF_SET = 4,
6153 + MFIE_TYPE_TIM = 5,
6154 + MFIE_TYPE_IBSS_SET = 6,
6155 + MFIE_TYPE_COUNTRY = 7,
6156 + MFIE_TYPE_HOP_PARAMS = 8,
6157 + MFIE_TYPE_HOP_TABLE = 9,
6158 + MFIE_TYPE_REQUEST = 10,
6159 + MFIE_TYPE_CHALLENGE = 16,
6160 + MFIE_TYPE_POWER_CONSTRAINT = 32,
6161 + MFIE_TYPE_POWER_CAPABILITY = 33,
6162 + MFIE_TYPE_TPC_REQUEST = 34,
6163 + MFIE_TYPE_TPC_REPORT = 35,
6164 + MFIE_TYPE_SUPP_CHANNELS = 36,
6165 + MFIE_TYPE_CSA = 37,
6166 + MFIE_TYPE_MEASURE_REQUEST = 38,
6167 + MFIE_TYPE_MEASURE_REPORT = 39,
6168 + MFIE_TYPE_QUIET = 40,
6169 + MFIE_TYPE_IBSS_DFS = 41,
6170 + MFIE_TYPE_ERP = 42,
6171 + MFIE_TYPE_RSN = 48,
6172 + MFIE_TYPE_RATES_EX = 50,
6173 + MFIE_TYPE_HT_CAP= 45,
6174 + MFIE_TYPE_HT_INFO= 61,
6175 + MFIE_TYPE_AIRONET=133,
6176 + MFIE_TYPE_GENERIC = 221,
6177 + MFIE_TYPE_QOS_PARAMETER = 222,
6178 +};
6179 +
6180 +/* Minimal header; can be used for passing 802.11 frames with sufficient
6181 + * information to determine what type of underlying data type is actually
6182 + * stored in the data. */
6183 +struct ieee80211_hdr {
6184 + __le16 frame_ctl;
6185 + __le16 duration_id;
6186 + u8 payload[0];
6187 +} __attribute__ ((packed));
6188 +
6189 +struct ieee80211_hdr_1addr {
6190 + __le16 frame_ctl;
6191 + __le16 duration_id;
6192 + u8 addr1[ETH_ALEN];
6193 + u8 payload[0];
6194 +} __attribute__ ((packed));
6195 +
6196 +struct ieee80211_hdr_2addr {
6197 + __le16 frame_ctl;
6198 + __le16 duration_id;
6199 + u8 addr1[ETH_ALEN];
6200 + u8 addr2[ETH_ALEN];
6201 + u8 payload[0];
6202 +} __attribute__ ((packed));
6203 +
6204 +struct ieee80211_hdr_3addr {
6205 + __le16 frame_ctl;
6206 + __le16 duration_id;
6207 + u8 addr1[ETH_ALEN];
6208 + u8 addr2[ETH_ALEN];
6209 + u8 addr3[ETH_ALEN];
6210 + __le16 seq_ctl;
6211 + u8 payload[0];
6212 +} __attribute__ ((packed));
6213 +
6214 +struct ieee80211_hdr_4addr {
6215 + __le16 frame_ctl;
6216 + __le16 duration_id;
6217 + u8 addr1[ETH_ALEN];
6218 + u8 addr2[ETH_ALEN];
6219 + u8 addr3[ETH_ALEN];
6220 + __le16 seq_ctl;
6221 + u8 addr4[ETH_ALEN];
6222 + u8 payload[0];
6223 +} __attribute__ ((packed));
6224 +
6225 +struct ieee80211_hdr_3addrqos {
6226 + __le16 frame_ctl;
6227 + __le16 duration_id;
6228 + u8 addr1[ETH_ALEN];
6229 + u8 addr2[ETH_ALEN];
6230 + u8 addr3[ETH_ALEN];
6231 + __le16 seq_ctl;
6232 + u8 payload[0];
6233 + __le16 qos_ctl;
6234 +} __attribute__ ((packed));
6235 +
6236 +struct ieee80211_hdr_4addrqos {
6237 + __le16 frame_ctl;
6238 + __le16 duration_id;
6239 + u8 addr1[ETH_ALEN];
6240 + u8 addr2[ETH_ALEN];
6241 + u8 addr3[ETH_ALEN];
6242 + __le16 seq_ctl;
6243 + u8 addr4[ETH_ALEN];
6244 + u8 payload[0];
6245 + __le16 qos_ctl;
6246 +} __attribute__ ((packed));
6247 +
6248 +struct ieee80211_info_element {
6249 + u8 id;
6250 + u8 len;
6251 + u8 data[0];
6252 +} __attribute__ ((packed));
6253 +
6254 +struct ieee80211_authentication {
6255 + struct ieee80211_hdr_3addr header;
6256 + __le16 algorithm;
6257 + __le16 transaction;
6258 + __le16 status;
6259 + /*challenge*/
6260 + struct ieee80211_info_element info_element[0];
6261 +} __attribute__ ((packed));
6262 +
6263 +struct ieee80211_disassoc {
6264 + struct ieee80211_hdr_3addr header;
6265 + __le16 reason;
6266 +} __attribute__ ((packed));
6267 +
6268 +struct ieee80211_probe_request {
6269 + struct ieee80211_hdr_3addr header;
6270 + /* SSID, supported rates */
6271 + struct ieee80211_info_element info_element[0];
6272 +} __attribute__ ((packed));
6273 +
6274 +struct ieee80211_probe_response {
6275 + struct ieee80211_hdr_3addr header;
6276 + u32 time_stamp[2];
6277 + __le16 beacon_interval;
6278 + __le16 capability;
6279 + /* SSID, supported rates, FH params, DS params,
6280 + * CF params, IBSS params, TIM (if beacon), RSN */
6281 + struct ieee80211_info_element info_element[0];
6282 +} __attribute__ ((packed));
6283 +
6284 +/* Alias beacon for probe_response */
6285 +#define ieee80211_beacon ieee80211_probe_response
6286 +
6287 +struct ieee80211_assoc_request_frame {
6288 + struct ieee80211_hdr_3addr header;
6289 + __le16 capability;
6290 + __le16 listen_interval;
6291 + /* SSID, supported rates, RSN */
6292 + struct ieee80211_info_element info_element[0];
6293 +} __attribute__ ((packed));
6294 +
6295 +struct ieee80211_reassoc_request_frame {
6296 + struct ieee80211_hdr_3addr header;
6297 + __le16 capability;
6298 + __le16 listen_interval;
6299 + u8 current_ap[ETH_ALEN];
6300 + /* SSID, supported rates, RSN */
6301 + struct ieee80211_info_element info_element[0];
6302 +} __attribute__ ((packed));
6303 +
6304 +struct ieee80211_assoc_response_frame {
6305 + struct ieee80211_hdr_3addr header;
6306 + __le16 capability;
6307 + __le16 status;
6308 + __le16 aid;
6309 + struct ieee80211_info_element info_element[0]; /* supported rates */
6310 +} __attribute__ ((packed));
6311 +
6312 +struct ieee80211_txb {
6313 + u8 nr_frags;
6314 + u8 encrypted;
6315 + u8 queue_index;
6316 + u8 rts_included;
6317 + u16 reserved;
6318 + __le16 frag_size;
6319 + __le16 payload_size;
6320 + struct sk_buff *fragments[0];
6321 +};
6322 +
6323 +#define MAX_TX_AGG_COUNT 16
6324 +struct ieee80211_drv_agg_txb {
6325 + u8 nr_drv_agg_frames;
6326 + struct sk_buff *tx_agg_frames[MAX_TX_AGG_COUNT];
6327 +}__attribute__((packed));
6328 +
6329 +#define MAX_SUBFRAME_COUNT 64
6330 +struct ieee80211_rxb {
6331 + u8 nr_subframes;
6332 + struct sk_buff *subframes[MAX_SUBFRAME_COUNT];
6333 + u8 dst[ETH_ALEN];
6334 + u8 src[ETH_ALEN];
6335 +}__attribute__((packed));
6336 +
6337 +typedef union _frameqos {
6338 + u16 shortdata;
6339 + u8 chardata[2];
6340 + struct {
6341 + u16 tid:4;
6342 + u16 eosp:1;
6343 + u16 ack_policy:2;
6344 + u16 reserved:1;
6345 + u16 txop:8;
6346 + }field;
6347 +}frameqos,*pframeqos;
6348 +
6349 +/* SWEEP TABLE ENTRIES NUMBER*/
6350 +#define MAX_SWEEP_TAB_ENTRIES 42
6351 +#define MAX_SWEEP_TAB_ENTRIES_PER_PACKET 7
6352 +/* MAX_RATES_LENGTH needs to be 12. The spec says 8, and many APs
6353 + * only use 8, and then use extended rates for the remaining supported
6354 + * rates. Other APs, however, stick all of their supported rates on the
6355 + * main rates information element... */
6356 +#define MAX_RATES_LENGTH ((u8)12)
6357 +#define MAX_RATES_EX_LENGTH ((u8)16)
6358 +#define MAX_NETWORK_COUNT 128
6359 +
6360 +#define MAX_CHANNEL_NUMBER 161
6361 +#define IEEE80211_SOFTMAC_SCAN_TIME 100
6362 +//(HZ / 2)
6363 +#define IEEE80211_SOFTMAC_ASSOC_RETRY_TIME (HZ * 2)
6364 +
6365 +#define CRC_LENGTH 4U
6366 +
6367 +#define MAX_WPA_IE_LEN 64
6368 +
6369 +#define NETWORK_EMPTY_ESSID (1<<0)
6370 +#define NETWORK_HAS_OFDM (1<<1)
6371 +#define NETWORK_HAS_CCK (1<<2)
6372 +
6373 +/* QoS structure */
6374 +#define NETWORK_HAS_QOS_PARAMETERS (1<<3)
6375 +#define NETWORK_HAS_QOS_INFORMATION (1<<4)
6376 +#define NETWORK_HAS_QOS_MASK (NETWORK_HAS_QOS_PARAMETERS | \
6377 + NETWORK_HAS_QOS_INFORMATION)
6378 +/* 802.11h */
6379 +#define NETWORK_HAS_POWER_CONSTRAINT (1<<5)
6380 +#define NETWORK_HAS_CSA (1<<6)
6381 +#define NETWORK_HAS_QUIET (1<<7)
6382 +#define NETWORK_HAS_IBSS_DFS (1<<8)
6383 +#define NETWORK_HAS_TPC_REPORT (1<<9)
6384 +
6385 +#define NETWORK_HAS_ERP_VALUE (1<<10)
6386 +
6387 +#define QOS_QUEUE_NUM 4
6388 +#define QOS_OUI_LEN 3
6389 +#define QOS_OUI_TYPE 2
6390 +#define QOS_ELEMENT_ID 221
6391 +#define QOS_OUI_INFO_SUB_TYPE 0
6392 +#define QOS_OUI_PARAM_SUB_TYPE 1
6393 +#define QOS_VERSION_1 1
6394 +#define QOS_AIFSN_MIN_VALUE 2
6395 +#if 1
6396 +struct ieee80211_qos_information_element {
6397 + u8 elementID;
6398 + u8 length;
6399 + u8 qui[QOS_OUI_LEN];
6400 + u8 qui_type;
6401 + u8 qui_subtype;
6402 + u8 version;
6403 + u8 ac_info;
6404 +} __attribute__ ((packed));
6405 +
6406 +struct ieee80211_qos_ac_parameter {
6407 + u8 aci_aifsn;
6408 + u8 ecw_min_max;
6409 + __le16 tx_op_limit;
6410 +} __attribute__ ((packed));
6411 +
6412 +struct ieee80211_qos_parameter_info {
6413 + struct ieee80211_qos_information_element info_element;
6414 + u8 reserved;
6415 + struct ieee80211_qos_ac_parameter ac_params_record[QOS_QUEUE_NUM];
6416 +} __attribute__ ((packed));
6417 +
6418 +struct ieee80211_qos_parameters {
6419 + __le16 cw_min[QOS_QUEUE_NUM];
6420 + __le16 cw_max[QOS_QUEUE_NUM];
6421 + u8 aifs[QOS_QUEUE_NUM];
6422 + u8 flag[QOS_QUEUE_NUM];
6423 + __le16 tx_op_limit[QOS_QUEUE_NUM];
6424 +} __attribute__ ((packed));
6425 +
6426 +struct ieee80211_qos_data {
6427 + struct ieee80211_qos_parameters parameters;
6428 + int active;
6429 + int supported;
6430 + u8 param_count;
6431 + u8 old_param_count;
6432 +};
6433 +
6434 +struct ieee80211_tim_parameters {
6435 + u8 tim_count;
6436 + u8 tim_period;
6437 +} __attribute__ ((packed));
6438 +
6439 +//#else
6440 +struct ieee80211_wmm_ac_param {
6441 + u8 ac_aci_acm_aifsn;
6442 + u8 ac_ecwmin_ecwmax;
6443 + u16 ac_txop_limit;
6444 +};
6445 +
6446 +struct ieee80211_wmm_ts_info {
6447 + u8 ac_dir_tid;
6448 + u8 ac_up_psb;
6449 + u8 reserved;
6450 +} __attribute__ ((packed));
6451 +
6452 +struct ieee80211_wmm_tspec_elem {
6453 + struct ieee80211_wmm_ts_info ts_info;
6454 + u16 norm_msdu_size;
6455 + u16 max_msdu_size;
6456 + u32 min_serv_inter;
6457 + u32 max_serv_inter;
6458 + u32 inact_inter;
6459 + u32 suspen_inter;
6460 + u32 serv_start_time;
6461 + u32 min_data_rate;
6462 + u32 mean_data_rate;
6463 + u32 peak_data_rate;
6464 + u32 max_burst_size;
6465 + u32 delay_bound;
6466 + u32 min_phy_rate;
6467 + u16 surp_band_allow;
6468 + u16 medium_time;
6469 +}__attribute__((packed));
6470 +#endif
6471 +enum eap_type {
6472 + EAP_PACKET = 0,
6473 + EAPOL_START,
6474 + EAPOL_LOGOFF,
6475 + EAPOL_KEY,
6476 + EAPOL_ENCAP_ASF_ALERT
6477 +};
6478 +
6479 +static const char *eap_types[] = {
6480 + [EAP_PACKET] = "EAP-Packet",
6481 + [EAPOL_START] = "EAPOL-Start",
6482 + [EAPOL_LOGOFF] = "EAPOL-Logoff",
6483 + [EAPOL_KEY] = "EAPOL-Key",
6484 + [EAPOL_ENCAP_ASF_ALERT] = "EAPOL-Encap-ASF-Alert"
6485 +};
6486 +
6487 +static inline const char *eap_get_type(int type)
6488 +{
6489 + return ((u32)type >= ARRAY_SIZE(eap_types)) ? "Unknown" : eap_types[type];
6490 +}
6491 +//added by amy for reorder
6492 +static inline u8 Frame_QoSTID(u8* buf)
6493 +{
6494 + struct ieee80211_hdr_3addr *hdr;
6495 + u16 fc;
6496 + hdr = (struct ieee80211_hdr_3addr *)buf;
6497 + fc = le16_to_cpu(hdr->frame_ctl);
6498 + return (u8)((frameqos*)(buf + (((fc & IEEE80211_FCTL_TODS)&&(fc & IEEE80211_FCTL_FROMDS))? 30 : 24)))->field.tid;
6499 +}
6500 +
6501 +//added by amy for reorder
6502 +
6503 +struct eapol {
6504 + u8 snap[6];
6505 + u16 ethertype;
6506 + u8 version;
6507 + u8 type;
6508 + u16 length;
6509 +} __attribute__ ((packed));
6510 +
6511 +struct ieee80211_softmac_stats{
6512 + unsigned int rx_ass_ok;
6513 + unsigned int rx_ass_err;
6514 + unsigned int rx_probe_rq;
6515 + unsigned int tx_probe_rs;
6516 + unsigned int tx_beacons;
6517 + unsigned int rx_auth_rq;
6518 + unsigned int rx_auth_rs_ok;
6519 + unsigned int rx_auth_rs_err;
6520 + unsigned int tx_auth_rq;
6521 + unsigned int no_auth_rs;
6522 + unsigned int no_ass_rs;
6523 + unsigned int tx_ass_rq;
6524 + unsigned int rx_ass_rq;
6525 + unsigned int tx_probe_rq;
6526 + unsigned int reassoc;
6527 + unsigned int swtxstop;
6528 + unsigned int swtxawake;
6529 + unsigned char CurrentShowTxate;
6530 + unsigned char last_packet_rate;
6531 + unsigned int txretrycount;
6532 +};
6533 +
6534 +#define BEACON_PROBE_SSID_ID_POSITION 12
6535 +
6536 +struct ieee80211_info_element_hdr {
6537 + u8 id;
6538 + u8 len;
6539 +} __attribute__ ((packed));
6540 +
6541 +/*
6542 + * These are the data types that can make up management packets
6543 + *
6544 + u16 auth_algorithm;
6545 + u16 auth_sequence;
6546 + u16 beacon_interval;
6547 + u16 capability;
6548 + u8 current_ap[ETH_ALEN];
6549 + u16 listen_interval;
6550 + struct {
6551 + u16 association_id:14, reserved:2;
6552 + } __attribute__ ((packed));
6553 + u32 time_stamp[2];
6554 + u16 reason;
6555 + u16 status;
6556 +*/
6557 +
6558 +#define IEEE80211_DEFAULT_TX_ESSID "Penguin"
6559 +#define IEEE80211_DEFAULT_BASIC_RATE 2 //1Mbps
6560 +
6561 +enum {WMM_all_frame, WMM_two_frame, WMM_four_frame, WMM_six_frame};
6562 +#define MAX_SP_Len (WMM_all_frame << 4)
6563 +#define IEEE80211_QOS_TID 0x0f
6564 +#define QOS_CTL_NOTCONTAIN_ACK (0x01 << 5)
6565 +
6566 +#define IEEE80211_DTIM_MBCAST 4
6567 +#define IEEE80211_DTIM_UCAST 2
6568 +#define IEEE80211_DTIM_VALID 1
6569 +#define IEEE80211_DTIM_INVALID 0
6570 +
6571 +#define IEEE80211_PS_DISABLED 0
6572 +#define IEEE80211_PS_UNICAST IEEE80211_DTIM_UCAST
6573 +#define IEEE80211_PS_MBCAST IEEE80211_DTIM_MBCAST
6574 +
6575 +//added by David for QoS 2006/6/30
6576 +//#define WMM_Hang_8187
6577 +#ifdef WMM_Hang_8187
6578 +#undef WMM_Hang_8187
6579 +#endif
6580 +
6581 +#define WME_AC_BK 0x00
6582 +#define WME_AC_BE 0x01
6583 +#define WME_AC_VI 0x02
6584 +#define WME_AC_VO 0x03
6585 +#define WME_ACI_MASK 0x03
6586 +#define WME_AIFSN_MASK 0x03
6587 +#define WME_AC_PRAM_LEN 16
6588 +
6589 +#define MAX_RECEIVE_BUFFER_SIZE 9100
6590 +
6591 +//UP Mapping to AC, using in MgntQuery_SequenceNumber() and maybe for DSCP
6592 +//#define UP2AC(up) ((up<3) ? ((up==0)?1:0) : (up>>1))
6593 +#if 1
6594 +#define UP2AC(up) ( \
6595 + ((up) < 1) ? WME_AC_BE : \
6596 + ((up) < 3) ? WME_AC_BK : \
6597 + ((up) < 4) ? WME_AC_BE : \
6598 + ((up) < 6) ? WME_AC_VI : \
6599 + WME_AC_VO)
6600 +#endif
6601 +//AC Mapping to UP, using in Tx part for selecting the corresponding TX queue
6602 +#define AC2UP(_ac) ( \
6603 + ((_ac) == WME_AC_VO) ? 6 : \
6604 + ((_ac) == WME_AC_VI) ? 5 : \
6605 + ((_ac) == WME_AC_BK) ? 1 : \
6606 + 0)
6607 +
6608 +#define ETHER_ADDR_LEN 6 /* length of an Ethernet address */
6609 +#define ETHERNET_HEADER_SIZE 14 /* length of two Ethernet address plus ether type*/
6610 +
6611 +struct ether_header {
6612 + u8 ether_dhost[ETHER_ADDR_LEN];
6613 + u8 ether_shost[ETHER_ADDR_LEN];
6614 + u16 ether_type;
6615 +} __attribute__((packed));
6616 +
6617 +#ifndef ETHERTYPE_PAE
6618 +#define ETHERTYPE_PAE 0x888e /* EAPOL PAE/802.1x */
6619 +#endif
6620 +#ifndef ETHERTYPE_IP
6621 +#define ETHERTYPE_IP 0x0800 /* IP protocol */
6622 +#endif
6623 +
6624 +typedef struct _bss_ht{
6625 +
6626 + bool support_ht;
6627 +
6628 + // HT related elements
6629 + u8 ht_cap_buf[32];
6630 + u16 ht_cap_len;
6631 + u8 ht_info_buf[32];
6632 + u16 ht_info_len;
6633 +
6634 + HT_SPEC_VER ht_spec_ver;
6635 + //HT_CAPABILITY_ELE bdHTCapEle;
6636 + //HT_INFORMATION_ELE bdHTInfoEle;
6637 +
6638 + bool aggregation;
6639 + bool long_slot_time;
6640 +}bss_ht, *pbss_ht;
6641 +
6642 +typedef enum _erp_t{
6643 + ERP_NonERPpresent = 0x01,
6644 + ERP_UseProtection = 0x02,
6645 + ERP_BarkerPreambleMode = 0x04,
6646 +} erp_t;
6647 +
6648 +
6649 +struct ieee80211_network {
6650 + /* These entries are used to identify a unique network */
6651 + u8 bssid[ETH_ALEN];
6652 + u8 channel;
6653 + /* Ensure null-terminated for any debug msgs */
6654 + u8 ssid[IW_ESSID_MAX_SIZE + 1];
6655 + u8 ssid_len;
6656 +#if 1
6657 + struct ieee80211_qos_data qos_data;
6658 +#else
6659 + // Qos related. Added by Annie, 2005-11-01.
6660 + BSS_QOS BssQos;
6661 +#endif
6662 +
6663 + //added by amy for LEAP
6664 + bool bWithAironetIE;
6665 + bool bCkipSupported;
6666 + bool bCcxRmEnable;
6667 + u16 CcxRmState[2];
6668 + // CCXv4 S59, MBSSID.
6669 + bool bMBssidValid;
6670 + u8 MBssidMask;
6671 + u8 MBssid[6];
6672 + // CCX 2 S38, WLAN Device Version Number element. Annie, 2006-08-20.
6673 + bool bWithCcxVerNum;
6674 + u8 BssCcxVerNumber;
6675 + /* These are network statistics */
6676 + struct ieee80211_rx_stats stats;
6677 + u16 capability;
6678 + u8 rates[MAX_RATES_LENGTH];
6679 + u8 rates_len;
6680 + u8 rates_ex[MAX_RATES_EX_LENGTH];
6681 + u8 rates_ex_len;
6682 + unsigned long last_scanned;
6683 + u8 mode;
6684 + u32 flags;
6685 + u32 last_associate;
6686 + u32 time_stamp[2];
6687 + u16 beacon_interval;
6688 + u16 listen_interval;
6689 + u16 atim_window;
6690 + u8 erp_value;
6691 + u8 wpa_ie[MAX_WPA_IE_LEN];
6692 + size_t wpa_ie_len;
6693 + u8 rsn_ie[MAX_WPA_IE_LEN];
6694 + size_t rsn_ie_len;
6695 +
6696 + struct ieee80211_tim_parameters tim;
6697 + u8 dtim_period;
6698 + u8 dtim_data;
6699 + u32 last_dtim_sta_time[2];
6700 +
6701 + //appeded for QoS
6702 + u8 wmm_info;
6703 + struct ieee80211_wmm_ac_param wmm_param[4];
6704 + u8 QoS_Enable;
6705 +#ifdef THOMAS_TURBO
6706 + u8 Turbo_Enable;//enable turbo mode, added by thomas
6707 +#endif
6708 +#ifdef ENABLE_DOT11D
6709 + u16 CountryIeLen;
6710 + u8 CountryIeBuf[MAX_IE_LEN];
6711 +#endif
6712 + // HT Related, by amy, 2008.04.29
6713 + BSS_HT bssht;
6714 + // Add to handle broadcom AP management frame CCK rate.
6715 + bool broadcom_cap_exist;
6716 + bool ralink_cap_exist;
6717 + bool atheros_cap_exist;
6718 + bool cisco_cap_exist;
6719 + bool unknown_cap_exist;
6720 +// u8 berp_info;
6721 + bool berp_info_valid;
6722 + bool buseprotection;
6723 + //put at the end of the structure.
6724 + struct list_head list;
6725 +};
6726 +
6727 +#if 1
6728 +enum ieee80211_state {
6729 +
6730 + /* the card is not linked at all */
6731 + IEEE80211_NOLINK = 0,
6732 +
6733 + /* IEEE80211_ASSOCIATING* are for BSS client mode
6734 + * the driver shall not perform RX filtering unless
6735 + * the state is LINKED.
6736 + * The driver shall just check for the state LINKED and
6737 + * defaults to NOLINK for ALL the other states (including
6738 + * LINKED_SCANNING)
6739 + */
6740 +
6741 + /* the association procedure will start (wq scheduling)*/
6742 + IEEE80211_ASSOCIATING,
6743 + IEEE80211_ASSOCIATING_RETRY,
6744 +
6745 + /* the association procedure is sending AUTH request*/
6746 + IEEE80211_ASSOCIATING_AUTHENTICATING,
6747 +
6748 + /* the association procedure has successfully authentcated
6749 + * and is sending association request
6750 + */
6751 + IEEE80211_ASSOCIATING_AUTHENTICATED,
6752 +
6753 + /* the link is ok. the card associated to a BSS or linked
6754 + * to a ibss cell or acting as an AP and creating the bss
6755 + */
6756 + IEEE80211_LINKED,
6757 +
6758 + /* same as LINKED, but the driver shall apply RX filter
6759 + * rules as we are in NO_LINK mode. As the card is still
6760 + * logically linked, but it is doing a syncro site survey
6761 + * then it will be back to LINKED state.
6762 + */
6763 + IEEE80211_LINKED_SCANNING,
6764 +
6765 +};
6766 +#else
6767 +enum ieee80211_state {
6768 + IEEE80211_UNINITIALIZED = 0,
6769 + IEEE80211_INITIALIZED,
6770 + IEEE80211_ASSOCIATING,
6771 + IEEE80211_ASSOCIATED,
6772 + IEEE80211_AUTHENTICATING,
6773 + IEEE80211_AUTHENTICATED,
6774 + IEEE80211_SHUTDOWN
6775 +};
6776 +#endif
6777 +
6778 +#define DEFAULT_MAX_SCAN_AGE (15 * HZ)
6779 +#define DEFAULT_FTS 2346
6780 +
6781 +#define CFG_IEEE80211_RESERVE_FCS (1<<0)
6782 +#define CFG_IEEE80211_COMPUTE_FCS (1<<1)
6783 +#define CFG_IEEE80211_RTS (1<<2)
6784 +
6785 +#define IEEE80211_24GHZ_MIN_CHANNEL 1
6786 +#define IEEE80211_24GHZ_MAX_CHANNEL 14
6787 +#define IEEE80211_24GHZ_CHANNELS (IEEE80211_24GHZ_MAX_CHANNEL - \
6788 + IEEE80211_24GHZ_MIN_CHANNEL + 1)
6789 +
6790 +#define IEEE80211_52GHZ_MIN_CHANNEL 34
6791 +#define IEEE80211_52GHZ_MAX_CHANNEL 165
6792 +#define IEEE80211_52GHZ_CHANNELS (IEEE80211_52GHZ_MAX_CHANNEL - \
6793 + IEEE80211_52GHZ_MIN_CHANNEL + 1)
6794 +
6795 +#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,11))
6796 +extern inline int is_multicast_ether_addr(const u8 *addr)
6797 +{
6798 + return ((addr[0] != 0xff) && (0x01 & addr[0]));
6799 +}
6800 +#endif
6801 +
6802 +#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,13))
6803 +extern inline int is_broadcast_ether_addr(const u8 *addr)
6804 +{
6805 + return ((addr[0] == 0xff) && (addr[1] == 0xff) && (addr[2] == 0xff) && \
6806 + (addr[3] == 0xff) && (addr[4] == 0xff) && (addr[5] == 0xff));
6807 +}
6808 +#endif
6809 +
6810 +typedef struct tx_pending_t{
6811 + int frag;
6812 + struct ieee80211_txb *txb;
6813 +}tx_pending_t;
6814 +
6815 +typedef struct _bandwidth_autoswitch
6816 +{
6817 + long threshold_20Mhzto40Mhz;
6818 + long threshold_40Mhzto20Mhz;
6819 + bool bforced_tx20Mhz;
6820 + bool bautoswitch_enable;
6821 +}bandwidth_autoswitch,*pbandwidth_autoswitch;
6822 +
6823 +
6824 +//added by amy for order
6825 +
6826 +#define REORDER_WIN_SIZE 128
6827 +#define REORDER_ENTRY_NUM 128
6828 +typedef struct _RX_REORDER_ENTRY
6829 +{
6830 + struct list_head List;
6831 + u16 SeqNum;
6832 + struct ieee80211_rxb* prxb;
6833 +} RX_REORDER_ENTRY, *PRX_REORDER_ENTRY;
6834 +//added by amy for order
6835 +typedef enum _Fsync_State{
6836 + Default_Fsync,
6837 + HW_Fsync,
6838 + SW_Fsync
6839 +}Fsync_State;
6840 +
6841 +// Power save mode configured.
6842 +typedef enum _RT_PS_MODE
6843 +{
6844 + eActive, // Active/Continuous access.
6845 + eMaxPs, // Max power save mode.
6846 + eFastPs // Fast power save mode.
6847 +}RT_PS_MODE;
6848 +
6849 +typedef enum _IPS_CALLBACK_FUNCION
6850 +{
6851 + IPS_CALLBACK_NONE = 0,
6852 + IPS_CALLBACK_MGNT_LINK_REQUEST = 1,
6853 + IPS_CALLBACK_JOIN_REQUEST = 2,
6854 +}IPS_CALLBACK_FUNCION;
6855 +
6856 +typedef enum _RT_JOIN_ACTION{
6857 + RT_JOIN_INFRA = 1,
6858 + RT_JOIN_IBSS = 2,
6859 + RT_START_IBSS = 3,
6860 + RT_NO_ACTION = 4,
6861 +}RT_JOIN_ACTION;
6862 +
6863 +typedef struct _IbssParms{
6864 + u16 atimWin;
6865 +}IbssParms, *PIbssParms;
6866 +#define MAX_NUM_RATES 264 // Max num of support rates element: 8, Max num of ext. support rate: 255. 061122, by rcnjko.
6867 +
6868 +// RF state.
6869 +typedef enum _RT_RF_POWER_STATE
6870 +{
6871 + eRfOn,
6872 + eRfSleep,
6873 + eRfOff
6874 +}RT_RF_POWER_STATE;
6875 +
6876 +typedef struct _RT_POWER_SAVE_CONTROL
6877 +{
6878 +
6879 + //
6880 + // Inactive Power Save(IPS) : Disable RF when disconnected
6881 + //
6882 + bool bInactivePs;
6883 + bool bIPSModeBackup;
6884 + bool bSwRfProcessing;
6885 + RT_RF_POWER_STATE eInactivePowerState;
6886 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
6887 + struct work_struct InactivePsWorkItem;
6888 +#else
6889 + struct tq_struct InactivePsWorkItem;
6890 +#endif
6891 + struct timer_list InactivePsTimer;
6892 +
6893 + // Return point for join action
6894 + IPS_CALLBACK_FUNCION ReturnPoint;
6895 +
6896 + // Recored Parameters for rescheduled JoinRequest
6897 + bool bTmpBssDesc;
6898 + RT_JOIN_ACTION tmpJoinAction;
6899 + struct ieee80211_network tmpBssDesc;
6900 +
6901 + // Recored Parameters for rescheduled MgntLinkRequest
6902 + bool bTmpScanOnly;
6903 + bool bTmpActiveScan;
6904 + bool bTmpFilterHiddenAP;
6905 + bool bTmpUpdateParms;
6906 + u8 tmpSsidBuf[33];
6907 + OCTET_STRING tmpSsid2Scan;
6908 + bool bTmpSsid2Scan;
6909 + u8 tmpNetworkType;
6910 + u8 tmpChannelNumber;
6911 + u16 tmpBcnPeriod;
6912 + u8 tmpDtimPeriod;
6913 + u16 tmpmCap;
6914 + OCTET_STRING tmpSuppRateSet;
6915 + u8 tmpSuppRateBuf[MAX_NUM_RATES];
6916 + bool bTmpSuppRate;
6917 + IbssParms tmpIbpm;
6918 + bool bTmpIbpm;
6919 +
6920 + //
6921 + // Leisre Poswer Save : Disable RF if connected but traffic is not busy
6922 + //
6923 + bool bLeisurePs;
6924 +
6925 +}RT_POWER_SAVE_CONTROL,*PRT_POWER_SAVE_CONTROL;
6926 +
6927 +typedef u32 RT_RF_CHANGE_SOURCE;
6928 +#define RF_CHANGE_BY_SW BIT31
6929 +#define RF_CHANGE_BY_HW BIT30
6930 +#define RF_CHANGE_BY_PS BIT29
6931 +#define RF_CHANGE_BY_IPS BIT28
6932 +#define RF_CHANGE_BY_INIT 0 // Do not change the RFOff reason. Defined by Bruce, 2008-01-17.
6933 +
6934 +#ifdef ENABLE_DOT11D
6935 +typedef enum
6936 +{
6937 + COUNTRY_CODE_FCC = 0,
6938 + COUNTRY_CODE_IC = 1,
6939 + COUNTRY_CODE_ETSI = 2,
6940 + COUNTRY_CODE_SPAIN = 3,
6941 + COUNTRY_CODE_FRANCE = 4,
6942 + COUNTRY_CODE_MKK = 5,
6943 + COUNTRY_CODE_MKK1 = 6,
6944 + COUNTRY_CODE_ISRAEL = 7,
6945 + COUNTRY_CODE_TELEC,
6946 + COUNTRY_CODE_MIC,
6947 + COUNTRY_CODE_GLOBAL_DOMAIN
6948 +}country_code_type_t;
6949 +#endif
6950 +
6951 +#define RT_MAX_LD_SLOT_NUM 10
6952 +typedef struct _RT_LINK_DETECT_T{
6953 +
6954 + u32 NumRecvBcnInPeriod;
6955 + u32 NumRecvDataInPeriod;
6956 +
6957 + u32 RxBcnNum[RT_MAX_LD_SLOT_NUM]; // number of Rx beacon / CheckForHang_period to determine link status
6958 + u32 RxDataNum[RT_MAX_LD_SLOT_NUM]; // number of Rx data / CheckForHang_period to determine link status
6959 + u16 SlotNum; // number of CheckForHang period to determine link status
6960 + u16 SlotIndex;
6961 +
6962 + u32 NumTxOkInPeriod;
6963 + u32 NumRxOkInPeriod;
6964 + bool bBusyTraffic;
6965 +}RT_LINK_DETECT_T, *PRT_LINK_DETECT_T;
6966 +
6967 +
6968 +struct ieee80211_device {
6969 + struct net_device *dev;
6970 + struct ieee80211_security sec;
6971 +
6972 + //hw security related
6973 +// u8 hwsec_support; //support?
6974 + u8 hwsec_active; //hw security active.
6975 + bool is_silent_reset;
6976 + bool is_roaming;
6977 + bool ieee_up;
6978 + //added by amy
6979 + bool bSupportRemoteWakeUp;
6980 + RT_PS_MODE dot11PowerSaveMode; // Power save mode configured.
6981 + bool actscanning;
6982 + bool beinretry;
6983 + RT_RF_POWER_STATE eRFPowerState;
6984 + RT_RF_CHANGE_SOURCE RfOffReason;
6985 + bool is_set_key;
6986 + //11n spec related I wonder if These info structure need to be moved out of ieee80211_device
6987 +
6988 + //11n HT below
6989 + PRT_HIGH_THROUGHPUT pHTInfo;
6990 + //struct timer_list SwBwTimer;
6991 +// spinlock_t chnlop_spinlock;
6992 + spinlock_t bw_spinlock;
6993 +
6994 + spinlock_t reorder_spinlock;
6995 + // for HT operation rate set. we use this one for HT data rate to seperate different descriptors
6996 + //the way fill this is the same as in the IE
6997 + u8 Regdot11HTOperationalRateSet[16]; //use RATR format
6998 + u8 dot11HTOperationalRateSet[16]; //use RATR format
6999 + u8 RegHTSuppRateSet[16];
7000 + u8 HTCurrentOperaRate;
7001 + u8 HTHighestOperaRate;
7002 + //wb added for rate operation mode to firmware
7003 + u8 bTxDisableRateFallBack;
7004 + u8 bTxUseDriverAssingedRate;
7005 + atomic_t atm_chnlop;
7006 + atomic_t atm_swbw;
7007 +// u8 HTHighestOperaRate;
7008 +// u8 HTCurrentOperaRate;
7009 +
7010 + // 802.11e and WMM Traffic Stream Info (TX)
7011 + struct list_head Tx_TS_Admit_List;
7012 + struct list_head Tx_TS_Pending_List;
7013 + struct list_head Tx_TS_Unused_List;
7014 + TX_TS_RECORD TxTsRecord[TOTAL_TS_NUM];
7015 + // 802.11e and WMM Traffic Stream Info (RX)
7016 + struct list_head Rx_TS_Admit_List;
7017 + struct list_head Rx_TS_Pending_List;
7018 + struct list_head Rx_TS_Unused_List;
7019 + RX_TS_RECORD RxTsRecord[TOTAL_TS_NUM];
7020 +//#ifdef TO_DO_LIST
7021 + RX_REORDER_ENTRY RxReorderEntry[128];
7022 + struct list_head RxReorder_Unused_List;
7023 +//#endif
7024 + // Qos related. Added by Annie, 2005-11-01.
7025 +// PSTA_QOS pStaQos;
7026 + u8 ForcedPriority; // Force per-packet priority 1~7. (default: 0, not to force it.)
7027 +
7028 +
7029 + /* Bookkeeping structures */
7030 + struct net_device_stats stats;
7031 + struct ieee80211_stats ieee_stats;
7032 + struct ieee80211_softmac_stats softmac_stats;
7033 +
7034 + /* Probe / Beacon management */
7035 + struct list_head network_free_list;
7036 + struct list_head network_list;
7037 + struct ieee80211_network *networks;
7038 + int scans;
7039 + int scan_age;
7040 +
7041 + int iw_mode; /* operating mode (IW_MODE_*) */
7042 + struct iw_spy_data spy_data;
7043 +
7044 + spinlock_t lock;
7045 + spinlock_t wpax_suitlist_lock;
7046 +
7047 + int tx_headroom; /* Set to size of any additional room needed at front
7048 + * of allocated Tx SKBs */
7049 + u32 config;
7050 +
7051 + /* WEP and other encryption related settings at the device level */
7052 + int open_wep; /* Set to 1 to allow unencrypted frames */
7053 + int auth_mode;
7054 + int reset_on_keychange; /* Set to 1 if the HW needs to be reset on
7055 + * WEP key changes */
7056 +
7057 + /* If the host performs {en,de}cryption, then set to 1 */
7058 + int host_encrypt;
7059 + int host_encrypt_msdu;
7060 + int host_decrypt;
7061 + /* host performs multicast decryption */
7062 + int host_mc_decrypt;
7063 +
7064 + /* host should strip IV and ICV from protected frames */
7065 + /* meaningful only when hardware decryption is being used */
7066 + int host_strip_iv_icv;
7067 +
7068 + int host_open_frag;
7069 + int host_build_iv;
7070 + int ieee802_1x; /* is IEEE 802.1X used */
7071 +
7072 + /* WPA data */
7073 + bool bHalfWirelessN24GMode;
7074 + int wpa_enabled;
7075 + int drop_unencrypted;
7076 + int tkip_countermeasures;
7077 + int privacy_invoked;
7078 + size_t wpa_ie_len;
7079 + u8 *wpa_ie;
7080 + u8 ap_mac_addr[6];
7081 + u16 pairwise_key_type;
7082 + u16 group_key_type;
7083 + struct list_head crypt_deinit_list;
7084 + struct ieee80211_crypt_data *crypt[WEP_KEYS];
7085 + int tx_keyidx; /* default TX key index (crypt[tx_keyidx]) */
7086 + struct timer_list crypt_deinit_timer;
7087 + int crypt_quiesced;
7088 +
7089 + int bcrx_sta_key; /* use individual keys to override default keys even
7090 + * with RX of broad/multicast frames */
7091 +
7092 + /* Fragmentation structures */
7093 + // each streaming contain a entry
7094 + struct ieee80211_frag_entry frag_cache[17][IEEE80211_FRAG_CACHE_LEN];
7095 + unsigned int frag_next_idx[17];
7096 + u16 fts; /* Fragmentation Threshold */
7097 +#define DEFAULT_RTS_THRESHOLD 2346U
7098 +#define MIN_RTS_THRESHOLD 1
7099 +#define MAX_RTS_THRESHOLD 2346U
7100 + u16 rts; /* RTS threshold */
7101 +
7102 + /* Association info */
7103 + u8 bssid[ETH_ALEN];
7104 +
7105 + /* This stores infos for the current network.
7106 + * Either the network we are associated in INFRASTRUCTURE
7107 + * or the network that we are creating in MASTER mode.
7108 + * ad-hoc is a mixture ;-).
7109 + * Note that in infrastructure mode, even when not associated,
7110 + * fields bssid and essid may be valid (if wpa_set and essid_set
7111 + * are true) as thy carry the value set by the user via iwconfig
7112 + */
7113 + struct ieee80211_network current_network;
7114 +
7115 + enum ieee80211_state state;
7116 +
7117 + int short_slot;
7118 + int reg_mode;
7119 + int mode; /* A, B, G */
7120 + int modulation; /* CCK, OFDM */
7121 + int freq_band; /* 2.4Ghz, 5.2Ghz, Mixed */
7122 + int abg_true; /* ABG flag */
7123 +
7124 + /* used for forcing the ibss workqueue to terminate
7125 + * without wait for the syncro scan to terminate
7126 + */
7127 + short sync_scan_hurryup;
7128 +
7129 + int perfect_rssi;
7130 + int worst_rssi;
7131 +
7132 + u16 prev_seq_ctl; /* used to drop duplicate frames */
7133 +
7134 + /* map of allowed channels. 0 is dummy */
7135 + // FIXME: remeber to default to a basic channel plan depending of the PHY type
7136 +#ifdef ENABLE_DOT11D
7137 + void* pDot11dInfo;
7138 + bool bGlobalDomain;
7139 +#else
7140 + int channel_map[MAX_CHANNEL_NUMBER+1];
7141 +#endif
7142 + int rate; /* current rate */
7143 + int basic_rate;
7144 + //FIXME: pleace callback, see if redundant with softmac_features
7145 + short active_scan;
7146 +
7147 + /* this contains flags for selectively enable softmac support */
7148 + u16 softmac_features;
7149 +
7150 + /* if the sequence control field is not filled by HW */
7151 + u16 seq_ctrl[5];
7152 +
7153 + /* association procedure transaction sequence number */
7154 + u16 associate_seq;
7155 +
7156 + /* AID for RTXed association responses */
7157 + u16 assoc_id;
7158 +
7159 + /* power save mode related*/
7160 + u8 ack_tx_to_ieee;
7161 + short ps;
7162 + short sta_sleep;
7163 + int ps_timeout;
7164 + int ps_period;
7165 + struct tasklet_struct ps_task;
7166 + u32 ps_th;
7167 + u32 ps_tl;
7168 +
7169 + short raw_tx;
7170 + /* used if IEEE_SOFTMAC_TX_QUEUE is set */
7171 + short queue_stop;
7172 + short scanning;
7173 + short proto_started;
7174 +
7175 + struct semaphore wx_sem;
7176 + struct semaphore scan_sem;
7177 +
7178 + spinlock_t mgmt_tx_lock;
7179 + spinlock_t beacon_lock;
7180 +
7181 + short beacon_txing;
7182 +
7183 + short wap_set;
7184 + short ssid_set;
7185 +
7186 + u8 wpax_type_set; //{added by David, 2006.9.28}
7187 + u32 wpax_type_notify; //{added by David, 2006.9.26}
7188 +
7189 + /* QoS related flag */
7190 + char init_wmmparam_flag;
7191 + /* set on initialization */
7192 + u8 qos_support;
7193 +
7194 + /* for discarding duplicated packets in IBSS */
7195 + struct list_head ibss_mac_hash[IEEE_IBSS_MAC_HASH_SIZE];
7196 +
7197 + /* for discarding duplicated packets in BSS */
7198 + u16 last_rxseq_num[17]; /* rx seq previous per-tid */
7199 + u16 last_rxfrag_num[17];/* tx frag previous per-tid */
7200 + unsigned long last_packet_time[17];
7201 +
7202 + /* for PS mode */
7203 + unsigned long last_rx_ps_time;
7204 +
7205 + /* used if IEEE_SOFTMAC_SINGLE_QUEUE is set */
7206 + struct sk_buff *mgmt_queue_ring[MGMT_QUEUE_NUM];
7207 + int mgmt_queue_head;
7208 + int mgmt_queue_tail;
7209 +//{ added for rtl819x
7210 +#define IEEE80211_QUEUE_LIMIT 128
7211 + u8 AsocRetryCount;
7212 + unsigned int hw_header;
7213 + struct sk_buff_head skb_waitQ[MAX_QUEUE_SIZE];
7214 + struct sk_buff_head skb_aggQ[MAX_QUEUE_SIZE];
7215 + struct sk_buff_head skb_drv_aggQ[MAX_QUEUE_SIZE];
7216 + u32 sta_edca_param[4];
7217 + bool aggregation;
7218 + // Enable/Disable Rx immediate BA capability.
7219 + bool enable_rx_imm_BA;
7220 + bool bibsscoordinator;
7221 +
7222 + //+by amy for DM ,080515
7223 + //Dynamic Tx power for near/far range enable/Disable , by amy , 2008-05-15
7224 + bool bdynamic_txpower_enable;
7225 +
7226 + bool bCTSToSelfEnable;
7227 + u8 CTSToSelfTH;
7228 +
7229 + u32 fsync_time_interval;
7230 + u32 fsync_rate_bitmap;
7231 + u8 fsync_rssi_threshold;
7232 + bool bfsync_enable;
7233 +
7234 + u8 fsync_multiple_timeinterval; // FsyncMultipleTimeInterval * FsyncTimeInterval
7235 + u32 fsync_firstdiff_ratethreshold; // low threshold
7236 + u32 fsync_seconddiff_ratethreshold; // decrease threshold
7237 + Fsync_State fsync_state;
7238 + bool bis_any_nonbepkts;
7239 + //20Mhz 40Mhz AutoSwitch Threshold
7240 + bandwidth_autoswitch bandwidth_auto_switch;
7241 + //for txpower tracking
7242 + bool FwRWRF;
7243 +
7244 + //added by amy for AP roaming
7245 + RT_LINK_DETECT_T LinkDetectInfo;
7246 + //added by amy for ps
7247 + RT_POWER_SAVE_CONTROL PowerSaveControl;
7248 +//}
7249 + /* used if IEEE_SOFTMAC_TX_QUEUE is set */
7250 + struct tx_pending_t tx_pending;
7251 +
7252 + /* used if IEEE_SOFTMAC_ASSOCIATE is set */
7253 + struct timer_list associate_timer;
7254 +
7255 + /* used if IEEE_SOFTMAC_BEACONS is set */
7256 + struct timer_list beacon_timer;
7257 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
7258 + struct work_struct associate_complete_wq;
7259 + struct work_struct associate_procedure_wq;
7260 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
7261 + struct delayed_work softmac_scan_wq;
7262 + struct delayed_work associate_retry_wq;
7263 + struct delayed_work start_ibss_wq;
7264 + struct delayed_work hw_wakeup_wq;
7265 + struct delayed_work hw_sleep_wq;
7266 +#else
7267 + struct work_struct softmac_scan_wq;
7268 + struct work_struct associate_retry_wq;
7269 + struct work_struct start_ibss_wq;
7270 + struct work_struct hw_wakeup_wq;
7271 + struct work_struct hw_sleep_wq;
7272 +#endif
7273 + struct work_struct wx_sync_scan_wq;
7274 + struct workqueue_struct *wq;
7275 +#else
7276 + /* used for periodly scan */
7277 + struct timer_list scan_timer;
7278 +
7279 + struct tq_struct associate_complete_wq;
7280 + struct tq_struct associate_retry_wq;
7281 + struct tq_struct start_ibss_wq;
7282 + struct tq_struct associate_procedure_wq;
7283 + struct tq_struct softmac_scan_wq;
7284 + struct tq_struct wx_sync_scan_wq;
7285 +
7286 +#endif
7287 + // Qos related. Added by Annie, 2005-11-01.
7288 + //STA_QOS StaQos;
7289 +
7290 + //u32 STA_EDCA_PARAM[4];
7291 + //CHANNEL_ACCESS_SETTING ChannelAccessSetting;
7292 +
7293 +
7294 + /* Callback functions */
7295 + void (*set_security)(struct net_device *dev,
7296 + struct ieee80211_security *sec);
7297 +
7298 + /* Used to TX data frame by using txb structs.
7299 + * this is not used if in the softmac_features
7300 + * is set the flag IEEE_SOFTMAC_TX_QUEUE
7301 + */
7302 + int (*hard_start_xmit)(struct ieee80211_txb *txb,
7303 + struct net_device *dev);
7304 +
7305 + int (*reset_port)(struct net_device *dev);
7306 + int (*is_queue_full) (struct net_device * dev, int pri);
7307 +
7308 + int (*handle_management) (struct net_device * dev,
7309 + struct ieee80211_network * network, u16 type);
7310 + int (*is_qos_active) (struct net_device *dev, struct sk_buff *skb);
7311 +
7312 + /* Softmac-generated frames (mamagement) are TXed via this
7313 + * callback if the flag IEEE_SOFTMAC_SINGLE_QUEUE is
7314 + * not set. As some cards may have different HW queues that
7315 + * one might want to use for data and management frames
7316 + * the option to have two callbacks might be useful.
7317 + * This fucntion can't sleep.
7318 + */
7319 + int (*softmac_hard_start_xmit)(struct sk_buff *skb,
7320 + struct net_device *dev);
7321 +
7322 + /* used instead of hard_start_xmit (not softmac_hard_start_xmit)
7323 + * if the IEEE_SOFTMAC_TX_QUEUE feature is used to TX data
7324 + * frames. I the option IEEE_SOFTMAC_SINGLE_QUEUE is also set
7325 + * then also management frames are sent via this callback.
7326 + * This function can't sleep.
7327 + */
7328 + void (*softmac_data_hard_start_xmit)(struct sk_buff *skb,
7329 + struct net_device *dev,int rate);
7330 +
7331 + /* stops the HW queue for DATA frames. Useful to avoid
7332 + * waste time to TX data frame when we are reassociating
7333 + * This function can sleep.
7334 + */
7335 + void (*data_hard_stop)(struct net_device *dev);
7336 +
7337 + /* OK this is complementar to data_poll_hard_stop */
7338 + void (*data_hard_resume)(struct net_device *dev);
7339 +
7340 + /* ask to the driver to retune the radio .
7341 + * This function can sleep. the driver should ensure
7342 + * the radio has been swithced before return.
7343 + */
7344 + void (*set_chan)(struct net_device *dev,short ch);
7345 +
7346 + /* These are not used if the ieee stack takes care of
7347 + * scanning (IEEE_SOFTMAC_SCAN feature set).
7348 + * In this case only the set_chan is used.
7349 + *
7350 + * The syncro version is similar to the start_scan but
7351 + * does not return until all channels has been scanned.
7352 + * this is called in user context and should sleep,
7353 + * it is called in a work_queue when swithcing to ad-hoc mode
7354 + * or in behalf of iwlist scan when the card is associated
7355 + * and root user ask for a scan.
7356 + * the fucntion stop_scan should stop both the syncro and
7357 + * background scanning and can sleep.
7358 + * The fucntion start_scan should initiate the background
7359 + * scanning and can't sleep.
7360 + */
7361 + void (*scan_syncro)(struct net_device *dev);
7362 + void (*start_scan)(struct net_device *dev);
7363 + void (*stop_scan)(struct net_device *dev);
7364 +
7365 + /* indicate the driver that the link state is changed
7366 + * for example it may indicate the card is associated now.
7367 + * Driver might be interested in this to apply RX filter
7368 + * rules or simply light the LINK led
7369 + */
7370 + void (*link_change)(struct net_device *dev);
7371 +
7372 + /* these two function indicates to the HW when to start
7373 + * and stop to send beacons. This is used when the
7374 + * IEEE_SOFTMAC_BEACONS is not set. For now the
7375 + * stop_send_bacons is NOT guaranteed to be called only
7376 + * after start_send_beacons.
7377 + */
7378 + void (*start_send_beacons) (struct net_device *dev,u16 tx_rate);
7379 + void (*stop_send_beacons) (struct net_device *dev);
7380 +
7381 + /* power save mode related */
7382 + void (*sta_wake_up) (struct net_device *dev);
7383 +// void (*ps_request_tx_ack) (struct net_device *dev);
7384 + void (*enter_sleep_state) (struct net_device *dev, u32 th, u32 tl);
7385 + short (*ps_is_queue_empty) (struct net_device *dev);
7386 +#if 0
7387 + /* Typical STA methods */
7388 + int (*handle_auth) (struct net_device * dev,
7389 + struct ieee80211_auth * auth);
7390 + int (*handle_deauth) (struct net_device * dev,
7391 + struct ieee80211_deauth * auth);
7392 + int (*handle_action) (struct net_device * dev,
7393 + struct ieee80211_action * action,
7394 + struct ieee80211_rx_stats * stats);
7395 + int (*handle_disassoc) (struct net_device * dev,
7396 + struct ieee80211_disassoc * assoc);
7397 +#endif
7398 + int (*handle_beacon) (struct net_device * dev, struct ieee80211_beacon * beacon, struct ieee80211_network * network);
7399 +#if 0
7400 + int (*handle_probe_response) (struct net_device * dev,
7401 + struct ieee80211_probe_response * resp,
7402 + struct ieee80211_network * network);
7403 + int (*handle_probe_request) (struct net_device * dev,
7404 + struct ieee80211_probe_request * req,
7405 + struct ieee80211_rx_stats * stats);
7406 +#endif
7407 + int (*handle_assoc_response) (struct net_device * dev, struct ieee80211_assoc_response_frame * resp, struct ieee80211_network * network);
7408 +
7409 +#if 0
7410 + /* Typical AP methods */
7411 + int (*handle_assoc_request) (struct net_device * dev);
7412 + int (*handle_reassoc_request) (struct net_device * dev,
7413 + struct ieee80211_reassoc_request * req);
7414 +#endif
7415 +
7416 + /* check whether Tx hw resouce available */
7417 + short (*check_nic_enough_desc)(struct net_device *dev, int queue_index);
7418 + //added by wb for HT related
7419 +// void (*SwChnlByTimerHandler)(struct net_device *dev, int channel);
7420 + void (*SetBWModeHandler)(struct net_device *dev, HT_CHANNEL_WIDTH Bandwidth, HT_EXTCHNL_OFFSET Offset);
7421 +// void (*UpdateHalRATRTableHandler)(struct net_device* dev, u8* pMcsRate);
7422 + bool (*GetNmodeSupportBySecCfg)(struct net_device* dev);
7423 + void (*SetWirelessMode)(struct net_device* dev, u8 wireless_mode);
7424 + bool (*GetHalfNmodeSupportByAPsHandler)(struct net_device* dev);
7425 + void (*InitialGainHandler)(struct net_device *dev, u8 Operation);
7426 +
7427 + /* This must be the last item so that it points to the data
7428 + * allocated beyond this structure by alloc_ieee80211 */
7429 + u8 priv[0];
7430 +};
7431 +
7432 +#define IEEE_A (1<<0)
7433 +#define IEEE_B (1<<1)
7434 +#define IEEE_G (1<<2)
7435 +#define IEEE_N_24G (1<<4)
7436 +#define IEEE_N_5G (1<<5)
7437 +#define IEEE_MODE_MASK (IEEE_A|IEEE_B|IEEE_G)
7438 +
7439 +/* Generate a 802.11 header */
7440 +
7441 +/* Uses the channel change callback directly
7442 + * instead of [start/stop] scan callbacks
7443 + */
7444 +#define IEEE_SOFTMAC_SCAN (1<<2)
7445 +
7446 +/* Perform authentication and association handshake */
7447 +#define IEEE_SOFTMAC_ASSOCIATE (1<<3)
7448 +
7449 +/* Generate probe requests */
7450 +#define IEEE_SOFTMAC_PROBERQ (1<<4)
7451 +
7452 +/* Generate respones to probe requests */
7453 +#define IEEE_SOFTMAC_PROBERS (1<<5)
7454 +
7455 +/* The ieee802.11 stack will manages the netif queue
7456 + * wake/stop for the driver, taking care of 802.11
7457 + * fragmentation. See softmac.c for details. */
7458 +#define IEEE_SOFTMAC_TX_QUEUE (1<<7)
7459 +
7460 +/* Uses only the softmac_data_hard_start_xmit
7461 + * even for TX management frames.
7462 + */
7463 +#define IEEE_SOFTMAC_SINGLE_QUEUE (1<<8)
7464 +
7465 +/* Generate beacons. The stack will enqueue beacons
7466 + * to the card
7467 + */
7468 +#define IEEE_SOFTMAC_BEACONS (1<<6)
7469 +
7470 +static inline void *ieee80211_priv(struct net_device *dev)
7471 +{
7472 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
7473 + return ((struct ieee80211_device *)netdev_priv(dev))->priv;
7474 +#else
7475 + return ((struct ieee80211_device *)dev->priv)->priv;
7476 +#endif
7477 +}
7478 +
7479 +extern inline int ieee80211_is_empty_essid(const char *essid, int essid_len)
7480 +{
7481 + /* Single white space is for Linksys APs */
7482 + if (essid_len == 1 && essid[0] == ' ')
7483 + return 1;
7484 +
7485 + /* Otherwise, if the entire essid is 0, we assume it is hidden */
7486 + while (essid_len) {
7487 + essid_len--;
7488 + if (essid[essid_len] != '\0')
7489 + return 0;
7490 + }
7491 +
7492 + return 1;
7493 +}
7494 +
7495 +extern inline int ieee80211_is_valid_mode(struct ieee80211_device *ieee, int mode)
7496 +{
7497 + /*
7498 + * It is possible for both access points and our device to support
7499 + * combinations of modes, so as long as there is one valid combination
7500 + * of ap/device supported modes, then return success
7501 + *
7502 + */
7503 + if ((mode & IEEE_A) &&
7504 + (ieee->modulation & IEEE80211_OFDM_MODULATION) &&
7505 + (ieee->freq_band & IEEE80211_52GHZ_BAND))
7506 + return 1;
7507 +
7508 + if ((mode & IEEE_G) &&
7509 + (ieee->modulation & IEEE80211_OFDM_MODULATION) &&
7510 + (ieee->freq_band & IEEE80211_24GHZ_BAND))
7511 + return 1;
7512 +
7513 + if ((mode & IEEE_B) &&
7514 + (ieee->modulation & IEEE80211_CCK_MODULATION) &&
7515 + (ieee->freq_band & IEEE80211_24GHZ_BAND))
7516 + return 1;
7517 +
7518 + return 0;
7519 +}
7520 +
7521 +extern inline int ieee80211_get_hdrlen(u16 fc)
7522 +{
7523 + int hdrlen = IEEE80211_3ADDR_LEN;
7524 +
7525 + switch (WLAN_FC_GET_TYPE(fc)) {
7526 + case IEEE80211_FTYPE_DATA:
7527 + if ((fc & IEEE80211_FCTL_FROMDS) && (fc & IEEE80211_FCTL_TODS))
7528 + hdrlen = IEEE80211_4ADDR_LEN; /* Addr4 */
7529 + if(IEEE80211_QOS_HAS_SEQ(fc))
7530 + hdrlen += 2; /* QOS ctrl*/
7531 + break;
7532 + case IEEE80211_FTYPE_CTL:
7533 + switch (WLAN_FC_GET_STYPE(fc)) {
7534 + case IEEE80211_STYPE_CTS:
7535 + case IEEE80211_STYPE_ACK:
7536 + hdrlen = IEEE80211_1ADDR_LEN;
7537 + break;
7538 + default:
7539 + hdrlen = IEEE80211_2ADDR_LEN;
7540 + break;
7541 + }
7542 + break;
7543 + }
7544 +
7545 + return hdrlen;
7546 +}
7547 +
7548 +static inline u8 *ieee80211_get_payload(struct ieee80211_hdr *hdr)
7549 +{
7550 + switch (ieee80211_get_hdrlen(le16_to_cpu(hdr->frame_ctl))) {
7551 + case IEEE80211_1ADDR_LEN:
7552 + return ((struct ieee80211_hdr_1addr *)hdr)->payload;
7553 + case IEEE80211_2ADDR_LEN:
7554 + return ((struct ieee80211_hdr_2addr *)hdr)->payload;
7555 + case IEEE80211_3ADDR_LEN:
7556 + return ((struct ieee80211_hdr_3addr *)hdr)->payload;
7557 + case IEEE80211_4ADDR_LEN:
7558 + return ((struct ieee80211_hdr_4addr *)hdr)->payload;
7559 + }
7560 + return NULL;
7561 +}
7562 +
7563 +static inline int ieee80211_is_ofdm_rate(u8 rate)
7564 +{
7565 + switch (rate & ~IEEE80211_BASIC_RATE_MASK) {
7566 + case IEEE80211_OFDM_RATE_6MB:
7567 + case IEEE80211_OFDM_RATE_9MB:
7568 + case IEEE80211_OFDM_RATE_12MB:
7569 + case IEEE80211_OFDM_RATE_18MB:
7570 + case IEEE80211_OFDM_RATE_24MB:
7571 + case IEEE80211_OFDM_RATE_36MB:
7572 + case IEEE80211_OFDM_RATE_48MB:
7573 + case IEEE80211_OFDM_RATE_54MB:
7574 + return 1;
7575 + }
7576 + return 0;
7577 +}
7578 +
7579 +static inline int ieee80211_is_cck_rate(u8 rate)
7580 +{
7581 + switch (rate & ~IEEE80211_BASIC_RATE_MASK) {
7582 + case IEEE80211_CCK_RATE_1MB:
7583 + case IEEE80211_CCK_RATE_2MB:
7584 + case IEEE80211_CCK_RATE_5MB:
7585 + case IEEE80211_CCK_RATE_11MB:
7586 + return 1;
7587 + }
7588 + return 0;
7589 +}
7590 +
7591 +
7592 +/* ieee80211.c */
7593 +extern void free_ieee80211(struct net_device *dev);
7594 +extern struct net_device *alloc_ieee80211(int sizeof_priv);
7595 +
7596 +extern int ieee80211_set_encryption(struct ieee80211_device *ieee);
7597 +
7598 +/* ieee80211_tx.c */
7599 +
7600 +extern int ieee80211_encrypt_fragment(
7601 + struct ieee80211_device *ieee,
7602 + struct sk_buff *frag,
7603 + int hdr_len);
7604 +
7605 +extern int ieee80211_xmit(struct sk_buff *skb,
7606 + struct net_device *dev);
7607 +extern void ieee80211_txb_free(struct ieee80211_txb *);
7608 +
7609 +
7610 +/* ieee80211_rx.c */
7611 +extern int ieee80211_rx(struct ieee80211_device *ieee, struct sk_buff *skb,
7612 + struct ieee80211_rx_stats *rx_stats);
7613 +extern void ieee80211_rx_mgt(struct ieee80211_device *ieee,
7614 + struct ieee80211_hdr_4addr *header,
7615 + struct ieee80211_rx_stats *stats);
7616 +
7617 +/* ieee80211_wx.c */
7618 +extern int ieee80211_wx_get_scan(struct ieee80211_device *ieee,
7619 + struct iw_request_info *info,
7620 + union iwreq_data *wrqu, char *key);
7621 +extern int ieee80211_wx_set_encode(struct ieee80211_device *ieee,
7622 + struct iw_request_info *info,
7623 + union iwreq_data *wrqu, char *key);
7624 +extern int ieee80211_wx_get_encode(struct ieee80211_device *ieee,
7625 + struct iw_request_info *info,
7626 + union iwreq_data *wrqu, char *key);
7627 +#if WIRELESS_EXT >= 18
7628 +extern int ieee80211_wx_get_encode_ext(struct ieee80211_device *ieee,
7629 + struct iw_request_info *info,
7630 + union iwreq_data* wrqu, char *extra);
7631 +extern int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee,
7632 + struct iw_request_info *info,
7633 + union iwreq_data* wrqu, char *extra);
7634 +extern int ieee80211_wx_set_auth(struct ieee80211_device *ieee,
7635 + struct iw_request_info *info,
7636 + struct iw_param *data, char *extra);
7637 +extern int ieee80211_wx_set_mlme(struct ieee80211_device *ieee,
7638 + struct iw_request_info *info,
7639 + union iwreq_data *wrqu, char *extra);
7640 +#endif
7641 +extern int ieee80211_wx_set_gen_ie(struct ieee80211_device *ieee, u8 *ie, size_t len);
7642 +
7643 +/* ieee80211_softmac.c */
7644 +extern short ieee80211_is_54g(struct ieee80211_network net);
7645 +extern short ieee80211_is_shortslot(struct ieee80211_network net);
7646 +extern int ieee80211_rx_frame_softmac(struct ieee80211_device *ieee, struct sk_buff *skb,
7647 + struct ieee80211_rx_stats *rx_stats, u16 type,
7648 + u16 stype);
7649 +extern void ieee80211_softmac_new_net(struct ieee80211_device *ieee, struct ieee80211_network *net);
7650 +
7651 +void SendDisassociation(struct ieee80211_device *ieee, u8* asSta, u8 asRsn);
7652 +extern void ieee80211_softmac_xmit(struct ieee80211_txb *txb, struct ieee80211_device *ieee);
7653 +
7654 +extern void ieee80211_stop_send_beacons(struct ieee80211_device *ieee);
7655 +extern void notify_wx_assoc_event(struct ieee80211_device *ieee);
7656 +extern void ieee80211_softmac_check_all_nets(struct ieee80211_device *ieee);
7657 +extern void ieee80211_start_bss(struct ieee80211_device *ieee);
7658 +extern void ieee80211_start_master_bss(struct ieee80211_device *ieee);
7659 +extern void ieee80211_start_ibss(struct ieee80211_device *ieee);
7660 +extern void ieee80211_softmac_init(struct ieee80211_device *ieee);
7661 +extern void ieee80211_softmac_free(struct ieee80211_device *ieee);
7662 +extern void ieee80211_associate_abort(struct ieee80211_device *ieee);
7663 +extern void ieee80211_disassociate(struct ieee80211_device *ieee);
7664 +extern void ieee80211_stop_scan(struct ieee80211_device *ieee);
7665 +extern void ieee80211_start_scan_syncro(struct ieee80211_device *ieee);
7666 +extern void ieee80211_check_all_nets(struct ieee80211_device *ieee);
7667 +extern void ieee80211_start_protocol(struct ieee80211_device *ieee);
7668 +extern void ieee80211_stop_protocol(struct ieee80211_device *ieee);
7669 +extern void ieee80211_softmac_start_protocol(struct ieee80211_device *ieee);
7670 +extern void ieee80211_softmac_stop_protocol(struct ieee80211_device *ieee);
7671 +extern void ieee80211_reset_queue(struct ieee80211_device *ieee);
7672 +extern void ieee80211_wake_queue(struct ieee80211_device *ieee);
7673 +extern void ieee80211_stop_queue(struct ieee80211_device *ieee);
7674 +extern struct sk_buff *ieee80211_get_beacon(struct ieee80211_device *ieee);
7675 +extern void ieee80211_start_send_beacons(struct ieee80211_device *ieee);
7676 +extern void ieee80211_stop_send_beacons(struct ieee80211_device *ieee);
7677 +extern int ieee80211_wpa_supplicant_ioctl(struct ieee80211_device *ieee, struct iw_point *p);
7678 +extern void notify_wx_assoc_event(struct ieee80211_device *ieee);
7679 +extern void ieee80211_ps_tx_ack(struct ieee80211_device *ieee, short success);
7680 +
7681 +extern void softmac_mgmt_xmit(struct sk_buff *skb, struct ieee80211_device *ieee);
7682 +
7683 +/* ieee80211_crypt_ccmp&tkip&wep.c */
7684 +extern void ieee80211_tkip_null(void);
7685 +extern void ieee80211_wep_null(void);
7686 +extern void ieee80211_ccmp_null(void);
7687 +
7688 +/* ieee80211_softmac_wx.c */
7689 +
7690 +extern int ieee80211_wx_get_wap(struct ieee80211_device *ieee,
7691 + struct iw_request_info *info,
7692 + union iwreq_data *wrqu, char *ext);
7693 +
7694 +extern int ieee80211_wx_set_wap(struct ieee80211_device *ieee,
7695 + struct iw_request_info *info,
7696 + union iwreq_data *awrq,
7697 + char *extra);
7698 +
7699 +extern int ieee80211_wx_get_essid(struct ieee80211_device *ieee, struct iw_request_info *a,union iwreq_data *wrqu,char *b);
7700 +
7701 +extern int ieee80211_wx_set_rate(struct ieee80211_device *ieee,
7702 + struct iw_request_info *info,
7703 + union iwreq_data *wrqu, char *extra);
7704 +
7705 +extern int ieee80211_wx_get_rate(struct ieee80211_device *ieee,
7706 + struct iw_request_info *info,
7707 + union iwreq_data *wrqu, char *extra);
7708 +
7709 +extern int ieee80211_wx_set_mode(struct ieee80211_device *ieee, struct iw_request_info *a,
7710 + union iwreq_data *wrqu, char *b);
7711 +
7712 +extern int ieee80211_wx_set_scan(struct ieee80211_device *ieee, struct iw_request_info *a,
7713 + union iwreq_data *wrqu, char *b);
7714 +
7715 +extern int ieee80211_wx_set_essid(struct ieee80211_device *ieee,
7716 + struct iw_request_info *a,
7717 + union iwreq_data *wrqu, char *extra);
7718 +
7719 +extern int ieee80211_wx_get_mode(struct ieee80211_device *ieee, struct iw_request_info *a,
7720 + union iwreq_data *wrqu, char *b);
7721 +
7722 +extern int ieee80211_wx_set_freq(struct ieee80211_device *ieee, struct iw_request_info *a,
7723 + union iwreq_data *wrqu, char *b);
7724 +
7725 +extern int ieee80211_wx_get_freq(struct ieee80211_device *ieee, struct iw_request_info *a,
7726 + union iwreq_data *wrqu, char *b);
7727 +
7728 +//extern void ieee80211_wx_sync_scan_wq(struct ieee80211_device *ieee);
7729 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
7730 +extern void ieee80211_wx_sync_scan_wq(struct work_struct *work);
7731 +#else
7732 + extern void ieee80211_wx_sync_scan_wq(struct ieee80211_device *ieee);
7733 +#endif
7734 +
7735 +
7736 +extern int ieee80211_wx_set_rawtx(struct ieee80211_device *ieee,
7737 + struct iw_request_info *info,
7738 + union iwreq_data *wrqu, char *extra);
7739 +
7740 +extern int ieee80211_wx_get_name(struct ieee80211_device *ieee,
7741 + struct iw_request_info *info,
7742 + union iwreq_data *wrqu, char *extra);
7743 +
7744 +extern int ieee80211_wx_set_power(struct ieee80211_device *ieee,
7745 + struct iw_request_info *info,
7746 + union iwreq_data *wrqu, char *extra);
7747 +
7748 +extern int ieee80211_wx_get_power(struct ieee80211_device *ieee,
7749 + struct iw_request_info *info,
7750 + union iwreq_data *wrqu, char *extra);
7751 +
7752 +extern int ieee80211_wx_set_rts(struct ieee80211_device *ieee,
7753 + struct iw_request_info *info,
7754 + union iwreq_data *wrqu, char *extra);
7755 +
7756 +extern int ieee80211_wx_get_rts(struct ieee80211_device *ieee,
7757 + struct iw_request_info *info,
7758 + union iwreq_data *wrqu, char *extra);
7759 +//HT
7760 +#define MAX_RECEIVE_BUFFER_SIZE 9100 //
7761 +extern void HTDebugHTCapability(u8* CapIE, u8* TitleString );
7762 +extern void HTDebugHTInfo(u8* InfoIE, u8* TitleString);
7763 +
7764 +void HTSetConnectBwMode(struct ieee80211_device* ieee, HT_CHANNEL_WIDTH Bandwidth, HT_EXTCHNL_OFFSET Offset);
7765 +extern void HTUpdateDefaultSetting(struct ieee80211_device* ieee);
7766 +extern void HTConstructCapabilityElement(struct ieee80211_device* ieee, u8* posHTCap, u8* len, u8 isEncrypt);
7767 +extern void HTConstructInfoElement(struct ieee80211_device* ieee, u8* posHTInfo, u8* len, u8 isEncrypt);
7768 +extern void HTConstructRT2RTAggElement(struct ieee80211_device* ieee, u8* posRT2RTAgg, u8* len);
7769 +extern void HTOnAssocRsp(struct ieee80211_device *ieee);
7770 +extern void HTInitializeHTInfo(struct ieee80211_device* ieee);
7771 +extern void HTInitializeBssDesc(PBSS_HT pBssHT);
7772 +extern void HTResetSelfAndSavePeerSetting(struct ieee80211_device* ieee, struct ieee80211_network * pNetwork);
7773 +extern void HTUpdateSelfAndPeerSetting(struct ieee80211_device* ieee, struct ieee80211_network * pNetwork);
7774 +extern u8 HTGetHighestMCSRate(struct ieee80211_device* ieee, u8* pMCSRateSet, u8* pMCSFilter);
7775 +extern u8 MCS_FILTER_ALL[];
7776 +extern u16 MCS_DATA_RATE[2][2][77] ;
7777 +extern u8 HTCCheck(struct ieee80211_device* ieee, u8* pFrame);
7778 +//extern void HTSetConnectBwModeCallback(unsigned long data);
7779 +extern void HTResetIOTSetting(PRT_HIGH_THROUGHPUT pHTInfo);
7780 +extern bool IsHTHalfNmodeAPs(struct ieee80211_device* ieee);
7781 +extern u16 HTHalfMcsToDataRate(struct ieee80211_device* ieee, u8 nMcsRate);
7782 +extern u16 HTMcsToDataRate( struct ieee80211_device* ieee, u8 nMcsRate);
7783 +extern u16 TxCountToDataRate( struct ieee80211_device* ieee, u8 nDataRate);
7784 +//function in BAPROC.c
7785 +extern int ieee80211_rx_ADDBAReq( struct ieee80211_device* ieee, struct sk_buff *skb);
7786 +extern int ieee80211_rx_ADDBARsp( struct ieee80211_device* ieee, struct sk_buff *skb);
7787 +extern int ieee80211_rx_DELBA(struct ieee80211_device* ieee,struct sk_buff *skb);
7788 +extern void TsInitAddBA( struct ieee80211_device* ieee, PTX_TS_RECORD pTS, u8 Policy, u8 bOverwritePending);
7789 +extern void TsInitDelBA( struct ieee80211_device* ieee, PTS_COMMON_INFO pTsCommonInfo, TR_SELECT TxRxSelect);
7790 +extern void BaSetupTimeOut(unsigned long data);
7791 +extern void TxBaInactTimeout(unsigned long data);
7792 +extern void RxBaInactTimeout(unsigned long data);
7793 +extern void ResetBaEntry( PBA_RECORD pBA);
7794 +//function in TS.c
7795 +extern bool GetTs(
7796 + struct ieee80211_device* ieee,
7797 + PTS_COMMON_INFO *ppTS,
7798 + u8* Addr,
7799 + u8 TID,
7800 + TR_SELECT TxRxSelect, //Rx:1, Tx:0
7801 + bool bAddNewTs
7802 + );
7803 +extern void TSInitialize(struct ieee80211_device *ieee);
7804 +extern void TsStartAddBaProcess(struct ieee80211_device* ieee, PTX_TS_RECORD pTxTS);
7805 +extern void RemovePeerTS(struct ieee80211_device* ieee, u8* Addr);
7806 +extern void RemoveAllTS(struct ieee80211_device* ieee);
7807 +void ieee80211_softmac_scan_syncro(struct ieee80211_device *ieee);
7808 +
7809 +extern const long ieee80211_wlan_frequencies[];
7810 +
7811 +extern inline void ieee80211_increment_scans(struct ieee80211_device *ieee)
7812 +{
7813 + ieee->scans++;
7814 +}
7815 +
7816 +extern inline int ieee80211_get_scans(struct ieee80211_device *ieee)
7817 +{
7818 + return ieee->scans;
7819 +}
7820 +
7821 +static inline const char *escape_essid(const char *essid, u8 essid_len) {
7822 + static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
7823 + const char *s = essid;
7824 + char *d = escaped;
7825 +
7826 + if (ieee80211_is_empty_essid(essid, essid_len)) {
7827 + memcpy(escaped, "<hidden>", sizeof("<hidden>"));
7828 + return escaped;
7829 + }
7830 +
7831 + essid_len = min(essid_len, (u8)IW_ESSID_MAX_SIZE);
7832 + while (essid_len--) {
7833 + if (*s == '\0') {
7834 + *d++ = '\\';
7835 + *d++ = '0';
7836 + s++;
7837 + } else {
7838 + *d++ = *s++;
7839 + }
7840 + }
7841 + *d = '\0';
7842 + return escaped;
7843 +}
7844 +
7845 +/* For the function is more related to hardware setting, it's better to use the
7846 + * ieee handler to refer to it.
7847 + */
7848 +extern short check_nic_enough_desc(struct net_device *dev, int queue_index);
7849 +extern int ieee80211_data_xmit(struct sk_buff *skb, struct net_device *dev);
7850 +extern int ieee80211_parse_info_param(struct ieee80211_device *ieee,
7851 + struct ieee80211_info_element *info_element,
7852 + u16 length,
7853 + struct ieee80211_network *network,
7854 + struct ieee80211_rx_stats *stats);
7855 +
7856 +void ieee80211_indicate_packets(struct ieee80211_device *ieee, struct ieee80211_rxb** prxbIndicateArray,u8 index);
7857 +#define RT_ASOC_RETRY_LIMIT 5
7858 +#endif /* IEEE80211_H */
7859 --- /dev/null
7860 +++ b/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt.c
7861 @@ -0,0 +1,273 @@
7862 +/*
7863 + * Host AP crypto routines
7864 + *
7865 + * Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
7866 + * Portions Copyright (C) 2004, Intel Corporation <jketreno@linux.intel.com>
7867 + *
7868 + * This program is free software; you can redistribute it and/or modify
7869 + * it under the terms of the GNU General Public License version 2 as
7870 + * published by the Free Software Foundation. See README and COPYING for
7871 + * more details.
7872 + *
7873 + */
7874 +
7875 +//#include <linux/config.h>
7876 +#include <linux/version.h>
7877 +#include <linux/module.h>
7878 +#include <linux/init.h>
7879 +#include <linux/slab.h>
7880 +#include <asm/string.h>
7881 +#include <asm/errno.h>
7882 +
7883 +#include "ieee80211.h"
7884 +
7885 +//MODULE_AUTHOR("Jouni Malinen");
7886 +//MODULE_DESCRIPTION("HostAP crypto");
7887 +//MODULE_LICENSE("GPL");
7888 +
7889 +struct ieee80211_crypto_alg {
7890 + struct list_head list;
7891 + struct ieee80211_crypto_ops *ops;
7892 +};
7893 +
7894 +
7895 +struct ieee80211_crypto {
7896 + struct list_head algs;
7897 + spinlock_t lock;
7898 +};
7899 +
7900 +static struct ieee80211_crypto *hcrypt;
7901 +
7902 +void ieee80211_crypt_deinit_entries(struct ieee80211_device *ieee,
7903 + int force)
7904 +{
7905 + struct list_head *ptr, *n;
7906 + struct ieee80211_crypt_data *entry;
7907 +
7908 + for (ptr = ieee->crypt_deinit_list.next, n = ptr->next;
7909 + ptr != &ieee->crypt_deinit_list; ptr = n, n = ptr->next) {
7910 + entry = list_entry(ptr, struct ieee80211_crypt_data, list);
7911 +
7912 + if (atomic_read(&entry->refcnt) != 0 && !force)
7913 + continue;
7914 +
7915 + list_del(ptr);
7916 +
7917 + if (entry->ops) {
7918 + entry->ops->deinit(entry->priv);
7919 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
7920 + module_put(entry->ops->owner);
7921 +#else
7922 + __MOD_DEC_USE_COUNT(entry->ops->owner);
7923 +#endif
7924 + }
7925 + kfree(entry);
7926 + }
7927 +}
7928 +
7929 +void ieee80211_crypt_deinit_handler(unsigned long data)
7930 +{
7931 + struct ieee80211_device *ieee = (struct ieee80211_device *)data;
7932 + unsigned long flags;
7933 +
7934 + spin_lock_irqsave(&ieee->lock, flags);
7935 + ieee80211_crypt_deinit_entries(ieee, 0);
7936 + if (!list_empty(&ieee->crypt_deinit_list)) {
7937 + printk(KERN_DEBUG "%s: entries remaining in delayed crypt "
7938 + "deletion list\n", ieee->dev->name);
7939 + ieee->crypt_deinit_timer.expires = jiffies + HZ;
7940 + add_timer(&ieee->crypt_deinit_timer);
7941 + }
7942 + spin_unlock_irqrestore(&ieee->lock, flags);
7943 +
7944 +}
7945 +
7946 +void ieee80211_crypt_delayed_deinit(struct ieee80211_device *ieee,
7947 + struct ieee80211_crypt_data **crypt)
7948 +{
7949 + struct ieee80211_crypt_data *tmp;
7950 + unsigned long flags;
7951 +
7952 + if (*crypt == NULL)
7953 + return;
7954 +
7955 + tmp = *crypt;
7956 + *crypt = NULL;
7957 +
7958 + /* must not run ops->deinit() while there may be pending encrypt or
7959 + * decrypt operations. Use a list of delayed deinits to avoid needing
7960 + * locking. */
7961 +
7962 + spin_lock_irqsave(&ieee->lock, flags);
7963 + list_add(&tmp->list, &ieee->crypt_deinit_list);
7964 + if (!timer_pending(&ieee->crypt_deinit_timer)) {
7965 + ieee->crypt_deinit_timer.expires = jiffies + HZ;
7966 + add_timer(&ieee->crypt_deinit_timer);
7967 + }
7968 + spin_unlock_irqrestore(&ieee->lock, flags);
7969 +}
7970 +
7971 +int ieee80211_register_crypto_ops(struct ieee80211_crypto_ops *ops)
7972 +{
7973 + unsigned long flags;
7974 + struct ieee80211_crypto_alg *alg;
7975 +
7976 + if (hcrypt == NULL)
7977 + return -1;
7978 +
7979 + alg = kmalloc(sizeof(*alg), GFP_KERNEL);
7980 + if (alg == NULL)
7981 + return -ENOMEM;
7982 +
7983 + memset(alg, 0, sizeof(*alg));
7984 + alg->ops = ops;
7985 +
7986 + spin_lock_irqsave(&hcrypt->lock, flags);
7987 + list_add(&alg->list, &hcrypt->algs);
7988 + spin_unlock_irqrestore(&hcrypt->lock, flags);
7989 +
7990 + printk(KERN_DEBUG "ieee80211_crypt: registered algorithm '%s'\n",
7991 + ops->name);
7992 +
7993 + return 0;
7994 +}
7995 +
7996 +int ieee80211_unregister_crypto_ops(struct ieee80211_crypto_ops *ops)
7997 +{
7998 + unsigned long flags;
7999 + struct list_head *ptr;
8000 + struct ieee80211_crypto_alg *del_alg = NULL;
8001 +
8002 + if (hcrypt == NULL)
8003 + return -1;
8004 +
8005 + spin_lock_irqsave(&hcrypt->lock, flags);
8006 + for (ptr = hcrypt->algs.next; ptr != &hcrypt->algs; ptr = ptr->next) {
8007 + struct ieee80211_crypto_alg *alg =
8008 + (struct ieee80211_crypto_alg *) ptr;
8009 + if (alg->ops == ops) {
8010 + list_del(&alg->list);
8011 + del_alg = alg;
8012 + break;
8013 + }
8014 + }
8015 + spin_unlock_irqrestore(&hcrypt->lock, flags);
8016 +
8017 + if (del_alg) {
8018 + printk(KERN_DEBUG "ieee80211_crypt: unregistered algorithm "
8019 + "'%s'\n", ops->name);
8020 + kfree(del_alg);
8021 + }
8022 +
8023 + return del_alg ? 0 : -1;
8024 +}
8025 +
8026 +
8027 +struct ieee80211_crypto_ops * ieee80211_get_crypto_ops(const char *name)
8028 +{
8029 + unsigned long flags;
8030 + struct list_head *ptr;
8031 + struct ieee80211_crypto_alg *found_alg = NULL;
8032 +
8033 + if (hcrypt == NULL)
8034 + return NULL;
8035 +
8036 + spin_lock_irqsave(&hcrypt->lock, flags);
8037 + for (ptr = hcrypt->algs.next; ptr != &hcrypt->algs; ptr = ptr->next) {
8038 + struct ieee80211_crypto_alg *alg =
8039 + (struct ieee80211_crypto_alg *) ptr;
8040 + if (strcmp(alg->ops->name, name) == 0) {
8041 + found_alg = alg;
8042 + break;
8043 + }
8044 + }
8045 + spin_unlock_irqrestore(&hcrypt->lock, flags);
8046 +
8047 + if (found_alg)
8048 + return found_alg->ops;
8049 + else
8050 + return NULL;
8051 +}
8052 +
8053 +
8054 +static void * ieee80211_crypt_null_init(int keyidx) { return (void *) 1; }
8055 +static void ieee80211_crypt_null_deinit(void *priv) {}
8056 +
8057 +static struct ieee80211_crypto_ops ieee80211_crypt_null = {
8058 + .name = "NULL",
8059 + .init = ieee80211_crypt_null_init,
8060 + .deinit = ieee80211_crypt_null_deinit,
8061 + .encrypt_mpdu = NULL,
8062 + .decrypt_mpdu = NULL,
8063 + .encrypt_msdu = NULL,
8064 + .decrypt_msdu = NULL,
8065 + .set_key = NULL,
8066 + .get_key = NULL,
8067 + .extra_prefix_len = 0,
8068 + .extra_postfix_len = 0,
8069 + .owner = THIS_MODULE,
8070 +};
8071 +
8072 +
8073 +int __init ieee80211_crypto_init(void)
8074 +{
8075 + int ret = -ENOMEM;
8076 +
8077 + hcrypt = kmalloc(sizeof(*hcrypt), GFP_KERNEL);
8078 + if (!hcrypt)
8079 + goto out;
8080 +
8081 + memset(hcrypt, 0, sizeof(*hcrypt));
8082 + INIT_LIST_HEAD(&hcrypt->algs);
8083 + spin_lock_init(&hcrypt->lock);
8084 +
8085 + ret = ieee80211_register_crypto_ops(&ieee80211_crypt_null);
8086 + if (ret < 0) {
8087 + kfree(hcrypt);
8088 + hcrypt = NULL;
8089 + }
8090 +out:
8091 + return ret;
8092 +}
8093 +
8094 +
8095 +void __exit ieee80211_crypto_deinit(void)
8096 +{
8097 + struct list_head *ptr, *n;
8098 +
8099 + if (hcrypt == NULL)
8100 + return;
8101 +
8102 + for (ptr = hcrypt->algs.next, n = ptr->next; ptr != &hcrypt->algs;
8103 + ptr = n, n = ptr->next) {
8104 + struct ieee80211_crypto_alg *alg =
8105 + (struct ieee80211_crypto_alg *) ptr;
8106 + list_del(ptr);
8107 + printk(KERN_DEBUG "ieee80211_crypt: unregistered algorithm "
8108 + "'%s' (deinit)\n", alg->ops->name);
8109 + kfree(alg);
8110 + }
8111 +
8112 + kfree(hcrypt);
8113 +}
8114 +
8115 +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
8116 +//EXPORT_SYMBOL(ieee80211_crypt_deinit_entries);
8117 +//EXPORT_SYMBOL(ieee80211_crypt_deinit_handler);
8118 +//EXPORT_SYMBOL(ieee80211_crypt_delayed_deinit);
8119 +
8120 +//EXPORT_SYMBOL(ieee80211_register_crypto_ops);
8121 +//EXPORT_SYMBOL(ieee80211_unregister_crypto_ops);
8122 +//EXPORT_SYMBOL(ieee80211_get_crypto_ops);
8123 +#else
8124 +EXPORT_SYMBOL_NOVERS(ieee80211_crypt_deinit_entries);
8125 +EXPORT_SYMBOL_NOVERS(ieee80211_crypt_deinit_handler);
8126 +EXPORT_SYMBOL_NOVERS(ieee80211_crypt_delayed_deinit);
8127 +
8128 +EXPORT_SYMBOL_NOVERS(ieee80211_register_crypto_ops);
8129 +EXPORT_SYMBOL_NOVERS(ieee80211_unregister_crypto_ops);
8130 +EXPORT_SYMBOL_NOVERS(ieee80211_get_crypto_ops);
8131 +#endif
8132 +
8133 +//module_init(ieee80211_crypto_init);
8134 +//module_exit(ieee80211_crypto_deinit);
8135 --- /dev/null
8136 +++ b/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt.h
8137 @@ -0,0 +1,93 @@
8138 +/*
8139 + * Original code based on Host AP (software wireless LAN access point) driver
8140 + * for Intersil Prism2/2.5/3.
8141 + *
8142 + * Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
8143 + * <jkmaline@cc.hut.fi>
8144 + * Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
8145 + *
8146 + * Adaption to a generic IEEE 802.11 stack by James Ketrenos
8147 + * <jketreno@linux.intel.com>
8148 + *
8149 + * Copyright (c) 2004, Intel Corporation
8150 + *
8151 + * This program is free software; you can redistribute it and/or modify
8152 + * it under the terms of the GNU General Public License version 2 as
8153 + * published by the Free Software Foundation. See README and COPYING for
8154 + * more details.
8155 + */
8156 +
8157 +/*
8158 + * This file defines the interface to the ieee80211 crypto module.
8159 + */
8160 +#ifndef IEEE80211_CRYPT_H
8161 +#define IEEE80211_CRYPT_H
8162 +
8163 +#include <linux/skbuff.h>
8164 +
8165 +struct ieee80211_crypto_ops {
8166 + const char *name;
8167 +
8168 + /* init new crypto context (e.g., allocate private data space,
8169 + * select IV, etc.); returns NULL on failure or pointer to allocated
8170 + * private data on success */
8171 + void * (*init)(int keyidx);
8172 +
8173 + /* deinitialize crypto context and free allocated private data */
8174 + void (*deinit)(void *priv);
8175 +
8176 + /* encrypt/decrypt return < 0 on error or >= 0 on success. The return
8177 + * value from decrypt_mpdu is passed as the keyidx value for
8178 + * decrypt_msdu. skb must have enough head and tail room for the
8179 + * encryption; if not, error will be returned; these functions are
8180 + * called for all MPDUs (i.e., fragments).
8181 + */
8182 + int (*encrypt_mpdu)(struct sk_buff *skb, int hdr_len, void *priv);
8183 + int (*decrypt_mpdu)(struct sk_buff *skb, int hdr_len, void *priv);
8184 +
8185 + /* These functions are called for full MSDUs, i.e. full frames.
8186 + * These can be NULL if full MSDU operations are not needed. */
8187 + int (*encrypt_msdu)(struct sk_buff *skb, int hdr_len, void *priv);
8188 + int (*decrypt_msdu)(struct sk_buff *skb, int keyidx, int hdr_len,
8189 + void *priv);
8190 +
8191 + int (*set_key)(void *key, int len, u8 *seq, void *priv);
8192 + int (*get_key)(void *key, int len, u8 *seq, void *priv);
8193 +
8194 + /* procfs handler for printing out key information and possible
8195 + * statistics */
8196 + char * (*print_stats)(char *p, void *priv);
8197 +
8198 + /* maximum number of bytes added by encryption; encrypt buf is
8199 + * allocated with extra_prefix_len bytes, copy of in_buf, and
8200 + * extra_postfix_len; encrypt need not use all this space, but
8201 + * the result must start at the beginning of the buffer and correct
8202 + * length must be returned */
8203 + int extra_prefix_len, extra_postfix_len;
8204 +
8205 + struct module *owner;
8206 +};
8207 +
8208 +struct ieee80211_crypt_data {
8209 + struct list_head list; /* delayed deletion list */
8210 + struct ieee80211_crypto_ops *ops;
8211 + void *priv;
8212 + atomic_t refcnt;
8213 +};
8214 +
8215 +int ieee80211_register_crypto_ops(struct ieee80211_crypto_ops *ops);
8216 +int ieee80211_unregister_crypto_ops(struct ieee80211_crypto_ops *ops);
8217 +struct ieee80211_crypto_ops * ieee80211_get_crypto_ops(const char *name);
8218 +void ieee80211_crypt_deinit_entries(struct ieee80211_device *, int);
8219 +void ieee80211_crypt_deinit_handler(unsigned long);
8220 +void ieee80211_crypt_delayed_deinit(struct ieee80211_device *ieee,
8221 + struct ieee80211_crypt_data **crypt);
8222 +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
8223 +#define offset_in_page(p) ((unsigned long)(p) & ~PAGE_MASK)
8224 +#endif
8225 +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,4,31))
8226 +#define crypto_alloc_tfm crypto_alloc_tfm_rsl
8227 +#define crypto_free_tfm crypto_free_tfm_rsl
8228 +#endif
8229 +
8230 +#endif
8231 --- /dev/null
8232 +++ b/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt_ccmp.c
8233 @@ -0,0 +1,534 @@
8234 +/*
8235 + * Host AP crypt: host-based CCMP encryption implementation for Host AP driver
8236 + *
8237 + * Copyright (c) 2003-2004, Jouni Malinen <jkmaline@cc.hut.fi>
8238 + *
8239 + * This program is free software; you can redistribute it and/or modify
8240 + * it under the terms of the GNU General Public License version 2 as
8241 + * published by the Free Software Foundation. See README and COPYING for
8242 + * more details.
8243 + */
8244 +
8245 +//#include <linux/config.h>
8246 +#include <linux/version.h>
8247 +#include <linux/module.h>
8248 +#include <linux/init.h>
8249 +#include <linux/slab.h>
8250 +#include <linux/random.h>
8251 +#include <linux/skbuff.h>
8252 +#include <linux/netdevice.h>
8253 +#include <linux/if_ether.h>
8254 +#include <linux/if_arp.h>
8255 +#include <asm/string.h>
8256 +#include <linux/wireless.h>
8257 +
8258 +#include "ieee80211.h"
8259 +
8260 +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
8261 +#include "rtl_crypto.h"
8262 +#else
8263 +#include <linux/crypto.h>
8264 +#endif
8265 +
8266 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
8267 + #include <asm/scatterlist.h>
8268 +#else
8269 + #include <linux/scatterlist.h>
8270 +#endif
8271 +//#include <asm/scatterlist.h>
8272 +
8273 +MODULE_AUTHOR("Jouni Malinen");
8274 +MODULE_DESCRIPTION("Host AP crypt: CCMP");
8275 +MODULE_LICENSE("GPL");
8276 +
8277 +#ifndef OPENSUSE_SLED
8278 +#define OPENSUSE_SLED 0
8279 +#endif
8280 +
8281 +#define AES_BLOCK_LEN 16
8282 +#define CCMP_HDR_LEN 8
8283 +#define CCMP_MIC_LEN 8
8284 +#define CCMP_TK_LEN 16
8285 +#define CCMP_PN_LEN 6
8286 +
8287 +struct ieee80211_ccmp_data {
8288 + u8 key[CCMP_TK_LEN];
8289 + int key_set;
8290 +
8291 + u8 tx_pn[CCMP_PN_LEN];
8292 + u8 rx_pn[CCMP_PN_LEN];
8293 +
8294 + u32 dot11RSNAStatsCCMPFormatErrors;
8295 + u32 dot11RSNAStatsCCMPReplays;
8296 + u32 dot11RSNAStatsCCMPDecryptErrors;
8297 +
8298 + int key_idx;
8299 +
8300 + struct crypto_tfm *tfm;
8301 +
8302 + /* scratch buffers for virt_to_page() (crypto API) */
8303 + u8 tx_b0[AES_BLOCK_LEN], tx_b[AES_BLOCK_LEN],
8304 + tx_e[AES_BLOCK_LEN], tx_s0[AES_BLOCK_LEN];
8305 + u8 rx_b0[AES_BLOCK_LEN], rx_b[AES_BLOCK_LEN], rx_a[AES_BLOCK_LEN];
8306 +};
8307 +
8308 +void ieee80211_ccmp_aes_encrypt(struct crypto_tfm *tfm,
8309 + const u8 pt[16], u8 ct[16])
8310 +{
8311 +#if((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED))
8312 + struct scatterlist src, dst;
8313 +
8314 + src.page = virt_to_page(pt);
8315 + src.offset = offset_in_page(pt);
8316 + src.length = AES_BLOCK_LEN;
8317 +
8318 + dst.page = virt_to_page(ct);
8319 + dst.offset = offset_in_page(ct);
8320 + dst.length = AES_BLOCK_LEN;
8321 +
8322 + crypto_cipher_encrypt(tfm, &dst, &src, AES_BLOCK_LEN);
8323 +#else
8324 + crypto_cipher_encrypt_one((void*)tfm, ct, pt);
8325 +#endif
8326 +}
8327 +
8328 +static void * ieee80211_ccmp_init(int key_idx)
8329 +{
8330 + struct ieee80211_ccmp_data *priv;
8331 +
8332 + priv = kmalloc(sizeof(*priv), GFP_ATOMIC);
8333 + if (priv == NULL)
8334 + goto fail;
8335 + memset(priv, 0, sizeof(*priv));
8336 + priv->key_idx = key_idx;
8337 +
8338 +#if((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED))
8339 + priv->tfm = crypto_alloc_tfm("aes", 0);
8340 + if (priv->tfm == NULL) {
8341 + printk(KERN_DEBUG "ieee80211_crypt_ccmp: could not allocate "
8342 + "crypto API aes\n");
8343 + goto fail;
8344 + }
8345 + #else
8346 + priv->tfm = (void*)crypto_alloc_cipher("aes", 0, CRYPTO_ALG_ASYNC);
8347 + if (IS_ERR(priv->tfm)) {
8348 + printk(KERN_DEBUG "ieee80211_crypt_ccmp: could not allocate "
8349 + "crypto API aes\n");
8350 + priv->tfm = NULL;
8351 + goto fail;
8352 + }
8353 + #endif
8354 + return priv;
8355 +
8356 +fail:
8357 + if (priv) {
8358 + if (priv->tfm)
8359 + #if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
8360 + crypto_free_tfm(priv->tfm);
8361 + #else
8362 + crypto_free_cipher((void*)priv->tfm);
8363 + #endif
8364 + kfree(priv);
8365 + }
8366 +
8367 + return NULL;
8368 +}
8369 +
8370 +
8371 +static void ieee80211_ccmp_deinit(void *priv)
8372 +{
8373 + struct ieee80211_ccmp_data *_priv = priv;
8374 + if (_priv && _priv->tfm)
8375 +#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
8376 + crypto_free_tfm(_priv->tfm);
8377 +#else
8378 + crypto_free_cipher((void*)_priv->tfm);
8379 +#endif
8380 + kfree(priv);
8381 +}
8382 +
8383 +
8384 +static inline void xor_block(u8 *b, u8 *a, size_t len)
8385 +{
8386 + int i;
8387 + for (i = 0; i < len; i++)
8388 + b[i] ^= a[i];
8389 +}
8390 +
8391 +
8392 +
8393 +static void ccmp_init_blocks(struct crypto_tfm *tfm,
8394 + struct ieee80211_hdr_4addr *hdr,
8395 + u8 *pn, size_t dlen, u8 *b0, u8 *auth,
8396 + u8 *s0)
8397 +{
8398 + u8 *pos, qc = 0;
8399 + size_t aad_len;
8400 + u16 fc;
8401 + int a4_included, qc_included;
8402 + u8 aad[2 * AES_BLOCK_LEN];
8403 +
8404 + fc = le16_to_cpu(hdr->frame_ctl);
8405 + a4_included = ((fc & (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)) ==
8406 + (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS));
8407 + /*
8408 + qc_included = ((WLAN_FC_GET_TYPE(fc) == IEEE80211_FTYPE_DATA) &&
8409 + (WLAN_FC_GET_STYPE(fc) & 0x08));
8410 + */
8411 + // fixed by David :2006.9.6
8412 + qc_included = ((WLAN_FC_GET_TYPE(fc) == IEEE80211_FTYPE_DATA) &&
8413 + (WLAN_FC_GET_STYPE(fc) & 0x80));
8414 + aad_len = 22;
8415 + if (a4_included)
8416 + aad_len += 6;
8417 + if (qc_included) {
8418 + pos = (u8 *) &hdr->addr4;
8419 + if (a4_included)
8420 + pos += 6;
8421 + qc = *pos & 0x0f;
8422 + aad_len += 2;
8423 + }
8424 + /* CCM Initial Block:
8425 + * Flag (Include authentication header, M=3 (8-octet MIC),
8426 + * L=1 (2-octet Dlen))
8427 + * Nonce: 0x00 | A2 | PN
8428 + * Dlen */
8429 + b0[0] = 0x59;
8430 + b0[1] = qc;
8431 + memcpy(b0 + 2, hdr->addr2, ETH_ALEN);
8432 + memcpy(b0 + 8, pn, CCMP_PN_LEN);
8433 + b0[14] = (dlen >> 8) & 0xff;
8434 + b0[15] = dlen & 0xff;
8435 +
8436 + /* AAD:
8437 + * FC with bits 4..6 and 11..13 masked to zero; 14 is always one
8438 + * A1 | A2 | A3
8439 + * SC with bits 4..15 (seq#) masked to zero
8440 + * A4 (if present)
8441 + * QC (if present)
8442 + */
8443 + pos = (u8 *) hdr;
8444 + aad[0] = 0; /* aad_len >> 8 */
8445 + aad[1] = aad_len & 0xff;
8446 + aad[2] = pos[0] & 0x8f;
8447 + aad[3] = pos[1] & 0xc7;
8448 + memcpy(aad + 4, hdr->addr1, 3 * ETH_ALEN);
8449 + pos = (u8 *) &hdr->seq_ctl;
8450 + aad[22] = pos[0] & 0x0f;
8451 + aad[23] = 0; /* all bits masked */
8452 + memset(aad + 24, 0, 8);
8453 + if (a4_included)
8454 + memcpy(aad + 24, hdr->addr4, ETH_ALEN);
8455 + if (qc_included) {
8456 + aad[a4_included ? 30 : 24] = qc;
8457 + /* rest of QC masked */
8458 + }
8459 +
8460 + /* Start with the first block and AAD */
8461 + ieee80211_ccmp_aes_encrypt(tfm, b0, auth);
8462 + xor_block(auth, aad, AES_BLOCK_LEN);
8463 + ieee80211_ccmp_aes_encrypt(tfm, auth, auth);
8464 + xor_block(auth, &aad[AES_BLOCK_LEN], AES_BLOCK_LEN);
8465 + ieee80211_ccmp_aes_encrypt(tfm, auth, auth);
8466 + b0[0] &= 0x07;
8467 + b0[14] = b0[15] = 0;
8468 + ieee80211_ccmp_aes_encrypt(tfm, b0, s0);
8469 +}
8470 +
8471 +
8472 +
8473 +static int ieee80211_ccmp_encrypt(struct sk_buff *skb, int hdr_len, void *priv)
8474 +{
8475 + struct ieee80211_ccmp_data *key = priv;
8476 + int data_len, i;
8477 + u8 *pos;
8478 + struct ieee80211_hdr_4addr *hdr;
8479 + cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
8480 +
8481 + if (skb_headroom(skb) < CCMP_HDR_LEN ||
8482 + skb_tailroom(skb) < CCMP_MIC_LEN ||
8483 + skb->len < hdr_len)
8484 + return -1;
8485 +
8486 + data_len = skb->len - hdr_len;
8487 + pos = skb_push(skb, CCMP_HDR_LEN);
8488 + memmove(pos, pos + CCMP_HDR_LEN, hdr_len);
8489 + pos += hdr_len;
8490 +// mic = skb_put(skb, CCMP_MIC_LEN);
8491 +
8492 + i = CCMP_PN_LEN - 1;
8493 + while (i >= 0) {
8494 + key->tx_pn[i]++;
8495 + if (key->tx_pn[i] != 0)
8496 + break;
8497 + i--;
8498 + }
8499 +
8500 + *pos++ = key->tx_pn[5];
8501 + *pos++ = key->tx_pn[4];
8502 + *pos++ = 0;
8503 + *pos++ = (key->key_idx << 6) | (1 << 5) /* Ext IV included */;
8504 + *pos++ = key->tx_pn[3];
8505 + *pos++ = key->tx_pn[2];
8506 + *pos++ = key->tx_pn[1];
8507 + *pos++ = key->tx_pn[0];
8508 +
8509 +
8510 + hdr = (struct ieee80211_hdr_4addr *) skb->data;
8511 + if (!tcb_desc->bHwSec)
8512 + {
8513 + int blocks, last, len;
8514 + u8 *mic;
8515 + u8 *b0 = key->tx_b0;
8516 + u8 *b = key->tx_b;
8517 + u8 *e = key->tx_e;
8518 + u8 *s0 = key->tx_s0;
8519 +
8520 + //mic is moved to here by john
8521 + mic = skb_put(skb, CCMP_MIC_LEN);
8522 +
8523 + ccmp_init_blocks(key->tfm, hdr, key->tx_pn, data_len, b0, b, s0);
8524 +
8525 + blocks = (data_len + AES_BLOCK_LEN - 1) / AES_BLOCK_LEN;
8526 + last = data_len % AES_BLOCK_LEN;
8527 +
8528 + for (i = 1; i <= blocks; i++) {
8529 + len = (i == blocks && last) ? last : AES_BLOCK_LEN;
8530 + /* Authentication */
8531 + xor_block(b, pos, len);
8532 + ieee80211_ccmp_aes_encrypt(key->tfm, b, b);
8533 + /* Encryption, with counter */
8534 + b0[14] = (i >> 8) & 0xff;
8535 + b0[15] = i & 0xff;
8536 + ieee80211_ccmp_aes_encrypt(key->tfm, b0, e);
8537 + xor_block(pos, e, len);
8538 + pos += len;
8539 + }
8540 +
8541 + for (i = 0; i < CCMP_MIC_LEN; i++)
8542 + mic[i] = b[i] ^ s0[i];
8543 + }
8544 + return 0;
8545 +}
8546 +
8547 +
8548 +static int ieee80211_ccmp_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
8549 +{
8550 + struct ieee80211_ccmp_data *key = priv;
8551 + u8 keyidx, *pos;
8552 + struct ieee80211_hdr_4addr *hdr;
8553 + cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
8554 + u8 pn[6];
8555 +
8556 + if (skb->len < hdr_len + CCMP_HDR_LEN + CCMP_MIC_LEN) {
8557 + key->dot11RSNAStatsCCMPFormatErrors++;
8558 + return -1;
8559 + }
8560 +
8561 + hdr = (struct ieee80211_hdr_4addr *) skb->data;
8562 + pos = skb->data + hdr_len;
8563 + keyidx = pos[3];
8564 + if (!(keyidx & (1 << 5))) {
8565 + if (net_ratelimit()) {
8566 + printk(KERN_DEBUG "CCMP: received packet without ExtIV"
8567 + " flag from " MAC_FMT "\n", MAC_ARG(hdr->addr2));
8568 + }
8569 + key->dot11RSNAStatsCCMPFormatErrors++;
8570 + return -2;
8571 + }
8572 + keyidx >>= 6;
8573 + if (key->key_idx != keyidx) {
8574 + printk(KERN_DEBUG "CCMP: RX tkey->key_idx=%d frame "
8575 + "keyidx=%d priv=%p\n", key->key_idx, keyidx, priv);
8576 + return -6;
8577 + }
8578 + if (!key->key_set) {
8579 + if (net_ratelimit()) {
8580 + printk(KERN_DEBUG "CCMP: received packet from " MAC_FMT
8581 + " with keyid=%d that does not have a configured"
8582 + " key\n", MAC_ARG(hdr->addr2), keyidx);
8583 + }
8584 + return -3;
8585 + }
8586 +
8587 + pn[0] = pos[7];
8588 + pn[1] = pos[6];
8589 + pn[2] = pos[5];
8590 + pn[3] = pos[4];
8591 + pn[4] = pos[1];
8592 + pn[5] = pos[0];
8593 + pos += 8;
8594 +
8595 + if (memcmp(pn, key->rx_pn, CCMP_PN_LEN) <= 0) {
8596 + if (net_ratelimit()) {
8597 + printk(KERN_DEBUG "CCMP: replay detected: STA=" MAC_FMT
8598 + " previous PN %02x%02x%02x%02x%02x%02x "
8599 + "received PN %02x%02x%02x%02x%02x%02x\n",
8600 + MAC_ARG(hdr->addr2), MAC_ARG(key->rx_pn),
8601 + MAC_ARG(pn));
8602 + }
8603 + key->dot11RSNAStatsCCMPReplays++;
8604 + return -4;
8605 + }
8606 + if (!tcb_desc->bHwSec)
8607 + {
8608 + size_t data_len = skb->len - hdr_len - CCMP_HDR_LEN - CCMP_MIC_LEN;
8609 + u8 *mic = skb->data + skb->len - CCMP_MIC_LEN;
8610 + u8 *b0 = key->rx_b0;
8611 + u8 *b = key->rx_b;
8612 + u8 *a = key->rx_a;
8613 + int i, blocks, last, len;
8614 +
8615 +
8616 + ccmp_init_blocks(key->tfm, hdr, pn, data_len, b0, a, b);
8617 + xor_block(mic, b, CCMP_MIC_LEN);
8618 +
8619 + blocks = (data_len + AES_BLOCK_LEN - 1) / AES_BLOCK_LEN;
8620 + last = data_len % AES_BLOCK_LEN;
8621 +
8622 + for (i = 1; i <= blocks; i++) {
8623 + len = (i == blocks && last) ? last : AES_BLOCK_LEN;
8624 + /* Decrypt, with counter */
8625 + b0[14] = (i >> 8) & 0xff;
8626 + b0[15] = i & 0xff;
8627 + ieee80211_ccmp_aes_encrypt(key->tfm, b0, b);
8628 + xor_block(pos, b, len);
8629 + /* Authentication */
8630 + xor_block(a, pos, len);
8631 + ieee80211_ccmp_aes_encrypt(key->tfm, a, a);
8632 + pos += len;
8633 + }
8634 +
8635 + if (memcmp(mic, a, CCMP_MIC_LEN) != 0) {
8636 + if (net_ratelimit()) {
8637 + printk(KERN_DEBUG "CCMP: decrypt failed: STA="
8638 + MAC_FMT "\n", MAC_ARG(hdr->addr2));
8639 + }
8640 + key->dot11RSNAStatsCCMPDecryptErrors++;
8641 + return -5;
8642 + }
8643 +
8644 + memcpy(key->rx_pn, pn, CCMP_PN_LEN);
8645 + }
8646 + /* Remove hdr and MIC */
8647 + memmove(skb->data + CCMP_HDR_LEN, skb->data, hdr_len);
8648 + skb_pull(skb, CCMP_HDR_LEN);
8649 + skb_trim(skb, skb->len - CCMP_MIC_LEN);
8650 +
8651 + return keyidx;
8652 +}
8653 +
8654 +
8655 +static int ieee80211_ccmp_set_key(void *key, int len, u8 *seq, void *priv)
8656 +{
8657 + struct ieee80211_ccmp_data *data = priv;
8658 + int keyidx;
8659 + struct crypto_tfm *tfm = data->tfm;
8660 +
8661 + keyidx = data->key_idx;
8662 + memset(data, 0, sizeof(*data));
8663 + data->key_idx = keyidx;
8664 + data->tfm = tfm;
8665 + if (len == CCMP_TK_LEN) {
8666 + memcpy(data->key, key, CCMP_TK_LEN);
8667 + data->key_set = 1;
8668 + if (seq) {
8669 + data->rx_pn[0] = seq[5];
8670 + data->rx_pn[1] = seq[4];
8671 + data->rx_pn[2] = seq[3];
8672 + data->rx_pn[3] = seq[2];
8673 + data->rx_pn[4] = seq[1];
8674 + data->rx_pn[5] = seq[0];
8675 + }
8676 + crypto_cipher_setkey((void*)data->tfm, data->key, CCMP_TK_LEN);
8677 + } else if (len == 0)
8678 + data->key_set = 0;
8679 + else
8680 + return -1;
8681 +
8682 + return 0;
8683 +}
8684 +
8685 +
8686 +static int ieee80211_ccmp_get_key(void *key, int len, u8 *seq, void *priv)
8687 +{
8688 + struct ieee80211_ccmp_data *data = priv;
8689 +
8690 + if (len < CCMP_TK_LEN)
8691 + return -1;
8692 +
8693 + if (!data->key_set)
8694 + return 0;
8695 + memcpy(key, data->key, CCMP_TK_LEN);
8696 +
8697 + if (seq) {
8698 + seq[0] = data->tx_pn[5];
8699 + seq[1] = data->tx_pn[4];
8700 + seq[2] = data->tx_pn[3];
8701 + seq[3] = data->tx_pn[2];
8702 + seq[4] = data->tx_pn[1];
8703 + seq[5] = data->tx_pn[0];
8704 + }
8705 +
8706 + return CCMP_TK_LEN;
8707 +}
8708 +
8709 +
8710 +static char * ieee80211_ccmp_print_stats(char *p, void *priv)
8711 +{
8712 + struct ieee80211_ccmp_data *ccmp = priv;
8713 + p += sprintf(p, "key[%d] alg=CCMP key_set=%d "
8714 + "tx_pn=%02x%02x%02x%02x%02x%02x "
8715 + "rx_pn=%02x%02x%02x%02x%02x%02x "
8716 + "format_errors=%d replays=%d decrypt_errors=%d\n",
8717 + ccmp->key_idx, ccmp->key_set,
8718 + MAC_ARG(ccmp->tx_pn), MAC_ARG(ccmp->rx_pn),
8719 + ccmp->dot11RSNAStatsCCMPFormatErrors,
8720 + ccmp->dot11RSNAStatsCCMPReplays,
8721 + ccmp->dot11RSNAStatsCCMPDecryptErrors);
8722 +
8723 + return p;
8724 +}
8725 +
8726 +void ieee80211_ccmp_null(void)
8727 +{
8728 +// printk("============>%s()\n", __FUNCTION__);
8729 + return;
8730 +}
8731 +
8732 +static struct ieee80211_crypto_ops ieee80211_crypt_ccmp = {
8733 + .name = "CCMP",
8734 + .init = ieee80211_ccmp_init,
8735 + .deinit = ieee80211_ccmp_deinit,
8736 + .encrypt_mpdu = ieee80211_ccmp_encrypt,
8737 + .decrypt_mpdu = ieee80211_ccmp_decrypt,
8738 + .encrypt_msdu = NULL,
8739 + .decrypt_msdu = NULL,
8740 + .set_key = ieee80211_ccmp_set_key,
8741 + .get_key = ieee80211_ccmp_get_key,
8742 + .print_stats = ieee80211_ccmp_print_stats,
8743 + .extra_prefix_len = CCMP_HDR_LEN,
8744 + .extra_postfix_len = CCMP_MIC_LEN,
8745 + .owner = THIS_MODULE,
8746 +};
8747 +
8748 +
8749 +int __init ieee80211_crypto_ccmp_init(void)
8750 +{
8751 + return ieee80211_register_crypto_ops(&ieee80211_crypt_ccmp);
8752 +}
8753 +
8754 +
8755 +void __exit ieee80211_crypto_ccmp_exit(void)
8756 +{
8757 + ieee80211_unregister_crypto_ops(&ieee80211_crypt_ccmp);
8758 +}
8759 +
8760 +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
8761 +//EXPORT_SYMBOL(ieee80211_ccmp_null);
8762 +#else
8763 +EXPORT_SYMBOL_NOVERS(ieee80211_ccmp_null);
8764 +#endif
8765 +
8766 +//module_init(ieee80211_crypto_ccmp_init);
8767 +//module_exit(ieee80211_crypto_ccmp_exit);
8768 --- /dev/null
8769 +++ b/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt_tkip.c
8770 @@ -0,0 +1,1034 @@
8771 +/*
8772 + * Host AP crypt: host-based TKIP encryption implementation for Host AP driver
8773 + *
8774 + * Copyright (c) 2003-2004, Jouni Malinen <jkmaline@cc.hut.fi>
8775 + *
8776 + * This program is free software; you can redistribute it and/or modify
8777 + * it under the terms of the GNU General Public License version 2 as
8778 + * published by the Free Software Foundation. See README and COPYING for
8779 + * more details.
8780 + */
8781 +
8782 +//#include <linux/config.h>
8783 +#include <linux/version.h>
8784 +#include <linux/module.h>
8785 +#include <linux/init.h>
8786 +#include <linux/slab.h>
8787 +#include <linux/random.h>
8788 +#include <linux/skbuff.h>
8789 +#include <linux/netdevice.h>
8790 +#include <linux/if_ether.h>
8791 +#include <linux/if_arp.h>
8792 +#include <asm/string.h>
8793 +
8794 +#include "ieee80211.h"
8795 +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,20))
8796 +//#include "crypto_compat.h"
8797 +#endif
8798 +
8799 +
8800 +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
8801 +#include "rtl_crypto.h"
8802 +#else
8803 +#include <linux/crypto.h>
8804 +#endif
8805 +//#include <asm/scatterlist.h>
8806 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
8807 + #include <asm/scatterlist.h>
8808 +#else
8809 + #include <linux/scatterlist.h>
8810 +#endif
8811 +
8812 +#include <linux/crc32.h>
8813 +
8814 +MODULE_AUTHOR("Jouni Malinen");
8815 +MODULE_DESCRIPTION("Host AP crypt: TKIP");
8816 +MODULE_LICENSE("GPL");
8817 +
8818 +#ifndef OPENSUSE_SLED
8819 +#define OPENSUSE_SLED 0
8820 +#endif
8821 +
8822 +struct ieee80211_tkip_data {
8823 +#define TKIP_KEY_LEN 32
8824 + u8 key[TKIP_KEY_LEN];
8825 + int key_set;
8826 +
8827 + u32 tx_iv32;
8828 + u16 tx_iv16;
8829 + u16 tx_ttak[5];
8830 + int tx_phase1_done;
8831 +
8832 + u32 rx_iv32;
8833 + u16 rx_iv16;
8834 + u16 rx_ttak[5];
8835 + int rx_phase1_done;
8836 + u32 rx_iv32_new;
8837 + u16 rx_iv16_new;
8838 +
8839 + u32 dot11RSNAStatsTKIPReplays;
8840 + u32 dot11RSNAStatsTKIPICVErrors;
8841 + u32 dot11RSNAStatsTKIPLocalMICFailures;
8842 +
8843 + int key_idx;
8844 +#if((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21)) || (OPENSUSE_SLED))
8845 + struct crypto_blkcipher *rx_tfm_arc4;
8846 + struct crypto_hash *rx_tfm_michael;
8847 + struct crypto_blkcipher *tx_tfm_arc4;
8848 + struct crypto_hash *tx_tfm_michael;
8849 +#else
8850 + struct crypto_tfm *tx_tfm_arc4;
8851 + struct crypto_tfm *tx_tfm_michael;
8852 + struct crypto_tfm *rx_tfm_arc4;
8853 + struct crypto_tfm *rx_tfm_michael;
8854 +#endif
8855 + /* scratch buffers for virt_to_page() (crypto API) */
8856 + u8 rx_hdr[16], tx_hdr[16];
8857 +};
8858 +
8859 +static void * ieee80211_tkip_init(int key_idx)
8860 +{
8861 + struct ieee80211_tkip_data *priv;
8862 +
8863 + priv = kmalloc(sizeof(*priv), GFP_ATOMIC);
8864 + if (priv == NULL)
8865 + goto fail;
8866 + memset(priv, 0, sizeof(*priv));
8867 + priv->key_idx = key_idx;
8868 +#if((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED))
8869 + priv->tx_tfm_arc4 = crypto_alloc_tfm("arc4", 0);
8870 + if (priv->tx_tfm_arc4 == NULL) {
8871 + printk(KERN_DEBUG "ieee80211_crypt_tkip: could not allocate "
8872 + "crypto API arc4\n");
8873 + goto fail;
8874 + }
8875 +
8876 + priv->tx_tfm_michael = crypto_alloc_tfm("michael_mic", 0);
8877 + if (priv->tx_tfm_michael == NULL) {
8878 + printk(KERN_DEBUG "ieee80211_crypt_tkip: could not allocate "
8879 + "crypto API michael_mic\n");
8880 + goto fail;
8881 + }
8882 +
8883 + priv->rx_tfm_arc4 = crypto_alloc_tfm("arc4", 0);
8884 + if (priv->rx_tfm_arc4 == NULL) {
8885 + printk(KERN_DEBUG "ieee80211_crypt_tkip: could not allocate "
8886 + "crypto API arc4\n");
8887 + goto fail;
8888 + }
8889 +
8890 + priv->rx_tfm_michael = crypto_alloc_tfm("michael_mic", 0);
8891 + if (priv->rx_tfm_michael == NULL) {
8892 + printk(KERN_DEBUG "ieee80211_crypt_tkip: could not allocate "
8893 + "crypto API michael_mic\n");
8894 + goto fail;
8895 + }
8896 +#else
8897 + priv->tx_tfm_arc4 = crypto_alloc_blkcipher("ecb(arc4)", 0,
8898 + CRYPTO_ALG_ASYNC);
8899 + if (IS_ERR(priv->tx_tfm_arc4)) {
8900 + printk(KERN_DEBUG "ieee80211_crypt_tkip: could not allocate "
8901 + "crypto API arc4\n");
8902 + priv->tx_tfm_arc4 = NULL;
8903 + goto fail;
8904 + }
8905 +
8906 + priv->tx_tfm_michael = crypto_alloc_hash("michael_mic", 0,
8907 + CRYPTO_ALG_ASYNC);
8908 + if (IS_ERR(priv->tx_tfm_michael)) {
8909 + printk(KERN_DEBUG "ieee80211_crypt_tkip: could not allocate "
8910 + "crypto API michael_mic\n");
8911 + priv->tx_tfm_michael = NULL;
8912 + goto fail;
8913 + }
8914 +
8915 + priv->rx_tfm_arc4 = crypto_alloc_blkcipher("ecb(arc4)", 0,
8916 + CRYPTO_ALG_ASYNC);
8917 + if (IS_ERR(priv->rx_tfm_arc4)) {
8918 + printk(KERN_DEBUG "ieee80211_crypt_tkip: could not allocate "
8919 + "crypto API arc4\n");
8920 + priv->rx_tfm_arc4 = NULL;
8921 + goto fail;
8922 + }
8923 +
8924 + priv->rx_tfm_michael = crypto_alloc_hash("michael_mic", 0,
8925 + CRYPTO_ALG_ASYNC);
8926 + if (IS_ERR(priv->rx_tfm_michael)) {
8927 + printk(KERN_DEBUG "ieee80211_crypt_tkip: could not allocate "
8928 + "crypto API michael_mic\n");
8929 + priv->rx_tfm_michael = NULL;
8930 + goto fail;
8931 + }
8932 +#endif
8933 + return priv;
8934 +
8935 +fail:
8936 + if (priv) {
8937 +#if((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED))
8938 + if (priv->tx_tfm_michael)
8939 + crypto_free_tfm(priv->tx_tfm_michael);
8940 + if (priv->tx_tfm_arc4)
8941 + crypto_free_tfm(priv->tx_tfm_arc4);
8942 + if (priv->rx_tfm_michael)
8943 + crypto_free_tfm(priv->rx_tfm_michael);
8944 + if (priv->rx_tfm_arc4)
8945 + crypto_free_tfm(priv->rx_tfm_arc4);
8946 +
8947 +#else
8948 + if (priv->tx_tfm_michael)
8949 + crypto_free_hash(priv->tx_tfm_michael);
8950 + if (priv->tx_tfm_arc4)
8951 + crypto_free_blkcipher(priv->tx_tfm_arc4);
8952 + if (priv->rx_tfm_michael)
8953 + crypto_free_hash(priv->rx_tfm_michael);
8954 + if (priv->rx_tfm_arc4)
8955 + crypto_free_blkcipher(priv->rx_tfm_arc4);
8956 +#endif
8957 + kfree(priv);
8958 + }
8959 +
8960 + return NULL;
8961 +}
8962 +
8963 +
8964 +static void ieee80211_tkip_deinit(void *priv)
8965 +{
8966 + struct ieee80211_tkip_data *_priv = priv;
8967 +#if((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED))
8968 + if (_priv->tx_tfm_michael)
8969 + crypto_free_tfm(_priv->tx_tfm_michael);
8970 + if (_priv->tx_tfm_arc4)
8971 + crypto_free_tfm(_priv->tx_tfm_arc4);
8972 + if (_priv->rx_tfm_michael)
8973 + crypto_free_tfm(_priv->rx_tfm_michael);
8974 + if (_priv->rx_tfm_arc4)
8975 + crypto_free_tfm(_priv->rx_tfm_arc4);
8976 +#else
8977 + if (_priv) {
8978 + if (_priv->tx_tfm_michael)
8979 + crypto_free_hash(_priv->tx_tfm_michael);
8980 + if (_priv->tx_tfm_arc4)
8981 + crypto_free_blkcipher(_priv->tx_tfm_arc4);
8982 + if (_priv->rx_tfm_michael)
8983 + crypto_free_hash(_priv->rx_tfm_michael);
8984 + if (_priv->rx_tfm_arc4)
8985 + crypto_free_blkcipher(_priv->rx_tfm_arc4);
8986 + }
8987 +#endif
8988 + kfree(priv);
8989 +}
8990 +
8991 +
8992 +static inline u16 RotR1(u16 val)
8993 +{
8994 + return (val >> 1) | (val << 15);
8995 +}
8996 +
8997 +
8998 +static inline u8 Lo8(u16 val)
8999 +{
9000 + return val & 0xff;
9001 +}
9002 +
9003 +
9004 +static inline u8 Hi8(u16 val)
9005 +{
9006 + return val >> 8;
9007 +}
9008 +
9009 +
9010 +static inline u16 Lo16(u32 val)
9011 +{
9012 + return val & 0xffff;
9013 +}
9014 +
9015 +
9016 +static inline u16 Hi16(u32 val)
9017 +{
9018 + return val >> 16;
9019 +}
9020 +
9021 +
9022 +static inline u16 Mk16(u8 hi, u8 lo)
9023 +{
9024 + return lo | (((u16) hi) << 8);
9025 +}
9026 +
9027 +
9028 +static inline u16 Mk16_le(u16 *v)
9029 +{
9030 + return le16_to_cpu(*v);
9031 +}
9032 +
9033 +
9034 +static const u16 Sbox[256] =
9035 +{
9036 + 0xC6A5, 0xF884, 0xEE99, 0xF68D, 0xFF0D, 0xD6BD, 0xDEB1, 0x9154,
9037 + 0x6050, 0x0203, 0xCEA9, 0x567D, 0xE719, 0xB562, 0x4DE6, 0xEC9A,
9038 + 0x8F45, 0x1F9D, 0x8940, 0xFA87, 0xEF15, 0xB2EB, 0x8EC9, 0xFB0B,
9039 + 0x41EC, 0xB367, 0x5FFD, 0x45EA, 0x23BF, 0x53F7, 0xE496, 0x9B5B,
9040 + 0x75C2, 0xE11C, 0x3DAE, 0x4C6A, 0x6C5A, 0x7E41, 0xF502, 0x834F,
9041 + 0x685C, 0x51F4, 0xD134, 0xF908, 0xE293, 0xAB73, 0x6253, 0x2A3F,
9042 + 0x080C, 0x9552, 0x4665, 0x9D5E, 0x3028, 0x37A1, 0x0A0F, 0x2FB5,
9043 + 0x0E09, 0x2436, 0x1B9B, 0xDF3D, 0xCD26, 0x4E69, 0x7FCD, 0xEA9F,
9044 + 0x121B, 0x1D9E, 0x5874, 0x342E, 0x362D, 0xDCB2, 0xB4EE, 0x5BFB,
9045 + 0xA4F6, 0x764D, 0xB761, 0x7DCE, 0x527B, 0xDD3E, 0x5E71, 0x1397,
9046 + 0xA6F5, 0xB968, 0x0000, 0xC12C, 0x4060, 0xE31F, 0x79C8, 0xB6ED,
9047 + 0xD4BE, 0x8D46, 0x67D9, 0x724B, 0x94DE, 0x98D4, 0xB0E8, 0x854A,
9048 + 0xBB6B, 0xC52A, 0x4FE5, 0xED16, 0x86C5, 0x9AD7, 0x6655, 0x1194,
9049 + 0x8ACF, 0xE910, 0x0406, 0xFE81, 0xA0F0, 0x7844, 0x25BA, 0x4BE3,
9050 + 0xA2F3, 0x5DFE, 0x80C0, 0x058A, 0x3FAD, 0x21BC, 0x7048, 0xF104,
9051 + 0x63DF, 0x77C1, 0xAF75, 0x4263, 0x2030, 0xE51A, 0xFD0E, 0xBF6D,
9052 + 0x814C, 0x1814, 0x2635, 0xC32F, 0xBEE1, 0x35A2, 0x88CC, 0x2E39,
9053 + 0x9357, 0x55F2, 0xFC82, 0x7A47, 0xC8AC, 0xBAE7, 0x322B, 0xE695,
9054 + 0xC0A0, 0x1998, 0x9ED1, 0xA37F, 0x4466, 0x547E, 0x3BAB, 0x0B83,
9055 + 0x8CCA, 0xC729, 0x6BD3, 0x283C, 0xA779, 0xBCE2, 0x161D, 0xAD76,
9056 + 0xDB3B, 0x6456, 0x744E, 0x141E, 0x92DB, 0x0C0A, 0x486C, 0xB8E4,
9057 + 0x9F5D, 0xBD6E, 0x43EF, 0xC4A6, 0x39A8, 0x31A4, 0xD337, 0xF28B,
9058 + 0xD532, 0x8B43, 0x6E59, 0xDAB7, 0x018C, 0xB164, 0x9CD2, 0x49E0,
9059 + 0xD8B4, 0xACFA, 0xF307, 0xCF25, 0xCAAF, 0xF48E, 0x47E9, 0x1018,
9060 + 0x6FD5, 0xF088, 0x4A6F, 0x5C72, 0x3824, 0x57F1, 0x73C7, 0x9751,
9061 + 0xCB23, 0xA17C, 0xE89C, 0x3E21, 0x96DD, 0x61DC, 0x0D86, 0x0F85,
9062 + 0xE090, 0x7C42, 0x71C4, 0xCCAA, 0x90D8, 0x0605, 0xF701, 0x1C12,
9063 + 0xC2A3, 0x6A5F, 0xAEF9, 0x69D0, 0x1791, 0x9958, 0x3A27, 0x27B9,
9064 + 0xD938, 0xEB13, 0x2BB3, 0x2233, 0xD2BB, 0xA970, 0x0789, 0x33A7,
9065 + 0x2DB6, 0x3C22, 0x1592, 0xC920, 0x8749, 0xAAFF, 0x5078, 0xA57A,
9066 + 0x038F, 0x59F8, 0x0980, 0x1A17, 0x65DA, 0xD731, 0x84C6, 0xD0B8,
9067 + 0x82C3, 0x29B0, 0x5A77, 0x1E11, 0x7BCB, 0xA8FC, 0x6DD6, 0x2C3A,
9068 +};
9069 +
9070 +
9071 +static inline u16 _S_(u16 v)
9072 +{
9073 + u16 t = Sbox[Hi8(v)];
9074 + return Sbox[Lo8(v)] ^ ((t << 8) | (t >> 8));
9075 +}
9076 +
9077 +
9078 +#define PHASE1_LOOP_COUNT 8
9079 +
9080 +
9081 +static void tkip_mixing_phase1(u16 *TTAK, const u8 *TK, const u8 *TA, u32 IV32)
9082 +{
9083 + int i, j;
9084 +
9085 + /* Initialize the 80-bit TTAK from TSC (IV32) and TA[0..5] */
9086 + TTAK[0] = Lo16(IV32);
9087 + TTAK[1] = Hi16(IV32);
9088 + TTAK[2] = Mk16(TA[1], TA[0]);
9089 + TTAK[3] = Mk16(TA[3], TA[2]);
9090 + TTAK[4] = Mk16(TA[5], TA[4]);
9091 +
9092 + for (i = 0; i < PHASE1_LOOP_COUNT; i++) {
9093 + j = 2 * (i & 1);
9094 + TTAK[0] += _S_(TTAK[4] ^ Mk16(TK[1 + j], TK[0 + j]));
9095 + TTAK[1] += _S_(TTAK[0] ^ Mk16(TK[5 + j], TK[4 + j]));
9096 + TTAK[2] += _S_(TTAK[1] ^ Mk16(TK[9 + j], TK[8 + j]));
9097 + TTAK[3] += _S_(TTAK[2] ^ Mk16(TK[13 + j], TK[12 + j]));
9098 + TTAK[4] += _S_(TTAK[3] ^ Mk16(TK[1 + j], TK[0 + j])) + i;
9099 + }
9100 +}
9101 +
9102 +
9103 +static void tkip_mixing_phase2(u8 *WEPSeed, const u8 *TK, const u16 *TTAK,
9104 + u16 IV16)
9105 +{
9106 + /* Make temporary area overlap WEP seed so that the final copy can be
9107 + * avoided on little endian hosts. */
9108 + u16 *PPK = (u16 *) &WEPSeed[4];
9109 +
9110 + /* Step 1 - make copy of TTAK and bring in TSC */
9111 + PPK[0] = TTAK[0];
9112 + PPK[1] = TTAK[1];
9113 + PPK[2] = TTAK[2];
9114 + PPK[3] = TTAK[3];
9115 + PPK[4] = TTAK[4];
9116 + PPK[5] = TTAK[4] + IV16;
9117 +
9118 + /* Step 2 - 96-bit bijective mixing using S-box */
9119 + PPK[0] += _S_(PPK[5] ^ Mk16_le((u16 *) &TK[0]));
9120 + PPK[1] += _S_(PPK[0] ^ Mk16_le((u16 *) &TK[2]));
9121 + PPK[2] += _S_(PPK[1] ^ Mk16_le((u16 *) &TK[4]));
9122 + PPK[3] += _S_(PPK[2] ^ Mk16_le((u16 *) &TK[6]));
9123 + PPK[4] += _S_(PPK[3] ^ Mk16_le((u16 *) &TK[8]));
9124 + PPK[5] += _S_(PPK[4] ^ Mk16_le((u16 *) &TK[10]));
9125 +
9126 + PPK[0] += RotR1(PPK[5] ^ Mk16_le((u16 *) &TK[12]));
9127 + PPK[1] += RotR1(PPK[0] ^ Mk16_le((u16 *) &TK[14]));
9128 + PPK[2] += RotR1(PPK[1]);
9129 + PPK[3] += RotR1(PPK[2]);
9130 + PPK[4] += RotR1(PPK[3]);
9131 + PPK[5] += RotR1(PPK[4]);
9132 +
9133 + /* Step 3 - bring in last of TK bits, assign 24-bit WEP IV value
9134 + * WEPSeed[0..2] is transmitted as WEP IV */
9135 + WEPSeed[0] = Hi8(IV16);
9136 + WEPSeed[1] = (Hi8(IV16) | 0x20) & 0x7F;
9137 + WEPSeed[2] = Lo8(IV16);
9138 + WEPSeed[3] = Lo8((PPK[5] ^ Mk16_le((u16 *) &TK[0])) >> 1);
9139 +
9140 +#ifdef __BIG_ENDIAN
9141 + {
9142 + int i;
9143 + for (i = 0; i < 6; i++)
9144 + PPK[i] = (PPK[i] << 8) | (PPK[i] >> 8);
9145 + }
9146 +#endif
9147 +}
9148 +
9149 +
9150 +static int ieee80211_tkip_encrypt(struct sk_buff *skb, int hdr_len, void *priv)
9151 +{
9152 + struct ieee80211_tkip_data *tkey = priv;
9153 + int len;
9154 + u8 *pos;
9155 + struct ieee80211_hdr_4addr *hdr;
9156 + cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
9157 +
9158 + #if((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21)) || (OPENSUSE_SLED))
9159 + struct blkcipher_desc desc = {.tfm = tkey->tx_tfm_arc4};
9160 + int ret = 0;
9161 + #endif
9162 + u8 rc4key[16], *icv;
9163 + u32 crc;
9164 + struct scatterlist sg;
9165 +
9166 + if (skb_headroom(skb) < 8 || skb_tailroom(skb) < 4 ||
9167 + skb->len < hdr_len)
9168 + return -1;
9169 +
9170 + hdr = (struct ieee80211_hdr_4addr *) skb->data;
9171 +
9172 +#if 0
9173 +printk("@@ tkey\n");
9174 +printk("%x|", ((u32*)tkey->key)[0]);
9175 +printk("%x|", ((u32*)tkey->key)[1]);
9176 +printk("%x|", ((u32*)tkey->key)[2]);
9177 +printk("%x|", ((u32*)tkey->key)[3]);
9178 +printk("%x|", ((u32*)tkey->key)[4]);
9179 +printk("%x|", ((u32*)tkey->key)[5]);
9180 +printk("%x|", ((u32*)tkey->key)[6]);
9181 +printk("%x\n", ((u32*)tkey->key)[7]);
9182 +#endif
9183 +
9184 + if (!tcb_desc->bHwSec)
9185 + {
9186 + if (!tkey->tx_phase1_done) {
9187 + tkip_mixing_phase1(tkey->tx_ttak, tkey->key, hdr->addr2,
9188 + tkey->tx_iv32);
9189 + tkey->tx_phase1_done = 1;
9190 + }
9191 + tkip_mixing_phase2(rc4key, tkey->key, tkey->tx_ttak, tkey->tx_iv16);
9192 + }
9193 + else
9194 + tkey->tx_phase1_done = 1;
9195 +
9196 +
9197 + len = skb->len - hdr_len;
9198 + pos = skb_push(skb, 8);
9199 + memmove(pos, pos + 8, hdr_len);
9200 + pos += hdr_len;
9201 +
9202 + if (tcb_desc->bHwSec)
9203 + {
9204 + *pos++ = Hi8(tkey->tx_iv16);
9205 + *pos++ = (Hi8(tkey->tx_iv16) | 0x20) & 0x7F;
9206 + *pos++ = Lo8(tkey->tx_iv16);
9207 + }
9208 + else
9209 + {
9210 + *pos++ = rc4key[0];
9211 + *pos++ = rc4key[1];
9212 + *pos++ = rc4key[2];
9213 + }
9214 +
9215 + *pos++ = (tkey->key_idx << 6) | (1 << 5) /* Ext IV included */;
9216 + *pos++ = tkey->tx_iv32 & 0xff;
9217 + *pos++ = (tkey->tx_iv32 >> 8) & 0xff;
9218 + *pos++ = (tkey->tx_iv32 >> 16) & 0xff;
9219 + *pos++ = (tkey->tx_iv32 >> 24) & 0xff;
9220 +
9221 + if (!tcb_desc->bHwSec)
9222 + {
9223 + icv = skb_put(skb, 4);
9224 +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
9225 + crc = ~crc32_le(~0, pos, len);
9226 +#else
9227 + crc = ~ether_crc_le(len, pos);
9228 +#endif
9229 + icv[0] = crc;
9230 + icv[1] = crc >> 8;
9231 + icv[2] = crc >> 16;
9232 + icv[3] = crc >> 24;
9233 +#if((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED))
9234 + crypto_cipher_setkey(tkey->tx_tfm_arc4, rc4key, 16);
9235 + sg.page = virt_to_page(pos);
9236 + sg.offset = offset_in_page(pos);
9237 + sg.length = len + 4;
9238 + crypto_cipher_encrypt(tkey->tx_tfm_arc4, &sg, &sg, len + 4);
9239 +#else
9240 + crypto_blkcipher_setkey(tkey->tx_tfm_arc4, rc4key, 16);
9241 +#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
9242 + sg.page = virt_to_page(pos);
9243 + sg.offset = offset_in_page(pos);
9244 + sg.length = len + 4;
9245 +#else
9246 + sg_init_one(&sg, pos, len+4);
9247 +#endif
9248 + ret= crypto_blkcipher_encrypt(&desc, &sg, &sg, len + 4);
9249 +#endif
9250 +
9251 + }
9252 +
9253 + tkey->tx_iv16++;
9254 + if (tkey->tx_iv16 == 0) {
9255 + tkey->tx_phase1_done = 0;
9256 + tkey->tx_iv32++;
9257 + }
9258 +
9259 + if (!tcb_desc->bHwSec)
9260 +#if((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED))
9261 + return 0;
9262 + #else
9263 + return ret;
9264 + #endif
9265 + else
9266 + return 0;
9267 +
9268 +
9269 +}
9270 +
9271 +static int ieee80211_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
9272 +{
9273 + struct ieee80211_tkip_data *tkey = priv;
9274 + u8 keyidx, *pos;
9275 + u32 iv32;
9276 + u16 iv16;
9277 + struct ieee80211_hdr_4addr *hdr;
9278 + cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
9279 + #if((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21)) || (OPENSUSE_SLED))
9280 + struct blkcipher_desc desc = {.tfm = tkey->rx_tfm_arc4};
9281 + #endif
9282 + u8 rc4key[16];
9283 + u8 icv[4];
9284 + u32 crc;
9285 + struct scatterlist sg;
9286 + int plen;
9287 + if (skb->len < hdr_len + 8 + 4)
9288 + return -1;
9289 +
9290 + hdr = (struct ieee80211_hdr_4addr *) skb->data;
9291 + pos = skb->data + hdr_len;
9292 + keyidx = pos[3];
9293 + if (!(keyidx & (1 << 5))) {
9294 + if (net_ratelimit()) {
9295 + printk(KERN_DEBUG "TKIP: received packet without ExtIV"
9296 + " flag from " MAC_FMT "\n", MAC_ARG(hdr->addr2));
9297 + }
9298 + return -2;
9299 + }
9300 + keyidx >>= 6;
9301 + if (tkey->key_idx != keyidx) {
9302 + printk(KERN_DEBUG "TKIP: RX tkey->key_idx=%d frame "
9303 + "keyidx=%d priv=%p\n", tkey->key_idx, keyidx, priv);
9304 + return -6;
9305 + }
9306 + if (!tkey->key_set) {
9307 + if (net_ratelimit()) {
9308 + printk(KERN_DEBUG "TKIP: received packet from " MAC_FMT
9309 + " with keyid=%d that does not have a configured"
9310 + " key\n", MAC_ARG(hdr->addr2), keyidx);
9311 + }
9312 + return -3;
9313 + }
9314 + iv16 = (pos[0] << 8) | pos[2];
9315 + iv32 = pos[4] | (pos[5] << 8) | (pos[6] << 16) | (pos[7] << 24);
9316 + pos += 8;
9317 +
9318 + if (!tcb_desc->bHwSec)
9319 + {
9320 + if (iv32 < tkey->rx_iv32 ||
9321 + (iv32 == tkey->rx_iv32 && iv16 <= tkey->rx_iv16)) {
9322 + if (net_ratelimit()) {
9323 + printk(KERN_DEBUG "TKIP: replay detected: STA=" MAC_FMT
9324 + " previous TSC %08x%04x received TSC "
9325 + "%08x%04x\n", MAC_ARG(hdr->addr2),
9326 + tkey->rx_iv32, tkey->rx_iv16, iv32, iv16);
9327 + }
9328 + tkey->dot11RSNAStatsTKIPReplays++;
9329 + return -4;
9330 + }
9331 +
9332 + if (iv32 != tkey->rx_iv32 || !tkey->rx_phase1_done) {
9333 + tkip_mixing_phase1(tkey->rx_ttak, tkey->key, hdr->addr2, iv32);
9334 + tkey->rx_phase1_done = 1;
9335 + }
9336 + tkip_mixing_phase2(rc4key, tkey->key, tkey->rx_ttak, iv16);
9337 +
9338 + plen = skb->len - hdr_len - 12;
9339 +
9340 +#if((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED))
9341 + crypto_cipher_setkey(tkey->rx_tfm_arc4, rc4key, 16);
9342 + sg.page = virt_to_page(pos);
9343 + sg.offset = offset_in_page(pos);
9344 + sg.length = plen + 4;
9345 + crypto_cipher_decrypt(tkey->rx_tfm_arc4, &sg, &sg, plen + 4);
9346 +#else
9347 + crypto_blkcipher_setkey(tkey->rx_tfm_arc4, rc4key, 16);
9348 +#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
9349 + sg.page = virt_to_page(pos);
9350 + sg.offset = offset_in_page(pos);
9351 + sg.length = plen + 4;
9352 +#else
9353 + sg_init_one(&sg, pos, plen+4);
9354 +#endif
9355 + if (crypto_blkcipher_decrypt(&desc, &sg, &sg, plen + 4)) {
9356 + if (net_ratelimit()) {
9357 + printk(KERN_DEBUG ": TKIP: failed to decrypt "
9358 + "received packet from " MAC_FMT "\n",
9359 + MAC_ARG(hdr->addr2));
9360 + }
9361 + return -7;
9362 + }
9363 +#endif
9364 +
9365 + #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
9366 + crc = ~crc32_le(~0, pos, plen);
9367 + #else
9368 + crc = ~ether_crc_le(plen, pos);
9369 + #endif
9370 + icv[0] = crc;
9371 + icv[1] = crc >> 8;
9372 + icv[2] = crc >> 16;
9373 + icv[3] = crc >> 24;
9374 +
9375 + if (memcmp(icv, pos + plen, 4) != 0) {
9376 + if (iv32 != tkey->rx_iv32) {
9377 + /* Previously cached Phase1 result was already lost, so
9378 + * it needs to be recalculated for the next packet. */
9379 + tkey->rx_phase1_done = 0;
9380 + }
9381 + if (net_ratelimit()) {
9382 + printk(KERN_DEBUG "TKIP: ICV error detected: STA="
9383 + MAC_FMT "\n", MAC_ARG(hdr->addr2));
9384 + }
9385 + tkey->dot11RSNAStatsTKIPICVErrors++;
9386 + return -5;
9387 + }
9388 +
9389 + }
9390 +
9391 + /* Update real counters only after Michael MIC verification has
9392 + * completed */
9393 + tkey->rx_iv32_new = iv32;
9394 + tkey->rx_iv16_new = iv16;
9395 +
9396 + /* Remove IV and ICV */
9397 + memmove(skb->data + 8, skb->data, hdr_len);
9398 + skb_pull(skb, 8);
9399 + skb_trim(skb, skb->len - 4);
9400 +
9401 +//john's test
9402 +#ifdef JOHN_DUMP
9403 +if( ((u16*)skb->data)[0] & 0x4000){
9404 + printk("@@ rx decrypted skb->data");
9405 + int i;
9406 + for(i=0;i<skb->len;i++){
9407 + if( (i%24)==0 ) printk("\n");
9408 + printk("%2x ", ((u8*)skb->data)[i]);
9409 + }
9410 + printk("\n");
9411 +}
9412 +#endif /*JOHN_DUMP*/
9413 + return keyidx;
9414 +}
9415 +
9416 +
9417 +#if((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED))
9418 +static int michael_mic(struct crypto_tfm * tfm_michael, u8 *key, u8 *hdr,
9419 + u8 *data, size_t data_len, u8 *mic)
9420 +{
9421 + struct scatterlist sg[2];
9422 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
9423 + struct hash_desc desc;
9424 + int ret = 0;
9425 +#endif
9426 +
9427 + if (tfm_michael == NULL){
9428 + printk(KERN_WARNING "michael_mic: tfm_michael == NULL\n");
9429 + return -1;
9430 + }
9431 + sg[0].page = virt_to_page(hdr);
9432 + sg[0].offset = offset_in_page(hdr);
9433 + sg[0].length = 16;
9434 +
9435 + sg[1].page = virt_to_page(data);
9436 + sg[1].offset = offset_in_page(data);
9437 + sg[1].length = data_len;
9438 +
9439 +
9440 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
9441 + crypto_digest_init(tfm_michael);
9442 + crypto_digest_setkey(tfm_michael, key, 8);
9443 + crypto_digest_update(tfm_michael, sg, 2);
9444 + crypto_digest_final(tfm_michael, mic);
9445 + return 0;
9446 +#else
9447 +if (crypto_hash_setkey(tkey->tfm_michael, key, 8))
9448 + return -1;
9449 +
9450 +// return 0;
9451 + desc.tfm = tkey->tfm_michael;
9452 + desc.flags = 0;
9453 + ret = crypto_hash_digest(&desc, sg, data_len + 16, mic);
9454 + return ret;
9455 +#endif
9456 +}
9457 +#else
9458 +static int michael_mic(struct crypto_hash *tfm_michael, u8 * key, u8 * hdr,
9459 + u8 * data, size_t data_len, u8 * mic)
9460 +{
9461 + struct hash_desc desc;
9462 + struct scatterlist sg[2];
9463 +
9464 + if (tfm_michael == NULL) {
9465 + printk(KERN_WARNING "michael_mic: tfm_michael == NULL\n");
9466 + return -1;
9467 + }
9468 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
9469 + sg[0].page = virt_to_page(hdr);
9470 + sg[0].offset = offset_in_page(hdr);
9471 + sg[0].length = 16;
9472 +
9473 + sg[1].page = virt_to_page(data);
9474 + sg[1].offset = offset_in_page(data);
9475 + sg[1].length = data_len;
9476 +#else
9477 + sg_init_table(sg, 2);
9478 + sg_set_buf(&sg[0], hdr, 16);
9479 + sg_set_buf(&sg[1], data, data_len);
9480 +#endif
9481 +
9482 + if (crypto_hash_setkey(tfm_michael, key, 8))
9483 + return -1;
9484 +
9485 + desc.tfm = tfm_michael;
9486 + desc.flags = 0;
9487 + return crypto_hash_digest(&desc, sg, data_len + 16, mic);
9488 +}
9489 +#endif
9490 +
9491 +
9492 +
9493 +static void michael_mic_hdr(struct sk_buff *skb, u8 *hdr)
9494 +{
9495 + struct ieee80211_hdr_4addr *hdr11;
9496 +
9497 + hdr11 = (struct ieee80211_hdr_4addr *) skb->data;
9498 + switch (le16_to_cpu(hdr11->frame_ctl) &
9499 + (IEEE80211_FCTL_FROMDS | IEEE80211_FCTL_TODS)) {
9500 + case IEEE80211_FCTL_TODS:
9501 + memcpy(hdr, hdr11->addr3, ETH_ALEN); /* DA */
9502 + memcpy(hdr + ETH_ALEN, hdr11->addr2, ETH_ALEN); /* SA */
9503 + break;
9504 + case IEEE80211_FCTL_FROMDS:
9505 + memcpy(hdr, hdr11->addr1, ETH_ALEN); /* DA */
9506 + memcpy(hdr + ETH_ALEN, hdr11->addr3, ETH_ALEN); /* SA */
9507 + break;
9508 + case IEEE80211_FCTL_FROMDS | IEEE80211_FCTL_TODS:
9509 + memcpy(hdr, hdr11->addr3, ETH_ALEN); /* DA */
9510 + memcpy(hdr + ETH_ALEN, hdr11->addr4, ETH_ALEN); /* SA */
9511 + break;
9512 + case 0:
9513 + memcpy(hdr, hdr11->addr1, ETH_ALEN); /* DA */
9514 + memcpy(hdr + ETH_ALEN, hdr11->addr2, ETH_ALEN); /* SA */
9515 + break;
9516 + }
9517 +
9518 + hdr[12] = 0; /* priority */
9519 +
9520 + hdr[13] = hdr[14] = hdr[15] = 0; /* reserved */
9521 +}
9522 +
9523 +
9524 +static int ieee80211_michael_mic_add(struct sk_buff *skb, int hdr_len, void *priv)
9525 +{
9526 + struct ieee80211_tkip_data *tkey = priv;
9527 + u8 *pos;
9528 + struct ieee80211_hdr_4addr *hdr;
9529 +
9530 + hdr = (struct ieee80211_hdr_4addr *) skb->data;
9531 +
9532 + if (skb_tailroom(skb) < 8 || skb->len < hdr_len) {
9533 + printk(KERN_DEBUG "Invalid packet for Michael MIC add "
9534 + "(tailroom=%d hdr_len=%d skb->len=%d)\n",
9535 + skb_tailroom(skb), hdr_len, skb->len);
9536 + return -1;
9537 + }
9538 +
9539 + michael_mic_hdr(skb, tkey->tx_hdr);
9540 +
9541 + // { david, 2006.9.1
9542 + // fix the wpa process with wmm enabled.
9543 + if(IEEE80211_QOS_HAS_SEQ(le16_to_cpu(hdr->frame_ctl))) {
9544 + tkey->tx_hdr[12] = *(skb->data + hdr_len - 2) & 0x07;
9545 + }
9546 + // }
9547 + pos = skb_put(skb, 8);
9548 +#if((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED))
9549 + if (michael_mic(tkey->tx_tfm_michael, &tkey->key[16], tkey->tx_hdr,
9550 + skb->data + hdr_len, skb->len - 8 - hdr_len, pos))
9551 +#else
9552 + if (michael_mic(tkey->tx_tfm_michael, &tkey->key[16], tkey->tx_hdr,
9553 + skb->data + hdr_len, skb->len - 8 - hdr_len, pos))
9554 +#endif
9555 + return -1;
9556 +
9557 + return 0;
9558 +}
9559 +
9560 +
9561 +#if WIRELESS_EXT >= 18
9562 +static void ieee80211_michael_mic_failure(struct net_device *dev,
9563 + struct ieee80211_hdr_4addr *hdr,
9564 + int keyidx)
9565 +{
9566 + union iwreq_data wrqu;
9567 + struct iw_michaelmicfailure ev;
9568 +
9569 + /* TODO: needed parameters: count, keyid, key type, TSC */
9570 + memset(&ev, 0, sizeof(ev));
9571 + ev.flags = keyidx & IW_MICFAILURE_KEY_ID;
9572 + if (hdr->addr1[0] & 0x01)
9573 + ev.flags |= IW_MICFAILURE_GROUP;
9574 + else
9575 + ev.flags |= IW_MICFAILURE_PAIRWISE;
9576 + ev.src_addr.sa_family = ARPHRD_ETHER;
9577 + memcpy(ev.src_addr.sa_data, hdr->addr2, ETH_ALEN);
9578 + memset(&wrqu, 0, sizeof(wrqu));
9579 + wrqu.data.length = sizeof(ev);
9580 + wireless_send_event(dev, IWEVMICHAELMICFAILURE, &wrqu, (char *) &ev);
9581 +}
9582 +#elif WIRELESS_EXT >= 15
9583 +static void ieee80211_michael_mic_failure(struct net_device *dev,
9584 + struct ieee80211_hdr_4addr *hdr,
9585 + int keyidx)
9586 +{
9587 + union iwreq_data wrqu;
9588 + char buf[128];
9589 +
9590 + /* TODO: needed parameters: count, keyid, key type, TSC */
9591 + sprintf(buf, "MLME-MICHAELMICFAILURE.indication(keyid=%d %scast addr="
9592 + MAC_FMT ")", keyidx, hdr->addr1[0] & 0x01 ? "broad" : "uni",
9593 + MAC_ARG(hdr->addr2));
9594 + memset(&wrqu, 0, sizeof(wrqu));
9595 + wrqu.data.length = strlen(buf);
9596 + wireless_send_event(dev, IWEVCUSTOM, &wrqu, buf);
9597 +}
9598 +#else /* WIRELESS_EXT >= 15 */
9599 +static inline void ieee80211_michael_mic_failure(struct net_device *dev,
9600 + struct ieee80211_hdr_4addr *hdr,
9601 + int keyidx)
9602 +{
9603 +}
9604 +#endif /* WIRELESS_EXT >= 15 */
9605 +
9606 +static int ieee80211_michael_mic_verify(struct sk_buff *skb, int keyidx,
9607 + int hdr_len, void *priv)
9608 +{
9609 + struct ieee80211_tkip_data *tkey = priv;
9610 + u8 mic[8];
9611 + struct ieee80211_hdr_4addr *hdr;
9612 +
9613 + hdr = (struct ieee80211_hdr_4addr *) skb->data;
9614 +
9615 + if (!tkey->key_set)
9616 + return -1;
9617 +
9618 + michael_mic_hdr(skb, tkey->rx_hdr);
9619 + // { david, 2006.9.1
9620 + // fix the wpa process with wmm enabled.
9621 + if(IEEE80211_QOS_HAS_SEQ(le16_to_cpu(hdr->frame_ctl))) {
9622 + tkey->rx_hdr[12] = *(skb->data + hdr_len - 2) & 0x07;
9623 + }
9624 + // }
9625 +
9626 +#if((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED))
9627 + if (michael_mic(tkey->rx_tfm_michael, &tkey->key[24], tkey->rx_hdr,
9628 + skb->data + hdr_len, skb->len - 8 - hdr_len, mic))
9629 +#else
9630 + if (michael_mic(tkey->rx_tfm_michael, &tkey->key[24], tkey->rx_hdr,
9631 + skb->data + hdr_len, skb->len - 8 - hdr_len, mic))
9632 +#endif
9633 + return -1;
9634 + if (memcmp(mic, skb->data + skb->len - 8, 8) != 0) {
9635 + struct ieee80211_hdr_4addr *hdr;
9636 + hdr = (struct ieee80211_hdr_4addr *) skb->data;
9637 + printk(KERN_DEBUG "%s: Michael MIC verification failed for "
9638 + "MSDU from " MAC_FMT " keyidx=%d\n",
9639 + skb->dev ? skb->dev->name : "N/A", MAC_ARG(hdr->addr2),
9640 + keyidx);
9641 + if (skb->dev)
9642 + ieee80211_michael_mic_failure(skb->dev, hdr, keyidx);
9643 + tkey->dot11RSNAStatsTKIPLocalMICFailures++;
9644 + return -1;
9645 + }
9646 +
9647 + /* Update TSC counters for RX now that the packet verification has
9648 + * completed. */
9649 + tkey->rx_iv32 = tkey->rx_iv32_new;
9650 + tkey->rx_iv16 = tkey->rx_iv16_new;
9651 +
9652 + skb_trim(skb, skb->len - 8);
9653 +
9654 + return 0;
9655 +}
9656 +
9657 +
9658 +static int ieee80211_tkip_set_key(void *key, int len, u8 *seq, void *priv)
9659 +{
9660 + struct ieee80211_tkip_data *tkey = priv;
9661 + int keyidx;
9662 +#if((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED))
9663 + struct crypto_tfm *tfm = tkey->tx_tfm_michael;
9664 + struct crypto_tfm *tfm2 = tkey->tx_tfm_arc4;
9665 + struct crypto_tfm *tfm3 = tkey->rx_tfm_michael;
9666 + struct crypto_tfm *tfm4 = tkey->rx_tfm_arc4;
9667 +#else
9668 + struct crypto_hash *tfm = tkey->tx_tfm_michael;
9669 + struct crypto_blkcipher *tfm2 = tkey->tx_tfm_arc4;
9670 + struct crypto_hash *tfm3 = tkey->rx_tfm_michael;
9671 + struct crypto_blkcipher *tfm4 = tkey->rx_tfm_arc4;
9672 +#endif
9673 +
9674 + keyidx = tkey->key_idx;
9675 + memset(tkey, 0, sizeof(*tkey));
9676 + tkey->key_idx = keyidx;
9677 +#if((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED))
9678 + tkey->tx_tfm_michael = tfm;
9679 + tkey->tx_tfm_arc4 = tfm2;
9680 + tkey->rx_tfm_michael = tfm3;
9681 + tkey->rx_tfm_arc4 = tfm4;
9682 +#else
9683 + tkey->tx_tfm_michael = tfm;
9684 + tkey->tx_tfm_arc4 = tfm2;
9685 + tkey->rx_tfm_michael = tfm3;
9686 + tkey->rx_tfm_arc4 = tfm4;
9687 +#endif
9688 +
9689 + if (len == TKIP_KEY_LEN) {
9690 + memcpy(tkey->key, key, TKIP_KEY_LEN);
9691 + tkey->key_set = 1;
9692 + tkey->tx_iv16 = 1; /* TSC is initialized to 1 */
9693 + if (seq) {
9694 + tkey->rx_iv32 = (seq[5] << 24) | (seq[4] << 16) |
9695 + (seq[3] << 8) | seq[2];
9696 + tkey->rx_iv16 = (seq[1] << 8) | seq[0];
9697 + }
9698 + } else if (len == 0)
9699 + tkey->key_set = 0;
9700 + else
9701 + return -1;
9702 +
9703 + return 0;
9704 +}
9705 +
9706 +
9707 +static int ieee80211_tkip_get_key(void *key, int len, u8 *seq, void *priv)
9708 +{
9709 + struct ieee80211_tkip_data *tkey = priv;
9710 +
9711 + if (len < TKIP_KEY_LEN)
9712 + return -1;
9713 +
9714 + if (!tkey->key_set)
9715 + return 0;
9716 + memcpy(key, tkey->key, TKIP_KEY_LEN);
9717 +
9718 + if (seq) {
9719 + /* Return the sequence number of the last transmitted frame. */
9720 + u16 iv16 = tkey->tx_iv16;
9721 + u32 iv32 = tkey->tx_iv32;
9722 + if (iv16 == 0)
9723 + iv32--;
9724 + iv16--;
9725 + seq[0] = tkey->tx_iv16;
9726 + seq[1] = tkey->tx_iv16 >> 8;
9727 + seq[2] = tkey->tx_iv32;
9728 + seq[3] = tkey->tx_iv32 >> 8;
9729 + seq[4] = tkey->tx_iv32 >> 16;
9730 + seq[5] = tkey->tx_iv32 >> 24;
9731 + }
9732 +
9733 + return TKIP_KEY_LEN;
9734 +}
9735 +
9736 +
9737 +static char * ieee80211_tkip_print_stats(char *p, void *priv)
9738 +{
9739 + struct ieee80211_tkip_data *tkip = priv;
9740 + p += sprintf(p, "key[%d] alg=TKIP key_set=%d "
9741 + "tx_pn=%02x%02x%02x%02x%02x%02x "
9742 + "rx_pn=%02x%02x%02x%02x%02x%02x "
9743 + "replays=%d icv_errors=%d local_mic_failures=%d\n",
9744 + tkip->key_idx, tkip->key_set,
9745 + (tkip->tx_iv32 >> 24) & 0xff,
9746 + (tkip->tx_iv32 >> 16) & 0xff,
9747 + (tkip->tx_iv32 >> 8) & 0xff,
9748 + tkip->tx_iv32 & 0xff,
9749 + (tkip->tx_iv16 >> 8) & 0xff,
9750 + tkip->tx_iv16 & 0xff,
9751 + (tkip->rx_iv32 >> 24) & 0xff,
9752 + (tkip->rx_iv32 >> 16) & 0xff,
9753 + (tkip->rx_iv32 >> 8) & 0xff,
9754 + tkip->rx_iv32 & 0xff,
9755 + (tkip->rx_iv16 >> 8) & 0xff,
9756 + tkip->rx_iv16 & 0xff,
9757 + tkip->dot11RSNAStatsTKIPReplays,
9758 + tkip->dot11RSNAStatsTKIPICVErrors,
9759 + tkip->dot11RSNAStatsTKIPLocalMICFailures);
9760 + return p;
9761 +}
9762 +
9763 +
9764 +static struct ieee80211_crypto_ops ieee80211_crypt_tkip = {
9765 + .name = "TKIP",
9766 + .init = ieee80211_tkip_init,
9767 + .deinit = ieee80211_tkip_deinit,
9768 + .encrypt_mpdu = ieee80211_tkip_encrypt,
9769 + .decrypt_mpdu = ieee80211_tkip_decrypt,
9770 + .encrypt_msdu = ieee80211_michael_mic_add,
9771 + .decrypt_msdu = ieee80211_michael_mic_verify,
9772 + .set_key = ieee80211_tkip_set_key,
9773 + .get_key = ieee80211_tkip_get_key,
9774 + .print_stats = ieee80211_tkip_print_stats,
9775 + .extra_prefix_len = 4 + 4, /* IV + ExtIV */
9776 + .extra_postfix_len = 8 + 4, /* MIC + ICV */
9777 + .owner = THIS_MODULE,
9778 +};
9779 +
9780 +
9781 +int __init ieee80211_crypto_tkip_init(void)
9782 +{
9783 + return ieee80211_register_crypto_ops(&ieee80211_crypt_tkip);
9784 +}
9785 +
9786 +
9787 +void __exit ieee80211_crypto_tkip_exit(void)
9788 +{
9789 + ieee80211_unregister_crypto_ops(&ieee80211_crypt_tkip);
9790 +}
9791 +
9792 +void ieee80211_tkip_null(void)
9793 +{
9794 +// printk("============>%s()\n", __FUNCTION__);
9795 + return;
9796 +}
9797 +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
9798 +//EXPORT_SYMBOL(ieee80211_tkip_null);
9799 +#else
9800 +EXPORT_SYMBOL_NOVERS(ieee80211_tkip_null);
9801 +#endif
9802 +
9803 +//module_init(ieee80211_crypto_tkip_init);
9804 +//module_exit(ieee80211_crypto_tkip_exit);
9805 --- /dev/null
9806 +++ b/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt_wep.c
9807 @@ -0,0 +1,397 @@
9808 +/*
9809 + * Host AP crypt: host-based WEP encryption implementation for Host AP driver
9810 + *
9811 + * Copyright (c) 2002-2004, Jouni Malinen <jkmaline@cc.hut.fi>
9812 + *
9813 + * This program is free software; you can redistribute it and/or modify
9814 + * it under the terms of the GNU General Public License version 2 as
9815 + * published by the Free Software Foundation. See README and COPYING for
9816 + * more details.
9817 + */
9818 +
9819 +//#include <linux/config.h>
9820 +#include <linux/version.h>
9821 +#include <linux/module.h>
9822 +#include <linux/init.h>
9823 +#include <linux/slab.h>
9824 +#include <linux/random.h>
9825 +#include <linux/skbuff.h>
9826 +#include <asm/string.h>
9827 +
9828 +#include "ieee80211.h"
9829 +
9830 +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,20))
9831 +//#include "crypto_compat.h"
9832 +#endif
9833 +
9834 +
9835 +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
9836 +#include "rtl_crypto.h"
9837 +#else
9838 +#include <linux/crypto.h>
9839 +#endif
9840 +
9841 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
9842 + #include <asm/scatterlist.h>
9843 +#else
9844 + #include <linux/scatterlist.h>
9845 +#endif
9846 +//#include <asm/scatterlist.h>
9847 +#include <linux/crc32.h>
9848 +//
9849 +/*
9850 +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
9851 +#include "rtl_crypto.h"
9852 +#else
9853 +#include <linux/crypto.h>
9854 +#endif
9855 +
9856 +#include <asm/scatterlist.h>
9857 +#include <linux/crc32.h>
9858 +*/
9859 +MODULE_AUTHOR("Jouni Malinen");
9860 +MODULE_DESCRIPTION("Host AP crypt: WEP");
9861 +MODULE_LICENSE("GPL");
9862 +#ifndef OPENSUSE_SLED
9863 +#define OPENSUSE_SLED 0
9864 +#endif
9865 +
9866 +struct prism2_wep_data {
9867 + u32 iv;
9868 +#define WEP_KEY_LEN 13
9869 + u8 key[WEP_KEY_LEN + 1];
9870 + u8 key_len;
9871 + u8 key_idx;
9872 +#if((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED))
9873 + struct crypto_tfm *tfm;
9874 + #else
9875 + struct crypto_blkcipher *tx_tfm;
9876 + struct crypto_blkcipher *rx_tfm;
9877 + #endif
9878 +};
9879 +
9880 +
9881 +static void * prism2_wep_init(int keyidx)
9882 +{
9883 + struct prism2_wep_data *priv;
9884 +
9885 + priv = kmalloc(sizeof(*priv), GFP_ATOMIC);
9886 + if (priv == NULL)
9887 + goto fail;
9888 + memset(priv, 0, sizeof(*priv));
9889 + priv->key_idx = keyidx;
9890 +
9891 +#if((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED))
9892 + priv->tfm = crypto_alloc_tfm("arc4", 0);
9893 + if (priv->tfm == NULL) {
9894 + printk(KERN_DEBUG "ieee80211_crypt_wep: could not allocate "
9895 + "crypto API arc4\n");
9896 + goto fail;
9897 + }
9898 + #else
9899 + priv->tx_tfm = crypto_alloc_blkcipher("ecb(arc4)", 0, CRYPTO_ALG_ASYNC);
9900 + if (IS_ERR(priv->tx_tfm)) {
9901 + printk(KERN_DEBUG "ieee80211_crypt_wep: could not allocate "
9902 + "crypto API arc4\n");
9903 + priv->tx_tfm = NULL;
9904 + goto fail;
9905 + }
9906 + priv->rx_tfm = crypto_alloc_blkcipher("ecb(arc4)", 0, CRYPTO_ALG_ASYNC);
9907 + if (IS_ERR(priv->rx_tfm)) {
9908 + printk(KERN_DEBUG "ieee80211_crypt_wep: could not allocate "
9909 + "crypto API arc4\n");
9910 + priv->rx_tfm = NULL;
9911 + goto fail;
9912 + }
9913 + #endif
9914 +
9915 + /* start WEP IV from a random value */
9916 + get_random_bytes(&priv->iv, 4);
9917 +
9918 + return priv;
9919 +
9920 +fail:
9921 +#if((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED))
9922 + if (priv) {
9923 + if (priv->tfm)
9924 + crypto_free_tfm(priv->tfm);
9925 + kfree(priv);
9926 + }
9927 + #else
9928 + if (priv) {
9929 + if (priv->tx_tfm)
9930 + crypto_free_blkcipher(priv->tx_tfm);
9931 + if (priv->rx_tfm)
9932 + crypto_free_blkcipher(priv->rx_tfm);
9933 + kfree(priv);
9934 + }
9935 + #endif
9936 + return NULL;
9937 +}
9938 +
9939 +
9940 +static void prism2_wep_deinit(void *priv)
9941 +{
9942 + struct prism2_wep_data *_priv = priv;
9943 +#if((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED))
9944 + if (_priv && _priv->tfm)
9945 + crypto_free_tfm(_priv->tfm);
9946 + #else
9947 + if (_priv) {
9948 + if (_priv->tx_tfm)
9949 + crypto_free_blkcipher(_priv->tx_tfm);
9950 + if (_priv->rx_tfm)
9951 + crypto_free_blkcipher(_priv->rx_tfm);
9952 + }
9953 + #endif
9954 + kfree(priv);
9955 +}
9956 +
9957 +/* Perform WEP encryption on given skb that has at least 4 bytes of headroom
9958 + * for IV and 4 bytes of tailroom for ICV. Both IV and ICV will be transmitted,
9959 + * so the payload length increases with 8 bytes.
9960 + *
9961 + * WEP frame payload: IV + TX key idx, RC4(data), ICV = RC4(CRC32(data))
9962 + */
9963 +static int prism2_wep_encrypt(struct sk_buff *skb, int hdr_len, void *priv)
9964 +{
9965 + struct prism2_wep_data *wep = priv;
9966 + u32 klen, len;
9967 + u8 key[WEP_KEY_LEN + 3];
9968 + u8 *pos;
9969 + cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
9970 + #if((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21)) || (OPENSUSE_SLED))
9971 + struct blkcipher_desc desc = {.tfm = wep->tx_tfm};
9972 + #endif
9973 + u32 crc;
9974 + u8 *icv;
9975 + struct scatterlist sg;
9976 + if (skb_headroom(skb) < 4 || skb_tailroom(skb) < 4 ||
9977 + skb->len < hdr_len)
9978 + return -1;
9979 +
9980 + len = skb->len - hdr_len;
9981 + pos = skb_push(skb, 4);
9982 + memmove(pos, pos + 4, hdr_len);
9983 + pos += hdr_len;
9984 +
9985 + klen = 3 + wep->key_len;
9986 +
9987 + wep->iv++;
9988 +
9989 + /* Fluhrer, Mantin, and Shamir have reported weaknesses in the key
9990 + * scheduling algorithm of RC4. At least IVs (KeyByte + 3, 0xff, N)
9991 + * can be used to speedup attacks, so avoid using them. */
9992 + if ((wep->iv & 0xff00) == 0xff00) {
9993 + u8 B = (wep->iv >> 16) & 0xff;
9994 + if (B >= 3 && B < klen)
9995 + wep->iv += 0x0100;
9996 + }
9997 +
9998 + /* Prepend 24-bit IV to RC4 key and TX frame */
9999 + *pos++ = key[0] = (wep->iv >> 16) & 0xff;
10000 + *pos++ = key[1] = (wep->iv >> 8) & 0xff;
10001 + *pos++ = key[2] = wep->iv & 0xff;
10002 + *pos++ = wep->key_idx << 6;
10003 +
10004 + /* Copy rest of the WEP key (the secret part) */
10005 + memcpy(key + 3, wep->key, wep->key_len);
10006 +
10007 + if (!tcb_desc->bHwSec)
10008 + {
10009 +
10010 + /* Append little-endian CRC32 and encrypt it to produce ICV */
10011 + #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
10012 + crc = ~crc32_le(~0, pos, len);
10013 + #else
10014 + crc = ~ether_crc_le(len, pos);
10015 + #endif
10016 + icv = skb_put(skb, 4);
10017 + icv[0] = crc;
10018 + icv[1] = crc >> 8;
10019 + icv[2] = crc >> 16;
10020 + icv[3] = crc >> 24;
10021 +
10022 +#if((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED))
10023 + crypto_cipher_setkey(wep->tfm, key, klen);
10024 + sg.page = virt_to_page(pos);
10025 + sg.offset = offset_in_page(pos);
10026 + sg.length = len + 4;
10027 + crypto_cipher_encrypt(wep->tfm, &sg, &sg, len + 4);
10028 + return 0;
10029 + #else
10030 + crypto_blkcipher_setkey(wep->tx_tfm, key, klen);
10031 + #if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
10032 + sg.page = virt_to_page(pos);
10033 + sg.offset = offset_in_page(pos);
10034 + sg.length = len + 4;
10035 + #else
10036 + sg_init_one(&sg, pos, len+4);
10037 + #endif
10038 + return crypto_blkcipher_encrypt(&desc, &sg, &sg, len + 4);
10039 + #endif
10040 + }
10041 +
10042 + return 0;
10043 +}
10044 +
10045 +
10046 +/* Perform WEP decryption on given buffer. Buffer includes whole WEP part of
10047 + * the frame: IV (4 bytes), encrypted payload (including SNAP header),
10048 + * ICV (4 bytes). len includes both IV and ICV.
10049 + *
10050 + * Returns 0 if frame was decrypted successfully and ICV was correct and -1 on
10051 + * failure. If frame is OK, IV and ICV will be removed.
10052 + */
10053 +static int prism2_wep_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
10054 +{
10055 + struct prism2_wep_data *wep = priv;
10056 + u32 klen, plen;
10057 + u8 key[WEP_KEY_LEN + 3];
10058 + u8 keyidx, *pos;
10059 + cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
10060 + #if((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21)) || (OPENSUSE_SLED))
10061 + struct blkcipher_desc desc = {.tfm = wep->rx_tfm};
10062 + #endif
10063 + u32 crc;
10064 + u8 icv[4];
10065 + struct scatterlist sg;
10066 + if (skb->len < hdr_len + 8)
10067 + return -1;
10068 +
10069 + pos = skb->data + hdr_len;
10070 + key[0] = *pos++;
10071 + key[1] = *pos++;
10072 + key[2] = *pos++;
10073 + keyidx = *pos++ >> 6;
10074 + if (keyidx != wep->key_idx)
10075 + return -1;
10076 +
10077 + klen = 3 + wep->key_len;
10078 +
10079 + /* Copy rest of the WEP key (the secret part) */
10080 + memcpy(key + 3, wep->key, wep->key_len);
10081 +
10082 + /* Apply RC4 to data and compute CRC32 over decrypted data */
10083 + plen = skb->len - hdr_len - 8;
10084 +
10085 + if (!tcb_desc->bHwSec)
10086 + {
10087 +#if((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED))
10088 + crypto_cipher_setkey(wep->tfm, key, klen);
10089 + sg.page = virt_to_page(pos);
10090 + sg.offset = offset_in_page(pos);
10091 + sg.length = plen + 4;
10092 + crypto_cipher_decrypt(wep->tfm, &sg, &sg, plen + 4);
10093 + #else
10094 + crypto_blkcipher_setkey(wep->rx_tfm, key, klen);
10095 + #if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
10096 + sg.page = virt_to_page(pos);
10097 + sg.offset = offset_in_page(pos);
10098 + sg.length = plen + 4;
10099 + #else
10100 + sg_init_one(&sg, pos, plen+4);
10101 + #endif
10102 + if (crypto_blkcipher_decrypt(&desc, &sg, &sg, plen + 4))
10103 + return -7;
10104 + #endif
10105 + #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
10106 + crc = ~crc32_le(~0, pos, plen);
10107 + #else
10108 + crc = ~ether_crc_le(plen, pos);
10109 + #endif
10110 + icv[0] = crc;
10111 + icv[1] = crc >> 8;
10112 + icv[2] = crc >> 16;
10113 + icv[3] = crc >> 24;
10114 + if (memcmp(icv, pos + plen, 4) != 0) {
10115 + /* ICV mismatch - drop frame */
10116 + return -2;
10117 + }
10118 + }
10119 + /* Remove IV and ICV */
10120 + memmove(skb->data + 4, skb->data, hdr_len);
10121 + skb_pull(skb, 4);
10122 + skb_trim(skb, skb->len - 4);
10123 +
10124 + return 0;
10125 +}
10126 +
10127 +
10128 +static int prism2_wep_set_key(void *key, int len, u8 *seq, void *priv)
10129 +{
10130 + struct prism2_wep_data *wep = priv;
10131 +
10132 + if (len < 0 || len > WEP_KEY_LEN)
10133 + return -1;
10134 +
10135 + memcpy(wep->key, key, len);
10136 + wep->key_len = len;
10137 +
10138 + return 0;
10139 +}
10140 +
10141 +
10142 +static int prism2_wep_get_key(void *key, int len, u8 *seq, void *priv)
10143 +{
10144 + struct prism2_wep_data *wep = priv;
10145 +
10146 + if (len < wep->key_len)
10147 + return -1;
10148 +
10149 + memcpy(key, wep->key, wep->key_len);
10150 +
10151 + return wep->key_len;
10152 +}
10153 +
10154 +
10155 +static char * prism2_wep_print_stats(char *p, void *priv)
10156 +{
10157 + struct prism2_wep_data *wep = priv;
10158 + p += sprintf(p, "key[%d] alg=WEP len=%d\n",
10159 + wep->key_idx, wep->key_len);
10160 + return p;
10161 +}
10162 +
10163 +
10164 +static struct ieee80211_crypto_ops ieee80211_crypt_wep = {
10165 + .name = "WEP",
10166 + .init = prism2_wep_init,
10167 + .deinit = prism2_wep_deinit,
10168 + .encrypt_mpdu = prism2_wep_encrypt,
10169 + .decrypt_mpdu = prism2_wep_decrypt,
10170 + .encrypt_msdu = NULL,
10171 + .decrypt_msdu = NULL,
10172 + .set_key = prism2_wep_set_key,
10173 + .get_key = prism2_wep_get_key,
10174 + .print_stats = prism2_wep_print_stats,
10175 + .extra_prefix_len = 4, /* IV */
10176 + .extra_postfix_len = 4, /* ICV */
10177 + .owner = THIS_MODULE,
10178 +};
10179 +
10180 +
10181 +int __init ieee80211_crypto_wep_init(void)
10182 +{
10183 + return ieee80211_register_crypto_ops(&ieee80211_crypt_wep);
10184 +}
10185 +
10186 +
10187 +void __exit ieee80211_crypto_wep_exit(void)
10188 +{
10189 + ieee80211_unregister_crypto_ops(&ieee80211_crypt_wep);
10190 +}
10191 +
10192 +void ieee80211_wep_null(void)
10193 +{
10194 +// printk("============>%s()\n", __FUNCTION__);
10195 + return;
10196 +}
10197 +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
10198 +//EXPORT_SYMBOL(ieee80211_wep_null);
10199 +#else
10200 +EXPORT_SYMBOL_NOVERS(ieee80211_wep_null);
10201 +#endif
10202 +
10203 +//module_init(ieee80211_crypto_wep_init);
10204 +//module_exit(ieee80211_crypto_wep_exit);
10205 --- /dev/null
10206 +++ b/drivers/staging/rtl8192e/ieee80211/ieee80211_module.c
10207 @@ -0,0 +1,432 @@
10208 +/*******************************************************************************
10209 +
10210 + Copyright(c) 2004 Intel Corporation. All rights reserved.
10211 +
10212 + Portions of this file are based on the WEP enablement code provided by the
10213 + Host AP project hostap-drivers v0.1.3
10214 + Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
10215 + <jkmaline@cc.hut.fi>
10216 + Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
10217 +
10218 + This program is free software; you can redistribute it and/or modify it
10219 + under the terms of version 2 of the GNU General Public License as
10220 + published by the Free Software Foundation.
10221 +
10222 + This program is distributed in the hope that it will be useful, but WITHOUT
10223 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10224 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
10225 + more details.
10226 +
10227 + You should have received a copy of the GNU General Public License along with
10228 + this program; if not, write to the Free Software Foundation, Inc., 59
10229 + Temple Place - Suite 330, Boston, MA 02111-1307, USA.
10230 +
10231 + The full GNU General Public License is included in this distribution in the
10232 + file called LICENSE.
10233 +
10234 + Contact Information:
10235 + James P. Ketrenos <ipw2100-admin@linux.intel.com>
10236 + Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
10237 +
10238 +*******************************************************************************/
10239 +
10240 +#include <linux/compiler.h>
10241 +//#include <linux/config.h>
10242 +#include <linux/errno.h>
10243 +#include <linux/if_arp.h>
10244 +#include <linux/in6.h>
10245 +#include <linux/in.h>
10246 +#include <linux/ip.h>
10247 +#include <linux/kernel.h>
10248 +#include <linux/module.h>
10249 +#include <linux/netdevice.h>
10250 +#include <linux/pci.h>
10251 +#include <linux/proc_fs.h>
10252 +#include <linux/skbuff.h>
10253 +#include <linux/slab.h>
10254 +#include <linux/tcp.h>
10255 +#include <linux/types.h>
10256 +#include <linux/version.h>
10257 +#include <linux/wireless.h>
10258 +#include <linux/etherdevice.h>
10259 +#include <asm/uaccess.h>
10260 +#include <net/arp.h>
10261 +
10262 +#include "ieee80211.h"
10263 +
10264 +MODULE_DESCRIPTION("802.11 data/management/control stack");
10265 +MODULE_AUTHOR("Copyright (C) 2004 Intel Corporation <jketreno@linux.intel.com>");
10266 +MODULE_LICENSE("GPL");
10267 +
10268 +#define DRV_NAME "ieee80211"
10269 +
10270 +static inline int ieee80211_networks_allocate(struct ieee80211_device *ieee)
10271 +{
10272 + if (ieee->networks)
10273 + return 0;
10274 +
10275 + ieee->networks = kmalloc(
10276 + MAX_NETWORK_COUNT * sizeof(struct ieee80211_network),
10277 + GFP_KERNEL);
10278 + if (!ieee->networks) {
10279 + printk(KERN_WARNING "%s: Out of memory allocating beacons\n",
10280 + ieee->dev->name);
10281 + return -ENOMEM;
10282 + }
10283 +
10284 + memset(ieee->networks, 0,
10285 + MAX_NETWORK_COUNT * sizeof(struct ieee80211_network));
10286 +
10287 + return 0;
10288 +}
10289 +
10290 +static inline void ieee80211_networks_free(struct ieee80211_device *ieee)
10291 +{
10292 + if (!ieee->networks)
10293 + return;
10294 + kfree(ieee->networks);
10295 + ieee->networks = NULL;
10296 +}
10297 +
10298 +static inline void ieee80211_networks_initialize(struct ieee80211_device *ieee)
10299 +{
10300 + int i;
10301 +
10302 + INIT_LIST_HEAD(&ieee->network_free_list);
10303 + INIT_LIST_HEAD(&ieee->network_list);
10304 + for (i = 0; i < MAX_NETWORK_COUNT; i++)
10305 + list_add_tail(&ieee->networks[i].list, &ieee->network_free_list);
10306 +}
10307 +
10308 +
10309 +struct net_device *alloc_ieee80211(int sizeof_priv)
10310 +{
10311 + struct ieee80211_device *ieee;
10312 + struct net_device *dev;
10313 + int i,err;
10314 +
10315 + IEEE80211_DEBUG_INFO("Initializing...\n");
10316 +
10317 + dev = alloc_etherdev(sizeof(struct ieee80211_device) + sizeof_priv);
10318 + if (!dev) {
10319 + IEEE80211_ERROR("Unable to network device.\n");
10320 + goto failed;
10321 + }
10322 +
10323 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0))
10324 + ieee = netdev_priv(dev);
10325 +#else
10326 + ieee = (struct ieee80211_device *)dev->priv;
10327 +#endif
10328 +#if 0
10329 + dev->hard_start_xmit = ieee80211_xmit;
10330 +#endif
10331 +
10332 + memset(ieee, 0, sizeof(struct ieee80211_device)+sizeof_priv);
10333 + ieee->dev = dev;
10334 +
10335 + err = ieee80211_networks_allocate(ieee);
10336 + if (err) {
10337 + IEEE80211_ERROR("Unable to allocate beacon storage: %d\n",
10338 + err);
10339 + goto failed;
10340 + }
10341 + ieee80211_networks_initialize(ieee);
10342 +
10343 +
10344 + /* Default fragmentation threshold is maximum payload size */
10345 + ieee->fts = DEFAULT_FTS;
10346 + ieee->scan_age = DEFAULT_MAX_SCAN_AGE;
10347 + ieee->open_wep = 1;
10348 +
10349 + /* Default to enabling full open WEP with host based encrypt/decrypt */
10350 + ieee->host_encrypt = 1;
10351 + ieee->host_decrypt = 1;
10352 + ieee->ieee802_1x = 1; /* Default to supporting 802.1x */
10353 +
10354 + INIT_LIST_HEAD(&ieee->crypt_deinit_list);
10355 + init_timer(&ieee->crypt_deinit_timer);
10356 + ieee->crypt_deinit_timer.data = (unsigned long)ieee;
10357 + ieee->crypt_deinit_timer.function = ieee80211_crypt_deinit_handler;
10358 +
10359 + spin_lock_init(&ieee->lock);
10360 + spin_lock_init(&ieee->wpax_suitlist_lock);
10361 + spin_lock_init(&ieee->bw_spinlock);
10362 + spin_lock_init(&ieee->reorder_spinlock);
10363 + //added by WB
10364 + atomic_set(&(ieee->atm_chnlop), 0);
10365 + atomic_set(&(ieee->atm_swbw), 0);
10366 +
10367 + ieee->wpax_type_set = 0;
10368 + ieee->wpa_enabled = 0;
10369 + ieee->tkip_countermeasures = 0;
10370 + ieee->drop_unencrypted = 0;
10371 + ieee->privacy_invoked = 0;
10372 + ieee->ieee802_1x = 1;
10373 + ieee->raw_tx = 0;
10374 + //ieee->hwsec_support = 1; //defalt support hw security. //use module_param instead.
10375 + ieee->hwsec_active = 0; //disable hwsec, switch it on when necessary.
10376 +
10377 + ieee80211_softmac_init(ieee);
10378 +
10379 +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13))
10380 + ieee->pHTInfo = (RT_HIGH_THROUGHPUT*)kzalloc(sizeof(RT_HIGH_THROUGHPUT), GFP_KERNEL);
10381 +#else
10382 + ieee->pHTInfo = (RT_HIGH_THROUGHPUT*)kmalloc(sizeof(RT_HIGH_THROUGHPUT), GFP_KERNEL);
10383 + memset(ieee->pHTInfo,0,sizeof(RT_HIGH_THROUGHPUT));
10384 +#endif
10385 + if (ieee->pHTInfo == NULL)
10386 + {
10387 + IEEE80211_DEBUG(IEEE80211_DL_ERR, "can't alloc memory for HTInfo\n");
10388 + return NULL;
10389 + }
10390 + HTUpdateDefaultSetting(ieee);
10391 + HTInitializeHTInfo(ieee); //may move to other place.
10392 + TSInitialize(ieee);
10393 +#if 0
10394 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
10395 + INIT_WORK(&ieee->ht_onAssRsp, (void(*)(void*)) HTOnAssocRsp_wq);
10396 +#else
10397 + INIT_WORK(&ieee->ht_onAssRsp, (void(*)(void*)) HTOnAssocRsp_wq, ieee);
10398 +#endif
10399 +#endif
10400 + for (i = 0; i < IEEE_IBSS_MAC_HASH_SIZE; i++)
10401 + INIT_LIST_HEAD(&ieee->ibss_mac_hash[i]);
10402 +
10403 + for (i = 0; i < 17; i++) {
10404 + ieee->last_rxseq_num[i] = -1;
10405 + ieee->last_rxfrag_num[i] = -1;
10406 + ieee->last_packet_time[i] = 0;
10407 + }
10408 +
10409 +//These function were added to load crypte module autoly
10410 + ieee80211_tkip_null();
10411 + ieee80211_wep_null();
10412 + ieee80211_ccmp_null();
10413 +
10414 + return dev;
10415 +
10416 + failed:
10417 + if (dev)
10418 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0))
10419 + free_netdev(dev);
10420 +#else
10421 + kfree(dev);
10422 +#endif
10423 + return NULL;
10424 +}
10425 +
10426 +
10427 +void free_ieee80211(struct net_device *dev)
10428 +{
10429 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0))
10430 + struct ieee80211_device *ieee = netdev_priv(dev);
10431 +#else
10432 + struct ieee80211_device *ieee = (struct ieee80211_device *)dev->priv;
10433 +#endif
10434 + int i;
10435 + //struct list_head *p, *q;
10436 +// del_timer_sync(&ieee->SwBwTimer);
10437 +#if 1
10438 + if (ieee->pHTInfo != NULL)
10439 + {
10440 + kfree(ieee->pHTInfo);
10441 + ieee->pHTInfo = NULL;
10442 + }
10443 +#endif
10444 + RemoveAllTS(ieee);
10445 + ieee80211_softmac_free(ieee);
10446 + del_timer_sync(&ieee->crypt_deinit_timer);
10447 + ieee80211_crypt_deinit_entries(ieee, 1);
10448 +
10449 + for (i = 0; i < WEP_KEYS; i++) {
10450 + struct ieee80211_crypt_data *crypt = ieee->crypt[i];
10451 + if (crypt) {
10452 + if (crypt->ops) {
10453 + crypt->ops->deinit(crypt->priv);
10454 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
10455 + module_put(crypt->ops->owner);
10456 +#else
10457 + __MOD_DEC_USE_COUNT(crypt->ops->owner);
10458 +#endif
10459 + }
10460 + kfree(crypt);
10461 + ieee->crypt[i] = NULL;
10462 + }
10463 + }
10464 +
10465 + ieee80211_networks_free(ieee);
10466 +#if 0
10467 + for (i = 0; i < IEEE_IBSS_MAC_HASH_SIZE; i++) {
10468 + list_for_each_safe(p, q, &ieee->ibss_mac_hash[i]) {
10469 + kfree(list_entry(p, struct ieee_ibss_seq, list));
10470 + list_del(p);
10471 + }
10472 + }
10473 +
10474 +#endif
10475 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0))
10476 + free_netdev(dev);
10477 +#else
10478 + kfree(dev);
10479 +#endif
10480 +}
10481 +
10482 +#ifdef CONFIG_IEEE80211_DEBUG
10483 +
10484 +u32 ieee80211_debug_level = 0;
10485 +static int debug = \
10486 + // IEEE80211_DL_INFO |
10487 + // IEEE80211_DL_WX |
10488 + // IEEE80211_DL_SCAN |
10489 + // IEEE80211_DL_STATE |
10490 + // IEEE80211_DL_MGMT |
10491 + // IEEE80211_DL_FRAG |
10492 + // IEEE80211_DL_EAP |
10493 + // IEEE80211_DL_DROP |
10494 + // IEEE80211_DL_TX |
10495 + // IEEE80211_DL_RX |
10496 + //IEEE80211_DL_QOS |
10497 + // IEEE80211_DL_HT |
10498 + // IEEE80211_DL_TS |
10499 +// IEEE80211_DL_BA |
10500 + // IEEE80211_DL_REORDER|
10501 +// IEEE80211_DL_TRACE |
10502 + //IEEE80211_DL_DATA |
10503 + IEEE80211_DL_ERR //awayls open this flags to show error out
10504 + ;
10505 +struct proc_dir_entry *ieee80211_proc = NULL;
10506 +
10507 +static int show_debug_level(char *page, char **start, off_t offset,
10508 + int count, int *eof, void *data)
10509 +{
10510 + return snprintf(page, count, "0x%08X\n", ieee80211_debug_level);
10511 +}
10512 +
10513 +static int store_debug_level(struct file *file, const char *buffer,
10514 + unsigned long count, void *data)
10515 +{
10516 + char buf[] = "0x00000000";
10517 + unsigned long len = min(sizeof(buf) - 1, (u32)count);
10518 + char *p = (char *)buf;
10519 + unsigned long val;
10520 +
10521 + if (copy_from_user(buf, buffer, len))
10522 + return count;
10523 + buf[len] = 0;
10524 + if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X') {
10525 + p++;
10526 + if (p[0] == 'x' || p[0] == 'X')
10527 + p++;
10528 + val = simple_strtoul(p, &p, 16);
10529 + } else
10530 + val = simple_strtoul(p, &p, 10);
10531 + if (p == buf)
10532 + printk(KERN_INFO DRV_NAME
10533 + ": %s is not in hex or decimal form.\n", buf);
10534 + else
10535 + ieee80211_debug_level = val;
10536 +
10537 + return strnlen(buf, count);
10538 +}
10539 +
10540 +extern int ieee80211_crypto_init(void);
10541 +extern void ieee80211_crypto_deinit(void);
10542 +extern int ieee80211_crypto_tkip_init(void);
10543 +extern void ieee80211_crypto_tkip_exit(void);
10544 +extern int ieee80211_crypto_ccmp_init(void);
10545 +extern void ieee80211_crypto_ccmp_exit(void);
10546 +extern int ieee80211_crypto_wep_init(void);
10547 +extern void ieee80211_crypto_wep_exit(void);
10548 +
10549 +int __init ieee80211_init(void)
10550 +{
10551 + struct proc_dir_entry *e;
10552 + int retval;
10553 +
10554 + retval = ieee80211_crypto_init();
10555 + if (retval)
10556 + return retval;
10557 + retval = ieee80211_crypto_tkip_init();
10558 + if (retval) {
10559 + ieee80211_crypto_deinit();
10560 + return retval;
10561 + }
10562 + retval = ieee80211_crypto_ccmp_init();
10563 + if (retval) {
10564 + ieee80211_crypto_tkip_exit();
10565 + ieee80211_crypto_deinit();
10566 + return retval;
10567 + }
10568 + retval = ieee80211_crypto_wep_init();
10569 + if (retval) {
10570 + ieee80211_crypto_ccmp_exit();
10571 + ieee80211_crypto_tkip_exit();
10572 + ieee80211_crypto_deinit();
10573 + return retval;
10574 + }
10575 +
10576 + ieee80211_debug_level = debug;
10577 +#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
10578 + ieee80211_proc = create_proc_entry(DRV_NAME, S_IFDIR, proc_net);
10579 +#else
10580 + ieee80211_proc = create_proc_entry(DRV_NAME, S_IFDIR, init_net.proc_net);
10581 +#endif
10582 + if (ieee80211_proc == NULL) {
10583 + IEEE80211_ERROR("Unable to create " DRV_NAME
10584 + " proc directory\n");
10585 + return -EIO;
10586 + }
10587 + e = create_proc_entry("debug_level", S_IFREG | S_IRUGO | S_IWUSR,
10588 + ieee80211_proc);
10589 + if (!e) {
10590 +#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
10591 + remove_proc_entry(DRV_NAME, proc_net);
10592 +#else
10593 + remove_proc_entry(DRV_NAME, init_net.proc_net);
10594 +#endif
10595 + ieee80211_proc = NULL;
10596 + return -EIO;
10597 + }
10598 + e->read_proc = show_debug_level;
10599 + e->write_proc = store_debug_level;
10600 + e->data = NULL;
10601 +
10602 + return 0;
10603 +}
10604 +
10605 +void __exit ieee80211_exit(void)
10606 +{
10607 + if (ieee80211_proc) {
10608 + remove_proc_entry("debug_level", ieee80211_proc);
10609 +#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
10610 + remove_proc_entry(DRV_NAME, proc_net);
10611 +#else
10612 + remove_proc_entry(DRV_NAME, init_net.proc_net);
10613 +#endif
10614 + ieee80211_proc = NULL;
10615 + }
10616 + ieee80211_crypto_wep_exit();
10617 + ieee80211_crypto_ccmp_exit();
10618 + ieee80211_crypto_tkip_exit();
10619 + ieee80211_crypto_deinit();
10620 +}
10621 +
10622 +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
10623 +#include <linux/moduleparam.h>
10624 +module_param(debug, int, 0444);
10625 +MODULE_PARM_DESC(debug, "debug output mask");
10626 +
10627 +
10628 +//module_exit(ieee80211_exit);
10629 +//module_init(ieee80211_init);
10630 +#endif
10631 +#endif
10632 +
10633 +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
10634 +//EXPORT_SYMBOL(alloc_ieee80211);
10635 +//EXPORT_SYMBOL(free_ieee80211);
10636 +#else
10637 +EXPORT_SYMBOL_NOVERS(alloc_ieee80211);
10638 +EXPORT_SYMBOL_NOVERS(free_ieee80211);
10639 +#endif
10640 --- /dev/null
10641 +++ b/drivers/staging/rtl8192e/ieee80211/ieee80211_rx.c
10642 @@ -0,0 +1,2802 @@
10643 +/*
10644 + * Original code based Host AP (software wireless LAN access point) driver
10645 + * for Intersil Prism2/2.5/3 - hostap.o module, common routines
10646 + *
10647 + * Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
10648 + * <jkmaline@cc.hut.fi>
10649 + * Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
10650 + * Copyright (c) 2004, Intel Corporation
10651 + *
10652 + * This program is free software; you can redistribute it and/or modify
10653 + * it under the terms of the GNU General Public License version 2 as
10654 + * published by the Free Software Foundation. See README and COPYING for
10655 + * more details.
10656 + ******************************************************************************
10657 +
10658 + Few modifications for Realtek's Wi-Fi drivers by
10659 + Andrea Merello <andreamrl@tiscali.it>
10660 +
10661 + A special thanks goes to Realtek for their support !
10662 +
10663 +******************************************************************************/
10664 +
10665 +
10666 +#include <linux/compiler.h>
10667 +//#include <linux/config.h>
10668 +#include <linux/errno.h>
10669 +#include <linux/if_arp.h>
10670 +#include <linux/in6.h>
10671 +#include <linux/in.h>
10672 +#include <linux/ip.h>
10673 +#include <linux/kernel.h>
10674 +#include <linux/module.h>
10675 +#include <linux/netdevice.h>
10676 +#include <linux/pci.h>
10677 +#include <linux/proc_fs.h>
10678 +#include <linux/skbuff.h>
10679 +#include <linux/slab.h>
10680 +#include <linux/tcp.h>
10681 +#include <linux/types.h>
10682 +#include <linux/version.h>
10683 +#include <linux/wireless.h>
10684 +#include <linux/etherdevice.h>
10685 +#include <asm/uaccess.h>
10686 +#include <linux/ctype.h>
10687 +
10688 +#include "ieee80211.h"
10689 +#ifdef ENABLE_DOT11D
10690 +#include "dot11d.h"
10691 +#endif
10692 +static inline void ieee80211_monitor_rx(struct ieee80211_device *ieee,
10693 + struct sk_buff *skb,
10694 + struct ieee80211_rx_stats *rx_stats)
10695 +{
10696 + struct ieee80211_hdr_4addr *hdr = (struct ieee80211_hdr_4addr *)skb->data;
10697 + u16 fc = le16_to_cpu(hdr->frame_ctl);
10698 +
10699 + skb->dev = ieee->dev;
10700 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22)
10701 + skb_reset_mac_header(skb);
10702 +#else
10703 + skb->mac.raw = skb->data;
10704 +#endif
10705 +
10706 + skb_pull(skb, ieee80211_get_hdrlen(fc));
10707 + skb->pkt_type = PACKET_OTHERHOST;
10708 + skb->protocol = __constant_htons(ETH_P_80211_RAW);
10709 + memset(skb->cb, 0, sizeof(skb->cb));
10710 + netif_rx(skb);
10711 +}
10712 +
10713 +
10714 +/* Called only as a tasklet (software IRQ) */
10715 +static struct ieee80211_frag_entry *
10716 +ieee80211_frag_cache_find(struct ieee80211_device *ieee, unsigned int seq,
10717 + unsigned int frag, u8 tid,u8 *src, u8 *dst)
10718 +{
10719 + struct ieee80211_frag_entry *entry;
10720 + int i;
10721 +
10722 + for (i = 0; i < IEEE80211_FRAG_CACHE_LEN; i++) {
10723 + entry = &ieee->frag_cache[tid][i];
10724 + if (entry->skb != NULL &&
10725 + time_after(jiffies, entry->first_frag_time + 2 * HZ)) {
10726 + IEEE80211_DEBUG_FRAG(
10727 + "expiring fragment cache entry "
10728 + "seq=%u last_frag=%u\n",
10729 + entry->seq, entry->last_frag);
10730 + dev_kfree_skb_any(entry->skb);
10731 + entry->skb = NULL;
10732 + }
10733 +
10734 + if (entry->skb != NULL && entry->seq == seq &&
10735 + (entry->last_frag + 1 == frag || frag == -1) &&
10736 + memcmp(entry->src_addr, src, ETH_ALEN) == 0 &&
10737 + memcmp(entry->dst_addr, dst, ETH_ALEN) == 0)
10738 + return entry;
10739 + }
10740 +
10741 + return NULL;
10742 +}
10743 +
10744 +/* Called only as a tasklet (software IRQ) */
10745 +static struct sk_buff *
10746 +ieee80211_frag_cache_get(struct ieee80211_device *ieee,
10747 + struct ieee80211_hdr_4addr *hdr)
10748 +{
10749 + struct sk_buff *skb = NULL;
10750 + u16 fc = le16_to_cpu(hdr->frame_ctl);
10751 + u16 sc = le16_to_cpu(hdr->seq_ctl);
10752 + unsigned int frag = WLAN_GET_SEQ_FRAG(sc);
10753 + unsigned int seq = WLAN_GET_SEQ_SEQ(sc);
10754 + struct ieee80211_frag_entry *entry;
10755 + struct ieee80211_hdr_3addrqos *hdr_3addrqos;
10756 + struct ieee80211_hdr_4addrqos *hdr_4addrqos;
10757 + u8 tid;
10758 +
10759 + if (((fc & IEEE80211_FCTL_DSTODS) == IEEE80211_FCTL_DSTODS)&&IEEE80211_QOS_HAS_SEQ(fc)) {
10760 + hdr_4addrqos = (struct ieee80211_hdr_4addrqos *)hdr;
10761 + tid = le16_to_cpu(hdr_4addrqos->qos_ctl) & IEEE80211_QCTL_TID;
10762 + tid = UP2AC(tid);
10763 + tid ++;
10764 + } else if (IEEE80211_QOS_HAS_SEQ(fc)) {
10765 + hdr_3addrqos = (struct ieee80211_hdr_3addrqos *)hdr;
10766 + tid = le16_to_cpu(hdr_3addrqos->qos_ctl) & IEEE80211_QCTL_TID;
10767 + tid = UP2AC(tid);
10768 + tid ++;
10769 + } else {
10770 + tid = 0;
10771 + }
10772 +
10773 + if (frag == 0) {
10774 + /* Reserve enough space to fit maximum frame length */
10775 + skb = dev_alloc_skb(ieee->dev->mtu +
10776 + sizeof(struct ieee80211_hdr_4addr) +
10777 + 8 /* LLC */ +
10778 + 2 /* alignment */ +
10779 + 8 /* WEP */ +
10780 + ETH_ALEN /* WDS */ +
10781 + (IEEE80211_QOS_HAS_SEQ(fc)?2:0) /* QOS Control */);
10782 + if (skb == NULL)
10783 + return NULL;
10784 +
10785 + entry = &ieee->frag_cache[tid][ieee->frag_next_idx[tid]];
10786 + ieee->frag_next_idx[tid]++;
10787 + if (ieee->frag_next_idx[tid] >= IEEE80211_FRAG_CACHE_LEN)
10788 + ieee->frag_next_idx[tid] = 0;
10789 +
10790 + if (entry->skb != NULL)
10791 + dev_kfree_skb_any(entry->skb);
10792 +
10793 + entry->first_frag_time = jiffies;
10794 + entry->seq = seq;
10795 + entry->last_frag = frag;
10796 + entry->skb = skb;
10797 + memcpy(entry->src_addr, hdr->addr2, ETH_ALEN);
10798 + memcpy(entry->dst_addr, hdr->addr1, ETH_ALEN);
10799 + } else {
10800 + /* received a fragment of a frame for which the head fragment
10801 + * should have already been received */
10802 + entry = ieee80211_frag_cache_find(ieee, seq, frag, tid,hdr->addr2,
10803 + hdr->addr1);
10804 + if (entry != NULL) {
10805 + entry->last_frag = frag;
10806 + skb = entry->skb;
10807 + }
10808 + }
10809 +
10810 + return skb;
10811 +}
10812 +
10813 +
10814 +/* Called only as a tasklet (software IRQ) */
10815 +static int ieee80211_frag_cache_invalidate(struct ieee80211_device *ieee,
10816 + struct ieee80211_hdr_4addr *hdr)
10817 +{
10818 + u16 fc = le16_to_cpu(hdr->frame_ctl);
10819 + u16 sc = le16_to_cpu(hdr->seq_ctl);
10820 + unsigned int seq = WLAN_GET_SEQ_SEQ(sc);
10821 + struct ieee80211_frag_entry *entry;
10822 + struct ieee80211_hdr_3addrqos *hdr_3addrqos;
10823 + struct ieee80211_hdr_4addrqos *hdr_4addrqos;
10824 + u8 tid;
10825 +
10826 + if(((fc & IEEE80211_FCTL_DSTODS) == IEEE80211_FCTL_DSTODS)&&IEEE80211_QOS_HAS_SEQ(fc)) {
10827 + hdr_4addrqos = (struct ieee80211_hdr_4addrqos *)hdr;
10828 + tid = le16_to_cpu(hdr_4addrqos->qos_ctl) & IEEE80211_QCTL_TID;
10829 + tid = UP2AC(tid);
10830 + tid ++;
10831 + } else if (IEEE80211_QOS_HAS_SEQ(fc)) {
10832 + hdr_3addrqos = (struct ieee80211_hdr_3addrqos *)hdr;
10833 + tid = le16_to_cpu(hdr_3addrqos->qos_ctl) & IEEE80211_QCTL_TID;
10834 + tid = UP2AC(tid);
10835 + tid ++;
10836 + } else {
10837 + tid = 0;
10838 + }
10839 +
10840 + entry = ieee80211_frag_cache_find(ieee, seq, -1, tid,hdr->addr2,
10841 + hdr->addr1);
10842 +
10843 + if (entry == NULL) {
10844 + IEEE80211_DEBUG_FRAG(
10845 + "could not invalidate fragment cache "
10846 + "entry (seq=%u)\n", seq);
10847 + return -1;
10848 + }
10849 +
10850 + entry->skb = NULL;
10851 + return 0;
10852 +}
10853 +
10854 +
10855 +
10856 +/* ieee80211_rx_frame_mgtmt
10857 + *
10858 + * Responsible for handling management control frames
10859 + *
10860 + * Called by ieee80211_rx */
10861 +static inline int
10862 +ieee80211_rx_frame_mgmt(struct ieee80211_device *ieee, struct sk_buff *skb,
10863 + struct ieee80211_rx_stats *rx_stats, u16 type,
10864 + u16 stype)
10865 +{
10866 + /* On the struct stats definition there is written that
10867 + * this is not mandatory.... but seems that the probe
10868 + * response parser uses it
10869 + */
10870 + struct ieee80211_hdr_3addr * hdr = (struct ieee80211_hdr_3addr *)skb->data;
10871 +
10872 + rx_stats->len = skb->len;
10873 + ieee80211_rx_mgt(ieee,(struct ieee80211_hdr_4addr *)skb->data,rx_stats);
10874 + //if ((ieee->state == IEEE80211_LINKED) && (memcmp(hdr->addr3, ieee->current_network.bssid, ETH_ALEN)))
10875 + if ((memcmp(hdr->addr1, ieee->dev->dev_addr, ETH_ALEN)))//use ADDR1 to perform address matching for Management frames
10876 + {
10877 + dev_kfree_skb_any(skb);
10878 + return 0;
10879 + }
10880 +
10881 + ieee80211_rx_frame_softmac(ieee, skb, rx_stats, type, stype);
10882 +
10883 + dev_kfree_skb_any(skb);
10884 +
10885 + return 0;
10886 +
10887 + #ifdef NOT_YET
10888 + if (ieee->iw_mode == IW_MODE_MASTER) {
10889 + printk(KERN_DEBUG "%s: Master mode not yet suppported.\n",
10890 + ieee->dev->name);
10891 + return 0;
10892 +/*
10893 + hostap_update_sta_ps(ieee, (struct hostap_ieee80211_hdr_4addr *)
10894 + skb->data);*/
10895 + }
10896 +
10897 + if (ieee->hostapd && type == IEEE80211_TYPE_MGMT) {
10898 + if (stype == WLAN_FC_STYPE_BEACON &&
10899 + ieee->iw_mode == IW_MODE_MASTER) {
10900 + struct sk_buff *skb2;
10901 + /* Process beacon frames also in kernel driver to
10902 + * update STA(AP) table statistics */
10903 + skb2 = skb_clone(skb, GFP_ATOMIC);
10904 + if (skb2)
10905 + hostap_rx(skb2->dev, skb2, rx_stats);
10906 + }
10907 +
10908 + /* send management frames to the user space daemon for
10909 + * processing */
10910 + ieee->apdevstats.rx_packets++;
10911 + ieee->apdevstats.rx_bytes += skb->len;
10912 + prism2_rx_80211(ieee->apdev, skb, rx_stats, PRISM2_RX_MGMT);
10913 + return 0;
10914 + }
10915 +
10916 + if (ieee->iw_mode == IW_MODE_MASTER) {
10917 + if (type != WLAN_FC_TYPE_MGMT && type != WLAN_FC_TYPE_CTRL) {
10918 + printk(KERN_DEBUG "%s: unknown management frame "
10919 + "(type=0x%02x, stype=0x%02x) dropped\n",
10920 + skb->dev->name, type, stype);
10921 + return -1;
10922 + }
10923 +
10924 + hostap_rx(skb->dev, skb, rx_stats);
10925 + return 0;
10926 + }
10927 +
10928 + printk(KERN_DEBUG "%s: hostap_rx_frame_mgmt: management frame "
10929 + "received in non-Host AP mode\n", skb->dev->name);
10930 + return -1;
10931 + #endif
10932 +}
10933 +
10934 +
10935 +
10936 +/* See IEEE 802.1H for LLC/SNAP encapsulation/decapsulation */
10937 +/* Ethernet-II snap header (RFC1042 for most EtherTypes) */
10938 +static unsigned char rfc1042_header[] =
10939 +{ 0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00 };
10940 +/* Bridge-Tunnel header (for EtherTypes ETH_P_AARP and ETH_P_IPX) */
10941 +static unsigned char bridge_tunnel_header[] =
10942 +{ 0xaa, 0xaa, 0x03, 0x00, 0x00, 0xf8 };
10943 +/* No encapsulation header if EtherType < 0x600 (=length) */
10944 +
10945 +/* Called by ieee80211_rx_frame_decrypt */
10946 +static int ieee80211_is_eapol_frame(struct ieee80211_device *ieee,
10947 + struct sk_buff *skb, size_t hdrlen)
10948 +{
10949 + struct net_device *dev = ieee->dev;
10950 + u16 fc, ethertype;
10951 + struct ieee80211_hdr_4addr *hdr;
10952 + u8 *pos;
10953 +
10954 + if (skb->len < 24)
10955 + return 0;
10956 +
10957 + hdr = (struct ieee80211_hdr_4addr *) skb->data;
10958 + fc = le16_to_cpu(hdr->frame_ctl);
10959 +
10960 + /* check that the frame is unicast frame to us */
10961 + if ((fc & (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)) ==
10962 + IEEE80211_FCTL_TODS &&
10963 + memcmp(hdr->addr1, dev->dev_addr, ETH_ALEN) == 0 &&
10964 + memcmp(hdr->addr3, dev->dev_addr, ETH_ALEN) == 0) {
10965 + /* ToDS frame with own addr BSSID and DA */
10966 + } else if ((fc & (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)) ==
10967 + IEEE80211_FCTL_FROMDS &&
10968 + memcmp(hdr->addr1, dev->dev_addr, ETH_ALEN) == 0) {
10969 + /* FromDS frame with own addr as DA */
10970 + } else
10971 + return 0;
10972 +
10973 + if (skb->len < 24 + 8)
10974 + return 0;
10975 +
10976 + /* check for port access entity Ethernet type */
10977 +// pos = skb->data + 24;
10978 + pos = skb->data + hdrlen;
10979 + ethertype = (pos[6] << 8) | pos[7];
10980 + if (ethertype == ETH_P_PAE)
10981 + return 1;
10982 +
10983 + return 0;
10984 +}
10985 +
10986 +/* Called only as a tasklet (software IRQ), by ieee80211_rx */
10987 +static inline int
10988 +ieee80211_rx_frame_decrypt(struct ieee80211_device* ieee, struct sk_buff *skb,
10989 + struct ieee80211_crypt_data *crypt)
10990 +{
10991 + struct ieee80211_hdr_4addr *hdr;
10992 + int res, hdrlen;
10993 +
10994 + if (crypt == NULL || crypt->ops->decrypt_mpdu == NULL)
10995 + return 0;
10996 +#if 1
10997 + if (ieee->hwsec_active)
10998 + {
10999 + cb_desc *tcb_desc = (cb_desc *)(skb->cb+ MAX_DEV_ADDR_SIZE);
11000 + tcb_desc->bHwSec = 1;
11001 + }
11002 +#endif
11003 + hdr = (struct ieee80211_hdr_4addr *) skb->data;
11004 + hdrlen = ieee80211_get_hdrlen(le16_to_cpu(hdr->frame_ctl));
11005 +
11006 +#ifdef CONFIG_IEEE80211_CRYPT_TKIP
11007 + if (ieee->tkip_countermeasures &&
11008 + strcmp(crypt->ops->name, "TKIP") == 0) {
11009 + if (net_ratelimit()) {
11010 + printk(KERN_DEBUG "%s: TKIP countermeasures: dropped "
11011 + "received packet from " MAC_FMT "\n",
11012 + ieee->dev->name, MAC_ARG(hdr->addr2));
11013 + }
11014 + return -1;
11015 + }
11016 +#endif
11017 +
11018 + atomic_inc(&crypt->refcnt);
11019 + res = crypt->ops->decrypt_mpdu(skb, hdrlen, crypt->priv);
11020 + atomic_dec(&crypt->refcnt);
11021 + if (res < 0) {
11022 + IEEE80211_DEBUG_DROP(
11023 + "decryption failed (SA=" MAC_FMT
11024 + ") res=%d\n", MAC_ARG(hdr->addr2), res);
11025 + if (res == -2)
11026 + IEEE80211_DEBUG_DROP("Decryption failed ICV "
11027 + "mismatch (key %d)\n",
11028 + skb->data[hdrlen + 3] >> 6);
11029 + ieee->ieee_stats.rx_discards_undecryptable++;
11030 + return -1;
11031 + }
11032 +
11033 + return res;
11034 +}
11035 +
11036 +
11037 +/* Called only as a tasklet (software IRQ), by ieee80211_rx */
11038 +static inline int
11039 +ieee80211_rx_frame_decrypt_msdu(struct ieee80211_device* ieee, struct sk_buff *skb,
11040 + int keyidx, struct ieee80211_crypt_data *crypt)
11041 +{
11042 + struct ieee80211_hdr_4addr *hdr;
11043 + int res, hdrlen;
11044 +
11045 + if (crypt == NULL || crypt->ops->decrypt_msdu == NULL)
11046 + return 0;
11047 + if (ieee->hwsec_active)
11048 + {
11049 + cb_desc *tcb_desc = (cb_desc *)(skb->cb+ MAX_DEV_ADDR_SIZE);
11050 + tcb_desc->bHwSec = 1;
11051 + }
11052 +
11053 + hdr = (struct ieee80211_hdr_4addr *) skb->data;
11054 + hdrlen = ieee80211_get_hdrlen(le16_to_cpu(hdr->frame_ctl));
11055 +
11056 + atomic_inc(&crypt->refcnt);
11057 + res = crypt->ops->decrypt_msdu(skb, keyidx, hdrlen, crypt->priv);
11058 + atomic_dec(&crypt->refcnt);
11059 + if (res < 0) {
11060 + printk(KERN_DEBUG "%s: MSDU decryption/MIC verification failed"
11061 + " (SA=" MAC_FMT " keyidx=%d)\n",
11062 + ieee->dev->name, MAC_ARG(hdr->addr2), keyidx);
11063 + return -1;
11064 + }
11065 +
11066 + return 0;
11067 +}
11068 +
11069 +
11070 +/* this function is stolen from ipw2200 driver*/
11071 +#define IEEE_PACKET_RETRY_TIME (5*HZ)
11072 +static int is_duplicate_packet(struct ieee80211_device *ieee,
11073 + struct ieee80211_hdr_4addr *header)
11074 +{
11075 + u16 fc = le16_to_cpu(header->frame_ctl);
11076 + u16 sc = le16_to_cpu(header->seq_ctl);
11077 + u16 seq = WLAN_GET_SEQ_SEQ(sc);
11078 + u16 frag = WLAN_GET_SEQ_FRAG(sc);
11079 + u16 *last_seq, *last_frag;
11080 + unsigned long *last_time;
11081 + struct ieee80211_hdr_3addrqos *hdr_3addrqos;
11082 + struct ieee80211_hdr_4addrqos *hdr_4addrqos;
11083 + u8 tid;
11084 +
11085 +
11086 + //TO2DS and QoS
11087 + if(((fc & IEEE80211_FCTL_DSTODS) == IEEE80211_FCTL_DSTODS)&&IEEE80211_QOS_HAS_SEQ(fc)) {
11088 + hdr_4addrqos = (struct ieee80211_hdr_4addrqos *)header;
11089 + tid = le16_to_cpu(hdr_4addrqos->qos_ctl) & IEEE80211_QCTL_TID;
11090 + tid = UP2AC(tid);
11091 + tid ++;
11092 + } else if(IEEE80211_QOS_HAS_SEQ(fc)) { //QoS
11093 + hdr_3addrqos = (struct ieee80211_hdr_3addrqos*)header;
11094 + tid = le16_to_cpu(hdr_3addrqos->qos_ctl) & IEEE80211_QCTL_TID;
11095 + tid = UP2AC(tid);
11096 + tid ++;
11097 + } else { // no QoS
11098 + tid = 0;
11099 + }
11100 +
11101 + switch (ieee->iw_mode) {
11102 + case IW_MODE_ADHOC:
11103 + {
11104 + struct list_head *p;
11105 + struct ieee_ibss_seq *entry = NULL;
11106 + u8 *mac = header->addr2;
11107 + int index = mac[5] % IEEE_IBSS_MAC_HASH_SIZE;
11108 + //for (pos = (head)->next; pos != (head); pos = pos->next)
11109 + //__list_for_each(p, &ieee->ibss_mac_hash[index]) {
11110 + list_for_each(p, &ieee->ibss_mac_hash[index]) {
11111 + entry = list_entry(p, struct ieee_ibss_seq, list);
11112 + if (!memcmp(entry->mac, mac, ETH_ALEN))
11113 + break;
11114 + }
11115 + // if (memcmp(entry->mac, mac, ETH_ALEN)){
11116 + if (p == &ieee->ibss_mac_hash[index]) {
11117 + entry = kmalloc(sizeof(struct ieee_ibss_seq), GFP_ATOMIC);
11118 + if (!entry) {
11119 + printk(KERN_WARNING "Cannot malloc new mac entry\n");
11120 + return 0;
11121 + }
11122 + memcpy(entry->mac, mac, ETH_ALEN);
11123 + entry->seq_num[tid] = seq;
11124 + entry->frag_num[tid] = frag;
11125 + entry->packet_time[tid] = jiffies;
11126 + list_add(&entry->list, &ieee->ibss_mac_hash[index]);
11127 + return 0;
11128 + }
11129 + last_seq = &entry->seq_num[tid];
11130 + last_frag = &entry->frag_num[tid];
11131 + last_time = &entry->packet_time[tid];
11132 + break;
11133 + }
11134 +
11135 + case IW_MODE_INFRA:
11136 + last_seq = &ieee->last_rxseq_num[tid];
11137 + last_frag = &ieee->last_rxfrag_num[tid];
11138 + last_time = &ieee->last_packet_time[tid];
11139 +
11140 + break;
11141 + default:
11142 + return 0;
11143 + }
11144 +
11145 +// if(tid != 0) {
11146 +// printk(KERN_WARNING ":)))))))))))%x %x %x, fc(%x)\n", tid, *last_seq, seq, header->frame_ctl);
11147 +// }
11148 + if ((*last_seq == seq) &&
11149 + time_after(*last_time + IEEE_PACKET_RETRY_TIME, jiffies)) {
11150 + if (*last_frag == frag){
11151 + //printk(KERN_WARNING "[1] go drop!\n");
11152 + goto drop;
11153 +
11154 + }
11155 + if (*last_frag + 1 != frag)
11156 + /* out-of-order fragment */
11157 + //printk(KERN_WARNING "[2] go drop!\n");
11158 + goto drop;
11159 + } else
11160 + *last_seq = seq;
11161 +
11162 + *last_frag = frag;
11163 + *last_time = jiffies;
11164 + return 0;
11165 +
11166 +drop:
11167 +// BUG_ON(!(fc & IEEE80211_FCTL_RETRY));
11168 +// printk("DUP\n");
11169 +
11170 + return 1;
11171 +}
11172 +bool
11173 +AddReorderEntry(
11174 + PRX_TS_RECORD pTS,
11175 + PRX_REORDER_ENTRY pReorderEntry
11176 + )
11177 +{
11178 + struct list_head *pList = &pTS->RxPendingPktList;
11179 +#if 1
11180 + while(pList->next != &pTS->RxPendingPktList)
11181 + {
11182 + if( SN_LESS(pReorderEntry->SeqNum, ((PRX_REORDER_ENTRY)list_entry(pList->next,RX_REORDER_ENTRY,List))->SeqNum) )
11183 + {
11184 + pList = pList->next;
11185 + }
11186 + else if( SN_EQUAL(pReorderEntry->SeqNum, ((PRX_REORDER_ENTRY)list_entry(pList->next,RX_REORDER_ENTRY,List))->SeqNum) )
11187 + {
11188 + return false;
11189 + }
11190 + else
11191 + {
11192 + break;
11193 + }
11194 + }
11195 +#endif
11196 + pReorderEntry->List.next = pList->next;
11197 + pReorderEntry->List.next->prev = &pReorderEntry->List;
11198 + pReorderEntry->List.prev = pList;
11199 + pList->next = &pReorderEntry->List;
11200 +
11201 + return true;
11202 +}
11203 +
11204 +void ieee80211_indicate_packets(struct ieee80211_device *ieee, struct ieee80211_rxb** prxbIndicateArray,u8 index)
11205 +{
11206 + u8 i = 0 , j=0;
11207 + u16 ethertype;
11208 +// if(index > 1)
11209 +// IEEE80211_DEBUG(IEEE80211_DL_REORDER,"%s(): hahahahhhh, We indicate packet from reorder list, index is %u\n",__FUNCTION__,index);
11210 + for(j = 0; j<index; j++)
11211 + {
11212 +//added by amy for reorder
11213 + struct ieee80211_rxb* prxb = prxbIndicateArray[j];
11214 + for(i = 0; i<prxb->nr_subframes; i++) {
11215 + struct sk_buff *sub_skb = prxb->subframes[i];
11216 +
11217 + /* convert hdr + possible LLC headers into Ethernet header */
11218 + ethertype = (sub_skb->data[6] << 8) | sub_skb->data[7];
11219 + if (sub_skb->len >= 8 &&
11220 + ((memcmp(sub_skb->data, rfc1042_header, SNAP_SIZE) == 0 &&
11221 + ethertype != ETH_P_AARP && ethertype != ETH_P_IPX) ||
11222 + memcmp(sub_skb->data, bridge_tunnel_header, SNAP_SIZE) == 0)) {
11223 + /* remove RFC1042 or Bridge-Tunnel encapsulation and
11224 + * replace EtherType */
11225 + skb_pull(sub_skb, SNAP_SIZE);
11226 + memcpy(skb_push(sub_skb, ETH_ALEN), prxb->src, ETH_ALEN);
11227 + memcpy(skb_push(sub_skb, ETH_ALEN), prxb->dst, ETH_ALEN);
11228 + } else {
11229 + u16 len;
11230 + /* Leave Ethernet header part of hdr and full payload */
11231 + len = htons(sub_skb->len);
11232 + memcpy(skb_push(sub_skb, 2), &len, 2);
11233 + memcpy(skb_push(sub_skb, ETH_ALEN), prxb->src, ETH_ALEN);
11234 + memcpy(skb_push(sub_skb, ETH_ALEN), prxb->dst, ETH_ALEN);
11235 + }
11236 + //stats->rx_packets++;
11237 + //stats->rx_bytes += sub_skb->len;
11238 +
11239 + /* Indicat the packets to upper layer */
11240 + if (sub_skb) {
11241 + //printk("0skb_len(%d)\n", skb->len);
11242 + sub_skb->protocol = eth_type_trans(sub_skb, ieee->dev);
11243 + memset(sub_skb->cb, 0, sizeof(sub_skb->cb));
11244 + sub_skb->dev = ieee->dev;
11245 + sub_skb->ip_summed = CHECKSUM_NONE; /* 802.11 crc not sufficient */
11246 + //skb->ip_summed = CHECKSUM_UNNECESSARY; /* 802.11 crc not sufficient */
11247 + ieee->last_rx_ps_time = jiffies;
11248 + //printk("1skb_len(%d)\n", skb->len);
11249 + netif_rx(sub_skb);
11250 + }
11251 + }
11252 + kfree(prxb);
11253 + prxb = NULL;
11254 + }
11255 +}
11256 +
11257 +
11258 +void RxReorderIndicatePacket( struct ieee80211_device *ieee,
11259 + struct ieee80211_rxb* prxb,
11260 + PRX_TS_RECORD pTS,
11261 + u16 SeqNum)
11262 +{
11263 + PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
11264 + PRX_REORDER_ENTRY pReorderEntry = NULL;
11265 + struct ieee80211_rxb* prxbIndicateArray[REORDER_WIN_SIZE];
11266 + u8 WinSize = pHTInfo->RxReorderWinSize;
11267 + u16 WinEnd = (pTS->RxIndicateSeq + WinSize -1)%4096;
11268 + u8 index = 0;
11269 + bool bMatchWinStart = false, bPktInBuf = false;
11270 + IEEE80211_DEBUG(IEEE80211_DL_REORDER,"%s(): Seq is %d,pTS->RxIndicateSeq is %d, WinSize is %d\n",__FUNCTION__,SeqNum,pTS->RxIndicateSeq,WinSize);
11271 +#if 0
11272 + if(!list_empty(&ieee->RxReorder_Unused_List))
11273 + IEEE80211_DEBUG(IEEE80211_DL_REORDER,"%s(): ieee->RxReorder_Unused_List is nut NULL\n");
11274 +#endif
11275 + /* Rx Reorder initialize condition.*/
11276 + if(pTS->RxIndicateSeq == 0xffff) {
11277 + pTS->RxIndicateSeq = SeqNum;
11278 + }
11279 +
11280 + /* Drop out the packet which SeqNum is smaller than WinStart */
11281 + if(SN_LESS(SeqNum, pTS->RxIndicateSeq)) {
11282 + IEEE80211_DEBUG(IEEE80211_DL_REORDER,"Packet Drop! IndicateSeq: %d, NewSeq: %d\n",
11283 + pTS->RxIndicateSeq, SeqNum);
11284 + pHTInfo->RxReorderDropCounter++;
11285 + {
11286 + int i;
11287 + for(i =0; i < prxb->nr_subframes; i++) {
11288 + dev_kfree_skb(prxb->subframes[i]);
11289 + }
11290 + kfree(prxb);
11291 + prxb = NULL;
11292 + }
11293 + return;
11294 + }
11295 +
11296 + /*
11297 + * Sliding window manipulation. Conditions includes:
11298 + * 1. Incoming SeqNum is equal to WinStart =>Window shift 1
11299 + * 2. Incoming SeqNum is larger than the WinEnd => Window shift N
11300 + */
11301 + if(SN_EQUAL(SeqNum, pTS->RxIndicateSeq)) {
11302 + pTS->RxIndicateSeq = (pTS->RxIndicateSeq + 1) % 4096;
11303 + bMatchWinStart = true;
11304 + } else if(SN_LESS(WinEnd, SeqNum)) {
11305 + if(SeqNum >= (WinSize - 1)) {
11306 + pTS->RxIndicateSeq = SeqNum + 1 -WinSize;
11307 + } else {
11308 + pTS->RxIndicateSeq = 4095 - (WinSize - (SeqNum +1)) + 1;
11309 + }
11310 + IEEE80211_DEBUG(IEEE80211_DL_REORDER, "Window Shift! IndicateSeq: %d, NewSeq: %d\n",pTS->RxIndicateSeq, SeqNum);
11311 + }
11312 +
11313 + /*
11314 + * Indication process.
11315 + * After Packet dropping and Sliding Window shifting as above, we can now just indicate the packets
11316 + * with the SeqNum smaller than latest WinStart and buffer other packets.
11317 + */
11318 + /* For Rx Reorder condition:
11319 + * 1. All packets with SeqNum smaller than WinStart => Indicate
11320 + * 2. All packets with SeqNum larger than or equal to WinStart => Buffer it.
11321 + */
11322 + if(bMatchWinStart) {
11323 + /* Current packet is going to be indicated.*/
11324 + IEEE80211_DEBUG(IEEE80211_DL_REORDER, "Packets indication!! IndicateSeq: %d, NewSeq: %d\n",\
11325 + pTS->RxIndicateSeq, SeqNum);
11326 + prxbIndicateArray[0] = prxb;
11327 +// printk("========================>%s(): SeqNum is %d\n",__FUNCTION__,SeqNum);
11328 + index = 1;
11329 + } else {
11330 + /* Current packet is going to be inserted into pending list.*/
11331 + //IEEE80211_DEBUG(IEEE80211_DL_REORDER,"%s(): We RX no ordered packed, insert to orderd list\n",__FUNCTION__);
11332 + if(!list_empty(&ieee->RxReorder_Unused_List)) {
11333 + pReorderEntry = (PRX_REORDER_ENTRY)list_entry(ieee->RxReorder_Unused_List.next,RX_REORDER_ENTRY,List);
11334 + list_del_init(&pReorderEntry->List);
11335 +
11336 + /* Make a reorder entry and insert into a the packet list.*/
11337 + pReorderEntry->SeqNum = SeqNum;
11338 + pReorderEntry->prxb = prxb;
11339 + // IEEE80211_DEBUG(IEEE80211_DL_REORDER,"%s(): pREorderEntry->SeqNum is %d\n",__FUNCTION__,pReorderEntry->SeqNum);
11340 +
11341 +#if 1
11342 + if(!AddReorderEntry(pTS, pReorderEntry)) {
11343 + IEEE80211_DEBUG(IEEE80211_DL_REORDER, "%s(): Duplicate packet is dropped!! IndicateSeq: %d, NewSeq: %d\n",
11344 + __FUNCTION__, pTS->RxIndicateSeq, SeqNum);
11345 + list_add_tail(&pReorderEntry->List,&ieee->RxReorder_Unused_List);
11346 + {
11347 + int i;
11348 + for(i =0; i < prxb->nr_subframes; i++) {
11349 + dev_kfree_skb(prxb->subframes[i]);
11350 + }
11351 + kfree(prxb);
11352 + prxb = NULL;
11353 + }
11354 + } else {
11355 + IEEE80211_DEBUG(IEEE80211_DL_REORDER,
11356 + "Pkt insert into buffer!! IndicateSeq: %d, NewSeq: %d\n",pTS->RxIndicateSeq, SeqNum);
11357 + }
11358 +#endif
11359 + }
11360 + else {
11361 + /*
11362 + * Packets are dropped if there is not enough reorder entries.
11363 + * This part shall be modified!! We can just indicate all the
11364 + * packets in buffer and get reorder entries.
11365 + */
11366 + IEEE80211_DEBUG(IEEE80211_DL_ERR, "RxReorderIndicatePacket(): There is no reorder entry!! Packet is dropped!!\n");
11367 + {
11368 + int i;
11369 + for(i =0; i < prxb->nr_subframes; i++) {
11370 + dev_kfree_skb(prxb->subframes[i]);
11371 + }
11372 + kfree(prxb);
11373 + prxb = NULL;
11374 + }
11375 + }
11376 + }
11377 +
11378 + /* Check if there is any packet need indicate.*/
11379 + while(!list_empty(&pTS->RxPendingPktList)) {
11380 + IEEE80211_DEBUG(IEEE80211_DL_REORDER,"%s(): start RREORDER indicate\n",__FUNCTION__);
11381 +#if 1
11382 + pReorderEntry = (PRX_REORDER_ENTRY)list_entry(pTS->RxPendingPktList.prev,RX_REORDER_ENTRY,List);
11383 + if( SN_LESS(pReorderEntry->SeqNum, pTS->RxIndicateSeq) ||
11384 + SN_EQUAL(pReorderEntry->SeqNum, pTS->RxIndicateSeq))
11385 + {
11386 + /* This protect buffer from overflow. */
11387 + if(index >= REORDER_WIN_SIZE) {
11388 + IEEE80211_DEBUG(IEEE80211_DL_ERR, "RxReorderIndicatePacket(): Buffer overflow!! \n");
11389 + bPktInBuf = true;
11390 + break;
11391 + }
11392 +
11393 + list_del_init(&pReorderEntry->List);
11394 +
11395 + if(SN_EQUAL(pReorderEntry->SeqNum, pTS->RxIndicateSeq))
11396 + pTS->RxIndicateSeq = (pTS->RxIndicateSeq + 1) % 4096;
11397 +
11398 + IEEE80211_DEBUG(IEEE80211_DL_REORDER,"Packets indication!! IndicateSeq: %d, NewSeq: %d\n",pTS->RxIndicateSeq, SeqNum);
11399 + prxbIndicateArray[index] = pReorderEntry->prxb;
11400 + // printk("========================>%s(): pReorderEntry->SeqNum is %d\n",__FUNCTION__,pReorderEntry->SeqNum);
11401 + index++;
11402 +
11403 + list_add_tail(&pReorderEntry->List,&ieee->RxReorder_Unused_List);
11404 + } else {
11405 + bPktInBuf = true;
11406 + break;
11407 + }
11408 +#endif
11409 + }
11410 +
11411 + /* Handling pending timer. Set this timer to prevent from long time Rx buffering.*/
11412 + if(index>0) {
11413 + // Cancel previous pending timer.
11414 + if (timer_pending(&pTS->RxPktPendingTimer))
11415 + del_timer_sync(&pTS->RxPktPendingTimer);
11416 + pTS->RxTimeoutIndicateSeq = 0xffff;
11417 +
11418 + // Indicate packets
11419 + if(index>REORDER_WIN_SIZE){
11420 + IEEE80211_DEBUG(IEEE80211_DL_ERR, "RxReorderIndicatePacket(): Rx Reorer buffer full!! \n");
11421 + return;
11422 + }
11423 + ieee80211_indicate_packets(ieee, prxbIndicateArray, index);
11424 + bPktInBuf = false;
11425 + }
11426 +
11427 +#if 1
11428 + if(bPktInBuf && pTS->RxTimeoutIndicateSeq==0xffff) {
11429 + // Set new pending timer.
11430 + IEEE80211_DEBUG(IEEE80211_DL_REORDER,"%s(): SET rx timeout timer\n", __FUNCTION__);
11431 + pTS->RxTimeoutIndicateSeq = pTS->RxIndicateSeq;
11432 +#if 0
11433 + if(timer_pending(&pTS->RxPktPendingTimer))
11434 + del_timer_sync(&pTS->RxPktPendingTimer);
11435 + pTS->RxPktPendingTimer.expires = jiffies + MSECS(pHTInfo->RxReorderPendingTime);
11436 + add_timer(&pTS->RxPktPendingTimer);
11437 +#else
11438 + mod_timer(&pTS->RxPktPendingTimer, jiffies + MSECS(pHTInfo->RxReorderPendingTime));
11439 +#endif
11440 + }
11441 +#endif
11442 +}
11443 +
11444 +u8 parse_subframe(struct sk_buff *skb,
11445 + struct ieee80211_rx_stats *rx_stats,
11446 + struct ieee80211_rxb *rxb,u8* src,u8* dst)
11447 +{
11448 + struct ieee80211_hdr_3addr *hdr = (struct ieee80211_hdr_3addr* )skb->data;
11449 + u16 fc = le16_to_cpu(hdr->frame_ctl);
11450 +
11451 + u16 LLCOffset= sizeof(struct ieee80211_hdr_3addr);
11452 + u16 ChkLength;
11453 + bool bIsAggregateFrame = false;
11454 + u16 nSubframe_Length;
11455 + u8 nPadding_Length = 0;
11456 + u16 SeqNum=0;
11457 +
11458 + struct sk_buff *sub_skb;
11459 + u8 *data_ptr;
11460 + /* just for debug purpose */
11461 + SeqNum = WLAN_GET_SEQ_SEQ(le16_to_cpu(hdr->seq_ctl));
11462 +
11463 + if((IEEE80211_QOS_HAS_SEQ(fc))&&\
11464 + (((frameqos *)(skb->data + IEEE80211_3ADDR_LEN))->field.reserved)) {
11465 + bIsAggregateFrame = true;
11466 + }
11467 +
11468 + if(IEEE80211_QOS_HAS_SEQ(fc)) {
11469 + LLCOffset += 2;
11470 + }
11471 +
11472 + if(rx_stats->bContainHTC) {
11473 + LLCOffset += sHTCLng;
11474 + }
11475 + //printk("ChkLength = %d\n", LLCOffset);
11476 + // Null packet, don't indicate it to upper layer
11477 + ChkLength = LLCOffset;/* + (Frame_WEP(frame)!=0 ?Adapter->MgntInfo.SecurityInfo.EncryptionHeadOverhead:0);*/
11478 +
11479 + if( skb->len <= ChkLength ) {
11480 + return 0;
11481 + }
11482 +
11483 + skb_pull(skb, LLCOffset);
11484 +
11485 + if(!bIsAggregateFrame) {
11486 + rxb->nr_subframes = 1;
11487 +#ifdef JOHN_NOCPY
11488 + rxb->subframes[0] = skb;
11489 +#else
11490 + rxb->subframes[0] = skb_copy(skb, GFP_ATOMIC);
11491 +#endif
11492 +
11493 + memcpy(rxb->src,src,ETH_ALEN);
11494 + memcpy(rxb->dst,dst,ETH_ALEN);
11495 + //IEEE80211_DEBUG_DATA(IEEE80211_DL_RX,skb->data,skb->len);
11496 + return 1;
11497 + } else {
11498 + rxb->nr_subframes = 0;
11499 + memcpy(rxb->src,src,ETH_ALEN);
11500 + memcpy(rxb->dst,dst,ETH_ALEN);
11501 + while(skb->len > ETHERNET_HEADER_SIZE) {
11502 + /* Offset 12 denote 2 mac address */
11503 + nSubframe_Length = *((u16*)(skb->data + 12));
11504 + //==m==>change the length order
11505 + nSubframe_Length = (nSubframe_Length>>8) + (nSubframe_Length<<8);
11506 +
11507 + if(skb->len<(ETHERNET_HEADER_SIZE + nSubframe_Length)) {
11508 +#if 0//cosa
11509 + RT_ASSERT(
11510 + (nRemain_Length>=(ETHERNET_HEADER_SIZE + nSubframe_Length)),
11511 + ("ParseSubframe(): A-MSDU subframe parse error!! Subframe Length: %d\n", nSubframe_Length) );
11512 +#endif
11513 + printk("%s: A-MSDU parse error!! pRfd->nTotalSubframe : %d\n",\
11514 + __FUNCTION__,rxb->nr_subframes);
11515 + printk("%s: A-MSDU parse error!! Subframe Length: %d\n",__FUNCTION__, nSubframe_Length);
11516 + printk("nRemain_Length is %d and nSubframe_Length is : %d\n",skb->len,nSubframe_Length);
11517 + printk("The Packet SeqNum is %d\n",SeqNum);
11518 + return 0;
11519 + }
11520 +
11521 + /* move the data point to data content */
11522 + skb_pull(skb, ETHERNET_HEADER_SIZE);
11523 +
11524 +#ifdef JOHN_NOCPY
11525 + sub_skb = skb_clone(skb, GFP_ATOMIC);
11526 + sub_skb->len = nSubframe_Length;
11527 + sub_skb->tail = sub_skb->data + nSubframe_Length;
11528 +#else
11529 + /* Allocate new skb for releasing to upper layer */
11530 + sub_skb = dev_alloc_skb(nSubframe_Length + 12);
11531 + skb_reserve(sub_skb, 12);
11532 + data_ptr = (u8 *)skb_put(sub_skb, nSubframe_Length);
11533 + memcpy(data_ptr,skb->data,nSubframe_Length);
11534 +#endif
11535 + rxb->subframes[rxb->nr_subframes++] = sub_skb;
11536 + if(rxb->nr_subframes >= MAX_SUBFRAME_COUNT) {
11537 + IEEE80211_DEBUG_RX("ParseSubframe(): Too many Subframes! Packets dropped!\n");
11538 + break;
11539 + }
11540 + skb_pull(skb,nSubframe_Length);
11541 +
11542 + if(skb->len != 0) {
11543 + nPadding_Length = 4 - ((nSubframe_Length + ETHERNET_HEADER_SIZE) % 4);
11544 + if(nPadding_Length == 4) {
11545 + nPadding_Length = 0;
11546 + }
11547 +
11548 + if(skb->len < nPadding_Length) {
11549 + return 0;
11550 + }
11551 +
11552 + skb_pull(skb,nPadding_Length);
11553 + }
11554 + }
11555 +#ifdef JOHN_NOCPY
11556 + dev_kfree_skb(skb);
11557 +#endif
11558 + //{just for debug added by david
11559 + //printk("AMSDU::rxb->nr_subframes = %d\n",rxb->nr_subframes);
11560 + //}
11561 + return rxb->nr_subframes;
11562 + }
11563 +}
11564 +
11565 +/* All received frames are sent to this function. @skb contains the frame in
11566 + * IEEE 802.11 format, i.e., in the format it was sent over air.
11567 + * This function is called only as a tasklet (software IRQ). */
11568 +int ieee80211_rx(struct ieee80211_device *ieee, struct sk_buff *skb,
11569 + struct ieee80211_rx_stats *rx_stats)
11570 +{
11571 + struct net_device *dev = ieee->dev;
11572 + struct ieee80211_hdr_4addr *hdr;
11573 + //struct ieee80211_hdr_3addrqos *hdr;
11574 +
11575 + size_t hdrlen;
11576 + u16 fc, type, stype, sc;
11577 + struct net_device_stats *stats;
11578 + unsigned int frag;
11579 + u8 *payload;
11580 + u16 ethertype;
11581 + //added by amy for reorder
11582 + u8 TID = 0;
11583 + u16 SeqNum = 0;
11584 + PRX_TS_RECORD pTS = NULL;
11585 + //bool bIsAggregateFrame = false;
11586 + //added by amy for reorder
11587 +#ifdef NOT_YET
11588 + struct net_device *wds = NULL;
11589 + struct sk_buff *skb2 = NULL;
11590 + struct net_device *wds = NULL;
11591 + int frame_authorized = 0;
11592 + int from_assoc_ap = 0;
11593 + void *sta = NULL;
11594 +#endif
11595 +// u16 qos_ctl = 0;
11596 + u8 dst[ETH_ALEN];
11597 + u8 src[ETH_ALEN];
11598 + u8 bssid[ETH_ALEN];
11599 + struct ieee80211_crypt_data *crypt = NULL;
11600 + int keyidx = 0;
11601 +
11602 + int i;
11603 + struct ieee80211_rxb* rxb = NULL;
11604 + // cheat the the hdr type
11605 + hdr = (struct ieee80211_hdr_4addr *)skb->data;
11606 + stats = &ieee->stats;
11607 +
11608 + if (skb->len < 10) {
11609 + printk(KERN_INFO "%s: SKB length < 10\n",
11610 + dev->name);
11611 + goto rx_dropped;
11612 + }
11613 +
11614 + fc = le16_to_cpu(hdr->frame_ctl);
11615 + type = WLAN_FC_GET_TYPE(fc);
11616 + stype = WLAN_FC_GET_STYPE(fc);
11617 + sc = le16_to_cpu(hdr->seq_ctl);
11618 +
11619 + frag = WLAN_GET_SEQ_FRAG(sc);
11620 + hdrlen = ieee80211_get_hdrlen(fc);
11621 +
11622 + if(HTCCheck(ieee, skb->data))
11623 + {
11624 + if(net_ratelimit())
11625 + printk("find HTCControl\n");
11626 + hdrlen += 4;
11627 + rx_stats->bContainHTC = 1;
11628 + }
11629 +
11630 + //IEEE80211_DEBUG_DATA(IEEE80211_DL_DATA, skb->data, skb->len);
11631 +#ifdef NOT_YET
11632 +#if WIRELESS_EXT > 15
11633 + /* Put this code here so that we avoid duplicating it in all
11634 + * Rx paths. - Jean II */
11635 +#ifdef IW_WIRELESS_SPY /* defined in iw_handler.h */
11636 + /* If spy monitoring on */
11637 + if (iface->spy_data.spy_number > 0) {
11638 + struct iw_quality wstats;
11639 + wstats.level = rx_stats->rssi;
11640 + wstats.noise = rx_stats->noise;
11641 + wstats.updated = 6; /* No qual value */
11642 + /* Update spy records */
11643 + wireless_spy_update(dev, hdr->addr2, &wstats);
11644 + }
11645 +#endif /* IW_WIRELESS_SPY */
11646 +#endif /* WIRELESS_EXT > 15 */
11647 + hostap_update_rx_stats(local->ap, hdr, rx_stats);
11648 +#endif
11649 +
11650 +#if WIRELESS_EXT > 15
11651 + if (ieee->iw_mode == IW_MODE_MONITOR) {
11652 + ieee80211_monitor_rx(ieee, skb, rx_stats);
11653 + stats->rx_packets++;
11654 + stats->rx_bytes += skb->len;
11655 + return 1;
11656 + }
11657 +#endif
11658 + if (ieee->host_decrypt) {
11659 + int idx = 0;
11660 + if (skb->len >= hdrlen + 3)
11661 + idx = skb->data[hdrlen + 3] >> 6;
11662 + crypt = ieee->crypt[idx];
11663 +#ifdef NOT_YET
11664 + sta = NULL;
11665 +
11666 + /* Use station specific key to override default keys if the
11667 + * receiver address is a unicast address ("individual RA"). If
11668 + * bcrx_sta_key parameter is set, station specific key is used
11669 + * even with broad/multicast targets (this is against IEEE
11670 + * 802.11, but makes it easier to use different keys with
11671 + * stations that do not support WEP key mapping). */
11672 +
11673 + if (!(hdr->addr1[0] & 0x01) || local->bcrx_sta_key)
11674 + (void) hostap_handle_sta_crypto(local, hdr, &crypt,
11675 + &sta);
11676 +#endif
11677 +
11678 + /* allow NULL decrypt to indicate an station specific override
11679 + * for default encryption */
11680 + if (crypt && (crypt->ops == NULL ||
11681 + crypt->ops->decrypt_mpdu == NULL))
11682 + crypt = NULL;
11683 +
11684 + if (!crypt && (fc & IEEE80211_FCTL_WEP)) {
11685 + /* This seems to be triggered by some (multicast?)
11686 + * frames from other than current BSS, so just drop the
11687 + * frames silently instead of filling system log with
11688 + * these reports. */
11689 + IEEE80211_DEBUG_DROP("Decryption failed (not set)"
11690 + " (SA=" MAC_FMT ")\n",
11691 + MAC_ARG(hdr->addr2));
11692 + ieee->ieee_stats.rx_discards_undecryptable++;
11693 + goto rx_dropped;
11694 + }
11695 + }
11696 +
11697 + if (skb->len < IEEE80211_DATA_HDR3_LEN)
11698 + goto rx_dropped;
11699 +
11700 + // if QoS enabled, should check the sequence for each of the AC
11701 + if( (ieee->pHTInfo->bCurRxReorderEnable == false) || !ieee->current_network.qos_data.active|| !IsDataFrame(skb->data) || IsLegacyDataFrame(skb->data)){
11702 + if (is_duplicate_packet(ieee, hdr))
11703 + goto rx_dropped;
11704 +
11705 + }
11706 + else
11707 + {
11708 + PRX_TS_RECORD pRxTS = NULL;
11709 + #if 0
11710 + struct ieee80211_hdr_3addr *hdr;
11711 + u16 fc;
11712 + hdr = (struct ieee80211_hdr_3addr *)skb->data;
11713 + fc = le16_to_cpu(hdr->frame_ctl);
11714 + u8 tmp = (fc & IEEE80211_FCTL_FROMDS) && (fc & IEEE80211_FCTL_TODS);
11715 +
11716 + u8 tid = (*((u8*)skb->data + (((fc& IEEE80211_FCTL_FROMDS) && (fc & IEEE80211_FCTL_TODS))?30:24)))&0xf;
11717 + printk("====================>fc:%x, tid:%d, tmp:%d\n", fc, tid, tmp);
11718 + //u8 tid = (u8)((frameqos*)(buf + ((fc & IEEE80211_FCTL_TODS)&&(fc & IEEE80211_FCTL_FROMDS))? 30 : 24))->field.tid;
11719 + #endif
11720 + //IEEE80211_DEBUG(IEEE80211_DL_REORDER,"%s(): QOS ENABLE AND RECEIVE QOS DATA , we will get Ts, tid:%d\n",__FUNCTION__, tid);
11721 +#if 1
11722 + if(GetTs(
11723 + ieee,
11724 + (PTS_COMMON_INFO*) &pRxTS,
11725 + hdr->addr2,
11726 + (u8)Frame_QoSTID((u8*)(skb->data)),
11727 + RX_DIR,
11728 + true))
11729 + {
11730 +
11731 + // IEEE80211_DEBUG(IEEE80211_DL_REORDER,"%s(): pRxTS->RxLastFragNum is %d,frag is %d,pRxTS->RxLastSeqNum is %d,seq is %d\n",__FUNCTION__,pRxTS->RxLastFragNum,frag,pRxTS->RxLastSeqNum,WLAN_GET_SEQ_SEQ(sc));
11732 + if( (fc & (1<<11)) &&
11733 + (frag == pRxTS->RxLastFragNum) &&
11734 + (WLAN_GET_SEQ_SEQ(sc) == pRxTS->RxLastSeqNum) )
11735 + {
11736 + goto rx_dropped;
11737 + }
11738 + else
11739 + {
11740 + pRxTS->RxLastFragNum = frag;
11741 + pRxTS->RxLastSeqNum = WLAN_GET_SEQ_SEQ(sc);
11742 + }
11743 + }
11744 + else
11745 + {
11746 + IEEE80211_DEBUG(IEEE80211_DL_ERR, "%s(): No TS!! Skip the check!!\n",__FUNCTION__);
11747 + goto rx_dropped;
11748 + }
11749 + }
11750 +#endif
11751 + if (type == IEEE80211_FTYPE_MGMT) {
11752 +
11753 + #if 0
11754 + if ( stype == IEEE80211_STYPE_AUTH &&
11755 + fc & IEEE80211_FCTL_WEP && ieee->host_decrypt &&
11756 + (keyidx = hostap_rx_frame_decrypt(ieee, skb, crypt)) < 0)
11757 + {
11758 + printk(KERN_DEBUG "%s: failed to decrypt mgmt::auth "
11759 + "from " MAC_FMT "\n", dev->name,
11760 + MAC_ARG(hdr->addr2));
11761 + /* TODO: could inform hostapd about this so that it
11762 + * could send auth failure report */
11763 + goto rx_dropped;
11764 + }
11765 + #endif
11766 +
11767 + //IEEE80211_DEBUG_DATA(IEEE80211_DL_DATA, skb->data, skb->len);
11768 + if (ieee80211_rx_frame_mgmt(ieee, skb, rx_stats, type, stype))
11769 + goto rx_dropped;
11770 + else
11771 + goto rx_exit;
11772 + }
11773 +
11774 + /* Data frame - extract src/dst addresses */
11775 + switch (fc & (IEEE80211_FCTL_FROMDS | IEEE80211_FCTL_TODS)) {
11776 + case IEEE80211_FCTL_FROMDS:
11777 + memcpy(dst, hdr->addr1, ETH_ALEN);
11778 + memcpy(src, hdr->addr3, ETH_ALEN);
11779 + memcpy(bssid, hdr->addr2, ETH_ALEN);
11780 + break;
11781 + case IEEE80211_FCTL_TODS:
11782 + memcpy(dst, hdr->addr3, ETH_ALEN);
11783 + memcpy(src, hdr->addr2, ETH_ALEN);
11784 + memcpy(bssid, hdr->addr1, ETH_ALEN);
11785 + break;
11786 + case IEEE80211_FCTL_FROMDS | IEEE80211_FCTL_TODS:
11787 + if (skb->len < IEEE80211_DATA_HDR4_LEN)
11788 + goto rx_dropped;
11789 + memcpy(dst, hdr->addr3, ETH_ALEN);
11790 + memcpy(src, hdr->addr4, ETH_ALEN);
11791 + memcpy(bssid, ieee->current_network.bssid, ETH_ALEN);
11792 + break;
11793 + case 0:
11794 + memcpy(dst, hdr->addr1, ETH_ALEN);
11795 + memcpy(src, hdr->addr2, ETH_ALEN);
11796 + memcpy(bssid, hdr->addr3, ETH_ALEN);
11797 + break;
11798 + }
11799 +
11800 +#ifdef NOT_YET
11801 + if (hostap_rx_frame_wds(ieee, hdr, fc, &wds))
11802 + goto rx_dropped;
11803 + if (wds) {
11804 + skb->dev = dev = wds;
11805 + stats = hostap_get_stats(dev);
11806 + }
11807 +
11808 + if (ieee->iw_mode == IW_MODE_MASTER && !wds &&
11809 + (fc & (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)) == IEEE80211_FCTL_FROMDS &&
11810 + ieee->stadev &&
11811 + memcmp(hdr->addr2, ieee->assoc_ap_addr, ETH_ALEN) == 0) {
11812 + /* Frame from BSSID of the AP for which we are a client */
11813 + skb->dev = dev = ieee->stadev;
11814 + stats = hostap_get_stats(dev);
11815 + from_assoc_ap = 1;
11816 + }
11817 +#endif
11818 +
11819 + dev->last_rx = jiffies;
11820 +
11821 +#ifdef NOT_YET
11822 + if ((ieee->iw_mode == IW_MODE_MASTER ||
11823 + ieee->iw_mode == IW_MODE_REPEAT) &&
11824 + !from_assoc_ap) {
11825 + switch (hostap_handle_sta_rx(ieee, dev, skb, rx_stats,
11826 + wds != NULL)) {
11827 + case AP_RX_CONTINUE_NOT_AUTHORIZED:
11828 + frame_authorized = 0;
11829 + break;
11830 + case AP_RX_CONTINUE:
11831 + frame_authorized = 1;
11832 + break;
11833 + case AP_RX_DROP:
11834 + goto rx_dropped;
11835 + case AP_RX_EXIT:
11836 + goto rx_exit;
11837 + }
11838 + }
11839 +#endif
11840 + //IEEE80211_DEBUG_DATA(IEEE80211_DL_DATA, skb->data, skb->len);
11841 + /* Nullfunc frames may have PS-bit set, so they must be passed to
11842 + * hostap_handle_sta_rx() before being dropped here. */
11843 + if (stype != IEEE80211_STYPE_DATA &&
11844 + stype != IEEE80211_STYPE_DATA_CFACK &&
11845 + stype != IEEE80211_STYPE_DATA_CFPOLL &&
11846 + stype != IEEE80211_STYPE_DATA_CFACKPOLL&&
11847 + stype != IEEE80211_STYPE_QOS_DATA//add by David,2006.8.4
11848 + ) {
11849 + if (stype != IEEE80211_STYPE_NULLFUNC)
11850 + IEEE80211_DEBUG_DROP(
11851 + "RX: dropped data frame "
11852 + "with no data (type=0x%02x, "
11853 + "subtype=0x%02x, len=%d)\n",
11854 + type, stype, skb->len);
11855 + goto rx_dropped;
11856 + }
11857 + if (memcmp(bssid, ieee->current_network.bssid, ETH_ALEN))
11858 + goto rx_dropped;
11859 +
11860 + /* skb: hdr + (possibly fragmented, possibly encrypted) payload */
11861 +
11862 + if (ieee->host_decrypt && (fc & IEEE80211_FCTL_WEP) &&
11863 + (keyidx = ieee80211_rx_frame_decrypt(ieee, skb, crypt)) < 0)
11864 + {
11865 + printk("decrypt frame error\n");
11866 + goto rx_dropped;
11867 + }
11868 +
11869 +
11870 + hdr = (struct ieee80211_hdr_4addr *) skb->data;
11871 +
11872 + /* skb: hdr + (possibly fragmented) plaintext payload */
11873 + // PR: FIXME: hostap has additional conditions in the "if" below:
11874 + // ieee->host_decrypt && (fc & IEEE80211_FCTL_WEP) &&
11875 + if ((frag != 0 || (fc & IEEE80211_FCTL_MOREFRAGS))) {
11876 + int flen;
11877 + struct sk_buff *frag_skb = ieee80211_frag_cache_get(ieee, hdr);
11878 + IEEE80211_DEBUG_FRAG("Rx Fragment received (%u)\n", frag);
11879 +
11880 + if (!frag_skb) {
11881 + IEEE80211_DEBUG(IEEE80211_DL_RX | IEEE80211_DL_FRAG,
11882 + "Rx cannot get skb from fragment "
11883 + "cache (morefrag=%d seq=%u frag=%u)\n",
11884 + (fc & IEEE80211_FCTL_MOREFRAGS) != 0,
11885 + WLAN_GET_SEQ_SEQ(sc), frag);
11886 + goto rx_dropped;
11887 + }
11888 + flen = skb->len;
11889 + if (frag != 0)
11890 + flen -= hdrlen;
11891 +
11892 + if (frag_skb->tail + flen > frag_skb->end) {
11893 + printk(KERN_WARNING "%s: host decrypted and "
11894 + "reassembled frame did not fit skb\n",
11895 + dev->name);
11896 + ieee80211_frag_cache_invalidate(ieee, hdr);
11897 + goto rx_dropped;
11898 + }
11899 +
11900 + if (frag == 0) {
11901 + /* copy first fragment (including full headers) into
11902 + * beginning of the fragment cache skb */
11903 + memcpy(skb_put(frag_skb, flen), skb->data, flen);
11904 + } else {
11905 + /* append frame payload to the end of the fragment
11906 + * cache skb */
11907 + memcpy(skb_put(frag_skb, flen), skb->data + hdrlen,
11908 + flen);
11909 + }
11910 + dev_kfree_skb_any(skb);
11911 + skb = NULL;
11912 +
11913 + if (fc & IEEE80211_FCTL_MOREFRAGS) {
11914 + /* more fragments expected - leave the skb in fragment
11915 + * cache for now; it will be delivered to upper layers
11916 + * after all fragments have been received */
11917 + goto rx_exit;
11918 + }
11919 +
11920 + /* this was the last fragment and the frame will be
11921 + * delivered, so remove skb from fragment cache */
11922 + skb = frag_skb;
11923 + hdr = (struct ieee80211_hdr_4addr *) skb->data;
11924 + ieee80211_frag_cache_invalidate(ieee, hdr);
11925 + }
11926 +
11927 + /* skb: hdr + (possible reassembled) full MSDU payload; possibly still
11928 + * encrypted/authenticated */
11929 + if (ieee->host_decrypt && (fc & IEEE80211_FCTL_WEP) &&
11930 + ieee80211_rx_frame_decrypt_msdu(ieee, skb, keyidx, crypt))
11931 + {
11932 + printk("==>decrypt msdu error\n");
11933 + goto rx_dropped;
11934 + }
11935 +
11936 + //added by amy for AP roaming
11937 + ieee->LinkDetectInfo.NumRecvDataInPeriod++;
11938 + ieee->LinkDetectInfo.NumRxOkInPeriod++;
11939 +
11940 + hdr = (struct ieee80211_hdr_4addr *) skb->data;
11941 + if (crypt && !(fc & IEEE80211_FCTL_WEP) && !ieee->open_wep) {
11942 + if (/*ieee->ieee802_1x &&*/
11943 + ieee80211_is_eapol_frame(ieee, skb, hdrlen)) {
11944 +
11945 +#ifdef CONFIG_IEEE80211_DEBUG
11946 + /* pass unencrypted EAPOL frames even if encryption is
11947 + * configured */
11948 + struct eapol *eap = (struct eapol *)(skb->data +
11949 + 24);
11950 + IEEE80211_DEBUG_EAP("RX: IEEE 802.1X EAPOL frame: %s\n",
11951 + eap_get_type(eap->type));
11952 +#endif
11953 + } else {
11954 + IEEE80211_DEBUG_DROP(
11955 + "encryption configured, but RX "
11956 + "frame not encrypted (SA=" MAC_FMT ")\n",
11957 + MAC_ARG(hdr->addr2));
11958 + goto rx_dropped;
11959 + }
11960 + }
11961 +
11962 +#ifdef CONFIG_IEEE80211_DEBUG
11963 + if (crypt && !(fc & IEEE80211_FCTL_WEP) &&
11964 + ieee80211_is_eapol_frame(ieee, skb, hdrlen)) {
11965 + struct eapol *eap = (struct eapol *)(skb->data +
11966 + 24);
11967 + IEEE80211_DEBUG_EAP("RX: IEEE 802.1X EAPOL frame: %s\n",
11968 + eap_get_type(eap->type));
11969 + }
11970 +#endif
11971 +
11972 + if (crypt && !(fc & IEEE80211_FCTL_WEP) && !ieee->open_wep &&
11973 + !ieee80211_is_eapol_frame(ieee, skb, hdrlen)) {
11974 + IEEE80211_DEBUG_DROP(
11975 + "dropped unencrypted RX data "
11976 + "frame from " MAC_FMT
11977 + " (drop_unencrypted=1)\n",
11978 + MAC_ARG(hdr->addr2));
11979 + goto rx_dropped;
11980 + }
11981 +/*
11982 + if(ieee80211_is_eapol_frame(ieee, skb, hdrlen)) {
11983 + printk(KERN_WARNING "RX: IEEE802.1X EPAOL frame!\n");
11984 + }
11985 +*/
11986 +//added by amy for reorder
11987 +#if 1
11988 + if(ieee->current_network.qos_data.active && IsQoSDataFrame(skb->data)
11989 + && !is_multicast_ether_addr(hdr->addr1) && !is_broadcast_ether_addr(hdr->addr1))
11990 + {
11991 + TID = Frame_QoSTID(skb->data);
11992 + SeqNum = WLAN_GET_SEQ_SEQ(sc);
11993 + GetTs(ieee,(PTS_COMMON_INFO*) &pTS,hdr->addr2,TID,RX_DIR,true);
11994 + if(TID !=0 && TID !=3)
11995 + {
11996 + ieee->bis_any_nonbepkts = true;
11997 + }
11998 + }
11999 +#endif
12000 +//added by amy for reorder
12001 + /* skb: hdr + (possible reassembled) full plaintext payload */
12002 + payload = skb->data + hdrlen;
12003 + //ethertype = (payload[6] << 8) | payload[7];
12004 + rxb = (struct ieee80211_rxb*)kmalloc(sizeof(struct ieee80211_rxb),GFP_ATOMIC);
12005 + if(rxb == NULL)
12006 + {
12007 + IEEE80211_DEBUG(IEEE80211_DL_ERR,"%s(): kmalloc rxb error\n",__FUNCTION__);
12008 + goto rx_dropped;
12009 + }
12010 + /* to parse amsdu packets */
12011 + /* qos data packets & reserved bit is 1 */
12012 + if(parse_subframe(skb,rx_stats,rxb,src,dst) == 0) {
12013 + /* only to free rxb, and not submit the packets to upper layer */
12014 + for(i =0; i < rxb->nr_subframes; i++) {
12015 + dev_kfree_skb(rxb->subframes[i]);
12016 + }
12017 + kfree(rxb);
12018 + rxb = NULL;
12019 + goto rx_dropped;
12020 + }
12021 +
12022 + ieee->last_rx_ps_time = jiffies;
12023 +//added by amy for reorder
12024 + if(ieee->pHTInfo->bCurRxReorderEnable == false ||pTS == NULL){
12025 +//added by amy for reorder
12026 + for(i = 0; i<rxb->nr_subframes; i++) {
12027 + struct sk_buff *sub_skb = rxb->subframes[i];
12028 +
12029 + if (sub_skb) {
12030 + /* convert hdr + possible LLC headers into Ethernet header */
12031 + ethertype = (sub_skb->data[6] << 8) | sub_skb->data[7];
12032 + if (sub_skb->len >= 8 &&
12033 + ((memcmp(sub_skb->data, rfc1042_header, SNAP_SIZE) == 0 &&
12034 + ethertype != ETH_P_AARP && ethertype != ETH_P_IPX) ||
12035 + memcmp(sub_skb->data, bridge_tunnel_header, SNAP_SIZE) == 0)) {
12036 + /* remove RFC1042 or Bridge-Tunnel encapsulation and
12037 + * replace EtherType */
12038 + skb_pull(sub_skb, SNAP_SIZE);
12039 + memcpy(skb_push(sub_skb, ETH_ALEN), src, ETH_ALEN);
12040 + memcpy(skb_push(sub_skb, ETH_ALEN), dst, ETH_ALEN);
12041 + } else {
12042 + u16 len;
12043 + /* Leave Ethernet header part of hdr and full payload */
12044 + len = htons(sub_skb->len);
12045 + memcpy(skb_push(sub_skb, 2), &len, 2);
12046 + memcpy(skb_push(sub_skb, ETH_ALEN), src, ETH_ALEN);
12047 + memcpy(skb_push(sub_skb, ETH_ALEN), dst, ETH_ALEN);
12048 + }
12049 +
12050 + stats->rx_packets++;
12051 + stats->rx_bytes += sub_skb->len;
12052 + if(is_multicast_ether_addr(dst)) {
12053 + stats->multicast++;
12054 + }
12055 +
12056 + /* Indicat the packets to upper layer */
12057 + //printk("0skb_len(%d)\n", skb->len);
12058 + sub_skb->protocol = eth_type_trans(sub_skb, dev);
12059 + memset(sub_skb->cb, 0, sizeof(sub_skb->cb));
12060 + sub_skb->dev = dev;
12061 + sub_skb->ip_summed = CHECKSUM_NONE; /* 802.11 crc not sufficient */
12062 + //skb->ip_summed = CHECKSUM_UNNECESSARY; /* 802.11 crc not sufficient */
12063 + //printk("1skb_len(%d)\n", skb->len);
12064 + netif_rx(sub_skb);
12065 + }
12066 + }
12067 + kfree(rxb);
12068 + rxb = NULL;
12069 +
12070 + }
12071 + else
12072 + {
12073 + IEEE80211_DEBUG(IEEE80211_DL_REORDER,"%s(): REORDER ENABLE AND PTS not NULL, and we will enter RxReorderIndicatePacket()\n",__FUNCTION__);
12074 + RxReorderIndicatePacket(ieee, rxb, pTS, SeqNum);
12075 + }
12076 +#ifndef JOHN_NOCPY
12077 + dev_kfree_skb(skb);
12078 +#endif
12079 +
12080 + rx_exit:
12081 +#ifdef NOT_YET
12082 + if (sta)
12083 + hostap_handle_sta_release(sta);
12084 +#endif
12085 + return 1;
12086 +
12087 + rx_dropped:
12088 + if (rxb != NULL)
12089 + {
12090 + kfree(rxb);
12091 + rxb = NULL;
12092 + }
12093 + stats->rx_dropped++;
12094 +
12095 + /* Returning 0 indicates to caller that we have not handled the SKB--
12096 + * so it is still allocated and can be used again by underlying
12097 + * hardware as a DMA target */
12098 + return 0;
12099 +}
12100 +
12101 +#define MGMT_FRAME_FIXED_PART_LENGTH 0x24
12102 +
12103 +static u8 qos_oui[QOS_OUI_LEN] = { 0x00, 0x50, 0xF2 };
12104 +
12105 +/*
12106 +* Make ther structure we read from the beacon packet has
12107 +* the right values
12108 +*/
12109 +static int ieee80211_verify_qos_info(struct ieee80211_qos_information_element
12110 + *info_element, int sub_type)
12111 +{
12112 +
12113 + if (info_element->qui_subtype != sub_type)
12114 + return -1;
12115 + if (memcmp(info_element->qui, qos_oui, QOS_OUI_LEN))
12116 + return -1;
12117 + if (info_element->qui_type != QOS_OUI_TYPE)
12118 + return -1;
12119 + if (info_element->version != QOS_VERSION_1)
12120 + return -1;
12121 +
12122 + return 0;
12123 +}
12124 +
12125 +
12126 +/*
12127 + * Parse a QoS parameter element
12128 + */
12129 +static int ieee80211_read_qos_param_element(struct ieee80211_qos_parameter_info
12130 + *element_param, struct ieee80211_info_element
12131 + *info_element)
12132 +{
12133 + int ret = 0;
12134 + u16 size = sizeof(struct ieee80211_qos_parameter_info) - 2;
12135 +
12136 + if ((info_element == NULL) || (element_param == NULL))
12137 + return -1;
12138 +
12139 + if (info_element->id == QOS_ELEMENT_ID && info_element->len == size) {
12140 + memcpy(element_param->info_element.qui, info_element->data,
12141 + info_element->len);
12142 + element_param->info_element.elementID = info_element->id;
12143 + element_param->info_element.length = info_element->len;
12144 + } else
12145 + ret = -1;
12146 + if (ret == 0)
12147 + ret = ieee80211_verify_qos_info(&element_param->info_element,
12148 + QOS_OUI_PARAM_SUB_TYPE);
12149 + return ret;
12150 +}
12151 +
12152 +/*
12153 + * Parse a QoS information element
12154 + */
12155 +static int ieee80211_read_qos_info_element(struct
12156 + ieee80211_qos_information_element
12157 + *element_info, struct ieee80211_info_element
12158 + *info_element)
12159 +{
12160 + int ret = 0;
12161 + u16 size = sizeof(struct ieee80211_qos_information_element) - 2;
12162 +
12163 + if (element_info == NULL)
12164 + return -1;
12165 + if (info_element == NULL)
12166 + return -1;
12167 +
12168 + if ((info_element->id == QOS_ELEMENT_ID) && (info_element->len == size)) {
12169 + memcpy(element_info->qui, info_element->data,
12170 + info_element->len);
12171 + element_info->elementID = info_element->id;
12172 + element_info->length = info_element->len;
12173 + } else
12174 + ret = -1;
12175 +
12176 + if (ret == 0)
12177 + ret = ieee80211_verify_qos_info(element_info,
12178 + QOS_OUI_INFO_SUB_TYPE);
12179 + return ret;
12180 +}
12181 +
12182 +
12183 +/*
12184 + * Write QoS parameters from the ac parameters.
12185 + */
12186 +static int ieee80211_qos_convert_ac_to_parameters(struct
12187 + ieee80211_qos_parameter_info
12188 + *param_elm, struct
12189 + ieee80211_qos_parameters
12190 + *qos_param)
12191 +{
12192 + int rc = 0;
12193 + int i;
12194 + struct ieee80211_qos_ac_parameter *ac_params;
12195 + u8 aci;
12196 + //u8 cw_min;
12197 + //u8 cw_max;
12198 +
12199 + for (i = 0; i < QOS_QUEUE_NUM; i++) {
12200 + ac_params = &(param_elm->ac_params_record[i]);
12201 +
12202 + aci = (ac_params->aci_aifsn & 0x60) >> 5;
12203 +
12204 + if(aci >= QOS_QUEUE_NUM)
12205 + continue;
12206 + qos_param->aifs[aci] = (ac_params->aci_aifsn) & 0x0f;
12207 +
12208 + /* WMM spec P.11: The minimum value for AIFSN shall be 2 */
12209 + qos_param->aifs[aci] = (qos_param->aifs[aci] < 2) ? 2:qos_param->aifs[aci];
12210 +
12211 + qos_param->cw_min[aci] = ac_params->ecw_min_max & 0x0F;
12212 +
12213 + qos_param->cw_max[aci] = (ac_params->ecw_min_max & 0xF0) >> 4;
12214 +
12215 + qos_param->flag[aci] =
12216 + (ac_params->aci_aifsn & 0x10) ? 0x01 : 0x00;
12217 + qos_param->tx_op_limit[aci] = le16_to_cpu(ac_params->tx_op_limit);
12218 + }
12219 + return rc;
12220 +}
12221 +
12222 +/*
12223 + * we have a generic data element which it may contain QoS information or
12224 + * parameters element. check the information element length to decide
12225 + * which type to read
12226 + */
12227 +static int ieee80211_parse_qos_info_param_IE(struct ieee80211_info_element
12228 + *info_element,
12229 + struct ieee80211_network *network)
12230 +{
12231 + int rc = 0;
12232 + struct ieee80211_qos_parameters *qos_param = NULL;
12233 + struct ieee80211_qos_information_element qos_info_element;
12234 +
12235 + rc = ieee80211_read_qos_info_element(&qos_info_element, info_element);
12236 +
12237 + if (rc == 0) {
12238 + network->qos_data.param_count = qos_info_element.ac_info & 0x0F;
12239 + network->flags |= NETWORK_HAS_QOS_INFORMATION;
12240 + } else {
12241 + struct ieee80211_qos_parameter_info param_element;
12242 +
12243 + rc = ieee80211_read_qos_param_element(&param_element,
12244 + info_element);
12245 + if (rc == 0) {
12246 + qos_param = &(network->qos_data.parameters);
12247 + ieee80211_qos_convert_ac_to_parameters(&param_element,
12248 + qos_param);
12249 + network->flags |= NETWORK_HAS_QOS_PARAMETERS;
12250 + network->qos_data.param_count =
12251 + param_element.info_element.ac_info & 0x0F;
12252 + }
12253 + }
12254 +
12255 + if (rc == 0) {
12256 + IEEE80211_DEBUG_QOS("QoS is supported\n");
12257 + network->qos_data.supported = 1;
12258 + }
12259 + return rc;
12260 +}
12261 +
12262 +#ifdef CONFIG_IEEE80211_DEBUG
12263 +#define MFIE_STRING(x) case MFIE_TYPE_ ##x: return #x
12264 +
12265 +static const char *get_info_element_string(u16 id)
12266 +{
12267 + switch (id) {
12268 + MFIE_STRING(SSID);
12269 + MFIE_STRING(RATES);
12270 + MFIE_STRING(FH_SET);
12271 + MFIE_STRING(DS_SET);
12272 + MFIE_STRING(CF_SET);
12273 + MFIE_STRING(TIM);
12274 + MFIE_STRING(IBSS_SET);
12275 + MFIE_STRING(COUNTRY);
12276 + MFIE_STRING(HOP_PARAMS);
12277 + MFIE_STRING(HOP_TABLE);
12278 + MFIE_STRING(REQUEST);
12279 + MFIE_STRING(CHALLENGE);
12280 + MFIE_STRING(POWER_CONSTRAINT);
12281 + MFIE_STRING(POWER_CAPABILITY);
12282 + MFIE_STRING(TPC_REQUEST);
12283 + MFIE_STRING(TPC_REPORT);
12284 + MFIE_STRING(SUPP_CHANNELS);
12285 + MFIE_STRING(CSA);
12286 + MFIE_STRING(MEASURE_REQUEST);
12287 + MFIE_STRING(MEASURE_REPORT);
12288 + MFIE_STRING(QUIET);
12289 + MFIE_STRING(IBSS_DFS);
12290 + // MFIE_STRING(ERP_INFO);
12291 + MFIE_STRING(RSN);
12292 + MFIE_STRING(RATES_EX);
12293 + MFIE_STRING(GENERIC);
12294 + MFIE_STRING(QOS_PARAMETER);
12295 + default:
12296 + return "UNKNOWN";
12297 + }
12298 +}
12299 +#endif
12300 +
12301 +#ifdef ENABLE_DOT11D
12302 +static inline void ieee80211_extract_country_ie(
12303 + struct ieee80211_device *ieee,
12304 + struct ieee80211_info_element *info_element,
12305 + struct ieee80211_network *network,
12306 + u8 * addr2
12307 +)
12308 +{
12309 + if(IS_DOT11D_ENABLE(ieee))
12310 + {
12311 + if(info_element->len!= 0)
12312 + {
12313 + memcpy(network->CountryIeBuf, info_element->data, info_element->len);
12314 + network->CountryIeLen = info_element->len;
12315 +
12316 + if(!IS_COUNTRY_IE_VALID(ieee))
12317 + {
12318 + Dot11d_UpdateCountryIe(ieee, addr2, info_element->len, info_element->data);
12319 + }
12320 + }
12321 +
12322 + //
12323 + // 070305, rcnjko: I update country IE watch dog here because
12324 + // some AP (e.g. Cisco 1242) don't include country IE in their
12325 + // probe response frame.
12326 + //
12327 + if(IS_EQUAL_CIE_SRC(ieee, addr2) )
12328 + {
12329 + UPDATE_CIE_WATCHDOG(ieee);
12330 + }
12331 + }
12332 +
12333 +}
12334 +#endif
12335 +
12336 +int ieee80211_parse_info_param(struct ieee80211_device *ieee,
12337 + struct ieee80211_info_element *info_element,
12338 + u16 length,
12339 + struct ieee80211_network *network,
12340 + struct ieee80211_rx_stats *stats)
12341 +{
12342 + u8 i;
12343 + short offset;
12344 + u16 tmp_htcap_len=0;
12345 + u16 tmp_htinfo_len=0;
12346 + u16 ht_realtek_agg_len=0;
12347 + u8 ht_realtek_agg_buf[MAX_IE_LEN];
12348 +// u16 broadcom_len = 0;
12349 +#ifdef CONFIG_IEEE80211_DEBUG
12350 + char rates_str[64];
12351 + char *p;
12352 +#endif
12353 +
12354 + while (length >= sizeof(*info_element)) {
12355 + if (sizeof(*info_element) + info_element->len > length) {
12356 + IEEE80211_DEBUG_MGMT("Info elem: parse failed: "
12357 + "info_element->len + 2 > left : "
12358 + "info_element->len+2=%zd left=%d, id=%d.\n",
12359 + info_element->len +
12360 + sizeof(*info_element),
12361 + length, info_element->id);
12362 + /* We stop processing but don't return an error here
12363 + * because some misbehaviour APs break this rule. ie.
12364 + * Orinoco AP1000. */
12365 + break;
12366 + }
12367 +
12368 + switch (info_element->id) {
12369 + case MFIE_TYPE_SSID:
12370 + if (ieee80211_is_empty_essid(info_element->data,
12371 + info_element->len)) {
12372 + network->flags |= NETWORK_EMPTY_ESSID;
12373 + break;
12374 + }
12375 +
12376 + network->ssid_len = min(info_element->len,
12377 + (u8) IW_ESSID_MAX_SIZE);
12378 + memcpy(network->ssid, info_element->data, network->ssid_len);
12379 + if (network->ssid_len < IW_ESSID_MAX_SIZE)
12380 + memset(network->ssid + network->ssid_len, 0,
12381 + IW_ESSID_MAX_SIZE - network->ssid_len);
12382 +
12383 + IEEE80211_DEBUG_MGMT("MFIE_TYPE_SSID: '%s' len=%d.\n",
12384 + network->ssid, network->ssid_len);
12385 + break;
12386 +
12387 + case MFIE_TYPE_RATES:
12388 +#ifdef CONFIG_IEEE80211_DEBUG
12389 + p = rates_str;
12390 +#endif
12391 + network->rates_len = min(info_element->len,
12392 + MAX_RATES_LENGTH);
12393 + for (i = 0; i < network->rates_len; i++) {
12394 + network->rates[i] = info_element->data[i];
12395 +#ifdef CONFIG_IEEE80211_DEBUG
12396 + p += snprintf(p, sizeof(rates_str) -
12397 + (p - rates_str), "%02X ",
12398 + network->rates[i]);
12399 +#endif
12400 + if (ieee80211_is_ofdm_rate
12401 + (info_element->data[i])) {
12402 + network->flags |= NETWORK_HAS_OFDM;
12403 + if (info_element->data[i] &
12404 + IEEE80211_BASIC_RATE_MASK)
12405 + network->flags &=
12406 + ~NETWORK_HAS_CCK;
12407 + }
12408 + }
12409 +
12410 + IEEE80211_DEBUG_MGMT("MFIE_TYPE_RATES: '%s' (%d)\n",
12411 + rates_str, network->rates_len);
12412 + break;
12413 +
12414 + case MFIE_TYPE_RATES_EX:
12415 +#ifdef CONFIG_IEEE80211_DEBUG
12416 + p = rates_str;
12417 +#endif
12418 + network->rates_ex_len = min(info_element->len,
12419 + MAX_RATES_EX_LENGTH);
12420 + for (i = 0; i < network->rates_ex_len; i++) {
12421 + network->rates_ex[i] = info_element->data[i];
12422 +#ifdef CONFIG_IEEE80211_DEBUG
12423 + p += snprintf(p, sizeof(rates_str) -
12424 + (p - rates_str), "%02X ",
12425 + network->rates[i]);
12426 +#endif
12427 + if (ieee80211_is_ofdm_rate
12428 + (info_element->data[i])) {
12429 + network->flags |= NETWORK_HAS_OFDM;
12430 + if (info_element->data[i] &
12431 + IEEE80211_BASIC_RATE_MASK)
12432 + network->flags &=
12433 + ~NETWORK_HAS_CCK;
12434 + }
12435 + }
12436 +
12437 + IEEE80211_DEBUG_MGMT("MFIE_TYPE_RATES_EX: '%s' (%d)\n",
12438 + rates_str, network->rates_ex_len);
12439 + break;
12440 +
12441 + case MFIE_TYPE_DS_SET:
12442 + IEEE80211_DEBUG_MGMT("MFIE_TYPE_DS_SET: %d\n",
12443 + info_element->data[0]);
12444 + network->channel = info_element->data[0];
12445 + break;
12446 +
12447 + case MFIE_TYPE_FH_SET:
12448 + IEEE80211_DEBUG_MGMT("MFIE_TYPE_FH_SET: ignored\n");
12449 + break;
12450 +
12451 + case MFIE_TYPE_CF_SET:
12452 + IEEE80211_DEBUG_MGMT("MFIE_TYPE_CF_SET: ignored\n");
12453 + break;
12454 +
12455 + case MFIE_TYPE_TIM:
12456 + if(info_element->len < 4)
12457 + break;
12458 +
12459 + network->tim.tim_count = info_element->data[0];
12460 + network->tim.tim_period = info_element->data[1];
12461 +
12462 + network->dtim_period = info_element->data[1];
12463 + if(ieee->state != IEEE80211_LINKED)
12464 + break;
12465 +#if 0
12466 + network->last_dtim_sta_time[0] = stats->mac_time[0];
12467 +#else
12468 + //we use jiffies for legacy Power save
12469 + network->last_dtim_sta_time[0] = jiffies;
12470 +#endif
12471 + network->last_dtim_sta_time[1] = stats->mac_time[1];
12472 +
12473 + network->dtim_data = IEEE80211_DTIM_VALID;
12474 +
12475 + if(info_element->data[0] != 0)
12476 + break;
12477 +
12478 + if(info_element->data[2] & 1)
12479 + network->dtim_data |= IEEE80211_DTIM_MBCAST;
12480 +
12481 + offset = (info_element->data[2] >> 1)*2;
12482 +
12483 + //printk("offset1:%x aid:%x\n",offset, ieee->assoc_id);
12484 +
12485 + if(ieee->assoc_id < 8*offset ||
12486 + ieee->assoc_id > 8*(offset + info_element->len -3))
12487 +
12488 + break;
12489 +
12490 + offset = (ieee->assoc_id / 8) - offset;// + ((aid % 8)? 0 : 1) ;
12491 +
12492 + if(info_element->data[3+offset] & (1<<(ieee->assoc_id%8)))
12493 + network->dtim_data |= IEEE80211_DTIM_UCAST;
12494 +
12495 + //IEEE80211_DEBUG_MGMT("MFIE_TYPE_TIM: partially ignored\n");
12496 + break;
12497 +
12498 + case MFIE_TYPE_ERP:
12499 + network->erp_value = info_element->data[0];
12500 + network->flags |= NETWORK_HAS_ERP_VALUE;
12501 + IEEE80211_DEBUG_MGMT("MFIE_TYPE_ERP_SET: %d\n",
12502 + network->erp_value);
12503 + break;
12504 + case MFIE_TYPE_IBSS_SET:
12505 + network->atim_window = info_element->data[0];
12506 + IEEE80211_DEBUG_MGMT("MFIE_TYPE_IBSS_SET: %d\n",
12507 + network->atim_window);
12508 + break;
12509 +
12510 + case MFIE_TYPE_CHALLENGE:
12511 + IEEE80211_DEBUG_MGMT("MFIE_TYPE_CHALLENGE: ignored\n");
12512 + break;
12513 +
12514 + case MFIE_TYPE_GENERIC:
12515 + IEEE80211_DEBUG_MGMT("MFIE_TYPE_GENERIC: %d bytes\n",
12516 + info_element->len);
12517 + if (!ieee80211_parse_qos_info_param_IE(info_element,
12518 + network))
12519 + break;
12520 +
12521 + if (info_element->len >= 4 &&
12522 + info_element->data[0] == 0x00 &&
12523 + info_element->data[1] == 0x50 &&
12524 + info_element->data[2] == 0xf2 &&
12525 + info_element->data[3] == 0x01) {
12526 + network->wpa_ie_len = min(info_element->len + 2,
12527 + MAX_WPA_IE_LEN);
12528 + memcpy(network->wpa_ie, info_element,
12529 + network->wpa_ie_len);
12530 + break;
12531 + }
12532 +
12533 +#ifdef THOMAS_TURBO
12534 + if (info_element->len == 7 &&
12535 + info_element->data[0] == 0x00 &&
12536 + info_element->data[1] == 0xe0 &&
12537 + info_element->data[2] == 0x4c &&
12538 + info_element->data[3] == 0x01 &&
12539 + info_element->data[4] == 0x02) {
12540 + network->Turbo_Enable = 1;
12541 + }
12542 +#endif
12543 +
12544 + //for HTcap and HTinfo parameters
12545 + if(tmp_htcap_len == 0){
12546 + if(info_element->len >= 4 &&
12547 + info_element->data[0] == 0x00 &&
12548 + info_element->data[1] == 0x90 &&
12549 + info_element->data[2] == 0x4c &&
12550 + info_element->data[3] == 0x033){
12551 +
12552 + tmp_htcap_len = min(info_element->len,(u8)MAX_IE_LEN);
12553 + if(tmp_htcap_len != 0){
12554 + network->bssht.bdHTSpecVer = HT_SPEC_VER_EWC;
12555 + network->bssht.bdHTCapLen = tmp_htcap_len > sizeof(network->bssht.bdHTCapBuf)?\
12556 + sizeof(network->bssht.bdHTCapBuf):tmp_htcap_len;
12557 + memcpy(network->bssht.bdHTCapBuf,info_element->data,network->bssht.bdHTCapLen);
12558 + }
12559 + }
12560 + if(tmp_htcap_len != 0)
12561 + network->bssht.bdSupportHT = true;
12562 + else
12563 + network->bssht.bdSupportHT = false;
12564 + }
12565 +
12566 +
12567 + if(tmp_htinfo_len == 0){
12568 + if(info_element->len >= 4 &&
12569 + info_element->data[0] == 0x00 &&
12570 + info_element->data[1] == 0x90 &&
12571 + info_element->data[2] == 0x4c &&
12572 + info_element->data[3] == 0x034){
12573 +
12574 + tmp_htinfo_len = min(info_element->len,(u8)MAX_IE_LEN);
12575 + if(tmp_htinfo_len != 0){
12576 + network->bssht.bdHTSpecVer = HT_SPEC_VER_EWC;
12577 + if(tmp_htinfo_len){
12578 + network->bssht.bdHTInfoLen = tmp_htinfo_len > sizeof(network->bssht.bdHTInfoBuf)?\
12579 + sizeof(network->bssht.bdHTInfoBuf):tmp_htinfo_len;
12580 + memcpy(network->bssht.bdHTInfoBuf,info_element->data,network->bssht.bdHTInfoLen);
12581 + }
12582 +
12583 + }
12584 +
12585 + }
12586 + }
12587 +
12588 + if(ieee->aggregation){
12589 + if(network->bssht.bdSupportHT){
12590 + if(info_element->len >= 4 &&
12591 + info_element->data[0] == 0x00 &&
12592 + info_element->data[1] == 0xe0 &&
12593 + info_element->data[2] == 0x4c &&
12594 + info_element->data[3] == 0x02){
12595 +
12596 + ht_realtek_agg_len = min(info_element->len,(u8)MAX_IE_LEN);
12597 + memcpy(ht_realtek_agg_buf,info_element->data,info_element->len);
12598 +
12599 + }
12600 + if(ht_realtek_agg_len >= 5){
12601 + network->bssht.bdRT2RTAggregation = true;
12602 +
12603 + if((ht_realtek_agg_buf[4] == 1) && (ht_realtek_agg_buf[5] & 0x02))
12604 + network->bssht.bdRT2RTLongSlotTime = true;
12605 + }
12606 + }
12607 +
12608 + }
12609 +
12610 + //if(tmp_htcap_len !=0 || tmp_htinfo_len != 0)
12611 + {
12612 + if((info_element->len >= 3 &&
12613 + info_element->data[0] == 0x00 &&
12614 + info_element->data[1] == 0x05 &&
12615 + info_element->data[2] == 0xb5) ||
12616 + (info_element->len >= 3 &&
12617 + info_element->data[0] == 0x00 &&
12618 + info_element->data[1] == 0x0a &&
12619 + info_element->data[2] == 0xf7) ||
12620 + (info_element->len >= 3 &&
12621 + info_element->data[0] == 0x00 &&
12622 + info_element->data[1] == 0x10 &&
12623 + info_element->data[2] == 0x18)){
12624 +
12625 + network->broadcom_cap_exist = true;
12626 +
12627 + }
12628 + }
12629 +#if 0
12630 + if (tmp_htcap_len !=0)
12631 + {
12632 + u16 cap_ext = ((PHT_CAPABILITY_ELE)&info_element->data[0])->ExtHTCapInfo;
12633 + if ((cap_ext & 0x0c00) == 0x0c00)
12634 + {
12635 + network->ralink_cap_exist = true;
12636 + }
12637 + }
12638 +#endif
12639 + if(info_element->len >= 3 &&
12640 + info_element->data[0] == 0x00 &&
12641 + info_element->data[1] == 0x0c &&
12642 + info_element->data[2] == 0x43)
12643 + {
12644 + network->ralink_cap_exist = true;
12645 + }
12646 + else
12647 + network->ralink_cap_exist = false;
12648 + //added by amy for atheros AP
12649 + if((info_element->len >= 3 &&
12650 + info_element->data[0] == 0x00 &&
12651 + info_element->data[1] == 0x03 &&
12652 + info_element->data[2] == 0x7f) ||
12653 + (info_element->len >= 3 &&
12654 + info_element->data[0] == 0x00 &&
12655 + info_element->data[1] == 0x13 &&
12656 + info_element->data[2] == 0x74))
12657 + {
12658 + printk("========>%s(): athros AP is exist\n",__FUNCTION__);
12659 + network->atheros_cap_exist = true;
12660 + }
12661 + else
12662 + network->atheros_cap_exist = false;
12663 +
12664 + if(info_element->len >= 3 &&
12665 + info_element->data[0] == 0x00 &&
12666 + info_element->data[1] == 0x40 &&
12667 + info_element->data[2] == 0x96)
12668 + {
12669 + network->cisco_cap_exist = true;
12670 + }
12671 + else
12672 + network->cisco_cap_exist = false;
12673 + //added by amy for LEAP of cisco
12674 + if(info_element->len > 4 &&
12675 + info_element->data[0] == 0x00 &&
12676 + info_element->data[1] == 0x40 &&
12677 + info_element->data[2] == 0x96 &&
12678 + info_element->data[3] == 0x01)
12679 + {
12680 + if(info_element->len == 6)
12681 + {
12682 + memcpy(network->CcxRmState, &info_element[4], 2);
12683 + if(network->CcxRmState[0] != 0)
12684 + {
12685 + network->bCcxRmEnable = true;
12686 + }
12687 + else
12688 + network->bCcxRmEnable = false;
12689 + //
12690 + // CCXv4 Table 59-1 MBSSID Masks.
12691 + //
12692 + network->MBssidMask = network->CcxRmState[1] & 0x07;
12693 + if(network->MBssidMask != 0)
12694 + {
12695 + network->bMBssidValid = true;
12696 + network->MBssidMask = 0xff << (network->MBssidMask);
12697 + cpMacAddr(network->MBssid, network->bssid);
12698 + network->MBssid[5] &= network->MBssidMask;
12699 + }
12700 + else
12701 + {
12702 + network->bMBssidValid = false;
12703 + }
12704 + }
12705 + else
12706 + {
12707 + network->bCcxRmEnable = false;
12708 + }
12709 + }
12710 + if(info_element->len > 4 &&
12711 + info_element->data[0] == 0x00 &&
12712 + info_element->data[1] == 0x40 &&
12713 + info_element->data[2] == 0x96 &&
12714 + info_element->data[3] == 0x03)
12715 + {
12716 + if(info_element->len == 5)
12717 + {
12718 + network->bWithCcxVerNum = true;
12719 + network->BssCcxVerNumber = info_element->data[4];
12720 + }
12721 + else
12722 + {
12723 + network->bWithCcxVerNum = false;
12724 + network->BssCcxVerNumber = 0;
12725 + }
12726 + }
12727 + break;
12728 +
12729 + case MFIE_TYPE_RSN:
12730 + IEEE80211_DEBUG_MGMT("MFIE_TYPE_RSN: %d bytes\n",
12731 + info_element->len);
12732 + network->rsn_ie_len = min(info_element->len + 2,
12733 + MAX_WPA_IE_LEN);
12734 + memcpy(network->rsn_ie, info_element,
12735 + network->rsn_ie_len);
12736 + break;
12737 +
12738 + //HT related element.
12739 + case MFIE_TYPE_HT_CAP:
12740 + IEEE80211_DEBUG_SCAN("MFIE_TYPE_HT_CAP: %d bytes\n",
12741 + info_element->len);
12742 + tmp_htcap_len = min(info_element->len,(u8)MAX_IE_LEN);
12743 + if(tmp_htcap_len != 0){
12744 + network->bssht.bdHTSpecVer = HT_SPEC_VER_EWC;
12745 + network->bssht.bdHTCapLen = tmp_htcap_len > sizeof(network->bssht.bdHTCapBuf)?\
12746 + sizeof(network->bssht.bdHTCapBuf):tmp_htcap_len;
12747 + memcpy(network->bssht.bdHTCapBuf,info_element->data,network->bssht.bdHTCapLen);
12748 +
12749 + //If peer is HT, but not WMM, call QosSetLegacyWMMParamWithHT()
12750 + // windows driver will update WMM parameters each beacon received once connected
12751 + // Linux driver is a bit different.
12752 + network->bssht.bdSupportHT = true;
12753 + }
12754 + else
12755 + network->bssht.bdSupportHT = false;
12756 + break;
12757 +
12758 +
12759 + case MFIE_TYPE_HT_INFO:
12760 + IEEE80211_DEBUG_SCAN("MFIE_TYPE_HT_INFO: %d bytes\n",
12761 + info_element->len);
12762 + tmp_htinfo_len = min(info_element->len,(u8)MAX_IE_LEN);
12763 + if(tmp_htinfo_len){
12764 + network->bssht.bdHTSpecVer = HT_SPEC_VER_IEEE;
12765 + network->bssht.bdHTInfoLen = tmp_htinfo_len > sizeof(network->bssht.bdHTInfoBuf)?\
12766 + sizeof(network->bssht.bdHTInfoBuf):tmp_htinfo_len;
12767 + memcpy(network->bssht.bdHTInfoBuf,info_element->data,network->bssht.bdHTInfoLen);
12768 + }
12769 + break;
12770 +
12771 + case MFIE_TYPE_AIRONET:
12772 + IEEE80211_DEBUG_SCAN("MFIE_TYPE_AIRONET: %d bytes\n",
12773 + info_element->len);
12774 + if(info_element->len >IE_CISCO_FLAG_POSITION)
12775 + {
12776 + network->bWithAironetIE = true;
12777 +
12778 + // CCX 1 spec v1.13, A01.1 CKIP Negotiation (page23):
12779 + // "A Cisco access point advertises support for CKIP in beacon and probe response packets,
12780 + // by adding an Aironet element and setting one or both of the CKIP negotiation bits."
12781 + if( (info_element->data[IE_CISCO_FLAG_POSITION]&SUPPORT_CKIP_MIC) ||
12782 + (info_element->data[IE_CISCO_FLAG_POSITION]&SUPPORT_CKIP_PK) )
12783 + {
12784 + network->bCkipSupported = true;
12785 + }
12786 + else
12787 + {
12788 + network->bCkipSupported = false;
12789 + }
12790 + }
12791 + else
12792 + {
12793 + network->bWithAironetIE = false;
12794 + network->bCkipSupported = false;
12795 + }
12796 + break;
12797 + case MFIE_TYPE_QOS_PARAMETER:
12798 + printk(KERN_ERR
12799 + "QoS Error need to parse QOS_PARAMETER IE\n");
12800 + break;
12801 +
12802 +#ifdef ENABLE_DOT11D
12803 + case MFIE_TYPE_COUNTRY:
12804 + IEEE80211_DEBUG_SCAN("MFIE_TYPE_COUNTRY: %d bytes\n",
12805 + info_element->len);
12806 + //printk("=====>Receive <%s> Country IE\n",network->ssid);
12807 + ieee80211_extract_country_ie(ieee, info_element, network, network->bssid);//addr2 is same as addr3 when from an AP
12808 + break;
12809 +#endif
12810 +/* TODO */
12811 +#if 0
12812 + /* 802.11h */
12813 + case MFIE_TYPE_POWER_CONSTRAINT:
12814 + network->power_constraint = info_element->data[0];
12815 + network->flags |= NETWORK_HAS_POWER_CONSTRAINT;
12816 + break;
12817 +
12818 + case MFIE_TYPE_CSA:
12819 + network->power_constraint = info_element->data[0];
12820 + network->flags |= NETWORK_HAS_CSA;
12821 + break;
12822 +
12823 + case MFIE_TYPE_QUIET:
12824 + network->quiet.count = info_element->data[0];
12825 + network->quiet.period = info_element->data[1];
12826 + network->quiet.duration = info_element->data[2];
12827 + network->quiet.offset = info_element->data[3];
12828 + network->flags |= NETWORK_HAS_QUIET;
12829 + break;
12830 +
12831 + case MFIE_TYPE_IBSS_DFS:
12832 + if (network->ibss_dfs)
12833 + break;
12834 + network->ibss_dfs = kmemdup(info_element->data,
12835 + info_element->len,
12836 + GFP_ATOMIC);
12837 + if (!network->ibss_dfs)
12838 + return 1;
12839 + network->flags |= NETWORK_HAS_IBSS_DFS;
12840 + break;
12841 +
12842 + case MFIE_TYPE_TPC_REPORT:
12843 + network->tpc_report.transmit_power =
12844 + info_element->data[0];
12845 + network->tpc_report.link_margin = info_element->data[1];
12846 + network->flags |= NETWORK_HAS_TPC_REPORT;
12847 + break;
12848 +#endif
12849 + default:
12850 + IEEE80211_DEBUG_MGMT
12851 + ("Unsupported info element: %s (%d)\n",
12852 + get_info_element_string(info_element->id),
12853 + info_element->id);
12854 + break;
12855 + }
12856 +
12857 + length -= sizeof(*info_element) + info_element->len;
12858 + info_element =
12859 + (struct ieee80211_info_element *)&info_element->
12860 + data[info_element->len];
12861 + }
12862 +
12863 + if(!network->atheros_cap_exist && !network->broadcom_cap_exist &&
12864 + !network->cisco_cap_exist && !network->ralink_cap_exist && !network->bssht.bdRT2RTAggregation)
12865 + {
12866 + network->unknown_cap_exist = true;
12867 + }
12868 + else
12869 + {
12870 + network->unknown_cap_exist = false;
12871 + }
12872 + return 0;
12873 +}
12874 +
12875 +static inline u8 ieee80211_SignalStrengthTranslate(
12876 + u8 CurrSS
12877 + )
12878 +{
12879 + u8 RetSS;
12880 +
12881 + // Step 1. Scale mapping.
12882 + if(CurrSS >= 71 && CurrSS <= 100)
12883 + {
12884 + RetSS = 90 + ((CurrSS - 70) / 3);
12885 + }
12886 + else if(CurrSS >= 41 && CurrSS <= 70)
12887 + {
12888 + RetSS = 78 + ((CurrSS - 40) / 3);
12889 + }
12890 + else if(CurrSS >= 31 && CurrSS <= 40)
12891 + {
12892 + RetSS = 66 + (CurrSS - 30);
12893 + }
12894 + else if(CurrSS >= 21 && CurrSS <= 30)
12895 + {
12896 + RetSS = 54 + (CurrSS - 20);
12897 + }
12898 + else if(CurrSS >= 5 && CurrSS <= 20)
12899 + {
12900 + RetSS = 42 + (((CurrSS - 5) * 2) / 3);
12901 + }
12902 + else if(CurrSS == 4)
12903 + {
12904 + RetSS = 36;
12905 + }
12906 + else if(CurrSS == 3)
12907 + {
12908 + RetSS = 27;
12909 + }
12910 + else if(CurrSS == 2)
12911 + {
12912 + RetSS = 18;
12913 + }
12914 + else if(CurrSS == 1)
12915 + {
12916 + RetSS = 9;
12917 + }
12918 + else
12919 + {
12920 + RetSS = CurrSS;
12921 + }
12922 + //RT_TRACE(COMP_DBG, DBG_LOUD, ("##### After Mapping: LastSS: %d, CurrSS: %d, RetSS: %d\n", LastSS, CurrSS, RetSS));
12923 +
12924 + // Step 2. Smoothing.
12925 +
12926 + //RT_TRACE(COMP_DBG, DBG_LOUD, ("$$$$$ After Smoothing: LastSS: %d, CurrSS: %d, RetSS: %d\n", LastSS, CurrSS, RetSS));
12927 +
12928 + return RetSS;
12929 +}
12930 +
12931 +long ieee80211_translate_todbm(u8 signal_strength_index )// 0-100 index.
12932 +{
12933 + long signal_power; // in dBm.
12934 +
12935 + // Translate to dBm (x=0.5y-95).
12936 + signal_power = (long)((signal_strength_index + 1) >> 1);
12937 + signal_power -= 95;
12938 +
12939 + return signal_power;
12940 +}
12941 +
12942 +static inline int ieee80211_network_init(
12943 + struct ieee80211_device *ieee,
12944 + struct ieee80211_probe_response *beacon,
12945 + struct ieee80211_network *network,
12946 + struct ieee80211_rx_stats *stats)
12947 +{
12948 +#ifdef CONFIG_IEEE80211_DEBUG
12949 + //char rates_str[64];
12950 + //char *p;
12951 +#endif
12952 +
12953 + network->qos_data.active = 0;
12954 + network->qos_data.supported = 0;
12955 + network->qos_data.param_count = 0;
12956 + network->qos_data.old_param_count = 0;
12957 +
12958 + /* Pull out fixed field data */
12959 + memcpy(network->bssid, beacon->header.addr3, ETH_ALEN);
12960 + network->capability = le16_to_cpu(beacon->capability);
12961 + network->last_scanned = jiffies;
12962 + network->time_stamp[0] = le32_to_cpu(beacon->time_stamp[0]);
12963 + network->time_stamp[1] = le32_to_cpu(beacon->time_stamp[1]);
12964 + network->beacon_interval = le32_to_cpu(beacon->beacon_interval);
12965 + /* Where to pull this? beacon->listen_interval;*/
12966 + network->listen_interval = 0x0A;
12967 + network->rates_len = network->rates_ex_len = 0;
12968 + network->last_associate = 0;
12969 + network->ssid_len = 0;
12970 + network->flags = 0;
12971 + network->atim_window = 0;
12972 + network->erp_value = (network->capability & WLAN_CAPABILITY_IBSS) ?
12973 + 0x3 : 0x0;
12974 + network->berp_info_valid = false;
12975 + network->broadcom_cap_exist = false;
12976 + network->ralink_cap_exist = false;
12977 + network->atheros_cap_exist = false;
12978 + network->cisco_cap_exist = false;
12979 + network->unknown_cap_exist = false;
12980 +#ifdef THOMAS_TURBO
12981 + network->Turbo_Enable = 0;
12982 +#endif
12983 +#ifdef ENABLE_DOT11D
12984 + network->CountryIeLen = 0;
12985 + memset(network->CountryIeBuf, 0, MAX_IE_LEN);
12986 +#endif
12987 +//Initialize HT parameters
12988 + //ieee80211_ht_initialize(&network->bssht);
12989 + HTInitializeBssDesc(&network->bssht);
12990 + if (stats->freq == IEEE80211_52GHZ_BAND) {
12991 + /* for A band (No DS info) */
12992 + network->channel = stats->received_channel;
12993 + } else
12994 + network->flags |= NETWORK_HAS_CCK;
12995 +
12996 + network->wpa_ie_len = 0;
12997 + network->rsn_ie_len = 0;
12998 +
12999 + if (ieee80211_parse_info_param
13000 + (ieee,beacon->info_element, stats->len - sizeof(*beacon), network, stats))
13001 + return 1;
13002 +
13003 + network->mode = 0;
13004 + if (stats->freq == IEEE80211_52GHZ_BAND)
13005 + network->mode = IEEE_A;
13006 + else {
13007 + if (network->flags & NETWORK_HAS_OFDM)
13008 + network->mode |= IEEE_G;
13009 + if (network->flags & NETWORK_HAS_CCK)
13010 + network->mode |= IEEE_B;
13011 + }
13012 +
13013 + if (network->mode == 0) {
13014 + IEEE80211_DEBUG_SCAN("Filtered out '%s (" MAC_FMT ")' "
13015 + "network.\n",
13016 + escape_essid(network->ssid,
13017 + network->ssid_len),
13018 + MAC_ARG(network->bssid));
13019 + return 1;
13020 + }
13021 +
13022 + if(network->bssht.bdSupportHT){
13023 + if(network->mode == IEEE_A)
13024 + network->mode = IEEE_N_5G;
13025 + else if(network->mode & (IEEE_G | IEEE_B))
13026 + network->mode = IEEE_N_24G;
13027 + }
13028 + if (ieee80211_is_empty_essid(network->ssid, network->ssid_len))
13029 + network->flags |= NETWORK_EMPTY_ESSID;
13030 +
13031 +#if 1
13032 + stats->signal = 30 + (stats->SignalStrength * 70) / 100;
13033 + //stats->signal = ieee80211_SignalStrengthTranslate(stats->signal);
13034 + stats->noise = ieee80211_translate_todbm((u8)(100-stats->signal)) -25;
13035 +#endif
13036 +
13037 + memcpy(&network->stats, stats, sizeof(network->stats));
13038 +
13039 + return 0;
13040 +}
13041 +
13042 +static inline int is_same_network(struct ieee80211_network *src,
13043 + struct ieee80211_network *dst, struct ieee80211_device* ieee)
13044 +{
13045 + /* A network is only a duplicate if the channel, BSSID, ESSID
13046 + * and the capability field (in particular IBSS and BSS) all match.
13047 + * We treat all <hidden> with the same BSSID and channel
13048 + * as one network */
13049 + return //((src->ssid_len == dst->ssid_len) &&
13050 + (((src->ssid_len == dst->ssid_len) || (ieee->iw_mode == IW_MODE_INFRA)) &&
13051 + (src->channel == dst->channel) &&
13052 + !memcmp(src->bssid, dst->bssid, ETH_ALEN) &&
13053 + //!memcmp(src->ssid, dst->ssid, src->ssid_len) &&
13054 + (!memcmp(src->ssid, dst->ssid, src->ssid_len) || (ieee->iw_mode == IW_MODE_INFRA)) &&
13055 + ((src->capability & WLAN_CAPABILITY_IBSS) ==
13056 + (dst->capability & WLAN_CAPABILITY_IBSS)) &&
13057 + ((src->capability & WLAN_CAPABILITY_BSS) ==
13058 + (dst->capability & WLAN_CAPABILITY_BSS)));
13059 +}
13060 +
13061 +static inline void update_network(struct ieee80211_network *dst,
13062 + struct ieee80211_network *src)
13063 +{
13064 + int qos_active;
13065 + u8 old_param;
13066 +
13067 + memcpy(&dst->stats, &src->stats, sizeof(struct ieee80211_rx_stats));
13068 + dst->capability = src->capability;
13069 + memcpy(dst->rates, src->rates, src->rates_len);
13070 + dst->rates_len = src->rates_len;
13071 + memcpy(dst->rates_ex, src->rates_ex, src->rates_ex_len);
13072 + dst->rates_ex_len = src->rates_ex_len;
13073 + if(src->ssid_len > 0)
13074 + {
13075 + memset(dst->ssid, 0, dst->ssid_len);
13076 + dst->ssid_len = src->ssid_len;
13077 + memcpy(dst->ssid, src->ssid, src->ssid_len);
13078 + }
13079 + dst->mode = src->mode;
13080 + dst->flags = src->flags;
13081 + dst->time_stamp[0] = src->time_stamp[0];
13082 + dst->time_stamp[1] = src->time_stamp[1];
13083 + if (src->flags & NETWORK_HAS_ERP_VALUE)
13084 + {
13085 + dst->erp_value = src->erp_value;
13086 + dst->berp_info_valid = src->berp_info_valid = true;
13087 + }
13088 + dst->beacon_interval = src->beacon_interval;
13089 + dst->listen_interval = src->listen_interval;
13090 + dst->atim_window = src->atim_window;
13091 + dst->dtim_period = src->dtim_period;
13092 + dst->dtim_data = src->dtim_data;
13093 + dst->last_dtim_sta_time[0] = src->last_dtim_sta_time[0];
13094 + dst->last_dtim_sta_time[1] = src->last_dtim_sta_time[1];
13095 + memcpy(&dst->tim, &src->tim, sizeof(struct ieee80211_tim_parameters));
13096 +
13097 + dst->bssht.bdSupportHT = src->bssht.bdSupportHT;
13098 + dst->bssht.bdRT2RTAggregation = src->bssht.bdRT2RTAggregation;
13099 + dst->bssht.bdHTCapLen= src->bssht.bdHTCapLen;
13100 + memcpy(dst->bssht.bdHTCapBuf,src->bssht.bdHTCapBuf,src->bssht.bdHTCapLen);
13101 + dst->bssht.bdHTInfoLen= src->bssht.bdHTInfoLen;
13102 + memcpy(dst->bssht.bdHTInfoBuf,src->bssht.bdHTInfoBuf,src->bssht.bdHTInfoLen);
13103 + dst->bssht.bdHTSpecVer = src->bssht.bdHTSpecVer;
13104 + dst->bssht.bdRT2RTLongSlotTime = src->bssht.bdRT2RTLongSlotTime;
13105 + dst->broadcom_cap_exist = src->broadcom_cap_exist;
13106 + dst->ralink_cap_exist = src->ralink_cap_exist;
13107 + dst->atheros_cap_exist = src->atheros_cap_exist;
13108 + dst->cisco_cap_exist = src->cisco_cap_exist;
13109 + dst->unknown_cap_exist = src->unknown_cap_exist;
13110 + memcpy(dst->wpa_ie, src->wpa_ie, src->wpa_ie_len);
13111 + dst->wpa_ie_len = src->wpa_ie_len;
13112 + memcpy(dst->rsn_ie, src->rsn_ie, src->rsn_ie_len);
13113 + dst->rsn_ie_len = src->rsn_ie_len;
13114 +
13115 + dst->last_scanned = jiffies;
13116 + /* qos related parameters */
13117 + //qos_active = src->qos_data.active;
13118 + qos_active = dst->qos_data.active;
13119 + //old_param = dst->qos_data.old_param_count;
13120 + old_param = dst->qos_data.param_count;
13121 + if(dst->flags & NETWORK_HAS_QOS_MASK){
13122 + //not update QOS paramter in beacon, as most AP will set all these parameter to 0.//WB
13123 + // printk("====>%s(), aifs:%x, %x\n", __FUNCTION__, dst->qos_data.parameters.aifs[0], src->qos_data.parameters.aifs[0]);
13124 + // memcpy(&dst->qos_data, &src->qos_data,
13125 + // sizeof(struct ieee80211_qos_data));
13126 + }
13127 + else {
13128 + dst->qos_data.supported = src->qos_data.supported;
13129 + dst->qos_data.param_count = src->qos_data.param_count;
13130 + }
13131 +
13132 + if(dst->qos_data.supported == 1) {
13133 + dst->QoS_Enable = 1;
13134 + if(dst->ssid_len)
13135 + IEEE80211_DEBUG_QOS
13136 + ("QoS the network %s is QoS supported\n",
13137 + dst->ssid);
13138 + else
13139 + IEEE80211_DEBUG_QOS
13140 + ("QoS the network is QoS supported\n");
13141 + }
13142 + dst->qos_data.active = qos_active;
13143 + dst->qos_data.old_param_count = old_param;
13144 +
13145 + /* dst->last_associate is not overwritten */
13146 +#if 1
13147 + dst->wmm_info = src->wmm_info; //sure to exist in beacon or probe response frame.
13148 + if(src->wmm_param[0].ac_aci_acm_aifsn|| \
13149 + src->wmm_param[1].ac_aci_acm_aifsn|| \
13150 + src->wmm_param[2].ac_aci_acm_aifsn|| \
13151 + src->wmm_param[1].ac_aci_acm_aifsn) {
13152 + memcpy(dst->wmm_param, src->wmm_param, WME_AC_PRAM_LEN);
13153 + }
13154 + //dst->QoS_Enable = src->QoS_Enable;
13155 +#else
13156 + dst->QoS_Enable = 1;//for Rtl8187 simulation
13157 +#endif
13158 +#ifdef THOMAS_TURBO
13159 + dst->Turbo_Enable = src->Turbo_Enable;
13160 +#endif
13161 +
13162 +#ifdef ENABLE_DOT11D
13163 + dst->CountryIeLen = src->CountryIeLen;
13164 + memcpy(dst->CountryIeBuf, src->CountryIeBuf, src->CountryIeLen);
13165 +#endif
13166 +
13167 + //added by amy for LEAP
13168 + dst->bWithAironetIE = src->bWithAironetIE;
13169 + dst->bCkipSupported = src->bCkipSupported;
13170 + memcpy(dst->CcxRmState,src->CcxRmState,2);
13171 + dst->bCcxRmEnable = src->bCcxRmEnable;
13172 + dst->MBssidMask = src->MBssidMask;
13173 + dst->bMBssidValid = src->bMBssidValid;
13174 + memcpy(dst->MBssid,src->MBssid,6);
13175 + dst->bWithCcxVerNum = src->bWithCcxVerNum;
13176 + dst->BssCcxVerNumber = src->BssCcxVerNumber;
13177 +
13178 +}
13179 +
13180 +static inline int is_beacon(__le16 fc)
13181 +{
13182 + return (WLAN_FC_GET_STYPE(le16_to_cpu(fc)) == IEEE80211_STYPE_BEACON);
13183 +}
13184 +
13185 +static inline void ieee80211_process_probe_response(
13186 + struct ieee80211_device *ieee,
13187 + struct ieee80211_probe_response *beacon,
13188 + struct ieee80211_rx_stats *stats)
13189 +{
13190 + struct ieee80211_network network;
13191 + struct ieee80211_network *target;
13192 + struct ieee80211_network *oldest = NULL;
13193 +#ifdef CONFIG_IEEE80211_DEBUG
13194 + struct ieee80211_info_element *info_element = &beacon->info_element[0];
13195 +#endif
13196 + unsigned long flags;
13197 + short renew;
13198 + //u8 wmm_info;
13199 +
13200 + memset(&network, 0, sizeof(struct ieee80211_network));
13201 + IEEE80211_DEBUG_SCAN(
13202 + "'%s' (" MAC_FMT "): %c%c%c%c %c%c%c%c-%c%c%c%c %c%c%c%c\n",
13203 + escape_essid(info_element->data, info_element->len),
13204 + MAC_ARG(beacon->header.addr3),
13205 + (beacon->capability & (1<<0xf)) ? '1' : '0',
13206 + (beacon->capability & (1<<0xe)) ? '1' : '0',
13207 + (beacon->capability & (1<<0xd)) ? '1' : '0',
13208 + (beacon->capability & (1<<0xc)) ? '1' : '0',
13209 + (beacon->capability & (1<<0xb)) ? '1' : '0',
13210 + (beacon->capability & (1<<0xa)) ? '1' : '0',
13211 + (beacon->capability & (1<<0x9)) ? '1' : '0',
13212 + (beacon->capability & (1<<0x8)) ? '1' : '0',
13213 + (beacon->capability & (1<<0x7)) ? '1' : '0',
13214 + (beacon->capability & (1<<0x6)) ? '1' : '0',
13215 + (beacon->capability & (1<<0x5)) ? '1' : '0',
13216 + (beacon->capability & (1<<0x4)) ? '1' : '0',
13217 + (beacon->capability & (1<<0x3)) ? '1' : '0',
13218 + (beacon->capability & (1<<0x2)) ? '1' : '0',
13219 + (beacon->capability & (1<<0x1)) ? '1' : '0',
13220 + (beacon->capability & (1<<0x0)) ? '1' : '0');
13221 +
13222 + if (ieee80211_network_init(ieee, beacon, &network, stats)) {
13223 + IEEE80211_DEBUG_SCAN("Dropped '%s' (" MAC_FMT ") via %s.\n",
13224 + escape_essid(info_element->data,
13225 + info_element->len),
13226 + MAC_ARG(beacon->header.addr3),
13227 + WLAN_FC_GET_STYPE(beacon->header.frame_ctl) ==
13228 + IEEE80211_STYPE_PROBE_RESP ?
13229 + "PROBE RESPONSE" : "BEACON");
13230 + return;
13231 + }
13232 +
13233 +#ifdef ENABLE_DOT11D
13234 + // For Asus EeePc request,
13235 + // (1) if wireless adapter receive get any 802.11d country code in AP beacon,
13236 + // wireless adapter should follow the country code.
13237 + // (2) If there is no any country code in beacon,
13238 + // then wireless adapter should do active scan from ch1~11 and
13239 + // passive scan from ch12~14
13240 +
13241 + if( !IsLegalChannel(ieee, network.channel) )
13242 + return;
13243 + if(ieee->bGlobalDomain)
13244 + {
13245 + if (WLAN_FC_GET_STYPE(beacon->header.frame_ctl) == IEEE80211_STYPE_PROBE_RESP)
13246 + {
13247 + // Case 1: Country code
13248 + if(IS_COUNTRY_IE_VALID(ieee) )
13249 + {
13250 + if( !IsLegalChannel(ieee, network.channel) )
13251 + {
13252 + printk("GetScanInfo(): For Country code, filter probe response at channel(%d).\n", network.channel);
13253 + return;
13254 + }
13255 + }
13256 + // Case 2: No any country code.
13257 + else
13258 + {
13259 + // Filter over channel ch12~14
13260 + if(network.channel > 11)
13261 + {
13262 + printk("GetScanInfo(): For Global Domain, filter probe response at channel(%d).\n", network.channel);
13263 + return;
13264 + }
13265 + }
13266 + }
13267 + else
13268 + {
13269 + // Case 1: Country code
13270 + if(IS_COUNTRY_IE_VALID(ieee) )
13271 + {
13272 + if( !IsLegalChannel(ieee, network.channel) )
13273 + {
13274 + printk("GetScanInfo(): For Country code, filter beacon at channel(%d).\n",network.channel);
13275 + return;
13276 + }
13277 + }
13278 + // Case 2: No any country code.
13279 + else
13280 + {
13281 + // Filter over channel ch12~14
13282 + if(network.channel > 14)
13283 + {
13284 + printk("GetScanInfo(): For Global Domain, filter beacon at channel(%d).\n",network.channel);
13285 + return;
13286 + }
13287 + }
13288 + }
13289 + }
13290 +#endif
13291 +
13292 + /* The network parsed correctly -- so now we scan our known networks
13293 + * to see if we can find it in our list.
13294 + *
13295 + * NOTE: This search is definitely not optimized. Once its doing
13296 + * the "right thing" we'll optimize it for efficiency if
13297 + * necessary */
13298 +
13299 + /* Search for this entry in the list and update it if it is
13300 + * already there. */
13301 +
13302 + spin_lock_irqsave(&ieee->lock, flags);
13303 +
13304 + if(is_same_network(&ieee->current_network, &network, ieee)) {
13305 + update_network(&ieee->current_network, &network);
13306 + if((ieee->current_network.mode == IEEE_N_24G || ieee->current_network.mode == IEEE_G)
13307 + && ieee->current_network.berp_info_valid){
13308 + if(ieee->current_network.erp_value& ERP_UseProtection)
13309 + ieee->current_network.buseprotection = true;
13310 + else
13311 + ieee->current_network.buseprotection = false;
13312 + }
13313 + if(is_beacon(beacon->header.frame_ctl))
13314 + {
13315 + if(ieee->state == IEEE80211_LINKED)
13316 + ieee->LinkDetectInfo.NumRecvBcnInPeriod++;
13317 + }
13318 + else //hidden AP
13319 + network.flags = (~NETWORK_EMPTY_ESSID & network.flags)|(NETWORK_EMPTY_ESSID & ieee->current_network.flags);
13320 + }
13321 +
13322 + list_for_each_entry(target, &ieee->network_list, list) {
13323 + if (is_same_network(target, &network, ieee))
13324 + break;
13325 + if ((oldest == NULL) ||
13326 + (target->last_scanned < oldest->last_scanned))
13327 + oldest = target;
13328 + }
13329 +
13330 + /* If we didn't find a match, then get a new network slot to initialize
13331 + * with this beacon's information */
13332 + if (&target->list == &ieee->network_list) {
13333 + if (list_empty(&ieee->network_free_list)) {
13334 + /* If there are no more slots, expire the oldest */
13335 + list_del(&oldest->list);
13336 + target = oldest;
13337 + IEEE80211_DEBUG_SCAN("Expired '%s' (" MAC_FMT ") from "
13338 + "network list.\n",
13339 + escape_essid(target->ssid,
13340 + target->ssid_len),
13341 + MAC_ARG(target->bssid));
13342 + } else {
13343 + /* Otherwise just pull from the free list */
13344 + target = list_entry(ieee->network_free_list.next,
13345 + struct ieee80211_network, list);
13346 + list_del(ieee->network_free_list.next);
13347 + }
13348 +
13349 +
13350 +#ifdef CONFIG_IEEE80211_DEBUG
13351 + IEEE80211_DEBUG_SCAN("Adding '%s' (" MAC_FMT ") via %s.\n",
13352 + escape_essid(network.ssid,
13353 + network.ssid_len),
13354 + MAC_ARG(network.bssid),
13355 + WLAN_FC_GET_STYPE(beacon->header.frame_ctl) ==
13356 + IEEE80211_STYPE_PROBE_RESP ?
13357 + "PROBE RESPONSE" : "BEACON");
13358 +#endif
13359 + memcpy(target, &network, sizeof(*target));
13360 + list_add_tail(&target->list, &ieee->network_list);
13361 + if(ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE)
13362 + ieee80211_softmac_new_net(ieee,&network);
13363 + } else {
13364 + IEEE80211_DEBUG_SCAN("Updating '%s' (" MAC_FMT ") via %s.\n",
13365 + escape_essid(target->ssid,
13366 + target->ssid_len),
13367 + MAC_ARG(target->bssid),
13368 + WLAN_FC_GET_STYPE(beacon->header.frame_ctl) ==
13369 + IEEE80211_STYPE_PROBE_RESP ?
13370 + "PROBE RESPONSE" : "BEACON");
13371 +
13372 + /* we have an entry and we are going to update it. But this entry may
13373 + * be already expired. In this case we do the same as we found a new
13374 + * net and call the new_net handler
13375 + */
13376 + renew = !time_after(target->last_scanned + ieee->scan_age, jiffies);
13377 + //YJ,add,080819,for hidden ap
13378 + if(is_beacon(beacon->header.frame_ctl) == 0)
13379 + network.flags = (~NETWORK_EMPTY_ESSID & network.flags)|(NETWORK_EMPTY_ESSID & target->flags);
13380 + //if(strncmp(network.ssid, "linksys-c",9) == 0)
13381 + // printk("====>2 network.ssid=%s FLAG=%d target.ssid=%s FLAG=%d\n", network.ssid, network.flags, target->ssid, target->flags);
13382 + if(((network.flags & NETWORK_EMPTY_ESSID) == NETWORK_EMPTY_ESSID) \
13383 + && (((network.ssid_len > 0) && (strncmp(target->ssid, network.ssid, network.ssid_len)))\
13384 + ||((ieee->current_network.ssid_len == network.ssid_len)&&(strncmp(ieee->current_network.ssid, network.ssid, network.ssid_len) == 0)&&(ieee->state == IEEE80211_NOLINK))))
13385 + renew = 1;
13386 + //YJ,add,080819,for hidden ap,end
13387 +
13388 + update_network(target, &network);
13389 + if(renew && (ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE))
13390 + ieee80211_softmac_new_net(ieee,&network);
13391 + }
13392 +
13393 + spin_unlock_irqrestore(&ieee->lock, flags);
13394 + if (is_beacon(beacon->header.frame_ctl)&&is_same_network(&ieee->current_network, &network, ieee)&&\
13395 + (ieee->state == IEEE80211_LINKED)) {
13396 + if(ieee->handle_beacon != NULL) {
13397 + ieee->handle_beacon(ieee->dev,beacon,&ieee->current_network);
13398 + }
13399 + }
13400 +}
13401 +
13402 +void ieee80211_rx_mgt(struct ieee80211_device *ieee,
13403 + struct ieee80211_hdr_4addr *header,
13404 + struct ieee80211_rx_stats *stats)
13405 +{
13406 + if(ieee->sta_sleep || (ieee->ps != IEEE80211_PS_DISABLED &&
13407 + ieee->iw_mode == IW_MODE_INFRA &&
13408 + ieee->state == IEEE80211_LINKED))
13409 + {
13410 + tasklet_schedule(&ieee->ps_task);
13411 + }
13412 +
13413 + if(WLAN_FC_GET_STYPE(header->frame_ctl) != IEEE80211_STYPE_PROBE_RESP &&
13414 + WLAN_FC_GET_STYPE(header->frame_ctl) != IEEE80211_STYPE_BEACON)
13415 + ieee->last_rx_ps_time = jiffies;
13416 +
13417 + switch (WLAN_FC_GET_STYPE(header->frame_ctl)) {
13418 +
13419 + case IEEE80211_STYPE_BEACON:
13420 + IEEE80211_DEBUG_MGMT("received BEACON (%d)\n",
13421 + WLAN_FC_GET_STYPE(header->frame_ctl));
13422 + IEEE80211_DEBUG_SCAN("Beacon\n");
13423 + ieee80211_process_probe_response(
13424 + ieee, (struct ieee80211_probe_response *)header, stats);
13425 + break;
13426 +
13427 + case IEEE80211_STYPE_PROBE_RESP:
13428 + IEEE80211_DEBUG_MGMT("received PROBE RESPONSE (%d)\n",
13429 + WLAN_FC_GET_STYPE(header->frame_ctl));
13430 + IEEE80211_DEBUG_SCAN("Probe response\n");
13431 + ieee80211_process_probe_response(
13432 + ieee, (struct ieee80211_probe_response *)header, stats);
13433 + break;
13434 +
13435 + }
13436 +}
13437 +
13438 +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
13439 +//EXPORT_SYMBOL(ieee80211_rx_mgt);
13440 +//EXPORT_SYMBOL(ieee80211_rx);
13441 +#else
13442 +EXPORT_SYMBOL_NOVERS(ieee80211_rx_mgt);
13443 +EXPORT_SYMBOL_NOVERS(ieee80211_rx);
13444 +#endif
13445 --- /dev/null
13446 +++ b/drivers/staging/rtl8192e/ieee80211/ieee80211_softmac.c
13447 @@ -0,0 +1,3548 @@
13448 +/* IEEE 802.11 SoftMAC layer
13449 + * Copyright (c) 2005 Andrea Merello <andreamrl@tiscali.it>
13450 + *
13451 + * Mostly extracted from the rtl8180-sa2400 driver for the
13452 + * in-kernel generic ieee802.11 stack.
13453 + *
13454 + * Few lines might be stolen from other part of the ieee80211
13455 + * stack. Copyright who own it's copyright
13456 + *
13457 + * WPA code stolen from the ipw2200 driver.
13458 + * Copyright who own it's copyright.
13459 + *
13460 + * released under the GPL
13461 + */
13462 +
13463 +
13464 +#include "ieee80211.h"
13465 +
13466 +#include <linux/random.h>
13467 +#include <linux/delay.h>
13468 +#include <linux/version.h>
13469 +#include <asm/uaccess.h>
13470 +#ifdef ENABLE_DOT11D
13471 +#include "dot11d.h"
13472 +#endif
13473 +
13474 +u8 rsn_authen_cipher_suite[16][4] = {
13475 + {0x00,0x0F,0xAC,0x00}, //Use group key, //Reserved
13476 + {0x00,0x0F,0xAC,0x01}, //WEP-40 //RSNA default
13477 + {0x00,0x0F,0xAC,0x02}, //TKIP //NONE //{used just as default}
13478 + {0x00,0x0F,0xAC,0x03}, //WRAP-historical
13479 + {0x00,0x0F,0xAC,0x04}, //CCMP
13480 + {0x00,0x0F,0xAC,0x05}, //WEP-104
13481 +};
13482 +
13483 +short ieee80211_is_54g(struct ieee80211_network net)
13484 +{
13485 + return ((net.rates_ex_len > 0) || (net.rates_len > 4));
13486 +}
13487 +
13488 +short ieee80211_is_shortslot(struct ieee80211_network net)
13489 +{
13490 + return (net.capability & WLAN_CAPABILITY_SHORT_SLOT);
13491 +}
13492 +
13493 +/* returns the total length needed for pleacing the RATE MFIE
13494 + * tag and the EXTENDED RATE MFIE tag if needed.
13495 + * It encludes two bytes per tag for the tag itself and its len
13496 + */
13497 +unsigned int ieee80211_MFIE_rate_len(struct ieee80211_device *ieee)
13498 +{
13499 + unsigned int rate_len = 0;
13500 +
13501 + if (ieee->modulation & IEEE80211_CCK_MODULATION)
13502 + rate_len = IEEE80211_CCK_RATE_LEN + 2;
13503 +
13504 + if (ieee->modulation & IEEE80211_OFDM_MODULATION)
13505 +
13506 + rate_len += IEEE80211_OFDM_RATE_LEN + 2;
13507 +
13508 + return rate_len;
13509 +}
13510 +
13511 +/* pleace the MFIE rate, tag to the memory (double) poined.
13512 + * Then it updates the pointer so that
13513 + * it points after the new MFIE tag added.
13514 + */
13515 +void ieee80211_MFIE_Brate(struct ieee80211_device *ieee, u8 **tag_p)
13516 +{
13517 + u8 *tag = *tag_p;
13518 +
13519 + if (ieee->modulation & IEEE80211_CCK_MODULATION){
13520 + *tag++ = MFIE_TYPE_RATES;
13521 + *tag++ = 4;
13522 + *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_1MB;
13523 + *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_2MB;
13524 + *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_5MB;
13525 + *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_11MB;
13526 + }
13527 +
13528 + /* We may add an option for custom rates that specific HW might support */
13529 + *tag_p = tag;
13530 +}
13531 +
13532 +void ieee80211_MFIE_Grate(struct ieee80211_device *ieee, u8 **tag_p)
13533 +{
13534 + u8 *tag = *tag_p;
13535 +
13536 + if (ieee->modulation & IEEE80211_OFDM_MODULATION){
13537 +
13538 + *tag++ = MFIE_TYPE_RATES_EX;
13539 + *tag++ = 8;
13540 + *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_6MB;
13541 + *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_9MB;
13542 + *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_12MB;
13543 + *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_18MB;
13544 + *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_24MB;
13545 + *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_36MB;
13546 + *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_48MB;
13547 + *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_54MB;
13548 +
13549 + }
13550 +
13551 + /* We may add an option for custom rates that specific HW might support */
13552 + *tag_p = tag;
13553 +}
13554 +
13555 +
13556 +void ieee80211_WMM_Info(struct ieee80211_device *ieee, u8 **tag_p) {
13557 + u8 *tag = *tag_p;
13558 +
13559 + *tag++ = MFIE_TYPE_GENERIC; //0
13560 + *tag++ = 7;
13561 + *tag++ = 0x00;
13562 + *tag++ = 0x50;
13563 + *tag++ = 0xf2;
13564 + *tag++ = 0x02;//5
13565 + *tag++ = 0x00;
13566 + *tag++ = 0x01;
13567 +#ifdef SUPPORT_USPD
13568 + if(ieee->current_network.wmm_info & 0x80) {
13569 + *tag++ = 0x0f|MAX_SP_Len;
13570 + } else {
13571 + *tag++ = MAX_SP_Len;
13572 + }
13573 +#else
13574 + *tag++ = MAX_SP_Len;
13575 +#endif
13576 + *tag_p = tag;
13577 +}
13578 +
13579 +#ifdef THOMAS_TURBO
13580 +void ieee80211_TURBO_Info(struct ieee80211_device *ieee, u8 **tag_p) {
13581 + u8 *tag = *tag_p;
13582 +
13583 + *tag++ = MFIE_TYPE_GENERIC; //0
13584 + *tag++ = 7;
13585 + *tag++ = 0x00;
13586 + *tag++ = 0xe0;
13587 + *tag++ = 0x4c;
13588 + *tag++ = 0x01;//5
13589 + *tag++ = 0x02;
13590 + *tag++ = 0x11;
13591 + *tag++ = 0x00;
13592 +
13593 + *tag_p = tag;
13594 + printk(KERN_ALERT "This is enable turbo mode IE process\n");
13595 +}
13596 +#endif
13597 +
13598 +void enqueue_mgmt(struct ieee80211_device *ieee, struct sk_buff *skb)
13599 +{
13600 + int nh;
13601 + nh = (ieee->mgmt_queue_head +1) % MGMT_QUEUE_NUM;
13602 +
13603 +/*
13604 + * if the queue is full but we have newer frames then
13605 + * just overwrites the oldest.
13606 + *
13607 + * if (nh == ieee->mgmt_queue_tail)
13608 + * return -1;
13609 + */
13610 + ieee->mgmt_queue_head = nh;
13611 + ieee->mgmt_queue_ring[nh] = skb;
13612 +
13613 + //return 0;
13614 +}
13615 +
13616 +struct sk_buff *dequeue_mgmt(struct ieee80211_device *ieee)
13617 +{
13618 + struct sk_buff *ret;
13619 +
13620 + if(ieee->mgmt_queue_tail == ieee->mgmt_queue_head)
13621 + return NULL;
13622 +
13623 + ret = ieee->mgmt_queue_ring[ieee->mgmt_queue_tail];
13624 +
13625 + ieee->mgmt_queue_tail =
13626 + (ieee->mgmt_queue_tail+1) % MGMT_QUEUE_NUM;
13627 +
13628 + return ret;
13629 +}
13630 +
13631 +void init_mgmt_queue(struct ieee80211_device *ieee)
13632 +{
13633 + ieee->mgmt_queue_tail = ieee->mgmt_queue_head = 0;
13634 +}
13635 +
13636 +u8 MgntQuery_MgntFrameTxRate(struct ieee80211_device *ieee)
13637 +{
13638 + PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
13639 + u8 rate;
13640 +
13641 + // 2008/01/25 MH For broadcom, MGNT frame set as OFDM 6M.
13642 + if(pHTInfo->IOTAction & HT_IOT_ACT_MGNT_USE_CCK_6M)
13643 + rate = 0x0c;
13644 + else
13645 + rate = ieee->basic_rate & 0x7f;
13646 +
13647 + if(rate == 0){
13648 + // 2005.01.26, by rcnjko.
13649 + if(ieee->mode == IEEE_A||
13650 + ieee->mode== IEEE_N_5G||
13651 + (ieee->mode== IEEE_N_24G&&!pHTInfo->bCurSuppCCK))
13652 + rate = 0x0c;
13653 + else
13654 + rate = 0x02;
13655 + }
13656 +
13657 + /*
13658 + // Data rate of ProbeReq is already decided. Annie, 2005-03-31
13659 + if( pMgntInfo->bScanInProgress || (pMgntInfo->bDualModeScanStep!=0) )
13660 + {
13661 + if(pMgntInfo->dot11CurrentWirelessMode==WIRELESS_MODE_A)
13662 + rate = 0x0c;
13663 + else
13664 + rate = 0x02;
13665 + }
13666 + */
13667 + return rate;
13668 +}
13669 +
13670 +
13671 +void ieee80211_sta_wakeup(struct ieee80211_device *ieee, short nl);
13672 +
13673 +inline void softmac_mgmt_xmit(struct sk_buff *skb, struct ieee80211_device *ieee)
13674 +{
13675 + unsigned long flags;
13676 + short single = ieee->softmac_features & IEEE_SOFTMAC_SINGLE_QUEUE;
13677 + struct ieee80211_hdr_3addr *header=
13678 + (struct ieee80211_hdr_3addr *) skb->data;
13679 +
13680 + cb_desc *tcb_desc = (cb_desc *)(skb->cb + 8);
13681 + spin_lock_irqsave(&ieee->lock, flags);
13682 +
13683 + /* called with 2nd param 0, no mgmt lock required */
13684 + ieee80211_sta_wakeup(ieee,0);
13685 +
13686 + tcb_desc->queue_index = MGNT_QUEUE;
13687 + tcb_desc->data_rate = MgntQuery_MgntFrameTxRate(ieee);
13688 + tcb_desc->RATRIndex = 7;
13689 + tcb_desc->bTxDisableRateFallBack = 1;
13690 + tcb_desc->bTxUseDriverAssingedRate = 1;
13691 +
13692 + if(single){
13693 + if(ieee->queue_stop){
13694 + enqueue_mgmt(ieee,skb);
13695 + }else{
13696 + header->seq_ctl = cpu_to_le16(ieee->seq_ctrl[0]<<4);
13697 +
13698 + if (ieee->seq_ctrl[0] == 0xFFF)
13699 + ieee->seq_ctrl[0] = 0;
13700 + else
13701 + ieee->seq_ctrl[0]++;
13702 +
13703 + /* avoid watchdog triggers */
13704 + // ieee->dev->trans_start = jiffies;
13705 + ieee->softmac_data_hard_start_xmit(skb,ieee->dev,ieee->basic_rate);
13706 + //dev_kfree_skb_any(skb);//edit by thomas
13707 + }
13708 +
13709 + spin_unlock_irqrestore(&ieee->lock, flags);
13710 + }else{
13711 + spin_unlock_irqrestore(&ieee->lock, flags);
13712 + spin_lock_irqsave(&ieee->mgmt_tx_lock, flags);
13713 +
13714 + header->seq_ctl = cpu_to_le16(ieee->seq_ctrl[0] << 4);
13715 +
13716 + if (ieee->seq_ctrl[0] == 0xFFF)
13717 + ieee->seq_ctrl[0] = 0;
13718 + else
13719 + ieee->seq_ctrl[0]++;
13720 +
13721 + /* check wether the managed packet queued greater than 5 */
13722 + if(!ieee->check_nic_enough_desc(ieee->dev,tcb_desc->queue_index)||\
13723 + (skb_queue_len(&ieee->skb_waitQ[tcb_desc->queue_index]) != 0)||\
13724 + (ieee->queue_stop) ) {
13725 + /* insert the skb packet to the management queue */
13726 + /* as for the completion function, it does not need
13727 + * to check it any more.
13728 + * */
13729 + printk("%s():insert to waitqueue!\n",__FUNCTION__);
13730 + skb_queue_tail(&ieee->skb_waitQ[tcb_desc->queue_index], skb);
13731 + } else {
13732 + //printk("TX packet!\n");
13733 + ieee->softmac_hard_start_xmit(skb,ieee->dev);
13734 + //dev_kfree_skb_any(skb);//edit by thomas
13735 + }
13736 + spin_unlock_irqrestore(&ieee->mgmt_tx_lock, flags);
13737 + }
13738 +}
13739 +
13740 +inline void softmac_ps_mgmt_xmit(struct sk_buff *skb, struct ieee80211_device *ieee)
13741 +{
13742 +
13743 + short single = ieee->softmac_features & IEEE_SOFTMAC_SINGLE_QUEUE;
13744 + struct ieee80211_hdr_3addr *header =
13745 + (struct ieee80211_hdr_3addr *) skb->data;
13746 + cb_desc *tcb_desc = (cb_desc *)(skb->cb + 8);
13747 +
13748 + tcb_desc->queue_index = MGNT_QUEUE;
13749 + tcb_desc->data_rate = MgntQuery_MgntFrameTxRate(ieee);
13750 + tcb_desc->RATRIndex = 7;
13751 + tcb_desc->bTxDisableRateFallBack = 1;
13752 + tcb_desc->bTxUseDriverAssingedRate = 1;
13753 + //printk("=============>%s()\n", __FUNCTION__);
13754 + if(single){
13755 +
13756 + header->seq_ctl = cpu_to_le16(ieee->seq_ctrl[0] << 4);
13757 +
13758 + if (ieee->seq_ctrl[0] == 0xFFF)
13759 + ieee->seq_ctrl[0] = 0;
13760 + else
13761 + ieee->seq_ctrl[0]++;
13762 +
13763 + /* avoid watchdog triggers */
13764 + // ieee->dev->trans_start = jiffies;
13765 + ieee->softmac_data_hard_start_xmit(skb,ieee->dev,ieee->basic_rate);
13766 +
13767 + }else{
13768 +
13769 + header->seq_ctl = cpu_to_le16(ieee->seq_ctrl[0] << 4);
13770 +
13771 + if (ieee->seq_ctrl[0] == 0xFFF)
13772 + ieee->seq_ctrl[0] = 0;
13773 + else
13774 + ieee->seq_ctrl[0]++;
13775 +
13776 + ieee->softmac_hard_start_xmit(skb,ieee->dev);
13777 +
13778 + }
13779 + //dev_kfree_skb_any(skb);//edit by thomas
13780 +}
13781 +
13782 +inline struct sk_buff *ieee80211_probe_req(struct ieee80211_device *ieee)
13783 +{
13784 + unsigned int len,rate_len;
13785 + u8 *tag;
13786 + struct sk_buff *skb;
13787 + struct ieee80211_probe_request *req;
13788 +
13789 + len = ieee->current_network.ssid_len;
13790 +
13791 + rate_len = ieee80211_MFIE_rate_len(ieee);
13792 +
13793 + skb = dev_alloc_skb(sizeof(struct ieee80211_probe_request) +
13794 + 2 + len + rate_len + ieee->tx_headroom);
13795 + if (!skb)
13796 + return NULL;
13797 +
13798 + skb_reserve(skb, ieee->tx_headroom);
13799 +
13800 + req = (struct ieee80211_probe_request *) skb_put(skb,sizeof(struct ieee80211_probe_request));
13801 + req->header.frame_ctl = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
13802 + req->header.duration_id = 0; //FIXME: is this OK ?
13803 +
13804 + memset(req->header.addr1, 0xff, ETH_ALEN);
13805 + memcpy(req->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
13806 + memset(req->header.addr3, 0xff, ETH_ALEN);
13807 +
13808 + tag = (u8 *) skb_put(skb,len+2+rate_len);
13809 +
13810 + *tag++ = MFIE_TYPE_SSID;
13811 + *tag++ = len;
13812 + memcpy(tag, ieee->current_network.ssid, len);
13813 + tag += len;
13814 +
13815 + ieee80211_MFIE_Brate(ieee,&tag);
13816 + ieee80211_MFIE_Grate(ieee,&tag);
13817 + return skb;
13818 +}
13819 +
13820 +struct sk_buff *ieee80211_get_beacon_(struct ieee80211_device *ieee);
13821 +void ieee80211_send_beacon(struct ieee80211_device *ieee)
13822 +{
13823 + struct sk_buff *skb;
13824 + if(!ieee->ieee_up)
13825 + return;
13826 + //unsigned long flags;
13827 + skb = ieee80211_get_beacon_(ieee);
13828 +
13829 + if (skb){
13830 + softmac_mgmt_xmit(skb, ieee);
13831 + ieee->softmac_stats.tx_beacons++;
13832 + //dev_kfree_skb_any(skb);//edit by thomas
13833 + }
13834 +// ieee->beacon_timer.expires = jiffies +
13835 +// (MSECS( ieee->current_network.beacon_interval -5));
13836 +
13837 + //spin_lock_irqsave(&ieee->beacon_lock,flags);
13838 + if(ieee->beacon_txing && ieee->ieee_up){
13839 +// if(!timer_pending(&ieee->beacon_timer))
13840 +// add_timer(&ieee->beacon_timer);
13841 + mod_timer(&ieee->beacon_timer,jiffies+(MSECS(ieee->current_network.beacon_interval-5)));
13842 + }
13843 + //spin_unlock_irqrestore(&ieee->beacon_lock,flags);
13844 +}
13845 +
13846 +
13847 +void ieee80211_send_beacon_cb(unsigned long _ieee)
13848 +{
13849 + struct ieee80211_device *ieee =
13850 + (struct ieee80211_device *) _ieee;
13851 + unsigned long flags;
13852 +
13853 + spin_lock_irqsave(&ieee->beacon_lock, flags);
13854 + ieee80211_send_beacon(ieee);
13855 + spin_unlock_irqrestore(&ieee->beacon_lock, flags);
13856 +}
13857 +
13858 +
13859 +void ieee80211_send_probe(struct ieee80211_device *ieee)
13860 +{
13861 + struct sk_buff *skb;
13862 +
13863 + skb = ieee80211_probe_req(ieee);
13864 + if (skb){
13865 + softmac_mgmt_xmit(skb, ieee);
13866 + ieee->softmac_stats.tx_probe_rq++;
13867 + //dev_kfree_skb_any(skb);//edit by thomas
13868 + }
13869 +}
13870 +
13871 +void ieee80211_send_probe_requests(struct ieee80211_device *ieee)
13872 +{
13873 + if (ieee->active_scan && (ieee->softmac_features & IEEE_SOFTMAC_PROBERQ)){
13874 + ieee80211_send_probe(ieee);
13875 + ieee80211_send_probe(ieee);
13876 + }
13877 +}
13878 +
13879 +/* this performs syncro scan blocking the caller until all channels
13880 + * in the allowed channel map has been checked.
13881 + */
13882 +void ieee80211_softmac_scan_syncro(struct ieee80211_device *ieee)
13883 +{
13884 + short ch = 0;
13885 +#ifdef ENABLE_DOT11D
13886 + u8 channel_map[MAX_CHANNEL_NUMBER+1];
13887 + memcpy(channel_map, GET_DOT11D_INFO(ieee)->channel_map, MAX_CHANNEL_NUMBER+1);
13888 +#endif
13889 + down(&ieee->scan_sem);
13890 +
13891 + while(1)
13892 + {
13893 +
13894 + do{
13895 + ch++;
13896 + if (ch > MAX_CHANNEL_NUMBER)
13897 + goto out; /* scan completed */
13898 +#ifdef ENABLE_DOT11D
13899 + }while(!channel_map[ch]);
13900 +#else
13901 + }while(!ieee->channel_map[ch]);
13902 +#endif
13903 +
13904 + /* this fuction can be called in two situations
13905 + * 1- We have switched to ad-hoc mode and we are
13906 + * performing a complete syncro scan before conclude
13907 + * there are no interesting cell and to create a
13908 + * new one. In this case the link state is
13909 + * IEEE80211_NOLINK until we found an interesting cell.
13910 + * If so the ieee8021_new_net, called by the RX path
13911 + * will set the state to IEEE80211_LINKED, so we stop
13912 + * scanning
13913 + * 2- We are linked and the root uses run iwlist scan.
13914 + * So we switch to IEEE80211_LINKED_SCANNING to remember
13915 + * that we are still logically linked (not interested in
13916 + * new network events, despite for updating the net list,
13917 + * but we are temporarly 'unlinked' as the driver shall
13918 + * not filter RX frames and the channel is changing.
13919 + * So the only situation in witch are interested is to check
13920 + * if the state become LINKED because of the #1 situation
13921 + */
13922 +
13923 + if (ieee->state == IEEE80211_LINKED)
13924 + goto out;
13925 + ieee->set_chan(ieee->dev, ch);
13926 +#ifdef ENABLE_DOT11D
13927 + if(channel_map[ch] == 1)
13928 +#endif
13929 + ieee80211_send_probe_requests(ieee);
13930 +
13931 + /* this prevent excessive time wait when we
13932 + * need to wait for a syncro scan to end..
13933 + */
13934 + if(ieee->state < IEEE80211_LINKED)
13935 + ;
13936 + else
13937 + if (ieee->sync_scan_hurryup)
13938 + goto out;
13939 +
13940 +
13941 + msleep_interruptible_rsl(IEEE80211_SOFTMAC_SCAN_TIME);
13942 +
13943 + }
13944 +out:
13945 + if(ieee->state < IEEE80211_LINKED){
13946 + ieee->actscanning = false;
13947 + up(&ieee->scan_sem);
13948 + }
13949 + else{
13950 + ieee->sync_scan_hurryup = 0;
13951 +#ifdef ENABLE_DOT11D
13952 + if(IS_DOT11D_ENABLE(ieee))
13953 + DOT11D_ScanComplete(ieee);
13954 +#endif
13955 + up(&ieee->scan_sem);
13956 +}
13957 +}
13958 +
13959 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
13960 +/* called both by wq with ieee->lock held */
13961 +void ieee80211_softmac_scan(struct ieee80211_device *ieee)
13962 +{
13963 +#if 0
13964 + short watchdog = 0;
13965 + do{
13966 + ieee->current_network.channel =
13967 + (ieee->current_network.channel + 1) % MAX_CHANNEL_NUMBER;
13968 + if (watchdog++ > MAX_CHANNEL_NUMBER)
13969 + return; /* no good chans */
13970 +
13971 + }while(!ieee->channel_map[ieee->current_network.channel]);
13972 +#endif
13973 +
13974 + schedule_task(&ieee->softmac_scan_wq);
13975 +}
13976 +#endif
13977 +
13978 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
13979 +void ieee80211_softmac_scan_wq(struct work_struct *work)
13980 +{
13981 + struct delayed_work *dwork = container_of(work, struct delayed_work, work);
13982 + struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, softmac_scan_wq);
13983 +#else
13984 +void ieee80211_softmac_scan_wq(struct ieee80211_device *ieee)
13985 +{
13986 +#endif
13987 + static short watchdog = 0;
13988 + u8 last_channel = ieee->current_network.channel;
13989 +#ifdef ENABLE_DOT11D
13990 + u8 channel_map[MAX_CHANNEL_NUMBER+1];
13991 + memcpy(channel_map, GET_DOT11D_INFO(ieee)->channel_map, MAX_CHANNEL_NUMBER+1);
13992 +#endif
13993 + if(!ieee->ieee_up)
13994 + return;
13995 + down(&ieee->scan_sem);
13996 + do{
13997 + ieee->current_network.channel =
13998 + (ieee->current_network.channel + 1) % MAX_CHANNEL_NUMBER;
13999 + if (watchdog++ > MAX_CHANNEL_NUMBER)
14000 + {
14001 + //if current channel is not in channel map, set to default channel.
14002 + #ifdef ENABLE_DOT11D
14003 + if (!channel_map[ieee->current_network.channel]);
14004 + #else
14005 + if (!ieee->channel_map[ieee->current_network.channel]);
14006 + #endif
14007 + ieee->current_network.channel = 6;
14008 + goto out; /* no good chans */
14009 + }
14010 +#ifdef ENABLE_DOT11D
14011 + }while(!channel_map[ieee->current_network.channel]);
14012 +#else
14013 + }while(!ieee->channel_map[ieee->current_network.channel]);
14014 +#endif
14015 + if (ieee->scanning == 0 )
14016 + goto out;
14017 + ieee->set_chan(ieee->dev, ieee->current_network.channel);
14018 +#ifdef ENABLE_DOT11D
14019 + if(channel_map[ieee->current_network.channel] == 1)
14020 +#endif
14021 + ieee80211_send_probe_requests(ieee);
14022 +
14023 +
14024 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
14025 + queue_delayed_work(ieee->wq, &ieee->softmac_scan_wq, IEEE80211_SOFTMAC_SCAN_TIME);
14026 +#else
14027 + //ieee->scan_timer.expires = jiffies + MSECS(IEEE80211_SOFTMAC_SCAN_TIME);
14028 + if (ieee->scanning == 1)
14029 + mod_timer(&ieee->scan_timer,(jiffies + MSECS(IEEE80211_SOFTMAC_SCAN_TIME)));
14030 +#endif
14031 +
14032 + up(&ieee->scan_sem);
14033 + return;
14034 +out:
14035 +#ifdef ENABLE_DOT11D
14036 + if(IS_DOT11D_ENABLE(ieee))
14037 + DOT11D_ScanComplete(ieee);
14038 +#endif
14039 + ieee->current_network.channel = last_channel;
14040 + ieee->actscanning = false;
14041 + watchdog = 0;
14042 + ieee->scanning = 0;
14043 + up(&ieee->scan_sem);
14044 +}
14045 +
14046 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
14047 +void ieee80211_softmac_scan_cb(unsigned long _dev)
14048 +{
14049 + unsigned long flags;
14050 + struct ieee80211_device *ieee = (struct ieee80211_device *)_dev;
14051 +
14052 + spin_lock_irqsave(&ieee->lock, flags);
14053 + ieee80211_softmac_scan(ieee);
14054 + spin_unlock_irqrestore(&ieee->lock, flags);
14055 +}
14056 +#endif
14057 +
14058 +
14059 +void ieee80211_beacons_start(struct ieee80211_device *ieee)
14060 +{
14061 + unsigned long flags;
14062 + spin_lock_irqsave(&ieee->beacon_lock,flags);
14063 +
14064 + ieee->beacon_txing = 1;
14065 + ieee80211_send_beacon(ieee);
14066 +
14067 + spin_unlock_irqrestore(&ieee->beacon_lock,flags);
14068 +}
14069 +
14070 +void ieee80211_beacons_stop(struct ieee80211_device *ieee)
14071 +{
14072 + unsigned long flags;
14073 +
14074 + spin_lock_irqsave(&ieee->beacon_lock,flags);
14075 +
14076 + ieee->beacon_txing = 0;
14077 + del_timer_sync(&ieee->beacon_timer);
14078 +
14079 + spin_unlock_irqrestore(&ieee->beacon_lock,flags);
14080 +
14081 +}
14082 +
14083 +
14084 +void ieee80211_stop_send_beacons(struct ieee80211_device *ieee)
14085 +{
14086 + if(ieee->stop_send_beacons)
14087 + ieee->stop_send_beacons(ieee->dev);
14088 + if (ieee->softmac_features & IEEE_SOFTMAC_BEACONS)
14089 + ieee80211_beacons_stop(ieee);
14090 +}
14091 +
14092 +
14093 +void ieee80211_start_send_beacons(struct ieee80211_device *ieee)
14094 +{
14095 + if(ieee->start_send_beacons)
14096 + ieee->start_send_beacons(ieee->dev,ieee->basic_rate);
14097 + if(ieee->softmac_features & IEEE_SOFTMAC_BEACONS)
14098 + ieee80211_beacons_start(ieee);
14099 +}
14100 +
14101 +
14102 +void ieee80211_softmac_stop_scan(struct ieee80211_device *ieee)
14103 +{
14104 +// unsigned long flags;
14105 +
14106 + //ieee->sync_scan_hurryup = 1;
14107 +
14108 + down(&ieee->scan_sem);
14109 +// spin_lock_irqsave(&ieee->lock, flags);
14110 +
14111 + if (ieee->scanning == 1){
14112 + ieee->scanning = 0;
14113 +
14114 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
14115 + cancel_delayed_work(&ieee->softmac_scan_wq);
14116 +#else
14117 + del_timer_sync(&ieee->scan_timer);
14118 +#endif
14119 + }
14120 +
14121 +// spin_unlock_irqrestore(&ieee->lock, flags);
14122 + up(&ieee->scan_sem);
14123 +}
14124 +
14125 +void ieee80211_stop_scan(struct ieee80211_device *ieee)
14126 +{
14127 + if (ieee->softmac_features & IEEE_SOFTMAC_SCAN)
14128 + ieee80211_softmac_stop_scan(ieee);
14129 + else
14130 + ieee->stop_scan(ieee->dev);
14131 +}
14132 +
14133 +/* called with ieee->lock held */
14134 +void ieee80211_start_scan(struct ieee80211_device *ieee)
14135 +{
14136 +#ifdef ENABLE_DOT11D
14137 + if(IS_DOT11D_ENABLE(ieee) )
14138 + {
14139 + if(IS_COUNTRY_IE_VALID(ieee))
14140 + {
14141 + RESET_CIE_WATCHDOG(ieee);
14142 + }
14143 + }
14144 +#endif
14145 + if (ieee->softmac_features & IEEE_SOFTMAC_SCAN){
14146 + if (ieee->scanning == 0){
14147 + ieee->scanning = 1;
14148 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
14149 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
14150 + queue_delayed_work(ieee->wq, &ieee->softmac_scan_wq, 0);
14151 +#else
14152 +
14153 + queue_work(ieee->wq, &ieee->softmac_scan_wq);
14154 +#endif
14155 +#else
14156 + ieee80211_softmac_scan(ieee);
14157 +#endif
14158 + }
14159 + }else
14160 + ieee->start_scan(ieee->dev);
14161 +
14162 +}
14163 +
14164 +/* called with wx_sem held */
14165 +void ieee80211_start_scan_syncro(struct ieee80211_device *ieee)
14166 +{
14167 +#ifdef ENABLE_DOT11D
14168 + if(IS_DOT11D_ENABLE(ieee) )
14169 + {
14170 + if(IS_COUNTRY_IE_VALID(ieee))
14171 + {
14172 + RESET_CIE_WATCHDOG(ieee);
14173 + }
14174 + }
14175 +#endif
14176 + ieee->sync_scan_hurryup = 0;
14177 + if (ieee->softmac_features & IEEE_SOFTMAC_SCAN)
14178 + ieee80211_softmac_scan_syncro(ieee);
14179 + else
14180 + ieee->scan_syncro(ieee->dev);
14181 +
14182 +}
14183 +
14184 +inline struct sk_buff *ieee80211_authentication_req(struct ieee80211_network *beacon,
14185 + struct ieee80211_device *ieee, int challengelen)
14186 +{
14187 + struct sk_buff *skb;
14188 + struct ieee80211_authentication *auth;
14189 + int len = sizeof(struct ieee80211_authentication) + challengelen + ieee->tx_headroom;
14190 +
14191 +
14192 + skb = dev_alloc_skb(len);
14193 + if (!skb) return NULL;
14194 +
14195 + skb_reserve(skb, ieee->tx_headroom);
14196 + auth = (struct ieee80211_authentication *)
14197 + skb_put(skb, sizeof(struct ieee80211_authentication));
14198 +
14199 + auth->header.frame_ctl = IEEE80211_STYPE_AUTH;
14200 + if (challengelen) auth->header.frame_ctl |= IEEE80211_FCTL_WEP;
14201 +
14202 + auth->header.duration_id = 0x013a; //FIXME
14203 +
14204 + memcpy(auth->header.addr1, beacon->bssid, ETH_ALEN);
14205 + memcpy(auth->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
14206 + memcpy(auth->header.addr3, beacon->bssid, ETH_ALEN);
14207 +
14208 + //auth->algorithm = ieee->open_wep ? WLAN_AUTH_OPEN : WLAN_AUTH_SHARED_KEY;
14209 + if(ieee->auth_mode == 0)
14210 + auth->algorithm = WLAN_AUTH_OPEN;
14211 + else if(ieee->auth_mode == 1)
14212 + auth->algorithm = WLAN_AUTH_SHARED_KEY;
14213 + else if(ieee->auth_mode == 2)
14214 + auth->algorithm = WLAN_AUTH_OPEN;//0x80;
14215 + printk("=================>%s():auth->algorithm is %d\n",__FUNCTION__,auth->algorithm);
14216 + auth->transaction = cpu_to_le16(ieee->associate_seq);
14217 + ieee->associate_seq++;
14218 +
14219 + auth->status = cpu_to_le16(WLAN_STATUS_SUCCESS);
14220 +
14221 + return skb;
14222 +
14223 +}
14224 +
14225 +
14226 +static struct sk_buff* ieee80211_probe_resp(struct ieee80211_device *ieee, u8 *dest)
14227 +{
14228 + u8 *tag;
14229 + int beacon_size;
14230 + struct ieee80211_probe_response *beacon_buf;
14231 + struct sk_buff *skb = NULL;
14232 + int encrypt;
14233 + int atim_len,erp_len;
14234 + struct ieee80211_crypt_data* crypt;
14235 +
14236 + char *ssid = ieee->current_network.ssid;
14237 + int ssid_len = ieee->current_network.ssid_len;
14238 + int rate_len = ieee->current_network.rates_len+2;
14239 + int rate_ex_len = ieee->current_network.rates_ex_len;
14240 + int wpa_ie_len = ieee->wpa_ie_len;
14241 + u8 erpinfo_content = 0;
14242 +
14243 + u8* tmp_ht_cap_buf;
14244 + u8 tmp_ht_cap_len=0;
14245 + u8* tmp_ht_info_buf;
14246 + u8 tmp_ht_info_len=0;
14247 + PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
14248 + u8* tmp_generic_ie_buf=NULL;
14249 + u8 tmp_generic_ie_len=0;
14250 +
14251 + if(rate_ex_len > 0) rate_ex_len+=2;
14252 +
14253 + if(ieee->current_network.capability & WLAN_CAPABILITY_IBSS)
14254 + atim_len = 4;
14255 + else
14256 + atim_len = 0;
14257 +
14258 +#if 1
14259 + if(ieee80211_is_54g(ieee->current_network))
14260 + erp_len = 3;
14261 + else
14262 + erp_len = 0;
14263 +#else
14264 + if((ieee->current_network.mode == IEEE_G)
14265 + ||( ieee->current_network.mode == IEEE_N_24G && ieee->pHTInfo->bCurSuppCCK)) {
14266 + erp_len = 3;
14267 + erpinfo_content = 0;
14268 + if(ieee->current_network.buseprotection)
14269 + erpinfo_content |= ERP_UseProtection;
14270 + }
14271 + else
14272 + erp_len = 0;
14273 +#endif
14274 +
14275 +
14276 + crypt = ieee->crypt[ieee->tx_keyidx];
14277 +
14278 +
14279 + encrypt = ieee->host_encrypt && crypt && crypt->ops &&
14280 + ((0 == strcmp(crypt->ops->name, "WEP") || wpa_ie_len));
14281 + //HT ralated element
14282 +#if 1
14283 + tmp_ht_cap_buf =(u8*) &(ieee->pHTInfo->SelfHTCap);
14284 + tmp_ht_cap_len = sizeof(ieee->pHTInfo->SelfHTCap);
14285 + tmp_ht_info_buf =(u8*) &(ieee->pHTInfo->SelfHTInfo);
14286 + tmp_ht_info_len = sizeof(ieee->pHTInfo->SelfHTInfo);
14287 + HTConstructCapabilityElement(ieee, tmp_ht_cap_buf, &tmp_ht_cap_len,encrypt);
14288 + HTConstructInfoElement(ieee,tmp_ht_info_buf,&tmp_ht_info_len, encrypt);
14289 +
14290 +
14291 + if(pHTInfo->bRegRT2RTAggregation)
14292 + {
14293 + tmp_generic_ie_buf = ieee->pHTInfo->szRT2RTAggBuffer;
14294 + tmp_generic_ie_len = sizeof(ieee->pHTInfo->szRT2RTAggBuffer);
14295 + HTConstructRT2RTAggElement(ieee, tmp_generic_ie_buf, &tmp_generic_ie_len);
14296 + }
14297 +// printk("===============>tmp_ht_cap_len is %d,tmp_ht_info_len is %d, tmp_generic_ie_len is %d\n",tmp_ht_cap_len,tmp_ht_info_len,tmp_generic_ie_len);
14298 +#endif
14299 + beacon_size = sizeof(struct ieee80211_probe_response)+2+
14300 + ssid_len
14301 + +3 //channel
14302 + +rate_len
14303 + +rate_ex_len
14304 + +atim_len
14305 + +erp_len
14306 + +wpa_ie_len
14307 + // +tmp_ht_cap_len
14308 + // +tmp_ht_info_len
14309 + // +tmp_generic_ie_len
14310 +// +wmm_len+2
14311 + +ieee->tx_headroom;
14312 + skb = dev_alloc_skb(beacon_size);
14313 + if (!skb)
14314 + return NULL;
14315 + skb_reserve(skb, ieee->tx_headroom);
14316 + beacon_buf = (struct ieee80211_probe_response*) skb_put(skb, (beacon_size - ieee->tx_headroom));
14317 + memcpy (beacon_buf->header.addr1, dest,ETH_ALEN);
14318 + memcpy (beacon_buf->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
14319 + memcpy (beacon_buf->header.addr3, ieee->current_network.bssid, ETH_ALEN);
14320 +
14321 + beacon_buf->header.duration_id = 0; //FIXME
14322 + beacon_buf->beacon_interval =
14323 + cpu_to_le16(ieee->current_network.beacon_interval);
14324 + beacon_buf->capability =
14325 + cpu_to_le16(ieee->current_network.capability & WLAN_CAPABILITY_IBSS);
14326 + beacon_buf->capability |=
14327 + cpu_to_le16(ieee->current_network.capability & WLAN_CAPABILITY_SHORT_PREAMBLE); //add short preamble here
14328 +
14329 + if(ieee->short_slot && (ieee->current_network.capability & WLAN_CAPABILITY_SHORT_SLOT))
14330 + cpu_to_le16((beacon_buf->capability |= WLAN_CAPABILITY_SHORT_SLOT));
14331 +
14332 + crypt = ieee->crypt[ieee->tx_keyidx];
14333 +#if 0
14334 + encrypt = ieee->host_encrypt && crypt && crypt->ops &&
14335 + (0 == strcmp(crypt->ops->name, "WEP"));
14336 +#endif
14337 + if (encrypt)
14338 + beacon_buf->capability |= cpu_to_le16(WLAN_CAPABILITY_PRIVACY);
14339 +
14340 +
14341 + beacon_buf->header.frame_ctl = cpu_to_le16(IEEE80211_STYPE_PROBE_RESP);
14342 + beacon_buf->info_element[0].id = MFIE_TYPE_SSID;
14343 + beacon_buf->info_element[0].len = ssid_len;
14344 +
14345 + tag = (u8*) beacon_buf->info_element[0].data;
14346 +
14347 + memcpy(tag, ssid, ssid_len);
14348 +
14349 + tag += ssid_len;
14350 +
14351 + *(tag++) = MFIE_TYPE_RATES;
14352 + *(tag++) = rate_len-2;
14353 + memcpy(tag,ieee->current_network.rates,rate_len-2);
14354 + tag+=rate_len-2;
14355 +
14356 + *(tag++) = MFIE_TYPE_DS_SET;
14357 + *(tag++) = 1;
14358 + *(tag++) = ieee->current_network.channel;
14359 +
14360 + if(atim_len){
14361 + u16 val16;
14362 + *(tag++) = MFIE_TYPE_IBSS_SET;
14363 + *(tag++) = 2;
14364 + //*((u16*)(tag)) = cpu_to_le16(ieee->current_network.atim_window);
14365 + val16 = cpu_to_le16(ieee->current_network.atim_window);
14366 + memcpy((u8 *)tag, (u8 *)&val16, 2);
14367 + tag+=2;
14368 + }
14369 +
14370 + if(erp_len){
14371 + *(tag++) = MFIE_TYPE_ERP;
14372 + *(tag++) = 1;
14373 + *(tag++) = erpinfo_content;
14374 + }
14375 +#if 0
14376 + //Include High Throuput capability
14377 +
14378 + *(tag++) = MFIE_TYPE_HT_CAP;
14379 + *(tag++) = tmp_ht_cap_len - 2;
14380 + memcpy(tag, tmp_ht_cap_buf, tmp_ht_cap_len - 2);
14381 + tag += tmp_ht_cap_len - 2;
14382 +#endif
14383 + if(rate_ex_len){
14384 + *(tag++) = MFIE_TYPE_RATES_EX;
14385 + *(tag++) = rate_ex_len-2;
14386 + memcpy(tag,ieee->current_network.rates_ex,rate_ex_len-2);
14387 + tag+=rate_ex_len-2;
14388 + }
14389 +
14390 +#if 0
14391 + //Include High Throuput info
14392 +
14393 + *(tag++) = MFIE_TYPE_HT_INFO;
14394 + *(tag++) = tmp_ht_info_len - 2;
14395 + memcpy(tag, tmp_ht_info_buf, tmp_ht_info_len -2);
14396 + tag += tmp_ht_info_len - 2;
14397 +#endif
14398 + if (wpa_ie_len)
14399 + {
14400 + if (ieee->iw_mode == IW_MODE_ADHOC)
14401 + {//as Windows will set pairwise key same as the group key which is not allowed in Linux, so set this for IOT issue. WB 2008.07.07
14402 + memcpy(&ieee->wpa_ie[14], &ieee->wpa_ie[8], 4);
14403 + }
14404 + memcpy(tag, ieee->wpa_ie, ieee->wpa_ie_len);
14405 + tag += wpa_ie_len;
14406 + }
14407 +
14408 +#if 0
14409 + //
14410 + // Construct Realtek Proprietary Aggregation mode (Set AMPDU Factor to 2, 32k)
14411 + //
14412 + if(pHTInfo->bRegRT2RTAggregation)
14413 + {
14414 + (*tag++) = 0xdd;
14415 + (*tag++) = tmp_generic_ie_len - 2;
14416 + memcpy(tag,tmp_generic_ie_buf,tmp_generic_ie_len -2);
14417 + tag += tmp_generic_ie_len -2;
14418 +
14419 + }
14420 +#endif
14421 +#if 0
14422 + if(ieee->qos_support)
14423 + {
14424 + (*tag++) = 0xdd;
14425 + (*tag++) = wmm_len;
14426 + memcpy(tag,QosOui,wmm_len);
14427 + tag += wmm_len;
14428 + }
14429 +#endif
14430 + //skb->dev = ieee->dev;
14431 + return skb;
14432 +}
14433 +
14434 +
14435 +struct sk_buff* ieee80211_assoc_resp(struct ieee80211_device *ieee, u8 *dest)
14436 +{
14437 + struct sk_buff *skb;
14438 + u8* tag;
14439 +
14440 + struct ieee80211_crypt_data* crypt;
14441 + struct ieee80211_assoc_response_frame *assoc;
14442 + short encrypt;
14443 +
14444 + unsigned int rate_len = ieee80211_MFIE_rate_len(ieee);
14445 + int len = sizeof(struct ieee80211_assoc_response_frame) + rate_len + ieee->tx_headroom;
14446 +
14447 + skb = dev_alloc_skb(len);
14448 +
14449 + if (!skb)
14450 + return NULL;
14451 +
14452 + skb_reserve(skb, ieee->tx_headroom);
14453 +
14454 + assoc = (struct ieee80211_assoc_response_frame *)
14455 + skb_put(skb,sizeof(struct ieee80211_assoc_response_frame));
14456 +
14457 + assoc->header.frame_ctl = cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP);
14458 + memcpy(assoc->header.addr1, dest,ETH_ALEN);
14459 + memcpy(assoc->header.addr3, ieee->dev->dev_addr, ETH_ALEN);
14460 + memcpy(assoc->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
14461 + assoc->capability = cpu_to_le16(ieee->iw_mode == IW_MODE_MASTER ?
14462 + WLAN_CAPABILITY_BSS : WLAN_CAPABILITY_IBSS);
14463 +
14464 +
14465 + if(ieee->short_slot)
14466 + assoc->capability |= cpu_to_le16(WLAN_CAPABILITY_SHORT_SLOT);
14467 +
14468 + if (ieee->host_encrypt)
14469 + crypt = ieee->crypt[ieee->tx_keyidx];
14470 + else crypt = NULL;
14471 +
14472 + encrypt = ( crypt && crypt->ops);
14473 +
14474 + if (encrypt)
14475 + assoc->capability |= cpu_to_le16(WLAN_CAPABILITY_PRIVACY);
14476 +
14477 + assoc->status = 0;
14478 + assoc->aid = cpu_to_le16(ieee->assoc_id);
14479 + if (ieee->assoc_id == 0x2007) ieee->assoc_id=0;
14480 + else ieee->assoc_id++;
14481 +
14482 + tag = (u8*) skb_put(skb, rate_len);
14483 +
14484 + ieee80211_MFIE_Brate(ieee, &tag);
14485 + ieee80211_MFIE_Grate(ieee, &tag);
14486 +
14487 + return skb;
14488 +}
14489 +
14490 +struct sk_buff* ieee80211_auth_resp(struct ieee80211_device *ieee,int status, u8 *dest)
14491 +{
14492 + struct sk_buff *skb;
14493 + struct ieee80211_authentication *auth;
14494 + int len = ieee->tx_headroom + sizeof(struct ieee80211_authentication)+1;
14495 +
14496 + skb = dev_alloc_skb(len);
14497 +
14498 + if (!skb)
14499 + return NULL;
14500 +
14501 + skb->len = sizeof(struct ieee80211_authentication);
14502 +
14503 + auth = (struct ieee80211_authentication *)skb->data;
14504 +
14505 + auth->status = cpu_to_le16(status);
14506 + auth->transaction = cpu_to_le16(2);
14507 + auth->algorithm = cpu_to_le16(WLAN_AUTH_OPEN);
14508 +
14509 + memcpy(auth->header.addr3, ieee->dev->dev_addr, ETH_ALEN);
14510 + memcpy(auth->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
14511 + memcpy(auth->header.addr1, dest, ETH_ALEN);
14512 + auth->header.frame_ctl = cpu_to_le16(IEEE80211_STYPE_AUTH);
14513 + return skb;
14514 +
14515 +
14516 +}
14517 +
14518 +struct sk_buff* ieee80211_null_func(struct ieee80211_device *ieee,short pwr)
14519 +{
14520 + struct sk_buff *skb;
14521 + struct ieee80211_hdr_3addr* hdr;
14522 +
14523 + skb = dev_alloc_skb(sizeof(struct ieee80211_hdr_3addr));
14524 +
14525 + if (!skb)
14526 + return NULL;
14527 +
14528 + hdr = (struct ieee80211_hdr_3addr*)skb_put(skb,sizeof(struct ieee80211_hdr_3addr));
14529 +
14530 + memcpy(hdr->addr1, ieee->current_network.bssid, ETH_ALEN);
14531 + memcpy(hdr->addr2, ieee->dev->dev_addr, ETH_ALEN);
14532 + memcpy(hdr->addr3, ieee->current_network.bssid, ETH_ALEN);
14533 +
14534 + hdr->frame_ctl = cpu_to_le16(IEEE80211_FTYPE_DATA |
14535 + IEEE80211_STYPE_NULLFUNC | IEEE80211_FCTL_TODS |
14536 + (pwr ? IEEE80211_FCTL_PM:0));
14537 +
14538 + return skb;
14539 +
14540 +
14541 +}
14542 +
14543 +
14544 +void ieee80211_resp_to_assoc_rq(struct ieee80211_device *ieee, u8* dest)
14545 +{
14546 + struct sk_buff *buf = ieee80211_assoc_resp(ieee, dest);
14547 +
14548 + if (buf)
14549 + softmac_mgmt_xmit(buf, ieee);
14550 +}
14551 +
14552 +
14553 +void ieee80211_resp_to_auth(struct ieee80211_device *ieee, int s, u8* dest)
14554 +{
14555 + struct sk_buff *buf = ieee80211_auth_resp(ieee, s, dest);
14556 +
14557 + if (buf)
14558 + softmac_mgmt_xmit(buf, ieee);
14559 +}
14560 +
14561 +
14562 +void ieee80211_resp_to_probe(struct ieee80211_device *ieee, u8 *dest)
14563 +{
14564 +
14565 +
14566 + struct sk_buff *buf = ieee80211_probe_resp(ieee, dest);
14567 + if (buf)
14568 + softmac_mgmt_xmit(buf, ieee);
14569 +}
14570 +
14571 +
14572 +inline struct sk_buff *ieee80211_association_req(struct ieee80211_network *beacon,struct ieee80211_device *ieee)
14573 +{
14574 + struct sk_buff *skb;
14575 + //unsigned long flags;
14576 +
14577 + struct ieee80211_assoc_request_frame *hdr;
14578 + u8 *tag;//,*rsn_ie;
14579 + //short info_addr = 0;
14580 + //int i;
14581 + //u16 suite_count = 0;
14582 + //u8 suit_select = 0;
14583 + //unsigned int wpa_len = beacon->wpa_ie_len;
14584 + //for HT
14585 + u8* ht_cap_buf = NULL;
14586 + u8 ht_cap_len=0;
14587 + u8* realtek_ie_buf=NULL;
14588 + u8 realtek_ie_len=0;
14589 + int wpa_ie_len= ieee->wpa_ie_len;
14590 + unsigned int ckip_ie_len=0;
14591 + unsigned int ccxrm_ie_len=0;
14592 + unsigned int cxvernum_ie_len=0;
14593 + struct ieee80211_crypt_data* crypt;
14594 + int encrypt;
14595 +
14596 + unsigned int rate_len = ieee80211_MFIE_rate_len(ieee);
14597 + unsigned int wmm_info_len = beacon->qos_data.supported?9:0;
14598 +#ifdef THOMAS_TURBO
14599 + unsigned int turbo_info_len = beacon->Turbo_Enable?9:0;
14600 +#endif
14601 +
14602 + int len = 0;
14603 +
14604 + crypt = ieee->crypt[ieee->tx_keyidx];
14605 + encrypt = ieee->host_encrypt && crypt && crypt->ops && ((0 == strcmp(crypt->ops->name,"WEP") || wpa_ie_len));
14606 +
14607 + //Include High Throuput capability && Realtek proprietary
14608 + if(ieee->pHTInfo->bCurrentHTSupport&&ieee->pHTInfo->bEnableHT)
14609 + {
14610 + ht_cap_buf = (u8*)&(ieee->pHTInfo->SelfHTCap);
14611 + ht_cap_len = sizeof(ieee->pHTInfo->SelfHTCap);
14612 + HTConstructCapabilityElement(ieee, ht_cap_buf, &ht_cap_len, encrypt);
14613 + if(ieee->pHTInfo->bCurrentRT2RTAggregation)
14614 + {
14615 + realtek_ie_buf = ieee->pHTInfo->szRT2RTAggBuffer;
14616 + realtek_ie_len = sizeof( ieee->pHTInfo->szRT2RTAggBuffer);
14617 + HTConstructRT2RTAggElement(ieee, realtek_ie_buf, &realtek_ie_len);
14618 +
14619 + }
14620 + }
14621 + if(ieee->qos_support){
14622 + wmm_info_len = beacon->qos_data.supported?9:0;
14623 + }
14624 +
14625 +
14626 + if(beacon->bCkipSupported)
14627 + {
14628 + ckip_ie_len = 30+2;
14629 + }
14630 + if(beacon->bCcxRmEnable)
14631 + {
14632 + ccxrm_ie_len = 6+2;
14633 + }
14634 + if( beacon->BssCcxVerNumber >= 2 )
14635 + {
14636 + cxvernum_ie_len = 5+2;
14637 + }
14638 +#ifdef THOMAS_TURBO
14639 + len = sizeof(struct ieee80211_assoc_request_frame)+ 2
14640 + + beacon->ssid_len//essid tagged val
14641 + + rate_len//rates tagged val
14642 + + wpa_ie_len
14643 + + wmm_info_len
14644 + + turbo_info_len
14645 + + ht_cap_len
14646 + + realtek_ie_len
14647 + + ckip_ie_len
14648 + + ccxrm_ie_len
14649 + + cxvernum_ie_len
14650 + + ieee->tx_headroom;
14651 +#else
14652 + len = sizeof(struct ieee80211_assoc_request_frame)+ 2
14653 + + beacon->ssid_len//essid tagged val
14654 + + rate_len//rates tagged val
14655 + + wpa_ie_len
14656 + + wmm_info_len
14657 + + ht_cap_len
14658 + + realtek_ie_len
14659 + + ckip_ie_len
14660 + + ccxrm_ie_len
14661 + + cxvernum_ie_len
14662 + + ieee->tx_headroom;
14663 +#endif
14664 +
14665 + skb = dev_alloc_skb(len);
14666 +
14667 + if (!skb)
14668 + return NULL;
14669 +
14670 + skb_reserve(skb, ieee->tx_headroom);
14671 +
14672 + hdr = (struct ieee80211_assoc_request_frame *)
14673 + skb_put(skb, sizeof(struct ieee80211_assoc_request_frame)+2);
14674 +
14675 +
14676 + hdr->header.frame_ctl = IEEE80211_STYPE_ASSOC_REQ;
14677 + hdr->header.duration_id= 37; //FIXME
14678 + memcpy(hdr->header.addr1, beacon->bssid, ETH_ALEN);
14679 + memcpy(hdr->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
14680 + memcpy(hdr->header.addr3, beacon->bssid, ETH_ALEN);
14681 +
14682 + memcpy(ieee->ap_mac_addr, beacon->bssid, ETH_ALEN);//for HW security, John
14683 +
14684 + hdr->capability = cpu_to_le16(WLAN_CAPABILITY_BSS);
14685 + if (beacon->capability & WLAN_CAPABILITY_PRIVACY )
14686 + hdr->capability |= cpu_to_le16(WLAN_CAPABILITY_PRIVACY);
14687 +
14688 + if (beacon->capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
14689 + hdr->capability |= cpu_to_le16(WLAN_CAPABILITY_SHORT_PREAMBLE); //add short_preamble here
14690 +
14691 + if(ieee->short_slot)
14692 + hdr->capability |= cpu_to_le16(WLAN_CAPABILITY_SHORT_SLOT);
14693 + if (wmm_info_len) //QOS
14694 + hdr->capability |= cpu_to_le16(WLAN_CAPABILITY_QOS);
14695 +
14696 + hdr->listen_interval = 0xa; //FIXME
14697 +
14698 + hdr->info_element[0].id = MFIE_TYPE_SSID;
14699 +
14700 + hdr->info_element[0].len = beacon->ssid_len;
14701 + tag = skb_put(skb, beacon->ssid_len);
14702 + memcpy(tag, beacon->ssid, beacon->ssid_len);
14703 +
14704 + tag = skb_put(skb, rate_len);
14705 +
14706 + ieee80211_MFIE_Brate(ieee, &tag);
14707 + ieee80211_MFIE_Grate(ieee, &tag);
14708 + // For CCX 1 S13, CKIP. Added by Annie, 2006-08-14.
14709 + if( beacon->bCkipSupported )
14710 + {
14711 + static u8 AironetIeOui[] = {0x00, 0x01, 0x66}; // "4500-client"
14712 + u8 CcxAironetBuf[30];
14713 + OCTET_STRING osCcxAironetIE;
14714 +
14715 + memset(CcxAironetBuf, 0,30);
14716 + osCcxAironetIE.Octet = CcxAironetBuf;
14717 + osCcxAironetIE.Length = sizeof(CcxAironetBuf);
14718 + //
14719 + // Ref. CCX test plan v3.61, 3.2.3.1 step 13.
14720 + // We want to make the device type as "4500-client". 060926, by CCW.
14721 + //
14722 + memcpy(osCcxAironetIE.Octet, AironetIeOui, sizeof(AironetIeOui));
14723 +
14724 + // CCX1 spec V1.13, A01.1 CKIP Negotiation (page23):
14725 + // "The CKIP negotiation is started with the associate request from the client to the access point,
14726 + // containing an Aironet element with both the MIC and KP bits set."
14727 + osCcxAironetIE.Octet[IE_CISCO_FLAG_POSITION] |= (SUPPORT_CKIP_PK|SUPPORT_CKIP_MIC) ;
14728 + tag = skb_put(skb, ckip_ie_len);
14729 + *tag++ = MFIE_TYPE_AIRONET;
14730 + *tag++ = osCcxAironetIE.Length;
14731 + memcpy(tag,osCcxAironetIE.Octet,osCcxAironetIE.Length);
14732 + tag += osCcxAironetIE.Length;
14733 + }
14734 +
14735 + if(beacon->bCcxRmEnable)
14736 + {
14737 + static u8 CcxRmCapBuf[] = {0x00, 0x40, 0x96, 0x01, 0x01, 0x00};
14738 + OCTET_STRING osCcxRmCap;
14739 +
14740 + osCcxRmCap.Octet = CcxRmCapBuf;
14741 + osCcxRmCap.Length = sizeof(CcxRmCapBuf);
14742 + tag = skb_put(skb,ccxrm_ie_len);
14743 + *tag++ = MFIE_TYPE_GENERIC;
14744 + *tag++ = osCcxRmCap.Length;
14745 + memcpy(tag,osCcxRmCap.Octet,osCcxRmCap.Length);
14746 + tag += osCcxRmCap.Length;
14747 + }
14748 +
14749 + if( beacon->BssCcxVerNumber >= 2 )
14750 + {
14751 + u8 CcxVerNumBuf[] = {0x00, 0x40, 0x96, 0x03, 0x00};
14752 + OCTET_STRING osCcxVerNum;
14753 + CcxVerNumBuf[4] = beacon->BssCcxVerNumber;
14754 + osCcxVerNum.Octet = CcxVerNumBuf;
14755 + osCcxVerNum.Length = sizeof(CcxVerNumBuf);
14756 + tag = skb_put(skb,cxvernum_ie_len);
14757 + *tag++ = MFIE_TYPE_GENERIC;
14758 + *tag++ = osCcxVerNum.Length;
14759 + memcpy(tag,osCcxVerNum.Octet,osCcxVerNum.Length);
14760 + tag += osCcxVerNum.Length;
14761 + }
14762 + //HT cap element
14763 + if(ieee->pHTInfo->bCurrentHTSupport&&ieee->pHTInfo->bEnableHT){
14764 + if(ieee->pHTInfo->ePeerHTSpecVer != HT_SPEC_VER_EWC)
14765 + {
14766 + tag = skb_put(skb, ht_cap_len);
14767 + *tag++ = MFIE_TYPE_HT_CAP;
14768 + *tag++ = ht_cap_len - 2;
14769 + memcpy(tag, ht_cap_buf,ht_cap_len -2);
14770 + tag += ht_cap_len -2;
14771 + }
14772 + }
14773 +
14774 +
14775 + //choose what wpa_supplicant gives to associate.
14776 + tag = skb_put(skb, wpa_ie_len);
14777 + if (wpa_ie_len){
14778 + memcpy(tag, ieee->wpa_ie, ieee->wpa_ie_len);
14779 + }
14780 +
14781 + tag = skb_put(skb,wmm_info_len);
14782 + if(wmm_info_len) {
14783 + ieee80211_WMM_Info(ieee, &tag);
14784 + }
14785 +#ifdef THOMAS_TURBO
14786 + tag = skb_put(skb,turbo_info_len);
14787 + if(turbo_info_len) {
14788 + ieee80211_TURBO_Info(ieee, &tag);
14789 + }
14790 +#endif
14791 +
14792 + if(ieee->pHTInfo->bCurrentHTSupport&&ieee->pHTInfo->bEnableHT){
14793 + if(ieee->pHTInfo->ePeerHTSpecVer == HT_SPEC_VER_EWC)
14794 + {
14795 + tag = skb_put(skb, ht_cap_len);
14796 + *tag++ = MFIE_TYPE_GENERIC;
14797 + *tag++ = ht_cap_len - 2;
14798 + memcpy(tag, ht_cap_buf,ht_cap_len - 2);
14799 + tag += ht_cap_len -2;
14800 + }
14801 +
14802 + if(ieee->pHTInfo->bCurrentRT2RTAggregation){
14803 + tag = skb_put(skb, realtek_ie_len);
14804 + *tag++ = MFIE_TYPE_GENERIC;
14805 + *tag++ = realtek_ie_len - 2;
14806 + memcpy(tag, realtek_ie_buf,realtek_ie_len -2 );
14807 + }
14808 + }
14809 +// printk("<=====%s(), %p, %p\n", __FUNCTION__, ieee->dev, ieee->dev->dev_addr);
14810 +// IEEE80211_DEBUG_DATA(IEEE80211_DL_DATA, skb->data, skb->len);
14811 + return skb;
14812 +}
14813 +
14814 +void ieee80211_associate_abort(struct ieee80211_device *ieee)
14815 +{
14816 +
14817 + unsigned long flags;
14818 + spin_lock_irqsave(&ieee->lock, flags);
14819 +
14820 + ieee->associate_seq++;
14821 +
14822 + /* don't scan, and avoid to have the RX path possibily
14823 + * try again to associate. Even do not react to AUTH or
14824 + * ASSOC response. Just wait for the retry wq to be scheduled.
14825 + * Here we will check if there are good nets to associate
14826 + * with, so we retry or just get back to NO_LINK and scanning
14827 + */
14828 + if (ieee->state == IEEE80211_ASSOCIATING_AUTHENTICATING){
14829 + IEEE80211_DEBUG_MGMT("Authentication failed\n");
14830 + ieee->softmac_stats.no_auth_rs++;
14831 + }else{
14832 + IEEE80211_DEBUG_MGMT("Association failed\n");
14833 + ieee->softmac_stats.no_ass_rs++;
14834 + }
14835 +
14836 + ieee->state = IEEE80211_ASSOCIATING_RETRY;
14837 +
14838 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
14839 + queue_delayed_work(ieee->wq, &ieee->associate_retry_wq, \
14840 + IEEE80211_SOFTMAC_ASSOC_RETRY_TIME);
14841 +#else
14842 + schedule_task(&ieee->associate_retry_wq);
14843 +#endif
14844 +
14845 + spin_unlock_irqrestore(&ieee->lock, flags);
14846 +}
14847 +
14848 +void ieee80211_associate_abort_cb(unsigned long dev)
14849 +{
14850 + ieee80211_associate_abort((struct ieee80211_device *) dev);
14851 +}
14852 +
14853 +
14854 +void ieee80211_associate_step1(struct ieee80211_device *ieee)
14855 +{
14856 + struct ieee80211_network *beacon = &ieee->current_network;
14857 + struct sk_buff *skb;
14858 +
14859 + IEEE80211_DEBUG_MGMT("Stopping scan\n");
14860 +
14861 + ieee->softmac_stats.tx_auth_rq++;
14862 + skb=ieee80211_authentication_req(beacon, ieee, 0);
14863 +
14864 + if (!skb)
14865 + ieee80211_associate_abort(ieee);
14866 + else{
14867 + ieee->state = IEEE80211_ASSOCIATING_AUTHENTICATING ;
14868 + IEEE80211_DEBUG_MGMT("Sending authentication request\n");
14869 + //printk(KERN_WARNING "Sending authentication request\n");
14870 + softmac_mgmt_xmit(skb, ieee);
14871 + //BUGON when you try to add_timer twice, using mod_timer may be better, john0709
14872 + if(!timer_pending(&ieee->associate_timer)){
14873 + ieee->associate_timer.expires = jiffies + (HZ / 2);
14874 + add_timer(&ieee->associate_timer);
14875 + }
14876 + //dev_kfree_skb_any(skb);//edit by thomas
14877 + }
14878 +}
14879 +
14880 +void ieee80211_auth_challenge(struct ieee80211_device *ieee, u8 *challenge, int chlen)
14881 +{
14882 + u8 *c;
14883 + struct sk_buff *skb;
14884 + struct ieee80211_network *beacon = &ieee->current_network;
14885 +// int hlen = sizeof(struct ieee80211_authentication);
14886 +
14887 + ieee->associate_seq++;
14888 + ieee->softmac_stats.tx_auth_rq++;
14889 +
14890 + skb = ieee80211_authentication_req(beacon, ieee, chlen+2);
14891 + if (!skb)
14892 + ieee80211_associate_abort(ieee);
14893 + else{
14894 + c = skb_put(skb, chlen+2);
14895 + *(c++) = MFIE_TYPE_CHALLENGE;
14896 + *(c++) = chlen;
14897 + memcpy(c, challenge, chlen);
14898 +
14899 + IEEE80211_DEBUG_MGMT("Sending authentication challenge response\n");
14900 +
14901 + ieee80211_encrypt_fragment(ieee, skb, sizeof(struct ieee80211_hdr_3addr ));
14902 +
14903 + softmac_mgmt_xmit(skb, ieee);
14904 + mod_timer(&ieee->associate_timer, jiffies + (HZ/2));
14905 +#if 0
14906 + ieee->associate_timer.expires = jiffies + (HZ / 2);
14907 + add_timer(&ieee->associate_timer);
14908 +#endif
14909 + //dev_kfree_skb_any(skb);//edit by thomas
14910 + }
14911 + kfree(challenge);
14912 +}
14913 +
14914 +void ieee80211_associate_step2(struct ieee80211_device *ieee)
14915 +{
14916 + struct sk_buff* skb;
14917 + struct ieee80211_network *beacon = &ieee->current_network;
14918 +
14919 + del_timer_sync(&ieee->associate_timer);
14920 +
14921 + IEEE80211_DEBUG_MGMT("Sending association request\n");
14922 +
14923 + ieee->softmac_stats.tx_ass_rq++;
14924 + skb=ieee80211_association_req(beacon, ieee);
14925 + if (!skb)
14926 + ieee80211_associate_abort(ieee);
14927 + else{
14928 + softmac_mgmt_xmit(skb, ieee);
14929 + mod_timer(&ieee->associate_timer, jiffies + (HZ/2));
14930 +#if 0
14931 + ieee->associate_timer.expires = jiffies + (HZ / 2);
14932 + add_timer(&ieee->associate_timer);
14933 +#endif
14934 + //dev_kfree_skb_any(skb);//edit by thomas
14935 + }
14936 +}
14937 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
14938 +void ieee80211_associate_complete_wq(struct work_struct *work)
14939 +{
14940 + struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, associate_complete_wq);
14941 +#else
14942 +void ieee80211_associate_complete_wq(struct ieee80211_device *ieee)
14943 +{
14944 +#endif
14945 + printk(KERN_INFO "Associated successfully\n");
14946 + ieee->is_roaming = false;
14947 + if(ieee80211_is_54g(ieee->current_network) &&
14948 + (ieee->modulation & IEEE80211_OFDM_MODULATION)){
14949 +
14950 + ieee->rate = 108;
14951 + printk(KERN_INFO"Using G rates:%d\n", ieee->rate);
14952 + }else{
14953 + ieee->rate = 22;
14954 + printk(KERN_INFO"Using B rates:%d\n", ieee->rate);
14955 + }
14956 + if (ieee->pHTInfo->bCurrentHTSupport&&ieee->pHTInfo->bEnableHT)
14957 + {
14958 + printk("Successfully associated, ht enabled\n");
14959 + HTOnAssocRsp(ieee);
14960 + }
14961 + else
14962 + {
14963 + printk("Successfully associated, ht not enabled(%d, %d)\n", ieee->pHTInfo->bCurrentHTSupport, ieee->pHTInfo->bEnableHT);
14964 + memset(ieee->dot11HTOperationalRateSet, 0, 16);
14965 + //HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20, HT_EXTCHNL_OFFSET_NO_EXT);
14966 + }
14967 + ieee->LinkDetectInfo.SlotNum = 2 * (1 + ieee->current_network.beacon_interval/500);
14968 + // To prevent the immediately calling watch_dog after association.
14969 + if(ieee->LinkDetectInfo.NumRecvBcnInPeriod==0||ieee->LinkDetectInfo.NumRecvDataInPeriod==0 )
14970 + {
14971 + ieee->LinkDetectInfo.NumRecvBcnInPeriod = 1;
14972 + ieee->LinkDetectInfo.NumRecvDataInPeriod= 1;
14973 + }
14974 + ieee->link_change(ieee->dev);
14975 + if(ieee->is_silent_reset == 0){
14976 + printk("============>normal associate\n");
14977 + notify_wx_assoc_event(ieee);
14978 + }
14979 + else if(ieee->is_silent_reset == 1)
14980 + {
14981 + printk("==================>silent reset associate\n");
14982 + ieee->is_silent_reset = 0;
14983 + }
14984 +
14985 + if (ieee->data_hard_resume)
14986 + ieee->data_hard_resume(ieee->dev);
14987 + netif_carrier_on(ieee->dev);
14988 +}
14989 +
14990 +void ieee80211_associate_complete(struct ieee80211_device *ieee)
14991 +{
14992 +// int i;
14993 +// struct net_device* dev = ieee->dev;
14994 + del_timer_sync(&ieee->associate_timer);
14995 +
14996 +#if 0
14997 + for(i = 0; i < 6; i++) {
14998 + ieee->seq_ctrl[i] = 0;
14999 + }
15000 +#endif
15001 + ieee->state = IEEE80211_LINKED;
15002 +#if 0
15003 + if (ieee->pHTInfo->bCurrentHTSupport)
15004 + {
15005 + printk("Successfully associated, ht enabled\n");
15006 + queue_work(ieee->wq, &ieee->ht_onAssRsp);
15007 + }
15008 + else
15009 + {
15010 + printk("Successfully associated, ht not enabled\n");
15011 + memset(ieee->dot11HTOperationalRateSet, 0, 16);
15012 + HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20, HT_EXTCHNL_OFFSET_NO_EXT);
15013 + }
15014 +#endif
15015 + //ieee->UpdateHalRATRTableHandler(dev, ieee->dot11HTOperationalRateSet);
15016 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
15017 + queue_work(ieee->wq, &ieee->associate_complete_wq);
15018 +#else
15019 + schedule_task(&ieee->associate_complete_wq);
15020 +#endif
15021 +}
15022 +
15023 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
15024 +void ieee80211_associate_procedure_wq(struct work_struct *work)
15025 +{
15026 + struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, associate_procedure_wq);
15027 +#else
15028 +void ieee80211_associate_procedure_wq(struct ieee80211_device *ieee)
15029 +{
15030 +#endif
15031 + ieee->sync_scan_hurryup = 1;
15032 + down(&ieee->wx_sem);
15033 +
15034 + if (ieee->data_hard_stop)
15035 + ieee->data_hard_stop(ieee->dev);
15036 +
15037 + ieee80211_stop_scan(ieee);
15038 + printk("===>%s(), chan:%d\n", __FUNCTION__, ieee->current_network.channel);
15039 + //ieee->set_chan(ieee->dev, ieee->current_network.channel);
15040 + HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20, HT_EXTCHNL_OFFSET_NO_EXT);
15041 +
15042 + ieee->associate_seq = 1;
15043 + ieee80211_associate_step1(ieee);
15044 +
15045 + up(&ieee->wx_sem);
15046 +}
15047 +
15048 +inline void ieee80211_softmac_new_net(struct ieee80211_device *ieee, struct ieee80211_network *net)
15049 +{
15050 + u8 tmp_ssid[IW_ESSID_MAX_SIZE+1];
15051 + int tmp_ssid_len = 0;
15052 +
15053 + short apset,ssidset,ssidbroad,apmatch,ssidmatch;
15054 +
15055 + /* we are interested in new new only if we are not associated
15056 + * and we are not associating / authenticating
15057 + */
15058 + if (ieee->state != IEEE80211_NOLINK)
15059 + return;
15060 +
15061 + if ((ieee->iw_mode == IW_MODE_INFRA) && !(net->capability & WLAN_CAPABILITY_BSS))
15062 + return;
15063 +
15064 + if ((ieee->iw_mode == IW_MODE_ADHOC) && !(net->capability & WLAN_CAPABILITY_IBSS))
15065 + return;
15066 +
15067 +
15068 + if (ieee->iw_mode == IW_MODE_INFRA || ieee->iw_mode == IW_MODE_ADHOC){
15069 + /* if the user specified the AP MAC, we need also the essid
15070 + * This could be obtained by beacons or, if the network does not
15071 + * broadcast it, it can be put manually.
15072 + */
15073 + apset = ieee->wap_set;//(memcmp(ieee->current_network.bssid, zero,ETH_ALEN)!=0 );
15074 + ssidset = ieee->ssid_set;//ieee->current_network.ssid[0] != '\0';
15075 + ssidbroad = !(net->ssid_len == 0 || net->ssid[0]== '\0');
15076 + apmatch = (memcmp(ieee->current_network.bssid, net->bssid, ETH_ALEN)==0);
15077 + ssidmatch = (ieee->current_network.ssid_len == net->ssid_len)&&\
15078 + (!strncmp(ieee->current_network.ssid, net->ssid, net->ssid_len));
15079 +
15080 +
15081 + if ( /* if the user set the AP check if match.
15082 + * if the network does not broadcast essid we check the user supplyed ANY essid
15083 + * if the network does broadcast and the user does not set essid it is OK
15084 + * if the network does broadcast and the user did set essid chech if essid match
15085 + */
15086 + ( apset && apmatch &&
15087 + ((ssidset && ssidbroad && ssidmatch) || (ssidbroad && !ssidset) || (!ssidbroad && ssidset)) ) ||
15088 + /* if the ap is not set, check that the user set the bssid
15089 + * and the network does bradcast and that those two bssid matches
15090 + */
15091 + (!apset && ssidset && ssidbroad && ssidmatch)
15092 + ){
15093 + /* if the essid is hidden replace it with the
15094 + * essid provided by the user.
15095 + */
15096 + if (!ssidbroad){
15097 + strncpy(tmp_ssid, ieee->current_network.ssid, IW_ESSID_MAX_SIZE);
15098 + tmp_ssid_len = ieee->current_network.ssid_len;
15099 + }
15100 + memcpy(&ieee->current_network, net, sizeof(struct ieee80211_network));
15101 +
15102 + if (!ssidbroad){
15103 + strncpy(ieee->current_network.ssid, tmp_ssid, IW_ESSID_MAX_SIZE);
15104 + ieee->current_network.ssid_len = tmp_ssid_len;
15105 + }
15106 + printk(KERN_INFO"Linking with %s,channel:%d, qos:%d, myHT:%d, networkHT:%d\n",ieee->current_network.ssid,ieee->current_network.channel, ieee->current_network.qos_data.supported, ieee->pHTInfo->bEnableHT, ieee->current_network.bssht.bdSupportHT);
15107 +
15108 + //ieee->pHTInfo->IOTAction = 0;
15109 + HTResetIOTSetting(ieee->pHTInfo);
15110 + if (ieee->iw_mode == IW_MODE_INFRA){
15111 + /* Join the network for the first time */
15112 + ieee->AsocRetryCount = 0;
15113 + //for HT by amy 080514
15114 + if((ieee->current_network.qos_data.supported == 1) &&
15115 + // (ieee->pHTInfo->bEnableHT && ieee->current_network.bssht.bdSupportHT))
15116 + ieee->current_network.bssht.bdSupportHT)
15117 +/*WB, 2008.09.09:bCurrentHTSupport and bEnableHT two flags are going to put together to check whether we are in HT now, so needn't to check bEnableHT flags here. That's is to say we will set to HT support whenever joined AP has the ability to support HT. And whether we are in HT or not, please check bCurrentHTSupport&&bEnableHT now please.*/
15118 + {
15119 + // ieee->pHTInfo->bCurrentHTSupport = true;
15120 + HTResetSelfAndSavePeerSetting(ieee, &(ieee->current_network));
15121 + }
15122 + else
15123 + {
15124 + ieee->pHTInfo->bCurrentHTSupport = false;
15125 + }
15126 +
15127 + ieee->state = IEEE80211_ASSOCIATING;
15128 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
15129 + queue_work(ieee->wq, &ieee->associate_procedure_wq);
15130 +#else
15131 + schedule_task(&ieee->associate_procedure_wq);
15132 +#endif
15133 + }else{
15134 + if(ieee80211_is_54g(ieee->current_network) &&
15135 + (ieee->modulation & IEEE80211_OFDM_MODULATION)){
15136 + ieee->rate = 108;
15137 + ieee->SetWirelessMode(ieee->dev, IEEE_G);
15138 + printk(KERN_INFO"Using G rates\n");
15139 + }else{
15140 + ieee->rate = 22;
15141 + ieee->SetWirelessMode(ieee->dev, IEEE_B);
15142 + printk(KERN_INFO"Using B rates\n");
15143 + }
15144 + memset(ieee->dot11HTOperationalRateSet, 0, 16);
15145 + //HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20, HT_EXTCHNL_OFFSET_NO_EXT);
15146 + ieee->state = IEEE80211_LINKED;
15147 + }
15148 +
15149 + }
15150 + }
15151 +
15152 +}
15153 +
15154 +void ieee80211_softmac_check_all_nets(struct ieee80211_device *ieee)
15155 +{
15156 + unsigned long flags;
15157 + struct ieee80211_network *target;
15158 +
15159 + spin_lock_irqsave(&ieee->lock, flags);
15160 +
15161 + list_for_each_entry(target, &ieee->network_list, list) {
15162 +
15163 + /* if the state become different that NOLINK means
15164 + * we had found what we are searching for
15165 + */
15166 +
15167 + if (ieee->state != IEEE80211_NOLINK)
15168 + break;
15169 +
15170 + if (ieee->scan_age == 0 || time_after(target->last_scanned + ieee->scan_age, jiffies))
15171 + ieee80211_softmac_new_net(ieee, target);
15172 + }
15173 +
15174 + spin_unlock_irqrestore(&ieee->lock, flags);
15175 +
15176 +}
15177 +
15178 +
15179 +static inline u16 auth_parse(struct sk_buff *skb, u8** challenge, int *chlen)
15180 +{
15181 + struct ieee80211_authentication *a;
15182 + u8 *t;
15183 + if (skb->len < (sizeof(struct ieee80211_authentication)-sizeof(struct ieee80211_info_element))){
15184 + IEEE80211_DEBUG_MGMT("invalid len in auth resp: %d\n",skb->len);
15185 + return 0xcafe;
15186 + }
15187 + *challenge = NULL;
15188 + a = (struct ieee80211_authentication*) skb->data;
15189 + if(skb->len > (sizeof(struct ieee80211_authentication) +3)){
15190 + t = skb->data + sizeof(struct ieee80211_authentication);
15191 +
15192 + if(*(t++) == MFIE_TYPE_CHALLENGE){
15193 + *chlen = *(t++);
15194 + *challenge = (u8*)kmalloc(*chlen, GFP_ATOMIC);
15195 + memcpy(*challenge, t, *chlen);
15196 + }
15197 + }
15198 +
15199 + return cpu_to_le16(a->status);
15200 +
15201 +}
15202 +
15203 +
15204 +int auth_rq_parse(struct sk_buff *skb,u8* dest)
15205 +{
15206 + struct ieee80211_authentication *a;
15207 +
15208 + if (skb->len < (sizeof(struct ieee80211_authentication)-sizeof(struct ieee80211_info_element))){
15209 + IEEE80211_DEBUG_MGMT("invalid len in auth request: %d\n",skb->len);
15210 + return -1;
15211 + }
15212 + a = (struct ieee80211_authentication*) skb->data;
15213 +
15214 + memcpy(dest,a->header.addr2, ETH_ALEN);
15215 +
15216 + if (le16_to_cpu(a->algorithm) != WLAN_AUTH_OPEN)
15217 + return WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG;
15218 +
15219 + return WLAN_STATUS_SUCCESS;
15220 +}
15221 +
15222 +static short probe_rq_parse(struct ieee80211_device *ieee, struct sk_buff *skb, u8 *src)
15223 +{
15224 + u8 *tag;
15225 + u8 *skbend;
15226 + u8 *ssid=NULL;
15227 + u8 ssidlen = 0;
15228 +
15229 + struct ieee80211_hdr_3addr *header =
15230 + (struct ieee80211_hdr_3addr *) skb->data;
15231 +
15232 + if (skb->len < sizeof (struct ieee80211_hdr_3addr ))
15233 + return -1; /* corrupted */
15234 +
15235 + memcpy(src,header->addr2, ETH_ALEN);
15236 +
15237 + skbend = (u8*)skb->data + skb->len;
15238 +
15239 + tag = skb->data + sizeof (struct ieee80211_hdr_3addr );
15240 +
15241 + while (tag+1 < skbend){
15242 + if (*tag == 0){
15243 + ssid = tag+2;
15244 + ssidlen = *(tag+1);
15245 + break;
15246 + }
15247 + tag++; /* point to the len field */
15248 + tag = tag + *(tag); /* point to the last data byte of the tag */
15249 + tag++; /* point to the next tag */
15250 + }
15251 +
15252 + //IEEE80211DMESG("Card MAC address is "MACSTR, MAC2STR(src));
15253 + if (ssidlen == 0) return 1;
15254 +
15255 + if (!ssid) return 1; /* ssid not found in tagged param */
15256 + return (!strncmp(ssid, ieee->current_network.ssid, ssidlen));
15257 +
15258 +}
15259 +
15260 +int assoc_rq_parse(struct sk_buff *skb,u8* dest)
15261 +{
15262 + struct ieee80211_assoc_request_frame *a;
15263 +
15264 + if (skb->len < (sizeof(struct ieee80211_assoc_request_frame) -
15265 + sizeof(struct ieee80211_info_element))) {
15266 +
15267 + IEEE80211_DEBUG_MGMT("invalid len in auth request:%d \n", skb->len);
15268 + return -1;
15269 + }
15270 +
15271 + a = (struct ieee80211_assoc_request_frame*) skb->data;
15272 +
15273 + memcpy(dest,a->header.addr2,ETH_ALEN);
15274 +
15275 + return 0;
15276 +}
15277 +
15278 +static inline u16 assoc_parse(struct ieee80211_device *ieee, struct sk_buff *skb, int *aid)
15279 +{
15280 + struct ieee80211_assoc_response_frame *response_head;
15281 + u16 status_code;
15282 +
15283 + if (skb->len < sizeof(struct ieee80211_assoc_response_frame)){
15284 + IEEE80211_DEBUG_MGMT("invalid len in auth resp: %d\n", skb->len);
15285 + return 0xcafe;
15286 + }
15287 +
15288 + response_head = (struct ieee80211_assoc_response_frame*) skb->data;
15289 + *aid = le16_to_cpu(response_head->aid) & 0x3fff;
15290 +
15291 + status_code = le16_to_cpu(response_head->status);
15292 + if((status_code==WLAN_STATUS_ASSOC_DENIED_RATES || \
15293 + status_code==WLAN_STATUS_CAPS_UNSUPPORTED)&&
15294 + ((ieee->mode == IEEE_G) &&
15295 + (ieee->current_network.mode == IEEE_N_24G) &&
15296 + (ieee->AsocRetryCount++ < (RT_ASOC_RETRY_LIMIT-1)))) {
15297 + ieee->pHTInfo->IOTAction |= HT_IOT_ACT_PURE_N_MODE;
15298 + }else {
15299 + ieee->AsocRetryCount = 0;
15300 + }
15301 +
15302 + return le16_to_cpu(response_head->status);
15303 +}
15304 +
15305 +static inline void
15306 +ieee80211_rx_probe_rq(struct ieee80211_device *ieee, struct sk_buff *skb)
15307 +{
15308 + u8 dest[ETH_ALEN];
15309 +
15310 + //IEEE80211DMESG("Rx probe");
15311 + ieee->softmac_stats.rx_probe_rq++;
15312 + //DMESG("Dest is "MACSTR, MAC2STR(dest));
15313 + if (probe_rq_parse(ieee, skb, dest)){
15314 + //IEEE80211DMESG("Was for me!");
15315 + ieee->softmac_stats.tx_probe_rs++;
15316 + ieee80211_resp_to_probe(ieee, dest);
15317 + }
15318 +}
15319 +
15320 +static inline void
15321 +ieee80211_rx_auth_rq(struct ieee80211_device *ieee, struct sk_buff *skb)
15322 +{
15323 + u8 dest[ETH_ALEN];
15324 + int status;
15325 + //IEEE80211DMESG("Rx probe");
15326 + ieee->softmac_stats.rx_auth_rq++;
15327 +
15328 + if ((status = auth_rq_parse(skb, dest))!= -1){
15329 + ieee80211_resp_to_auth(ieee, status, dest);
15330 + }
15331 + //DMESG("Dest is "MACSTR, MAC2STR(dest));
15332 +
15333 +}
15334 +
15335 +static inline void
15336 +ieee80211_rx_assoc_rq(struct ieee80211_device *ieee, struct sk_buff *skb)
15337 +{
15338 +
15339 + u8 dest[ETH_ALEN];
15340 + //unsigned long flags;
15341 +
15342 + ieee->softmac_stats.rx_ass_rq++;
15343 + if (assoc_rq_parse(skb,dest) != -1){
15344 + ieee80211_resp_to_assoc_rq(ieee, dest);
15345 + }
15346 +
15347 + printk(KERN_INFO"New client associated: "MAC_FMT"\n", MAC_ARG(dest));
15348 + //FIXME
15349 + #if 0
15350 + spin_lock_irqsave(&ieee->lock,flags);
15351 + add_associate(ieee,dest);
15352 + spin_unlock_irqrestore(&ieee->lock,flags);
15353 + #endif
15354 +}
15355 +
15356 +
15357 +
15358 +void ieee80211_sta_ps_send_null_frame(struct ieee80211_device *ieee, short pwr)
15359 +{
15360 +
15361 + struct sk_buff *buf = ieee80211_null_func(ieee, pwr);
15362 +
15363 + if (buf)
15364 + softmac_ps_mgmt_xmit(buf, ieee);
15365 +
15366 +}
15367 +
15368 +
15369 +short ieee80211_sta_ps_sleep(struct ieee80211_device *ieee, u32 *time_h, u32 *time_l)
15370 +{
15371 + int timeout = ieee->ps_timeout;
15372 + u8 dtim;
15373 + /*if(ieee->ps == IEEE80211_PS_DISABLED ||
15374 + ieee->iw_mode != IW_MODE_INFRA ||
15375 + ieee->state != IEEE80211_LINKED)
15376 +
15377 + return 0;
15378 + */
15379 + dtim = ieee->current_network.dtim_data;
15380 + //printk("DTIM\n");
15381 + if(!(dtim & IEEE80211_DTIM_VALID))
15382 + return 0;
15383 + timeout = ieee->current_network.beacon_interval; //should we use ps_timeout value or beacon_interval
15384 + //printk("VALID\n");
15385 + ieee->current_network.dtim_data = IEEE80211_DTIM_INVALID;
15386 +
15387 + if(dtim & ((IEEE80211_DTIM_UCAST | IEEE80211_DTIM_MBCAST)& ieee->ps))
15388 + return 2;
15389 +
15390 + if(!time_after(jiffies, ieee->dev->trans_start + MSECS(timeout)))
15391 + return 0;
15392 +
15393 + if(!time_after(jiffies, ieee->last_rx_ps_time + MSECS(timeout)))
15394 + return 0;
15395 +
15396 + if((ieee->softmac_features & IEEE_SOFTMAC_SINGLE_QUEUE ) &&
15397 + (ieee->mgmt_queue_tail != ieee->mgmt_queue_head))
15398 + return 0;
15399 +
15400 + if(time_l){
15401 + *time_l = ieee->current_network.last_dtim_sta_time[0]
15402 + + (ieee->current_network.beacon_interval);
15403 + // * ieee->current_network.dtim_period) * 1000;
15404 + }
15405 +
15406 + if(time_h){
15407 + *time_h = ieee->current_network.last_dtim_sta_time[1];
15408 + if(time_l && *time_l < ieee->current_network.last_dtim_sta_time[0])
15409 + *time_h += 1;
15410 + }
15411 +
15412 + return 1;
15413 +
15414 +
15415 +}
15416 +
15417 +inline void ieee80211_sta_ps(struct ieee80211_device *ieee)
15418 +{
15419 +
15420 + u32 th,tl;
15421 + short sleep;
15422 +
15423 + unsigned long flags,flags2;
15424 +
15425 + spin_lock_irqsave(&ieee->lock, flags);
15426 +
15427 + if((ieee->ps == IEEE80211_PS_DISABLED ||
15428 + ieee->iw_mode != IW_MODE_INFRA ||
15429 + ieee->state != IEEE80211_LINKED)){
15430 +
15431 + // #warning CHECK_LOCK_HERE
15432 + spin_lock_irqsave(&ieee->mgmt_tx_lock, flags2);
15433 +
15434 + ieee80211_sta_wakeup(ieee, 1);
15435 +
15436 + spin_unlock_irqrestore(&ieee->mgmt_tx_lock, flags2);
15437 + }
15438 +
15439 + sleep = ieee80211_sta_ps_sleep(ieee,&th, &tl);
15440 + /* 2 wake, 1 sleep, 0 do nothing */
15441 + if(sleep == 0)
15442 + goto out;
15443 +
15444 + if(sleep == 1){
15445 +
15446 + if(ieee->sta_sleep == 1)
15447 + ieee->enter_sleep_state(ieee->dev,th,tl);
15448 +
15449 + else if(ieee->sta_sleep == 0){
15450 + // printk("send null 1\n");
15451 + spin_lock_irqsave(&ieee->mgmt_tx_lock, flags2);
15452 +
15453 + if(ieee->ps_is_queue_empty(ieee->dev)){
15454 +
15455 +
15456 + ieee->sta_sleep = 2;
15457 +
15458 + ieee->ack_tx_to_ieee = 1;
15459 +
15460 + ieee80211_sta_ps_send_null_frame(ieee,1);
15461 +
15462 + ieee->ps_th = th;
15463 + ieee->ps_tl = tl;
15464 + }
15465 + spin_unlock_irqrestore(&ieee->mgmt_tx_lock, flags2);
15466 +
15467 + }
15468 +
15469 +
15470 + }else if(sleep == 2){
15471 +//#warning CHECK_LOCK_HERE
15472 + spin_lock_irqsave(&ieee->mgmt_tx_lock, flags2);
15473 +
15474 + ieee80211_sta_wakeup(ieee,1);
15475 +
15476 + spin_unlock_irqrestore(&ieee->mgmt_tx_lock, flags2);
15477 + }
15478 +
15479 +out:
15480 + spin_unlock_irqrestore(&ieee->lock, flags);
15481 +
15482 +}
15483 +
15484 +void ieee80211_sta_wakeup(struct ieee80211_device *ieee, short nl)
15485 +{
15486 + if(ieee->sta_sleep == 0){
15487 + if(nl){
15488 + printk("Warning: driver is probably failing to report TX ps error\n");
15489 + ieee->ack_tx_to_ieee = 1;
15490 + ieee80211_sta_ps_send_null_frame(ieee, 0);
15491 + }
15492 + return;
15493 +
15494 + }
15495 +
15496 + if(ieee->sta_sleep == 1)
15497 + ieee->sta_wake_up(ieee->dev);
15498 +
15499 + ieee->sta_sleep = 0;
15500 +
15501 + if(nl){
15502 + ieee->ack_tx_to_ieee = 1;
15503 + ieee80211_sta_ps_send_null_frame(ieee, 0);
15504 + }
15505 +}
15506 +
15507 +void ieee80211_ps_tx_ack(struct ieee80211_device *ieee, short success)
15508 +{
15509 + unsigned long flags,flags2;
15510 +
15511 + spin_lock_irqsave(&ieee->lock, flags);
15512 +
15513 + if(ieee->sta_sleep == 2){
15514 + /* Null frame with PS bit set */
15515 + if(success){
15516 + ieee->sta_sleep = 1;
15517 + ieee->enter_sleep_state(ieee->dev,ieee->ps_th,ieee->ps_tl);
15518 + }
15519 + /* if the card report not success we can't be sure the AP
15520 + * has not RXed so we can't assume the AP believe us awake
15521 + */
15522 + }
15523 + /* 21112005 - tx again null without PS bit if lost */
15524 + else {
15525 +
15526 + if((ieee->sta_sleep == 0) && !success){
15527 + spin_lock_irqsave(&ieee->mgmt_tx_lock, flags2);
15528 + ieee80211_sta_ps_send_null_frame(ieee, 0);
15529 + spin_unlock_irqrestore(&ieee->mgmt_tx_lock, flags2);
15530 + }
15531 + }
15532 + spin_unlock_irqrestore(&ieee->lock, flags);
15533 +}
15534 +void ieee80211_process_action(struct ieee80211_device* ieee, struct sk_buff* skb)
15535 +{
15536 + struct ieee80211_hdr* header = (struct ieee80211_hdr*)skb->data;
15537 + u8* act = ieee80211_get_payload(header);
15538 + u8 tmp = 0;
15539 +// IEEE80211_DEBUG_DATA(IEEE80211_DL_DATA|IEEE80211_DL_BA, skb->data, skb->len);
15540 + if (act == NULL)
15541 + {
15542 + IEEE80211_DEBUG(IEEE80211_DL_ERR, "error to get payload of action frame\n");
15543 + return;
15544 + }
15545 + tmp = *act;
15546 + act ++;
15547 + switch (tmp)
15548 + {
15549 + case ACT_CAT_BA:
15550 + if (*act == ACT_ADDBAREQ)
15551 + ieee80211_rx_ADDBAReq(ieee, skb);
15552 + else if (*act == ACT_ADDBARSP)
15553 + ieee80211_rx_ADDBARsp(ieee, skb);
15554 + else if (*act == ACT_DELBA)
15555 + ieee80211_rx_DELBA(ieee, skb);
15556 + break;
15557 + default:
15558 +// if (net_ratelimit())
15559 +// IEEE80211_DEBUG(IEEE80211_DL_BA, "unknown action frame(%d)\n", tmp);
15560 + break;
15561 + }
15562 + return;
15563 +
15564 +}
15565 +inline int
15566 +ieee80211_rx_frame_softmac(struct ieee80211_device *ieee, struct sk_buff *skb,
15567 + struct ieee80211_rx_stats *rx_stats, u16 type,
15568 + u16 stype)
15569 +{
15570 + struct ieee80211_hdr_3addr *header = (struct ieee80211_hdr_3addr *) skb->data;
15571 + u16 errcode;
15572 + u8* challenge;
15573 + int chlen=0;
15574 + int aid;
15575 + struct ieee80211_assoc_response_frame *assoc_resp;
15576 +// struct ieee80211_info_element *info_element;
15577 + bool bSupportNmode = true, bHalfSupportNmode = false; //default support N mode, disable halfNmode
15578 +
15579 + if(!ieee->proto_started)
15580 + return 0;
15581 +#if 0
15582 + printk("%d, %d, %d, %d\n", ieee->sta_sleep, ieee->ps, ieee->iw_mode, ieee->state);
15583 + if(ieee->sta_sleep || (ieee->ps != IEEE80211_PS_DISABLED &&
15584 + ieee->iw_mode == IW_MODE_INFRA &&
15585 + ieee->state == IEEE80211_LINKED))
15586 +
15587 + tasklet_schedule(&ieee->ps_task);
15588 +
15589 + if(WLAN_FC_GET_STYPE(header->frame_ctl) != IEEE80211_STYPE_PROBE_RESP &&
15590 + WLAN_FC_GET_STYPE(header->frame_ctl) != IEEE80211_STYPE_BEACON)
15591 + ieee->last_rx_ps_time = jiffies;
15592 +#endif
15593 +
15594 + switch (WLAN_FC_GET_STYPE(header->frame_ctl)) {
15595 +
15596 + case IEEE80211_STYPE_ASSOC_RESP:
15597 + case IEEE80211_STYPE_REASSOC_RESP:
15598 +
15599 + IEEE80211_DEBUG_MGMT("received [RE]ASSOCIATION RESPONSE (%d)\n",
15600 + WLAN_FC_GET_STYPE(header->frame_ctl));
15601 + if ((ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE) &&
15602 + ieee->state == IEEE80211_ASSOCIATING_AUTHENTICATED &&
15603 + ieee->iw_mode == IW_MODE_INFRA){
15604 + struct ieee80211_network network_resp;
15605 + struct ieee80211_network *network = &network_resp;
15606 +
15607 + if (0 == (errcode=assoc_parse(ieee,skb, &aid))){
15608 + ieee->state=IEEE80211_LINKED;
15609 + ieee->assoc_id = aid;
15610 + ieee->softmac_stats.rx_ass_ok++;
15611 + /* station support qos */
15612 + /* Let the register setting defaultly with Legacy station */
15613 + if(ieee->qos_support) {
15614 + assoc_resp = (struct ieee80211_assoc_response_frame*)skb->data;
15615 + memset(network, 0, sizeof(*network));
15616 + if (ieee80211_parse_info_param(ieee,assoc_resp->info_element,\
15617 + rx_stats->len - sizeof(*assoc_resp),\
15618 + network,rx_stats)){
15619 + return 1;
15620 + }
15621 + else
15622 + { //filling the PeerHTCap. //maybe not neccesary as we can get its info from current_network.
15623 + memcpy(ieee->pHTInfo->PeerHTCapBuf, network->bssht.bdHTCapBuf, network->bssht.bdHTCapLen);
15624 + memcpy(ieee->pHTInfo->PeerHTInfoBuf, network->bssht.bdHTInfoBuf, network->bssht.bdHTInfoLen);
15625 + }
15626 + if (ieee->handle_assoc_response != NULL)
15627 + ieee->handle_assoc_response(ieee->dev, (struct ieee80211_assoc_response_frame*)header, network);
15628 + }
15629 + ieee80211_associate_complete(ieee);
15630 + } else {
15631 + /* aid could not been allocated */
15632 + ieee->softmac_stats.rx_ass_err++;
15633 + printk(
15634 + "Association response status code 0x%x\n",
15635 + errcode);
15636 + IEEE80211_DEBUG_MGMT(
15637 + "Association response status code 0x%x\n",
15638 + errcode);
15639 + if(ieee->AsocRetryCount < RT_ASOC_RETRY_LIMIT) {
15640 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
15641 + queue_work(ieee->wq, &ieee->associate_procedure_wq);
15642 +#else
15643 + schedule_task(&ieee->associate_procedure_wq);
15644 +#endif
15645 + } else {
15646 + ieee80211_associate_abort(ieee);
15647 + }
15648 + }
15649 + }
15650 + break;
15651 +
15652 + case IEEE80211_STYPE_ASSOC_REQ:
15653 + case IEEE80211_STYPE_REASSOC_REQ:
15654 +
15655 + if ((ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE) &&
15656 + ieee->iw_mode == IW_MODE_MASTER)
15657 +
15658 + ieee80211_rx_assoc_rq(ieee, skb);
15659 + break;
15660 +
15661 + case IEEE80211_STYPE_AUTH:
15662 +
15663 + if (ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE){
15664 + if (ieee->state == IEEE80211_ASSOCIATING_AUTHENTICATING &&
15665 + ieee->iw_mode == IW_MODE_INFRA){
15666 +
15667 + IEEE80211_DEBUG_MGMT("Received authentication response");
15668 +
15669 + if (0 == (errcode=auth_parse(skb, &challenge, &chlen))){
15670 + if(ieee->open_wep || !challenge){
15671 + ieee->state = IEEE80211_ASSOCIATING_AUTHENTICATED;
15672 + ieee->softmac_stats.rx_auth_rs_ok++;
15673 + if(!(ieee->pHTInfo->IOTAction&HT_IOT_ACT_PURE_N_MODE))
15674 + {
15675 + if (!ieee->GetNmodeSupportBySecCfg(ieee->dev))
15676 + {
15677 + // WEP or TKIP encryption
15678 + if(IsHTHalfNmodeAPs(ieee))
15679 + {
15680 + bSupportNmode = true;
15681 + bHalfSupportNmode = true;
15682 + }
15683 + else
15684 + {
15685 + bSupportNmode = false;
15686 + bHalfSupportNmode = false;
15687 + }
15688 + printk("==========>to link with AP using SEC(%d, %d)", bSupportNmode, bHalfSupportNmode);
15689 + }
15690 + }
15691 + /* Dummy wirless mode setting to avoid encryption issue */
15692 + if(bSupportNmode) {
15693 + //N mode setting
15694 + ieee->SetWirelessMode(ieee->dev, \
15695 + ieee->current_network.mode);
15696 + }else{
15697 + //b/g mode setting
15698 + /*TODO*/
15699 + ieee->SetWirelessMode(ieee->dev, IEEE_G);
15700 + }
15701 +
15702 + if (ieee->current_network.mode == IEEE_N_24G && bHalfSupportNmode == true)
15703 + {
15704 + printk("===============>entern half N mode\n");
15705 + ieee->bHalfWirelessN24GMode = true;
15706 + }
15707 + else
15708 + ieee->bHalfWirelessN24GMode = false;
15709 +
15710 + ieee80211_associate_step2(ieee);
15711 + }else{
15712 + ieee80211_auth_challenge(ieee, challenge, chlen);
15713 + }
15714 + }else{
15715 + ieee->softmac_stats.rx_auth_rs_err++;
15716 + IEEE80211_DEBUG_MGMT("Authentication respose status code 0x%x",errcode);
15717 +
15718 + printk("Authentication respose status code 0x%x",errcode);
15719 + ieee80211_associate_abort(ieee);
15720 + }
15721 +
15722 + }else if (ieee->iw_mode == IW_MODE_MASTER){
15723 + ieee80211_rx_auth_rq(ieee, skb);
15724 + }
15725 + }
15726 + break;
15727 +
15728 + case IEEE80211_STYPE_PROBE_REQ:
15729 +
15730 + if ((ieee->softmac_features & IEEE_SOFTMAC_PROBERS) &&
15731 + ((ieee->iw_mode == IW_MODE_ADHOC ||
15732 + ieee->iw_mode == IW_MODE_MASTER) &&
15733 + ieee->state == IEEE80211_LINKED)){
15734 + ieee80211_rx_probe_rq(ieee, skb);
15735 + }
15736 + break;
15737 +
15738 + case IEEE80211_STYPE_DISASSOC:
15739 + case IEEE80211_STYPE_DEAUTH:
15740 + /* FIXME for now repeat all the association procedure
15741 + * both for disassociation and deauthentication
15742 + */
15743 + if ((ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE) &&
15744 + ieee->state == IEEE80211_LINKED &&
15745 + ieee->iw_mode == IW_MODE_INFRA){
15746 +
15747 + ieee->state = IEEE80211_ASSOCIATING;
15748 + ieee->softmac_stats.reassoc++;
15749 + ieee->is_roaming = true;
15750 + ieee80211_disassociate(ieee);
15751 + // notify_wx_assoc_event(ieee);
15752 + //HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20, HT_EXTCHNL_OFFSET_NO_EXT);
15753 + RemovePeerTS(ieee, header->addr2);
15754 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
15755 + queue_work(ieee->wq, &ieee->associate_procedure_wq);
15756 +#else
15757 + schedule_task(&ieee->associate_procedure_wq);
15758 +#endif
15759 + }
15760 + break;
15761 + case IEEE80211_STYPE_MANAGE_ACT:
15762 + ieee80211_process_action(ieee,skb);
15763 + break;
15764 + default:
15765 + return -1;
15766 + break;
15767 + }
15768 +
15769 + //dev_kfree_skb_any(skb);
15770 + return 0;
15771 +}
15772 +
15773 +/* following are for a simplier TX queue management.
15774 + * Instead of using netif_[stop/wake]_queue the driver
15775 + * will uses these two function (plus a reset one), that
15776 + * will internally uses the kernel netif_* and takes
15777 + * care of the ieee802.11 fragmentation.
15778 + * So the driver receives a fragment per time and might
15779 + * call the stop function when it want without take care
15780 + * to have enought room to TX an entire packet.
15781 + * This might be useful if each fragment need it's own
15782 + * descriptor, thus just keep a total free memory > than
15783 + * the max fragmentation treshold is not enought.. If the
15784 + * ieee802.11 stack passed a TXB struct then you needed
15785 + * to keep N free descriptors where
15786 + * N = MAX_PACKET_SIZE / MIN_FRAG_TRESHOLD
15787 + * In this way you need just one and the 802.11 stack
15788 + * will take care of buffering fragments and pass them to
15789 + * to the driver later, when it wakes the queue.
15790 + */
15791 +void ieee80211_softmac_xmit(struct ieee80211_txb *txb, struct ieee80211_device *ieee)
15792 +{
15793 +
15794 + unsigned int queue_index = txb->queue_index;
15795 + unsigned long flags;
15796 + int i;
15797 + cb_desc *tcb_desc = NULL;
15798 +
15799 + spin_lock_irqsave(&ieee->lock,flags);
15800 +
15801 + /* called with 2nd parm 0, no tx mgmt lock required */
15802 + ieee80211_sta_wakeup(ieee,0);
15803 +
15804 + /* update the tx status */
15805 +// ieee->stats.tx_bytes += txb->payload_size;
15806 +// ieee->stats.tx_packets++;
15807 + tcb_desc = (cb_desc *)(txb->fragments[0]->cb + MAX_DEV_ADDR_SIZE);
15808 + if(tcb_desc->bMulticast) {
15809 + ieee->stats.multicast++;
15810 + }
15811 +#if 1
15812 + /* if xmit available, just xmit it immediately, else just insert it to the wait queue */
15813 + for(i = 0; i < txb->nr_frags; i++) {
15814 +#ifdef USB_TX_DRIVER_AGGREGATION_ENABLE
15815 + if ((skb_queue_len(&ieee->skb_drv_aggQ[queue_index]) != 0) ||
15816 +#else
15817 + if ((skb_queue_len(&ieee->skb_waitQ[queue_index]) != 0) ||
15818 +#endif
15819 + (!ieee->check_nic_enough_desc(ieee->dev,queue_index))||\
15820 + (ieee->queue_stop)) {
15821 + /* insert the skb packet to the wait queue */
15822 + /* as for the completion function, it does not need
15823 + * to check it any more.
15824 + * */
15825 + //printk("error:no descriptor left@queue_index %d\n", queue_index);
15826 + //ieee80211_stop_queue(ieee);
15827 +#ifdef USB_TX_DRIVER_AGGREGATION_ENABLE
15828 + skb_queue_tail(&ieee->skb_drv_aggQ[queue_index], txb->fragments[i]);
15829 +#else
15830 + skb_queue_tail(&ieee->skb_waitQ[queue_index], txb->fragments[i]);
15831 +#endif
15832 + }else{
15833 + ieee->softmac_data_hard_start_xmit(
15834 + txb->fragments[i],
15835 + ieee->dev,ieee->rate);
15836 + //ieee->stats.tx_packets++;
15837 + //ieee->stats.tx_bytes += txb->fragments[i]->len;
15838 + //ieee->dev->trans_start = jiffies;
15839 + }
15840 + }
15841 +#endif
15842 + ieee80211_txb_free(txb);
15843 +
15844 +//exit:
15845 + spin_unlock_irqrestore(&ieee->lock,flags);
15846 +
15847 +}
15848 +
15849 +/* called with ieee->lock acquired */
15850 +void ieee80211_resume_tx(struct ieee80211_device *ieee)
15851 +{
15852 + int i;
15853 + for(i = ieee->tx_pending.frag; i < ieee->tx_pending.txb->nr_frags; i++) {
15854 +
15855 + if (ieee->queue_stop){
15856 + ieee->tx_pending.frag = i;
15857 + return;
15858 + }else{
15859 +
15860 + ieee->softmac_data_hard_start_xmit(
15861 + ieee->tx_pending.txb->fragments[i],
15862 + ieee->dev,ieee->rate);
15863 + //(i+1)<ieee->tx_pending.txb->nr_frags);
15864 + ieee->stats.tx_packets++;
15865 + // ieee->dev->trans_start = jiffies;
15866 + }
15867 + }
15868 +
15869 +
15870 + ieee80211_txb_free(ieee->tx_pending.txb);
15871 + ieee->tx_pending.txb = NULL;
15872 +}
15873 +
15874 +
15875 +void ieee80211_reset_queue(struct ieee80211_device *ieee)
15876 +{
15877 + unsigned long flags;
15878 +
15879 + spin_lock_irqsave(&ieee->lock,flags);
15880 + init_mgmt_queue(ieee);
15881 + if (ieee->tx_pending.txb){
15882 + ieee80211_txb_free(ieee->tx_pending.txb);
15883 + ieee->tx_pending.txb = NULL;
15884 + }
15885 + ieee->queue_stop = 0;
15886 + spin_unlock_irqrestore(&ieee->lock,flags);
15887 +
15888 +}
15889 +
15890 +void ieee80211_wake_queue(struct ieee80211_device *ieee)
15891 +{
15892 +
15893 + unsigned long flags;
15894 + struct sk_buff *skb;
15895 + struct ieee80211_hdr_3addr *header;
15896 +
15897 + spin_lock_irqsave(&ieee->lock,flags);
15898 + if (! ieee->queue_stop) goto exit;
15899 +
15900 + ieee->queue_stop = 0;
15901 +
15902 + if(ieee->softmac_features & IEEE_SOFTMAC_SINGLE_QUEUE){
15903 + while (!ieee->queue_stop && (skb = dequeue_mgmt(ieee))){
15904 +
15905 + header = (struct ieee80211_hdr_3addr *) skb->data;
15906 +
15907 + header->seq_ctl = cpu_to_le16(ieee->seq_ctrl[0] << 4);
15908 +
15909 + if (ieee->seq_ctrl[0] == 0xFFF)
15910 + ieee->seq_ctrl[0] = 0;
15911 + else
15912 + ieee->seq_ctrl[0]++;
15913 +
15914 + ieee->softmac_data_hard_start_xmit(skb,ieee->dev,ieee->basic_rate);
15915 + //dev_kfree_skb_any(skb);//edit by thomas
15916 + }
15917 + }
15918 + if (!ieee->queue_stop && ieee->tx_pending.txb)
15919 + ieee80211_resume_tx(ieee);
15920 +
15921 + if (!ieee->queue_stop && netif_queue_stopped(ieee->dev)){
15922 + ieee->softmac_stats.swtxawake++;
15923 + netif_wake_queue(ieee->dev);
15924 + }
15925 +
15926 +exit :
15927 + spin_unlock_irqrestore(&ieee->lock,flags);
15928 +}
15929 +
15930 +
15931 +void ieee80211_stop_queue(struct ieee80211_device *ieee)
15932 +{
15933 + //unsigned long flags;
15934 + //spin_lock_irqsave(&ieee->lock,flags);
15935 +
15936 + if (! netif_queue_stopped(ieee->dev)){
15937 + netif_stop_queue(ieee->dev);
15938 + ieee->softmac_stats.swtxstop++;
15939 + }
15940 + ieee->queue_stop = 1;
15941 + //spin_unlock_irqrestore(&ieee->lock,flags);
15942 +
15943 +}
15944 +
15945 +
15946 +inline void ieee80211_randomize_cell(struct ieee80211_device *ieee)
15947 +{
15948 +
15949 + get_random_bytes(ieee->current_network.bssid, ETH_ALEN);
15950 +
15951 + /* an IBSS cell address must have the two less significant
15952 + * bits of the first byte = 2
15953 + */
15954 + ieee->current_network.bssid[0] &= ~0x01;
15955 + ieee->current_network.bssid[0] |= 0x02;
15956 +}
15957 +
15958 +/* called in user context only */
15959 +void ieee80211_start_master_bss(struct ieee80211_device *ieee)
15960 +{
15961 + ieee->assoc_id = 1;
15962 +
15963 + if (ieee->current_network.ssid_len == 0){
15964 + strncpy(ieee->current_network.ssid,
15965 + IEEE80211_DEFAULT_TX_ESSID,
15966 + IW_ESSID_MAX_SIZE);
15967 +
15968 + ieee->current_network.ssid_len = strlen(IEEE80211_DEFAULT_TX_ESSID);
15969 + ieee->ssid_set = 1;
15970 + }
15971 +
15972 + memcpy(ieee->current_network.bssid, ieee->dev->dev_addr, ETH_ALEN);
15973 +
15974 + ieee->set_chan(ieee->dev, ieee->current_network.channel);
15975 + ieee->state = IEEE80211_LINKED;
15976 + ieee->link_change(ieee->dev);
15977 + notify_wx_assoc_event(ieee);
15978 +
15979 + if (ieee->data_hard_resume)
15980 + ieee->data_hard_resume(ieee->dev);
15981 +
15982 + netif_carrier_on(ieee->dev);
15983 +}
15984 +
15985 +void ieee80211_start_monitor_mode(struct ieee80211_device *ieee)
15986 +{
15987 + if(ieee->raw_tx){
15988 +
15989 + if (ieee->data_hard_resume)
15990 + ieee->data_hard_resume(ieee->dev);
15991 +
15992 + netif_carrier_on(ieee->dev);
15993 + }
15994 +}
15995 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
15996 +void ieee80211_start_ibss_wq(struct work_struct *work)
15997 +{
15998 +
15999 + struct delayed_work *dwork = container_of(work, struct delayed_work, work);
16000 + struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, start_ibss_wq);
16001 +#else
16002 +void ieee80211_start_ibss_wq(struct ieee80211_device *ieee)
16003 +{
16004 +#endif
16005 + /* iwconfig mode ad-hoc will schedule this and return
16006 + * on the other hand this will block further iwconfig SET
16007 + * operations because of the wx_sem hold.
16008 + * Anyway some most set operations set a flag to speed-up
16009 + * (abort) this wq (when syncro scanning) before sleeping
16010 + * on the semaphore
16011 + */
16012 + if(!ieee->proto_started){
16013 + printk("==========oh driver down return\n");
16014 + return;
16015 + }
16016 + down(&ieee->wx_sem);
16017 +
16018 + if (ieee->current_network.ssid_len == 0){
16019 + strcpy(ieee->current_network.ssid,IEEE80211_DEFAULT_TX_ESSID);
16020 + ieee->current_network.ssid_len = strlen(IEEE80211_DEFAULT_TX_ESSID);
16021 + ieee->ssid_set = 1;
16022 + }
16023 +
16024 + /* check if we have this cell in our network list */
16025 + ieee80211_softmac_check_all_nets(ieee);
16026 +
16027 +
16028 +#ifdef ENABLE_DOT11D //if creating an ad-hoc, set its channel to 10 temporarily--this is the requirement for ASUS, not 11D, so disable 11d.
16029 +// if((IS_DOT11D_ENABLE(ieee)) && (ieee->state == IEEE80211_NOLINK))
16030 + if (ieee->state == IEEE80211_NOLINK)
16031 + ieee->current_network.channel = 6;
16032 +#endif
16033 + /* if not then the state is not linked. Maybe the user swithced to
16034 + * ad-hoc mode just after being in monitor mode, or just after
16035 + * being very few time in managed mode (so the card have had no
16036 + * time to scan all the chans..) or we have just run up the iface
16037 + * after setting ad-hoc mode. So we have to give another try..
16038 + * Here, in ibss mode, should be safe to do this without extra care
16039 + * (in bss mode we had to make sure no-one tryed to associate when
16040 + * we had just checked the ieee->state and we was going to start the
16041 + * scan) beacause in ibss mode the ieee80211_new_net function, when
16042 + * finds a good net, just set the ieee->state to IEEE80211_LINKED,
16043 + * so, at worst, we waste a bit of time to initiate an unneeded syncro
16044 + * scan, that will stop at the first round because it sees the state
16045 + * associated.
16046 + */
16047 + if (ieee->state == IEEE80211_NOLINK)
16048 + ieee80211_start_scan_syncro(ieee);
16049 +
16050 + /* the network definitively is not here.. create a new cell */
16051 + if (ieee->state == IEEE80211_NOLINK){
16052 + printk("creating new IBSS cell\n");
16053 + if(!ieee->wap_set)
16054 + ieee80211_randomize_cell(ieee);
16055 +
16056 + if(ieee->modulation & IEEE80211_CCK_MODULATION){
16057 +
16058 + ieee->current_network.rates_len = 4;
16059 +
16060 + ieee->current_network.rates[0] = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_1MB;
16061 + ieee->current_network.rates[1] = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_2MB;
16062 + ieee->current_network.rates[2] = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_5MB;
16063 + ieee->current_network.rates[3] = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_11MB;
16064 +
16065 + }else
16066 + ieee->current_network.rates_len = 0;
16067 +
16068 + if(ieee->modulation & IEEE80211_OFDM_MODULATION){
16069 + ieee->current_network.rates_ex_len = 8;
16070 +
16071 + ieee->current_network.rates_ex[0] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_6MB;
16072 + ieee->current_network.rates_ex[1] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_9MB;
16073 + ieee->current_network.rates_ex[2] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_12MB;
16074 + ieee->current_network.rates_ex[3] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_18MB;
16075 + ieee->current_network.rates_ex[4] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_24MB;
16076 + ieee->current_network.rates_ex[5] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_36MB;
16077 + ieee->current_network.rates_ex[6] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_48MB;
16078 + ieee->current_network.rates_ex[7] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_54MB;
16079 +
16080 + ieee->rate = 108;
16081 + }else{
16082 + ieee->current_network.rates_ex_len = 0;
16083 + ieee->rate = 22;
16084 + }
16085 +
16086 + // By default, WMM function will be disabled in IBSS mode
16087 + ieee->current_network.QoS_Enable = 0;
16088 + ieee->SetWirelessMode(ieee->dev, IEEE_G);
16089 + ieee->current_network.atim_window = 0;
16090 + ieee->current_network.capability = WLAN_CAPABILITY_IBSS;
16091 + if(ieee->short_slot)
16092 + ieee->current_network.capability |= WLAN_CAPABILITY_SHORT_SLOT;
16093 +
16094 + }
16095 +
16096 + ieee->state = IEEE80211_LINKED;
16097 +
16098 + ieee->set_chan(ieee->dev, ieee->current_network.channel);
16099 + ieee->link_change(ieee->dev);
16100 +
16101 + notify_wx_assoc_event(ieee);
16102 +
16103 + ieee80211_start_send_beacons(ieee);
16104 +
16105 + if (ieee->data_hard_resume)
16106 + ieee->data_hard_resume(ieee->dev);
16107 + netif_carrier_on(ieee->dev);
16108 +
16109 + up(&ieee->wx_sem);
16110 +}
16111 +
16112 +inline void ieee80211_start_ibss(struct ieee80211_device *ieee)
16113 +{
16114 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
16115 + queue_delayed_work(ieee->wq, &ieee->start_ibss_wq, 150);
16116 +#else
16117 + schedule_task(&ieee->start_ibss_wq);
16118 +#endif
16119 +}
16120 +
16121 +/* this is called only in user context, with wx_sem held */
16122 +void ieee80211_start_bss(struct ieee80211_device *ieee)
16123 +{
16124 + unsigned long flags;
16125 +#ifdef ENABLE_DOT11D
16126 + //
16127 + // Ref: 802.11d 11.1.3.3
16128 + // STA shall not start a BSS unless properly formed Beacon frame including a Country IE.
16129 + //
16130 + if(IS_DOT11D_ENABLE(ieee) && !IS_COUNTRY_IE_VALID(ieee))
16131 + {
16132 + if(! ieee->bGlobalDomain)
16133 + {
16134 + return;
16135 + }
16136 + }
16137 +#endif
16138 + /* check if we have already found the net we
16139 + * are interested in (if any).
16140 + * if not (we are disassociated and we are not
16141 + * in associating / authenticating phase) start the background scanning.
16142 + */
16143 + ieee80211_softmac_check_all_nets(ieee);
16144 +
16145 + /* ensure no-one start an associating process (thus setting
16146 + * the ieee->state to ieee80211_ASSOCIATING) while we
16147 + * have just cheked it and we are going to enable scan.
16148 + * The ieee80211_new_net function is always called with
16149 + * lock held (from both ieee80211_softmac_check_all_nets and
16150 + * the rx path), so we cannot be in the middle of such function
16151 + */
16152 + spin_lock_irqsave(&ieee->lock, flags);
16153 +
16154 + if (ieee->state == IEEE80211_NOLINK){
16155 + ieee->actscanning = true;
16156 + ieee80211_start_scan(ieee);
16157 + }
16158 + spin_unlock_irqrestore(&ieee->lock, flags);
16159 +}
16160 +
16161 +/* called only in userspace context */
16162 +void ieee80211_disassociate(struct ieee80211_device *ieee)
16163 +{
16164 +
16165 +
16166 + netif_carrier_off(ieee->dev);
16167 + if (ieee->softmac_features & IEEE_SOFTMAC_TX_QUEUE)
16168 + ieee80211_reset_queue(ieee);
16169 +
16170 + if (ieee->data_hard_stop)
16171 + ieee->data_hard_stop(ieee->dev);
16172 +#ifdef ENABLE_DOT11D
16173 + if(IS_DOT11D_ENABLE(ieee))
16174 + Dot11d_Reset(ieee);
16175 +#endif
16176 + ieee->state = IEEE80211_NOLINK;
16177 + ieee->is_set_key = false;
16178 + ieee->link_change(ieee->dev);
16179 + //HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20, HT_EXTCHNL_OFFSET_NO_EXT);
16180 + notify_wx_assoc_event(ieee);
16181 +
16182 +}
16183 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
16184 +void ieee80211_associate_retry_wq(struct work_struct *work)
16185 +{
16186 + struct delayed_work *dwork = container_of(work, struct delayed_work, work);
16187 + struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, associate_retry_wq);
16188 +#else
16189 +void ieee80211_associate_retry_wq(struct ieee80211_device *ieee)
16190 +{
16191 +#endif
16192 + unsigned long flags;
16193 +
16194 + down(&ieee->wx_sem);
16195 + if(!ieee->proto_started)
16196 + goto exit;
16197 +
16198 + if(ieee->state != IEEE80211_ASSOCIATING_RETRY)
16199 + goto exit;
16200 +
16201 + /* until we do not set the state to IEEE80211_NOLINK
16202 + * there are no possibility to have someone else trying
16203 + * to start an association procdure (we get here with
16204 + * ieee->state = IEEE80211_ASSOCIATING).
16205 + * When we set the state to IEEE80211_NOLINK it is possible
16206 + * that the RX path run an attempt to associate, but
16207 + * both ieee80211_softmac_check_all_nets and the
16208 + * RX path works with ieee->lock held so there are no
16209 + * problems. If we are still disassociated then start a scan.
16210 + * the lock here is necessary to ensure no one try to start
16211 + * an association procedure when we have just checked the
16212 + * state and we are going to start the scan.
16213 + */
16214 + ieee->beinretry = true;
16215 + ieee->state = IEEE80211_NOLINK;
16216 +
16217 + ieee80211_softmac_check_all_nets(ieee);
16218 +
16219 + spin_lock_irqsave(&ieee->lock, flags);
16220 +
16221 + if(ieee->state == IEEE80211_NOLINK)
16222 + {
16223 + ieee->is_roaming= false;
16224 + ieee->actscanning = true;
16225 + ieee80211_start_scan(ieee);
16226 + }
16227 + spin_unlock_irqrestore(&ieee->lock, flags);
16228 +
16229 + ieee->beinretry = false;
16230 +exit:
16231 + up(&ieee->wx_sem);
16232 +}
16233 +
16234 +struct sk_buff *ieee80211_get_beacon_(struct ieee80211_device *ieee)
16235 +{
16236 + u8 broadcast_addr[] = {0xff,0xff,0xff,0xff,0xff,0xff};
16237 +
16238 + struct sk_buff *skb;
16239 + struct ieee80211_probe_response *b;
16240 +
16241 + skb = ieee80211_probe_resp(ieee, broadcast_addr);
16242 +
16243 + if (!skb)
16244 + return NULL;
16245 +
16246 + b = (struct ieee80211_probe_response *) skb->data;
16247 + b->header.frame_ctl = cpu_to_le16(IEEE80211_STYPE_BEACON);
16248 +
16249 + return skb;
16250 +
16251 +}
16252 +
16253 +struct sk_buff *ieee80211_get_beacon(struct ieee80211_device *ieee)
16254 +{
16255 + struct sk_buff *skb;
16256 + struct ieee80211_probe_response *b;
16257 +
16258 + skb = ieee80211_get_beacon_(ieee);
16259 + if(!skb)
16260 + return NULL;
16261 +
16262 + b = (struct ieee80211_probe_response *) skb->data;
16263 + b->header.seq_ctl = cpu_to_le16(ieee->seq_ctrl[0] << 4);
16264 +
16265 + if (ieee->seq_ctrl[0] == 0xFFF)
16266 + ieee->seq_ctrl[0] = 0;
16267 + else
16268 + ieee->seq_ctrl[0]++;
16269 +
16270 + return skb;
16271 +}
16272 +
16273 +void ieee80211_softmac_stop_protocol(struct ieee80211_device *ieee)
16274 +{
16275 + ieee->sync_scan_hurryup = 1;
16276 + down(&ieee->wx_sem);
16277 + ieee80211_stop_protocol(ieee);
16278 + up(&ieee->wx_sem);
16279 +}
16280 +
16281 +
16282 +void ieee80211_stop_protocol(struct ieee80211_device *ieee)
16283 +{
16284 + if (!ieee->proto_started)
16285 + return;
16286 +
16287 + ieee->proto_started = 0;
16288 +
16289 + ieee80211_stop_send_beacons(ieee);
16290 + del_timer_sync(&ieee->associate_timer);
16291 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
16292 + cancel_delayed_work(&ieee->associate_retry_wq);
16293 + cancel_delayed_work(&ieee->start_ibss_wq);
16294 +#endif
16295 + ieee80211_stop_scan(ieee);
16296 +
16297 + ieee80211_disassociate(ieee);
16298 + RemoveAllTS(ieee); //added as we disconnect from the previous BSS, Remove all TS
16299 +}
16300 +
16301 +void ieee80211_softmac_start_protocol(struct ieee80211_device *ieee)
16302 +{
16303 + ieee->sync_scan_hurryup = 0;
16304 + down(&ieee->wx_sem);
16305 + ieee80211_start_protocol(ieee);
16306 + up(&ieee->wx_sem);
16307 +}
16308 +
16309 +void ieee80211_start_protocol(struct ieee80211_device *ieee)
16310 +{
16311 + short ch = 0;
16312 + int i = 0;
16313 + if (ieee->proto_started)
16314 + return;
16315 +
16316 + ieee->proto_started = 1;
16317 +
16318 + if (ieee->current_network.channel == 0){
16319 + do{
16320 + ch++;
16321 + if (ch > MAX_CHANNEL_NUMBER)
16322 + return; /* no channel found */
16323 +#ifdef ENABLE_DOT11D
16324 + }while(!GET_DOT11D_INFO(ieee)->channel_map[ch]);
16325 +#else
16326 + }while(!ieee->channel_map[ch]);
16327 +#endif
16328 + ieee->current_network.channel = ch;
16329 + }
16330 +
16331 + if (ieee->current_network.beacon_interval == 0)
16332 + ieee->current_network.beacon_interval = 100;
16333 +// printk("===>%s(), chan:%d\n", __FUNCTION__, ieee->current_network.channel);
16334 +// ieee->set_chan(ieee->dev,ieee->current_network.channel);
16335 +
16336 + for(i = 0; i < 17; i++) {
16337 + ieee->last_rxseq_num[i] = -1;
16338 + ieee->last_rxfrag_num[i] = -1;
16339 + ieee->last_packet_time[i] = 0;
16340 + }
16341 +
16342 + ieee->init_wmmparam_flag = 0;//reinitialize AC_xx_PARAM registers.
16343 +
16344 +
16345 + /* if the user set the MAC of the ad-hoc cell and then
16346 + * switch to managed mode, shall we make sure that association
16347 + * attempts does not fail just because the user provide the essid
16348 + * and the nic is still checking for the AP MAC ??
16349 + */
16350 + if (ieee->iw_mode == IW_MODE_INFRA)
16351 + ieee80211_start_bss(ieee);
16352 +
16353 + else if (ieee->iw_mode == IW_MODE_ADHOC)
16354 + ieee80211_start_ibss(ieee);
16355 +
16356 + else if (ieee->iw_mode == IW_MODE_MASTER)
16357 + ieee80211_start_master_bss(ieee);
16358 +
16359 + else if(ieee->iw_mode == IW_MODE_MONITOR)
16360 + ieee80211_start_monitor_mode(ieee);
16361 +}
16362 +
16363 +
16364 +#define DRV_NAME "Ieee80211"
16365 +void ieee80211_softmac_init(struct ieee80211_device *ieee)
16366 +{
16367 + int i;
16368 + memset(&ieee->current_network, 0, sizeof(struct ieee80211_network));
16369 +
16370 + ieee->state = IEEE80211_NOLINK;
16371 + ieee->sync_scan_hurryup = 0;
16372 + for(i = 0; i < 5; i++) {
16373 + ieee->seq_ctrl[i] = 0;
16374 + }
16375 +#ifdef ENABLE_DOT11D
16376 + ieee->pDot11dInfo = kmalloc(sizeof(RT_DOT11D_INFO), GFP_ATOMIC);
16377 + if (!ieee->pDot11dInfo)
16378 + IEEE80211_DEBUG(IEEE80211_DL_ERR, "can't alloc memory for DOT11D\n");
16379 + memset(ieee->pDot11dInfo, 0, sizeof(RT_DOT11D_INFO));
16380 +#endif
16381 + //added for AP roaming
16382 + ieee->LinkDetectInfo.SlotNum = 2;
16383 + ieee->LinkDetectInfo.NumRecvBcnInPeriod=0;
16384 + ieee->LinkDetectInfo.NumRecvDataInPeriod=0;
16385 +
16386 + ieee->assoc_id = 0;
16387 + ieee->queue_stop = 0;
16388 + ieee->scanning = 0;
16389 + ieee->softmac_features = 0; //so IEEE2100-like driver are happy
16390 + ieee->wap_set = 0;
16391 + ieee->ssid_set = 0;
16392 + ieee->proto_started = 0;
16393 + ieee->basic_rate = IEEE80211_DEFAULT_BASIC_RATE;
16394 + ieee->rate = 22;
16395 + ieee->ps = IEEE80211_PS_DISABLED;
16396 + ieee->sta_sleep = 0;
16397 + ieee->Regdot11HTOperationalRateSet[0]= 0xff;//support MCS 0~7
16398 + ieee->Regdot11HTOperationalRateSet[1]= 0xff;//support MCS 8~15
16399 + ieee->Regdot11HTOperationalRateSet[4]= 0x01;
16400 + //added by amy
16401 + ieee->actscanning = false;
16402 + ieee->beinretry = false;
16403 + ieee->is_set_key = false;
16404 + init_mgmt_queue(ieee);
16405 +
16406 + ieee->sta_edca_param[0] = 0x0000A403;
16407 + ieee->sta_edca_param[1] = 0x0000A427;
16408 + ieee->sta_edca_param[2] = 0x005E4342;
16409 + ieee->sta_edca_param[3] = 0x002F3262;
16410 + ieee->aggregation = true;
16411 + ieee->enable_rx_imm_BA = 1;
16412 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
16413 + init_timer(&ieee->scan_timer);
16414 + ieee->scan_timer.data = (unsigned long)ieee;
16415 + ieee->scan_timer.function = ieee80211_softmac_scan_cb;
16416 +#endif
16417 + ieee->tx_pending.txb = NULL;
16418 +
16419 + init_timer(&ieee->associate_timer);
16420 + ieee->associate_timer.data = (unsigned long)ieee;
16421 + ieee->associate_timer.function = ieee80211_associate_abort_cb;
16422 +
16423 + init_timer(&ieee->beacon_timer);
16424 + ieee->beacon_timer.data = (unsigned long) ieee;
16425 + ieee->beacon_timer.function = ieee80211_send_beacon_cb;
16426 +
16427 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
16428 +#ifdef PF_SYNCTHREAD
16429 + ieee->wq = create_workqueue(DRV_NAME,0);
16430 +#else
16431 + ieee->wq = create_workqueue(DRV_NAME);
16432 +#endif
16433 +#endif
16434 +
16435 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
16436 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
16437 + INIT_DELAYED_WORK(&ieee->start_ibss_wq,ieee80211_start_ibss_wq);
16438 + INIT_WORK(&ieee->associate_complete_wq, ieee80211_associate_complete_wq);
16439 + INIT_WORK(&ieee->associate_procedure_wq, ieee80211_associate_procedure_wq);
16440 + INIT_DELAYED_WORK(&ieee->softmac_scan_wq,ieee80211_softmac_scan_wq);
16441 + INIT_DELAYED_WORK(&ieee->associate_retry_wq, ieee80211_associate_retry_wq);
16442 + INIT_WORK(&ieee->wx_sync_scan_wq,ieee80211_wx_sync_scan_wq);
16443 +
16444 +#else
16445 + INIT_WORK(&ieee->start_ibss_wq,(void(*)(void*)) ieee80211_start_ibss_wq,ieee);
16446 + INIT_WORK(&ieee->associate_retry_wq,(void(*)(void*)) ieee80211_associate_retry_wq,ieee);
16447 + INIT_WORK(&ieee->associate_complete_wq,(void(*)(void*)) ieee80211_associate_complete_wq,ieee);
16448 + INIT_WORK(&ieee->associate_procedure_wq,(void(*)(void*)) ieee80211_associate_procedure_wq,ieee);
16449 + INIT_WORK(&ieee->softmac_scan_wq,(void(*)(void*)) ieee80211_softmac_scan_wq,ieee);
16450 + INIT_WORK(&ieee->wx_sync_scan_wq,(void(*)(void*)) ieee80211_wx_sync_scan_wq,ieee);
16451 +#endif
16452 +
16453 +#else
16454 + tq_init(&ieee->start_ibss_wq,(void(*)(void*)) ieee80211_start_ibss_wq,ieee);
16455 + tq_init(&ieee->associate_retry_wq,(void(*)(void*)) ieee80211_associate_retry_wq,ieee);
16456 + tq_init(&ieee->associate_complete_wq,(void(*)(void*)) ieee80211_associate_complete_wq,ieee);
16457 + tq_init(&ieee->associate_procedure_wq,(void(*)(void*)) ieee80211_associate_procedure_wq,ieee);
16458 + tq_init(&ieee->softmac_scan_wq,(void(*)(void*)) ieee80211_softmac_scan_wq,ieee);
16459 + tq_init(&ieee->wx_sync_scan_wq,(void(*)(void*)) ieee80211_wx_sync_scan_wq,ieee);
16460 +#endif
16461 + sema_init(&ieee->wx_sem, 1);
16462 + sema_init(&ieee->scan_sem, 1);
16463 +
16464 + spin_lock_init(&ieee->mgmt_tx_lock);
16465 + spin_lock_init(&ieee->beacon_lock);
16466 +
16467 + tasklet_init(&ieee->ps_task,
16468 + (void(*)(unsigned long)) ieee80211_sta_ps,
16469 + (unsigned long)ieee);
16470 +
16471 +}
16472 +
16473 +void ieee80211_softmac_free(struct ieee80211_device *ieee)
16474 +{
16475 + down(&ieee->wx_sem);
16476 +#ifdef ENABLE_DOT11D
16477 + if(NULL != ieee->pDot11dInfo)
16478 + {
16479 + kfree(ieee->pDot11dInfo);
16480 + ieee->pDot11dInfo = NULL;
16481 + }
16482 +#endif
16483 + del_timer_sync(&ieee->associate_timer);
16484 +
16485 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
16486 + cancel_delayed_work(&ieee->associate_retry_wq);
16487 + destroy_workqueue(ieee->wq);
16488 +#endif
16489 +
16490 + up(&ieee->wx_sem);
16491 +}
16492 +
16493 +/********************************************************
16494 + * Start of WPA code. *
16495 + * this is stolen from the ipw2200 driver *
16496 + ********************************************************/
16497 +
16498 +
16499 +static int ieee80211_wpa_enable(struct ieee80211_device *ieee, int value)
16500 +{
16501 + /* This is called when wpa_supplicant loads and closes the driver
16502 + * interface. */
16503 + printk("%s WPA\n",value ? "enabling" : "disabling");
16504 + ieee->wpa_enabled = value;
16505 + return 0;
16506 +}
16507 +
16508 +
16509 +void ieee80211_wpa_assoc_frame(struct ieee80211_device *ieee, char *wpa_ie, int wpa_ie_len)
16510 +{
16511 + /* make sure WPA is enabled */
16512 + ieee80211_wpa_enable(ieee, 1);
16513 +
16514 + ieee80211_disassociate(ieee);
16515 +}
16516 +
16517 +
16518 +static int ieee80211_wpa_mlme(struct ieee80211_device *ieee, int command, int reason)
16519 +{
16520 +
16521 + int ret = 0;
16522 +
16523 + switch (command) {
16524 + case IEEE_MLME_STA_DEAUTH:
16525 + // silently ignore
16526 + break;
16527 +
16528 + case IEEE_MLME_STA_DISASSOC:
16529 + ieee80211_disassociate(ieee);
16530 + break;
16531 +
16532 + default:
16533 + printk("Unknown MLME request: %d\n", command);
16534 + ret = -EOPNOTSUPP;
16535 + }
16536 +
16537 + return ret;
16538 +}
16539 +
16540 +
16541 +static int ieee80211_wpa_set_wpa_ie(struct ieee80211_device *ieee,
16542 + struct ieee_param *param, int plen)
16543 +{
16544 + u8 *buf;
16545 +
16546 + if (param->u.wpa_ie.len > MAX_WPA_IE_LEN ||
16547 + (param->u.wpa_ie.len && param->u.wpa_ie.data == NULL))
16548 + return -EINVAL;
16549 +
16550 + if (param->u.wpa_ie.len) {
16551 + buf = kmalloc(param->u.wpa_ie.len, GFP_KERNEL);
16552 + if (buf == NULL)
16553 + return -ENOMEM;
16554 +
16555 + memcpy(buf, param->u.wpa_ie.data, param->u.wpa_ie.len);
16556 + kfree(ieee->wpa_ie);
16557 + ieee->wpa_ie = buf;
16558 + ieee->wpa_ie_len = param->u.wpa_ie.len;
16559 + } else {
16560 + kfree(ieee->wpa_ie);
16561 + ieee->wpa_ie = NULL;
16562 + ieee->wpa_ie_len = 0;
16563 + }
16564 +
16565 + ieee80211_wpa_assoc_frame(ieee, ieee->wpa_ie, ieee->wpa_ie_len);
16566 + return 0;
16567 +}
16568 +
16569 +#define AUTH_ALG_OPEN_SYSTEM 0x1
16570 +#define AUTH_ALG_SHARED_KEY 0x2
16571 +
16572 +static int ieee80211_wpa_set_auth_algs(struct ieee80211_device *ieee, int value)
16573 +{
16574 +
16575 + struct ieee80211_security sec = {
16576 + .flags = SEC_AUTH_MODE,
16577 + };
16578 + int ret = 0;
16579 +
16580 + if (value & AUTH_ALG_SHARED_KEY) {
16581 + sec.auth_mode = WLAN_AUTH_SHARED_KEY;
16582 + ieee->open_wep = 0;
16583 + ieee->auth_mode = 1;
16584 + } else if (value & AUTH_ALG_OPEN_SYSTEM){
16585 + sec.auth_mode = WLAN_AUTH_OPEN;
16586 + ieee->open_wep = 1;
16587 + ieee->auth_mode = 0;
16588 + }
16589 + else if (value & IW_AUTH_ALG_LEAP){
16590 + sec.auth_mode = WLAN_AUTH_LEAP;
16591 + ieee->open_wep = 1;
16592 + ieee->auth_mode = 2;
16593 + }
16594 +
16595 +
16596 + if (ieee->set_security)
16597 + ieee->set_security(ieee->dev, &sec);
16598 + //else
16599 + // ret = -EOPNOTSUPP;
16600 +
16601 + return ret;
16602 +}
16603 +
16604 +static int ieee80211_wpa_set_param(struct ieee80211_device *ieee, u8 name, u32 value)
16605 +{
16606 + int ret=0;
16607 + unsigned long flags;
16608 +
16609 + switch (name) {
16610 + case IEEE_PARAM_WPA_ENABLED:
16611 + ret = ieee80211_wpa_enable(ieee, value);
16612 + break;
16613 +
16614 + case IEEE_PARAM_TKIP_COUNTERMEASURES:
16615 + ieee->tkip_countermeasures=value;
16616 + break;
16617 +
16618 + case IEEE_PARAM_DROP_UNENCRYPTED: {
16619 + /* HACK:
16620 + *
16621 + * wpa_supplicant calls set_wpa_enabled when the driver
16622 + * is loaded and unloaded, regardless of if WPA is being
16623 + * used. No other calls are made which can be used to
16624 + * determine if encryption will be used or not prior to
16625 + * association being expected. If encryption is not being
16626 + * used, drop_unencrypted is set to false, else true -- we
16627 + * can use this to determine if the CAP_PRIVACY_ON bit should
16628 + * be set.
16629 + */
16630 + struct ieee80211_security sec = {
16631 + .flags = SEC_ENABLED,
16632 + .enabled = value,
16633 + };
16634 + ieee->drop_unencrypted = value;
16635 + /* We only change SEC_LEVEL for open mode. Others
16636 + * are set by ipw_wpa_set_encryption.
16637 + */
16638 + if (!value) {
16639 + sec.flags |= SEC_LEVEL;
16640 + sec.level = SEC_LEVEL_0;
16641 + }
16642 + else {
16643 + sec.flags |= SEC_LEVEL;
16644 + sec.level = SEC_LEVEL_1;
16645 + }
16646 + if (ieee->set_security)
16647 + ieee->set_security(ieee->dev, &sec);
16648 + break;
16649 + }
16650 +
16651 + case IEEE_PARAM_PRIVACY_INVOKED:
16652 + ieee->privacy_invoked=value;
16653 + break;
16654 +
16655 + case IEEE_PARAM_AUTH_ALGS:
16656 + ret = ieee80211_wpa_set_auth_algs(ieee, value);
16657 + break;
16658 +
16659 + case IEEE_PARAM_IEEE_802_1X:
16660 + ieee->ieee802_1x=value;
16661 + break;
16662 + case IEEE_PARAM_WPAX_SELECT:
16663 + // added for WPA2 mixed mode
16664 + spin_lock_irqsave(&ieee->wpax_suitlist_lock,flags);
16665 + ieee->wpax_type_set = 1;
16666 + ieee->wpax_type_notify = value;
16667 + spin_unlock_irqrestore(&ieee->wpax_suitlist_lock,flags);
16668 + break;
16669 +
16670 + default:
16671 + printk("Unknown WPA param: %d\n",name);
16672 + ret = -EOPNOTSUPP;
16673 + }
16674 +
16675 + return ret;
16676 +}
16677 +
16678 +/* implementation borrowed from hostap driver */
16679 +
16680 +static int ieee80211_wpa_set_encryption(struct ieee80211_device *ieee,
16681 + struct ieee_param *param, int param_len)
16682 +{
16683 + int ret = 0;
16684 +
16685 + struct ieee80211_crypto_ops *ops;
16686 + struct ieee80211_crypt_data **crypt;
16687 +
16688 + struct ieee80211_security sec = {
16689 + .flags = 0,
16690 + };
16691 +
16692 + param->u.crypt.err = 0;
16693 + param->u.crypt.alg[IEEE_CRYPT_ALG_NAME_LEN - 1] = '\0';
16694 +
16695 + if (param_len !=
16696 + (int) ((char *) param->u.crypt.key - (char *) param) +
16697 + param->u.crypt.key_len) {
16698 + printk("Len mismatch %d, %d\n", param_len,
16699 + param->u.crypt.key_len);
16700 + return -EINVAL;
16701 + }
16702 + if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff &&
16703 + param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff &&
16704 + param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) {
16705 + if (param->u.crypt.idx >= WEP_KEYS)
16706 + return -EINVAL;
16707 + crypt = &ieee->crypt[param->u.crypt.idx];
16708 + } else {
16709 + return -EINVAL;
16710 + }
16711 +
16712 + if (strcmp(param->u.crypt.alg, "none") == 0) {
16713 + if (crypt) {
16714 + sec.enabled = 0;
16715 + // FIXME FIXME
16716 + //sec.encrypt = 0;
16717 + sec.level = SEC_LEVEL_0;
16718 + sec.flags |= SEC_ENABLED | SEC_LEVEL;
16719 + ieee80211_crypt_delayed_deinit(ieee, crypt);
16720 + }
16721 + goto done;
16722 + }
16723 + sec.enabled = 1;
16724 +// FIXME FIXME
16725 +// sec.encrypt = 1;
16726 + sec.flags |= SEC_ENABLED;
16727 +
16728 + /* IPW HW cannot build TKIP MIC, host decryption still needed. */
16729 + if (!(ieee->host_encrypt || ieee->host_decrypt) &&
16730 + strcmp(param->u.crypt.alg, "TKIP"))
16731 + goto skip_host_crypt;
16732 +
16733 + ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
16734 + if (ops == NULL && strcmp(param->u.crypt.alg, "WEP") == 0) {
16735 + request_module("ieee80211_crypt_wep");
16736 + ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
16737 + //set WEP40 first, it will be modified according to WEP104 or WEP40 at other place
16738 + } else if (ops == NULL && strcmp(param->u.crypt.alg, "TKIP") == 0) {
16739 + request_module("ieee80211_crypt_tkip");
16740 + ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
16741 + } else if (ops == NULL && strcmp(param->u.crypt.alg, "CCMP") == 0) {
16742 + request_module("ieee80211_crypt_ccmp");
16743 + ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
16744 + }
16745 + if (ops == NULL) {
16746 + printk("unknown crypto alg '%s'\n", param->u.crypt.alg);
16747 + param->u.crypt.err = IEEE_CRYPT_ERR_UNKNOWN_ALG;
16748 + ret = -EINVAL;
16749 + goto done;
16750 + }
16751 +
16752 + if (*crypt == NULL || (*crypt)->ops != ops) {
16753 + struct ieee80211_crypt_data *new_crypt;
16754 +
16755 + ieee80211_crypt_delayed_deinit(ieee, crypt);
16756 +
16757 + new_crypt = (struct ieee80211_crypt_data *)
16758 + kmalloc(sizeof(*new_crypt), GFP_KERNEL);
16759 + if (new_crypt == NULL) {
16760 + ret = -ENOMEM;
16761 + goto done;
16762 + }
16763 + memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data));
16764 + new_crypt->ops = ops;
16765 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
16766 + if (new_crypt->ops && try_module_get(new_crypt->ops->owner))
16767 +#else
16768 + if (new_crypt->ops && try_inc_mod_count(new_crypt->ops->owner))
16769 +#endif
16770 + new_crypt->priv =
16771 + new_crypt->ops->init(param->u.crypt.idx);
16772 +
16773 + if (new_crypt->priv == NULL) {
16774 + kfree(new_crypt);
16775 + param->u.crypt.err = IEEE_CRYPT_ERR_CRYPT_INIT_FAILED;
16776 + ret = -EINVAL;
16777 + goto done;
16778 + }
16779 +
16780 + *crypt = new_crypt;
16781 + }
16782 +
16783 + if (param->u.crypt.key_len > 0 && (*crypt)->ops->set_key &&
16784 + (*crypt)->ops->set_key(param->u.crypt.key,
16785 + param->u.crypt.key_len, param->u.crypt.seq,
16786 + (*crypt)->priv) < 0) {
16787 + printk("key setting failed\n");
16788 + param->u.crypt.err = IEEE_CRYPT_ERR_KEY_SET_FAILED;
16789 + ret = -EINVAL;
16790 + goto done;
16791 + }
16792 +
16793 + skip_host_crypt:
16794 + if (param->u.crypt.set_tx) {
16795 + ieee->tx_keyidx = param->u.crypt.idx;
16796 + sec.active_key = param->u.crypt.idx;
16797 + sec.flags |= SEC_ACTIVE_KEY;
16798 + } else
16799 + sec.flags &= ~SEC_ACTIVE_KEY;
16800 +
16801 + if (param->u.crypt.alg != NULL) {
16802 + memcpy(sec.keys[param->u.crypt.idx],
16803 + param->u.crypt.key,
16804 + param->u.crypt.key_len);
16805 + sec.key_sizes[param->u.crypt.idx] = param->u.crypt.key_len;
16806 + sec.flags |= (1 << param->u.crypt.idx);
16807 +
16808 + if (strcmp(param->u.crypt.alg, "WEP") == 0) {
16809 + sec.flags |= SEC_LEVEL;
16810 + sec.level = SEC_LEVEL_1;
16811 + } else if (strcmp(param->u.crypt.alg, "TKIP") == 0) {
16812 + sec.flags |= SEC_LEVEL;
16813 + sec.level = SEC_LEVEL_2;
16814 + } else if (strcmp(param->u.crypt.alg, "CCMP") == 0) {
16815 + sec.flags |= SEC_LEVEL;
16816 + sec.level = SEC_LEVEL_3;
16817 + }
16818 + }
16819 + done:
16820 + if (ieee->set_security)
16821 + ieee->set_security(ieee->dev, &sec);
16822 +
16823 + /* Do not reset port if card is in Managed mode since resetting will
16824 + * generate new IEEE 802.11 authentication which may end up in looping
16825 + * with IEEE 802.1X. If your hardware requires a reset after WEP
16826 + * configuration (for example... Prism2), implement the reset_port in
16827 + * the callbacks structures used to initialize the 802.11 stack. */
16828 + if (ieee->reset_on_keychange &&
16829 + ieee->iw_mode != IW_MODE_INFRA &&
16830 + ieee->reset_port &&
16831 + ieee->reset_port(ieee->dev)) {
16832 + printk("reset_port failed\n");
16833 + param->u.crypt.err = IEEE_CRYPT_ERR_CARD_CONF_FAILED;
16834 + return -EINVAL;
16835 + }
16836 +
16837 + return ret;
16838 +}
16839 +
16840 +inline struct sk_buff *ieee80211_disassociate_skb(
16841 + struct ieee80211_network *beacon,
16842 + struct ieee80211_device *ieee,
16843 + u8 asRsn)
16844 +{
16845 + struct sk_buff *skb;
16846 + struct ieee80211_disassoc *disass;
16847 +
16848 + skb = dev_alloc_skb(sizeof(struct ieee80211_disassoc));
16849 + if (!skb)
16850 + return NULL;
16851 +
16852 + disass = (struct ieee80211_disassoc *) skb_put(skb,sizeof(struct ieee80211_disassoc));
16853 + disass->header.frame_ctl = cpu_to_le16(IEEE80211_STYPE_DISASSOC);
16854 + disass->header.duration_id = 0;
16855 +
16856 + memcpy(disass->header.addr1, beacon->bssid, ETH_ALEN);
16857 + memcpy(disass->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
16858 + memcpy(disass->header.addr3, beacon->bssid, ETH_ALEN);
16859 +
16860 + disass->reason = asRsn;
16861 + return skb;
16862 +}
16863 +
16864 +
16865 +void
16866 +SendDisassociation(
16867 + struct ieee80211_device *ieee,
16868 + u8* asSta,
16869 + u8 asRsn
16870 +)
16871 +{
16872 + struct ieee80211_network *beacon = &ieee->current_network;
16873 + struct sk_buff *skb;
16874 + skb = ieee80211_disassociate_skb(beacon,ieee,asRsn);
16875 + if (skb){
16876 + softmac_mgmt_xmit(skb, ieee);
16877 + //dev_kfree_skb_any(skb);//edit by thomas
16878 + }
16879 +}
16880 +
16881 +int ieee80211_wpa_supplicant_ioctl(struct ieee80211_device *ieee, struct iw_point *p)
16882 +{
16883 + struct ieee_param *param;
16884 + int ret=0;
16885 +
16886 + down(&ieee->wx_sem);
16887 + //IEEE_DEBUG_INFO("wpa_supplicant: len=%d\n", p->length);
16888 +
16889 + if (p->length < sizeof(struct ieee_param) || !p->pointer){
16890 + ret = -EINVAL;
16891 + goto out;
16892 + }
16893 +
16894 + param = (struct ieee_param *)kmalloc(p->length, GFP_KERNEL);
16895 + if (param == NULL){
16896 + ret = -ENOMEM;
16897 + goto out;
16898 + }
16899 + if (copy_from_user(param, p->pointer, p->length)) {
16900 + kfree(param);
16901 + ret = -EFAULT;
16902 + goto out;
16903 + }
16904 +
16905 + switch (param->cmd) {
16906 +
16907 + case IEEE_CMD_SET_WPA_PARAM:
16908 + ret = ieee80211_wpa_set_param(ieee, param->u.wpa_param.name,
16909 + param->u.wpa_param.value);
16910 + break;
16911 +
16912 + case IEEE_CMD_SET_WPA_IE:
16913 + ret = ieee80211_wpa_set_wpa_ie(ieee, param, p->length);
16914 + break;
16915 +
16916 + case IEEE_CMD_SET_ENCRYPTION:
16917 + ret = ieee80211_wpa_set_encryption(ieee, param, p->length);
16918 + break;
16919 +
16920 + case IEEE_CMD_MLME:
16921 + ret = ieee80211_wpa_mlme(ieee, param->u.mlme.command,
16922 + param->u.mlme.reason_code);
16923 + break;
16924 +
16925 + default:
16926 + printk("Unknown WPA supplicant request: %d\n",param->cmd);
16927 + ret = -EOPNOTSUPP;
16928 + break;
16929 + }
16930 +
16931 + if (ret == 0 && copy_to_user(p->pointer, param, p->length))
16932 + ret = -EFAULT;
16933 +
16934 + kfree(param);
16935 +out:
16936 + up(&ieee->wx_sem);
16937 +
16938 + return ret;
16939 +}
16940 +
16941 +void notify_wx_assoc_event(struct ieee80211_device *ieee)
16942 +{
16943 + union iwreq_data wrqu;
16944 + wrqu.ap_addr.sa_family = ARPHRD_ETHER;
16945 + if (ieee->state == IEEE80211_LINKED)
16946 + memcpy(wrqu.ap_addr.sa_data, ieee->current_network.bssid, ETH_ALEN);
16947 + else
16948 + memset(wrqu.ap_addr.sa_data, 0, ETH_ALEN);
16949 + wireless_send_event(ieee->dev, SIOCGIWAP, &wrqu, NULL);
16950 +}
16951 +
16952 +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
16953 +//EXPORT_SYMBOL(ieee80211_get_beacon);
16954 +//EXPORT_SYMBOL(ieee80211_wake_queue);
16955 +//EXPORT_SYMBOL(ieee80211_stop_queue);
16956 +//EXPORT_SYMBOL(ieee80211_reset_queue);
16957 +//EXPORT_SYMBOL(ieee80211_softmac_stop_protocol);
16958 +//EXPORT_SYMBOL(ieee80211_softmac_start_protocol);
16959 +//EXPORT_SYMBOL(ieee80211_is_shortslot);
16960 +//EXPORT_SYMBOL(ieee80211_is_54g);
16961 +//EXPORT_SYMBOL(ieee80211_wpa_supplicant_ioctl);
16962 +//EXPORT_SYMBOL(ieee80211_ps_tx_ack);
16963 +//EXPORT_SYMBOL(ieee80211_softmac_xmit);
16964 +//EXPORT_SYMBOL(ieee80211_stop_send_beacons);
16965 +//EXPORT_SYMBOL(notify_wx_assoc_event);
16966 +//EXPORT_SYMBOL(SendDisassociation);
16967 +//EXPORT_SYMBOL(ieee80211_disassociate);
16968 +//EXPORT_SYMBOL(ieee80211_start_send_beacons);
16969 +//EXPORT_SYMBOL(ieee80211_stop_scan);
16970 +//EXPORT_SYMBOL(ieee80211_send_probe_requests);
16971 +//EXPORT_SYMBOL(ieee80211_softmac_scan_syncro);
16972 +//EXPORT_SYMBOL(ieee80211_start_scan_syncro);
16973 +#else
16974 +EXPORT_SYMBOL_NOVERS(ieee80211_get_beacon);
16975 +EXPORT_SYMBOL_NOVERS(ieee80211_wake_queue);
16976 +EXPORT_SYMBOL_NOVERS(ieee80211_stop_queue);
16977 +EXPORT_SYMBOL_NOVERS(ieee80211_reset_queue);
16978 +EXPORT_SYMBOL_NOVERS(ieee80211_softmac_stop_protocol);
16979 +EXPORT_SYMBOL_NOVERS(ieee80211_softmac_start_protocol);
16980 +EXPORT_SYMBOL_NOVERS(ieee80211_is_shortslot);
16981 +EXPORT_SYMBOL_NOVERS(ieee80211_is_54g);
16982 +EXPORT_SYMBOL_NOVERS(ieee80211_wpa_supplicant_ioctl);
16983 +EXPORT_SYMBOL_NOVERS(ieee80211_ps_tx_ack);
16984 +EXPORT_SYMBOL_NOVERS(ieee80211_softmac_xmit);
16985 +EXPORT_SYMBOL_NOVERS(ieee80211_stop_send_beacons);
16986 +EXPORT_SYMBOL_NOVERS(notify_wx_assoc_event);
16987 +EXPORT_SYMBOL_NOVERS(SendDisassociation);
16988 +EXPORT_SYMBOL_NOVERS(ieee80211_disassociate);
16989 +EXPORT_SYMBOL_NOVERS(ieee80211_start_send_beacons);
16990 +EXPORT_SYMBOL_NOVERS(ieee80211_stop_scan);
16991 +EXPORT_SYMBOL_NOVERS(ieee80211_send_probe_requests);
16992 +EXPORT_SYMBOL_NOVERS(ieee80211_softmac_scan_syncro);
16993 +EXPORT_SYMBOL_NOVERS(ieee80211_start_scan_syncro);
16994 +#endif
16995 +//EXPORT_SYMBOL(ieee80211_sta_ps_send_null_frame);
16996 --- /dev/null
16997 +++ b/drivers/staging/rtl8192e/ieee80211/ieee80211_softmac_wx.c
16998 @@ -0,0 +1,692 @@
16999 +/* IEEE 802.11 SoftMAC layer
17000 + * Copyright (c) 2005 Andrea Merello <andreamrl@tiscali.it>
17001 + *
17002 + * Mostly extracted from the rtl8180-sa2400 driver for the
17003 + * in-kernel generic ieee802.11 stack.
17004 + *
17005 + * Some pieces of code might be stolen from ipw2100 driver
17006 + * copyright of who own it's copyright ;-)
17007 + *
17008 + * PS wx handler mostly stolen from hostap, copyright who
17009 + * own it's copyright ;-)
17010 + *
17011 + * released under the GPL
17012 + */
17013 +
17014 +
17015 +#include "ieee80211.h"
17016 +#ifdef ENABLE_DOT11D
17017 +#include "dot11d.h"
17018 +#endif
17019 +/* FIXME: add A freqs */
17020 +
17021 +const long ieee80211_wlan_frequencies[] = {
17022 + 2412, 2417, 2422, 2427,
17023 + 2432, 2437, 2442, 2447,
17024 + 2452, 2457, 2462, 2467,
17025 + 2472, 2484
17026 +};
17027 +
17028 +
17029 +int ieee80211_wx_set_freq(struct ieee80211_device *ieee, struct iw_request_info *a,
17030 + union iwreq_data *wrqu, char *b)
17031 +{
17032 + int ret;
17033 + struct iw_freq *fwrq = & wrqu->freq;
17034 +
17035 + down(&ieee->wx_sem);
17036 +
17037 + if(ieee->iw_mode == IW_MODE_INFRA){
17038 + ret = -EOPNOTSUPP;
17039 + goto out;
17040 + }
17041 +
17042 + /* if setting by freq convert to channel */
17043 + if (fwrq->e == 1) {
17044 + if ((fwrq->m >= (int) 2.412e8 &&
17045 + fwrq->m <= (int) 2.487e8)) {
17046 + int f = fwrq->m / 100000;
17047 + int c = 0;
17048 +
17049 + while ((c < 14) && (f != ieee80211_wlan_frequencies[c]))
17050 + c++;
17051 +
17052 + /* hack to fall through */
17053 + fwrq->e = 0;
17054 + fwrq->m = c + 1;
17055 + }
17056 + }
17057 +
17058 + if (fwrq->e > 0 || fwrq->m > 14 || fwrq->m < 1 ){
17059 + ret = -EOPNOTSUPP;
17060 + goto out;
17061 +
17062 + }else { /* Set the channel */
17063 +
17064 +#ifdef ENABLE_DOT11D
17065 + if (!(GET_DOT11D_INFO(ieee)->channel_map)[fwrq->m]) {
17066 + ret = -EINVAL;
17067 + goto out;
17068 + }
17069 +#endif
17070 + ieee->current_network.channel = fwrq->m;
17071 + ieee->set_chan(ieee->dev, ieee->current_network.channel);
17072 +
17073 + if(ieee->iw_mode == IW_MODE_ADHOC || ieee->iw_mode == IW_MODE_MASTER)
17074 + if(ieee->state == IEEE80211_LINKED){
17075 +
17076 + ieee80211_stop_send_beacons(ieee);
17077 + ieee80211_start_send_beacons(ieee);
17078 + }
17079 + }
17080 +
17081 + ret = 0;
17082 +out:
17083 + up(&ieee->wx_sem);
17084 + return ret;
17085 +}
17086 +
17087 +
17088 +int ieee80211_wx_get_freq(struct ieee80211_device *ieee,
17089 + struct iw_request_info *a,
17090 + union iwreq_data *wrqu, char *b)
17091 +{
17092 + struct iw_freq *fwrq = & wrqu->freq;
17093 +
17094 + if (ieee->current_network.channel == 0)
17095 + return -1;
17096 + //NM 0.7.0 will not accept channel any more.
17097 + fwrq->m = ieee80211_wlan_frequencies[ieee->current_network.channel-1] * 100000;
17098 + fwrq->e = 1;
17099 +// fwrq->m = ieee->current_network.channel;
17100 +// fwrq->e = 0;
17101 +
17102 + return 0;
17103 +}
17104 +
17105 +int ieee80211_wx_get_wap(struct ieee80211_device *ieee,
17106 + struct iw_request_info *info,
17107 + union iwreq_data *wrqu, char *extra)
17108 +{
17109 + unsigned long flags;
17110 + wrqu->ap_addr.sa_family = ARPHRD_ETHER;
17111 +
17112 + if (ieee->iw_mode == IW_MODE_MONITOR)
17113 + return -1;
17114 +
17115 + /* We want avoid to give to the user inconsistent infos*/
17116 + spin_lock_irqsave(&ieee->lock, flags);
17117 +
17118 + if (ieee->state != IEEE80211_LINKED &&
17119 + ieee->state != IEEE80211_LINKED_SCANNING &&
17120 + ieee->wap_set == 0)
17121 +
17122 + memset(wrqu->ap_addr.sa_data, 0, ETH_ALEN);
17123 + else
17124 + memcpy(wrqu->ap_addr.sa_data,
17125 + ieee->current_network.bssid, ETH_ALEN);
17126 +
17127 + spin_unlock_irqrestore(&ieee->lock, flags);
17128 +
17129 + return 0;
17130 +}
17131 +
17132 +
17133 +int ieee80211_wx_set_wap(struct ieee80211_device *ieee,
17134 + struct iw_request_info *info,
17135 + union iwreq_data *awrq,
17136 + char *extra)
17137 +{
17138 +
17139 + int ret = 0;
17140 + u8 zero[] = {0,0,0,0,0,0};
17141 + unsigned long flags;
17142 +
17143 + short ifup = ieee->proto_started;//dev->flags & IFF_UP;
17144 + struct sockaddr *temp = (struct sockaddr *)awrq;
17145 +
17146 + ieee->sync_scan_hurryup = 1;
17147 +
17148 + down(&ieee->wx_sem);
17149 + /* use ifconfig hw ether */
17150 + if (ieee->iw_mode == IW_MODE_MASTER){
17151 + ret = -1;
17152 + goto out;
17153 + }
17154 +
17155 + if (temp->sa_family != ARPHRD_ETHER){
17156 + ret = -EINVAL;
17157 + goto out;
17158 + }
17159 +
17160 + if (ifup)
17161 + ieee80211_stop_protocol(ieee);
17162 +
17163 + /* just to avoid to give inconsistent infos in the
17164 + * get wx method. not really needed otherwise
17165 + */
17166 + spin_lock_irqsave(&ieee->lock, flags);
17167 +
17168 + memcpy(ieee->current_network.bssid, temp->sa_data, ETH_ALEN);
17169 + ieee->wap_set = memcmp(temp->sa_data, zero,ETH_ALEN)!=0;
17170 +
17171 + spin_unlock_irqrestore(&ieee->lock, flags);
17172 +
17173 + if (ifup)
17174 + ieee80211_start_protocol(ieee);
17175 +out:
17176 + up(&ieee->wx_sem);
17177 + return ret;
17178 +}
17179 +
17180 + int ieee80211_wx_get_essid(struct ieee80211_device *ieee, struct iw_request_info *a,union iwreq_data *wrqu,char *b)
17181 +{
17182 + int len,ret = 0;
17183 + unsigned long flags;
17184 +
17185 + if (ieee->iw_mode == IW_MODE_MONITOR)
17186 + return -1;
17187 +
17188 + /* We want avoid to give to the user inconsistent infos*/
17189 + spin_lock_irqsave(&ieee->lock, flags);
17190 +
17191 + if (ieee->current_network.ssid[0] == '\0' ||
17192 + ieee->current_network.ssid_len == 0){
17193 + ret = -1;
17194 + goto out;
17195 + }
17196 +
17197 + if (ieee->state != IEEE80211_LINKED &&
17198 + ieee->state != IEEE80211_LINKED_SCANNING &&
17199 + ieee->ssid_set == 0){
17200 + ret = -1;
17201 + goto out;
17202 + }
17203 + len = ieee->current_network.ssid_len;
17204 + wrqu->essid.length = len;
17205 + strncpy(b,ieee->current_network.ssid,len);
17206 + wrqu->essid.flags = 1;
17207 +
17208 +out:
17209 + spin_unlock_irqrestore(&ieee->lock, flags);
17210 +
17211 + return ret;
17212 +
17213 +}
17214 +
17215 +int ieee80211_wx_set_rate(struct ieee80211_device *ieee,
17216 + struct iw_request_info *info,
17217 + union iwreq_data *wrqu, char *extra)
17218 +{
17219 +
17220 + u32 target_rate = wrqu->bitrate.value;
17221 +
17222 + ieee->rate = target_rate/100000;
17223 + //FIXME: we might want to limit rate also in management protocols.
17224 + return 0;
17225 +}
17226 +
17227 +
17228 +
17229 +int ieee80211_wx_get_rate(struct ieee80211_device *ieee,
17230 + struct iw_request_info *info,
17231 + union iwreq_data *wrqu, char *extra)
17232 +{
17233 + u32 tmp_rate;
17234 +#if 0
17235 + printk("===>mode:%d, halfNmode:%d\n", ieee->mode, ieee->bHalfWirelessN24GMode);
17236 + if (ieee->mode & (IEEE_A | IEEE_B | IEEE_G))
17237 + tmp_rate = ieee->rate;
17238 + else if (ieee->mode & IEEE_N_5G)
17239 + tmp_rate = 580;
17240 + else if (ieee->mode & IEEE_N_24G)
17241 + {
17242 + if (ieee->GetHalfNmodeSupportByAPsHandler(ieee->dev))
17243 + tmp_rate = HTHalfMcsToDataRate(ieee, 15);
17244 + else
17245 + tmp_rate = HTMcsToDataRate(ieee, 15);
17246 + }
17247 +#else
17248 + tmp_rate = TxCountToDataRate(ieee, ieee->softmac_stats.CurrentShowTxate);
17249 +
17250 +#endif
17251 + wrqu->bitrate.value = tmp_rate * 500000;
17252 +
17253 + return 0;
17254 +}
17255 +
17256 +
17257 +int ieee80211_wx_set_rts(struct ieee80211_device *ieee,
17258 + struct iw_request_info *info,
17259 + union iwreq_data *wrqu, char *extra)
17260 +{
17261 + if (wrqu->rts.disabled || !wrqu->rts.fixed)
17262 + ieee->rts = DEFAULT_RTS_THRESHOLD;
17263 + else
17264 + {
17265 + if (wrqu->rts.value < MIN_RTS_THRESHOLD ||
17266 + wrqu->rts.value > MAX_RTS_THRESHOLD)
17267 + return -EINVAL;
17268 + ieee->rts = wrqu->rts.value;
17269 + }
17270 + return 0;
17271 +}
17272 +
17273 +int ieee80211_wx_get_rts(struct ieee80211_device *ieee,
17274 + struct iw_request_info *info,
17275 + union iwreq_data *wrqu, char *extra)
17276 +{
17277 + wrqu->rts.value = ieee->rts;
17278 + wrqu->rts.fixed = 0; /* no auto select */
17279 + wrqu->rts.disabled = (wrqu->rts.value == DEFAULT_RTS_THRESHOLD);
17280 + return 0;
17281 +}
17282 +int ieee80211_wx_set_mode(struct ieee80211_device *ieee, struct iw_request_info *a,
17283 + union iwreq_data *wrqu, char *b)
17284 +{
17285 +
17286 + ieee->sync_scan_hurryup = 1;
17287 +
17288 + down(&ieee->wx_sem);
17289 +
17290 + if (wrqu->mode == ieee->iw_mode)
17291 + goto out;
17292 +
17293 + if (wrqu->mode == IW_MODE_MONITOR){
17294 +
17295 + ieee->dev->type = ARPHRD_IEEE80211;
17296 + }else{
17297 + ieee->dev->type = ARPHRD_ETHER;
17298 + }
17299 +
17300 + if (!ieee->proto_started){
17301 + ieee->iw_mode = wrqu->mode;
17302 + }else{
17303 + ieee80211_stop_protocol(ieee);
17304 + ieee->iw_mode = wrqu->mode;
17305 + ieee80211_start_protocol(ieee);
17306 + }
17307 +
17308 +out:
17309 + up(&ieee->wx_sem);
17310 + return 0;
17311 +}
17312 +
17313 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
17314 +void ieee80211_wx_sync_scan_wq(struct work_struct *work)
17315 +{
17316 + struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, wx_sync_scan_wq);
17317 +#else
17318 +void ieee80211_wx_sync_scan_wq(struct ieee80211_device *ieee)
17319 +{
17320 +#endif
17321 + short chan;
17322 + HT_EXTCHNL_OFFSET chan_offset=0;
17323 + HT_CHANNEL_WIDTH bandwidth=0;
17324 + int b40M = 0;
17325 + static int count = 0;
17326 + chan = ieee->current_network.channel;
17327 + netif_carrier_off(ieee->dev);
17328 +
17329 + if (ieee->data_hard_stop)
17330 + ieee->data_hard_stop(ieee->dev);
17331 +
17332 + ieee80211_stop_send_beacons(ieee);
17333 +
17334 + ieee->state = IEEE80211_LINKED_SCANNING;
17335 + ieee->link_change(ieee->dev);
17336 + ieee->InitialGainHandler(ieee->dev,IG_Backup);
17337 + if (ieee->pHTInfo->bCurrentHTSupport && ieee->pHTInfo->bEnableHT && ieee->pHTInfo->bCurBW40MHz) {
17338 + b40M = 1;
17339 + chan_offset = ieee->pHTInfo->CurSTAExtChnlOffset;
17340 + bandwidth = (HT_CHANNEL_WIDTH)ieee->pHTInfo->bCurBW40MHz;
17341 + printk("Scan in 40M, force to 20M first:%d, %d\n", chan_offset, bandwidth);
17342 + ieee->SetBWModeHandler(ieee->dev, HT_CHANNEL_WIDTH_20, HT_EXTCHNL_OFFSET_NO_EXT);
17343 + }
17344 + ieee80211_start_scan_syncro(ieee);
17345 + if (b40M) {
17346 + printk("Scan in 20M, back to 40M\n");
17347 + if (chan_offset == HT_EXTCHNL_OFFSET_UPPER)
17348 + ieee->set_chan(ieee->dev, chan + 2);
17349 + else if (chan_offset == HT_EXTCHNL_OFFSET_LOWER)
17350 + ieee->set_chan(ieee->dev, chan - 2);
17351 + else
17352 + ieee->set_chan(ieee->dev, chan);
17353 + ieee->SetBWModeHandler(ieee->dev, bandwidth, chan_offset);
17354 + } else {
17355 + ieee->set_chan(ieee->dev, chan);
17356 + }
17357 +
17358 + ieee->InitialGainHandler(ieee->dev,IG_Restore);
17359 + ieee->state = IEEE80211_LINKED;
17360 + ieee->link_change(ieee->dev);
17361 + // To prevent the immediately calling watch_dog after scan.
17362 + if(ieee->LinkDetectInfo.NumRecvBcnInPeriod==0||ieee->LinkDetectInfo.NumRecvDataInPeriod==0 )
17363 + {
17364 + ieee->LinkDetectInfo.NumRecvBcnInPeriod = 1;
17365 + ieee->LinkDetectInfo.NumRecvDataInPeriod= 1;
17366 + }
17367 + if (ieee->data_hard_resume)
17368 + ieee->data_hard_resume(ieee->dev);
17369 +
17370 + if(ieee->iw_mode == IW_MODE_ADHOC || ieee->iw_mode == IW_MODE_MASTER)
17371 + ieee80211_start_send_beacons(ieee);
17372 +
17373 + netif_carrier_on(ieee->dev);
17374 + count = 0;
17375 + up(&ieee->wx_sem);
17376 +
17377 +}
17378 +
17379 +int ieee80211_wx_set_scan(struct ieee80211_device *ieee, struct iw_request_info *a,
17380 + union iwreq_data *wrqu, char *b)
17381 +{
17382 + int ret = 0;
17383 +
17384 + down(&ieee->wx_sem);
17385 +
17386 + if (ieee->iw_mode == IW_MODE_MONITOR || !(ieee->proto_started)){
17387 + ret = -1;
17388 + goto out;
17389 + }
17390 +
17391 + if ( ieee->state == IEEE80211_LINKED){
17392 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
17393 + queue_work(ieee->wq, &ieee->wx_sync_scan_wq);
17394 +#else
17395 + schedule_task(&ieee->wx_sync_scan_wq);
17396 +#endif
17397 + /* intentionally forget to up sem */
17398 + return 0;
17399 + }
17400 +
17401 +out:
17402 + up(&ieee->wx_sem);
17403 + return ret;
17404 +}
17405 +
17406 +int ieee80211_wx_set_essid(struct ieee80211_device *ieee,
17407 + struct iw_request_info *a,
17408 + union iwreq_data *wrqu, char *extra)
17409 +{
17410 +
17411 + int ret=0,len;
17412 + short proto_started;
17413 + unsigned long flags;
17414 +
17415 + ieee->sync_scan_hurryup = 1;
17416 + down(&ieee->wx_sem);
17417 +
17418 + proto_started = ieee->proto_started;
17419 +
17420 + if (wrqu->essid.length > IW_ESSID_MAX_SIZE){
17421 + ret= -E2BIG;
17422 + goto out;
17423 + }
17424 +
17425 + if (ieee->iw_mode == IW_MODE_MONITOR){
17426 + ret= -1;
17427 + goto out;
17428 + }
17429 +
17430 + if(proto_started)
17431 + ieee80211_stop_protocol(ieee);
17432 +
17433 +
17434 + /* this is just to be sure that the GET wx callback
17435 + * has consisten infos. not needed otherwise
17436 + */
17437 + spin_lock_irqsave(&ieee->lock, flags);
17438 +
17439 + if (wrqu->essid.flags && wrqu->essid.length) {
17440 + //first flush current network.ssid
17441 + len = ((wrqu->essid.length-1) < IW_ESSID_MAX_SIZE) ? (wrqu->essid.length-1) : IW_ESSID_MAX_SIZE;
17442 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
17443 + strncpy(ieee->current_network.ssid, extra, len);
17444 + ieee->current_network.ssid_len = len;
17445 +#if 0
17446 + {
17447 + int i;
17448 + for (i=0; i<len; i++)
17449 + printk("%c ", extra[i]);
17450 + printk("\n");
17451 + }
17452 +#endif
17453 +#else
17454 + strncpy(ieee->current_network.ssid, extra, len+1);
17455 + ieee->current_network.ssid_len = len+1;
17456 +#if 0
17457 + {
17458 + int i;
17459 + for (i=0; i<len + 1; i++)
17460 + printk("%c ", extra[i]);
17461 + printk("\n");
17462 + }
17463 +#endif
17464 +#endif
17465 + ieee->ssid_set = 1;
17466 + }
17467 + else{
17468 + ieee->ssid_set = 0;
17469 + ieee->current_network.ssid[0] = '\0';
17470 + ieee->current_network.ssid_len = 0;
17471 + }
17472 + spin_unlock_irqrestore(&ieee->lock, flags);
17473 +
17474 + if (proto_started)
17475 + ieee80211_start_protocol(ieee);
17476 +out:
17477 + up(&ieee->wx_sem);
17478 + return ret;
17479 +}
17480 +
17481 + int ieee80211_wx_get_mode(struct ieee80211_device *ieee, struct iw_request_info *a,
17482 + union iwreq_data *wrqu, char *b)
17483 +{
17484 +
17485 + wrqu->mode = ieee->iw_mode;
17486 + return 0;
17487 +}
17488 +
17489 + int ieee80211_wx_set_rawtx(struct ieee80211_device *ieee,
17490 + struct iw_request_info *info,
17491 + union iwreq_data *wrqu, char *extra)
17492 +{
17493 +
17494 + int *parms = (int *)extra;
17495 + int enable = (parms[0] > 0);
17496 + short prev = ieee->raw_tx;
17497 +
17498 + down(&ieee->wx_sem);
17499 +
17500 + if(enable)
17501 + ieee->raw_tx = 1;
17502 + else
17503 + ieee->raw_tx = 0;
17504 +
17505 + printk(KERN_INFO"raw TX is %s\n",
17506 + ieee->raw_tx ? "enabled" : "disabled");
17507 +
17508 + if(ieee->iw_mode == IW_MODE_MONITOR)
17509 + {
17510 + if(prev == 0 && ieee->raw_tx){
17511 + if (ieee->data_hard_resume)
17512 + ieee->data_hard_resume(ieee->dev);
17513 +
17514 + netif_carrier_on(ieee->dev);
17515 + }
17516 +
17517 + if(prev && ieee->raw_tx == 1)
17518 + netif_carrier_off(ieee->dev);
17519 + }
17520 +
17521 + up(&ieee->wx_sem);
17522 +
17523 + return 0;
17524 +}
17525 +
17526 +int ieee80211_wx_get_name(struct ieee80211_device *ieee,
17527 + struct iw_request_info *info,
17528 + union iwreq_data *wrqu, char *extra)
17529 +{
17530 + strcpy(wrqu->name, "802.11");
17531 + if(ieee->modulation & IEEE80211_CCK_MODULATION){
17532 + strcat(wrqu->name, "b");
17533 + if(ieee->modulation & IEEE80211_OFDM_MODULATION)
17534 + strcat(wrqu->name, "/g");
17535 + }else if(ieee->modulation & IEEE80211_OFDM_MODULATION)
17536 + strcat(wrqu->name, "g");
17537 + if (ieee->mode & (IEEE_N_24G | IEEE_N_5G))
17538 + strcat(wrqu->name, "/n");
17539 +
17540 + if((ieee->state == IEEE80211_LINKED) ||
17541 + (ieee->state == IEEE80211_LINKED_SCANNING))
17542 + strcat(wrqu->name," linked");
17543 + else if(ieee->state != IEEE80211_NOLINK)
17544 + strcat(wrqu->name," link..");
17545 +
17546 +
17547 + return 0;
17548 +}
17549 +
17550 +
17551 +/* this is mostly stolen from hostap */
17552 +int ieee80211_wx_set_power(struct ieee80211_device *ieee,
17553 + struct iw_request_info *info,
17554 + union iwreq_data *wrqu, char *extra)
17555 +{
17556 + int ret = 0;
17557 +#if 1
17558 + if(
17559 + (!ieee->sta_wake_up) ||
17560 + // (!ieee->ps_request_tx_ack) ||
17561 + (!ieee->enter_sleep_state) ||
17562 + (!ieee->ps_is_queue_empty)){
17563 +
17564 + // printk("ERROR. PS mode is tryied to be use but driver missed a callback\n\n");
17565 +
17566 + return -1;
17567 + }
17568 +#endif
17569 + down(&ieee->wx_sem);
17570 +
17571 + if (wrqu->power.disabled){
17572 + ieee->ps = IEEE80211_PS_DISABLED;
17573 + goto exit;
17574 + }
17575 + if (wrqu->power.flags & IW_POWER_TIMEOUT) {
17576 + //ieee->ps_period = wrqu->power.value / 1000;
17577 + ieee->ps_timeout = wrqu->power.value / 1000;
17578 + }
17579 +
17580 + if (wrqu->power.flags & IW_POWER_PERIOD) {
17581 +
17582 + //ieee->ps_timeout = wrqu->power.value / 1000;
17583 + ieee->ps_period = wrqu->power.value / 1000;
17584 + //wrq->value / 1024;
17585 +
17586 + }
17587 + switch (wrqu->power.flags & IW_POWER_MODE) {
17588 + case IW_POWER_UNICAST_R:
17589 + ieee->ps = IEEE80211_PS_UNICAST;
17590 + break;
17591 + case IW_POWER_MULTICAST_R:
17592 + ieee->ps = IEEE80211_PS_MBCAST;
17593 + break;
17594 + case IW_POWER_ALL_R:
17595 + ieee->ps = IEEE80211_PS_UNICAST | IEEE80211_PS_MBCAST;
17596 + break;
17597 +
17598 + case IW_POWER_ON:
17599 + // ieee->ps = IEEE80211_PS_DISABLED;
17600 + break;
17601 +
17602 + default:
17603 + ret = -EINVAL;
17604 + goto exit;
17605 +
17606 + }
17607 +exit:
17608 + up(&ieee->wx_sem);
17609 + return ret;
17610 +
17611 +}
17612 +
17613 +/* this is stolen from hostap */
17614 +int ieee80211_wx_get_power(struct ieee80211_device *ieee,
17615 + struct iw_request_info *info,
17616 + union iwreq_data *wrqu, char *extra)
17617 +{
17618 + int ret =0;
17619 +
17620 + down(&ieee->wx_sem);
17621 +
17622 + if(ieee->ps == IEEE80211_PS_DISABLED){
17623 + wrqu->power.disabled = 1;
17624 + goto exit;
17625 + }
17626 +
17627 + wrqu->power.disabled = 0;
17628 +
17629 + if ((wrqu->power.flags & IW_POWER_TYPE) == IW_POWER_TIMEOUT) {
17630 + wrqu->power.flags = IW_POWER_TIMEOUT;
17631 + wrqu->power.value = ieee->ps_timeout * 1000;
17632 + } else {
17633 +// ret = -EOPNOTSUPP;
17634 +// goto exit;
17635 + wrqu->power.flags = IW_POWER_PERIOD;
17636 + wrqu->power.value = ieee->ps_period * 1000;
17637 +//ieee->current_network.dtim_period * ieee->current_network.beacon_interval * 1024;
17638 + }
17639 +
17640 + if ((ieee->ps & (IEEE80211_PS_MBCAST | IEEE80211_PS_UNICAST)) == (IEEE80211_PS_MBCAST | IEEE80211_PS_UNICAST))
17641 + wrqu->power.flags |= IW_POWER_ALL_R;
17642 + else if (ieee->ps & IEEE80211_PS_MBCAST)
17643 + wrqu->power.flags |= IW_POWER_MULTICAST_R;
17644 + else
17645 + wrqu->power.flags |= IW_POWER_UNICAST_R;
17646 +
17647 +exit:
17648 + up(&ieee->wx_sem);
17649 + return ret;
17650 +
17651 +}
17652 +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
17653 +//EXPORT_SYMBOL(ieee80211_wx_get_essid);
17654 +//EXPORT_SYMBOL(ieee80211_wx_set_essid);
17655 +//EXPORT_SYMBOL(ieee80211_wx_set_rate);
17656 +//EXPORT_SYMBOL(ieee80211_wx_get_rate);
17657 +//EXPORT_SYMBOL(ieee80211_wx_set_wap);
17658 +//EXPORT_SYMBOL(ieee80211_wx_get_wap);
17659 +//EXPORT_SYMBOL(ieee80211_wx_set_mode);
17660 +//EXPORT_SYMBOL(ieee80211_wx_get_mode);
17661 +//EXPORT_SYMBOL(ieee80211_wx_set_scan);
17662 +//EXPORT_SYMBOL(ieee80211_wx_get_freq);
17663 +//EXPORT_SYMBOL(ieee80211_wx_set_freq);
17664 +//EXPORT_SYMBOL(ieee80211_wx_set_rawtx);
17665 +//EXPORT_SYMBOL(ieee80211_wx_get_name);
17666 +//EXPORT_SYMBOL(ieee80211_wx_set_power);
17667 +//EXPORT_SYMBOL(ieee80211_wx_get_power);
17668 +//EXPORT_SYMBOL(ieee80211_wlan_frequencies);
17669 +//EXPORT_SYMBOL(ieee80211_wx_set_rts);
17670 +//EXPORT_SYMBOL(ieee80211_wx_get_rts);
17671 +#else
17672 +EXPORT_SYMBOL_NOVERS(ieee80211_wx_get_essid);
17673 +EXPORT_SYMBOL_NOVERS(ieee80211_wx_set_essid);
17674 +EXPORT_SYMBOL_NOVERS(ieee80211_wx_set_rate);
17675 +EXPORT_SYMBOL_NOVERS(ieee80211_wx_get_rate);
17676 +EXPORT_SYMBOL_NOVERS(ieee80211_wx_set_wap);
17677 +EXPORT_SYMBOL_NOVERS(ieee80211_wx_get_wap);
17678 +EXPORT_SYMBOL_NOVERS(ieee80211_wx_set_mode);
17679 +EXPORT_SYMBOL_NOVERS(ieee80211_wx_get_mode);
17680 +EXPORT_SYMBOL_NOVERS(ieee80211_wx_set_scan);
17681 +EXPORT_SYMBOL_NOVERS(ieee80211_wx_get_freq);
17682 +EXPORT_SYMBOL_NOVERS(ieee80211_wx_set_freq);
17683 +EXPORT_SYMBOL_NOVERS(ieee80211_wx_set_rawtx);
17684 +EXPORT_SYMBOL_NOVERS(ieee80211_wx_get_name);
17685 +EXPORT_SYMBOL_NOVERS(ieee80211_wx_set_power);
17686 +EXPORT_SYMBOL_NOVERS(ieee80211_wx_get_power);
17687 +EXPORT_SYMBOL_NOVERS(ieee80211_wlan_frequencies);
17688 +EXPORT_SYMBOL_NOVERS(ieee80211_wx_set_rts);
17689 +EXPORT_SYMBOL_NOVERS(ieee80211_wx_get_rts);
17690 +#endif
17691 --- /dev/null
17692 +++ b/drivers/staging/rtl8192e/ieee80211/ieee80211_tx.c
17693 @@ -0,0 +1,933 @@
17694 +/******************************************************************************
17695 +
17696 + Copyright(c) 2003 - 2004 Intel Corporation. All rights reserved.
17697 +
17698 + This program is free software; you can redistribute it and/or modify it
17699 + under the terms of version 2 of the GNU General Public License as
17700 + published by the Free Software Foundation.
17701 +
17702 + This program is distributed in the hope that it will be useful, but WITHOUT
17703 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
17704 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17705 + more details.
17706 +
17707 + You should have received a copy of the GNU General Public License along with
17708 + this program; if not, write to the Free Software Foundation, Inc., 59
17709 + Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17710 +
17711 + The full GNU General Public License is included in this distribution in the
17712 + file called LICENSE.
17713 +
17714 + Contact Information:
17715 + James P. Ketrenos <ipw2100-admin@linux.intel.com>
17716 + Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
17717 +
17718 +******************************************************************************
17719 +
17720 + Few modifications for Realtek's Wi-Fi drivers by
17721 + Andrea Merello <andreamrl@tiscali.it>
17722 +
17723 + A special thanks goes to Realtek for their support !
17724 +
17725 +******************************************************************************/
17726 +
17727 +#include <linux/compiler.h>
17728 +//#include <linux/config.h>
17729 +#include <linux/errno.h>
17730 +#include <linux/if_arp.h>
17731 +#include <linux/in6.h>
17732 +#include <linux/in.h>
17733 +#include <linux/ip.h>
17734 +#include <linux/kernel.h>
17735 +#include <linux/module.h>
17736 +#include <linux/netdevice.h>
17737 +#include <linux/pci.h>
17738 +#include <linux/proc_fs.h>
17739 +#include <linux/skbuff.h>
17740 +#include <linux/slab.h>
17741 +#include <linux/tcp.h>
17742 +#include <linux/types.h>
17743 +#include <linux/version.h>
17744 +#include <linux/wireless.h>
17745 +#include <linux/etherdevice.h>
17746 +#include <asm/uaccess.h>
17747 +#include <linux/if_vlan.h>
17748 +
17749 +#include "ieee80211.h"
17750 +
17751 +
17752 +/*
17753 +
17754 +
17755 +802.11 Data Frame
17756 +
17757 +
17758 +802.11 frame_contorl for data frames - 2 bytes
17759 + ,-----------------------------------------------------------------------------------------.
17760 +bits | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | a | b | c | d | e |
17761 + |----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|------|
17762 +val | 0 | 0 | 0 | 1 | x | 0 | 0 | 0 | 1 | 0 | x | x | x | x | x |
17763 + |----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|------|
17764 +desc | ^-ver-^ | ^type-^ | ^-----subtype-----^ | to |from |more |retry| pwr |more |wep |
17765 + | | | x=0 data,x=1 data+ack | DS | DS |frag | | mgm |data | |
17766 + '-----------------------------------------------------------------------------------------'
17767 + /\
17768 + |
17769 +802.11 Data Frame |
17770 + ,--------- 'ctrl' expands to >-----------'
17771 + |
17772 + ,--'---,-------------------------------------------------------------.
17773 +Bytes | 2 | 2 | 6 | 6 | 6 | 2 | 0..2312 | 4 |
17774 + |------|------|---------|---------|---------|------|---------|------|
17775 +Desc. | ctrl | dura | DA/RA | TA | SA | Sequ | Frame | fcs |
17776 + | | tion | (BSSID) | | | ence | data | |
17777 + `--------------------------------------------------| |------'
17778 +Total: 28 non-data bytes `----.----'
17779 + |
17780 + .- 'Frame data' expands to <---------------------------'
17781 + |
17782 + V
17783 + ,---------------------------------------------------.
17784 +Bytes | 1 | 1 | 1 | 3 | 2 | 0-2304 |
17785 + |------|------|---------|----------|------|---------|
17786 +Desc. | SNAP | SNAP | Control |Eth Tunnel| Type | IP |
17787 + | DSAP | SSAP | | | | Packet |
17788 + | 0xAA | 0xAA |0x03 (UI)|0x00-00-F8| | |
17789 + `-----------------------------------------| |
17790 +Total: 8 non-data bytes `----.----'
17791 + |
17792 + .- 'IP Packet' expands, if WEP enabled, to <--'
17793 + |
17794 + V
17795 + ,-----------------------.
17796 +Bytes | 4 | 0-2296 | 4 |
17797 + |-----|-----------|-----|
17798 +Desc. | IV | Encrypted | ICV |
17799 + | | IP Packet | |
17800 + `-----------------------'
17801 +Total: 8 non-data bytes
17802 +
17803 +
17804 +802.3 Ethernet Data Frame
17805 +
17806 + ,-----------------------------------------.
17807 +Bytes | 6 | 6 | 2 | Variable | 4 |
17808 + |-------|-------|------|-----------|------|
17809 +Desc. | Dest. | Source| Type | IP Packet | fcs |
17810 + | MAC | MAC | | | |
17811 + `-----------------------------------------'
17812 +Total: 18 non-data bytes
17813 +
17814 +In the event that fragmentation is required, the incoming payload is split into
17815 +N parts of size ieee->fts. The first fragment contains the SNAP header and the
17816 +remaining packets are just data.
17817 +
17818 +If encryption is enabled, each fragment payload size is reduced by enough space
17819 +to add the prefix and postfix (IV and ICV totalling 8 bytes in the case of WEP)
17820 +So if you have 1500 bytes of payload with ieee->fts set to 500 without
17821 +encryption it will take 3 frames. With WEP it will take 4 frames as the
17822 +payload of each frame is reduced to 492 bytes.
17823 +
17824 +* SKB visualization
17825 +*
17826 +* ,- skb->data
17827 +* |
17828 +* | ETHERNET HEADER ,-<-- PAYLOAD
17829 +* | | 14 bytes from skb->data
17830 +* | 2 bytes for Type --> ,T. | (sizeof ethhdr)
17831 +* | | | |
17832 +* |,-Dest.--. ,--Src.---. | | |
17833 +* | 6 bytes| | 6 bytes | | | |
17834 +* v | | | | | |
17835 +* 0 | v 1 | v | v 2
17836 +* 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5
17837 +* ^ | ^ | ^ |
17838 +* | | | | | |
17839 +* | | | | `T' <---- 2 bytes for Type
17840 +* | | | |
17841 +* | | '---SNAP--' <-------- 6 bytes for SNAP
17842 +* | |
17843 +* `-IV--' <-------------------- 4 bytes for IV (WEP)
17844 +*
17845 +* SNAP HEADER
17846 +*
17847 +*/
17848 +
17849 +static u8 P802_1H_OUI[P80211_OUI_LEN] = { 0x00, 0x00, 0xf8 };
17850 +static u8 RFC1042_OUI[P80211_OUI_LEN] = { 0x00, 0x00, 0x00 };
17851 +
17852 +static inline int ieee80211_put_snap(u8 *data, u16 h_proto)
17853 +{
17854 + struct ieee80211_snap_hdr *snap;
17855 + u8 *oui;
17856 +
17857 + snap = (struct ieee80211_snap_hdr *)data;
17858 + snap->dsap = 0xaa;
17859 + snap->ssap = 0xaa;
17860 + snap->ctrl = 0x03;
17861 +
17862 + if (h_proto == 0x8137 || h_proto == 0x80f3)
17863 + oui = P802_1H_OUI;
17864 + else
17865 + oui = RFC1042_OUI;
17866 + snap->oui[0] = oui[0];
17867 + snap->oui[1] = oui[1];
17868 + snap->oui[2] = oui[2];
17869 +
17870 + *(u16 *)(data + SNAP_SIZE) = htons(h_proto);
17871 +
17872 + return SNAP_SIZE + sizeof(u16);
17873 +}
17874 +
17875 +int ieee80211_encrypt_fragment(
17876 + struct ieee80211_device *ieee,
17877 + struct sk_buff *frag,
17878 + int hdr_len)
17879 +{
17880 + struct ieee80211_crypt_data* crypt = ieee->crypt[ieee->tx_keyidx];
17881 + int res;
17882 +
17883 + if (!(crypt && crypt->ops))
17884 + {
17885 + printk("=========>%s(), crypt is null\n", __FUNCTION__);
17886 + return -1;
17887 + }
17888 +#ifdef CONFIG_IEEE80211_CRYPT_TKIP
17889 + struct ieee80211_hdr *header;
17890 +
17891 + if (ieee->tkip_countermeasures &&
17892 + crypt && crypt->ops && strcmp(crypt->ops->name, "TKIP") == 0) {
17893 + header = (struct ieee80211_hdr *) frag->data;
17894 + if (net_ratelimit()) {
17895 + printk(KERN_DEBUG "%s: TKIP countermeasures: dropped "
17896 + "TX packet to " MAC_FMT "\n",
17897 + ieee->dev->name, MAC_ARG(header->addr1));
17898 + }
17899 + return -1;
17900 + }
17901 +#endif
17902 + /* To encrypt, frame format is:
17903 + * IV (4 bytes), clear payload (including SNAP), ICV (4 bytes) */
17904 +
17905 + // PR: FIXME: Copied from hostap. Check fragmentation/MSDU/MPDU encryption.
17906 + /* Host-based IEEE 802.11 fragmentation for TX is not yet supported, so
17907 + * call both MSDU and MPDU encryption functions from here. */
17908 + atomic_inc(&crypt->refcnt);
17909 + res = 0;
17910 + if (crypt->ops->encrypt_msdu)
17911 + res = crypt->ops->encrypt_msdu(frag, hdr_len, crypt->priv);
17912 + if (res == 0 && crypt->ops->encrypt_mpdu)
17913 + res = crypt->ops->encrypt_mpdu(frag, hdr_len, crypt->priv);
17914 +
17915 + atomic_dec(&crypt->refcnt);
17916 + if (res < 0) {
17917 + printk(KERN_INFO "%s: Encryption failed: len=%d.\n",
17918 + ieee->dev->name, frag->len);
17919 + ieee->ieee_stats.tx_discards++;
17920 + return -1;
17921 + }
17922 +
17923 + return 0;
17924 +}
17925 +
17926 +
17927 +void ieee80211_txb_free(struct ieee80211_txb *txb) {
17928 + //int i;
17929 + if (unlikely(!txb))
17930 + return;
17931 +#if 0
17932 + for (i = 0; i < txb->nr_frags; i++)
17933 + if (txb->fragments[i])
17934 + dev_kfree_skb_any(txb->fragments[i]);
17935 +#endif
17936 + kfree(txb);
17937 +}
17938 +
17939 +struct ieee80211_txb *ieee80211_alloc_txb(int nr_frags, int txb_size,
17940 + int gfp_mask)
17941 +{
17942 + struct ieee80211_txb *txb;
17943 + int i;
17944 + txb = kmalloc(
17945 + sizeof(struct ieee80211_txb) + (sizeof(u8*) * nr_frags),
17946 + gfp_mask);
17947 + if (!txb)
17948 + return NULL;
17949 +
17950 + memset(txb, 0, sizeof(struct ieee80211_txb));
17951 + txb->nr_frags = nr_frags;
17952 + txb->frag_size = txb_size;
17953 +
17954 + for (i = 0; i < nr_frags; i++) {
17955 + txb->fragments[i] = dev_alloc_skb(txb_size);
17956 + if (unlikely(!txb->fragments[i])) {
17957 + i--;
17958 + break;
17959 + }
17960 + memset(txb->fragments[i]->cb, 0, sizeof(txb->fragments[i]->cb));
17961 + }
17962 + if (unlikely(i != nr_frags)) {
17963 + while (i >= 0)
17964 + dev_kfree_skb_any(txb->fragments[i--]);
17965 + kfree(txb);
17966 + return NULL;
17967 + }
17968 + return txb;
17969 +}
17970 +
17971 +// Classify the to-be send data packet
17972 +// Need to acquire the sent queue index.
17973 +static int
17974 +ieee80211_classify(struct sk_buff *skb, struct ieee80211_network *network)
17975 +{
17976 + struct ethhdr *eth;
17977 + struct iphdr *ip;
17978 + eth = (struct ethhdr *)skb->data;
17979 + if (eth->h_proto != htons(ETH_P_IP))
17980 + return 0;
17981 +
17982 +// IEEE80211_DEBUG_DATA(IEEE80211_DL_DATA, skb->data, skb->len);
17983 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22))
17984 + ip = ip_hdr(skb);
17985 +#else
17986 + ip = (struct iphdr*)(skb->data + sizeof(struct ether_header));
17987 +#endif
17988 + switch (ip->tos & 0xfc) {
17989 + case 0x20:
17990 + return 2;
17991 + case 0x40:
17992 + return 1;
17993 + case 0x60:
17994 + return 3;
17995 + case 0x80:
17996 + return 4;
17997 + case 0xa0:
17998 + return 5;
17999 + case 0xc0:
18000 + return 6;
18001 + case 0xe0:
18002 + return 7;
18003 + default:
18004 + return 0;
18005 + }
18006 +}
18007 +
18008 +#define SN_LESS(a, b) (((a-b)&0x800)!=0)
18009 +void ieee80211_tx_query_agg_cap(struct ieee80211_device* ieee, struct sk_buff* skb, cb_desc* tcb_desc)
18010 +{
18011 + PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
18012 + PTX_TS_RECORD pTxTs = NULL;
18013 + struct ieee80211_hdr_1addr* hdr = (struct ieee80211_hdr_1addr*)skb->data;
18014 +
18015 + if (!pHTInfo->bCurrentHTSupport||!pHTInfo->bEnableHT)
18016 + return;
18017 + if (!IsQoSDataFrame(skb->data))
18018 + return;
18019 +
18020 + if (is_multicast_ether_addr(hdr->addr1) || is_broadcast_ether_addr(hdr->addr1))
18021 + return;
18022 + //check packet and mode later
18023 +#ifdef TO_DO_LIST
18024 + if(pTcb->PacketLength >= 4096)
18025 + return;
18026 + // For RTL819X, if pairwisekey = wep/tkip, we don't aggrregation.
18027 + if(!Adapter->HalFunc.GetNmodeSupportBySecCfgHandler(Adapter))
18028 + return;
18029 +#endif
18030 +#if 1
18031 + if(!ieee->GetNmodeSupportBySecCfg(ieee->dev))
18032 + {
18033 + return;
18034 + }
18035 +#endif
18036 + if(pHTInfo->bCurrentAMPDUEnable)
18037 + {
18038 + if (!GetTs(ieee, (PTS_COMMON_INFO*)(&pTxTs), hdr->addr1, skb->priority, TX_DIR, true))
18039 + {
18040 + printk("===>can't get TS\n");
18041 + return;
18042 + }
18043 + if (pTxTs->TxAdmittedBARecord.bValid == false)
18044 + {
18045 + //as some AP will refuse our action frame until key handshake has been finished. WB
18046 + if (ieee->wpa_ie_len && (ieee->pairwise_key_type == KEY_TYPE_NA))
18047 + ;
18048 + else
18049 + TsStartAddBaProcess(ieee, pTxTs);
18050 + goto FORCED_AGG_SETTING;
18051 + }
18052 + else if (pTxTs->bUsingBa == false)
18053 + {
18054 + if (SN_LESS(pTxTs->TxAdmittedBARecord.BaStartSeqCtrl.field.SeqNum, (pTxTs->TxCurSeq+1)%4096))
18055 + pTxTs->bUsingBa = true;
18056 + else
18057 + goto FORCED_AGG_SETTING;
18058 + }
18059 +
18060 + if (ieee->iw_mode == IW_MODE_INFRA)
18061 + {
18062 + tcb_desc->bAMPDUEnable = true;
18063 + tcb_desc->ampdu_factor = pHTInfo->CurrentAMPDUFactor;
18064 + tcb_desc->ampdu_density = pHTInfo->CurrentMPDUDensity;
18065 + }
18066 + }
18067 +FORCED_AGG_SETTING:
18068 + switch(pHTInfo->ForcedAMPDUMode )
18069 + {
18070 + case HT_AGG_AUTO:
18071 + break;
18072 +
18073 + case HT_AGG_FORCE_ENABLE:
18074 + tcb_desc->bAMPDUEnable = true;
18075 + tcb_desc->ampdu_density = pHTInfo->ForcedMPDUDensity;
18076 + tcb_desc->ampdu_factor = pHTInfo->ForcedAMPDUFactor;
18077 + break;
18078 +
18079 + case HT_AGG_FORCE_DISABLE:
18080 + tcb_desc->bAMPDUEnable = false;
18081 + tcb_desc->ampdu_density = 0;
18082 + tcb_desc->ampdu_factor = 0;
18083 + break;
18084 +
18085 + }
18086 + return;
18087 +}
18088 +
18089 +extern void ieee80211_qurey_ShortPreambleMode(struct ieee80211_device* ieee, cb_desc* tcb_desc)
18090 +{
18091 + tcb_desc->bUseShortPreamble = false;
18092 + if (tcb_desc->data_rate == 2)
18093 + {//// 1M can only use Long Preamble. 11B spec
18094 + return;
18095 + }
18096 + else if (ieee->current_network.capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
18097 + {
18098 + tcb_desc->bUseShortPreamble = true;
18099 + }
18100 + return;
18101 +}
18102 +extern void
18103 +ieee80211_query_HTCapShortGI(struct ieee80211_device *ieee, cb_desc *tcb_desc)
18104 +{
18105 + PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
18106 +
18107 + tcb_desc->bUseShortGI = false;
18108 +
18109 + if(!pHTInfo->bCurrentHTSupport||!pHTInfo->bEnableHT)
18110 + return;
18111 +
18112 + if(pHTInfo->bForcedShortGI)
18113 + {
18114 + tcb_desc->bUseShortGI = true;
18115 + return;
18116 + }
18117 +
18118 + if((pHTInfo->bCurBW40MHz==true) && pHTInfo->bCurShortGI40MHz)
18119 + tcb_desc->bUseShortGI = true;
18120 + else if((pHTInfo->bCurBW40MHz==false) && pHTInfo->bCurShortGI20MHz)
18121 + tcb_desc->bUseShortGI = true;
18122 +}
18123 +
18124 +void ieee80211_query_BandwidthMode(struct ieee80211_device* ieee, cb_desc *tcb_desc)
18125 +{
18126 + PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
18127 +
18128 + tcb_desc->bPacketBW = false;
18129 +
18130 + if(!pHTInfo->bCurrentHTSupport||!pHTInfo->bEnableHT)
18131 + return;
18132 +
18133 + if(tcb_desc->bMulticast || tcb_desc->bBroadcast)
18134 + return;
18135 +
18136 + if((tcb_desc->data_rate & 0x80)==0) // If using legacy rate, it shall use 20MHz channel.
18137 + return;
18138 + //BandWidthAutoSwitch is for auto switch to 20 or 40 in long distance
18139 + if(pHTInfo->bCurBW40MHz && pHTInfo->bCurTxBW40MHz && !ieee->bandwidth_auto_switch.bforced_tx20Mhz)
18140 + tcb_desc->bPacketBW = true;
18141 + return;
18142 +}
18143 +
18144 +void ieee80211_query_protectionmode(struct ieee80211_device* ieee, cb_desc* tcb_desc, struct sk_buff* skb)
18145 +{
18146 + // Common Settings
18147 + tcb_desc->bRTSSTBC = false;
18148 + tcb_desc->bRTSUseShortGI = false; // Since protection frames are always sent by legacy rate, ShortGI will never be used.
18149 + tcb_desc->bCTSEnable = false; // Most of protection using RTS/CTS
18150 + tcb_desc->RTSSC = 0; // 20MHz: Don't care; 40MHz: Duplicate.
18151 + tcb_desc->bRTSBW = false; // RTS frame bandwidth is always 20MHz
18152 +
18153 + if(tcb_desc->bBroadcast || tcb_desc->bMulticast)//only unicast frame will use rts/cts
18154 + return;
18155 +
18156 + if (is_broadcast_ether_addr(skb->data+16)) //check addr3 as infrastructure add3 is DA.
18157 + return;
18158 +
18159 + if (ieee->mode < IEEE_N_24G) //b, g mode
18160 + {
18161 + // (1) RTS_Threshold is compared to the MPDU, not MSDU.
18162 + // (2) If there are more than one frag in this MSDU, only the first frag uses protection frame.
18163 + // Other fragments are protected by previous fragment.
18164 + // So we only need to check the length of first fragment.
18165 + if (skb->len > ieee->rts)
18166 + {
18167 + tcb_desc->bRTSEnable = true;
18168 + tcb_desc->rts_rate = MGN_24M;
18169 + }
18170 + else if (ieee->current_network.buseprotection)
18171 + {
18172 + // Use CTS-to-SELF in protection mode.
18173 + tcb_desc->bRTSEnable = true;
18174 + tcb_desc->bCTSEnable = true;
18175 + tcb_desc->rts_rate = MGN_24M;
18176 + }
18177 + //otherwise return;
18178 + return;
18179 + }
18180 + else
18181 + {// 11n High throughput case.
18182 + PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
18183 + while (true)
18184 + {
18185 + //check ERP protection
18186 + if (ieee->current_network.buseprotection)
18187 + {// CTS-to-SELF
18188 + tcb_desc->bRTSEnable = true;
18189 + tcb_desc->bCTSEnable = true;
18190 + tcb_desc->rts_rate = MGN_24M;
18191 + break;
18192 + }
18193 + //check HT op mode
18194 + if(pHTInfo->bCurrentHTSupport && pHTInfo->bEnableHT)
18195 + {
18196 + u8 HTOpMode = pHTInfo->CurrentOpMode;
18197 + if((pHTInfo->bCurBW40MHz && (HTOpMode == 2 || HTOpMode == 3)) ||
18198 + (!pHTInfo->bCurBW40MHz && HTOpMode == 3) )
18199 + {
18200 + tcb_desc->rts_rate = MGN_24M; // Rate is 24Mbps.
18201 + tcb_desc->bRTSEnable = true;
18202 + break;
18203 + }
18204 + }
18205 + //check rts
18206 + if (skb->len > ieee->rts)
18207 + {
18208 + tcb_desc->rts_rate = MGN_24M; // Rate is 24Mbps.
18209 + tcb_desc->bRTSEnable = true;
18210 + break;
18211 + }
18212 + //to do list: check MIMO power save condition.
18213 + //check AMPDU aggregation for TXOP
18214 + if(tcb_desc->bAMPDUEnable)
18215 + {
18216 + tcb_desc->rts_rate = MGN_24M; // Rate is 24Mbps.
18217 + // According to 8190 design, firmware sends CF-End only if RTS/CTS is enabled. However, it degrads
18218 + // throughput around 10M, so we disable of this mechanism. 2007.08.03 by Emily
18219 + tcb_desc->bRTSEnable = false;
18220 + break;
18221 + }
18222 + //check IOT action
18223 + if(pHTInfo->IOTAction & HT_IOT_ACT_FORCED_CTS2SELF)
18224 + {
18225 + tcb_desc->bCTSEnable = true;
18226 + tcb_desc->rts_rate = MGN_24M;
18227 + tcb_desc->bRTSEnable = true;
18228 + break;
18229 + }
18230 + // Totally no protection case!!
18231 + goto NO_PROTECTION;
18232 + }
18233 + }
18234 + // For test , CTS replace with RTS
18235 + if( 0 )
18236 + {
18237 + tcb_desc->bCTSEnable = true;
18238 + tcb_desc->rts_rate = MGN_24M;
18239 + tcb_desc->bRTSEnable = true;
18240 + }
18241 + if (ieee->current_network.capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
18242 + tcb_desc->bUseShortPreamble = true;
18243 + if (ieee->mode == IW_MODE_MASTER)
18244 + goto NO_PROTECTION;
18245 + return;
18246 +NO_PROTECTION:
18247 + tcb_desc->bRTSEnable = false;
18248 + tcb_desc->bCTSEnable = false;
18249 + tcb_desc->rts_rate = 0;
18250 + tcb_desc->RTSSC = 0;
18251 + tcb_desc->bRTSBW = false;
18252 +}
18253 +
18254 +
18255 +void ieee80211_txrate_selectmode(struct ieee80211_device* ieee, cb_desc* tcb_desc)
18256 +{
18257 +#ifdef TO_DO_LIST
18258 + if(!IsDataFrame(pFrame))
18259 + {
18260 + pTcb->bTxDisableRateFallBack = TRUE;
18261 + pTcb->bTxUseDriverAssingedRate = TRUE;
18262 + pTcb->RATRIndex = 7;
18263 + return;
18264 + }
18265 +
18266 + if(pMgntInfo->ForcedDataRate!= 0)
18267 + {
18268 + pTcb->bTxDisableRateFallBack = TRUE;
18269 + pTcb->bTxUseDriverAssingedRate = TRUE;
18270 + return;
18271 + }
18272 +#endif
18273 + if(ieee->bTxDisableRateFallBack)
18274 + tcb_desc->bTxDisableRateFallBack = true;
18275 +
18276 + if(ieee->bTxUseDriverAssingedRate)
18277 + tcb_desc->bTxUseDriverAssingedRate = true;
18278 + if(!tcb_desc->bTxDisableRateFallBack || !tcb_desc->bTxUseDriverAssingedRate)
18279 + {
18280 + if (ieee->iw_mode == IW_MODE_INFRA || ieee->iw_mode == IW_MODE_ADHOC)
18281 + tcb_desc->RATRIndex = 0;
18282 + }
18283 +}
18284 +
18285 +void ieee80211_query_seqnum(struct ieee80211_device*ieee, struct sk_buff* skb, u8* dst)
18286 +{
18287 + if (is_multicast_ether_addr(dst) || is_broadcast_ether_addr(dst))
18288 + return;
18289 + if (IsQoSDataFrame(skb->data)) //we deal qos data only
18290 + {
18291 + PTX_TS_RECORD pTS = NULL;
18292 + if (!GetTs(ieee, (PTS_COMMON_INFO*)(&pTS), dst, skb->priority, TX_DIR, true))
18293 + {
18294 + return;
18295 + }
18296 + pTS->TxCurSeq = (pTS->TxCurSeq+1)%4096;
18297 + }
18298 +}
18299 +
18300 +int ieee80211_xmit(struct sk_buff *skb, struct net_device *dev)
18301 +{
18302 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0))
18303 + struct ieee80211_device *ieee = netdev_priv(dev);
18304 +#else
18305 + struct ieee80211_device *ieee = (struct ieee80211_device *)dev->priv;
18306 +#endif
18307 + struct ieee80211_txb *txb = NULL;
18308 + struct ieee80211_hdr_3addrqos *frag_hdr;
18309 + int i, bytes_per_frag, nr_frags, bytes_last_frag, frag_size;
18310 + unsigned long flags;
18311 + struct net_device_stats *stats = &ieee->stats;
18312 + int ether_type = 0, encrypt;
18313 + int bytes, fc, qos_ctl = 0, hdr_len;
18314 + struct sk_buff *skb_frag;
18315 + struct ieee80211_hdr_3addrqos header = { /* Ensure zero initialized */
18316 + .duration_id = 0,
18317 + .seq_ctl = 0,
18318 + .qos_ctl = 0
18319 + };
18320 + u8 dest[ETH_ALEN], src[ETH_ALEN];
18321 + int qos_actived = ieee->current_network.qos_data.active;
18322 +
18323 + struct ieee80211_crypt_data* crypt;
18324 +
18325 + cb_desc *tcb_desc;
18326 +
18327 + spin_lock_irqsave(&ieee->lock, flags);
18328 +
18329 + /* If there is no driver handler to take the TXB, dont' bother
18330 + * creating it... */
18331 + if ((!ieee->hard_start_xmit && !(ieee->softmac_features & IEEE_SOFTMAC_TX_QUEUE))||
18332 + ((!ieee->softmac_data_hard_start_xmit && (ieee->softmac_features & IEEE_SOFTMAC_TX_QUEUE)))) {
18333 + printk(KERN_WARNING "%s: No xmit handler.\n",
18334 + ieee->dev->name);
18335 + goto success;
18336 + }
18337 +
18338 +
18339 + if(likely(ieee->raw_tx == 0)){
18340 + if (unlikely(skb->len < SNAP_SIZE + sizeof(u16))) {
18341 + printk(KERN_WARNING "%s: skb too small (%d).\n",
18342 + ieee->dev->name, skb->len);
18343 + goto success;
18344 + }
18345 +
18346 + memset(skb->cb, 0, sizeof(skb->cb));
18347 + ether_type = ntohs(((struct ethhdr *)skb->data)->h_proto);
18348 +
18349 + crypt = ieee->crypt[ieee->tx_keyidx];
18350 +
18351 + encrypt = !(ether_type == ETH_P_PAE && ieee->ieee802_1x) &&
18352 + ieee->host_encrypt && crypt && crypt->ops;
18353 +
18354 + if (!encrypt && ieee->ieee802_1x &&
18355 + ieee->drop_unencrypted && ether_type != ETH_P_PAE) {
18356 + stats->tx_dropped++;
18357 + goto success;
18358 + }
18359 + #ifdef CONFIG_IEEE80211_DEBUG
18360 + if (crypt && !encrypt && ether_type == ETH_P_PAE) {
18361 + struct eapol *eap = (struct eapol *)(skb->data +
18362 + sizeof(struct ethhdr) - SNAP_SIZE - sizeof(u16));
18363 + IEEE80211_DEBUG_EAP("TX: IEEE 802.11 EAPOL frame: %s\n",
18364 + eap_get_type(eap->type));
18365 + }
18366 + #endif
18367 +
18368 + /* Save source and destination addresses */
18369 + memcpy(&dest, skb->data, ETH_ALEN);
18370 + memcpy(&src, skb->data+ETH_ALEN, ETH_ALEN);
18371 +
18372 + /* Advance the SKB to the start of the payload */
18373 + skb_pull(skb, sizeof(struct ethhdr));
18374 +
18375 + /* Determine total amount of storage required for TXB packets */
18376 + bytes = skb->len + SNAP_SIZE + sizeof(u16);
18377 +
18378 + if (encrypt)
18379 + fc = IEEE80211_FTYPE_DATA | IEEE80211_FCTL_WEP;
18380 + else
18381 +
18382 + fc = IEEE80211_FTYPE_DATA;
18383 +
18384 + //if(ieee->current_network.QoS_Enable)
18385 + if(qos_actived)
18386 + fc |= IEEE80211_STYPE_QOS_DATA;
18387 + else
18388 + fc |= IEEE80211_STYPE_DATA;
18389 +
18390 + if (ieee->iw_mode == IW_MODE_INFRA) {
18391 + fc |= IEEE80211_FCTL_TODS;
18392 + /* To DS: Addr1 = BSSID, Addr2 = SA,
18393 + Addr3 = DA */
18394 + memcpy(&header.addr1, ieee->current_network.bssid, ETH_ALEN);
18395 + memcpy(&header.addr2, &src, ETH_ALEN);
18396 + memcpy(&header.addr3, &dest, ETH_ALEN);
18397 + } else if (ieee->iw_mode == IW_MODE_ADHOC) {
18398 + /* not From/To DS: Addr1 = DA, Addr2 = SA,
18399 + Addr3 = BSSID */
18400 + memcpy(&header.addr1, dest, ETH_ALEN);
18401 + memcpy(&header.addr2, src, ETH_ALEN);
18402 + memcpy(&header.addr3, ieee->current_network.bssid, ETH_ALEN);
18403 + }
18404 +
18405 + header.frame_ctl = cpu_to_le16(fc);
18406 +
18407 + /* Determine fragmentation size based on destination (multicast
18408 + * and broadcast are not fragmented) */
18409 + if (is_multicast_ether_addr(header.addr1) ||
18410 + is_broadcast_ether_addr(header.addr1)) {
18411 + frag_size = MAX_FRAG_THRESHOLD;
18412 + qos_ctl |= QOS_CTL_NOTCONTAIN_ACK;
18413 + }
18414 + else {
18415 + frag_size = ieee->fts;//default:392
18416 + qos_ctl = 0;
18417 + }
18418 +
18419 + //if (ieee->current_network.QoS_Enable)
18420 + if(qos_actived)
18421 + {
18422 + hdr_len = IEEE80211_3ADDR_LEN + 2;
18423 +
18424 + skb->priority = ieee80211_classify(skb, &ieee->current_network);
18425 + qos_ctl |= skb->priority; //set in the ieee80211_classify
18426 + header.qos_ctl = cpu_to_le16(qos_ctl & IEEE80211_QOS_TID);
18427 + } else {
18428 + hdr_len = IEEE80211_3ADDR_LEN;
18429 + }
18430 + /* Determine amount of payload per fragment. Regardless of if
18431 + * this stack is providing the full 802.11 header, one will
18432 + * eventually be affixed to this fragment -- so we must account for
18433 + * it when determining the amount of payload space. */
18434 + bytes_per_frag = frag_size - hdr_len;
18435 + if (ieee->config &
18436 + (CFG_IEEE80211_COMPUTE_FCS | CFG_IEEE80211_RESERVE_FCS))
18437 + bytes_per_frag -= IEEE80211_FCS_LEN;
18438 +
18439 + /* Each fragment may need to have room for encryptiong pre/postfix */
18440 + if (encrypt)
18441 + bytes_per_frag -= crypt->ops->extra_prefix_len +
18442 + crypt->ops->extra_postfix_len;
18443 +
18444 + /* Number of fragments is the total bytes_per_frag /
18445 + * payload_per_fragment */
18446 + nr_frags = bytes / bytes_per_frag;
18447 + bytes_last_frag = bytes % bytes_per_frag;
18448 + if (bytes_last_frag)
18449 + nr_frags++;
18450 + else
18451 + bytes_last_frag = bytes_per_frag;
18452 +
18453 + /* When we allocate the TXB we allocate enough space for the reserve
18454 + * and full fragment bytes (bytes_per_frag doesn't include prefix,
18455 + * postfix, header, FCS, etc.) */
18456 + txb = ieee80211_alloc_txb(nr_frags, frag_size + ieee->tx_headroom, GFP_ATOMIC);
18457 + if (unlikely(!txb)) {
18458 + printk(KERN_WARNING "%s: Could not allocate TXB\n",
18459 + ieee->dev->name);
18460 + goto failed;
18461 + }
18462 + txb->encrypted = encrypt;
18463 + txb->payload_size = bytes;
18464 +
18465 + //if (ieee->current_network.QoS_Enable)
18466 + if(qos_actived)
18467 + {
18468 + txb->queue_index = UP2AC(skb->priority);
18469 + } else {
18470 + txb->queue_index = WME_AC_BK;;
18471 + }
18472 +
18473 +
18474 +
18475 + for (i = 0; i < nr_frags; i++) {
18476 + skb_frag = txb->fragments[i];
18477 + tcb_desc = (cb_desc *)(skb_frag->cb + MAX_DEV_ADDR_SIZE);
18478 + if(qos_actived){
18479 + skb_frag->priority = skb->priority;//UP2AC(skb->priority);
18480 + tcb_desc->queue_index = UP2AC(skb->priority);
18481 + } else {
18482 + skb_frag->priority = WME_AC_BK;
18483 + tcb_desc->queue_index = WME_AC_BK;
18484 + }
18485 + skb_reserve(skb_frag, ieee->tx_headroom);
18486 +
18487 + if (encrypt){
18488 + if (ieee->hwsec_active)
18489 + tcb_desc->bHwSec = 1;
18490 + else
18491 + tcb_desc->bHwSec = 0;
18492 + skb_reserve(skb_frag, crypt->ops->extra_prefix_len);
18493 + }
18494 + else
18495 + {
18496 + tcb_desc->bHwSec = 0;
18497 + }
18498 + frag_hdr = (struct ieee80211_hdr_3addrqos *)skb_put(skb_frag, hdr_len);
18499 + memcpy(frag_hdr, &header, hdr_len);
18500 +
18501 + /* If this is not the last fragment, then add the MOREFRAGS
18502 + * bit to the frame control */
18503 + if (i != nr_frags - 1) {
18504 + frag_hdr->frame_ctl = cpu_to_le16(
18505 + fc | IEEE80211_FCTL_MOREFRAGS);
18506 + bytes = bytes_per_frag;
18507 +
18508 + } else {
18509 + /* The last fragment takes the remaining length */
18510 + bytes = bytes_last_frag;
18511 + }
18512 + //if(ieee->current_network.QoS_Enable)
18513 + if(qos_actived)
18514 + {
18515 + // add 1 only indicate to corresponding seq number control 2006/7/12
18516 + frag_hdr->seq_ctl = cpu_to_le16(ieee->seq_ctrl[UP2AC(skb->priority)+1]<<4 | i);
18517 + } else {
18518 + frag_hdr->seq_ctl = cpu_to_le16(ieee->seq_ctrl[0]<<4 | i);
18519 + }
18520 +
18521 + /* Put a SNAP header on the first fragment */
18522 + if (i == 0) {
18523 + ieee80211_put_snap(
18524 + skb_put(skb_frag, SNAP_SIZE + sizeof(u16)),
18525 + ether_type);
18526 + bytes -= SNAP_SIZE + sizeof(u16);
18527 + }
18528 +
18529 + memcpy(skb_put(skb_frag, bytes), skb->data, bytes);
18530 +
18531 + /* Advance the SKB... */
18532 + skb_pull(skb, bytes);
18533 +
18534 + /* Encryption routine will move the header forward in order
18535 + * to insert the IV between the header and the payload */
18536 + if (encrypt)
18537 + ieee80211_encrypt_fragment(ieee, skb_frag, hdr_len);
18538 + if (ieee->config &
18539 + (CFG_IEEE80211_COMPUTE_FCS | CFG_IEEE80211_RESERVE_FCS))
18540 + skb_put(skb_frag, 4);
18541 + }
18542 +
18543 + if(qos_actived)
18544 + {
18545 + if (ieee->seq_ctrl[UP2AC(skb->priority) + 1] == 0xFFF)
18546 + ieee->seq_ctrl[UP2AC(skb->priority) + 1] = 0;
18547 + else
18548 + ieee->seq_ctrl[UP2AC(skb->priority) + 1]++;
18549 + } else {
18550 + if (ieee->seq_ctrl[0] == 0xFFF)
18551 + ieee->seq_ctrl[0] = 0;
18552 + else
18553 + ieee->seq_ctrl[0]++;
18554 + }
18555 + }else{
18556 + if (unlikely(skb->len < sizeof(struct ieee80211_hdr_3addr))) {
18557 + printk(KERN_WARNING "%s: skb too small (%d).\n",
18558 + ieee->dev->name, skb->len);
18559 + goto success;
18560 + }
18561 +
18562 + txb = ieee80211_alloc_txb(1, skb->len, GFP_ATOMIC);
18563 + if(!txb){
18564 + printk(KERN_WARNING "%s: Could not allocate TXB\n",
18565 + ieee->dev->name);
18566 + goto failed;
18567 + }
18568 +
18569 + txb->encrypted = 0;
18570 + txb->payload_size = skb->len;
18571 + memcpy(skb_put(txb->fragments[0],skb->len), skb->data, skb->len);
18572 + }
18573 +
18574 + success:
18575 +//WB add to fill data tcb_desc here. only first fragment is considered, need to change, and you may remove to other place.
18576 + if (txb)
18577 + {
18578 +#if 1
18579 + cb_desc *tcb_desc = (cb_desc *)(txb->fragments[0]->cb + MAX_DEV_ADDR_SIZE);
18580 + tcb_desc->bTxEnableFwCalcDur = 1;
18581 + if (is_multicast_ether_addr(header.addr1))
18582 + tcb_desc->bMulticast = 1;
18583 + if (is_broadcast_ether_addr(header.addr1))
18584 + tcb_desc->bBroadcast = 1;
18585 + ieee80211_txrate_selectmode(ieee, tcb_desc);
18586 + if ( tcb_desc->bMulticast || tcb_desc->bBroadcast)
18587 + tcb_desc->data_rate = ieee->basic_rate;
18588 + else
18589 + //tcb_desc->data_rate = CURRENT_RATE(ieee->current_network.mode, ieee->rate, ieee->HTCurrentOperaRate);
18590 + tcb_desc->data_rate = CURRENT_RATE(ieee->mode, ieee->rate, ieee->HTCurrentOperaRate);
18591 + ieee80211_qurey_ShortPreambleMode(ieee, tcb_desc);
18592 + ieee80211_tx_query_agg_cap(ieee, txb->fragments[0], tcb_desc);
18593 + ieee80211_query_HTCapShortGI(ieee, tcb_desc);
18594 + ieee80211_query_BandwidthMode(ieee, tcb_desc);
18595 + ieee80211_query_protectionmode(ieee, tcb_desc, txb->fragments[0]);
18596 + ieee80211_query_seqnum(ieee, txb->fragments[0], header.addr1);
18597 +// IEEE80211_DEBUG_DATA(IEEE80211_DL_DATA, txb->fragments[0]->data, txb->fragments[0]->len);
18598 + //IEEE80211_DEBUG_DATA(IEEE80211_DL_DATA, tcb_desc, sizeof(cb_desc));
18599 +#endif
18600 + }
18601 + spin_unlock_irqrestore(&ieee->lock, flags);
18602 + dev_kfree_skb_any(skb);
18603 + if (txb) {
18604 + if (ieee->softmac_features & IEEE_SOFTMAC_TX_QUEUE){
18605 + ieee80211_softmac_xmit(txb, ieee);
18606 + }else{
18607 + if ((*ieee->hard_start_xmit)(txb, dev) == 0) {
18608 + stats->tx_packets++;
18609 + stats->tx_bytes += txb->payload_size;
18610 + return 0;
18611 + }
18612 + ieee80211_txb_free(txb);
18613 + }
18614 + }
18615 +
18616 + return 0;
18617 +
18618 + failed:
18619 + spin_unlock_irqrestore(&ieee->lock, flags);
18620 + netif_stop_queue(dev);
18621 + stats->tx_errors++;
18622 + return 1;
18623 +
18624 +}
18625 +
18626 +//EXPORT_SYMBOL(ieee80211_txb_free);
18627 --- /dev/null
18628 +++ b/drivers/staging/rtl8192e/ieee80211/ieee80211_wx.c
18629 @@ -0,0 +1,1032 @@
18630 +/******************************************************************************
18631 +
18632 + Copyright(c) 2004 Intel Corporation. All rights reserved.
18633 +
18634 + Portions of this file are based on the WEP enablement code provided by the
18635 + Host AP project hostap-drivers v0.1.3
18636 + Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
18637 + <jkmaline@cc.hut.fi>
18638 + Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
18639 +
18640 + This program is free software; you can redistribute it and/or modify it
18641 + under the terms of version 2 of the GNU General Public License as
18642 + published by the Free Software Foundation.
18643 +
18644 + This program is distributed in the hope that it will be useful, but WITHOUT
18645 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18646 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
18647 + more details.
18648 +
18649 + You should have received a copy of the GNU General Public License along with
18650 + this program; if not, write to the Free Software Foundation, Inc., 59
18651 + Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18652 +
18653 + The full GNU General Public License is included in this distribution in the
18654 + file called LICENSE.
18655 +
18656 + Contact Information:
18657 + James P. Ketrenos <ipw2100-admin@linux.intel.com>
18658 + Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
18659 +
18660 +******************************************************************************/
18661 +#include <linux/wireless.h>
18662 +#include <linux/version.h>
18663 +#include <linux/kmod.h>
18664 +#include <linux/module.h>
18665 +
18666 +#include "ieee80211.h"
18667 +#if 0
18668 +static const char *ieee80211_modes[] = {
18669 + "?", "a", "b", "ab", "g", "ag", "bg", "abg"
18670 +};
18671 +#endif
18672 +struct modes_unit {
18673 + char *mode_string;
18674 + int mode_size;
18675 +};
18676 +struct modes_unit ieee80211_modes[] = {
18677 + {"a",1},
18678 + {"b",1},
18679 + {"g",1},
18680 + {"?",1},
18681 + {"N-24G",5},
18682 + {"N-5G",4},
18683 +};
18684 +
18685 +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,4,20)) && (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
18686 +static inline char *
18687 +iwe_stream_add_event_rsl(char * stream, /* Stream of events */
18688 + char * ends, /* End of stream */
18689 + struct iw_event *iwe, /* Payload */
18690 + int event_len) /* Real size of payload */
18691 +{
18692 + /* Check if it's possible */
18693 + if((stream + event_len) < ends) {
18694 + iwe->len = event_len;
18695 + ndelay(1); //new
18696 + memcpy(stream, (char *) iwe, event_len);
18697 + stream += event_len;
18698 + }
18699 + return stream;
18700 +}
18701 +#else
18702 +#define iwe_stream_add_event_rsl iwe_stream_add_event
18703 +#endif
18704 +
18705 +#define MAX_CUSTOM_LEN 64
18706 +static inline char *rtl819x_translate_scan(struct ieee80211_device *ieee,
18707 + char *start, char *stop,
18708 + struct ieee80211_network *network,
18709 + struct iw_request_info *info)
18710 +{
18711 + char custom[MAX_CUSTOM_LEN];
18712 + char proto_name[IFNAMSIZ];
18713 + char *pname = proto_name;
18714 + char *p;
18715 + struct iw_event iwe;
18716 + int i, j;
18717 + u16 max_rate, rate;
18718 + static u8 EWC11NHTCap[] = {0x00, 0x90, 0x4c, 0x33};
18719 +
18720 + /* First entry *MUST* be the AP MAC address */
18721 + iwe.cmd = SIOCGIWAP;
18722 + iwe.u.ap_addr.sa_family = ARPHRD_ETHER;
18723 + memcpy(iwe.u.ap_addr.sa_data, network->bssid, ETH_ALEN);
18724 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)
18725 + start = iwe_stream_add_event_rsl(info, start, stop, &iwe, IW_EV_ADDR_LEN);
18726 +#else
18727 + start = iwe_stream_add_event_rsl(start, stop, &iwe, IW_EV_ADDR_LEN);
18728 +#endif
18729 + /* Remaining entries will be displayed in the order we provide them */
18730 +
18731 + /* Add the ESSID */
18732 + iwe.cmd = SIOCGIWESSID;
18733 + iwe.u.data.flags = 1;
18734 +// if (network->flags & NETWORK_EMPTY_ESSID) {
18735 + if (network->ssid_len == 0) {
18736 + iwe.u.data.length = sizeof("<hidden>");
18737 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)
18738 + start = iwe_stream_add_point(info, start, stop, &iwe, "<hidden>");
18739 +#else
18740 + start = iwe_stream_add_point(start, stop, &iwe, "<hidden>");
18741 +#endif
18742 + } else {
18743 + iwe.u.data.length = min(network->ssid_len, (u8)32);
18744 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)
18745 + start = iwe_stream_add_point(info, start, stop, &iwe, network->ssid);
18746 +#else
18747 + start = iwe_stream_add_point(start, stop, &iwe, network->ssid);
18748 +#endif
18749 + }
18750 + /* Add the protocol name */
18751 + iwe.cmd = SIOCGIWNAME;
18752 + for(i=0; i<(sizeof(ieee80211_modes)/sizeof(ieee80211_modes[0])); i++) {
18753 + if(network->mode&(1<<i)) {
18754 + sprintf(pname,ieee80211_modes[i].mode_string,ieee80211_modes[i].mode_size);
18755 + pname +=ieee80211_modes[i].mode_size;
18756 + }
18757 + }
18758 + *pname = '\0';
18759 + snprintf(iwe.u.name, IFNAMSIZ, "IEEE802.11%s", proto_name);
18760 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)
18761 + start = iwe_stream_add_event_rsl(info, start, stop, &iwe, IW_EV_CHAR_LEN);
18762 +#else
18763 + start = iwe_stream_add_event_rsl(start, stop, &iwe, IW_EV_CHAR_LEN);
18764 +#endif
18765 + /* Add mode */
18766 + iwe.cmd = SIOCGIWMODE;
18767 + if (network->capability &
18768 + (WLAN_CAPABILITY_BSS | WLAN_CAPABILITY_IBSS)) {
18769 + if (network->capability & WLAN_CAPABILITY_BSS)
18770 + iwe.u.mode = IW_MODE_MASTER;
18771 + else
18772 + iwe.u.mode = IW_MODE_ADHOC;
18773 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)
18774 + start = iwe_stream_add_event_rsl(info, start, stop, &iwe, IW_EV_UINT_LEN);
18775 +#else
18776 + start = iwe_stream_add_event_rsl(start, stop, &iwe, IW_EV_UINT_LEN);
18777 +#endif
18778 + }
18779 +
18780 + /* Add frequency/channel */
18781 + iwe.cmd = SIOCGIWFREQ;
18782 +/* iwe.u.freq.m = ieee80211_frequency(network->channel, network->mode);
18783 + iwe.u.freq.e = 3; */
18784 + iwe.u.freq.m = network->channel;
18785 + iwe.u.freq.e = 0;
18786 + iwe.u.freq.i = 0;
18787 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)
18788 + start = iwe_stream_add_event_rsl(info, start, stop, &iwe, IW_EV_FREQ_LEN);
18789 +#else
18790 + start = iwe_stream_add_event_rsl(start, stop, &iwe, IW_EV_FREQ_LEN);
18791 +#endif
18792 + /* Add encryption capability */
18793 + iwe.cmd = SIOCGIWENCODE;
18794 + if (network->capability & WLAN_CAPABILITY_PRIVACY)
18795 + iwe.u.data.flags = IW_ENCODE_ENABLED | IW_ENCODE_NOKEY;
18796 + else
18797 + iwe.u.data.flags = IW_ENCODE_DISABLED;
18798 + iwe.u.data.length = 0;
18799 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)
18800 + start = iwe_stream_add_point(info, start, stop, &iwe, network->ssid);
18801 +#else
18802 + start = iwe_stream_add_point(start, stop, &iwe, network->ssid);
18803 +#endif
18804 + /* Add basic and extended rates */
18805 + max_rate = 0;
18806 + p = custom;
18807 + p += snprintf(p, MAX_CUSTOM_LEN - (p - custom), " Rates (Mb/s): ");
18808 + for (i = 0, j = 0; i < network->rates_len; ) {
18809 + if (j < network->rates_ex_len &&
18810 + ((network->rates_ex[j] & 0x7F) <
18811 + (network->rates[i] & 0x7F)))
18812 + rate = network->rates_ex[j++] & 0x7F;
18813 + else
18814 + rate = network->rates[i++] & 0x7F;
18815 + if (rate > max_rate)
18816 + max_rate = rate;
18817 + p += snprintf(p, MAX_CUSTOM_LEN - (p - custom),
18818 + "%d%s ", rate >> 1, (rate & 1) ? ".5" : "");
18819 + }
18820 + for (; j < network->rates_ex_len; j++) {
18821 + rate = network->rates_ex[j] & 0x7F;
18822 + p += snprintf(p, MAX_CUSTOM_LEN - (p - custom),
18823 + "%d%s ", rate >> 1, (rate & 1) ? ".5" : "");
18824 + if (rate > max_rate)
18825 + max_rate = rate;
18826 + }
18827 +
18828 + if (network->mode >= IEEE_N_24G)//add N rate here;
18829 + {
18830 + PHT_CAPABILITY_ELE ht_cap = NULL;
18831 + bool is40M = false, isShortGI = false;
18832 + u8 max_mcs = 0;
18833 + if (!memcmp(network->bssht.bdHTCapBuf, EWC11NHTCap, 4))
18834 + ht_cap = (PHT_CAPABILITY_ELE)&network->bssht.bdHTCapBuf[4];
18835 + else
18836 + ht_cap = (PHT_CAPABILITY_ELE)&network->bssht.bdHTCapBuf[0];
18837 + is40M = (ht_cap->ChlWidth)?1:0;
18838 + isShortGI = (ht_cap->ChlWidth)?
18839 + ((ht_cap->ShortGI40Mhz)?1:0):
18840 + ((ht_cap->ShortGI20Mhz)?1:0);
18841 +
18842 + max_mcs = HTGetHighestMCSRate(ieee, ht_cap->MCS, MCS_FILTER_ALL);
18843 + rate = MCS_DATA_RATE[is40M][isShortGI][max_mcs&0x7f];
18844 + if (rate > max_rate)
18845 + max_rate = rate;
18846 + }
18847 +#if 0
18848 + printk("max rate:%d ===basic rate:\n", max_rate);
18849 + for (i=0;i<network->rates_len;i++)
18850 + printk(" %x", network->rates[i]);
18851 + printk("\n=======extend rate\n");
18852 + for (i=0; i<network->rates_ex_len; i++)
18853 + printk(" %x", network->rates_ex[i]);
18854 + printk("\n");
18855 +#endif
18856 + iwe.cmd = SIOCGIWRATE;
18857 + iwe.u.bitrate.fixed = iwe.u.bitrate.disabled = 0;
18858 + iwe.u.bitrate.value = max_rate * 500000;
18859 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)
18860 + start = iwe_stream_add_event_rsl(info, start, stop, &iwe,
18861 + IW_EV_PARAM_LEN);
18862 +#else
18863 + start = iwe_stream_add_event_rsl(start, stop, &iwe,
18864 + IW_EV_PARAM_LEN);
18865 +#endif
18866 + iwe.cmd = IWEVCUSTOM;
18867 + iwe.u.data.length = p - custom;
18868 + if (iwe.u.data.length)
18869 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)
18870 + start = iwe_stream_add_point(info, start, stop, &iwe, custom);
18871 +#else
18872 + start = iwe_stream_add_point(start, stop, &iwe, custom);
18873 +#endif
18874 + /* Add quality statistics */
18875 + /* TODO: Fix these values... */
18876 + iwe.cmd = IWEVQUAL;
18877 + iwe.u.qual.qual = network->stats.signal;
18878 + iwe.u.qual.level = network->stats.rssi;
18879 + iwe.u.qual.noise = network->stats.noise;
18880 + iwe.u.qual.updated = network->stats.mask & IEEE80211_STATMASK_WEMASK;
18881 + if (!(network->stats.mask & IEEE80211_STATMASK_RSSI))
18882 + iwe.u.qual.updated |= IW_QUAL_LEVEL_INVALID;
18883 + if (!(network->stats.mask & IEEE80211_STATMASK_NOISE))
18884 + iwe.u.qual.updated |= IW_QUAL_NOISE_INVALID;
18885 + if (!(network->stats.mask & IEEE80211_STATMASK_SIGNAL))
18886 + iwe.u.qual.updated |= IW_QUAL_QUAL_INVALID;
18887 + iwe.u.qual.updated = 7;
18888 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)
18889 + start = iwe_stream_add_event_rsl(info, start, stop, &iwe, IW_EV_QUAL_LEN);
18890 +#else
18891 + start = iwe_stream_add_event_rsl(start, stop, &iwe, IW_EV_QUAL_LEN);
18892 +#endif
18893 + iwe.cmd = IWEVCUSTOM;
18894 + p = custom;
18895 +
18896 + iwe.u.data.length = p - custom;
18897 + if (iwe.u.data.length)
18898 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)
18899 + start = iwe_stream_add_point(info, start, stop, &iwe, custom);
18900 +#else
18901 + start = iwe_stream_add_point(start, stop, &iwe, custom);
18902 +#endif
18903 +#if (WIRELESS_EXT < 18)
18904 + if (ieee->wpa_enabled && network->wpa_ie_len){
18905 + char buf[MAX_WPA_IE_LEN * 2 + 30];
18906 + // printk("WPA IE\n");
18907 + u8 *p = buf;
18908 + p += sprintf(p, "wpa_ie=");
18909 + for (i = 0; i < network->wpa_ie_len; i++) {
18910 + p += sprintf(p, "%02x", network->wpa_ie[i]);
18911 + }
18912 +
18913 + memset(&iwe, 0, sizeof(iwe));
18914 + iwe.cmd = IWEVCUSTOM;
18915 + iwe.u.data.length = strlen(buf);
18916 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)
18917 + start = iwe_stream_add_point(info, start, stop, &iwe, buf);
18918 +#else
18919 + start = iwe_stream_add_point(start, stop, &iwe, buf);
18920 +#endif
18921 + }
18922 +
18923 + if (ieee->wpa_enabled && network->rsn_ie_len){
18924 + char buf[MAX_WPA_IE_LEN * 2 + 30];
18925 +
18926 + u8 *p = buf;
18927 + p += sprintf(p, "rsn_ie=");
18928 + for (i = 0; i < network->rsn_ie_len; i++) {
18929 + p += sprintf(p, "%02x", network->rsn_ie[i]);
18930 + }
18931 +
18932 + memset(&iwe, 0, sizeof(iwe));
18933 + iwe.cmd = IWEVCUSTOM;
18934 + iwe.u.data.length = strlen(buf);
18935 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)
18936 + start = iwe_stream_add_point(info, start, stop, &iwe, buf);
18937 +#else
18938 + start = iwe_stream_add_point(start, stop, &iwe, buf);
18939 +#endif
18940 + }
18941 +#else
18942 + memset(&iwe, 0, sizeof(iwe));
18943 + if (network->wpa_ie_len)
18944 + {
18945 + char buf[MAX_WPA_IE_LEN];
18946 + memcpy(buf, network->wpa_ie, network->wpa_ie_len);
18947 + iwe.cmd = IWEVGENIE;
18948 + iwe.u.data.length = network->wpa_ie_len;
18949 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)
18950 + start = iwe_stream_add_point(info, start, stop, &iwe, buf);
18951 +#else
18952 + start = iwe_stream_add_point(start, stop, &iwe, buf);
18953 +#endif
18954 + }
18955 + memset(&iwe, 0, sizeof(iwe));
18956 + if (network->rsn_ie_len)
18957 + {
18958 + char buf[MAX_WPA_IE_LEN];
18959 + memcpy(buf, network->rsn_ie, network->rsn_ie_len);
18960 + iwe.cmd = IWEVGENIE;
18961 + iwe.u.data.length = network->rsn_ie_len;
18962 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)
18963 + start = iwe_stream_add_point(info, start, stop, &iwe, buf);
18964 +#else
18965 + start = iwe_stream_add_point(start, stop, &iwe, buf);
18966 +#endif
18967 + }
18968 +#endif
18969 +
18970 +
18971 + /* Add EXTRA: Age to display seconds since last beacon/probe response
18972 + * for given network. */
18973 + iwe.cmd = IWEVCUSTOM;
18974 + p = custom;
18975 + p += snprintf(p, MAX_CUSTOM_LEN - (p - custom),
18976 + " Last beacon: %lums ago", (jiffies - network->last_scanned) / (HZ / 100));
18977 + iwe.u.data.length = p - custom;
18978 + if (iwe.u.data.length)
18979 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)
18980 + start = iwe_stream_add_point(info, start, stop, &iwe, custom);
18981 +#else
18982 + start = iwe_stream_add_point(start, stop, &iwe, custom);
18983 +#endif
18984 +
18985 + return start;
18986 +}
18987 +
18988 +int ieee80211_wx_get_scan(struct ieee80211_device *ieee,
18989 + struct iw_request_info *info,
18990 + union iwreq_data *wrqu, char *extra)
18991 +{
18992 + struct ieee80211_network *network;
18993 + unsigned long flags;
18994 +
18995 + char *ev = extra;
18996 +// char *stop = ev + IW_SCAN_MAX_DATA;
18997 + char *stop = ev + wrqu->data.length;//IW_SCAN_MAX_DATA;
18998 + //char *stop = ev + IW_SCAN_MAX_DATA;
18999 + int i = 0;
19000 + int err = 0;
19001 + IEEE80211_DEBUG_WX("Getting scan\n");
19002 + down(&ieee->wx_sem);
19003 + spin_lock_irqsave(&ieee->lock, flags);
19004 +
19005 + list_for_each_entry(network, &ieee->network_list, list) {
19006 + i++;
19007 + if((stop-ev)<200)
19008 + {
19009 + err = -E2BIG;
19010 + break;
19011 + }
19012 + if (ieee->scan_age == 0 ||
19013 + time_after(network->last_scanned + ieee->scan_age, jiffies))
19014 + ev = rtl819x_translate_scan(ieee, ev, stop, network, info);
19015 + else
19016 + IEEE80211_DEBUG_SCAN(
19017 + "Not showing network '%s ("
19018 + MAC_FMT ")' due to age (%lums).\n",
19019 + escape_essid(network->ssid,
19020 + network->ssid_len),
19021 + MAC_ARG(network->bssid),
19022 + (jiffies - network->last_scanned) / (HZ / 100));
19023 + }
19024 +
19025 + spin_unlock_irqrestore(&ieee->lock, flags);
19026 + up(&ieee->wx_sem);
19027 + wrqu->data.length = ev - extra;
19028 + wrqu->data.flags = 0;
19029 +
19030 + IEEE80211_DEBUG_WX("exit: %d networks returned.\n", i);
19031 +
19032 + return err;
19033 +}
19034 +
19035 +int ieee80211_wx_set_encode(struct ieee80211_device *ieee,
19036 + struct iw_request_info *info,
19037 + union iwreq_data *wrqu, char *keybuf)
19038 +{
19039 + struct iw_point *erq = &(wrqu->encoding);
19040 + struct net_device *dev = ieee->dev;
19041 + struct ieee80211_security sec = {
19042 + .flags = 0
19043 + };
19044 + int i, key, key_provided, len;
19045 + struct ieee80211_crypt_data **crypt;
19046 +
19047 + IEEE80211_DEBUG_WX("SET_ENCODE\n");
19048 +
19049 + key = erq->flags & IW_ENCODE_INDEX;
19050 + if (key) {
19051 + if (key > WEP_KEYS)
19052 + return -EINVAL;
19053 + key--;
19054 + key_provided = 1;
19055 + } else {
19056 + key_provided = 0;
19057 + key = ieee->tx_keyidx;
19058 + }
19059 +
19060 + IEEE80211_DEBUG_WX("Key: %d [%s]\n", key, key_provided ?
19061 + "provided" : "default");
19062 + crypt = &ieee->crypt[key];
19063 +
19064 + if (erq->flags & IW_ENCODE_DISABLED) {
19065 + if (key_provided && *crypt) {
19066 + IEEE80211_DEBUG_WX("Disabling encryption on key %d.\n",
19067 + key);
19068 + ieee80211_crypt_delayed_deinit(ieee, crypt);
19069 + } else
19070 + IEEE80211_DEBUG_WX("Disabling encryption.\n");
19071 +
19072 + /* Check all the keys to see if any are still configured,
19073 + * and if no key index was provided, de-init them all */
19074 + for (i = 0; i < WEP_KEYS; i++) {
19075 + if (ieee->crypt[i] != NULL) {
19076 + if (key_provided)
19077 + break;
19078 + ieee80211_crypt_delayed_deinit(
19079 + ieee, &ieee->crypt[i]);
19080 + }
19081 + }
19082 +
19083 + if (i == WEP_KEYS) {
19084 + sec.enabled = 0;
19085 + sec.level = SEC_LEVEL_0;
19086 + sec.flags |= SEC_ENABLED | SEC_LEVEL;
19087 + }
19088 +
19089 + goto done;
19090 + }
19091 +
19092 +
19093 +
19094 + sec.enabled = 1;
19095 + sec.flags |= SEC_ENABLED;
19096 +
19097 + if (*crypt != NULL && (*crypt)->ops != NULL &&
19098 + strcmp((*crypt)->ops->name, "WEP") != 0) {
19099 + /* changing to use WEP; deinit previously used algorithm
19100 + * on this key */
19101 + ieee80211_crypt_delayed_deinit(ieee, crypt);
19102 + }
19103 +
19104 + if (*crypt == NULL) {
19105 + struct ieee80211_crypt_data *new_crypt;
19106 +
19107 + /* take WEP into use */
19108 + new_crypt = kmalloc(sizeof(struct ieee80211_crypt_data),
19109 + GFP_KERNEL);
19110 + if (new_crypt == NULL)
19111 + return -ENOMEM;
19112 + memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data));
19113 + new_crypt->ops = ieee80211_get_crypto_ops("WEP");
19114 + if (!new_crypt->ops) {
19115 + request_module("ieee80211_crypt_wep");
19116 + new_crypt->ops = ieee80211_get_crypto_ops("WEP");
19117 + }
19118 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
19119 + if (new_crypt->ops && try_module_get(new_crypt->ops->owner))
19120 +#else
19121 + if (new_crypt->ops && try_inc_mod_count(new_crypt->ops->owner))
19122 +#endif
19123 + new_crypt->priv = new_crypt->ops->init(key);
19124 +
19125 + if (!new_crypt->ops || !new_crypt->priv) {
19126 + kfree(new_crypt);
19127 + new_crypt = NULL;
19128 +
19129 + printk(KERN_WARNING "%s: could not initialize WEP: "
19130 + "load module ieee80211_crypt_wep\n",
19131 + dev->name);
19132 + return -EOPNOTSUPP;
19133 + }
19134 + *crypt = new_crypt;
19135 + }
19136 +
19137 + /* If a new key was provided, set it up */
19138 + if (erq->length > 0) {
19139 + len = erq->length <= 5 ? 5 : 13;
19140 + memcpy(sec.keys[key], keybuf, erq->length);
19141 + if (len > erq->length)
19142 + memset(sec.keys[key] + erq->length, 0,
19143 + len - erq->length);
19144 + IEEE80211_DEBUG_WX("Setting key %d to '%s' (%d:%d bytes)\n",
19145 + key, escape_essid(sec.keys[key], len),
19146 + erq->length, len);
19147 + sec.key_sizes[key] = len;
19148 + (*crypt)->ops->set_key(sec.keys[key], len, NULL,
19149 + (*crypt)->priv);
19150 + sec.flags |= (1 << key);
19151 + /* This ensures a key will be activated if no key is
19152 + * explicitely set */
19153 + if (key == sec.active_key)
19154 + sec.flags |= SEC_ACTIVE_KEY;
19155 + ieee->tx_keyidx = key;
19156 +
19157 + } else {
19158 + len = (*crypt)->ops->get_key(sec.keys[key], WEP_KEY_LEN,
19159 + NULL, (*crypt)->priv);
19160 + if (len == 0) {
19161 + /* Set a default key of all 0 */
19162 + printk("Setting key %d to all zero.\n",
19163 + key);
19164 +
19165 + IEEE80211_DEBUG_WX("Setting key %d to all zero.\n",
19166 + key);
19167 + memset(sec.keys[key], 0, 13);
19168 + (*crypt)->ops->set_key(sec.keys[key], 13, NULL,
19169 + (*crypt)->priv);
19170 + sec.key_sizes[key] = 13;
19171 + sec.flags |= (1 << key);
19172 + }
19173 +
19174 + /* No key data - just set the default TX key index */
19175 + if (key_provided) {
19176 + IEEE80211_DEBUG_WX(
19177 + "Setting key %d to default Tx key.\n", key);
19178 + ieee->tx_keyidx = key;
19179 + sec.active_key = key;
19180 + sec.flags |= SEC_ACTIVE_KEY;
19181 + }
19182 + }
19183 +
19184 + done:
19185 + ieee->open_wep = !(erq->flags & IW_ENCODE_RESTRICTED);
19186 + ieee->auth_mode = ieee->open_wep ? WLAN_AUTH_OPEN : WLAN_AUTH_SHARED_KEY;
19187 + sec.auth_mode = ieee->open_wep ? WLAN_AUTH_OPEN : WLAN_AUTH_SHARED_KEY;
19188 + sec.flags |= SEC_AUTH_MODE;
19189 + IEEE80211_DEBUG_WX("Auth: %s\n", sec.auth_mode == WLAN_AUTH_OPEN ?
19190 + "OPEN" : "SHARED KEY");
19191 +
19192 + /* For now we just support WEP, so only set that security level...
19193 + * TODO: When WPA is added this is one place that needs to change */
19194 + sec.flags |= SEC_LEVEL;
19195 + sec.level = SEC_LEVEL_1; /* 40 and 104 bit WEP */
19196 +
19197 + if (ieee->set_security)
19198 + ieee->set_security(dev, &sec);
19199 +
19200 + /* Do not reset port if card is in Managed mode since resetting will
19201 + * generate new IEEE 802.11 authentication which may end up in looping
19202 + * with IEEE 802.1X. If your hardware requires a reset after WEP
19203 + * configuration (for example... Prism2), implement the reset_port in
19204 + * the callbacks structures used to initialize the 802.11 stack. */
19205 + if (ieee->reset_on_keychange &&
19206 + ieee->iw_mode != IW_MODE_INFRA &&
19207 + ieee->reset_port && ieee->reset_port(dev)) {
19208 + printk(KERN_DEBUG "%s: reset_port failed\n", dev->name);
19209 + return -EINVAL;
19210 + }
19211 + return 0;
19212 +}
19213 +
19214 +int ieee80211_wx_get_encode(struct ieee80211_device *ieee,
19215 + struct iw_request_info *info,
19216 + union iwreq_data *wrqu, char *keybuf)
19217 +{
19218 + struct iw_point *erq = &(wrqu->encoding);
19219 + int len, key;
19220 + struct ieee80211_crypt_data *crypt;
19221 +
19222 + IEEE80211_DEBUG_WX("GET_ENCODE\n");
19223 +
19224 + if(ieee->iw_mode == IW_MODE_MONITOR)
19225 + return -1;
19226 +
19227 + key = erq->flags & IW_ENCODE_INDEX;
19228 + if (key) {
19229 + if (key > WEP_KEYS)
19230 + return -EINVAL;
19231 + key--;
19232 + } else
19233 + key = ieee->tx_keyidx;
19234 +
19235 + crypt = ieee->crypt[key];
19236 + erq->flags = key + 1;
19237 +
19238 + if (crypt == NULL || crypt->ops == NULL) {
19239 + erq->length = 0;
19240 + erq->flags |= IW_ENCODE_DISABLED;
19241 + return 0;
19242 + }
19243 +#if 0
19244 + if (strcmp(crypt->ops->name, "WEP") != 0) {
19245 + /* only WEP is supported with wireless extensions, so just
19246 + * report that encryption is used */
19247 + erq->length = 0;
19248 + erq->flags |= IW_ENCODE_ENABLED;
19249 + return 0;
19250 + }
19251 +#endif
19252 + len = crypt->ops->get_key(keybuf, SCM_KEY_LEN, NULL, crypt->priv);
19253 + erq->length = (len >= 0 ? len : 0);
19254 +
19255 + erq->flags |= IW_ENCODE_ENABLED;
19256 +
19257 + if (ieee->open_wep)
19258 + erq->flags |= IW_ENCODE_OPEN;
19259 + else
19260 + erq->flags |= IW_ENCODE_RESTRICTED;
19261 +
19262 + return 0;
19263 +}
19264 +#if (WIRELESS_EXT >= 18)
19265 +int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee,
19266 + struct iw_request_info *info,
19267 + union iwreq_data *wrqu, char *extra)
19268 +{
19269 + int ret = 0;
19270 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
19271 + struct net_device *dev = ieee->dev;
19272 + struct iw_point *encoding = &wrqu->encoding;
19273 + struct iw_encode_ext *ext = (struct iw_encode_ext *)extra;
19274 + int i, idx;
19275 + int group_key = 0;
19276 + const char *alg, *module;
19277 + struct ieee80211_crypto_ops *ops;
19278 + struct ieee80211_crypt_data **crypt;
19279 +
19280 + struct ieee80211_security sec = {
19281 + .flags = 0,
19282 + };
19283 + //printk("======>encoding flag:%x,ext flag:%x, ext alg:%d\n", encoding->flags,ext->ext_flags, ext->alg);
19284 + idx = encoding->flags & IW_ENCODE_INDEX;
19285 + if (idx) {
19286 + if (idx < 1 || idx > WEP_KEYS)
19287 + return -EINVAL;
19288 + idx--;
19289 + } else
19290 + idx = ieee->tx_keyidx;
19291 +
19292 + if (ext->ext_flags & IW_ENCODE_EXT_GROUP_KEY) {
19293 +
19294 + crypt = &ieee->crypt[idx];
19295 +
19296 + group_key = 1;
19297 + } else {
19298 + /* some Cisco APs use idx>0 for unicast in dynamic WEP */
19299 + //printk("not group key, flags:%x, ext->alg:%d\n", ext->ext_flags, ext->alg);
19300 + if (idx != 0 && ext->alg != IW_ENCODE_ALG_WEP)
19301 + return -EINVAL;
19302 + if (ieee->iw_mode == IW_MODE_INFRA)
19303 +
19304 + crypt = &ieee->crypt[idx];
19305 +
19306 + else
19307 + return -EINVAL;
19308 + }
19309 +
19310 + sec.flags |= SEC_ENABLED;// | SEC_ENCRYPT;
19311 + if ((encoding->flags & IW_ENCODE_DISABLED) ||
19312 + ext->alg == IW_ENCODE_ALG_NONE) {
19313 + if (*crypt)
19314 + ieee80211_crypt_delayed_deinit(ieee, crypt);
19315 +
19316 + for (i = 0; i < WEP_KEYS; i++)
19317 +
19318 + if (ieee->crypt[i] != NULL)
19319 +
19320 + break;
19321 +
19322 + if (i == WEP_KEYS) {
19323 + sec.enabled = 0;
19324 + // sec.encrypt = 0;
19325 + sec.level = SEC_LEVEL_0;
19326 + sec.flags |= SEC_LEVEL;
19327 + }
19328 + //printk("disabled: flag:%x\n", encoding->flags);
19329 + goto done;
19330 + }
19331 +
19332 + sec.enabled = 1;
19333 + // sec.encrypt = 1;
19334 +#if 0
19335 + if (group_key ? !ieee->host_mc_decrypt :
19336 + !(ieee->host_encrypt || ieee->host_decrypt ||
19337 + ieee->host_encrypt_msdu))
19338 + goto skip_host_crypt;
19339 +#endif
19340 + switch (ext->alg) {
19341 + case IW_ENCODE_ALG_WEP:
19342 + alg = "WEP";
19343 + module = "ieee80211_crypt_wep";
19344 + break;
19345 + case IW_ENCODE_ALG_TKIP:
19346 + alg = "TKIP";
19347 + module = "ieee80211_crypt_tkip";
19348 + break;
19349 + case IW_ENCODE_ALG_CCMP:
19350 + alg = "CCMP";
19351 + module = "ieee80211_crypt_ccmp";
19352 + break;
19353 + default:
19354 + IEEE80211_DEBUG_WX("%s: unknown crypto alg %d\n",
19355 + dev->name, ext->alg);
19356 + ret = -EINVAL;
19357 + goto done;
19358 + }
19359 + printk("alg name:%s\n",alg);
19360 +
19361 + ops = ieee80211_get_crypto_ops(alg);
19362 + if (ops == NULL) {
19363 + request_module(module);
19364 + ops = ieee80211_get_crypto_ops(alg);
19365 + }
19366 + if (ops == NULL) {
19367 + IEEE80211_DEBUG_WX("%s: unknown crypto alg %d\n",
19368 + dev->name, ext->alg);
19369 + printk("========>unknown crypto alg %d\n", ext->alg);
19370 + ret = -EINVAL;
19371 + goto done;
19372 + }
19373 +
19374 + if (*crypt == NULL || (*crypt)->ops != ops) {
19375 + struct ieee80211_crypt_data *new_crypt;
19376 +
19377 + ieee80211_crypt_delayed_deinit(ieee, crypt);
19378 +
19379 +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13))
19380 + new_crypt = kzalloc(sizeof(*new_crypt), GFP_KERNEL);
19381 +#else
19382 + new_crypt = kmalloc(sizeof(*new_crypt), GFP_KERNEL);
19383 + memset(new_crypt,0,sizeof(*new_crypt));
19384 +#endif
19385 + if (new_crypt == NULL) {
19386 + ret = -ENOMEM;
19387 + goto done;
19388 + }
19389 + new_crypt->ops = ops;
19390 + if (new_crypt->ops && try_module_get(new_crypt->ops->owner))
19391 + new_crypt->priv = new_crypt->ops->init(idx);
19392 + if (new_crypt->priv == NULL) {
19393 + kfree(new_crypt);
19394 + ret = -EINVAL;
19395 + goto done;
19396 + }
19397 + *crypt = new_crypt;
19398 +
19399 + }
19400 +
19401 + if (ext->key_len > 0 && (*crypt)->ops->set_key &&
19402 + (*crypt)->ops->set_key(ext->key, ext->key_len, ext->rx_seq,
19403 + (*crypt)->priv) < 0) {
19404 + IEEE80211_DEBUG_WX("%s: key setting failed\n", dev->name);
19405 + printk("key setting failed\n");
19406 + ret = -EINVAL;
19407 + goto done;
19408 + }
19409 +#if 1
19410 + //skip_host_crypt:
19411 + //printk("skip_host_crypt:ext_flags:%x\n", ext->ext_flags);
19412 + if (ext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY) {
19413 + ieee->tx_keyidx = idx;
19414 + sec.active_key = idx;
19415 + sec.flags |= SEC_ACTIVE_KEY;
19416 + }
19417 +
19418 + if (ext->alg != IW_ENCODE_ALG_NONE) {
19419 + //memcpy(sec.keys[idx], ext->key, ext->key_len);
19420 + sec.key_sizes[idx] = ext->key_len;
19421 + sec.flags |= (1 << idx);
19422 + if (ext->alg == IW_ENCODE_ALG_WEP) {
19423 + // sec.encode_alg[idx] = SEC_ALG_WEP;
19424 + sec.flags |= SEC_LEVEL;
19425 + sec.level = SEC_LEVEL_1;
19426 + } else if (ext->alg == IW_ENCODE_ALG_TKIP) {
19427 + // sec.encode_alg[idx] = SEC_ALG_TKIP;
19428 + sec.flags |= SEC_LEVEL;
19429 + sec.level = SEC_LEVEL_2;
19430 + } else if (ext->alg == IW_ENCODE_ALG_CCMP) {
19431 + // sec.encode_alg[idx] = SEC_ALG_CCMP;
19432 + sec.flags |= SEC_LEVEL;
19433 + sec.level = SEC_LEVEL_3;
19434 + }
19435 + /* Don't set sec level for group keys. */
19436 + if (group_key)
19437 + sec.flags &= ~SEC_LEVEL;
19438 + }
19439 +#endif
19440 +done:
19441 + if (ieee->set_security)
19442 + ieee->set_security(ieee->dev, &sec);
19443 +
19444 + if (ieee->reset_on_keychange &&
19445 + ieee->iw_mode != IW_MODE_INFRA &&
19446 + ieee->reset_port && ieee->reset_port(dev)) {
19447 + IEEE80211_DEBUG_WX("%s: reset_port failed\n", dev->name);
19448 + return -EINVAL;
19449 + }
19450 +#endif
19451 + return ret;
19452 +}
19453 +
19454 +int ieee80211_wx_get_encode_ext(struct ieee80211_device *ieee,
19455 + struct iw_request_info *info,
19456 + union iwreq_data *wrqu, char *extra)
19457 +{
19458 + struct iw_point *encoding = &wrqu->encoding;
19459 + struct iw_encode_ext *ext = (struct iw_encode_ext *)extra;
19460 + struct ieee80211_crypt_data *crypt;
19461 + int idx, max_key_len;
19462 +
19463 + max_key_len = encoding->length - sizeof(*ext);
19464 + if (max_key_len < 0)
19465 + return -EINVAL;
19466 +
19467 + idx = encoding->flags & IW_ENCODE_INDEX;
19468 + if (idx) {
19469 + if (idx < 1 || idx > WEP_KEYS)
19470 + return -EINVAL;
19471 + idx--;
19472 + } else
19473 + idx = ieee->tx_keyidx;
19474 +
19475 + if (!ext->ext_flags & IW_ENCODE_EXT_GROUP_KEY &&
19476 + ext->alg != IW_ENCODE_ALG_WEP)
19477 + if (idx != 0 || ieee->iw_mode != IW_MODE_INFRA)
19478 + return -EINVAL;
19479 +
19480 + crypt = ieee->crypt[idx];
19481 + encoding->flags = idx + 1;
19482 + memset(ext, 0, sizeof(*ext));
19483 +
19484 + if (crypt == NULL || crypt->ops == NULL ) {
19485 + ext->alg = IW_ENCODE_ALG_NONE;
19486 + ext->key_len = 0;
19487 + encoding->flags |= IW_ENCODE_DISABLED;
19488 + } else {
19489 + if (strcmp(crypt->ops->name, "WEP") == 0 )
19490 + ext->alg = IW_ENCODE_ALG_WEP;
19491 + else if (strcmp(crypt->ops->name, "TKIP"))
19492 + ext->alg = IW_ENCODE_ALG_TKIP;
19493 + else if (strcmp(crypt->ops->name, "CCMP"))
19494 + ext->alg = IW_ENCODE_ALG_CCMP;
19495 + else
19496 + return -EINVAL;
19497 + ext->key_len = crypt->ops->get_key(ext->key, SCM_KEY_LEN, NULL, crypt->priv);
19498 + encoding->flags |= IW_ENCODE_ENABLED;
19499 + if (ext->key_len &&
19500 + (ext->alg == IW_ENCODE_ALG_TKIP ||
19501 + ext->alg == IW_ENCODE_ALG_CCMP))
19502 + ext->ext_flags |= IW_ENCODE_EXT_TX_SEQ_VALID;
19503 +
19504 + }
19505 +
19506 + return 0;
19507 +}
19508 +
19509 +int ieee80211_wx_set_mlme(struct ieee80211_device *ieee,
19510 + struct iw_request_info *info,
19511 + union iwreq_data *wrqu, char *extra)
19512 +{
19513 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
19514 + struct iw_mlme *mlme = (struct iw_mlme *) extra;
19515 + switch (mlme->cmd) {
19516 + case IW_MLME_DEAUTH:
19517 + case IW_MLME_DISASSOC:
19518 + ieee80211_disassociate(ieee);
19519 + break;
19520 + default:
19521 + return -EOPNOTSUPP;
19522 + }
19523 +#endif
19524 + return 0;
19525 +}
19526 +
19527 +int ieee80211_wx_set_auth(struct ieee80211_device *ieee,
19528 + struct iw_request_info *info,
19529 + struct iw_param *data, char *extra)
19530 +{
19531 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
19532 + switch (data->flags & IW_AUTH_INDEX) {
19533 + case IW_AUTH_WPA_VERSION:
19534 + /*need to support wpa2 here*/
19535 + //printk("wpa version:%x\n", data->value);
19536 + break;
19537 + case IW_AUTH_CIPHER_PAIRWISE:
19538 + case IW_AUTH_CIPHER_GROUP:
19539 + case IW_AUTH_KEY_MGMT:
19540 + /*
19541 + * * Host AP driver does not use these parameters and allows
19542 + * * wpa_supplicant to control them internally.
19543 + * */
19544 + break;
19545 + case IW_AUTH_TKIP_COUNTERMEASURES:
19546 + ieee->tkip_countermeasures = data->value;
19547 + break;
19548 + case IW_AUTH_DROP_UNENCRYPTED:
19549 + ieee->drop_unencrypted = data->value;
19550 + break;
19551 +
19552 + case IW_AUTH_80211_AUTH_ALG:
19553 + //printk("======>%s():data->value is %d\n",__FUNCTION__,data->value);
19554 + // ieee->open_wep = (data->value&IW_AUTH_ALG_OPEN_SYSTEM)?1:0;
19555 + if(data->value & IW_AUTH_ALG_SHARED_KEY){
19556 + ieee->open_wep = 0;
19557 + ieee->auth_mode = 1;
19558 + }
19559 + else if(data->value & IW_AUTH_ALG_OPEN_SYSTEM){
19560 + ieee->open_wep = 1;
19561 + ieee->auth_mode = 0;
19562 + }
19563 + else if(data->value & IW_AUTH_ALG_LEAP){
19564 + ieee->open_wep = 1;
19565 + ieee->auth_mode = 2;
19566 + //printk("hahahaa:LEAP\n");
19567 + }
19568 + else
19569 + return -EINVAL;
19570 + //printk("open_wep:%d\n", ieee->open_wep);
19571 + break;
19572 +
19573 +#if 1
19574 + case IW_AUTH_WPA_ENABLED:
19575 + ieee->wpa_enabled = (data->value)?1:0;
19576 + //printk("enalbe wpa:%d\n", ieee->wpa_enabled);
19577 + break;
19578 +
19579 +#endif
19580 + case IW_AUTH_RX_UNENCRYPTED_EAPOL:
19581 + ieee->ieee802_1x = data->value;
19582 + break;
19583 + case IW_AUTH_PRIVACY_INVOKED:
19584 + ieee->privacy_invoked = data->value;
19585 + break;
19586 + default:
19587 + return -EOPNOTSUPP;
19588 + }
19589 +#endif
19590 + return 0;
19591 +}
19592 +#endif
19593 +#if 1
19594 +int ieee80211_wx_set_gen_ie(struct ieee80211_device *ieee, u8 *ie, size_t len)
19595 +{
19596 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
19597 +#if 0
19598 + printk("====>%s()\n", __FUNCTION__);
19599 + {
19600 + int i;
19601 + for (i=0; i<len; i++)
19602 + printk("%2x ", ie[i]&0xff);
19603 + printk("\n");
19604 + }
19605 +#endif
19606 + u8 *buf;
19607 +
19608 + if (len>MAX_WPA_IE_LEN || (len && ie == NULL))
19609 + {
19610 + // printk("return error out, len:%d\n", len);
19611 + return -EINVAL;
19612 + }
19613 +
19614 +
19615 + if (len)
19616 + {
19617 + if (len != ie[1]+2)
19618 + {
19619 + printk("len:%d, ie:%d\n", len, ie[1]);
19620 + return -EINVAL;
19621 + }
19622 + buf = kmalloc(len, GFP_KERNEL);
19623 + if (buf == NULL)
19624 + return -ENOMEM;
19625 + memcpy(buf, ie, len);
19626 + kfree(ieee->wpa_ie);
19627 + ieee->wpa_ie = buf;
19628 + ieee->wpa_ie_len = len;
19629 + }
19630 + else{
19631 + if (ieee->wpa_ie)
19632 + kfree(ieee->wpa_ie);
19633 + ieee->wpa_ie = NULL;
19634 + ieee->wpa_ie_len = 0;
19635 + }
19636 +#endif
19637 + return 0;
19638 +
19639 +}
19640 +#endif
19641 +
19642 +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
19643 +//EXPORT_SYMBOL(ieee80211_wx_set_gen_ie);
19644 +#if (WIRELESS_EXT >= 18)
19645 +//EXPORT_SYMBOL(ieee80211_wx_set_mlme);
19646 +//EXPORT_SYMBOL(ieee80211_wx_set_auth);
19647 +//EXPORT_SYMBOL(ieee80211_wx_set_encode_ext);
19648 +//EXPORT_SYMBOL(ieee80211_wx_get_encode_ext);
19649 +#endif
19650 +//EXPORT_SYMBOL(ieee80211_wx_get_scan);
19651 +//EXPORT_SYMBOL(ieee80211_wx_set_encode);
19652 +//EXPORT_SYMBOL(ieee80211_wx_get_encode);
19653 +#else
19654 +//EXPORT_SYMBOL_NOVERS(ieee80211_wx_set_gen_ie);
19655 +//EXPORT_SYMBOL_NOVERS(ieee80211_wx_set_mlme);
19656 +//EXPORT_SYMBOL_NOVERS(ieee80211_wx_set_auth);
19657 +//EXPORT_SYMBOL_NOVERS(ieee80211_wx_set_encode_ext);
19658 +//EXPORT_SYMBOL_NOVERS(ieee80211_wx_get_scan);
19659 +//EXPORT_SYMBOL_NOVERS(ieee80211_wx_set_encode);
19660 +//EXPORT_SYMBOL_NOVERS(ieee80211_wx_get_encode);
19661 +#endif
19662 --- /dev/null
19663 +++ b/drivers/staging/rtl8192e/ieee80211/internal.h
19664 @@ -0,0 +1,115 @@
19665 +/*
19666 + * Cryptographic API.
19667 + *
19668 + * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
19669 + *
19670 + * This program is free software; you can redistribute it and/or modify it
19671 + * under the terms of the GNU General Public License as published by the Free
19672 + * Software Foundation; either version 2 of the License, or (at your option)
19673 + * any later version.
19674 + *
19675 + */
19676 +#ifndef _CRYPTO_INTERNAL_H
19677 +#define _CRYPTO_INTERNAL_H
19678 +
19679 +
19680 +//#include <linux/crypto.h>
19681 +#include "rtl_crypto.h"
19682 +#include <linux/mm.h>
19683 +#include <linux/highmem.h>
19684 +#include <linux/init.h>
19685 +#include <asm/hardirq.h>
19686 +#include <asm/softirq.h>
19687 +#include <asm/kmap_types.h>
19688 +
19689 +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,4,20))
19690 +#define list_for_each_entry(pos, head, member) \
19691 + for (pos = list_entry((head)->next, typeof(*pos), member), \
19692 + prefetch(pos->member.next); \
19693 + &pos->member != (head); \
19694 + pos = list_entry(pos->member.next, typeof(*pos), member), \
19695 + prefetch(pos->member.next))
19696 +
19697 +static inline void cond_resched(void)
19698 +{
19699 + if (need_resched()) {
19700 + set_current_state(TASK_RUNNING);
19701 + schedule();
19702 + }
19703 +}
19704 +#endif
19705 +
19706 +extern enum km_type crypto_km_types[];
19707 +
19708 +static inline enum km_type crypto_kmap_type(int out)
19709 +{
19710 + return crypto_km_types[(in_softirq() ? 2 : 0) + out];
19711 +}
19712 +
19713 +static inline void *crypto_kmap(struct page *page, int out)
19714 +{
19715 + return kmap_atomic(page, crypto_kmap_type(out));
19716 +}
19717 +
19718 +static inline void crypto_kunmap(void *vaddr, int out)
19719 +{
19720 + kunmap_atomic(vaddr, crypto_kmap_type(out));
19721 +}
19722 +
19723 +static inline void crypto_yield(struct crypto_tfm *tfm)
19724 +{
19725 + if (!in_softirq())
19726 + cond_resched();
19727 +}
19728 +
19729 +static inline void *crypto_tfm_ctx(struct crypto_tfm *tfm)
19730 +{
19731 + return (void *)&tfm[1];
19732 +}
19733 +
19734 +struct crypto_alg *crypto_alg_lookup(const char *name);
19735 +
19736 +#ifdef CONFIG_KMOD
19737 +void crypto_alg_autoload(const char *name);
19738 +struct crypto_alg *crypto_alg_mod_lookup(const char *name);
19739 +#else
19740 +static inline struct crypto_alg *crypto_alg_mod_lookup(const char *name)
19741 +{
19742 + return crypto_alg_lookup(name);
19743 +}
19744 +#endif
19745 +
19746 +#ifdef CONFIG_CRYPTO_HMAC
19747 +int crypto_alloc_hmac_block(struct crypto_tfm *tfm);
19748 +void crypto_free_hmac_block(struct crypto_tfm *tfm);
19749 +#else
19750 +static inline int crypto_alloc_hmac_block(struct crypto_tfm *tfm)
19751 +{
19752 + return 0;
19753 +}
19754 +
19755 +static inline void crypto_free_hmac_block(struct crypto_tfm *tfm)
19756 +{ }
19757 +#endif
19758 +
19759 +#ifdef CONFIG_PROC_FS
19760 +void __init crypto_init_proc(void);
19761 +#else
19762 +static inline void crypto_init_proc(void)
19763 +{ }
19764 +#endif
19765 +
19766 +int crypto_init_digest_flags(struct crypto_tfm *tfm, u32 flags);
19767 +int crypto_init_cipher_flags(struct crypto_tfm *tfm, u32 flags);
19768 +int crypto_init_compress_flags(struct crypto_tfm *tfm, u32 flags);
19769 +
19770 +int crypto_init_digest_ops(struct crypto_tfm *tfm);
19771 +int crypto_init_cipher_ops(struct crypto_tfm *tfm);
19772 +int crypto_init_compress_ops(struct crypto_tfm *tfm);
19773 +
19774 +void crypto_exit_digest_ops(struct crypto_tfm *tfm);
19775 +void crypto_exit_cipher_ops(struct crypto_tfm *tfm);
19776 +void crypto_exit_compress_ops(struct crypto_tfm *tfm);
19777 +
19778 +#endif /* _CRYPTO_INTERNAL_H */
19779 +
19780 --- /dev/null
19781 +++ b/drivers/staging/rtl8192e/ieee80211/kmap_types.h
19782 @@ -0,0 +1,20 @@
19783 +#ifndef __KMAP_TYPES_H
19784 +
19785 +#define __KMAP_TYPES_H
19786 +
19787 +
19788 +enum km_type {
19789 + KM_BOUNCE_READ,
19790 + KM_SKB_SUNRPC_DATA,
19791 + KM_SKB_DATA_SOFTIRQ,
19792 + KM_USER0,
19793 + KM_USER1,
19794 + KM_BH_IRQ,
19795 + KM_SOFTIRQ0,
19796 + KM_SOFTIRQ1,
19797 + KM_TYPE_NR
19798 +};
19799 +
19800 +#define _ASM_KMAP_TYPES_H
19801 +
19802 +#endif
19803 --- /dev/null
19804 +++ b/drivers/staging/rtl8192e/ieee80211/michael_mic.c
19805 @@ -0,0 +1,194 @@
19806 +/*
19807 + * Cryptographic API
19808 + *
19809 + * Michael MIC (IEEE 802.11i/TKIP) keyed digest
19810 + *
19811 + * Copyright (c) 2004 Jouni Malinen <jkmaline@cc.hut.fi>
19812 + *
19813 + * This program is free software; you can redistribute it and/or modify
19814 + * it under the terms of the GNU General Public License version 2 as
19815 + * published by the Free Software Foundation.
19816 + */
19817 +
19818 +#include <linux/init.h>
19819 +#include <linux/module.h>
19820 +#include <linux/string.h>
19821 +//#include <linux/crypto.h>
19822 +#include "rtl_crypto.h"
19823 +
19824 +
19825 +struct michael_mic_ctx {
19826 + u8 pending[4];
19827 + size_t pending_len;
19828 +
19829 + u32 l, r;
19830 +};
19831 +
19832 +
19833 +static inline u32 rotl(u32 val, int bits)
19834 +{
19835 + return (val << bits) | (val >> (32 - bits));
19836 +}
19837 +
19838 +
19839 +static inline u32 rotr(u32 val, int bits)
19840 +{
19841 + return (val >> bits) | (val << (32 - bits));
19842 +}
19843 +
19844 +
19845 +static inline u32 xswap(u32 val)
19846 +{
19847 + return ((val & 0x00ff00ff) << 8) | ((val & 0xff00ff00) >> 8);
19848 +}
19849 +
19850 +
19851 +#define michael_block(l, r) \
19852 +do { \
19853 + r ^= rotl(l, 17); \
19854 + l += r; \
19855 + r ^= xswap(l); \
19856 + l += r; \
19857 + r ^= rotl(l, 3); \
19858 + l += r; \
19859 + r ^= rotr(l, 2); \
19860 + l += r; \
19861 +} while (0)
19862 +
19863 +
19864 +static inline u32 get_le32(const u8 *p)
19865 +{
19866 + return p[0] | (p[1] << 8) | (p[2] << 16) | (p[3] << 24);
19867 +}
19868 +
19869 +
19870 +static inline void put_le32(u8 *p, u32 v)
19871 +{
19872 + p[0] = v;
19873 + p[1] = v >> 8;
19874 + p[2] = v >> 16;
19875 + p[3] = v >> 24;
19876 +}
19877 +
19878 +
19879 +static void michael_init(void *ctx)
19880 +{
19881 + struct michael_mic_ctx *mctx = ctx;
19882 + mctx->pending_len = 0;
19883 +}
19884 +
19885 +
19886 +static void michael_update(void *ctx, const u8 *data, unsigned int len)
19887 +{
19888 + struct michael_mic_ctx *mctx = ctx;
19889 +
19890 + if (mctx->pending_len) {
19891 + int flen = 4 - mctx->pending_len;
19892 + if (flen > len)
19893 + flen = len;
19894 + memcpy(&mctx->pending[mctx->pending_len], data, flen);
19895 + mctx->pending_len += flen;
19896 + data += flen;
19897 + len -= flen;
19898 +
19899 + if (mctx->pending_len < 4)
19900 + return;
19901 +
19902 + mctx->l ^= get_le32(mctx->pending);
19903 + michael_block(mctx->l, mctx->r);
19904 + mctx->pending_len = 0;
19905 + }
19906 +
19907 + while (len >= 4) {
19908 + mctx->l ^= get_le32(data);
19909 + michael_block(mctx->l, mctx->r);
19910 + data += 4;
19911 + len -= 4;
19912 + }
19913 +
19914 + if (len > 0) {
19915 + mctx->pending_len = len;
19916 + memcpy(mctx->pending, data, len);
19917 + }
19918 +}
19919 +
19920 +
19921 +static void michael_final(void *ctx, u8 *out)
19922 +{
19923 + struct michael_mic_ctx *mctx = ctx;
19924 + u8 *data = mctx->pending;
19925 +
19926 + /* Last block and padding (0x5a, 4..7 x 0) */
19927 + switch (mctx->pending_len) {
19928 + case 0:
19929 + mctx->l ^= 0x5a;
19930 + break;
19931 + case 1:
19932 + mctx->l ^= data[0] | 0x5a00;
19933 + break;
19934 + case 2:
19935 + mctx->l ^= data[0] | (data[1] << 8) | 0x5a0000;
19936 + break;
19937 + case 3:
19938 + mctx->l ^= data[0] | (data[1] << 8) | (data[2] << 16) |
19939 + 0x5a000000;
19940 + break;
19941 + }
19942 + michael_block(mctx->l, mctx->r);
19943 + /* l ^= 0; */
19944 + michael_block(mctx->l, mctx->r);
19945 +
19946 + put_le32(out, mctx->l);
19947 + put_le32(out + 4, mctx->r);
19948 +}
19949 +
19950 +
19951 +static int michael_setkey(void *ctx, const u8 *key, unsigned int keylen,
19952 + u32 *flags)
19953 +{
19954 + struct michael_mic_ctx *mctx = ctx;
19955 + if (keylen != 8) {
19956 + if (flags)
19957 + *flags = CRYPTO_TFM_RES_BAD_KEY_LEN;
19958 + return -EINVAL;
19959 + }
19960 + mctx->l = get_le32(key);
19961 + mctx->r = get_le32(key + 4);
19962 + return 0;
19963 +}
19964 +
19965 +
19966 +static struct crypto_alg michael_mic_alg = {
19967 + .cra_name = "michael_mic",
19968 + .cra_flags = CRYPTO_ALG_TYPE_DIGEST,
19969 + .cra_blocksize = 8,
19970 + .cra_ctxsize = sizeof(struct michael_mic_ctx),
19971 + .cra_module = THIS_MODULE,
19972 + .cra_list = LIST_HEAD_INIT(michael_mic_alg.cra_list),
19973 + .cra_u = { .digest = {
19974 + .dia_digestsize = 8,
19975 + .dia_init = michael_init,
19976 + .dia_update = michael_update,
19977 + .dia_final = michael_final,
19978 + .dia_setkey = michael_setkey } }
19979 +};
19980 +
19981 +
19982 +static int __init michael_mic_init(void)
19983 +{
19984 + return crypto_register_alg(&michael_mic_alg);
19985 +}
19986 +
19987 +
19988 +static void __exit michael_mic_exit(void)
19989 +{
19990 + crypto_unregister_alg(&michael_mic_alg);
19991 +}
19992 +
19993 +
19994 +module_init(michael_mic_init);
19995 +module_exit(michael_mic_exit);
19996 +
19997 +MODULE_LICENSE("GPL v2");
19998 +MODULE_DESCRIPTION("Michael MIC");
19999 +MODULE_AUTHOR("Jouni Malinen <jkmaline@cc.hut.fi>");
20000 --- /dev/null
20001 +++ b/drivers/staging/rtl8192e/ieee80211/proc.c
20002 @@ -0,0 +1,116 @@
20003 +/*
20004 + * Scatterlist Cryptographic API.
20005 + *
20006 + * Procfs information.
20007 + *
20008 + * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
20009 + *
20010 + * This program is free software; you can redistribute it and/or modify it
20011 + * under the terms of the GNU General Public License as published by the Free
20012 + * Software Foundation; either version 2 of the License, or (at your option)
20013 + * any later version.
20014 + *
20015 + */
20016 +#include <linux/init.h>
20017 +//#include <linux/crypto.h>
20018 +#include "rtl_crypto.h"
20019 +#include <linux/rwsem.h>
20020 +#include <linux/proc_fs.h>
20021 +#include <linux/seq_file.h>
20022 +#include "internal.h"
20023 +
20024 +extern struct list_head crypto_alg_list;
20025 +extern struct rw_semaphore crypto_alg_sem;
20026 +
20027 +static void *c_start(struct seq_file *m, loff_t *pos)
20028 +{
20029 + struct list_head *v;
20030 + loff_t n = *pos;
20031 +
20032 + down_read(&crypto_alg_sem);
20033 + list_for_each(v, &crypto_alg_list)
20034 + if (!n--)
20035 + return list_entry(v, struct crypto_alg, cra_list);
20036 + return NULL;
20037 +}
20038 +
20039 +static void *c_next(struct seq_file *m, void *p, loff_t *pos)
20040 +{
20041 + struct list_head *v = p;
20042 +
20043 + (*pos)++;
20044 + v = v->next;
20045 + return (v == &crypto_alg_list) ?
20046 + NULL : list_entry(v, struct crypto_alg, cra_list);
20047 +}
20048 +
20049 +static void c_stop(struct seq_file *m, void *p)
20050 +{
20051 + up_read(&crypto_alg_sem);
20052 +}
20053 +
20054 +static int c_show(struct seq_file *m, void *p)
20055 +{
20056 + struct crypto_alg *alg = (struct crypto_alg *)p;
20057 +
20058 + seq_printf(m, "name : %s\n", alg->cra_name);
20059 + seq_printf(m, "module : %s\n",
20060 + (alg->cra_module ?
20061 + alg->cra_module->name :
20062 + "kernel"));
20063 +
20064 + switch (alg->cra_flags & CRYPTO_ALG_TYPE_MASK) {
20065 + case CRYPTO_ALG_TYPE_CIPHER:
20066 + seq_printf(m, "type : cipher\n");
20067 + seq_printf(m, "blocksize : %u\n", alg->cra_blocksize);
20068 + seq_printf(m, "min keysize : %u\n",
20069 + alg->cra_cipher.cia_min_keysize);
20070 + seq_printf(m, "max keysize : %u\n",
20071 + alg->cra_cipher.cia_max_keysize);
20072 + break;
20073 +
20074 + case CRYPTO_ALG_TYPE_DIGEST:
20075 + seq_printf(m, "type : digest\n");
20076 + seq_printf(m, "blocksize : %u\n", alg->cra_blocksize);
20077 + seq_printf(m, "digestsize : %u\n",
20078 + alg->cra_digest.dia_digestsize);
20079 + break;
20080 + case CRYPTO_ALG_TYPE_COMPRESS:
20081 + seq_printf(m, "type : compression\n");
20082 + break;
20083 + default:
20084 + seq_printf(m, "type : unknown\n");
20085 + break;
20086 + }
20087 +
20088 + seq_putc(m, '\n');
20089 + return 0;
20090 +}
20091 +
20092 +static struct seq_operations crypto_seq_ops = {
20093 + .start = c_start,
20094 + .next = c_next,
20095 + .stop = c_stop,
20096 + .show = c_show
20097 +};
20098 +
20099 +static int crypto_info_open(struct inode *inode, struct file *file)
20100 +{
20101 + return seq_open(file, &crypto_seq_ops);
20102 +}
20103 +
20104 +static struct file_operations proc_crypto_ops = {
20105 + .open = crypto_info_open,
20106 + .read = seq_read,
20107 + .llseek = seq_lseek,
20108 + .release = seq_release
20109 +};
20110 +
20111 +void __init crypto_init_proc(void)
20112 +{
20113 + struct proc_dir_entry *proc;
20114 +
20115 + proc = create_proc_entry("crypto", 0, NULL);
20116 + if (proc)
20117 + proc->proc_fops = &proc_crypto_ops;
20118 +}
20119 --- /dev/null
20120 +++ b/drivers/staging/rtl8192e/ieee80211/rtl819x_BA.h
20121 @@ -0,0 +1,69 @@
20122 +#ifndef _BATYPE_H_
20123 +#define _BATYPE_H_
20124 +
20125 +#define TOTAL_TXBA_NUM 16
20126 +#define TOTAL_RXBA_NUM 16
20127 +
20128 +#define BA_SETUP_TIMEOUT 200
20129 +#define BA_INACT_TIMEOUT 60000
20130 +
20131 +#define BA_POLICY_DELAYED 0
20132 +#define BA_POLICY_IMMEDIATE 1
20133 +
20134 +#define ADDBA_STATUS_SUCCESS 0
20135 +#define ADDBA_STATUS_REFUSED 37
20136 +#define ADDBA_STATUS_INVALID_PARAM 38
20137 +
20138 +#define DELBA_REASON_QSTA_LEAVING 36
20139 +#define DELBA_REASON_END_BA 37
20140 +#define DELBA_REASON_UNKNOWN_BA 38
20141 +#define DELBA_REASON_TIMEOUT 39
20142 +/* whether need define BA Action frames here?
20143 +struct ieee80211_ADDBA_Req{
20144 + struct ieee80211_header_data header;
20145 + u8 category;
20146 + u8
20147 +} __attribute__ ((packed));
20148 +*/
20149 +//Is this need?I put here just to make it easier to define structure BA_RECORD //WB
20150 +typedef union _SEQUENCE_CONTROL{
20151 + u16 ShortData;
20152 + struct
20153 + {
20154 + u16 FragNum:4;
20155 + u16 SeqNum:12;
20156 + }field;
20157 +}SEQUENCE_CONTROL, *PSEQUENCE_CONTROL;
20158 +
20159 +typedef union _BA_PARAM_SET {
20160 + u8 charData[2];
20161 + u16 shortData;
20162 + struct {
20163 + u16 AMSDU_Support:1;
20164 + u16 BAPolicy:1;
20165 + u16 TID:4;
20166 + u16 BufferSize:10;
20167 + } field;
20168 +} BA_PARAM_SET, *PBA_PARAM_SET;
20169 +
20170 +typedef union _DELBA_PARAM_SET {
20171 + u8 charData[2];
20172 + u16 shortData;
20173 + struct {
20174 + u16 Reserved:11;
20175 + u16 Initiator:1;
20176 + u16 TID:4;
20177 + } field;
20178 +} DELBA_PARAM_SET, *PDELBA_PARAM_SET;
20179 +
20180 +typedef struct _BA_RECORD {
20181 + struct timer_list Timer;
20182 + u8 bValid;
20183 + u8 DialogToken;
20184 + BA_PARAM_SET BaParamSet;
20185 + u16 BaTimeoutValue;
20186 + SEQUENCE_CONTROL BaStartSeqCtrl;
20187 +} BA_RECORD, *PBA_RECORD;
20188 +
20189 +#endif //end _BATYPE_H_
20190 +
20191 --- /dev/null
20192 +++ b/drivers/staging/rtl8192e/ieee80211/rtl819x_BAProc.c
20193 @@ -0,0 +1,779 @@
20194 +/********************************************************************************************************************************
20195 + * This file is created to process BA Action Frame. According to 802.11 spec, there are 3 BA action types at all. And as BA is
20196 + * related to TS, this part need some struture defined in QOS side code. Also TX RX is going to be resturctured, so how to send
20197 + * ADDBAREQ ADDBARSP and DELBA packet is still on consideration. Temporarily use MANAGE QUEUE instead of Normal Queue.
20198 + * WB 2008-05-27
20199 + * *****************************************************************************************************************************/
20200 +#include "ieee80211.h"
20201 +#include "rtl819x_BA.h"
20202 +
20203 +/********************************************************************************************************************
20204 + *function: Activate BA entry. And if Time is nozero, start timer.
20205 + * input: PBA_RECORD pBA //BA entry to be enabled
20206 + * u16 Time //indicate time delay.
20207 + * output: none
20208 +********************************************************************************************************************/
20209 +void ActivateBAEntry(struct ieee80211_device* ieee, PBA_RECORD pBA, u16 Time)
20210 +{
20211 + pBA->bValid = true;
20212 + if(Time != 0)
20213 + mod_timer(&pBA->Timer, jiffies + MSECS(Time));
20214 +}
20215 +
20216 +/********************************************************************************************************************
20217 + *function: deactivate BA entry, including its timer.
20218 + * input: PBA_RECORD pBA //BA entry to be disabled
20219 + * output: none
20220 +********************************************************************************************************************/
20221 +void DeActivateBAEntry( struct ieee80211_device* ieee, PBA_RECORD pBA)
20222 +{
20223 + pBA->bValid = false;
20224 + del_timer_sync(&pBA->Timer);
20225 +}
20226 +/********************************************************************************************************************
20227 + *function: deactivete BA entry in Tx Ts, and send DELBA.
20228 + * input:
20229 + * PTX_TS_RECORD pTxTs //Tx Ts which is to deactivate BA entry.
20230 + * output: none
20231 + * notice: As PTX_TS_RECORD structure will be defined in QOS, so wait to be merged. //FIXME
20232 +********************************************************************************************************************/
20233 +u8 TxTsDeleteBA( struct ieee80211_device* ieee, PTX_TS_RECORD pTxTs)
20234 +{
20235 + PBA_RECORD pAdmittedBa = &pTxTs->TxAdmittedBARecord; //These two BA entries must exist in TS structure
20236 + PBA_RECORD pPendingBa = &pTxTs->TxPendingBARecord;
20237 + u8 bSendDELBA = false;
20238 +
20239 + // Delete pending BA
20240 + if(pPendingBa->bValid)
20241 + {
20242 + DeActivateBAEntry(ieee, pPendingBa);
20243 + bSendDELBA = true;
20244 + }
20245 +
20246 + // Delete admitted BA
20247 + if(pAdmittedBa->bValid)
20248 + {
20249 + DeActivateBAEntry(ieee, pAdmittedBa);
20250 + bSendDELBA = true;
20251 + }
20252 +
20253 + return bSendDELBA;
20254 +}
20255 +
20256 +/********************************************************************************************************************
20257 + *function: deactivete BA entry in Tx Ts, and send DELBA.
20258 + * input:
20259 + * PRX_TS_RECORD pRxTs //Rx Ts which is to deactivate BA entry.
20260 + * output: none
20261 + * notice: As PRX_TS_RECORD structure will be defined in QOS, so wait to be merged. //FIXME, same with above
20262 +********************************************************************************************************************/
20263 +u8 RxTsDeleteBA( struct ieee80211_device* ieee, PRX_TS_RECORD pRxTs)
20264 +{
20265 + PBA_RECORD pBa = &pRxTs->RxAdmittedBARecord;
20266 + u8 bSendDELBA = false;
20267 +
20268 + if(pBa->bValid)
20269 + {
20270 + DeActivateBAEntry(ieee, pBa);
20271 + bSendDELBA = true;
20272 + }
20273 +
20274 + return bSendDELBA;
20275 +}
20276 +
20277 +/********************************************************************************************************************
20278 + *function: reset BA entry
20279 + * input:
20280 + * PBA_RECORD pBA //entry to be reset
20281 + * output: none
20282 +********************************************************************************************************************/
20283 +void ResetBaEntry( PBA_RECORD pBA)
20284 +{
20285 + pBA->bValid = false;
20286 + pBA->BaParamSet.shortData = 0;
20287 + pBA->BaTimeoutValue = 0;
20288 + pBA->DialogToken = 0;
20289 + pBA->BaStartSeqCtrl.ShortData = 0;
20290 +}
20291 +//These functions need porting here or not?
20292 +/*******************************************************************************************************************************
20293 + *function: construct ADDBAREQ and ADDBARSP frame here together.
20294 + * input: u8* Dst //ADDBA frame's destination
20295 + * PBA_RECORD pBA //BA_RECORD entry which stores the necessary information for BA.
20296 + * u16 StatusCode //status code in RSP and I will use it to indicate whether it's RSP or REQ(will I?)
20297 + * u8 type //indicate whether it's RSP(ACT_ADDBARSP) ow REQ(ACT_ADDBAREQ)
20298 + * output: none
20299 + * return: sk_buff* skb //return constructed skb to xmit
20300 +*******************************************************************************************************************************/
20301 +static struct sk_buff* ieee80211_ADDBA(struct ieee80211_device* ieee, u8* Dst, PBA_RECORD pBA, u16 StatusCode, u8 type)
20302 +{
20303 + struct sk_buff *skb = NULL;
20304 + struct ieee80211_hdr_3addr* BAReq = NULL;
20305 + u8* tag = NULL;
20306 + u16 tmp = 0;
20307 + u16 len = ieee->tx_headroom + 9;
20308 + //category(1) + action field(1) + Dialog Token(1) + BA Parameter Set(2) + BA Timeout Value(2) + BA Start SeqCtrl(2)(or StatusCode(2))
20309 + IEEE80211_DEBUG(IEEE80211_DL_TRACE | IEEE80211_DL_BA, "========>%s(), frame(%d) sentd to:"MAC_FMT", ieee->dev:%p\n", __FUNCTION__, type, MAC_ARG(Dst), ieee->dev);
20310 + if (pBA == NULL||ieee == NULL)
20311 + {
20312 + IEEE80211_DEBUG(IEEE80211_DL_ERR, "pBA(%p) is NULL or ieee(%p) is NULL\n", pBA, ieee);
20313 + return NULL;
20314 + }
20315 + skb = dev_alloc_skb(len + sizeof( struct ieee80211_hdr_3addr)); //need to add something others? FIXME
20316 + if (skb == NULL)
20317 + {
20318 + IEEE80211_DEBUG(IEEE80211_DL_ERR, "can't alloc skb for ADDBA_REQ\n");
20319 + return NULL;
20320 + }
20321 +
20322 + memset(skb->data, 0, sizeof( struct ieee80211_hdr_3addr)); //I wonder whether it's necessary. Apparently kernel will not do it when alloc a skb.
20323 + skb_reserve(skb, ieee->tx_headroom);
20324 +
20325 + BAReq = ( struct ieee80211_hdr_3addr *) skb_put(skb,sizeof( struct ieee80211_hdr_3addr));
20326 +
20327 + memcpy(BAReq->addr1, Dst, ETH_ALEN);
20328 + memcpy(BAReq->addr2, ieee->dev->dev_addr, ETH_ALEN);
20329 +
20330 + memcpy(BAReq->addr3, ieee->current_network.bssid, ETH_ALEN);
20331 +
20332 + BAReq->frame_ctl = cpu_to_le16(IEEE80211_STYPE_MANAGE_ACT); //action frame
20333 +
20334 + //tag += sizeof( struct ieee80211_hdr_3addr); //move to action field
20335 + tag = (u8*)skb_put(skb, 9);
20336 + *tag ++= ACT_CAT_BA;
20337 + *tag ++= type;
20338 + // Dialog Token
20339 + *tag ++= pBA->DialogToken;
20340 +
20341 + if (ACT_ADDBARSP == type)
20342 + {
20343 + // Status Code
20344 + printk("=====>to send ADDBARSP\n");
20345 + tmp = cpu_to_le16(StatusCode);
20346 + memcpy(tag, (u8*)&tmp, 2);
20347 + tag += 2;
20348 + }
20349 + // BA Parameter Set
20350 + tmp = cpu_to_le16(pBA->BaParamSet.shortData);
20351 + memcpy(tag, (u8*)&tmp, 2);
20352 + tag += 2;
20353 + // BA Timeout Value
20354 + tmp = cpu_to_le16(pBA->BaTimeoutValue);
20355 + memcpy(tag, (u8*)&tmp, 2);
20356 + tag += 2;
20357 +
20358 + if (ACT_ADDBAREQ == type)
20359 + {
20360 + // BA Start SeqCtrl
20361 + memcpy(tag,(u8*)&(pBA->BaStartSeqCtrl), 2);
20362 + tag += 2;
20363 + }
20364 +
20365 + IEEE80211_DEBUG_DATA(IEEE80211_DL_DATA|IEEE80211_DL_BA, skb->data, skb->len);
20366 + return skb;
20367 + //return NULL;
20368 +}
20369 +
20370 +#if 0 //I try to merge ADDBA_REQ and ADDBA_RSP frames together..
20371 +/********************************************************************************************************************
20372 + *function: construct ADDBAREQ frame
20373 + * input: u8* dst //ADDBARsp frame's destination
20374 + * PBA_RECORD pBA //BA_RECORD entry which stores the necessary information for BA_RSP.
20375 + * u16 StatusCode //status code.
20376 + * output: none
20377 + * return: sk_buff* skb //return constructed skb to xmit
20378 +********************************************************************************************************************/
20379 +static struct sk_buff* ieee80211_ADDBA_Rsp( IN struct ieee80211_device* ieee, u8* dst, PBA_RECORD pBA, u16 StatusCode)
20380 +{
20381 + OCTET_STRING osADDBAFrame, tmp;
20382 +
20383 + FillOctetString(osADDBAFrame, Buffer, 0);
20384 + *pLength = 0;
20385 +
20386 + ConstructMaFrameHdr(
20387 + Adapter,
20388 + Addr,
20389 + ACT_CAT_BA,
20390 + ACT_ADDBARSP,
20391 + &osADDBAFrame );
20392 +
20393 + // Dialog Token
20394 + FillOctetString(tmp, &pBA->DialogToken, 1);
20395 + PacketAppendData(&osADDBAFrame, tmp);
20396 +
20397 + // Status Code
20398 + FillOctetString(tmp, &StatusCode, 2);
20399 + PacketAppendData(&osADDBAFrame, tmp);
20400 +
20401 + // BA Parameter Set
20402 + FillOctetString(tmp, &pBA->BaParamSet, 2);
20403 + PacketAppendData(&osADDBAFrame, tmp);
20404 +
20405 + // BA Timeout Value
20406 + FillOctetString(tmp, &pBA->BaTimeoutValue, 2);
20407 + PacketAppendData(&osADDBAFrame, tmp);
20408 +
20409 + *pLength = osADDBAFrame.Length;
20410 +}
20411 +#endif
20412 +
20413 +/********************************************************************************************************************
20414 + *function: construct DELBA frame
20415 + * input: u8* dst //DELBA frame's destination
20416 + * PBA_RECORD pBA //BA_RECORD entry which stores the necessary information for BA
20417 + * TR_SELECT TxRxSelect //TX RX direction
20418 + * u16 ReasonCode //status code.
20419 + * output: none
20420 + * return: sk_buff* skb //return constructed skb to xmit
20421 +********************************************************************************************************************/
20422 +static struct sk_buff* ieee80211_DELBA(
20423 + struct ieee80211_device* ieee,
20424 + u8* dst,
20425 + PBA_RECORD pBA,
20426 + TR_SELECT TxRxSelect,
20427 + u16 ReasonCode
20428 + )
20429 +{
20430 + DELBA_PARAM_SET DelbaParamSet;
20431 + struct sk_buff *skb = NULL;
20432 + struct ieee80211_hdr_3addr* Delba = NULL;
20433 + u8* tag = NULL;
20434 + u16 tmp = 0;
20435 + //len = head len + DELBA Parameter Set(2) + Reason Code(2)
20436 + u16 len = 6 + ieee->tx_headroom;
20437 +
20438 + if (net_ratelimit())
20439 + IEEE80211_DEBUG(IEEE80211_DL_TRACE | IEEE80211_DL_BA, "========>%s(), ReasonCode(%d) sentd to:"MAC_FMT"\n", __FUNCTION__, ReasonCode, MAC_ARG(dst));
20440 +
20441 + memset(&DelbaParamSet, 0, 2);
20442 +
20443 + DelbaParamSet.field.Initiator = (TxRxSelect==TX_DIR)?1:0;
20444 + DelbaParamSet.field.TID = pBA->BaParamSet.field.TID;
20445 +
20446 + skb = dev_alloc_skb(len + sizeof( struct ieee80211_hdr_3addr)); //need to add something others? FIXME
20447 + if (skb == NULL)
20448 + {
20449 + IEEE80211_DEBUG(IEEE80211_DL_ERR, "can't alloc skb for ADDBA_REQ\n");
20450 + return NULL;
20451 + }
20452 +// memset(skb->data, 0, len+sizeof( struct ieee80211_hdr_3addr));
20453 + skb_reserve(skb, ieee->tx_headroom);
20454 +
20455 + Delba = ( struct ieee80211_hdr_3addr *) skb_put(skb,sizeof( struct ieee80211_hdr_3addr));
20456 +
20457 + memcpy(Delba->addr1, dst, ETH_ALEN);
20458 + memcpy(Delba->addr2, ieee->dev->dev_addr, ETH_ALEN);
20459 + memcpy(Delba->addr3, ieee->current_network.bssid, ETH_ALEN);
20460 + Delba->frame_ctl = cpu_to_le16(IEEE80211_STYPE_MANAGE_ACT); //action frame
20461 +
20462 + tag = (u8*)skb_put(skb, 6);
20463 +
20464 + *tag ++= ACT_CAT_BA;
20465 + *tag ++= ACT_DELBA;
20466 +
20467 + // DELBA Parameter Set
20468 + tmp = cpu_to_le16(DelbaParamSet.shortData);
20469 + memcpy(tag, (u8*)&tmp, 2);
20470 + tag += 2;
20471 + // Reason Code
20472 + tmp = cpu_to_le16(ReasonCode);
20473 + memcpy(tag, (u8*)&tmp, 2);
20474 + tag += 2;
20475 +
20476 + IEEE80211_DEBUG_DATA(IEEE80211_DL_DATA|IEEE80211_DL_BA, skb->data, skb->len);
20477 + if (net_ratelimit())
20478 + IEEE80211_DEBUG(IEEE80211_DL_TRACE | IEEE80211_DL_BA, "<=====%s()\n", __FUNCTION__);
20479 + return skb;
20480 +}
20481 +
20482 +/********************************************************************************************************************
20483 + *function: send ADDBAReq frame out
20484 + * input: u8* dst //ADDBAReq frame's destination
20485 + * PBA_RECORD pBA //BA_RECORD entry which stores the necessary information for BA
20486 + * output: none
20487 + * notice: If any possible, please hide pBA in ieee. And temporarily use Manage Queue as softmac_mgmt_xmit() usually does
20488 +********************************************************************************************************************/
20489 +void ieee80211_send_ADDBAReq(struct ieee80211_device* ieee, u8* dst, PBA_RECORD pBA)
20490 +{
20491 + struct sk_buff *skb = NULL;
20492 + skb = ieee80211_ADDBA(ieee, dst, pBA, 0, ACT_ADDBAREQ); //construct ACT_ADDBAREQ frames so set statuscode zero.
20493 +
20494 + if (skb)
20495 + {
20496 + softmac_mgmt_xmit(skb, ieee);
20497 + //add statistic needed here.
20498 + //and skb will be freed in softmac_mgmt_xmit(), so omit all dev_kfree_skb_any() outside softmac_mgmt_xmit()
20499 + //WB
20500 + }
20501 + else
20502 + {
20503 + IEEE80211_DEBUG(IEEE80211_DL_ERR, "alloc skb error in function %s()\n", __FUNCTION__);
20504 + }
20505 + return;
20506 +}
20507 +
20508 +/********************************************************************************************************************
20509 + *function: send ADDBARSP frame out
20510 + * input: u8* dst //DELBA frame's destination
20511 + * PBA_RECORD pBA //BA_RECORD entry which stores the necessary information for BA
20512 + * u16 StatusCode //RSP StatusCode
20513 + * output: none
20514 + * notice: If any possible, please hide pBA in ieee. And temporarily use Manage Queue as softmac_mgmt_xmit() usually does
20515 +********************************************************************************************************************/
20516 +void ieee80211_send_ADDBARsp(struct ieee80211_device* ieee, u8* dst, PBA_RECORD pBA, u16 StatusCode)
20517 +{
20518 + struct sk_buff *skb = NULL;
20519 + skb = ieee80211_ADDBA(ieee, dst, pBA, StatusCode, ACT_ADDBARSP); //construct ACT_ADDBARSP frames
20520 + if (skb)
20521 + {
20522 + softmac_mgmt_xmit(skb, ieee);
20523 + //same above
20524 + }
20525 + else
20526 + {
20527 + IEEE80211_DEBUG(IEEE80211_DL_ERR, "alloc skb error in function %s()\n", __FUNCTION__);
20528 + }
20529 +
20530 + return;
20531 +
20532 +}
20533 +/********************************************************************************************************************
20534 + *function: send ADDBARSP frame out
20535 + * input: u8* dst //DELBA frame's destination
20536 + * PBA_RECORD pBA //BA_RECORD entry which stores the necessary information for BA
20537 + * TR_SELECT TxRxSelect //TX or RX
20538 + * u16 ReasonCode //DEL ReasonCode
20539 + * output: none
20540 + * notice: If any possible, please hide pBA in ieee. And temporarily use Manage Queue as softmac_mgmt_xmit() usually does
20541 +********************************************************************************************************************/
20542 +
20543 +void ieee80211_send_DELBA(struct ieee80211_device* ieee, u8* dst, PBA_RECORD pBA, TR_SELECT TxRxSelect, u16 ReasonCode)
20544 +{
20545 + struct sk_buff *skb = NULL;
20546 + skb = ieee80211_DELBA(ieee, dst, pBA, TxRxSelect, ReasonCode); //construct ACT_ADDBARSP frames
20547 + if (skb)
20548 + {
20549 + softmac_mgmt_xmit(skb, ieee);
20550 + //same above
20551 + }
20552 + else
20553 + {
20554 + IEEE80211_DEBUG(IEEE80211_DL_ERR, "alloc skb error in function %s()\n", __FUNCTION__);
20555 + }
20556 + return ;
20557 +}
20558 +
20559 +/********************************************************************************************************************
20560 + *function: RX ADDBAReq
20561 + * input: struct sk_buff * skb //incoming ADDBAReq skb.
20562 + * return: 0(pass), other(fail)
20563 + * notice: As this function need support of QOS, I comment some code out. And when qos is ready, this code need to be support.
20564 +********************************************************************************************************************/
20565 +int ieee80211_rx_ADDBAReq( struct ieee80211_device* ieee, struct sk_buff *skb)
20566 +{
20567 + struct ieee80211_hdr_3addr* req = NULL;
20568 + u16 rc = 0;
20569 + u8 * dst = NULL, *pDialogToken = NULL, *tag = NULL;
20570 + PBA_RECORD pBA = NULL;
20571 + PBA_PARAM_SET pBaParamSet = NULL;
20572 + u16* pBaTimeoutVal = NULL;
20573 + PSEQUENCE_CONTROL pBaStartSeqCtrl = NULL;
20574 + PRX_TS_RECORD pTS = NULL;
20575 +
20576 + if (skb->len < sizeof( struct ieee80211_hdr_3addr) + 9)
20577 + {
20578 + IEEE80211_DEBUG(IEEE80211_DL_ERR, " Invalid skb len in BAREQ(%d / %d)\n", skb->len, (sizeof( struct ieee80211_hdr_3addr) + 9));
20579 + return -1;
20580 + }
20581 +
20582 + IEEE80211_DEBUG_DATA(IEEE80211_DL_DATA|IEEE80211_DL_BA, skb->data, skb->len);
20583 +
20584 + req = ( struct ieee80211_hdr_3addr*) skb->data;
20585 + tag = (u8*)req;
20586 + dst = (u8*)(&req->addr2[0]);
20587 + tag += sizeof( struct ieee80211_hdr_3addr);
20588 + pDialogToken = tag + 2; //category+action
20589 + pBaParamSet = (PBA_PARAM_SET)(tag + 3); //+DialogToken
20590 + pBaTimeoutVal = (u16*)(tag + 5);
20591 + pBaStartSeqCtrl = (PSEQUENCE_CONTROL)(req + 7);
20592 +
20593 + printk("====================>rx ADDBAREQ from :"MAC_FMT"\n", MAC_ARG(dst));
20594 +//some other capability is not ready now.
20595 + if( (ieee->current_network.qos_data.active == 0) ||
20596 + (ieee->pHTInfo->bCurrentHTSupport == false)) //||
20597 + // (ieee->pStaQos->bEnableRxImmBA == false) )
20598 + {
20599 + rc = ADDBA_STATUS_REFUSED;
20600 + IEEE80211_DEBUG(IEEE80211_DL_ERR, "Failed to reply on ADDBA_REQ as some capability is not ready(%d, %d)\n", ieee->current_network.qos_data.active, ieee->pHTInfo->bCurrentHTSupport);
20601 + goto OnADDBAReq_Fail;
20602 + }
20603 + // Search for related traffic stream.
20604 + // If there is no matched TS, reject the ADDBA request.
20605 + if( !GetTs(
20606 + ieee,
20607 + (PTS_COMMON_INFO*)(&pTS),
20608 + dst,
20609 + (u8)(pBaParamSet->field.TID),
20610 + RX_DIR,
20611 + true) )
20612 + {
20613 + rc = ADDBA_STATUS_REFUSED;
20614 + IEEE80211_DEBUG(IEEE80211_DL_ERR, "can't get TS in %s()\n", __FUNCTION__);
20615 + goto OnADDBAReq_Fail;
20616 + }
20617 + pBA = &pTS->RxAdmittedBARecord;
20618 + // To Determine the ADDBA Req content
20619 + // We can do much more check here, including BufferSize, AMSDU_Support, Policy, StartSeqCtrl...
20620 + // I want to check StartSeqCtrl to make sure when we start aggregation!!!
20621 + //
20622 + if(pBaParamSet->field.BAPolicy == BA_POLICY_DELAYED)
20623 + {
20624 + rc = ADDBA_STATUS_INVALID_PARAM;
20625 + IEEE80211_DEBUG(IEEE80211_DL_ERR, "BA Policy is not correct in %s()\n", __FUNCTION__);
20626 + goto OnADDBAReq_Fail;
20627 + }
20628 + // Admit the ADDBA Request
20629 + //
20630 + DeActivateBAEntry(ieee, pBA);
20631 + pBA->DialogToken = *pDialogToken;
20632 + pBA->BaParamSet = *pBaParamSet;
20633 + pBA->BaTimeoutValue = *pBaTimeoutVal;
20634 + pBA->BaStartSeqCtrl = *pBaStartSeqCtrl;
20635 + //for half N mode we only aggregate 1 frame
20636 + if (ieee->GetHalfNmodeSupportByAPsHandler(ieee->dev))
20637 + pBA->BaParamSet.field.BufferSize = 1;
20638 + else
20639 + pBA->BaParamSet.field.BufferSize = 32;
20640 + ActivateBAEntry(ieee, pBA, pBA->BaTimeoutValue);
20641 + ieee80211_send_ADDBARsp(ieee, dst, pBA, ADDBA_STATUS_SUCCESS);
20642 +
20643 + // End of procedure.
20644 + return 0;
20645 +
20646 +OnADDBAReq_Fail:
20647 + {
20648 + BA_RECORD BA;
20649 + BA.BaParamSet = *pBaParamSet;
20650 + BA.BaTimeoutValue = *pBaTimeoutVal;
20651 + BA.DialogToken = *pDialogToken;
20652 + BA.BaParamSet.field.BAPolicy = BA_POLICY_IMMEDIATE;
20653 + ieee80211_send_ADDBARsp(ieee, dst, &BA, rc);
20654 + return 0; //we send RSP out.
20655 + }
20656 +
20657 +}
20658 +
20659 +/********************************************************************************************************************
20660 + *function: RX ADDBARSP
20661 + * input: struct sk_buff * skb //incoming ADDBAReq skb.
20662 + * return: 0(pass), other(fail)
20663 + * notice: As this function need support of QOS, I comment some code out. And when qos is ready, this code need to be support.
20664 +********************************************************************************************************************/
20665 +int ieee80211_rx_ADDBARsp( struct ieee80211_device* ieee, struct sk_buff *skb)
20666 +{
20667 + struct ieee80211_hdr_3addr* rsp = NULL;
20668 + PBA_RECORD pPendingBA, pAdmittedBA;
20669 + PTX_TS_RECORD pTS = NULL;
20670 + u8* dst = NULL, *pDialogToken = NULL, *tag = NULL;
20671 + u16* pStatusCode = NULL, *pBaTimeoutVal = NULL;
20672 + PBA_PARAM_SET pBaParamSet = NULL;
20673 + u16 ReasonCode;
20674 +
20675 + if (skb->len < sizeof( struct ieee80211_hdr_3addr) + 9)
20676 + {
20677 + IEEE80211_DEBUG(IEEE80211_DL_ERR, " Invalid skb len in BARSP(%d / %d)\n", skb->len, (sizeof( struct ieee80211_hdr_3addr) + 9));
20678 + return -1;
20679 + }
20680 + rsp = ( struct ieee80211_hdr_3addr*)skb->data;
20681 + tag = (u8*)rsp;
20682 + dst = (u8*)(&rsp->addr2[0]);
20683 + tag += sizeof( struct ieee80211_hdr_3addr);
20684 + pDialogToken = tag + 2;
20685 + pStatusCode = (u16*)(tag + 3);
20686 + pBaParamSet = (PBA_PARAM_SET)(tag + 5);
20687 + pBaTimeoutVal = (u16*)(tag + 7);
20688 +
20689 + // Check the capability
20690 + // Since we can always receive A-MPDU, we just check if it is under HT mode.
20691 + if( ieee->current_network.qos_data.active == 0 ||
20692 + ieee->pHTInfo->bCurrentHTSupport == false ||
20693 + ieee->pHTInfo->bCurrentAMPDUEnable == false )
20694 + {
20695 + IEEE80211_DEBUG(IEEE80211_DL_ERR, "reject to ADDBA_RSP as some capability is not ready(%d, %d, %d)\n",ieee->current_network.qos_data.active, ieee->pHTInfo->bCurrentHTSupport, ieee->pHTInfo->bCurrentAMPDUEnable);
20696 + ReasonCode = DELBA_REASON_UNKNOWN_BA;
20697 + goto OnADDBARsp_Reject;
20698 + }
20699 +
20700 +
20701 + //
20702 + // Search for related TS.
20703 + // If there is no TS found, we wil reject ADDBA Rsp by sending DELBA frame.
20704 + //
20705 + if (!GetTs(
20706 + ieee,
20707 + (PTS_COMMON_INFO*)(&pTS),
20708 + dst,
20709 + (u8)(pBaParamSet->field.TID),
20710 + TX_DIR,
20711 + false) )
20712 + {
20713 + IEEE80211_DEBUG(IEEE80211_DL_ERR, "can't get TS in %s()\n", __FUNCTION__);
20714 + ReasonCode = DELBA_REASON_UNKNOWN_BA;
20715 + goto OnADDBARsp_Reject;
20716 + }
20717 +
20718 + pTS->bAddBaReqInProgress = false;
20719 + pPendingBA = &pTS->TxPendingBARecord;
20720 + pAdmittedBA = &pTS->TxAdmittedBARecord;
20721 +
20722 +
20723 + //
20724 + // Check if related BA is waiting for setup.
20725 + // If not, reject by sending DELBA frame.
20726 + //
20727 + if((pAdmittedBA->bValid==true))
20728 + {
20729 + // Since BA is already setup, we ignore all other ADDBA Response.
20730 + IEEE80211_DEBUG(IEEE80211_DL_BA, "OnADDBARsp(): Recv ADDBA Rsp. Drop because already admit it! \n");
20731 + return -1;
20732 + }
20733 + else if((pPendingBA->bValid == false) ||(*pDialogToken != pPendingBA->DialogToken))
20734 + {
20735 + IEEE80211_DEBUG(IEEE80211_DL_ERR, "OnADDBARsp(): Recv ADDBA Rsp. BA invalid, DELBA! \n");
20736 + ReasonCode = DELBA_REASON_UNKNOWN_BA;
20737 + goto OnADDBARsp_Reject;
20738 + }
20739 + else
20740 + {
20741 + IEEE80211_DEBUG(IEEE80211_DL_BA, "OnADDBARsp(): Recv ADDBA Rsp. BA is admitted! Status code:%X\n", *pStatusCode);
20742 + DeActivateBAEntry(ieee, pPendingBA);
20743 + }
20744 +
20745 +
20746 + if(*pStatusCode == ADDBA_STATUS_SUCCESS)
20747 + {
20748 + //
20749 + // Determine ADDBA Rsp content here.
20750 + // We can compare the value of BA parameter set that Peer returned and Self sent.
20751 + // If it is OK, then admitted. Or we can send DELBA to cancel BA mechanism.
20752 + //
20753 + if(pBaParamSet->field.BAPolicy == BA_POLICY_DELAYED)
20754 + {
20755 + // Since this is a kind of ADDBA failed, we delay next ADDBA process.
20756 + pTS->bAddBaReqDelayed = true;
20757 + DeActivateBAEntry(ieee, pAdmittedBA);
20758 + ReasonCode = DELBA_REASON_END_BA;
20759 + goto OnADDBARsp_Reject;
20760 + }
20761 +
20762 +
20763 + //
20764 + // Admitted condition
20765 + //
20766 + pAdmittedBA->DialogToken = *pDialogToken;
20767 + pAdmittedBA->BaTimeoutValue = *pBaTimeoutVal;
20768 + pAdmittedBA->BaStartSeqCtrl = pPendingBA->BaStartSeqCtrl;
20769 + pAdmittedBA->BaParamSet = *pBaParamSet;
20770 + DeActivateBAEntry(ieee, pAdmittedBA);
20771 + ActivateBAEntry(ieee, pAdmittedBA, *pBaTimeoutVal);
20772 + }
20773 + else
20774 + {
20775 + // Delay next ADDBA process.
20776 + pTS->bAddBaReqDelayed = true;
20777 + }
20778 +
20779 + // End of procedure
20780 + return 0;
20781 +
20782 +OnADDBARsp_Reject:
20783 + {
20784 + BA_RECORD BA;
20785 + BA.BaParamSet = *pBaParamSet;
20786 + ieee80211_send_DELBA(ieee, dst, &BA, TX_DIR, ReasonCode);
20787 + return 0;
20788 + }
20789 +
20790 +}
20791 +
20792 +/********************************************************************************************************************
20793 + *function: RX DELBA
20794 + * input: struct sk_buff * skb //incoming ADDBAReq skb.
20795 + * return: 0(pass), other(fail)
20796 + * notice: As this function need support of QOS, I comment some code out. And when qos is ready, this code need to be support.
20797 +********************************************************************************************************************/
20798 +int ieee80211_rx_DELBA(struct ieee80211_device* ieee,struct sk_buff *skb)
20799 +{
20800 + struct ieee80211_hdr_3addr* delba = NULL;
20801 + PDELBA_PARAM_SET pDelBaParamSet = NULL;
20802 + u16* pReasonCode = NULL;
20803 + u8* dst = NULL;
20804 +
20805 + if (skb->len < sizeof( struct ieee80211_hdr_3addr) + 6)
20806 + {
20807 + IEEE80211_DEBUG(IEEE80211_DL_ERR, " Invalid skb len in DELBA(%d / %d)\n", skb->len, (sizeof( struct ieee80211_hdr_3addr) + 6));
20808 + return -1;
20809 + }
20810 +
20811 + if(ieee->current_network.qos_data.active == 0 ||
20812 + ieee->pHTInfo->bCurrentHTSupport == false )
20813 + {
20814 + IEEE80211_DEBUG(IEEE80211_DL_ERR, "received DELBA while QOS or HT is not supported(%d, %d)\n",ieee->current_network.qos_data.active, ieee->pHTInfo->bCurrentHTSupport);
20815 + return -1;
20816 + }
20817 +
20818 + IEEE80211_DEBUG_DATA(IEEE80211_DL_DATA|IEEE80211_DL_BA, skb->data, skb->len);
20819 + delba = ( struct ieee80211_hdr_3addr*)skb->data;
20820 + dst = (u8*)(&delba->addr2[0]);
20821 + delba += sizeof( struct ieee80211_hdr_3addr);
20822 + pDelBaParamSet = (PDELBA_PARAM_SET)(delba+2);
20823 + pReasonCode = (u16*)(delba+4);
20824 +
20825 + if(pDelBaParamSet->field.Initiator == 1)
20826 + {
20827 + PRX_TS_RECORD pRxTs;
20828 +
20829 + if( !GetTs(
20830 + ieee,
20831 + (PTS_COMMON_INFO*)&pRxTs,
20832 + dst,
20833 + (u8)pDelBaParamSet->field.TID,
20834 + RX_DIR,
20835 + false) )
20836 + {
20837 + IEEE80211_DEBUG(IEEE80211_DL_ERR, "can't get TS for RXTS in %s()\n", __FUNCTION__);
20838 + return -1;
20839 + }
20840 +
20841 + RxTsDeleteBA(ieee, pRxTs);
20842 + }
20843 + else
20844 + {
20845 + PTX_TS_RECORD pTxTs;
20846 +
20847 + if(!GetTs(
20848 + ieee,
20849 + (PTS_COMMON_INFO*)&pTxTs,
20850 + dst,
20851 + (u8)pDelBaParamSet->field.TID,
20852 + TX_DIR,
20853 + false) )
20854 + {
20855 + IEEE80211_DEBUG(IEEE80211_DL_ERR, "can't get TS for TXTS in %s()\n", __FUNCTION__);
20856 + return -1;
20857 + }
20858 +
20859 + pTxTs->bUsingBa = false;
20860 + pTxTs->bAddBaReqInProgress = false;
20861 + pTxTs->bAddBaReqDelayed = false;
20862 + del_timer_sync(&pTxTs->TsAddBaTimer);
20863 + //PlatformCancelTimer(Adapter, &pTxTs->TsAddBaTimer);
20864 + TxTsDeleteBA(ieee, pTxTs);
20865 + }
20866 + return 0;
20867 +}
20868 +
20869 +//
20870 +// ADDBA initiate. This can only be called by TX side.
20871 +//
20872 +void
20873 +TsInitAddBA(
20874 + struct ieee80211_device* ieee,
20875 + PTX_TS_RECORD pTS,
20876 + u8 Policy,
20877 + u8 bOverwritePending
20878 + )
20879 +{
20880 + PBA_RECORD pBA = &pTS->TxPendingBARecord;
20881 +
20882 + if(pBA->bValid==true && bOverwritePending==false)
20883 + return;
20884 +
20885 + // Set parameters to "Pending" variable set
20886 + DeActivateBAEntry(ieee, pBA);
20887 +
20888 + pBA->DialogToken++; // DialogToken: Only keep the latest dialog token
20889 + pBA->BaParamSet.field.AMSDU_Support = 0; // Do not support A-MSDU with A-MPDU now!!
20890 + pBA->BaParamSet.field.BAPolicy = Policy; // Policy: Delayed or Immediate
20891 + pBA->BaParamSet.field.TID = pTS->TsCommonInfo.TSpec.f.TSInfo.field.ucTSID; // TID
20892 + // BufferSize: This need to be set according to A-MPDU vector
20893 + pBA->BaParamSet.field.BufferSize = 32; // BufferSize: This need to be set according to A-MPDU vector
20894 + pBA->BaTimeoutValue = 0; // Timeout value: Set 0 to disable Timer
20895 + pBA->BaStartSeqCtrl.field.SeqNum = (pTS->TxCurSeq + 3) % 4096; // Block Ack will start after 3 packets later.
20896 +
20897 + ActivateBAEntry(ieee, pBA, BA_SETUP_TIMEOUT);
20898 +
20899 + ieee80211_send_ADDBAReq(ieee, pTS->TsCommonInfo.Addr, pBA);
20900 +}
20901 +
20902 +void
20903 +TsInitDelBA( struct ieee80211_device* ieee, PTS_COMMON_INFO pTsCommonInfo, TR_SELECT TxRxSelect)
20904 +{
20905 +
20906 + if(TxRxSelect == TX_DIR)
20907 + {
20908 + PTX_TS_RECORD pTxTs = (PTX_TS_RECORD)pTsCommonInfo;
20909 +
20910 + if(TxTsDeleteBA(ieee, pTxTs))
20911 + ieee80211_send_DELBA(
20912 + ieee,
20913 + pTsCommonInfo->Addr,
20914 + (pTxTs->TxAdmittedBARecord.bValid)?(&pTxTs->TxAdmittedBARecord):(&pTxTs->TxPendingBARecord),
20915 + TxRxSelect,
20916 + DELBA_REASON_END_BA);
20917 + }
20918 + else if(TxRxSelect == RX_DIR)
20919 + {
20920 + PRX_TS_RECORD pRxTs = (PRX_TS_RECORD)pTsCommonInfo;
20921 + if(RxTsDeleteBA(ieee, pRxTs))
20922 + ieee80211_send_DELBA(
20923 + ieee,
20924 + pTsCommonInfo->Addr,
20925 + &pRxTs->RxAdmittedBARecord,
20926 + TxRxSelect,
20927 + DELBA_REASON_END_BA );
20928 + }
20929 +}
20930 +/********************************************************************************************************************
20931 + *function: BA setup timer
20932 + * input: unsigned long data //acturally we send TX_TS_RECORD or RX_TS_RECORD to these timer
20933 + * return: NULL
20934 + * notice:
20935 +********************************************************************************************************************/
20936 +void BaSetupTimeOut(unsigned long data)
20937 +{
20938 + PTX_TS_RECORD pTxTs = (PTX_TS_RECORD)data;
20939 +
20940 + pTxTs->bAddBaReqInProgress = false;
20941 + pTxTs->bAddBaReqDelayed = true;
20942 + pTxTs->TxPendingBARecord.bValid = false;
20943 +}
20944 +
20945 +void TxBaInactTimeout(unsigned long data)
20946 +{
20947 + PTX_TS_RECORD pTxTs = (PTX_TS_RECORD)data;
20948 + struct ieee80211_device *ieee = container_of(pTxTs, struct ieee80211_device, TxTsRecord[pTxTs->num]);
20949 + TxTsDeleteBA(ieee, pTxTs);
20950 + ieee80211_send_DELBA(
20951 + ieee,
20952 + pTxTs->TsCommonInfo.Addr,
20953 + &pTxTs->TxAdmittedBARecord,
20954 + TX_DIR,
20955 + DELBA_REASON_TIMEOUT);
20956 +}
20957 +
20958 +void RxBaInactTimeout(unsigned long data)
20959 +{
20960 + PRX_TS_RECORD pRxTs = (PRX_TS_RECORD)data;
20961 + struct ieee80211_device *ieee = container_of(pRxTs, struct ieee80211_device, RxTsRecord[pRxTs->num]);
20962 +
20963 + RxTsDeleteBA(ieee, pRxTs);
20964 + ieee80211_send_DELBA(
20965 + ieee,
20966 + pRxTs->TsCommonInfo.Addr,
20967 + &pRxTs->RxAdmittedBARecord,
20968 + RX_DIR,
20969 + DELBA_REASON_TIMEOUT);
20970 + return ;
20971 +}
20972 +
20973 --- /dev/null
20974 +++ b/drivers/staging/rtl8192e/ieee80211/rtl819x_HT.h
20975 @@ -0,0 +1,481 @@
20976 +#ifndef _RTL819XU_HTTYPE_H_
20977 +#define _RTL819XU_HTTYPE_H_
20978 +
20979 +//------------------------------------------------------------
20980 +// The HT Capability element is present in beacons, association request,
20981 +// reassociation request and probe response frames
20982 +//------------------------------------------------------------
20983 +
20984 +//
20985 +// Operation mode value
20986 +//
20987 +#define HT_OPMODE_NO_PROTECT 0
20988 +#define HT_OPMODE_OPTIONAL 1
20989 +#define HT_OPMODE_40MHZ_PROTECT 2
20990 +#define HT_OPMODE_MIXED 3
20991 +
20992 +//
20993 +// MIMO Power Save Setings
20994 +//
20995 +#define MIMO_PS_STATIC 0
20996 +#define MIMO_PS_DYNAMIC 1
20997 +#define MIMO_PS_NOLIMIT 3
20998 +
20999 +
21000 +//
21001 +// There should be 128 bits to cover all of the MCS rates. However, since
21002 +// 8190 does not support too much rates, one integer is quite enough.
21003 +//
21004 +
21005 +#define sHTCLng 4
21006 +
21007 +
21008 +#define HT_SUPPORTED_MCS_1SS_BITMAP 0x000000ff
21009 +#define HT_SUPPORTED_MCS_2SS_BITMAP 0x0000ff00
21010 +#define HT_SUPPORTED_MCS_1SS_2SS_BITMAP HT_MCS_1SS_BITMAP|HT_MCS_1SS_2SS_BITMAP
21011 +
21012 +
21013 +typedef enum _HT_MCS_RATE{
21014 + HT_MCS0 = 0x00000001,
21015 + HT_MCS1 = 0x00000002,
21016 + HT_MCS2 = 0x00000004,
21017 + HT_MCS3 = 0x00000008,
21018 + HT_MCS4 = 0x00000010,
21019 + HT_MCS5 = 0x00000020,
21020 + HT_MCS6 = 0x00000040,
21021 + HT_MCS7 = 0x00000080,
21022 + HT_MCS8 = 0x00000100,
21023 + HT_MCS9 = 0x00000200,
21024 + HT_MCS10 = 0x00000400,
21025 + HT_MCS11 = 0x00000800,
21026 + HT_MCS12 = 0x00001000,
21027 + HT_MCS13 = 0x00002000,
21028 + HT_MCS14 = 0x00004000,
21029 + HT_MCS15 = 0x00008000,
21030 + // Do not define MCS32 here although 8190 support MCS32
21031 +}HT_MCS_RATE,*PHT_MCS_RATE;
21032 +
21033 +//
21034 +// Represent Channel Width in HT Capabilities
21035 +//
21036 +typedef enum _HT_CHANNEL_WIDTH{
21037 + HT_CHANNEL_WIDTH_20 = 0,
21038 + HT_CHANNEL_WIDTH_20_40 = 1,
21039 +}HT_CHANNEL_WIDTH, *PHT_CHANNEL_WIDTH;
21040 +
21041 +//
21042 +// Represent Extention Channel Offset in HT Capabilities
21043 +// This is available only in 40Mhz mode.
21044 +//
21045 +typedef enum _HT_EXTCHNL_OFFSET{
21046 + HT_EXTCHNL_OFFSET_NO_EXT = 0,
21047 + HT_EXTCHNL_OFFSET_UPPER = 1,
21048 + HT_EXTCHNL_OFFSET_NO_DEF = 2,
21049 + HT_EXTCHNL_OFFSET_LOWER = 3,
21050 +}HT_EXTCHNL_OFFSET, *PHT_EXTCHNL_OFFSET;
21051 +
21052 +typedef enum _CHNLOP{
21053 + CHNLOP_NONE = 0, // No Action now
21054 + CHNLOP_SCAN = 1, // Scan in progress
21055 + CHNLOP_SWBW = 2, // Bandwidth switching in progress
21056 + CHNLOP_SWCHNL = 3, // Software Channel switching in progress
21057 +} CHNLOP, *PCHNLOP;
21058 +
21059 +// Determine if the Channel Operation is in progress
21060 +#define CHHLOP_IN_PROGRESS(_pHTInfo) \
21061 + ((_pHTInfo)->ChnlOp > CHNLOP_NONE) ? TRUE : FALSE
21062 +
21063 +/*
21064 +typedef union _HT_CAPABILITY{
21065 + u16 ShortData;
21066 + u8 CharData[2];
21067 + struct
21068 + {
21069 + u16 AdvCoding:1;
21070 + u16 ChlWidth:1;
21071 + u16 MimoPwrSave:2;
21072 + u16 GreenField:1;
21073 + u16 ShortGI20Mhz:1;
21074 + u16 ShortGI40Mhz:1;
21075 + u16 STBC:1;
21076 + u16 BeamForm:1;
21077 + u16 DelayBA:1;
21078 + u16 MaxAMSDUSize:1;
21079 + u16 DssCCk:1;
21080 + u16 PSMP:1;
21081 + u16 Rsvd:3;
21082 + }Field;
21083 +}HT_CAPABILITY, *PHT_CAPABILITY;
21084 +
21085 +typedef union _HT_CAPABILITY_MACPARA{
21086 + u8 ShortData;
21087 + u8 CharData[1];
21088 + struct
21089 + {
21090 + u8 MaxRxAMPDU:2;
21091 + u8 MPDUDensity:2;
21092 + u8 Rsvd:4;
21093 + }Field;
21094 +}HT_CAPABILITY_MACPARA, *PHT_CAPABILITY_MACPARA;
21095 +*/
21096 +
21097 +typedef enum _HT_ACTION{
21098 + ACT_RECOMMAND_WIDTH = 0,
21099 + ACT_MIMO_PWR_SAVE = 1,
21100 + ACT_PSMP = 2,
21101 + ACT_SET_PCO_PHASE = 3,
21102 + ACT_MIMO_CHL_MEASURE = 4,
21103 + ACT_RECIPROCITY_CORRECT = 5,
21104 + ACT_MIMO_CSI_MATRICS = 6,
21105 + ACT_MIMO_NOCOMPR_STEER = 7,
21106 + ACT_MIMO_COMPR_STEER = 8,
21107 + ACT_ANTENNA_SELECT = 9,
21108 +} HT_ACTION, *PHT_ACTION;
21109 +
21110 +
21111 +/* 2007/06/07 MH Define sub-carrier mode for 40MHZ. */
21112 +typedef enum _HT_Bandwidth_40MHZ_Sub_Carrier{
21113 + SC_MODE_DUPLICATE = 0,
21114 + SC_MODE_LOWER = 1,
21115 + SC_MODE_UPPER = 2,
21116 + SC_MODE_FULL40MHZ = 3,
21117 +}HT_BW40_SC_E;
21118 +
21119 +typedef struct _HT_CAPABILITY_ELE{
21120 +
21121 + //HT capability info
21122 + u8 AdvCoding:1;
21123 + u8 ChlWidth:1;
21124 + u8 MimoPwrSave:2;
21125 + u8 GreenField:1;
21126 + u8 ShortGI20Mhz:1;
21127 + u8 ShortGI40Mhz:1;
21128 + u8 TxSTBC:1;
21129 + u8 RxSTBC:2;
21130 + u8 DelayBA:1;
21131 + u8 MaxAMSDUSize:1;
21132 + u8 DssCCk:1;
21133 + u8 PSMP:1;
21134 + u8 Rsvd1:1;
21135 + u8 LSigTxopProtect:1;
21136 +
21137 + //MAC HT parameters info
21138 + u8 MaxRxAMPDUFactor:2;
21139 + u8 MPDUDensity:3;
21140 + u8 Rsvd2:3;
21141 +
21142 + //Supported MCS set
21143 + u8 MCS[16];
21144 +
21145 +
21146 + //Extended HT Capability Info
21147 + u16 ExtHTCapInfo;
21148 +
21149 + //TXBF Capabilities
21150 + u8 TxBFCap[4];
21151 +
21152 + //Antenna Selection Capabilities
21153 + u8 ASCap;
21154 +
21155 +} __attribute__ ((packed)) HT_CAPABILITY_ELE, *PHT_CAPABILITY_ELE;
21156 +
21157 +//------------------------------------------------------------
21158 +// The HT Information element is present in beacons
21159 +// Only AP is required to include this element
21160 +//------------------------------------------------------------
21161 +
21162 +typedef struct _HT_INFORMATION_ELE{
21163 + u8 ControlChl;
21164 +
21165 + u8 ExtChlOffset:2;
21166 + u8 RecommemdedTxWidth:1;
21167 + u8 RIFS:1;
21168 + u8 PSMPAccessOnly:1;
21169 + u8 SrvIntGranularity:3;
21170 +
21171 + u8 OptMode:2;
21172 + u8 NonGFDevPresent:1;
21173 + u8 Revd1:5;
21174 + u8 Revd2:8;
21175 +
21176 + u8 Rsvd3:6;
21177 + u8 DualBeacon:1;
21178 + u8 DualCTSProtect:1;
21179 +
21180 + u8 SecondaryBeacon:1;
21181 + u8 LSigTxopProtectFull:1;
21182 + u8 PcoActive:1;
21183 + u8 PcoPhase:1;
21184 + u8 Rsvd4:4;
21185 +
21186 + u8 BasicMSC[16];
21187 +} __attribute__ ((packed)) HT_INFORMATION_ELE, *PHT_INFORMATION_ELE;
21188 +
21189 +//
21190 +// MIMO Power Save control field.
21191 +// This is appear in MIMO Power Save Action Frame
21192 +//
21193 +typedef struct _MIMOPS_CTRL{
21194 + u8 MimoPsEnable:1;
21195 + u8 MimoPsMode:1;
21196 + u8 Reserved:6;
21197 +} MIMOPS_CTRL, *PMIMOPS_CTRL;
21198 +
21199 +typedef enum _HT_SPEC_VER{
21200 + HT_SPEC_VER_IEEE = 0,
21201 + HT_SPEC_VER_EWC = 1,
21202 +}HT_SPEC_VER, *PHT_SPEC_VER;
21203 +
21204 +typedef enum _HT_AGGRE_MODE_E{
21205 + HT_AGG_AUTO = 0,
21206 + HT_AGG_FORCE_ENABLE = 1,
21207 + HT_AGG_FORCE_DISABLE = 2,
21208 +}HT_AGGRE_MODE_E, *PHT_AGGRE_MODE_E;
21209 +
21210 +//------------------------------------------------------------
21211 +// The Data structure is used to keep HT related variables when card is
21212 +// configured as non-AP STA mode. **Note** Current_xxx should be set
21213 +// to default value in HTInitializeHTInfo()
21214 +//------------------------------------------------------------
21215 +
21216 +typedef struct _RT_HIGH_THROUGHPUT{
21217 + u8 bEnableHT;
21218 + u8 bCurrentHTSupport;
21219 +
21220 + u8 bRegBW40MHz; // Tx 40MHz channel capablity
21221 + u8 bCurBW40MHz; // Tx 40MHz channel capability
21222 +
21223 + u8 bRegShortGI40MHz; // Tx Short GI for 40Mhz
21224 + u8 bCurShortGI40MHz; // Tx Short GI for 40MHz
21225 +
21226 + u8 bRegShortGI20MHz; // Tx Short GI for 20MHz
21227 + u8 bCurShortGI20MHz; // Tx Short GI for 20MHz
21228 +
21229 + u8 bRegSuppCCK; // Tx CCK rate capability
21230 + u8 bCurSuppCCK; // Tx CCK rate capability
21231 +
21232 + // 802.11n spec version for "peer"
21233 + HT_SPEC_VER ePeerHTSpecVer;
21234 +
21235 +
21236 + // HT related information for "Self"
21237 + HT_CAPABILITY_ELE SelfHTCap; // This is HT cap element sent to peer STA, which also indicate HT Rx capabilities.
21238 + HT_INFORMATION_ELE SelfHTInfo; // This is HT info element sent to peer STA, which also indicate HT Rx capabilities.
21239 +
21240 + // HT related information for "Peer"
21241 + u8 PeerHTCapBuf[32];
21242 + u8 PeerHTInfoBuf[32];
21243 +
21244 +
21245 + // A-MSDU related
21246 + u8 bAMSDU_Support; // This indicates Tx A-MSDU capability
21247 + u16 nAMSDU_MaxSize; // This indicates Tx A-MSDU capability
21248 + u8 bCurrent_AMSDU_Support; // This indicates Tx A-MSDU capability
21249 + u16 nCurrent_AMSDU_MaxSize; // This indicates Tx A-MSDU capability
21250 +
21251 +
21252 + // AMPDU related <2006.08.10 Emily>
21253 + u8 bAMPDUEnable; // This indicate Tx A-MPDU capability
21254 + u8 bCurrentAMPDUEnable; // This indicate Tx A-MPDU capability
21255 + u8 AMPDU_Factor; // This indicate Tx A-MPDU capability
21256 + u8 CurrentAMPDUFactor; // This indicate Tx A-MPDU capability
21257 + u8 MPDU_Density; // This indicate Tx A-MPDU capability
21258 + u8 CurrentMPDUDensity; // This indicate Tx A-MPDU capability
21259 +
21260 + // Forced A-MPDU enable
21261 + HT_AGGRE_MODE_E ForcedAMPDUMode;
21262 + u8 ForcedAMPDUFactor;
21263 + u8 ForcedMPDUDensity;
21264 +
21265 + // Forced A-MSDU enable
21266 + HT_AGGRE_MODE_E ForcedAMSDUMode;
21267 + u16 ForcedAMSDUMaxSize;
21268 +
21269 + u8 bForcedShortGI;
21270 +
21271 + u8 CurrentOpMode;
21272 +
21273 + // MIMO PS related
21274 + u8 SelfMimoPs;
21275 + u8 PeerMimoPs;
21276 +
21277 + // 40MHz Channel Offset settings.
21278 + HT_EXTCHNL_OFFSET CurSTAExtChnlOffset;
21279 + u8 bCurTxBW40MHz; // If we use 40 MHz to Tx
21280 + u8 PeerBandwidth;
21281 +
21282 + // For Bandwidth Switching
21283 + u8 bSwBwInProgress;
21284 + CHNLOP ChnlOp; // software switching channel in progress. By Bruce, 2008-02-15.
21285 + u8 SwBwStep;
21286 + //struct timer_list SwBwTimer; //moved to ieee80211_device. as timer_list need include some header file here.
21287 +
21288 + // For Realtek proprietary A-MPDU factor for aggregation
21289 + u8 bRegRT2RTAggregation;
21290 + u8 bCurrentRT2RTAggregation;
21291 + u8 bCurrentRT2RTLongSlotTime;
21292 + u8 szRT2RTAggBuffer[10];
21293 +
21294 + // Rx Reorder control
21295 + u8 bRegRxReorderEnable;
21296 + u8 bCurRxReorderEnable;
21297 + u8 RxReorderWinSize;
21298 + u8 RxReorderPendingTime;
21299 + u16 RxReorderDropCounter;
21300 +
21301 +#ifdef USB_TX_DRIVER_AGGREGATION_ENABLE
21302 + u8 UsbTxAggrNum;
21303 +#endif
21304 +#ifdef USB_RX_AGGREGATION_SUPPORT
21305 + u8 UsbRxFwAggrEn;
21306 + u8 UsbRxFwAggrPageNum;
21307 + u8 UsbRxFwAggrPacketNum;
21308 + u8 UsbRxFwAggrTimeout;
21309 +#endif
21310 +
21311 + // Add for Broadcom(Linksys) IOT. Joseph
21312 + u8 bIsPeerBcm;
21313 +
21314 + // For IOT issue.
21315 + u8 IOTPeer;
21316 + u32 IOTAction;
21317 +} __attribute__ ((packed)) RT_HIGH_THROUGHPUT, *PRT_HIGH_THROUGHPUT;
21318 +
21319 +
21320 +//------------------------------------------------------------
21321 +// The Data structure is used to keep HT related variable for "each Sta"
21322 +// when card is configured as "AP mode"
21323 +//------------------------------------------------------------
21324 +
21325 +typedef struct _RT_HTINFO_STA_ENTRY{
21326 + u8 bEnableHT;
21327 +
21328 + u8 bSupportCck;
21329 +
21330 + u16 AMSDU_MaxSize;
21331 +
21332 + u8 AMPDU_Factor;
21333 + u8 MPDU_Density;
21334 +
21335 + u8 HTHighestOperaRate;
21336 +
21337 + u8 bBw40MHz;
21338 +
21339 + u8 MimoPs;
21340 +
21341 + u8 McsRateSet[16];
21342 +
21343 +
21344 +}RT_HTINFO_STA_ENTRY, *PRT_HTINFO_STA_ENTRY;
21345 +
21346 +
21347 +
21348 +
21349 +
21350 +//------------------------------------------------------------
21351 +// The Data structure is used to keep HT related variable for "each AP"
21352 +// when card is configured as "STA mode"
21353 +//------------------------------------------------------------
21354 +
21355 +typedef struct _BSS_HT{
21356 +
21357 + u8 bdSupportHT;
21358 +
21359 + // HT related elements
21360 + u8 bdHTCapBuf[32];
21361 + u16 bdHTCapLen;
21362 + u8 bdHTInfoBuf[32];
21363 + u16 bdHTInfoLen;
21364 +
21365 + HT_SPEC_VER bdHTSpecVer;
21366 + //HT_CAPABILITY_ELE bdHTCapEle;
21367 + //HT_INFORMATION_ELE bdHTInfoEle;
21368 +
21369 + u8 bdRT2RTAggregation;
21370 + u8 bdRT2RTLongSlotTime;
21371 +} __attribute__ ((packed)) BSS_HT, *PBSS_HT;
21372 +
21373 +typedef struct _MIMO_RSSI{
21374 + u32 EnableAntenna;
21375 + u32 AntennaA;
21376 + u32 AntennaB;
21377 + u32 AntennaC;
21378 + u32 AntennaD;
21379 + u32 Average;
21380 +}MIMO_RSSI, *PMIMO_RSSI;
21381 +
21382 +typedef struct _MIMO_EVM{
21383 + u32 EVM1;
21384 + u32 EVM2;
21385 +}MIMO_EVM, *PMIMO_EVM;
21386 +
21387 +typedef struct _FALSE_ALARM_STATISTICS{
21388 + u32 Cnt_Parity_Fail;
21389 + u32 Cnt_Rate_Illegal;
21390 + u32 Cnt_Crc8_fail;
21391 + u32 Cnt_all;
21392 +}FALSE_ALARM_STATISTICS, *PFALSE_ALARM_STATISTICS;
21393 +
21394 +
21395 +extern u8 MCS_FILTER_ALL[16];
21396 +extern u8 MCS_FILTER_1SS[16];
21397 +
21398 +/* 2007/07/11 MH Modify the macro. Becaus STA may link with a N-AP. If we set
21399 + STA in A/B/G mode and AP is still in N mode. The macro will be wrong. We have
21400 + to add a macro to judge wireless mode. */
21401 +#define PICK_RATE(_nLegacyRate, _nMcsRate) \
21402 + (_nMcsRate==0)?(_nLegacyRate&0x7f):(_nMcsRate)
21403 +/* 2007/07/12 MH We only define legacy and HT wireless mode now. */
21404 +#define LEGACY_WIRELESS_MODE IEEE_MODE_MASK
21405 +
21406 +#define CURRENT_RATE(WirelessMode, LegacyRate, HTRate) \
21407 + ((WirelessMode & (LEGACY_WIRELESS_MODE))!=0)?\
21408 + (LegacyRate):\
21409 + (PICK_RATE(LegacyRate, HTRate))
21410 +
21411 +
21412 +
21413 +// MCS Bw 40 {1~7, 12~15,32}
21414 +#define RATE_ADPT_1SS_MASK 0xFF
21415 +#define RATE_ADPT_2SS_MASK 0xF0 //Skip MCS8~11 because mcs7 > mcs6, 9, 10, 11. 2007.01.16 by Emily
21416 +#define RATE_ADPT_MCS32_MASK 0x01
21417 +
21418 +#define IS_11N_MCS_RATE(rate) (rate&0x80)
21419 +
21420 +typedef enum _HT_AGGRE_SIZE{
21421 + HT_AGG_SIZE_8K = 0,
21422 + HT_AGG_SIZE_16K = 1,
21423 + HT_AGG_SIZE_32K = 2,
21424 + HT_AGG_SIZE_64K = 3,
21425 +}HT_AGGRE_SIZE_E, *PHT_AGGRE_SIZE_E;
21426 +
21427 +/* Indicate different AP vendor for IOT issue */
21428 +typedef enum _HT_IOT_PEER
21429 +{
21430 + HT_IOT_PEER_UNKNOWN = 0,
21431 + HT_IOT_PEER_REALTEK = 1,
21432 + HT_IOT_PEER_BROADCOM = 2,
21433 + HT_IOT_PEER_RALINK = 3,
21434 + HT_IOT_PEER_ATHEROS = 4,
21435 + HT_IOT_PEER_CISCO= 5,
21436 + HT_IOT_PEER_MAX = 6
21437 +}HT_IOT_PEER_E, *PHTIOT_PEER_E;
21438 +
21439 +//
21440 +// IOT Action for different AP
21441 +//
21442 +typedef enum _HT_IOT_ACTION{
21443 + HT_IOT_ACT_TX_USE_AMSDU_4K = 0x00000001,
21444 + HT_IOT_ACT_TX_USE_AMSDU_8K = 0x00000002,
21445 + HT_IOT_ACT_DISABLE_MCS14 = 0x00000004,
21446 + HT_IOT_ACT_DISABLE_MCS15 = 0x00000008,
21447 + HT_IOT_ACT_DISABLE_ALL_2SS = 0x00000010,
21448 + HT_IOT_ACT_DISABLE_EDCA_TURBO = 0x00000020,
21449 + HT_IOT_ACT_MGNT_USE_CCK_6M = 0x00000040,
21450 + HT_IOT_ACT_CDD_FSYNC = 0x00000080,
21451 + HT_IOT_ACT_PURE_N_MODE = 0x00000100,
21452 + HT_IOT_ACT_FORCED_CTS2SELF = 0x00000200,
21453 +}HT_IOT_ACTION_E, *PHT_IOT_ACTION_E;
21454 +
21455 +#endif //_RTL819XU_HTTYPE_H_
21456 +
21457 --- /dev/null
21458 +++ b/drivers/staging/rtl8192e/ieee80211/rtl819x_HTProc.c
21459 @@ -0,0 +1,1719 @@
21460 +
21461 +//As this function is mainly ported from Windows driver, so leave the name little changed. If any confusion caused, tell me. Created by WB. 2008.05.08
21462 +#include "ieee80211.h"
21463 +#include "rtl819x_HT.h"
21464 +u8 MCS_FILTER_ALL[16] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
21465 +
21466 +u8 MCS_FILTER_1SS[16] = {0xff, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
21467 +
21468 +u16 MCS_DATA_RATE[2][2][77] =
21469 + { { {13, 26, 39, 52, 78, 104, 117, 130, 26, 52, 78 ,104, 156, 208, 234, 260,
21470 + 39, 78, 117, 234, 312, 351, 390, 52, 104, 156, 208, 312, 416, 468, 520,
21471 + 0, 78, 104, 130, 117, 156, 195, 104, 130, 130, 156, 182, 182, 208, 156, 195,
21472 + 195, 234, 273, 273, 312, 130, 156, 181, 156, 181, 208, 234, 208, 234, 260, 260,
21473 + 286, 195, 234, 273, 234, 273, 312, 351, 312, 351, 390, 390, 429}, // Long GI, 20MHz
21474 + {14, 29, 43, 58, 87, 116, 130, 144, 29, 58, 87, 116, 173, 231, 260, 289,
21475 + 43, 87, 130, 173, 260, 347, 390, 433, 58, 116, 173, 231, 347, 462, 520, 578,
21476 + 0, 87, 116, 144, 130, 173, 217, 116, 144, 144, 173, 202, 202, 231, 173, 217,
21477 + 217, 260, 303, 303, 347, 144, 173, 202, 173, 202, 231, 260, 231, 260, 289, 289,
21478 + 318, 217, 260, 303, 260, 303, 347, 390, 347, 390, 433, 433, 477} }, // Short GI, 20MHz
21479 + { {27, 54, 81, 108, 162, 216, 243, 270, 54, 108, 162, 216, 324, 432, 486, 540,
21480 + 81, 162, 243, 324, 486, 648, 729, 810, 108, 216, 324, 432, 648, 864, 972, 1080,
21481 + 12, 162, 216, 270, 243, 324, 405, 216, 270, 270, 324, 378, 378, 432, 324, 405,
21482 + 405, 486, 567, 567, 648, 270, 324, 378, 324, 378, 432, 486, 432, 486, 540, 540,
21483 + 594, 405, 486, 567, 486, 567, 648, 729, 648, 729, 810, 810, 891}, // Long GI, 40MHz
21484 + {30, 60, 90, 120, 180, 240, 270, 300, 60, 120, 180, 240, 360, 480, 540, 600,
21485 + 90, 180, 270, 360, 540, 720, 810, 900, 120, 240, 360, 480, 720, 960, 1080, 1200,
21486 + 13, 180, 240, 300, 270, 360, 450, 240, 300, 300, 360, 420, 420, 480, 360, 450,
21487 + 450, 540, 630, 630, 720, 300, 360, 420, 360, 420, 480, 540, 480, 540, 600, 600,
21488 + 660, 450, 540, 630, 540, 630, 720, 810, 720, 810, 900, 900, 990} } // Short GI, 40MHz
21489 + };
21490 +
21491 +static u8 UNKNOWN_BORADCOM[3] = {0x00, 0x14, 0xbf};
21492 +static u8 LINKSYSWRT330_LINKSYSWRT300_BROADCOM[3] = {0x00, 0x1a, 0x70};
21493 +static u8 LINKSYSWRT350_LINKSYSWRT150_BROADCOM[3] = {0x00, 0x1d, 0x7e};
21494 +static u8 NETGEAR834Bv2_BROADCOM[3] = {0x00, 0x1b, 0x2f};
21495 +static u8 BELKINF5D8233V1_RALINK[3] = {0x00, 0x17, 0x3f}; //cosa 03202008
21496 +static u8 BELKINF5D82334V3_RALINK[3] = {0x00, 0x1c, 0xdf};
21497 +static u8 PCI_RALINK[3] = {0x00, 0x90, 0xcc};
21498 +static u8 EDIMAX_RALINK[3] = {0x00, 0x0e, 0x2e};
21499 +static u8 AIRLINK_RALINK[3] = {0x00, 0x18, 0x02};
21500 +static u8 DLINK_ATHEROS[3] = {0x00, 0x1c, 0xf0};
21501 +static u8 CISCO_BROADCOM[3] = {0x00, 0x17, 0x94};
21502 +
21503 +// 2008/04/01 MH For Cisco G mode RX TP We need to change FW duration. Shoud we put the
21504 +// code in other place??
21505 +//static u8 WIFI_CISCO_G_AP[3] = {0x00, 0x40, 0x96};
21506 +/********************************************************************************************************************
21507 + *function: This function update default settings in pHTInfo structure
21508 + * input: PRT_HIGH_THROUGHPUT pHTInfo
21509 + * output: none
21510 + * return: none
21511 + * notice: These value need be modified if any changes.
21512 + * *****************************************************************************************************************/
21513 +void HTUpdateDefaultSetting(struct ieee80211_device* ieee)
21514 +{
21515 + PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
21516 + //const typeof( ((struct ieee80211_device *)0)->pHTInfo ) *__mptr = &pHTInfo;
21517 +
21518 + //printk("pHTinfo:%p, &pHTinfo:%p, mptr:%p, offsetof:%x\n", pHTInfo, &pHTInfo, __mptr, offsetof(struct ieee80211_device, pHTInfo));
21519 + //printk("===>ieee:%p,\n", ieee);
21520 + // ShortGI support
21521 + pHTInfo->bRegShortGI20MHz= 1;
21522 + pHTInfo->bRegShortGI40MHz= 1;
21523 +
21524 + // 40MHz channel support
21525 + pHTInfo->bRegBW40MHz = 1;
21526 +
21527 + // CCK rate support in 40MHz channel
21528 + if(pHTInfo->bRegBW40MHz)
21529 + pHTInfo->bRegSuppCCK = 1;
21530 + else
21531 + pHTInfo->bRegSuppCCK = true;
21532 +
21533 + // AMSDU related
21534 + pHTInfo->nAMSDU_MaxSize = 7935UL;
21535 + pHTInfo->bAMSDU_Support = 0;
21536 +
21537 + // AMPDU related
21538 + pHTInfo->bAMPDUEnable = 1;
21539 + pHTInfo->AMPDU_Factor = 2; //// 0: 2n13(8K), 1:2n14(16K), 2:2n15(32K), 3:2n16(64k)
21540 + pHTInfo->MPDU_Density = 0;// 0: No restriction, 1: 1/8usec, 2: 1/4usec, 3: 1/2usec, 4: 1usec, 5: 2usec, 6: 4usec, 7:8usec
21541 +
21542 + // MIMO Power Save
21543 + pHTInfo->SelfMimoPs = 3;// 0: Static Mimo Ps, 1: Dynamic Mimo Ps, 3: No Limitation, 2: Reserved(Set to 3 automatically.)
21544 + if(pHTInfo->SelfMimoPs == 2)
21545 + pHTInfo->SelfMimoPs = 3;
21546 + // 8190 only. Assign rate operation mode to firmware
21547 + ieee->bTxDisableRateFallBack = 0;
21548 + ieee->bTxUseDriverAssingedRate = 0;
21549 +
21550 +#ifdef TO_DO_LIST
21551 + // 8190 only. Assign duration operation mode to firmware
21552 + pMgntInfo->bTxEnableFwCalcDur = (BOOLEAN)pNdisCommon->bRegTxEnableFwCalcDur;
21553 +#endif
21554 + // 8190 only, Realtek proprietary aggregation mode
21555 + // Set MPDUDensity=2, 1: Set MPDUDensity=2(32k) for Realtek AP and set MPDUDensity=0(8k) for others
21556 + pHTInfo->bRegRT2RTAggregation = 1;//0: Set MPDUDensity=2, 1: Set MPDUDensity=2(32k) for Realtek AP and set MPDUDensity=0(8k) for others
21557 +
21558 + // For Rx Reorder Control
21559 + pHTInfo->bRegRxReorderEnable = 1;
21560 + pHTInfo->RxReorderWinSize = 64;
21561 + pHTInfo->RxReorderPendingTime = 30;
21562 +
21563 +#ifdef USB_TX_DRIVER_AGGREGATION_ENABLE
21564 + pHTInfo->UsbTxAggrNum = 4;
21565 +#endif
21566 +#ifdef USB_RX_AGGREGATION_SUPPORT
21567 + pHTInfo->UsbRxFwAggrEn = 1;
21568 + pHTInfo->UsbRxFwAggrPageNum = 24;
21569 + pHTInfo->UsbRxFwAggrPacketNum = 8;
21570 + pHTInfo->UsbRxFwAggrTimeout = 16; ////usb rx FW aggregation timeout threshold.It's in units of 64us
21571 +#endif
21572 +
21573 +
21574 +}
21575 +/********************************************************************************************************************
21576 + *function: This function print out each field on HT capability IE mainly from (Beacon/ProbeRsp/AssocReq)
21577 + * input: u8* CapIE //Capability IE to be printed out
21578 + * u8* TitleString //mainly print out caller function
21579 + * output: none
21580 + * return: none
21581 + * notice: Driver should not print out this message by default.
21582 + * *****************************************************************************************************************/
21583 +void HTDebugHTCapability(u8* CapIE, u8* TitleString )
21584 +{
21585 +
21586 + static u8 EWC11NHTCap[] = {0x00, 0x90, 0x4c, 0x33}; // For 11n EWC definition, 2007.07.17, by Emily
21587 + PHT_CAPABILITY_ELE pCapELE;
21588 +
21589 + if(!memcmp(CapIE, EWC11NHTCap, sizeof(EWC11NHTCap)))
21590 + {
21591 + //EWC IE
21592 + IEEE80211_DEBUG(IEEE80211_DL_HT, "EWC IE in %s()\n", __FUNCTION__);
21593 + pCapELE = (PHT_CAPABILITY_ELE)(&CapIE[4]);
21594 + }else
21595 + pCapELE = (PHT_CAPABILITY_ELE)(&CapIE[0]);
21596 +
21597 + IEEE80211_DEBUG(IEEE80211_DL_HT, "<Log HT Capability>. Called by %s\n", TitleString );
21598 +
21599 + IEEE80211_DEBUG(IEEE80211_DL_HT, "\tSupported Channel Width = %s\n", (pCapELE->ChlWidth)?"20MHz": "20/40MHz");
21600 + IEEE80211_DEBUG(IEEE80211_DL_HT, "\tSupport Short GI for 20M = %s\n", (pCapELE->ShortGI20Mhz)?"YES": "NO");
21601 + IEEE80211_DEBUG(IEEE80211_DL_HT, "\tSupport Short GI for 40M = %s\n", (pCapELE->ShortGI40Mhz)?"YES": "NO");
21602 + IEEE80211_DEBUG(IEEE80211_DL_HT, "\tSupport TX STBC = %s\n", (pCapELE->TxSTBC)?"YES": "NO");
21603 + IEEE80211_DEBUG(IEEE80211_DL_HT, "\tMax AMSDU Size = %s\n", (pCapELE->MaxAMSDUSize)?"3839": "7935");
21604 + IEEE80211_DEBUG(IEEE80211_DL_HT, "\tSupport CCK in 20/40 mode = %s\n", (pCapELE->DssCCk)?"YES": "NO");
21605 + IEEE80211_DEBUG(IEEE80211_DL_HT, "\tMax AMPDU Factor = %d\n", pCapELE->MaxRxAMPDUFactor);
21606 + IEEE80211_DEBUG(IEEE80211_DL_HT, "\tMPDU Density = %d\n", pCapELE->MPDUDensity);
21607 + IEEE80211_DEBUG(IEEE80211_DL_HT, "\tMCS Rate Set = [%x][%x][%x][%x][%x]\n", pCapELE->MCS[0],\
21608 + pCapELE->MCS[1], pCapELE->MCS[2], pCapELE->MCS[3], pCapELE->MCS[4]);
21609 + return;
21610 +
21611 +}
21612 +/********************************************************************************************************************
21613 + *function: This function print out each field on HT Information IE mainly from (Beacon/ProbeRsp)
21614 + * input: u8* InfoIE //Capability IE to be printed out
21615 + * u8* TitleString //mainly print out caller function
21616 + * output: none
21617 + * return: none
21618 + * notice: Driver should not print out this message by default.
21619 + * *****************************************************************************************************************/
21620 +void HTDebugHTInfo(u8* InfoIE, u8* TitleString)
21621 +{
21622 +
21623 + static u8 EWC11NHTInfo[] = {0x00, 0x90, 0x4c, 0x34}; // For 11n EWC definition, 2007.07.17, by Emily
21624 + PHT_INFORMATION_ELE pHTInfoEle;
21625 +
21626 + if(!memcmp(InfoIE, EWC11NHTInfo, sizeof(EWC11NHTInfo)))
21627 + {
21628 + // Not EWC IE
21629 + IEEE80211_DEBUG(IEEE80211_DL_HT, "EWC IE in %s()\n", __FUNCTION__);
21630 + pHTInfoEle = (PHT_INFORMATION_ELE)(&InfoIE[4]);
21631 + }else
21632 + pHTInfoEle = (PHT_INFORMATION_ELE)(&InfoIE[0]);
21633 +
21634 +
21635 + IEEE80211_DEBUG(IEEE80211_DL_HT, "<Log HT Information Element>. Called by %s\n", TitleString);
21636 +
21637 + IEEE80211_DEBUG(IEEE80211_DL_HT, "\tPrimary channel = %d\n", pHTInfoEle->ControlChl);
21638 + IEEE80211_DEBUG(IEEE80211_DL_HT, "\tSenondary channel =");
21639 + switch(pHTInfoEle->ExtChlOffset)
21640 + {
21641 + case 0:
21642 + IEEE80211_DEBUG(IEEE80211_DL_HT, "Not Present\n");
21643 + break;
21644 + case 1:
21645 + IEEE80211_DEBUG(IEEE80211_DL_HT, "Upper channel\n");
21646 + break;
21647 + case 2:
21648 + IEEE80211_DEBUG(IEEE80211_DL_HT, "Reserved. Eooro!!!\n");
21649 + break;
21650 + case 3:
21651 + IEEE80211_DEBUG(IEEE80211_DL_HT, "Lower Channel\n");
21652 + break;
21653 + }
21654 + IEEE80211_DEBUG(IEEE80211_DL_HT, "\tRecommended channel width = %s\n", (pHTInfoEle->RecommemdedTxWidth)?"20Mhz": "40Mhz");
21655 +
21656 + IEEE80211_DEBUG(IEEE80211_DL_HT, "\tOperation mode for protection = ");
21657 + switch(pHTInfoEle->OptMode)
21658 + {
21659 + case 0:
21660 + IEEE80211_DEBUG(IEEE80211_DL_HT, "No Protection\n");
21661 + break;
21662 + case 1:
21663 + IEEE80211_DEBUG(IEEE80211_DL_HT, "HT non-member protection mode\n");
21664 + break;
21665 + case 2:
21666 + IEEE80211_DEBUG(IEEE80211_DL_HT, "Suggest to open protection\n");
21667 + break;
21668 + case 3:
21669 + IEEE80211_DEBUG(IEEE80211_DL_HT, "HT mixed mode\n");
21670 + break;
21671 + }
21672 +
21673 + IEEE80211_DEBUG(IEEE80211_DL_HT, "\tBasic MCS Rate Set = [%x][%x][%x][%x][%x]\n", pHTInfoEle->BasicMSC[0],\
21674 + pHTInfoEle->BasicMSC[1], pHTInfoEle->BasicMSC[2], pHTInfoEle->BasicMSC[3], pHTInfoEle->BasicMSC[4]);
21675 + return;
21676 +}
21677 +
21678 +/*
21679 +* Return: true if station in half n mode and AP supports 40 bw
21680 +*/
21681 +bool IsHTHalfNmode40Bandwidth(struct ieee80211_device* ieee)
21682 +{
21683 + bool retValue = false;
21684 + PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
21685 +
21686 + if(pHTInfo->bCurrentHTSupport == false ) // wireless is n mode
21687 + retValue = false;
21688 + else if(pHTInfo->bRegBW40MHz == false) // station supports 40 bw
21689 + retValue = false;
21690 + else if(!ieee->GetHalfNmodeSupportByAPsHandler(ieee->dev)) // station in half n mode
21691 + retValue = false;
21692 + else if(((PHT_CAPABILITY_ELE)(pHTInfo->PeerHTCapBuf))->ChlWidth) // ap support 40 bw
21693 + retValue = true;
21694 + else
21695 + retValue = false;
21696 +
21697 + return retValue;
21698 +}
21699 +
21700 +bool IsHTHalfNmodeSGI(struct ieee80211_device* ieee, bool is40MHz)
21701 +{
21702 + bool retValue = false;
21703 + PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
21704 +
21705 + if(pHTInfo->bCurrentHTSupport == false ) // wireless is n mode
21706 + retValue = false;
21707 + else if(!ieee->GetHalfNmodeSupportByAPsHandler(ieee->dev)) // station in half n mode
21708 + retValue = false;
21709 + else if(is40MHz) // ap support 40 bw
21710 + {
21711 + if(((PHT_CAPABILITY_ELE)(pHTInfo->PeerHTCapBuf))->ShortGI40Mhz) // ap support 40 bw short GI
21712 + retValue = true;
21713 + else
21714 + retValue = false;
21715 + }
21716 + else
21717 + {
21718 + if(((PHT_CAPABILITY_ELE)(pHTInfo->PeerHTCapBuf))->ShortGI20Mhz) // ap support 40 bw short GI
21719 + retValue = true;
21720 + else
21721 + retValue = false;
21722 + }
21723 +
21724 + return retValue;
21725 +}
21726 +
21727 +u16 HTHalfMcsToDataRate(struct ieee80211_device* ieee, u8 nMcsRate)
21728 +{
21729 +
21730 + u8 is40MHz;
21731 + u8 isShortGI;
21732 +
21733 + is40MHz = (IsHTHalfNmode40Bandwidth(ieee))?1:0;
21734 + isShortGI = (IsHTHalfNmodeSGI(ieee, is40MHz))? 1:0;
21735 +
21736 + return MCS_DATA_RATE[is40MHz][isShortGI][(nMcsRate&0x7f)];
21737 +}
21738 +
21739 +
21740 +u16 HTMcsToDataRate( struct ieee80211_device* ieee, u8 nMcsRate)
21741 +{
21742 + PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
21743 +
21744 + u8 is40MHz = (pHTInfo->bCurBW40MHz)?1:0;
21745 + u8 isShortGI = (pHTInfo->bCurBW40MHz)?
21746 + ((pHTInfo->bCurShortGI40MHz)?1:0):
21747 + ((pHTInfo->bCurShortGI20MHz)?1:0);
21748 + return MCS_DATA_RATE[is40MHz][isShortGI][(nMcsRate&0x7f)];
21749 +}
21750 +
21751 +/********************************************************************************************************************
21752 + *function: This function returns current datarate.
21753 + * input: struct ieee80211_device* ieee
21754 + * u8 nDataRate
21755 + * output: none
21756 + * return: tx rate
21757 + * notice: quite unsure about how to use this function //wb
21758 + * *****************************************************************************************************************/
21759 +u16 TxCountToDataRate( struct ieee80211_device* ieee, u8 nDataRate)
21760 +{
21761 + //PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
21762 + u16 CCKOFDMRate[12] = {0x02 , 0x04 , 0x0b , 0x16 , 0x0c , 0x12 , 0x18 , 0x24 , 0x30 , 0x48 , 0x60 , 0x6c};
21763 + u8 is40MHz = 0;
21764 + u8 isShortGI = 0;
21765 +
21766 + if(nDataRate < 12)
21767 + {
21768 + return CCKOFDMRate[nDataRate];
21769 + }
21770 + else
21771 + {
21772 + if (nDataRate >= 0x10 && nDataRate <= 0x1f)//if(nDataRate > 11 && nDataRate < 28 )
21773 + {
21774 + is40MHz = 0;
21775 + isShortGI = 0;
21776 +
21777 + // nDataRate = nDataRate - 12;
21778 + }
21779 + else if(nDataRate >=0x20 && nDataRate <= 0x2f ) //(27, 44)
21780 + {
21781 + is40MHz = 1;
21782 + isShortGI = 0;
21783 +
21784 + //nDataRate = nDataRate - 28;
21785 + }
21786 + else if(nDataRate >= 0x30 && nDataRate <= 0x3f ) //(43, 60)
21787 + {
21788 + is40MHz = 0;
21789 + isShortGI = 1;
21790 +
21791 + //nDataRate = nDataRate - 44;
21792 + }
21793 + else if(nDataRate >= 0x40 && nDataRate <= 0x4f ) //(59, 76)
21794 + {
21795 + is40MHz = 1;
21796 + isShortGI = 1;
21797 +
21798 + //nDataRate = nDataRate - 60;
21799 + }
21800 + return MCS_DATA_RATE[is40MHz][isShortGI][nDataRate&0xf];
21801 + }
21802 +}
21803 +
21804 +
21805 +
21806 +bool IsHTHalfNmodeAPs(struct ieee80211_device* ieee)
21807 +{
21808 + bool retValue = false;
21809 + struct ieee80211_network* net = &ieee->current_network;
21810 +#if 0
21811 + if(pMgntInfo->bHalfNMode == false)
21812 + retValue = false;
21813 + else
21814 +#endif
21815 + if((memcmp(net->bssid, BELKINF5D8233V1_RALINK, 3)==0) ||
21816 + (memcmp(net->bssid, BELKINF5D82334V3_RALINK, 3)==0) ||
21817 + (memcmp(net->bssid, PCI_RALINK, 3)==0) ||
21818 + (memcmp(net->bssid, EDIMAX_RALINK, 3)==0) ||
21819 + (memcmp(net->bssid, AIRLINK_RALINK, 3)==0) ||
21820 + (net->ralink_cap_exist))
21821 + retValue = true;
21822 + else if((memcmp(net->bssid, UNKNOWN_BORADCOM, 3)==0) ||
21823 + (memcmp(net->bssid, LINKSYSWRT330_LINKSYSWRT300_BROADCOM, 3)==0)||
21824 + (memcmp(net->bssid, LINKSYSWRT350_LINKSYSWRT150_BROADCOM, 3)==0)||
21825 + (memcmp(net->bssid, NETGEAR834Bv2_BROADCOM, 3)==0) ||
21826 + (net->broadcom_cap_exist))
21827 + retValue = true;
21828 + else if(net->bssht.bdRT2RTAggregation)
21829 + retValue = true;
21830 + else
21831 + retValue = false;
21832 +
21833 + return retValue;
21834 +}
21835 +
21836 +/********************************************************************************************************************
21837 + *function: This function returns peer IOT.
21838 + * input: struct ieee80211_device* ieee
21839 + * output: none
21840 + * return:
21841 + * notice:
21842 + * *****************************************************************************************************************/
21843 +void HTIOTPeerDetermine(struct ieee80211_device* ieee)
21844 +{
21845 + PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
21846 + struct ieee80211_network* net = &ieee->current_network;
21847 + if(net->bssht.bdRT2RTAggregation)
21848 + pHTInfo->IOTPeer = HT_IOT_PEER_REALTEK;
21849 + else if(net->broadcom_cap_exist)
21850 + pHTInfo->IOTPeer = HT_IOT_PEER_BROADCOM;
21851 + else if((memcmp(net->bssid, UNKNOWN_BORADCOM, 3)==0) ||
21852 + (memcmp(net->bssid, LINKSYSWRT330_LINKSYSWRT300_BROADCOM, 3)==0)||
21853 + (memcmp(net->bssid, LINKSYSWRT350_LINKSYSWRT150_BROADCOM, 3)==0)||
21854 + (memcmp(net->bssid, NETGEAR834Bv2_BROADCOM, 3)==0) )
21855 + pHTInfo->IOTPeer = HT_IOT_PEER_BROADCOM;
21856 + else if((memcmp(net->bssid, BELKINF5D8233V1_RALINK, 3)==0) ||
21857 + (memcmp(net->bssid, BELKINF5D82334V3_RALINK, 3)==0) ||
21858 + (memcmp(net->bssid, PCI_RALINK, 3)==0) ||
21859 + (memcmp(net->bssid, EDIMAX_RALINK, 3)==0) ||
21860 + (memcmp(net->bssid, AIRLINK_RALINK, 3)==0) ||
21861 + net->ralink_cap_exist)
21862 + pHTInfo->IOTPeer = HT_IOT_PEER_RALINK;
21863 + else if((net->atheros_cap_exist )|| (memcmp(net->bssid, DLINK_ATHEROS, 3) == 0))
21864 + pHTInfo->IOTPeer = HT_IOT_PEER_ATHEROS;
21865 + else if(memcmp(net->bssid, CISCO_BROADCOM, 3)==0)
21866 + pHTInfo->IOTPeer = HT_IOT_PEER_CISCO;
21867 + else
21868 + pHTInfo->IOTPeer = HT_IOT_PEER_UNKNOWN;
21869 +
21870 + IEEE80211_DEBUG(IEEE80211_DL_IOT, "Joseph debug!! IOTPEER: %x\n", pHTInfo->IOTPeer);
21871 +}
21872 +/********************************************************************************************************************
21873 + *function: Check whether driver should declare received rate up to MCS13 only since some chipset is not good
21874 + * at receiving MCS14~15 frame from some AP.
21875 + * input: struct ieee80211_device* ieee
21876 + * u8 * PeerMacAddr
21877 + * output: none
21878 + * return: return 1 if driver should declare MCS13 only(otherwise return 0)
21879 + * *****************************************************************************************************************/
21880 +u8 HTIOTActIsDisableMCS14(struct ieee80211_device* ieee, u8* PeerMacAddr)
21881 +{
21882 + u8 ret = 0;
21883 +#if 0
21884 + // Apply for 819u only
21885 +#if (HAL_CODE_BASE==RTL8192 && DEV_BUS_TYPE==USB_INTERFACE)
21886 + if((memcmp(PeerMacAddr, UNKNOWN_BORADCOM, 3)==0) ||
21887 + (memcmp(PeerMacAddr, LINKSYSWRT330_LINKSYSWRT300_BROADCOM, 3)==0)
21888 + )
21889 + {
21890 + ret = 1;
21891 + }
21892 +
21893 +
21894 + if(pHTInfo->bCurrentRT2RTAggregation)
21895 + {
21896 + // The parameter of pHTInfo->bCurrentRT2RTAggregation must be decided previously
21897 + ret = 1;
21898 + }
21899 +#endif
21900 +#endif
21901 + return ret;
21902 + }
21903 +
21904 +
21905 +/**
21906 +* Function: HTIOTActIsDisableMCS15
21907 +*
21908 +* Overview: Check whether driver should declare capability of receving MCS15
21909 +*
21910 +* Input:
21911 +* PADAPTER Adapter,
21912 +*
21913 +* Output: None
21914 +* Return: true if driver should disable MCS15
21915 +* 2008.04.15 Emily
21916 +*/
21917 +bool HTIOTActIsDisableMCS15(struct ieee80211_device* ieee)
21918 +{
21919 + bool retValue = false;
21920 +
21921 +#ifdef TODO
21922 + // Apply for 819u only
21923 +#if (HAL_CODE_BASE==RTL8192)
21924 +
21925 +#if (DEV_BUS_TYPE == USB_INTERFACE)
21926 + // Alway disable MCS15 by Jerry Chang's request.by Emily, 2008.04.15
21927 + retValue = true;
21928 +#elif (DEV_BUS_TYPE == PCI_INTERFACE)
21929 + // Enable MCS15 if the peer is Cisco AP. by Emily, 2008.05.12
21930 +// if(pBssDesc->bCiscoCapExist)
21931 +// retValue = false;
21932 +// else
21933 + retValue = false;
21934 +#endif
21935 +#endif
21936 +#endif
21937 + // Jerry Chang suggest that 8190 1x2 does not need to disable MCS15
21938 +
21939 + return retValue;
21940 +}
21941 +
21942 +/**
21943 +* Function: HTIOTActIsDisableMCSTwoSpatialStream
21944 +*
21945 +* Overview: Check whether driver should declare capability of receving All 2 ss packets
21946 +*
21947 +* Input:
21948 +* PADAPTER Adapter,
21949 +*
21950 +* Output: None
21951 +* Return: true if driver should disable all two spatial stream packet
21952 +* 2008.04.21 Emily
21953 +*/
21954 +bool HTIOTActIsDisableMCSTwoSpatialStream(struct ieee80211_device* ieee, u8 *PeerMacAddr)
21955 +{
21956 + bool retValue = false;
21957 +
21958 +#ifdef TODO
21959 + // Apply for 819u only
21960 +//#if (HAL_CODE_BASE==RTL8192)
21961 +
21962 + //This rule only apply to Belkin(Ralink) AP
21963 + if(IS_UNDER_11N_AES_MODE(Adapter))
21964 + {
21965 + if((PlatformCompareMemory(PeerMacAddr, BELKINF5D8233V1_RALINK, 3)==0) ||
21966 + (PlatformCompareMemory(PeerMacAddr, PCI_RALINK, 3)==0) ||
21967 + (PlatformCompareMemory(PeerMacAddr, EDIMAX_RALINK, 3)==0))
21968 + {
21969 + //Set True to disable this function. Disable by default, Emily, 2008.04.23
21970 + retValue = false;
21971 + }
21972 + }
21973 +
21974 +//#endif
21975 +#endif
21976 + return retValue;
21977 +}
21978 +
21979 +/********************************************************************************************************************
21980 + *function: Check whether driver should disable EDCA turbo mode
21981 + * input: struct ieee80211_device* ieee
21982 + * u8* PeerMacAddr
21983 + * output: none
21984 + * return: return 1 if driver should disable EDCA turbo mode(otherwise return 0)
21985 + * *****************************************************************************************************************/
21986 +u8 HTIOTActIsDisableEDCATurbo(struct ieee80211_device* ieee, u8* PeerMacAddr)
21987 +{
21988 + u8 retValue = false; // default enable EDCA Turbo mode.
21989 + // Set specific EDCA parameter for different AP in DM handler.
21990 +
21991 + return retValue;
21992 +#if 0
21993 + if((memcmp(PeerMacAddr, UNKNOWN_BORADCOM, 3)==0)||
21994 + (memcmp(PeerMacAddr, LINKSYSWRT330_LINKSYSWRT300_BROADCOM, 3)==0)||
21995 + (memcmp(PeerMacAddr, LINKSYSWRT350_LINKSYSWRT150_BROADCOM, 3)==0)||
21996 + (memcmp(PeerMacAddr, NETGEAR834Bv2_BROADCOM, 3)==0))
21997 +
21998 + {
21999 + retValue = 1; //Linksys disable EDCA turbo mode
22000 + }
22001 +
22002 + return retValue;
22003 +#endif
22004 +}
22005 +
22006 +/********************************************************************************************************************
22007 + *function: Check whether we need to use OFDM to sned MGNT frame for broadcom AP
22008 + * input: struct ieee80211_network *network //current network we live
22009 + * output: none
22010 + * return: return 1 if true
22011 + * *****************************************************************************************************************/
22012 +u8 HTIOTActIsMgntUseCCK6M(struct ieee80211_network *network)
22013 +{
22014 + u8 retValue = 0;
22015 +
22016 + // 2008/01/25 MH Judeg if we need to use OFDM to sned MGNT frame for broadcom AP.
22017 + // 2008/01/28 MH We must prevent that we select null bssid to link.
22018 +
22019 + if(network->broadcom_cap_exist)
22020 + {
22021 + retValue = 1;
22022 + }
22023 +
22024 + return retValue;
22025 +}
22026 +
22027 +u8 HTIOTActIsCCDFsync(u8* PeerMacAddr)
22028 +{
22029 + u8 retValue = 0;
22030 + if( (memcmp(PeerMacAddr, UNKNOWN_BORADCOM, 3)==0) ||
22031 + (memcmp(PeerMacAddr, LINKSYSWRT330_LINKSYSWRT300_BROADCOM, 3)==0) ||
22032 + (memcmp(PeerMacAddr, LINKSYSWRT350_LINKSYSWRT150_BROADCOM, 3) ==0))
22033 + {
22034 + retValue = 1;
22035 + }
22036 +
22037 + return retValue;
22038 +}
22039 +
22040 +void HTResetIOTSetting(
22041 + PRT_HIGH_THROUGHPUT pHTInfo
22042 +)
22043 +{
22044 + pHTInfo->IOTAction = 0;
22045 + pHTInfo->IOTPeer = HT_IOT_PEER_UNKNOWN;
22046 +}
22047 +
22048 +
22049 +/********************************************************************************************************************
22050 + *function: Construct Capablility Element in Beacon... if HTEnable is turned on
22051 + * input: struct ieee80211_device* ieee
22052 + * u8* posHTCap //pointer to store Capability Ele
22053 + * u8* len //store length of CE
22054 + * u8 IsEncrypt //whether encrypt, needed further
22055 + * output: none
22056 + * return: none
22057 + * notice: posHTCap can't be null and should be initialized before.
22058 + * *****************************************************************************************************************/
22059 +void HTConstructCapabilityElement(struct ieee80211_device* ieee, u8* posHTCap, u8* len, u8 IsEncrypt)
22060 +{
22061 + PRT_HIGH_THROUGHPUT pHT = ieee->pHTInfo;
22062 + PHT_CAPABILITY_ELE pCapELE = NULL;
22063 + //u8 bIsDeclareMCS13;
22064 +
22065 + if ((posHTCap == NULL) || (pHT == NULL))
22066 + {
22067 + IEEE80211_DEBUG(IEEE80211_DL_ERR, "posHTCap or pHTInfo can't be null in HTConstructCapabilityElement()\n");
22068 + return;
22069 + }
22070 + memset(posHTCap, 0, *len);
22071 + if(pHT->ePeerHTSpecVer == HT_SPEC_VER_EWC)
22072 + {
22073 + u8 EWC11NHTCap[] = {0x00, 0x90, 0x4c, 0x33}; // For 11n EWC definition, 2007.07.17, by Emily
22074 + memcpy(posHTCap, EWC11NHTCap, sizeof(EWC11NHTCap));
22075 + pCapELE = (PHT_CAPABILITY_ELE)&(posHTCap[4]);
22076 + }else
22077 + {
22078 + pCapELE = (PHT_CAPABILITY_ELE)posHTCap;
22079 + }
22080 +
22081 +
22082 + //HT capability info
22083 + pCapELE->AdvCoding = 0; // This feature is not supported now!!
22084 + if(ieee->GetHalfNmodeSupportByAPsHandler(ieee->dev))
22085 + {
22086 + pCapELE->ChlWidth = 0;
22087 + }
22088 + else
22089 + {
22090 + pCapELE->ChlWidth = (pHT->bRegBW40MHz?1:0);
22091 + }
22092 +
22093 +// pCapELE->ChlWidth = (pHT->bRegBW40MHz?1:0);
22094 + pCapELE->MimoPwrSave = pHT->SelfMimoPs;
22095 + pCapELE->GreenField = 0; // This feature is not supported now!!
22096 + pCapELE->ShortGI20Mhz = 1; // We can receive Short GI!!
22097 + pCapELE->ShortGI40Mhz = 1; // We can receive Short GI!!
22098 + //DbgPrint("TX HT cap/info ele BW=%d SG20=%d SG40=%d\n\r",
22099 + //pCapELE->ChlWidth, pCapELE->ShortGI20Mhz, pCapELE->ShortGI40Mhz);
22100 + pCapELE->TxSTBC = 1;
22101 + pCapELE->RxSTBC = 0;
22102 + pCapELE->DelayBA = 0; // Do not support now!!
22103 + pCapELE->MaxAMSDUSize = (MAX_RECEIVE_BUFFER_SIZE>=7935)?1:0;
22104 + pCapELE->DssCCk = ((pHT->bRegBW40MHz)?(pHT->bRegSuppCCK?1:0):0);
22105 + pCapELE->PSMP = 0; // Do not support now!!
22106 + pCapELE->LSigTxopProtect = 0; // Do not support now!!
22107 +
22108 +
22109 + //MAC HT parameters info
22110 + // TODO: Nedd to take care of this part
22111 + IEEE80211_DEBUG(IEEE80211_DL_HT, "TX HT cap/info ele BW=%d MaxAMSDUSize:%d DssCCk:%d\n", pCapELE->ChlWidth, pCapELE->MaxAMSDUSize, pCapELE->DssCCk);
22112 +
22113 + if( IsEncrypt)
22114 + {
22115 + pCapELE->MPDUDensity = 7; // 8us
22116 + pCapELE->MaxRxAMPDUFactor = 2; // 2 is for 32 K and 3 is 64K
22117 + }
22118 + else
22119 + {
22120 + pCapELE->MaxRxAMPDUFactor = 3; // 2 is for 32 K and 3 is 64K
22121 + pCapELE->MPDUDensity = 0; // no density
22122 + }
22123 +
22124 + //Supported MCS set
22125 + memcpy(pCapELE->MCS, ieee->Regdot11HTOperationalRateSet, 16);
22126 + if(pHT->IOTAction & HT_IOT_ACT_DISABLE_MCS15)
22127 + pCapELE->MCS[1] &= 0x7f;
22128 +
22129 + if(pHT->IOTAction & HT_IOT_ACT_DISABLE_MCS14)
22130 + pCapELE->MCS[1] &= 0xbf;
22131 +
22132 + if(pHT->IOTAction & HT_IOT_ACT_DISABLE_ALL_2SS)
22133 + pCapELE->MCS[1] &= 0x00;
22134 +
22135 + // 2008.06.12
22136 + // For RTL819X, if pairwisekey = wep/tkip, ap is ralink, we support only MCS0~7.
22137 + if(ieee->GetHalfNmodeSupportByAPsHandler(ieee->dev))
22138 + {
22139 + int i;
22140 + for(i = 1; i< 16; i++)
22141 + pCapELE->MCS[i] = 0;
22142 + }
22143 +
22144 + //Extended HT Capability Info
22145 + memset(&pCapELE->ExtHTCapInfo, 0, 2);
22146 +
22147 +
22148 + //TXBF Capabilities
22149 + memset(pCapELE->TxBFCap, 0, 4);
22150 +
22151 + //Antenna Selection Capabilities
22152 + pCapELE->ASCap = 0;
22153 +//add 2 to give space for element ID and len when construct frames
22154 + if(pHT->ePeerHTSpecVer == HT_SPEC_VER_EWC)
22155 + *len = 30 + 2;
22156 + else
22157 + *len = 26 + 2;
22158 +
22159 +
22160 +
22161 +// IEEE80211_DEBUG_DATA(IEEE80211_DL_DATA | IEEE80211_DL_HT, posHTCap, *len -2);
22162 +
22163 + //Print each field in detail. Driver should not print out this message by default
22164 +// HTDebugHTCapability(posHTCap, (u8*)"HTConstructCapability()");
22165 + return;
22166 +
22167 +}
22168 +/********************************************************************************************************************
22169 + *function: Construct Information Element in Beacon... if HTEnable is turned on
22170 + * input: struct ieee80211_device* ieee
22171 + * u8* posHTCap //pointer to store Information Ele
22172 + * u8* len //store len of
22173 + * u8 IsEncrypt //whether encrypt, needed further
22174 + * output: none
22175 + * return: none
22176 + * notice: posHTCap can't be null and be initialized before. only AP and IBSS sta should do this
22177 + * *****************************************************************************************************************/
22178 +void HTConstructInfoElement(struct ieee80211_device* ieee, u8* posHTInfo, u8* len, u8 IsEncrypt)
22179 +{
22180 + PRT_HIGH_THROUGHPUT pHT = ieee->pHTInfo;
22181 + PHT_INFORMATION_ELE pHTInfoEle = (PHT_INFORMATION_ELE)posHTInfo;
22182 + if ((posHTInfo == NULL) || (pHTInfoEle == NULL))
22183 + {
22184 + IEEE80211_DEBUG(IEEE80211_DL_ERR, "posHTInfo or pHTInfoEle can't be null in HTConstructInfoElement()\n");
22185 + return;
22186 + }
22187 +
22188 + memset(posHTInfo, 0, *len);
22189 + if ( (ieee->iw_mode == IW_MODE_ADHOC) || (ieee->iw_mode == IW_MODE_MASTER)) //ap mode is not currently supported
22190 + {
22191 + pHTInfoEle->ControlChl = ieee->current_network.channel;
22192 + pHTInfoEle->ExtChlOffset = ((pHT->bRegBW40MHz == false)?HT_EXTCHNL_OFFSET_NO_EXT:
22193 + (ieee->current_network.channel<=6)?
22194 + HT_EXTCHNL_OFFSET_UPPER:HT_EXTCHNL_OFFSET_LOWER);
22195 + pHTInfoEle->RecommemdedTxWidth = pHT->bRegBW40MHz;
22196 + pHTInfoEle->RIFS = 0;
22197 + pHTInfoEle->PSMPAccessOnly = 0;
22198 + pHTInfoEle->SrvIntGranularity = 0;
22199 + pHTInfoEle->OptMode = pHT->CurrentOpMode;
22200 + pHTInfoEle->NonGFDevPresent = 0;
22201 + pHTInfoEle->DualBeacon = 0;
22202 + pHTInfoEle->SecondaryBeacon = 0;
22203 + pHTInfoEle->LSigTxopProtectFull = 0;
22204 + pHTInfoEle->PcoActive = 0;
22205 + pHTInfoEle->PcoPhase = 0;
22206 +
22207 + memset(pHTInfoEle->BasicMSC, 0, 16);
22208 +
22209 +
22210 + *len = 22 + 2; //same above
22211 +
22212 + }
22213 + else
22214 + {
22215 + //STA should not generate High Throughput Information Element
22216 + *len = 0;
22217 + }
22218 + //IEEE80211_DEBUG_DATA(IEEE80211_DL_DATA | IEEE80211_DL_HT, posHTInfo, *len - 2);
22219 + //HTDebugHTInfo(posHTInfo, "HTConstructInforElement");
22220 + return;
22221 +}
22222 +
22223 +/*
22224 + * According to experiment, Realtek AP to STA (based on rtl8190) may achieve best performance
22225 + * if both STA and AP set limitation of aggregation size to 32K, that is, set AMPDU density to 2
22226 + * (Ref: IEEE 11n specification). However, if Realtek STA associates to other AP, STA should set
22227 + * limitation of aggregation size to 8K, otherwise, performance of traffic stream from STA to AP
22228 + * will be much less than the traffic stream from AP to STA if both of the stream runs concurrently
22229 + * at the same time.
22230 + *
22231 + * Frame Format
22232 + * Element ID Length OUI Type1 Reserved
22233 + * 1 byte 1 byte 3 bytes 1 byte 1 byte
22234 + *
22235 + * OUI = 0x00, 0xe0, 0x4c,
22236 + * Type = 0x02
22237 + * Reserved = 0x00
22238 + *
22239 + * 2007.8.21 by Emily
22240 +*/
22241 +/********************************************************************************************************************
22242 + *function: Construct Information Element in Beacon... in RT2RT condition
22243 + * input: struct ieee80211_device* ieee
22244 + * u8* posRT2RTAgg //pointer to store Information Ele
22245 + * u8* len //store len
22246 + * output: none
22247 + * return: none
22248 + * notice:
22249 + * *****************************************************************************************************************/
22250 +void HTConstructRT2RTAggElement(struct ieee80211_device* ieee, u8* posRT2RTAgg, u8* len)
22251 +{
22252 + if (posRT2RTAgg == NULL) {
22253 + IEEE80211_DEBUG(IEEE80211_DL_ERR, "posRT2RTAgg can't be null in HTConstructRT2RTAggElement()\n");
22254 + return;
22255 + }
22256 + memset(posRT2RTAgg, 0, *len);
22257 + *posRT2RTAgg++ = 0x00;
22258 + *posRT2RTAgg++ = 0xe0;
22259 + *posRT2RTAgg++ = 0x4c;
22260 + *posRT2RTAgg++ = 0x02;
22261 + *posRT2RTAgg++ = 0x01;
22262 + *posRT2RTAgg = 0x10;//*posRT2RTAgg = 0x02;
22263 +
22264 + if(ieee->bSupportRemoteWakeUp) {
22265 + *posRT2RTAgg |= 0x08;//RT_HT_CAP_USE_WOW;
22266 + }
22267 +
22268 + *len = 6 + 2;
22269 + return;
22270 +#ifdef TODO
22271 +#if(HAL_CODE_BASE == RTL8192 && DEV_BUS_TYPE == USB_INTERFACE)
22272 + /*
22273 + //Emily. If it is required to Ask Realtek AP to send AMPDU during AES mode, enable this
22274 + section of code.
22275 + if(IS_UNDER_11N_AES_MODE(Adapter))
22276 + {
22277 + posRT2RTAgg->Octet[5] |=RT_HT_CAP_USE_AMPDU;
22278 + }else
22279 + {
22280 + posRT2RTAgg->Octet[5] &= 0xfb;
22281 + }
22282 + */
22283 +
22284 +#else
22285 + // Do Nothing
22286 +#endif
22287 +
22288 + posRT2RTAgg->Length = 6;
22289 +#endif
22290 +
22291 +
22292 +
22293 +
22294 +}
22295 +
22296 +
22297 +/********************************************************************************************************************
22298 + *function: Pick the right Rate Adaptive table to use
22299 + * input: struct ieee80211_device* ieee
22300 + * u8* pOperateMCS //A pointer to MCS rate bitmap
22301 + * return: always we return true
22302 + * notice:
22303 + * *****************************************************************************************************************/
22304 +u8 HT_PickMCSRate(struct ieee80211_device* ieee, u8* pOperateMCS)
22305 +{
22306 + u8 i;
22307 + if (pOperateMCS == NULL)
22308 + {
22309 + IEEE80211_DEBUG(IEEE80211_DL_ERR, "pOperateMCS can't be null in HT_PickMCSRate()\n");
22310 + return false;
22311 + }
22312 +
22313 + switch(ieee->mode)
22314 + {
22315 + case IEEE_A:
22316 + case IEEE_B:
22317 + case IEEE_G:
22318 + //legacy rate routine handled at selectedrate
22319 +
22320 + //no MCS rate
22321 + for(i=0;i<=15;i++){
22322 + pOperateMCS[i] = 0;
22323 + }
22324 + break;
22325 +
22326 + case IEEE_N_24G: //assume CCK rate ok
22327 + case IEEE_N_5G:
22328 + // Legacy part we only use 6, 5.5,2,1 for N_24G and 6 for N_5G.
22329 + // Legacy part shall be handled at SelectRateSet().
22330 +
22331 + //HT part
22332 + // TODO: may be different if we have different number of antenna
22333 + pOperateMCS[0] &=RATE_ADPT_1SS_MASK; //support MCS 0~7
22334 + pOperateMCS[1] &=RATE_ADPT_2SS_MASK;
22335 + pOperateMCS[3] &=RATE_ADPT_MCS32_MASK;
22336 + break;
22337 +
22338 + //should never reach here
22339 + default:
22340 +
22341 + break;
22342 +
22343 + }
22344 +
22345 + return true;
22346 +}
22347 +
22348 +/*
22349 +* Description:
22350 +* This function will get the highest speed rate in input MCS set.
22351 +*
22352 +* /param Adapter Pionter to Adapter entity
22353 +* pMCSRateSet Pointer to MCS rate bitmap
22354 +* pMCSFilter Pointer to MCS rate filter
22355 +*
22356 +* /return Highest MCS rate included in pMCSRateSet and filtered by pMCSFilter.
22357 +*
22358 +*/
22359 +/********************************************************************************************************************
22360 + *function: This function will get the highest speed rate in input MCS set.
22361 + * input: struct ieee80211_device* ieee
22362 + * u8* pMCSRateSet //Pointer to MCS rate bitmap
22363 + * u8* pMCSFilter //Pointer to MCS rate filter
22364 + * return: Highest MCS rate included in pMCSRateSet and filtered by pMCSFilter
22365 + * notice:
22366 + * *****************************************************************************************************************/
22367 +u8 HTGetHighestMCSRate(struct ieee80211_device* ieee, u8* pMCSRateSet, u8* pMCSFilter)
22368 +{
22369 + u8 i, j;
22370 + u8 bitMap;
22371 + u8 mcsRate = 0;
22372 + u8 availableMcsRate[16];
22373 + if (pMCSRateSet == NULL || pMCSFilter == NULL)
22374 + {
22375 + IEEE80211_DEBUG(IEEE80211_DL_ERR, "pMCSRateSet or pMCSFilter can't be null in HTGetHighestMCSRate()\n");
22376 + return false;
22377 + }
22378 + for(i=0; i<16; i++)
22379 + availableMcsRate[i] = pMCSRateSet[i] & pMCSFilter[i];
22380 +
22381 + for(i = 0; i < 16; i++)
22382 + {
22383 + if(availableMcsRate[i] != 0)
22384 + break;
22385 + }
22386 + if(i == 16)
22387 + return false;
22388 +
22389 + for(i = 0; i < 16; i++)
22390 + {
22391 + if(availableMcsRate[i] != 0)
22392 + {
22393 + bitMap = availableMcsRate[i];
22394 + for(j = 0; j < 8; j++)
22395 + {
22396 + if((bitMap%2) != 0)
22397 + {
22398 + if(HTMcsToDataRate(ieee, (8*i+j)) > HTMcsToDataRate(ieee, mcsRate))
22399 + mcsRate = (8*i+j);
22400 + }
22401 + bitMap = bitMap>>1;
22402 + }
22403 + }
22404 + }
22405 + return (mcsRate|0x80);
22406 +}
22407 +
22408 +
22409 +
22410 +/*
22411 +**
22412 +**1.Filter our operation rate set with AP's rate set
22413 +**2.shall reference channel bandwidth, STBC, Antenna number
22414 +**3.generate rate adative table for firmware
22415 +**David 20060906
22416 +**
22417 +** \pHTSupportedCap: the connected STA's supported rate Capability element
22418 +*/
22419 +u8 HTFilterMCSRate( struct ieee80211_device* ieee, u8* pSupportMCS, u8* pOperateMCS)
22420 +{
22421 +
22422 + u8 i=0;
22423 +
22424 + // filter out operational rate set not supported by AP, the lenth of it is 16
22425 + for(i=0;i<=15;i++){
22426 + pOperateMCS[i] = ieee->Regdot11HTOperationalRateSet[i]&pSupportMCS[i];
22427 + }
22428 +
22429 +
22430 + // TODO: adjust our operational rate set according to our channel bandwidth, STBC and Antenna number
22431 +
22432 + // TODO: fill suggested rate adaptive rate index and give firmware info using Tx command packet
22433 + // we also shall suggested the first start rate set according to our singal strength
22434 + HT_PickMCSRate(ieee, pOperateMCS);
22435 +
22436 + // For RTL819X, if pairwisekey = wep/tkip, we support only MCS0~7.
22437 + if(ieee->GetHalfNmodeSupportByAPsHandler(ieee->dev))
22438 + pOperateMCS[1] = 0;
22439 +
22440 + //
22441 + // For RTL819X, we support only MCS0~15.
22442 + // And also, we do not know how to use MCS32 now.
22443 + //
22444 + for(i=2; i<=15; i++)
22445 + pOperateMCS[i] = 0;
22446 +
22447 + return true;
22448 +}
22449 +void HTSetConnectBwMode(struct ieee80211_device* ieee, HT_CHANNEL_WIDTH Bandwidth, HT_EXTCHNL_OFFSET Offset);
22450 +#if 0
22451 +//I need move this function to other places, such as rx?
22452 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
22453 +void HTOnAssocRsp_wq(struct work_struct *work)
22454 +{
22455 + struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, ht_onAssRsp);
22456 +#else
22457 +void HTOnAssocRsp_wq(struct ieee80211_device *ieee)
22458 +{
22459 +#endif
22460 +#endif
22461 +void HTOnAssocRsp(struct ieee80211_device *ieee)
22462 +{
22463 + PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
22464 + PHT_CAPABILITY_ELE pPeerHTCap = NULL;
22465 + PHT_INFORMATION_ELE pPeerHTInfo = NULL;
22466 + u16 nMaxAMSDUSize = 0;
22467 + u8* pMcsFilter = NULL;
22468 +
22469 + static u8 EWC11NHTCap[] = {0x00, 0x90, 0x4c, 0x33}; // For 11n EWC definition, 2007.07.17, by Emily
22470 + static u8 EWC11NHTInfo[] = {0x00, 0x90, 0x4c, 0x34}; // For 11n EWC definition, 2007.07.17, by Emily
22471 +
22472 + if( pHTInfo->bCurrentHTSupport == false )
22473 + {
22474 + IEEE80211_DEBUG(IEEE80211_DL_ERR, "<=== HTOnAssocRsp(): HT_DISABLE\n");
22475 + return;
22476 + }
22477 + IEEE80211_DEBUG(IEEE80211_DL_HT, "===> HTOnAssocRsp_wq(): HT_ENABLE\n");
22478 +// IEEE80211_DEBUG_DATA(IEEE80211_DL_DATA, pHTInfo->PeerHTCapBuf, sizeof(HT_CAPABILITY_ELE));
22479 +// IEEE80211_DEBUG_DATA(IEEE80211_DL_DATA, pHTInfo->PeerHTInfoBuf, sizeof(HT_INFORMATION_ELE));
22480 +
22481 +// HTDebugHTCapability(pHTInfo->PeerHTCapBuf,"HTOnAssocRsp_wq");
22482 +// HTDebugHTInfo(pHTInfo->PeerHTInfoBuf,"HTOnAssocRsp_wq");
22483 + //
22484 + if(!memcmp(pHTInfo->PeerHTCapBuf,EWC11NHTCap, sizeof(EWC11NHTCap)))
22485 + pPeerHTCap = (PHT_CAPABILITY_ELE)(&pHTInfo->PeerHTCapBuf[4]);
22486 + else
22487 + pPeerHTCap = (PHT_CAPABILITY_ELE)(pHTInfo->PeerHTCapBuf);
22488 +
22489 + if(!memcmp(pHTInfo->PeerHTInfoBuf, EWC11NHTInfo, sizeof(EWC11NHTInfo)))
22490 + pPeerHTInfo = (PHT_INFORMATION_ELE)(&pHTInfo->PeerHTInfoBuf[4]);
22491 + else
22492 + pPeerHTInfo = (PHT_INFORMATION_ELE)(pHTInfo->PeerHTInfoBuf);
22493 +
22494 +
22495 + ////////////////////////////////////////////////////////
22496 + // Configurations:
22497 + ////////////////////////////////////////////////////////
22498 + IEEE80211_DEBUG_DATA(IEEE80211_DL_DATA|IEEE80211_DL_HT, pPeerHTCap, sizeof(HT_CAPABILITY_ELE));
22499 +// IEEE80211_DEBUG_DATA(IEEE80211_DL_DATA|IEEE80211_DL_HT, pPeerHTInfo, sizeof(HT_INFORMATION_ELE));
22500 + // Config Supported Channel Width setting
22501 + //
22502 + HTSetConnectBwMode(ieee, (HT_CHANNEL_WIDTH)(pPeerHTCap->ChlWidth), (HT_EXTCHNL_OFFSET)(pPeerHTInfo->ExtChlOffset));
22503 +
22504 +// if(pHTInfo->bCurBW40MHz == true)
22505 + pHTInfo->bCurTxBW40MHz = ((pPeerHTInfo->RecommemdedTxWidth == 1)?true:false);
22506 +
22507 + //
22508 + // Update short GI/ long GI setting
22509 + //
22510 + // TODO:
22511 + pHTInfo->bCurShortGI20MHz=
22512 + ((pHTInfo->bRegShortGI20MHz)?((pPeerHTCap->ShortGI20Mhz==1)?true:false):false);
22513 + pHTInfo->bCurShortGI40MHz=
22514 + ((pHTInfo->bRegShortGI40MHz)?((pPeerHTCap->ShortGI40Mhz==1)?true:false):false);
22515 +
22516 + //
22517 + // Config TX STBC setting
22518 + //
22519 + // TODO:
22520 +
22521 + //
22522 + // Config DSSS/CCK mode in 40MHz mode
22523 + //
22524 + // TODO:
22525 + pHTInfo->bCurSuppCCK =
22526 + ((pHTInfo->bRegSuppCCK)?((pPeerHTCap->DssCCk==1)?true:false):false);
22527 +
22528 +
22529 + //
22530 + // Config and configure A-MSDU setting
22531 + //
22532 + pHTInfo->bCurrent_AMSDU_Support = pHTInfo->bAMSDU_Support;
22533 +
22534 + nMaxAMSDUSize = (pPeerHTCap->MaxAMSDUSize==0)?3839:7935;
22535 +
22536 + if(pHTInfo->nAMSDU_MaxSize > nMaxAMSDUSize )
22537 + pHTInfo->nCurrent_AMSDU_MaxSize = nMaxAMSDUSize;
22538 + else
22539 + pHTInfo->nCurrent_AMSDU_MaxSize = pHTInfo->nAMSDU_MaxSize;
22540 +
22541 +
22542 + //
22543 + // Config A-MPDU setting
22544 + //
22545 + pHTInfo->bCurrentAMPDUEnable = pHTInfo->bAMPDUEnable;
22546 +
22547 + // <1> Decide AMPDU Factor
22548 +
22549 + // By Emily
22550 + if(!pHTInfo->bRegRT2RTAggregation)
22551 + {
22552 + // Decide AMPDU Factor according to protocol handshake
22553 + if(pHTInfo->AMPDU_Factor > pPeerHTCap->MaxRxAMPDUFactor)
22554 + pHTInfo->CurrentAMPDUFactor = pPeerHTCap->MaxRxAMPDUFactor;
22555 + else
22556 + pHTInfo->CurrentAMPDUFactor = pHTInfo->AMPDU_Factor;
22557 +
22558 + }else
22559 + {
22560 + // Set MPDU density to 2 to Realtek AP, and set it to 0 for others
22561 + // Replace MPDU factor declared in original association response frame format. 2007.08.20 by Emily
22562 +#if 0
22563 + osTmp= PacketGetElement( asocpdu, EID_Vendor, OUI_SUB_REALTEK_AGG, OUI_SUBTYPE_DONT_CARE);
22564 + if(osTmp.Length >= 5) //00:e0:4c:02:00
22565 +#endif
22566 + if (ieee->current_network.bssht.bdRT2RTAggregation)
22567 + {
22568 + if( ieee->pairwise_key_type != KEY_TYPE_NA)
22569 + // Realtek may set 32k in security mode and 64k for others
22570 + pHTInfo->CurrentAMPDUFactor = pPeerHTCap->MaxRxAMPDUFactor;
22571 + else
22572 + pHTInfo->CurrentAMPDUFactor = HT_AGG_SIZE_64K;
22573 + }else
22574 + {
22575 + if(pPeerHTCap->MaxRxAMPDUFactor < HT_AGG_SIZE_32K)
22576 + pHTInfo->CurrentAMPDUFactor = pPeerHTCap->MaxRxAMPDUFactor;
22577 + else
22578 + pHTInfo->CurrentAMPDUFactor = HT_AGG_SIZE_32K;
22579 + }
22580 + }
22581 +
22582 + // <2> Set AMPDU Minimum MPDU Start Spacing
22583 + // 802.11n 3.0 section 9.7d.3
22584 +#if 1
22585 + if(pHTInfo->MPDU_Density > pPeerHTCap->MPDUDensity)
22586 + pHTInfo->CurrentMPDUDensity = pHTInfo->MPDU_Density;
22587 + else
22588 + pHTInfo->CurrentMPDUDensity = pPeerHTCap->MPDUDensity;
22589 + if(ieee->pairwise_key_type != KEY_TYPE_NA )
22590 + pHTInfo->CurrentMPDUDensity = 7; // 8us
22591 +#else
22592 + if(pHTInfo->MPDU_Density > pPeerHTCap->MPDUDensity)
22593 + pHTInfo->CurrentMPDUDensity = pHTInfo->MPDU_Density;
22594 + else
22595 + pHTInfo->CurrentMPDUDensity = pPeerHTCap->MPDUDensity;
22596 +#endif
22597 + // Force TX AMSDU
22598 +
22599 + // Lanhsin: mark for tmp to avoid deauth by ap from s3
22600 + //if(memcmp(pMgntInfo->Bssid, NETGEAR834Bv2_BROADCOM, 3)==0)
22601 + if(0)
22602 + {
22603 +
22604 + pHTInfo->bCurrentAMPDUEnable = false;
22605 + pHTInfo->ForcedAMSDUMode = HT_AGG_FORCE_ENABLE;
22606 + pHTInfo->ForcedAMSDUMaxSize = 7935;
22607 +
22608 + pHTInfo->IOTAction |= HT_IOT_ACT_TX_USE_AMSDU_8K;
22609 + }
22610 +
22611 + // Rx Reorder Setting
22612 + pHTInfo->bCurRxReorderEnable = pHTInfo->bRegRxReorderEnable;
22613 +
22614 + //
22615 + // Filter out unsupported HT rate for this AP
22616 + // Update RATR table
22617 + // This is only for 8190 ,8192 or later product which using firmware to handle rate adaptive mechanism.
22618 + //
22619 +
22620 + // Handle Ralink AP bad MCS rate set condition. Joseph.
22621 + // This fix the bug of Ralink AP. This may be removed in the future.
22622 + if(pPeerHTCap->MCS[0] == 0)
22623 + pPeerHTCap->MCS[0] = 0xff;
22624 +
22625 + HTFilterMCSRate(ieee, pPeerHTCap->MCS, ieee->dot11HTOperationalRateSet);
22626 +
22627 + //
22628 + // Config MIMO Power Save setting
22629 + //
22630 + pHTInfo->PeerMimoPs = pPeerHTCap->MimoPwrSave;
22631 + if(pHTInfo->PeerMimoPs == MIMO_PS_STATIC)
22632 + pMcsFilter = MCS_FILTER_1SS;
22633 + else
22634 + pMcsFilter = MCS_FILTER_ALL;
22635 + //WB add for MCS8 bug
22636 +// pMcsFilter = MCS_FILTER_1SS;
22637 + ieee->HTHighestOperaRate = HTGetHighestMCSRate(ieee, ieee->dot11HTOperationalRateSet, pMcsFilter);
22638 + ieee->HTCurrentOperaRate = ieee->HTHighestOperaRate;
22639 +
22640 + //
22641 + // Config current operation mode.
22642 + //
22643 + pHTInfo->CurrentOpMode = pPeerHTInfo->OptMode;
22644 +
22645 +
22646 +
22647 +}
22648 +
22649 +void HTSetConnectBwModeCallback(struct ieee80211_device* ieee);
22650 +/********************************************************************************************************************
22651 + *function: initialize HT info(struct PRT_HIGH_THROUGHPUT)
22652 + * input: struct ieee80211_device* ieee
22653 + * output: none
22654 + * return: none
22655 + * notice: This function is called when * (1) MPInitialization Phase * (2) Receiving of Deauthentication from AP
22656 +********************************************************************************************************************/
22657 +// TODO: Should this funciton be called when receiving of Disassociation?
22658 +void HTInitializeHTInfo(struct ieee80211_device* ieee)
22659 +{
22660 + PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
22661 +
22662 + //
22663 + // These parameters will be reset when receiving deauthentication packet
22664 + //
22665 + IEEE80211_DEBUG(IEEE80211_DL_HT, "===========>%s()\n", __FUNCTION__);
22666 + pHTInfo->bCurrentHTSupport = false;
22667 +
22668 + // 40MHz channel support
22669 + pHTInfo->bCurBW40MHz = false;
22670 + pHTInfo->bCurTxBW40MHz = false;
22671 +
22672 + // Short GI support
22673 + pHTInfo->bCurShortGI20MHz = false;
22674 + pHTInfo->bCurShortGI40MHz = false;
22675 + pHTInfo->bForcedShortGI = false;
22676 +
22677 + // CCK rate support
22678 + // This flag is set to true to support CCK rate by default.
22679 + // It will be affected by "pHTInfo->bRegSuppCCK" and AP capabilities only when associate to
22680 + // 11N BSS.
22681 + pHTInfo->bCurSuppCCK = true;
22682 +
22683 + // AMSDU related
22684 + pHTInfo->bCurrent_AMSDU_Support = false;
22685 + pHTInfo->nCurrent_AMSDU_MaxSize = pHTInfo->nAMSDU_MaxSize;
22686 +
22687 + // AMPUD related
22688 + pHTInfo->CurrentMPDUDensity = pHTInfo->MPDU_Density;
22689 + pHTInfo->CurrentAMPDUFactor = pHTInfo->AMPDU_Factor;
22690 +
22691 +
22692 +
22693 + // Initialize all of the parameters related to 11n
22694 + memset((void*)(&(pHTInfo->SelfHTCap)), 0, sizeof(pHTInfo->SelfHTCap));
22695 + memset((void*)(&(pHTInfo->SelfHTInfo)), 0, sizeof(pHTInfo->SelfHTInfo));
22696 + memset((void*)(&(pHTInfo->PeerHTCapBuf)), 0, sizeof(pHTInfo->PeerHTCapBuf));
22697 + memset((void*)(&(pHTInfo->PeerHTInfoBuf)), 0, sizeof(pHTInfo->PeerHTInfoBuf));
22698 +
22699 + pHTInfo->bSwBwInProgress = false;
22700 + pHTInfo->ChnlOp = CHNLOP_NONE;
22701 +
22702 + // Set default IEEE spec for Draft N
22703 + pHTInfo->ePeerHTSpecVer = HT_SPEC_VER_IEEE;
22704 +
22705 + // Realtek proprietary aggregation mode
22706 + pHTInfo->bCurrentRT2RTAggregation = false;
22707 + pHTInfo->bCurrentRT2RTLongSlotTime = false;
22708 + pHTInfo->IOTPeer = 0;
22709 + pHTInfo->IOTAction = 0;
22710 +
22711 + //MCS rate initialized here
22712 + {
22713 + u8* RegHTSuppRateSets = &(ieee->RegHTSuppRateSet[0]);
22714 + RegHTSuppRateSets[0] = 0xFF; //support MCS 0~7
22715 + RegHTSuppRateSets[1] = 0xFF; //support MCS 8~15
22716 + RegHTSuppRateSets[4] = 0x01; //support MCS 32
22717 + }
22718 +}
22719 +/********************************************************************************************************************
22720 + *function: initialize Bss HT structure(struct PBSS_HT)
22721 + * input: PBSS_HT pBssHT //to be initialized
22722 + * output: none
22723 + * return: none
22724 + * notice: This function is called when initialize network structure
22725 +********************************************************************************************************************/
22726 +void HTInitializeBssDesc(PBSS_HT pBssHT)
22727 +{
22728 +
22729 + pBssHT->bdSupportHT = false;
22730 + memset(pBssHT->bdHTCapBuf, 0, sizeof(pBssHT->bdHTCapBuf));
22731 + pBssHT->bdHTCapLen = 0;
22732 + memset(pBssHT->bdHTInfoBuf, 0, sizeof(pBssHT->bdHTInfoBuf));
22733 + pBssHT->bdHTInfoLen = 0;
22734 +
22735 + pBssHT->bdHTSpecVer= HT_SPEC_VER_IEEE;
22736 +
22737 + pBssHT->bdRT2RTAggregation = false;
22738 + pBssHT->bdRT2RTLongSlotTime = false;
22739 +}
22740 +#if 0
22741 +//below function has merged into ieee80211_network_init() in ieee80211_rx.c
22742 +void
22743 +HTParsingHTCapElement(
22744 + IN PADAPTER Adapter,
22745 + IN OCTET_STRING HTCapIE,
22746 + OUT PRT_WLAN_BSS pBssDesc
22747 +)
22748 +{
22749 + PMGNT_INFO pMgntInfo = &Adapter->MgntInfo;
22750 +
22751 + if( HTCapIE.Length > sizeof(pBssDesc->BssHT.bdHTCapBuf) )
22752 + {
22753 + RT_TRACE( COMP_HT, DBG_LOUD, ("HTParsingHTCapElement(): HT Capability Element length is too long!\n") );
22754 + return;
22755 + }
22756 +
22757 + // TODO: Check the correctness of HT Cap
22758 + //Print each field in detail. Driver should not print out this message by default
22759 + if(!pMgntInfo->mActingAsAp && !pMgntInfo->mAssoc)
22760 + HTDebugHTCapability(DBG_TRACE, Adapter, &HTCapIE, (pu8)"HTParsingHTCapElement()");
22761 +
22762 + HTCapIE.Length = HTCapIE.Length > sizeof(pBssDesc->BssHT.bdHTCapBuf)?\
22763 + sizeof(pBssDesc->BssHT.bdHTCapBuf):HTCapIE.Length; //prevent from overflow
22764 +
22765 + CopyMem(pBssDesc->BssHT.bdHTCapBuf, HTCapIE.Octet, HTCapIE.Length);
22766 + pBssDesc->BssHT.bdHTCapLen = HTCapIE.Length;
22767 +
22768 +}
22769 +
22770 +
22771 +void
22772 +HTParsingHTInfoElement(
22773 + PADAPTER Adapter,
22774 + OCTET_STRING HTInfoIE,
22775 + PRT_WLAN_BSS pBssDesc
22776 +)
22777 +{
22778 + PMGNT_INFO pMgntInfo = &Adapter->MgntInfo;
22779 +
22780 + if( HTInfoIE.Length > sizeof(pBssDesc->BssHT.bdHTInfoBuf))
22781 + {
22782 + RT_TRACE( COMP_HT, DBG_LOUD, ("HTParsingHTInfoElement(): HT Information Element length is too long!\n") );
22783 + return;
22784 + }
22785 +
22786 + // TODO: Check the correctness of HT Info
22787 + //Print each field in detail. Driver should not print out this message by default
22788 + if(!pMgntInfo->mActingAsAp && !pMgntInfo->mAssoc)
22789 + HTDebugHTInfo(DBG_TRACE, Adapter, &HTInfoIE, (pu8)"HTParsingHTInfoElement()");
22790 +
22791 + HTInfoIE.Length = HTInfoIE.Length > sizeof(pBssDesc->BssHT.bdHTInfoBuf)?\
22792 + sizeof(pBssDesc->BssHT.bdHTInfoBuf):HTInfoIE.Length; //prevent from overflow
22793 +
22794 + CopyMem( pBssDesc->BssHT.bdHTInfoBuf, HTInfoIE.Octet, HTInfoIE.Length);
22795 + pBssDesc->BssHT.bdHTInfoLen = HTInfoIE.Length;
22796 +}
22797 +
22798 +/*
22799 + * Get HT related information from beacon and save it in BssDesc
22800 + *
22801 + * (1) Parse HTCap, and HTInfo, and record whether it is 11n AP
22802 + * (2) If peer is HT, but not WMM, call QosSetLegacyWMMParamWithHT()
22803 + * (3) Check whether peer is Realtek AP (for Realtek proprietary aggregation mode).
22804 + * Input:
22805 + * PADAPTER Adapter
22806 + *
22807 + * Output:
22808 + * PRT_TCB BssDesc
22809 + *
22810 +*/
22811 +void HTGetValueFromBeaconOrProbeRsp(
22812 + PADAPTER Adapter,
22813 + POCTET_STRING pSRCmmpdu,
22814 + PRT_WLAN_BSS bssDesc
22815 +)
22816 +{
22817 + PMGNT_INFO pMgntInfo = &Adapter->MgntInfo;
22818 + PRT_HIGH_THROUGHPUT pHTInfo = GET_HT_INFO(pMgntInfo);
22819 + OCTET_STRING HTCapIE, HTInfoIE, HTRealtekAgg, mmpdu;
22820 + OCTET_STRING BroadcomElement, CiscoElement;
22821 +
22822 + mmpdu.Octet = pSRCmmpdu->Octet;
22823 + mmpdu.Length = pSRCmmpdu->Length;
22824 +
22825 + //2Note:
22826 + // Mark for IOT testing using Linksys WRT350N, This AP does not contain WMM IE when
22827 + // it is configured at pure-N mode.
22828 + // if(bssDesc->BssQos.bdQoSMode & QOS_WMM)
22829 + //
22830 +
22831 + HTInitializeBssDesc (&bssDesc->BssHT);
22832 +
22833 + //2<1> Parse HTCap, and HTInfo
22834 + // Get HT Capability IE: (1) Get IEEE Draft N IE or (2) Get EWC IE
22835 + HTCapIE = PacketGetElement(mmpdu, EID_HTCapability, OUI_SUB_DONT_CARE, OUI_SUBTYPE_DONT_CARE);
22836 + if(HTCapIE.Length == 0)
22837 + {
22838 + HTCapIE = PacketGetElement(mmpdu, EID_Vendor, OUI_SUB_11N_EWC_HT_CAP, OUI_SUBTYPE_DONT_CARE);
22839 + if(HTCapIE.Length != 0)
22840 + bssDesc->BssHT.bdHTSpecVer= HT_SPEC_VER_EWC;
22841 + }
22842 + if(HTCapIE.Length != 0)
22843 + HTParsingHTCapElement(Adapter, HTCapIE, bssDesc);
22844 +
22845 + // Get HT Information IE: (1) Get IEEE Draft N IE or (2) Get EWC IE
22846 + HTInfoIE = PacketGetElement(mmpdu, EID_HTInfo, OUI_SUB_DONT_CARE, OUI_SUBTYPE_DONT_CARE);
22847 + if(HTInfoIE.Length == 0)
22848 + {
22849 + HTInfoIE = PacketGetElement(mmpdu, EID_Vendor, OUI_SUB_11N_EWC_HT_INFO, OUI_SUBTYPE_DONT_CARE);
22850 + if(HTInfoIE.Length != 0)
22851 + bssDesc->BssHT.bdHTSpecVer = HT_SPEC_VER_EWC;
22852 + }
22853 + if(HTInfoIE.Length != 0)
22854 + HTParsingHTInfoElement(Adapter, HTInfoIE, bssDesc);
22855 +
22856 + //2<2>If peer is HT, but not WMM, call QosSetLegacyWMMParamWithHT()
22857 + if(HTCapIE.Length != 0)
22858 + {
22859 + bssDesc->BssHT.bdSupportHT = true;
22860 + if(bssDesc->BssQos.bdQoSMode == QOS_DISABLE)
22861 + QosSetLegacyWMMParamWithHT(Adapter, bssDesc);
22862 + }
22863 + else
22864 + {
22865 + bssDesc->BssHT.bdSupportHT = false;
22866 + }
22867 +
22868 + //2<3>Check whether the peer is Realtek AP/STA
22869 + if(pHTInfo->bRegRT2RTAggregation)
22870 + {
22871 + if(bssDesc->BssHT.bdSupportHT)
22872 + {
22873 + HTRealtekAgg = PacketGetElement(mmpdu, EID_Vendor, OUI_SUB_REALTEK_AGG, OUI_SUBTYPE_DONT_CARE);
22874 + if(HTRealtekAgg.Length >=5 )
22875 + {
22876 + bssDesc->BssHT.bdRT2RTAggregation = true;
22877 +
22878 + if((HTRealtekAgg.Octet[4]==1) && (HTRealtekAgg.Octet[5] & 0x02))
22879 + bssDesc->BssHT.bdRT2RTLongSlotTime = true;
22880 + }
22881 + }
22882 + }
22883 +
22884 + //
22885 + // 2008/01/25 MH Get Broadcom AP IE for manamgent frame CCK rate problem.
22886 + // AP can not receive CCK managemtn from from 92E.
22887 + //
22888 +
22889 + // Initialize every new bss broadcom cap exist as false..
22890 + bssDesc->bBroadcomCapExist= false;
22891 +
22892 + if(HTCapIE.Length != 0 || HTInfoIE.Length != 0)
22893 + {
22894 + u4Byte Length = 0;
22895 +
22896 + FillOctetString(BroadcomElement, NULL, 0);
22897 +
22898 + BroadcomElement = PacketGetElement( mmpdu, EID_Vendor, OUI_SUB_BROADCOM_IE_1, OUI_SUBTYPE_DONT_CARE);
22899 + Length += BroadcomElement.Length;
22900 + BroadcomElement = PacketGetElement( mmpdu, EID_Vendor, OUI_SUB_BROADCOM_IE_2, OUI_SUBTYPE_DONT_CARE);
22901 + Length += BroadcomElement.Length;
22902 + BroadcomElement = PacketGetElement( mmpdu, EID_Vendor, OUI_SUB_BROADCOM_IE_3, OUI_SUBTYPE_DONT_CARE);
22903 + Length += BroadcomElement.Length;
22904 +
22905 + if(Length > 0)
22906 + bssDesc->bBroadcomCapExist = true;
22907 + }
22908 +
22909 +
22910 + // For Cisco IOT issue
22911 + CiscoElement = PacketGetElement( mmpdu, EID_Vendor, OUI_SUB_CISCO_IE, OUI_SUBTYPE_DONT_CARE);
22912 + if(CiscoElement.Length != 0){ // 3: 0x00, 0x40, 0x96 ....
22913 + bssDesc->bCiscoCapExist = true;
22914 + }else{
22915 + bssDesc->bCiscoCapExist = false;
22916 + }
22917 +}
22918 +
22919 +
22920 +#endif
22921 +/********************************************************************************************************************
22922 + *function: initialize Bss HT structure(struct PBSS_HT)
22923 + * input: struct ieee80211_device *ieee
22924 + * struct ieee80211_network *pNetwork //usually current network we are live in
22925 + * output: none
22926 + * return: none
22927 + * notice: This function should ONLY be called before association
22928 +********************************************************************************************************************/
22929 +void HTResetSelfAndSavePeerSetting(struct ieee80211_device* ieee, struct ieee80211_network * pNetwork)
22930 +{
22931 + PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
22932 +// u16 nMaxAMSDUSize;
22933 +// PHT_CAPABILITY_ELE pPeerHTCap = (PHT_CAPABILITY_ELE)pNetwork->bssht.bdHTCapBuf;
22934 +// PHT_INFORMATION_ELE pPeerHTInfo = (PHT_INFORMATION_ELE)pNetwork->bssht.bdHTInfoBuf;
22935 +// u8* pMcsFilter;
22936 + u8 bIOTAction = 0;
22937 +
22938 + //
22939 + // Save Peer Setting before Association
22940 + //
22941 + IEEE80211_DEBUG(IEEE80211_DL_HT, "==============>%s()\n", __FUNCTION__);
22942 + /*unmark bEnableHT flag here is the same reason why unmarked in function ieee80211_softmac_new_net. WB 2008.09.10*/
22943 +// if( pHTInfo->bEnableHT && pNetwork->bssht.bdSupportHT)
22944 + if (pNetwork->bssht.bdSupportHT)
22945 + {
22946 + pHTInfo->bCurrentHTSupport = true;
22947 + pHTInfo->ePeerHTSpecVer = pNetwork->bssht.bdHTSpecVer;
22948 +
22949 + // Save HTCap and HTInfo information Element
22950 + if(pNetwork->bssht.bdHTCapLen > 0 && pNetwork->bssht.bdHTCapLen <= sizeof(pHTInfo->PeerHTCapBuf))
22951 + memcpy(pHTInfo->PeerHTCapBuf, pNetwork->bssht.bdHTCapBuf, pNetwork->bssht.bdHTCapLen);
22952 +
22953 + if(pNetwork->bssht.bdHTInfoLen > 0 && pNetwork->bssht.bdHTInfoLen <= sizeof(pHTInfo->PeerHTInfoBuf))
22954 + memcpy(pHTInfo->PeerHTInfoBuf, pNetwork->bssht.bdHTInfoBuf, pNetwork->bssht.bdHTInfoLen);
22955 +
22956 + // Check whether RT to RT aggregation mode is enabled
22957 + if(pHTInfo->bRegRT2RTAggregation)
22958 + {
22959 + pHTInfo->bCurrentRT2RTAggregation = pNetwork->bssht.bdRT2RTAggregation;
22960 + pHTInfo->bCurrentRT2RTLongSlotTime = pNetwork->bssht.bdRT2RTLongSlotTime;
22961 + }
22962 + else
22963 + {
22964 + pHTInfo->bCurrentRT2RTAggregation = false;
22965 + pHTInfo->bCurrentRT2RTLongSlotTime = false;
22966 + }
22967 +
22968 + // Determine the IOT Peer Vendor.
22969 + HTIOTPeerDetermine(ieee);
22970 +
22971 + // Decide IOT Action
22972 + // Must be called after the parameter of pHTInfo->bCurrentRT2RTAggregation is decided
22973 + pHTInfo->IOTAction = 0;
22974 + bIOTAction = HTIOTActIsDisableMCS14(ieee, pNetwork->bssid);
22975 + if(bIOTAction)
22976 + pHTInfo->IOTAction |= HT_IOT_ACT_DISABLE_MCS14;
22977 +
22978 + bIOTAction = HTIOTActIsDisableMCS15(ieee);
22979 + if(bIOTAction)
22980 + pHTInfo->IOTAction |= HT_IOT_ACT_DISABLE_MCS15;
22981 +
22982 + bIOTAction = HTIOTActIsDisableMCSTwoSpatialStream(ieee, pNetwork->bssid);
22983 + if(bIOTAction)
22984 + pHTInfo->IOTAction |= HT_IOT_ACT_DISABLE_ALL_2SS;
22985 +
22986 +
22987 + bIOTAction = HTIOTActIsDisableEDCATurbo(ieee, pNetwork->bssid);
22988 + if(bIOTAction)
22989 + pHTInfo->IOTAction |= HT_IOT_ACT_DISABLE_EDCA_TURBO;
22990 +
22991 + bIOTAction = HTIOTActIsMgntUseCCK6M(pNetwork);
22992 + if(bIOTAction)
22993 + pHTInfo->IOTAction |= HT_IOT_ACT_MGNT_USE_CCK_6M;
22994 +
22995 + bIOTAction = HTIOTActIsCCDFsync(pNetwork->bssid);
22996 + if(bIOTAction)
22997 + pHTInfo->IOTAction |= HT_IOT_ACT_CDD_FSYNC;
22998 +
22999 +
23000 + }
23001 + else
23002 + {
23003 + pHTInfo->bCurrentHTSupport = false;
23004 + pHTInfo->bCurrentRT2RTAggregation = false;
23005 + pHTInfo->bCurrentRT2RTLongSlotTime = false;
23006 +
23007 + pHTInfo->IOTAction = 0;
23008 + }
23009 +
23010 +}
23011 +
23012 +void HTUpdateSelfAndPeerSetting(struct ieee80211_device* ieee, struct ieee80211_network * pNetwork)
23013 +{
23014 + PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
23015 +// PHT_CAPABILITY_ELE pPeerHTCap = (PHT_CAPABILITY_ELE)pNetwork->bssht.bdHTCapBuf;
23016 + PHT_INFORMATION_ELE pPeerHTInfo = (PHT_INFORMATION_ELE)pNetwork->bssht.bdHTInfoBuf;
23017 +
23018 + if(pHTInfo->bCurrentHTSupport)
23019 + {
23020 + //
23021 + // Config current operation mode.
23022 + //
23023 + if(pNetwork->bssht.bdHTInfoLen != 0)
23024 + pHTInfo->CurrentOpMode = pPeerHTInfo->OptMode;
23025 +
23026 + //
23027 + // <TODO: Config according to OBSS non-HT STA present!!>
23028 + //
23029 + }
23030 +}
23031 +
23032 +void HTUseDefaultSetting(struct ieee80211_device* ieee)
23033 +{
23034 + PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
23035 +// u8 regBwOpMode;
23036 +
23037 + if(pHTInfo->bEnableHT)
23038 + {
23039 + pHTInfo->bCurrentHTSupport = true;
23040 +
23041 + pHTInfo->bCurSuppCCK = pHTInfo->bRegSuppCCK;
23042 +
23043 + pHTInfo->bCurBW40MHz = pHTInfo->bRegBW40MHz;
23044 +
23045 + pHTInfo->bCurShortGI20MHz= pHTInfo->bRegShortGI20MHz;
23046 +
23047 + pHTInfo->bCurShortGI40MHz= pHTInfo->bRegShortGI40MHz;
23048 +
23049 + pHTInfo->bCurrent_AMSDU_Support = pHTInfo->bAMSDU_Support;
23050 +
23051 + pHTInfo->nCurrent_AMSDU_MaxSize = pHTInfo->nAMSDU_MaxSize;
23052 +
23053 + pHTInfo->bCurrentAMPDUEnable = pHTInfo->bAMPDUEnable;
23054 +
23055 + pHTInfo->CurrentAMPDUFactor = pHTInfo->AMPDU_Factor;
23056 +
23057 + pHTInfo->CurrentMPDUDensity = pHTInfo->CurrentMPDUDensity;
23058 +
23059 + // Set BWOpMode register
23060 +
23061 + //update RATR index0
23062 + HTFilterMCSRate(ieee, ieee->Regdot11HTOperationalRateSet, ieee->dot11HTOperationalRateSet);
23063 + //function below is not implemented at all. WB
23064 +#ifdef TODO
23065 + Adapter->HalFunc.InitHalRATRTableHandler( Adapter, &pMgntInfo->dot11OperationalRateSet, pMgntInfo->dot11HTOperationalRateSet);
23066 +#endif
23067 + ieee->HTHighestOperaRate = HTGetHighestMCSRate(ieee, ieee->dot11HTOperationalRateSet, MCS_FILTER_ALL);
23068 + ieee->HTCurrentOperaRate = ieee->HTHighestOperaRate;
23069 +
23070 + }
23071 + else
23072 + {
23073 + pHTInfo->bCurrentHTSupport = false;
23074 + }
23075 + return;
23076 +}
23077 +/********************************************************************************************************************
23078 + *function: check whether HT control field exists
23079 + * input: struct ieee80211_device *ieee
23080 + * u8* pFrame //coming skb->data
23081 + * output: none
23082 + * return: return true if HT control field exists(false otherwise)
23083 + * notice:
23084 +********************************************************************************************************************/
23085 +u8 HTCCheck(struct ieee80211_device* ieee, u8* pFrame)
23086 +{
23087 + if(ieee->pHTInfo->bCurrentHTSupport)
23088 + {
23089 + if( (IsQoSDataFrame(pFrame) && Frame_Order(pFrame)) == 1)
23090 + {
23091 + IEEE80211_DEBUG(IEEE80211_DL_HT, "HT CONTROL FILED EXIST!!\n");
23092 + return true;
23093 + }
23094 + }
23095 + return false;
23096 +}
23097 +
23098 +//
23099 +// This function set bandwidth mode in protocol layer.
23100 +//
23101 +void HTSetConnectBwMode(struct ieee80211_device* ieee, HT_CHANNEL_WIDTH Bandwidth, HT_EXTCHNL_OFFSET Offset)
23102 +{
23103 + PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
23104 +// u32 flags = 0;
23105 +
23106 + if(pHTInfo->bRegBW40MHz == false)
23107 + return;
23108 +
23109 +
23110 +
23111 + // To reduce dummy operation
23112 +// if((pHTInfo->bCurBW40MHz==false && Bandwidth==HT_CHANNEL_WIDTH_20) ||
23113 +// (pHTInfo->bCurBW40MHz==true && Bandwidth==HT_CHANNEL_WIDTH_20_40 && Offset==pHTInfo->CurSTAExtChnlOffset))
23114 +// return;
23115 +
23116 +// spin_lock_irqsave(&(ieee->bw_spinlock), flags);
23117 + if(pHTInfo->bSwBwInProgress) {
23118 +// spin_unlock_irqrestore(&(ieee->bw_spinlock), flags);
23119 + return;
23120 + }
23121 + //if in half N mode, set to 20M bandwidth please 09.08.2008 WB.
23122 + if(Bandwidth==HT_CHANNEL_WIDTH_20_40 && (!ieee->GetHalfNmodeSupportByAPsHandler(ieee->dev)))
23123 + {
23124 + // Handle Illegal extention channel offset!!
23125 + if(ieee->current_network.channel<2 && Offset==HT_EXTCHNL_OFFSET_LOWER)
23126 + Offset = HT_EXTCHNL_OFFSET_NO_EXT;
23127 + if(Offset==HT_EXTCHNL_OFFSET_UPPER || Offset==HT_EXTCHNL_OFFSET_LOWER) {
23128 + pHTInfo->bCurBW40MHz = true;
23129 + pHTInfo->CurSTAExtChnlOffset = Offset;
23130 + } else {
23131 + pHTInfo->bCurBW40MHz = false;
23132 + pHTInfo->CurSTAExtChnlOffset = HT_EXTCHNL_OFFSET_NO_EXT;
23133 + }
23134 + } else {
23135 + pHTInfo->bCurBW40MHz = false;
23136 + pHTInfo->CurSTAExtChnlOffset = HT_EXTCHNL_OFFSET_NO_EXT;
23137 + }
23138 +
23139 + pHTInfo->bSwBwInProgress = true;
23140 +
23141 + // TODO: 2007.7.13 by Emily Wait 2000ms in order to garantee that switching
23142 + // bandwidth is executed after scan is finished. It is a temporal solution
23143 + // because software should ganrantee the last operation of switching bandwidth
23144 + // is executed properlly.
23145 + HTSetConnectBwModeCallback(ieee);
23146 +
23147 +// spin_unlock_irqrestore(&(ieee->bw_spinlock), flags);
23148 +}
23149 +
23150 +void HTSetConnectBwModeCallback(struct ieee80211_device* ieee)
23151 +{
23152 + PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
23153 +
23154 + IEEE80211_DEBUG(IEEE80211_DL_HT, "======>%s()\n", __FUNCTION__);
23155 +
23156 + if(pHTInfo->bCurBW40MHz)
23157 + {
23158 + if(pHTInfo->CurSTAExtChnlOffset==HT_EXTCHNL_OFFSET_UPPER)
23159 + ieee->set_chan(ieee->dev, ieee->current_network.channel+2);
23160 + else if(pHTInfo->CurSTAExtChnlOffset==HT_EXTCHNL_OFFSET_LOWER)
23161 + ieee->set_chan(ieee->dev, ieee->current_network.channel-2);
23162 + else
23163 + ieee->set_chan(ieee->dev, ieee->current_network.channel);
23164 +
23165 + ieee->SetBWModeHandler(ieee->dev, HT_CHANNEL_WIDTH_20_40, pHTInfo->CurSTAExtChnlOffset);
23166 + } else {
23167 + ieee->set_chan(ieee->dev, ieee->current_network.channel);
23168 + ieee->SetBWModeHandler(ieee->dev, HT_CHANNEL_WIDTH_20, HT_EXTCHNL_OFFSET_NO_EXT);
23169 + }
23170 +
23171 + pHTInfo->bSwBwInProgress = false;
23172 +}
23173 +
23174 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
23175 +//EXPORT_SYMBOL_NOVERS(HTUpdateSelfAndPeerSetting);
23176 +#else
23177 +//EXPORT_SYMBOL(HTUpdateSelfAndPeerSetting);
23178 +#endif
23179 --- /dev/null
23180 +++ b/drivers/staging/rtl8192e/ieee80211/rtl819x_Qos.h
23181 @@ -0,0 +1,749 @@
23182 +#ifndef __INC_QOS_TYPE_H
23183 +#define __INC_QOS_TYPE_H
23184 +
23185 +//#include "EndianFree.h"
23186 +#define BIT0 0x00000001
23187 +#define BIT1 0x00000002
23188 +#define BIT2 0x00000004
23189 +#define BIT3 0x00000008
23190 +#define BIT4 0x00000010
23191 +#define BIT5 0x00000020
23192 +#define BIT6 0x00000040
23193 +#define BIT7 0x00000080
23194 +#define BIT8 0x00000100
23195 +#define BIT9 0x00000200
23196 +#define BIT10 0x00000400
23197 +#define BIT11 0x00000800
23198 +#define BIT12 0x00001000
23199 +#define BIT13 0x00002000
23200 +#define BIT14 0x00004000
23201 +#define BIT15 0x00008000
23202 +#define BIT16 0x00010000
23203 +#define BIT17 0x00020000
23204 +#define BIT18 0x00040000
23205 +#define BIT19 0x00080000
23206 +#define BIT20 0x00100000
23207 +#define BIT21 0x00200000
23208 +#define BIT22 0x00400000
23209 +#define BIT23 0x00800000
23210 +#define BIT24 0x01000000
23211 +#define BIT25 0x02000000
23212 +#define BIT26 0x04000000
23213 +#define BIT27 0x08000000
23214 +#define BIT28 0x10000000
23215 +#define BIT29 0x20000000
23216 +#define BIT30 0x40000000
23217 +#define BIT31 0x80000000
23218 +
23219 +#define MAX_WMMELE_LENGTH 64
23220 +
23221 +//
23222 +// QoS mode.
23223 +// enum 0, 1, 2, 4: since we can use the OR(|) operation.
23224 +//
23225 +// QOS_MODE is redefined for enum can't be ++, | under C++ compiler, 2006.05.17, by rcnjko.
23226 +//typedef enum _QOS_MODE{
23227 +// QOS_DISABLE = 0,
23228 +// QOS_WMM = 1,
23229 +// QOS_EDCA = 2,
23230 +// QOS_HCCA = 4,
23231 +//}QOS_MODE,*PQOS_MODE;
23232 +//
23233 +typedef u32 QOS_MODE, *PQOS_MODE;
23234 +#define QOS_DISABLE 0
23235 +#define QOS_WMM 1
23236 +#define QOS_WMMSA 2
23237 +#define QOS_EDCA 4
23238 +#define QOS_HCCA 8
23239 +#define QOS_WMM_UAPSD 16 //WMM Power Save, 2006-06-14 Isaiah
23240 +
23241 +#define AC_PARAM_SIZE 4
23242 +#define WMM_PARAM_ELE_BODY_LEN 18
23243 +
23244 +//
23245 +// QoS ACK Policy Field Values
23246 +// Ref: WMM spec 2.1.6: QoS Control Field, p.10.
23247 +//
23248 +typedef enum _ACK_POLICY{
23249 + eAckPlc0_ACK = 0x00,
23250 + eAckPlc1_NoACK = 0x01,
23251 +}ACK_POLICY,*PACK_POLICY;
23252 +
23253 +#define WMM_PARAM_ELEMENT_SIZE (8+(4*AC_PARAM_SIZE))
23254 +#if 0
23255 +#define GET_QOS_CTRL(_pStart) ReadEF2Byte((u8 *)(_pStart) + 24)
23256 +#define SET_QOS_CTRL(_pStart, _value) WriteEF2Byte((u8 *)(_pStart) + 24, _value)
23257 +
23258 +// WMM control field.
23259 +#define GET_QOS_CTRL_WMM_UP(_pStart) ((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 0, 3))
23260 +#define SET_QOS_CTRL_WMM_UP(_pStart, _value) SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 0, 3, (u8)(_value))
23261 +
23262 +#define GET_QOS_CTRL_WMM_EOSP(_pStart) ((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 4, 1))
23263 +#define SET_QOS_CTRL_WMM_EOSP(_pStart, _value) SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 4, 1, (u8)(_value))
23264 +
23265 +#define GET_QOS_CTRL_WMM_ACK_POLICY(_pStart) ((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 5, 2))
23266 +#define SET_QOS_CTRL_WMM_ACK_POLICY(_pStart, _value) SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 5, 2, (u8)(_value))
23267 +
23268 +// 802.11e control field (by STA, data)
23269 +#define GET_QOS_CTRL_STA_DATA_TID(_pStart) ((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 0, 4))
23270 +#define SET_QOS_CTRL_STA_DATA_TID(_pStart, _value) SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 0, 4, (u8)(_value))
23271 +
23272 +#define GET_QOS_CTRL_STA_DATA_QSIZE_FLAG(_pStart) ((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 4, 1))
23273 +#define SET_QOS_CTRL_STA_DATA_QSIZE_FLAG(_pStart, _value) SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 4, 1, (u8)(_value))
23274 +
23275 +#define GET_QOS_CTRL_STA_DATA_ACK_POLICY(_pStart) ((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 5, 2))
23276 +#define SET_QOS_CTRL_STA_DATA_ACK_POLICY(_pStart, _value) SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 5, 2, (u8)(_value))
23277 +
23278 +#define GET_QOS_CTRL_STA_DATA_TXOP(_pStart) ((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 8, 8))
23279 +#define SET_QOS_CTRL_STA_DATA_TXOP(_pStart, _value) SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 8, 8, (u8)(_value))
23280 +
23281 +#define GET_QOS_CTRL_STA_DATA_QSIZE(_pStart) GET_QOS_CTRL_STA_DATA_TXOP(_pStart)
23282 +#define SET_QOS_CTRL_STA_DATA_QSIZE(_pStart, _value) SET_QOS_CTRL_STA_DATA_TXOP(_pStart)
23283 +
23284 +// 802.11e control field (by HC, data)
23285 +#define GET_QOS_CTRL_HC_DATA_TID(_pStart) ((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 0, 4))
23286 +#define SET_QOS_CTRL_HC_DATA_TID(_pStart, _value) SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 0, 4, (u8)(_value))
23287 +
23288 +#define GET_QOS_CTRL_HC_DATA_EOSP(_pStart) ((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 4, 1))
23289 +#define SET_QOS_CTRL_HC_DATA_EOSP(_pStart, _value) SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 4, 1, (u8)(_value))
23290 +
23291 +#define GET_QOS_CTRL_HC_DATA_ACK_POLICY(_pStart) ((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 5, 2))
23292 +#define SET_QOS_CTRL_HC_DATA_ACK_POLICY(_pStart, _value) SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 5, 2, (u8)(_value))
23293 +
23294 +#define GET_QOS_CTRL_HC_DATA_PS_BUFSTATE(_pStart) ((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 8, 8))
23295 +#define SET_QOS_CTRL_HC_DATA_PS_BUFSTATE(_pStart, _value) SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 8, 8, (u8)(_value))
23296 +
23297 +// 802.11e control field (by HC, CFP)
23298 +#define GET_QOS_CTRL_HC_CFP_TID(_pStart) ((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 0, 4))
23299 +#define SET_QOS_CTRL_HC_CFP_TID(_pStart, _value) SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 0, 4, (u8)(_value))
23300 +
23301 +#define GET_QOS_CTRL_HC_CFP_EOSP(_pStart) ((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 4, 1))
23302 +#define SET_QOS_CTRL_HC_CFP_EOSP(_pStart, _value) SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 4, 1, (u8)(_value))
23303 +
23304 +#define GET_QOS_CTRL_HC_CFP_ACK_POLICY(_pStart) ((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 5, 2))
23305 +#define SET_QOS_CTRL_HC_CFP_ACK_POLICY(_pStart, _value) SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 5, 2, (u8)(_value))
23306 +
23307 +#define GET_QOS_CTRL_HC_CFP_TXOP_LIMIT(_pStart) ((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 8, 8))
23308 +#define SET_QOS_CTRL_HC_CFP_TXOP_LIMIT(_pStart, _value) SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 8, 8, (u8)(_value))
23309 +
23310 +#define SET_WMM_QOS_INFO_FIELD(_pStart, _val) WriteEF1Byte(_pStart, _val)
23311 +
23312 +#define GET_WMM_QOS_INFO_FIELD_PARAMETERSET_COUNT(_pStart) LE_BITS_TO_1BYTE(_pStart, 0, 4)
23313 +#define SET_WMM_QOS_INFO_FIELD_PARAMETERSET_COUNT(_pStart, _val) SET_BITS_TO_LE_1BYTE(_pStart, 0, 4, _val)
23314 +
23315 +#define GET_WMM_QOS_INFO_FIELD_AP_UAPSD(_pStart) LE_BITS_TO_1BYTE(_pStart, 7, 1)
23316 +#define SET_WMM_QOS_INFO_FIELD_AP_UAPSD(_pStart, _val) SET_BITS_TO_LE_1BYTE(_pStart, 7, 1, _val)
23317 +
23318 +#define GET_WMM_QOS_INFO_FIELD_STA_AC_VO_UAPSD(_pStart) LE_BITS_TO_1BYTE(_pStart, 0, 1)
23319 +#define SET_WMM_QOS_INFO_FIELD_STA_AC_VO_UAPSD(_pStart, _val) SET_BITS_TO_LE_1BYTE(_pStart, 0, 1, _val)
23320 +
23321 +#define GET_WMM_QOS_INFO_FIELD_STA_AC_VI_UAPSD(_pStart) LE_BITS_TO_1BYTE(_pStart, 1, 1)
23322 +#define SET_WMM_QOS_INFO_FIELD_STA_AC_VI_UAPSD(_pStart, _val) SET_BITS_TO_LE_1BYTE(_pStart, 1, 1, _val)
23323 +
23324 +#define GET_WMM_QOS_INFO_FIELD_STA_AC_BE_UAPSD(_pStart) LE_BITS_TO_1BYTE(_pStart, 2, 1)
23325 +#define SET_WMM_QOS_INFO_FIELD_STA_AC_BE_UAPSD(_pStart, _val) SET_BITS_TO_LE_1BYTE(_pStart, 2, 1, _val)
23326 +
23327 +#define GET_WMM_QOS_INFO_FIELD_STA_AC_BK_UAPSD(_pStart) LE_BITS_TO_1BYTE(_pStart, 3, 1)
23328 +#define SET_WMM_QOS_INFO_FIELD_STA_AC_BK_UAPSD(_pStart, _val) SET_BITS_TO_LE_1BYTE(_pStart, 3, 1, _val)
23329 +
23330 +#define GET_WMM_QOS_INFO_FIELD_STA_MAX_SP_LEN(_pStart) LE_BITS_TO_1BYTE(_pStart, 5, 2)
23331 +#define SET_WMM_QOS_INFO_FIELD_STA_MAX_SP_LEN(_pStart, _val) SET_BITS_TO_LE_1BYTE(_pStart, 5, 2, _val)
23332 +
23333 +
23334 +#define WMM_INFO_ELEMENT_SIZE 7
23335 +
23336 +#define GET_WMM_INFO_ELE_OUI(_pStart) ((u8 *)(_pStart))
23337 +#define SET_WMM_INFO_ELE_OUI(_pStart, _pVal) PlatformMoveMemory(_pStart, _pVal, 3);
23338 +
23339 +#define GET_WMM_INFO_ELE_OUI_TYPE(_pStart) ( EF1Byte( *((u8 *)(_pStart)+3) ) )
23340 +#define SET_WMM_INFO_ELE_OUI_TYPE(_pStart, _val) ( *((u8 *)(_pStart)+3) = EF1Byte(_val) )
23341 +
23342 +#define GET_WMM_INFO_ELE_OUI_SUBTYPE(_pStart) ( EF1Byte( *((u8 *)(_pStart)+4) ) )
23343 +#define SET_WMM_INFO_ELE_OUI_SUBTYPE(_pStart, _val) ( *((u8 *)(_pStart)+4) = EF1Byte(_val) )
23344 +
23345 +#define GET_WMM_INFO_ELE_VERSION(_pStart) ( EF1Byte( *((u8 *)(_pStart)+5) ) )
23346 +#define SET_WMM_INFO_ELE_VERSION(_pStart, _val) ( *((u8 *)(_pStart)+5) = EF1Byte(_val) )
23347 +
23348 +#define GET_WMM_INFO_ELE_QOS_INFO_FIELD(_pStart) ( EF1Byte( *((u8 *)(_pStart)+6) ) )
23349 +#define SET_WMM_INFO_ELE_QOS_INFO_FIELD(_pStart, _val) ( *((u8 *)(_pStart)+6) = EF1Byte(_val) )
23350 +
23351 +
23352 +
23353 +#define GET_WMM_AC_PARAM_AIFSN(_pStart) ( (u8)LE_BITS_TO_4BYTE(_pStart, 0, 4) )
23354 +#define SET_WMM_AC_PARAM_AIFSN(_pStart, _val) SET_BITS_TO_LE_4BYTE(_pStart, 0, 4, _val)
23355 +
23356 +#define GET_WMM_AC_PARAM_ACM(_pStart) ( (u8)LE_BITS_TO_4BYTE(_pStart, 4, 1) )
23357 +#define SET_WMM_AC_PARAM_ACM(_pStart, _val) SET_BITS_TO_LE_4BYTE(_pStart, 4, 1, _val)
23358 +
23359 +#define GET_WMM_AC_PARAM_ACI(_pStart) ( (u8)LE_BITS_TO_4BYTE(_pStart, 5, 2) )
23360 +#define SET_WMM_AC_PARAM_ACI(_pStart, _val) SET_BITS_TO_LE_4BYTE(_pStart, 5, 2, _val)
23361 +
23362 +#define GET_WMM_AC_PARAM_ACI_AIFSN(_pStart) ( (u8)LE_BITS_TO_4BYTE(_pStart, 0, 8) )
23363 +#define SET_WMM_AC_PARAM_ACI_AIFSN(_pStart, _val) SET_BTIS_TO_LE_4BYTE(_pStart, 0, 8, _val)
23364 +
23365 +#define GET_WMM_AC_PARAM_ECWMIN(_pStart) ( (u8)LE_BITS_TO_4BYTE(_pStart, 8, 4) )
23366 +#define SET_WMM_AC_PARAM_ECWMIN(_pStart, _val) SET_BITS_TO_LE_4BYTE(_pStart, 8, 4, _val)
23367 +
23368 +#define GET_WMM_AC_PARAM_ECWMAX(_pStart) ( (u8)LE_BITS_TO_4BYTE(_pStart, 12, 4) )
23369 +#define SET_WMM_AC_PARAM_ECWMAX(_pStart, _val) SET_BITS_TO_LE_4BYTE(_pStart, 12, 4, _val)
23370 +
23371 +#define GET_WMM_AC_PARAM_TXOP_LIMIT(_pStart) ( (u16)LE_BITS_TO_4BYTE(_pStart, 16, 16) )
23372 +#define SET_WMM_AC_PARAM_TXOP_LIMIT(_pStart, _val) SET_BITS_TO_LE_4BYTE(_pStart, 16, 16, _val)
23373 +
23374 +
23375 +
23376 +
23377 +#define GET_WMM_PARAM_ELE_OUI(_pStart) ((u8 *)(_pStart))
23378 +#define SET_WMM_PARAM_ELE_OUI(_pStart, _pVal) PlatformMoveMemory(_pStart, _pVal, 3)
23379 +
23380 +#define GET_WMM_PARAM_ELE_OUI_TYPE(_pStart) ( EF1Byte( *((u8 *)(_pStart)+3) ) )
23381 +#define SET_WMM_PARAM_ELE_OUI_TYPE(_pStart, _val) ( *((u8 *)(_pStart)+3) = EF1Byte(_val) )
23382 +
23383 +#define GET_WMM_PARAM_ELE_OUI_SUBTYPE(_pStart) ( EF1Byte( *((u8 *)(_pStart)+4) ) )
23384 +#define SET_WMM_PARAM_ELE_OUI_SUBTYPE(_pStart, _val) ( *((u8 *)(_pStart)+4) = EF1Byte(_val) )
23385 +
23386 +#define GET_WMM_PARAM_ELE_VERSION(_pStart) ( EF1Byte( *((u8 *)(_pStart)+5) ) )
23387 +#define SET_WMM_PARAM_ELE_VERSION(_pStart, _val) ( *((u8 *)(_pStart)+5) = EF1Byte(_val) )
23388 +
23389 +#define GET_WMM_PARAM_ELE_QOS_INFO_FIELD(_pStart) ( EF1Byte( *((u8 *)(_pStart)+6) ) )
23390 +#define SET_WMM_PARAM_ELE_QOS_INFO_FIELD(_pStart, _val) ( *((u8 *)(_pStart)+6) = EF1Byte(_val) )
23391 +
23392 +#define GET_WMM_PARAM_ELE_AC_PARAM(_pStart) ( (u8 *)(_pStart)+8 )
23393 +#define SET_WMM_PARAM_ELE_AC_PARAM(_pStart, _pVal) PlatformMoveMemory((_pStart)+8, _pVal, 16)
23394 +#endif
23395 +
23396 +//
23397 +// QoS Control Field
23398 +// Ref:
23399 +// 1. WMM spec 2.1.6: QoS Control Field, p.9.
23400 +// 2. 802.11e/D13.0 7.1.3.5, p.26.
23401 +//
23402 +typedef union _QOS_CTRL_FIELD{
23403 + u8 charData[2];
23404 + u16 shortData;
23405 +
23406 + // WMM spec
23407 + struct
23408 + {
23409 + u8 UP:3;
23410 + u8 usRsvd1:1;
23411 + u8 EOSP:1;
23412 + u8 AckPolicy:2;
23413 + u8 usRsvd2:1;
23414 + u8 ucRsvdByte;
23415 + }WMM;
23416 +
23417 + // 802.11e: QoS data type frame sent by non-AP QSTAs.
23418 + struct
23419 + {
23420 + u8 TID:4;
23421 + u8 bIsQsize:1;// 0: BIT[8:15] is TXOP Duration Requested, 1: BIT[8:15] is Queue Size.
23422 + u8 AckPolicy:2;
23423 + u8 usRsvd:1;
23424 + u8 TxopOrQsize; // (BIT4=0)TXOP Duration Requested or (BIT4=1)Queue Size.
23425 + }BySta;
23426 +
23427 + // 802.11e: QoS data, QoS Null, and QoS Data+CF-Ack frames sent by HC.
23428 + struct
23429 + {
23430 + u8 TID:4;
23431 + u8 EOSP:1;
23432 + u8 AckPolicy:2;
23433 + u8 usRsvd:1;
23434 + u8 PSBufState; // QAP PS Buffer State.
23435 + }ByHc_Data;
23436 +
23437 + // 802.11e: QoS (+) CF-Poll frames sent by HC.
23438 + struct
23439 + {
23440 + u8 TID:4;
23441 + u8 EOSP:1;
23442 + u8 AckPolicy:2;
23443 + u8 usRsvd:1;
23444 + u8 TxopLimit; // TXOP Limit.
23445 + }ByHc_CFP;
23446 +
23447 +}QOS_CTRL_FIELD, *PQOS_CTRL_FIELD;
23448 +
23449 +
23450 +//
23451 +// QoS Info Field
23452 +// Ref:
23453 +// 1. WMM spec 2.2.1: WME Information Element, p.11.
23454 +// 2. 8185 QoS code: QOS_INFO [def. in QoS_mp.h]
23455 +//
23456 +typedef union _QOS_INFO_FIELD{
23457 + u8 charData;
23458 +
23459 + struct
23460 + {
23461 + u8 ucParameterSetCount:4;
23462 + u8 ucReserved:4;
23463 + }WMM;
23464 +
23465 + struct
23466 + {
23467 + //Ref WMM_Specification_1-1.pdf, 2006-06-13 Isaiah
23468 + u8 ucAC_VO_UAPSD:1;
23469 + u8 ucAC_VI_UAPSD:1;
23470 + u8 ucAC_BE_UAPSD:1;
23471 + u8 ucAC_BK_UAPSD:1;
23472 + u8 ucReserved1:1;
23473 + u8 ucMaxSPLen:2;
23474 + u8 ucReserved2:1;
23475 +
23476 + }ByWmmPsSta;
23477 +
23478 + struct
23479 + {
23480 + //Ref WMM_Specification_1-1.pdf, 2006-06-13 Isaiah
23481 + u8 ucParameterSetCount:4;
23482 + u8 ucReserved:3;
23483 + u8 ucApUapsd:1;
23484 + }ByWmmPsAp;
23485 +
23486 + struct
23487 + {
23488 + u8 ucAC3_UAPSD:1;
23489 + u8 ucAC2_UAPSD:1;
23490 + u8 ucAC1_UAPSD:1;
23491 + u8 ucAC0_UAPSD:1;
23492 + u8 ucQAck:1;
23493 + u8 ucMaxSPLen:2;
23494 + u8 ucMoreDataAck:1;
23495 + } By11eSta;
23496 +
23497 + struct
23498 + {
23499 + u8 ucParameterSetCount:4;
23500 + u8 ucQAck:1;
23501 + u8 ucQueueReq:1;
23502 + u8 ucTXOPReq:1;
23503 + u8 ucReserved:1;
23504 + } By11eAp;
23505 +
23506 + struct
23507 + {
23508 + u8 ucReserved1:4;
23509 + u8 ucQAck:1;
23510 + u8 ucReserved2:2;
23511 + u8 ucMoreDataAck:1;
23512 + } ByWmmsaSta;
23513 +
23514 + struct
23515 + {
23516 + u8 ucReserved1:4;
23517 + u8 ucQAck:1;
23518 + u8 ucQueueReq:1;
23519 + u8 ucTXOPReq:1;
23520 + u8 ucReserved2:1;
23521 + } ByWmmsaAp;
23522 +
23523 + struct
23524 + {
23525 + u8 ucAC3_UAPSD:1;
23526 + u8 ucAC2_UAPSD:1;
23527 + u8 ucAC1_UAPSD:1;
23528 + u8 ucAC0_UAPSD:1;
23529 + u8 ucQAck:1;
23530 + u8 ucMaxSPLen:2;
23531 + u8 ucMoreDataAck:1;
23532 + } ByAllSta;
23533 +
23534 + struct
23535 + {
23536 + u8 ucParameterSetCount:4;
23537 + u8 ucQAck:1;
23538 + u8 ucQueueReq:1;
23539 + u8 ucTXOPReq:1;
23540 + u8 ucApUapsd:1;
23541 + } ByAllAp;
23542 +
23543 +}QOS_INFO_FIELD, *PQOS_INFO_FIELD;
23544 +
23545 +#if 0
23546 +//
23547 +// WMM Information Element
23548 +// Ref: WMM spec 2.2.1: WME Information Element, p.10.
23549 +//
23550 +typedef struct _WMM_INFO_ELEMENT{
23551 +// u8 ElementID;
23552 +// u8 Length;
23553 + u8 OUI[3];
23554 + u8 OUI_Type;
23555 + u8 OUI_SubType;
23556 + u8 Version;
23557 + QOS_INFO_FIELD QosInfo;
23558 +}WMM_INFO_ELEMENT, *PWMM_INFO_ELEMENT;
23559 +#endif
23560 +
23561 +//
23562 +// ACI to AC coding.
23563 +// Ref: WMM spec 2.2.2: WME Parameter Element, p.13.
23564 +//
23565 +// AC_CODING is redefined for enum can't be ++, | under C++ compiler, 2006.05.17, by rcnjko.
23566 +//typedef enum _AC_CODING{
23567 +// AC0_BE = 0, // ACI: 0x00 // Best Effort
23568 +// AC1_BK = 1, // ACI: 0x01 // Background
23569 +// AC2_VI = 2, // ACI: 0x10 // Video
23570 +// AC3_VO = 3, // ACI: 0x11 // Voice
23571 +// AC_MAX = 4, // Max: define total number; Should not to be used as a real enum.
23572 +//}AC_CODING,*PAC_CODING;
23573 +//
23574 +typedef u32 AC_CODING;
23575 +#define AC0_BE 0 // ACI: 0x00 // Best Effort
23576 +#define AC1_BK 1 // ACI: 0x01 // Background
23577 +#define AC2_VI 2 // ACI: 0x10 // Video
23578 +#define AC3_VO 3 // ACI: 0x11 // Voice
23579 +#define AC_MAX 4 // Max: define total number; Should not to be used as a real enum.
23580 +
23581 +//
23582 +// ACI/AIFSN Field.
23583 +// Ref: WMM spec 2.2.2: WME Parameter Element, p.12.
23584 +//
23585 +typedef union _ACI_AIFSN{
23586 + u8 charData;
23587 +
23588 + struct
23589 + {
23590 + u8 AIFSN:4;
23591 + u8 ACM:1;
23592 + u8 ACI:2;
23593 + u8 Reserved:1;
23594 + }f; // Field
23595 +}ACI_AIFSN, *PACI_AIFSN;
23596 +
23597 +//
23598 +// ECWmin/ECWmax field.
23599 +// Ref: WMM spec 2.2.2: WME Parameter Element, p.13.
23600 +//
23601 +typedef union _ECW{
23602 + u8 charData;
23603 + struct
23604 + {
23605 + u8 ECWmin:4;
23606 + u8 ECWmax:4;
23607 + }f; // Field
23608 +}ECW, *PECW;
23609 +
23610 +//
23611 +// AC Parameters Record Format.
23612 +// Ref: WMM spec 2.2.2: WME Parameter Element, p.12.
23613 +//
23614 +typedef union _AC_PARAM{
23615 + u32 longData;
23616 + u8 charData[4];
23617 +
23618 + struct
23619 + {
23620 + ACI_AIFSN AciAifsn;
23621 + ECW Ecw;
23622 + u16 TXOPLimit;
23623 + }f; // Field
23624 +}AC_PARAM, *PAC_PARAM;
23625 +
23626 +
23627 +
23628 +//
23629 +// QoS element subtype
23630 +//
23631 +typedef enum _QOS_ELE_SUBTYPE{
23632 + QOSELE_TYPE_INFO = 0x00, // 0x00: Information element
23633 + QOSELE_TYPE_PARAM = 0x01, // 0x01: parameter element
23634 +}QOS_ELE_SUBTYPE,*PQOS_ELE_SUBTYPE;
23635 +
23636 +
23637 +//
23638 +// Direction Field Values.
23639 +// Ref: WMM spec 2.2.11: WME TSPEC Element, p.18.
23640 +//
23641 +typedef enum _DIRECTION_VALUE{
23642 + DIR_UP = 0, // 0x00 // UpLink
23643 + DIR_DOWN = 1, // 0x01 // DownLink
23644 + DIR_DIRECT = 2, // 0x10 // DirectLink
23645 + DIR_BI_DIR = 3, // 0x11 // Bi-Direction
23646 +}DIRECTION_VALUE,*PDIRECTION_VALUE;
23647 +
23648 +
23649 +//
23650 +// TS Info field in WMM TSPEC Element.
23651 +// Ref:
23652 +// 1. WMM spec 2.2.11: WME TSPEC Element, p.18.
23653 +// 2. 8185 QoS code: QOS_TSINFO [def. in QoS_mp.h]
23654 +//
23655 +typedef union _QOS_TSINFO{
23656 + u8 charData[3];
23657 + struct {
23658 + u8 ucTrafficType:1; //WMM is reserved
23659 + u8 ucTSID:4;
23660 + u8 ucDirection:2;
23661 + u8 ucAccessPolicy:2; //WMM: bit8=0, bit7=1
23662 + u8 ucAggregation:1; //WMM is reserved
23663 + u8 ucPSB:1; //WMMSA is APSD
23664 + u8 ucUP:3;
23665 + u8 ucTSInfoAckPolicy:2; //WMM is reserved
23666 + u8 ucSchedule:1; //WMM is reserved
23667 + u8 ucReserved:7;
23668 + }field;
23669 +}QOS_TSINFO, *PQOS_TSINFO;
23670 +
23671 +//
23672 +// WMM TSPEC Body.
23673 +// Ref: WMM spec 2.2.11: WME TSPEC Element, p.16.
23674 +//
23675 +typedef union _TSPEC_BODY{
23676 + u8 charData[55];
23677 +
23678 + struct
23679 + {
23680 + QOS_TSINFO TSInfo; //u8 TSInfo[3];
23681 + u16 NominalMSDUsize;
23682 + u16 MaxMSDUsize;
23683 + u32 MinServiceItv;
23684 + u32 MaxServiceItv;
23685 + u32 InactivityItv;
23686 + u32 SuspenItv;
23687 + u32 ServiceStartTime;
23688 + u32 MinDataRate;
23689 + u32 MeanDataRate;
23690 + u32 PeakDataRate;
23691 + u32 MaxBurstSize;
23692 + u32 DelayBound;
23693 + u32 MinPhyRate;
23694 + u16 SurplusBandwidthAllowance;
23695 + u16 MediumTime;
23696 + } f; // Field
23697 +}TSPEC_BODY, *PTSPEC_BODY;
23698 +
23699 +
23700 +//
23701 +// WMM TSPEC Element.
23702 +// Ref: WMM spec 2.2.11: WME TSPEC Element, p.16.
23703 +//
23704 +typedef struct _WMM_TSPEC{
23705 + u8 ID;
23706 + u8 Length;
23707 + u8 OUI[3];
23708 + u8 OUI_Type;
23709 + u8 OUI_SubType;
23710 + u8 Version;
23711 + TSPEC_BODY Body;
23712 +} WMM_TSPEC, *PWMM_TSPEC;
23713 +
23714 +//
23715 +// ACM implementation method.
23716 +// Annie, 2005-12-13.
23717 +//
23718 +typedef enum _ACM_METHOD{
23719 + eAcmWay0_SwAndHw = 0, // By SW and HW.
23720 + eAcmWay1_HW = 1, // By HW.
23721 + eAcmWay2_SW = 2, // By SW.
23722 +}ACM_METHOD,*PACM_METHOD;
23723 +
23724 +
23725 +typedef struct _ACM{
23726 +// u8 RegEnableACM;
23727 + u64 UsedTime;
23728 + u64 MediumTime;
23729 + u8 HwAcmCtl; // TRUE: UsedTime exceed => Do NOT USE this AC. It wll be written to ACM_CONTROL(0xBF BIT 0/1/2 in 8185B).
23730 +}ACM, *PACM;
23731 +
23732 +typedef u8 AC_UAPSD, *PAC_UAPSD;
23733 +
23734 +#define GET_VO_UAPSD(_apsd) ((_apsd) & BIT0)
23735 +#define SET_VO_UAPSD(_apsd) ((_apsd) |= BIT0)
23736 +
23737 +#define GET_VI_UAPSD(_apsd) ((_apsd) & BIT1)
23738 +#define SET_VI_UAPSD(_apsd) ((_apsd) |= BIT1)
23739 +
23740 +#define GET_BK_UAPSD(_apsd) ((_apsd) & BIT2)
23741 +#define SET_BK_UAPSD(_apsd) ((_apsd) |= BIT2)
23742 +
23743 +#define GET_BE_UAPSD(_apsd) ((_apsd) & BIT3)
23744 +#define SET_BE_UAPSD(_apsd) ((_apsd) |= BIT3)
23745 +
23746 +
23747 +//typedef struct _TCLASS{
23748 +// TODO
23749 +//} TCLASS, *PTCLASS;
23750 +typedef union _QOS_TCLAS{
23751 +
23752 + struct _TYPE_GENERAL{
23753 + u8 Priority;
23754 + u8 ClassifierType;
23755 + u8 Mask;
23756 + } TYPE_GENERAL;
23757 +
23758 + struct _TYPE0_ETH{
23759 + u8 Priority;
23760 + u8 ClassifierType;
23761 + u8 Mask;
23762 + u8 SrcAddr[6];
23763 + u8 DstAddr[6];
23764 + u16 Type;
23765 + } TYPE0_ETH;
23766 +
23767 + struct _TYPE1_IPV4{
23768 + u8 Priority;
23769 + u8 ClassifierType;
23770 + u8 Mask;
23771 + u8 Version;
23772 + u8 SrcIP[4];
23773 + u8 DstIP[4];
23774 + u16 SrcPort;
23775 + u16 DstPort;
23776 + u8 DSCP;
23777 + u8 Protocol;
23778 + u8 Reserved;
23779 + } TYPE1_IPV4;
23780 +
23781 + struct _TYPE1_IPV6{
23782 + u8 Priority;
23783 + u8 ClassifierType;
23784 + u8 Mask;
23785 + u8 Version;
23786 + u8 SrcIP[16];
23787 + u8 DstIP[16];
23788 + u16 SrcPort;
23789 + u16 DstPort;
23790 + u8 FlowLabel[3];
23791 + } TYPE1_IPV6;
23792 +
23793 + struct _TYPE2_8021Q{
23794 + u8 Priority;
23795 + u8 ClassifierType;
23796 + u8 Mask;
23797 + u16 TagType;
23798 + } TYPE2_8021Q;
23799 +} QOS_TCLAS, *PQOS_TCLAS;
23800 +
23801 +//typedef struct _WMM_TSTREAM{
23802 +//
23803 +//- TSPEC
23804 +//- AC (which to mapping)
23805 +//} WMM_TSTREAM, *PWMM_TSTREAM;
23806 +typedef struct _QOS_TSTREAM{
23807 + u8 AC;
23808 + WMM_TSPEC TSpec;
23809 + QOS_TCLAS TClass;
23810 +} QOS_TSTREAM, *PQOS_TSTREAM;
23811 +
23812 +//typedef struct _U_APSD{
23813 +//- TriggerEnable [4]
23814 +//- MaxSPLength
23815 +//- HighestAcBuffered
23816 +//} U_APSD, *PU_APSD;
23817 +
23818 +//joseph TODO:
23819 +// UAPSD function should be implemented by 2 data structure
23820 +// "Qos control field" and "Qos info field"
23821 +//typedef struct _QOS_UAPSD{
23822 +// u8 bTriggerEnable[4];
23823 +// u8 MaxSPLength;
23824 +// u8 HighestBufAC;
23825 +//} QOS_UAPSD, *PQOS_APSD;
23826 +
23827 +//----------------------------------------------------------------------------
23828 +// 802.11 Management frame Status Code field
23829 +//----------------------------------------------------------------------------
23830 +typedef struct _OCTET_STRING{
23831 + u8 *Octet;
23832 + u16 Length;
23833 +}OCTET_STRING, *POCTET_STRING;
23834 +#if 0
23835 +#define FillOctetString(_os,_octet,_len) \
23836 + (_os).Octet=(u8 *)(_octet); \
23837 + (_os).Length=(_len);
23838 +
23839 +#define WMM_ELEM_HDR_LEN 6
23840 +#define WMMElemSkipHdr(_osWMMElem) \
23841 + (_osWMMElem).Octet += WMM_ELEM_HDR_LEN; \
23842 + (_osWMMElem).Length -= WMM_ELEM_HDR_LEN;
23843 +#endif
23844 +//
23845 +// STA QoS data.
23846 +// Ref: DOT11_QOS in 8185 code. [def. in QoS_mp.h]
23847 +//
23848 +typedef struct _STA_QOS{
23849 + //DECLARE_RT_OBJECT(STA_QOS);
23850 + u8 WMMIEBuf[MAX_WMMELE_LENGTH];
23851 + u8* WMMIE;
23852 +
23853 + // Part 1. Self QoS Mode.
23854 + QOS_MODE QosCapability; //QoS Capability, 2006-06-14 Isaiah
23855 + QOS_MODE CurrentQosMode;
23856 +
23857 + // For WMM Power Save Mode :
23858 + // ACs are trigger/delivery enabled or legacy power save enabled. 2006-06-13 Isaiah
23859 + AC_UAPSD b4ac_Uapsd; //VoUapsd(bit0), ViUapsd(bit1), BkUapsd(bit2), BeUapsd(bit3),
23860 + AC_UAPSD Curr4acUapsd;
23861 + u8 bInServicePeriod;
23862 + u8 MaxSPLength;
23863 + int NumBcnBeforeTrigger;
23864 +
23865 + // Part 2. EDCA Parameter (perAC)
23866 + u8 * pWMMInfoEle;
23867 + u8 WMMParamEle[WMM_PARAM_ELEMENT_SIZE];
23868 + u8 WMMPELength;
23869 +
23870 + // <Bruce_Note>
23871 + //2 ToDo: remove the Qos Info Field and replace it by the above WMM Info element.
23872 + // By Bruce, 2008-01-30.
23873 + // Part 2. EDCA Parameter (perAC)
23874 + QOS_INFO_FIELD QosInfoField_STA; // Maintained by STA
23875 + QOS_INFO_FIELD QosInfoField_AP; // Retrieved from AP
23876 +
23877 + AC_PARAM CurAcParameters[4];
23878 +
23879 + // Part 3. ACM
23880 + ACM acm[4];
23881 + ACM_METHOD AcmMethod;
23882 +
23883 + // Part 4. Per TID (Part 5: TCLASS will be described by TStream)
23884 + QOS_TSTREAM TStream[16];
23885 + WMM_TSPEC TSpec;
23886 +
23887 + u32 QBssWirelessMode;
23888 +
23889 + // No Ack Setting
23890 + u8 bNoAck;
23891 +
23892 + // Enable/Disable Rx immediate BA capability.
23893 + u8 bEnableRxImmBA;
23894 +
23895 +}STA_QOS, *PSTA_QOS;
23896 +
23897 +//
23898 +// BSS QOS data.
23899 +// Ref: BssDscr in 8185 code. [def. in BssDscr.h]
23900 +//
23901 +typedef struct _BSS_QOS{
23902 + QOS_MODE bdQoSMode;
23903 +
23904 + u8 bdWMMIEBuf[MAX_WMMELE_LENGTH];
23905 + u8* bdWMMIE;
23906 +
23907 + QOS_ELE_SUBTYPE EleSubType;
23908 +
23909 + u8 * pWMMInfoEle;
23910 + u8 * pWMMParamEle;
23911 +
23912 + QOS_INFO_FIELD QosInfoField;
23913 + AC_PARAM AcParameter[4];
23914 +}BSS_QOS, *PBSS_QOS;
23915 +
23916 +
23917 +//
23918 +// Ref: sQoSCtlLng and QoSCtl definition in 8185 QoS code.
23919 +//#define QoSCtl (( (Adapter->bRegQoS) && (Adapter->dot11QoS.QoSMode &(QOS_EDCA|QOS_HCCA)) ) ?sQoSCtlLng:0)
23920 +//
23921 +#define sQoSCtlLng 2
23922 +#define QOS_CTRL_LEN(_QosMode) ((_QosMode > QOS_DISABLE)? sQoSCtlLng : 0)
23923 +
23924 +
23925 +//Added by joseph
23926 +//UP Mapping to AC, using in MgntQuery_SequenceNumber() and maybe for DSCP
23927 +//#define UP2AC(up) ((up<3)?((up==0)?1:0):(up>>1))
23928 +#define IsACValid(ac) ((ac<=7 )?true:false )
23929 +
23930 +#endif // #ifndef __INC_QOS_TYPE_H
23931 --- /dev/null
23932 +++ b/drivers/staging/rtl8192e/ieee80211/rtl819x_TS.h
23933 @@ -0,0 +1,56 @@
23934 +#ifndef _TSTYPE_H_
23935 +#define _TSTYPE_H_
23936 +#include "rtl819x_Qos.h"
23937 +#define TS_SETUP_TIMEOUT 60 // In millisecond
23938 +#define TS_INACT_TIMEOUT 60
23939 +#define TS_ADDBA_DELAY 60
23940 +
23941 +#define TOTAL_TS_NUM 16
23942 +#define TCLAS_NUM 4
23943 +
23944 +// This define the Tx/Rx directions
23945 +typedef enum _TR_SELECT {
23946 + TX_DIR = 0,
23947 + RX_DIR = 1,
23948 +} TR_SELECT, *PTR_SELECT;
23949 +
23950 +typedef struct _TS_COMMON_INFO{
23951 + struct list_head List;
23952 + struct timer_list SetupTimer;
23953 + struct timer_list InactTimer;
23954 + u8 Addr[6];
23955 + TSPEC_BODY TSpec;
23956 + QOS_TCLAS TClass[TCLAS_NUM];
23957 + u8 TClasProc;
23958 + u8 TClasNum;
23959 +} TS_COMMON_INFO, *PTS_COMMON_INFO;
23960 +
23961 +typedef struct _TX_TS_RECORD{
23962 + TS_COMMON_INFO TsCommonInfo;
23963 + u16 TxCurSeq;
23964 + BA_RECORD TxPendingBARecord; // For BA Originator
23965 + BA_RECORD TxAdmittedBARecord; // For BA Originator
23966 +// QOS_DL_RECORD DLRecord;
23967 + u8 bAddBaReqInProgress;
23968 + u8 bAddBaReqDelayed;
23969 + u8 bUsingBa;
23970 + struct timer_list TsAddBaTimer;
23971 + u8 num;
23972 +} TX_TS_RECORD, *PTX_TS_RECORD;
23973 +
23974 +typedef struct _RX_TS_RECORD {
23975 + TS_COMMON_INFO TsCommonInfo;
23976 + u16 RxIndicateSeq;
23977 + u16 RxTimeoutIndicateSeq;
23978 + struct list_head RxPendingPktList;
23979 + struct timer_list RxPktPendingTimer;
23980 + BA_RECORD RxAdmittedBARecord; // For BA Recepient
23981 + u16 RxLastSeqNum;
23982 + u8 RxLastFragNum;
23983 + u8 num;
23984 +// QOS_DL_RECORD DLRecord;
23985 +} RX_TS_RECORD, *PRX_TS_RECORD;
23986 +
23987 +
23988 +#endif
23989 +
23990 --- /dev/null
23991 +++ b/drivers/staging/rtl8192e/ieee80211/rtl819x_TSProc.c
23992 @@ -0,0 +1,659 @@
23993 +#include "ieee80211.h"
23994 +#include <linux/etherdevice.h>
23995 +#include "rtl819x_TS.h"
23996 +
23997 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
23998 +#define list_for_each_entry_safe(pos, n, head, member) \
23999 + for (pos = list_entry((head)->next, typeof(*pos), member), \
24000 + n = list_entry(pos->member.next, typeof(*pos), member); \
24001 + &pos->member != (head); \
24002 + pos = n, n = list_entry(n->member.next, typeof(*n), member))
24003 +#endif
24004 +void TsSetupTimeOut(unsigned long data)
24005 +{
24006 + // Not implement yet
24007 + // This is used for WMMSA and ACM , that would send ADDTSReq frame.
24008 +}
24009 +
24010 +void TsInactTimeout(unsigned long data)
24011 +{
24012 + // Not implement yet
24013 + // This is used for WMMSA and ACM.
24014 + // This function would be call when TS is no Tx/Rx for some period of time.
24015 +}
24016 +
24017 +/********************************************************************************************************************
24018 + *function: I still not understand this function, so wait for further implementation
24019 + * input: unsigned long data //acturally we send TX_TS_RECORD or RX_TS_RECORD to these timer
24020 + * return: NULL
24021 + * notice:
24022 +********************************************************************************************************************/
24023 +#if 1
24024 +void RxPktPendingTimeout(unsigned long data)
24025 +{
24026 + PRX_TS_RECORD pRxTs = (PRX_TS_RECORD)data;
24027 + struct ieee80211_device *ieee = container_of(pRxTs, struct ieee80211_device, RxTsRecord[pRxTs->num]);
24028 +
24029 + PRX_REORDER_ENTRY pReorderEntry = NULL;
24030 +
24031 + //u32 flags = 0;
24032 + unsigned long flags = 0;
24033 + struct ieee80211_rxb *stats_IndicateArray[REORDER_WIN_SIZE];
24034 + u8 index = 0;
24035 + bool bPktInBuf = false;
24036 +
24037 +
24038 + spin_lock_irqsave(&(ieee->reorder_spinlock), flags);
24039 + //PlatformAcquireSpinLock(Adapter, RT_RX_SPINLOCK);
24040 + IEEE80211_DEBUG(IEEE80211_DL_REORDER,"==================>%s()\n",__FUNCTION__);
24041 + if(pRxTs->RxTimeoutIndicateSeq != 0xffff)
24042 + {
24043 + // Indicate the pending packets sequentially according to SeqNum until meet the gap.
24044 + while(!list_empty(&pRxTs->RxPendingPktList))
24045 + {
24046 + pReorderEntry = (PRX_REORDER_ENTRY)list_entry(pRxTs->RxPendingPktList.prev,RX_REORDER_ENTRY,List);
24047 + if(index == 0)
24048 + pRxTs->RxIndicateSeq = pReorderEntry->SeqNum;
24049 +
24050 + if( SN_LESS(pReorderEntry->SeqNum, pRxTs->RxIndicateSeq) ||
24051 + SN_EQUAL(pReorderEntry->SeqNum, pRxTs->RxIndicateSeq) )
24052 + {
24053 + list_del_init(&pReorderEntry->List);
24054 +
24055 + if(SN_EQUAL(pReorderEntry->SeqNum, pRxTs->RxIndicateSeq))
24056 + pRxTs->RxIndicateSeq = (pRxTs->RxIndicateSeq + 1) % 4096;
24057 +
24058 + IEEE80211_DEBUG(IEEE80211_DL_REORDER,"RxPktPendingTimeout(): IndicateSeq: %d\n", pReorderEntry->SeqNum);
24059 + stats_IndicateArray[index] = pReorderEntry->prxb;
24060 + index++;
24061 +
24062 + list_add_tail(&pReorderEntry->List, &ieee->RxReorder_Unused_List);
24063 + }
24064 + else
24065 + {
24066 + bPktInBuf = true;
24067 + break;
24068 + }
24069 + }
24070 + }
24071 +
24072 + if(index>0)
24073 + {
24074 + // Set RxTimeoutIndicateSeq to 0xffff to indicate no pending packets in buffer now.
24075 + pRxTs->RxTimeoutIndicateSeq = 0xffff;
24076 +
24077 + // Indicate packets
24078 + if(index > REORDER_WIN_SIZE){
24079 + IEEE80211_DEBUG(IEEE80211_DL_ERR, "RxReorderIndicatePacket(): Rx Reorer buffer full!! \n");
24080 + spin_unlock_irqrestore(&(ieee->reorder_spinlock), flags);
24081 + return;
24082 + }
24083 + ieee80211_indicate_packets(ieee, stats_IndicateArray, index);
24084 + bPktInBuf = false;
24085 + }
24086 +
24087 + if(bPktInBuf && (pRxTs->RxTimeoutIndicateSeq==0xffff))
24088 + {
24089 + pRxTs->RxTimeoutIndicateSeq = pRxTs->RxIndicateSeq;
24090 +#if 0
24091 + if(timer_pending(&pRxTs->RxPktPendingTimer))
24092 + del_timer_sync(&pRxTs->RxPktPendingTimer);
24093 + pRxTs->RxPktPendingTimer.expires = jiffies + ieee->pHTInfo->RxReorderPendingTime;
24094 + add_timer(&pRxTs->RxPktPendingTimer);
24095 +#else
24096 + mod_timer(&pRxTs->RxPktPendingTimer, jiffies + MSECS(ieee->pHTInfo->RxReorderPendingTime));
24097 +#endif
24098 + }
24099 + spin_unlock_irqrestore(&(ieee->reorder_spinlock), flags);
24100 + //PlatformReleaseSpinLock(Adapter, RT_RX_SPINLOCK);
24101 +}
24102 +#endif
24103 +
24104 +/********************************************************************************************************************
24105 + *function: Add BA timer function
24106 + * input: unsigned long data //acturally we send TX_TS_RECORD or RX_TS_RECORD to these timer
24107 + * return: NULL
24108 + * notice:
24109 +********************************************************************************************************************/
24110 +void TsAddBaProcess(unsigned long data)
24111 +{
24112 + PTX_TS_RECORD pTxTs = (PTX_TS_RECORD)data;
24113 + u8 num = pTxTs->num;
24114 + struct ieee80211_device *ieee = container_of(pTxTs, struct ieee80211_device, TxTsRecord[num]);
24115 +
24116 + TsInitAddBA(ieee, pTxTs, BA_POLICY_IMMEDIATE, false);
24117 + IEEE80211_DEBUG(IEEE80211_DL_BA, "TsAddBaProcess(): ADDBA Req is started!! \n");
24118 +}
24119 +
24120 +
24121 +void ResetTsCommonInfo(PTS_COMMON_INFO pTsCommonInfo)
24122 +{
24123 + memset(pTsCommonInfo->Addr, 0, 6);
24124 + memset(&pTsCommonInfo->TSpec, 0, sizeof(TSPEC_BODY));
24125 + memset(&pTsCommonInfo->TClass, 0, sizeof(QOS_TCLAS)*TCLAS_NUM);
24126 + pTsCommonInfo->TClasProc = 0;
24127 + pTsCommonInfo->TClasNum = 0;
24128 +}
24129 +
24130 +void ResetTxTsEntry(PTX_TS_RECORD pTS)
24131 +{
24132 + ResetTsCommonInfo(&pTS->TsCommonInfo);
24133 + pTS->TxCurSeq = 0;
24134 + pTS->bAddBaReqInProgress = false;
24135 + pTS->bAddBaReqDelayed = false;
24136 + pTS->bUsingBa = false;
24137 + ResetBaEntry(&pTS->TxAdmittedBARecord); //For BA Originator
24138 + ResetBaEntry(&pTS->TxPendingBARecord);
24139 +}
24140 +
24141 +void ResetRxTsEntry(PRX_TS_RECORD pTS)
24142 +{
24143 + ResetTsCommonInfo(&pTS->TsCommonInfo);
24144 + pTS->RxIndicateSeq = 0xffff; // This indicate the RxIndicateSeq is not used now!!
24145 + pTS->RxTimeoutIndicateSeq = 0xffff; // This indicate the RxTimeoutIndicateSeq is not used now!!
24146 + ResetBaEntry(&pTS->RxAdmittedBARecord); // For BA Recepient
24147 +}
24148 +
24149 +void TSInitialize(struct ieee80211_device *ieee)
24150 +{
24151 + PTX_TS_RECORD pTxTS = ieee->TxTsRecord;
24152 + PRX_TS_RECORD pRxTS = ieee->RxTsRecord;
24153 + PRX_REORDER_ENTRY pRxReorderEntry = ieee->RxReorderEntry;
24154 + u8 count = 0;
24155 + IEEE80211_DEBUG(IEEE80211_DL_TS, "==========>%s()\n", __FUNCTION__);
24156 + // Initialize Tx TS related info.
24157 + INIT_LIST_HEAD(&ieee->Tx_TS_Admit_List);
24158 + INIT_LIST_HEAD(&ieee->Tx_TS_Pending_List);
24159 + INIT_LIST_HEAD(&ieee->Tx_TS_Unused_List);
24160 +
24161 + for(count = 0; count < TOTAL_TS_NUM; count++)
24162 + {
24163 + //
24164 + pTxTS->num = count;
24165 + // The timers for the operation of Traffic Stream and Block Ack.
24166 + // DLS related timer will be add here in the future!!
24167 + init_timer(&pTxTS->TsCommonInfo.SetupTimer);
24168 + pTxTS->TsCommonInfo.SetupTimer.data = (unsigned long)pTxTS;
24169 + pTxTS->TsCommonInfo.SetupTimer.function = TsSetupTimeOut;
24170 +
24171 + init_timer(&pTxTS->TsCommonInfo.InactTimer);
24172 + pTxTS->TsCommonInfo.InactTimer.data = (unsigned long)pTxTS;
24173 + pTxTS->TsCommonInfo.InactTimer.function = TsInactTimeout;
24174 +
24175 + init_timer(&pTxTS->TsAddBaTimer);
24176 + pTxTS->TsAddBaTimer.data = (unsigned long)pTxTS;
24177 + pTxTS->TsAddBaTimer.function = TsAddBaProcess;
24178 +
24179 + init_timer(&pTxTS->TxPendingBARecord.Timer);
24180 + pTxTS->TxPendingBARecord.Timer.data = (unsigned long)pTxTS;
24181 + pTxTS->TxPendingBARecord.Timer.function = BaSetupTimeOut;
24182 +
24183 + init_timer(&pTxTS->TxAdmittedBARecord.Timer);
24184 + pTxTS->TxAdmittedBARecord.Timer.data = (unsigned long)pTxTS;
24185 + pTxTS->TxAdmittedBARecord.Timer.function = TxBaInactTimeout;
24186 +
24187 + ResetTxTsEntry(pTxTS);
24188 + list_add_tail(&pTxTS->TsCommonInfo.List, &ieee->Tx_TS_Unused_List);
24189 + pTxTS++;
24190 + }
24191 +
24192 + // Initialize Rx TS related info.
24193 + INIT_LIST_HEAD(&ieee->Rx_TS_Admit_List);
24194 + INIT_LIST_HEAD(&ieee->Rx_TS_Pending_List);
24195 + INIT_LIST_HEAD(&ieee->Rx_TS_Unused_List);
24196 + for(count = 0; count < TOTAL_TS_NUM; count++)
24197 + {
24198 + pRxTS->num = count;
24199 + INIT_LIST_HEAD(&pRxTS->RxPendingPktList);
24200 +
24201 + init_timer(&pRxTS->TsCommonInfo.SetupTimer);
24202 + pRxTS->TsCommonInfo.SetupTimer.data = (unsigned long)pRxTS;
24203 + pRxTS->TsCommonInfo.SetupTimer.function = TsSetupTimeOut;
24204 +
24205 + init_timer(&pRxTS->TsCommonInfo.InactTimer);
24206 + pRxTS->TsCommonInfo.InactTimer.data = (unsigned long)pRxTS;
24207 + pRxTS->TsCommonInfo.InactTimer.function = TsInactTimeout;
24208 +
24209 + init_timer(&pRxTS->RxAdmittedBARecord.Timer);
24210 + pRxTS->RxAdmittedBARecord.Timer.data = (unsigned long)pRxTS;
24211 + pRxTS->RxAdmittedBARecord.Timer.function = RxBaInactTimeout;
24212 +
24213 + init_timer(&pRxTS->RxPktPendingTimer);
24214 + pRxTS->RxPktPendingTimer.data = (unsigned long)pRxTS;
24215 + pRxTS->RxPktPendingTimer.function = RxPktPendingTimeout;
24216 +
24217 + ResetRxTsEntry(pRxTS);
24218 + list_add_tail(&pRxTS->TsCommonInfo.List, &ieee->Rx_TS_Unused_List);
24219 + pRxTS++;
24220 + }
24221 + // Initialize unused Rx Reorder List.
24222 + INIT_LIST_HEAD(&ieee->RxReorder_Unused_List);
24223 +//#ifdef TO_DO_LIST
24224 + for(count = 0; count < REORDER_ENTRY_NUM; count++)
24225 + {
24226 + list_add_tail( &pRxReorderEntry->List,&ieee->RxReorder_Unused_List);
24227 + if(count == (REORDER_ENTRY_NUM-1))
24228 + break;
24229 + pRxReorderEntry = &ieee->RxReorderEntry[count+1];
24230 + }
24231 +//#endif
24232 +
24233 +}
24234 +
24235 +void AdmitTS(struct ieee80211_device *ieee, PTS_COMMON_INFO pTsCommonInfo, u32 InactTime)
24236 +{
24237 + del_timer_sync(&pTsCommonInfo->SetupTimer);
24238 + del_timer_sync(&pTsCommonInfo->InactTimer);
24239 +
24240 + if(InactTime!=0)
24241 + mod_timer(&pTsCommonInfo->InactTimer, jiffies + MSECS(InactTime));
24242 +}
24243 +
24244 +
24245 +PTS_COMMON_INFO SearchAdmitTRStream(struct ieee80211_device *ieee, u8* Addr, u8 TID, TR_SELECT TxRxSelect)
24246 +{
24247 + //DIRECTION_VALUE dir;
24248 + u8 dir;
24249 + bool search_dir[4] = {0, 0, 0, 0};
24250 + struct list_head* psearch_list; //FIXME
24251 + PTS_COMMON_INFO pRet = NULL;
24252 + if(ieee->iw_mode == IW_MODE_MASTER) //ap mode
24253 + {
24254 + if(TxRxSelect == TX_DIR)
24255 + {
24256 + search_dir[DIR_DOWN] = true;
24257 + search_dir[DIR_BI_DIR]= true;
24258 + }
24259 + else
24260 + {
24261 + search_dir[DIR_UP] = true;
24262 + search_dir[DIR_BI_DIR]= true;
24263 + }
24264 + }
24265 + else if(ieee->iw_mode == IW_MODE_ADHOC)
24266 + {
24267 + if(TxRxSelect == TX_DIR)
24268 + search_dir[DIR_UP] = true;
24269 + else
24270 + search_dir[DIR_DOWN] = true;
24271 + }
24272 + else
24273 + {
24274 + if(TxRxSelect == TX_DIR)
24275 + {
24276 + search_dir[DIR_UP] = true;
24277 + search_dir[DIR_BI_DIR]= true;
24278 + search_dir[DIR_DIRECT]= true;
24279 + }
24280 + else
24281 + {
24282 + search_dir[DIR_DOWN] = true;
24283 + search_dir[DIR_BI_DIR]= true;
24284 + search_dir[DIR_DIRECT]= true;
24285 + }
24286 + }
24287 +
24288 + if(TxRxSelect == TX_DIR)
24289 + psearch_list = &ieee->Tx_TS_Admit_List;
24290 + else
24291 + psearch_list = &ieee->Rx_TS_Admit_List;
24292 +
24293 + //for(dir = DIR_UP; dir <= DIR_BI_DIR; dir++)
24294 + for(dir = 0; dir <= DIR_BI_DIR; dir++)
24295 + {
24296 + if(search_dir[dir] ==false )
24297 + continue;
24298 + list_for_each_entry(pRet, psearch_list, List){
24299 + // IEEE80211_DEBUG(IEEE80211_DL_TS, "ADD:"MAC_FMT", TID:%d, dir:%d\n", MAC_ARG(pRet->Addr), pRet->TSpec.f.TSInfo.field.ucTSID, pRet->TSpec.f.TSInfo.field.ucDirection);
24300 + if (memcmp(pRet->Addr, Addr, 6) == 0)
24301 + if (pRet->TSpec.f.TSInfo.field.ucTSID == TID)
24302 + if(pRet->TSpec.f.TSInfo.field.ucDirection == dir)
24303 + {
24304 + // printk("Bingo! got it\n");
24305 + break;
24306 + }
24307 +
24308 + }
24309 + if(&pRet->List != psearch_list)
24310 + break;
24311 + }
24312 +
24313 + if(&pRet->List != psearch_list){
24314 + return pRet ;
24315 + }
24316 + else
24317 + return NULL;
24318 +}
24319 +
24320 +void MakeTSEntry(
24321 + PTS_COMMON_INFO pTsCommonInfo,
24322 + u8* Addr,
24323 + PTSPEC_BODY pTSPEC,
24324 + PQOS_TCLAS pTCLAS,
24325 + u8 TCLAS_Num,
24326 + u8 TCLAS_Proc
24327 + )
24328 +{
24329 + u8 count;
24330 +
24331 + if(pTsCommonInfo == NULL)
24332 + return;
24333 +
24334 + memcpy(pTsCommonInfo->Addr, Addr, 6);
24335 +
24336 + if(pTSPEC != NULL)
24337 + memcpy((u8*)(&(pTsCommonInfo->TSpec)), (u8*)pTSPEC, sizeof(TSPEC_BODY));
24338 +
24339 + for(count = 0; count < TCLAS_Num; count++)
24340 + memcpy((u8*)(&(pTsCommonInfo->TClass[count])), (u8*)pTCLAS, sizeof(QOS_TCLAS));
24341 +
24342 + pTsCommonInfo->TClasProc = TCLAS_Proc;
24343 + pTsCommonInfo->TClasNum = TCLAS_Num;
24344 +}
24345 +
24346 +
24347 +bool GetTs(
24348 + struct ieee80211_device* ieee,
24349 + PTS_COMMON_INFO *ppTS,
24350 + u8* Addr,
24351 + u8 TID,
24352 + TR_SELECT TxRxSelect, //Rx:1, Tx:0
24353 + bool bAddNewTs
24354 + )
24355 +{
24356 + u8 UP = 0;
24357 + //
24358 + // We do not build any TS for Broadcast or Multicast stream.
24359 + // So reject these kinds of search here.
24360 + //
24361 + if(is_broadcast_ether_addr(Addr) || is_multicast_ether_addr(Addr))
24362 + {
24363 + IEEE80211_DEBUG(IEEE80211_DL_ERR, "get TS for Broadcast or Multicast\n");
24364 + return false;
24365 + }
24366 +#if 0
24367 + if(ieee->pStaQos->CurrentQosMode == QOS_DISABLE)
24368 + { UP = 0; } //only use one TS
24369 + else if(ieee->pStaQos->CurrentQosMode & QOS_WMM)
24370 + {
24371 +#else
24372 + if (ieee->current_network.qos_data.supported == 0)
24373 + UP = 0;
24374 + else
24375 + {
24376 +#endif
24377 + // In WMM case: we use 4 TID only
24378 + if (!IsACValid(TID))
24379 + {
24380 + IEEE80211_DEBUG(IEEE80211_DL_ERR, " in %s(), TID(%d) is not valid\n", __FUNCTION__, TID);
24381 + return false;
24382 + }
24383 +
24384 + switch(TID)
24385 + {
24386 + case 0:
24387 + case 3:
24388 + UP = 0;
24389 + break;
24390 +
24391 + case 1:
24392 + case 2:
24393 + UP = 2;
24394 + break;
24395 +
24396 + case 4:
24397 + case 5:
24398 + UP = 5;
24399 + break;
24400 +
24401 + case 6:
24402 + case 7:
24403 + UP = 7;
24404 + break;
24405 + }
24406 + }
24407 +
24408 + *ppTS = SearchAdmitTRStream(
24409 + ieee,
24410 + Addr,
24411 + UP,
24412 + TxRxSelect);
24413 + if(*ppTS != NULL)
24414 + {
24415 + return true;
24416 + }
24417 + else
24418 + {
24419 + if(bAddNewTs == false)
24420 + {
24421 + IEEE80211_DEBUG(IEEE80211_DL_TS, "add new TS failed(tid:%d)\n", UP);
24422 + return false;
24423 + }
24424 + else
24425 + {
24426 + //
24427 + // Create a new Traffic stream for current Tx/Rx
24428 + // This is for EDCA and WMM to add a new TS.
24429 + // For HCCA or WMMSA, TS cannot be addmit without negotiation.
24430 + //
24431 + TSPEC_BODY TSpec;
24432 + PQOS_TSINFO pTSInfo = &TSpec.f.TSInfo;
24433 + struct list_head* pUnusedList =
24434 + (TxRxSelect == TX_DIR)?
24435 + (&ieee->Tx_TS_Unused_List):
24436 + (&ieee->Rx_TS_Unused_List);
24437 +
24438 + struct list_head* pAddmitList =
24439 + (TxRxSelect == TX_DIR)?
24440 + (&ieee->Tx_TS_Admit_List):
24441 + (&ieee->Rx_TS_Admit_List);
24442 +
24443 + DIRECTION_VALUE Dir = (ieee->iw_mode == IW_MODE_MASTER)?
24444 + ((TxRxSelect==TX_DIR)?DIR_DOWN:DIR_UP):
24445 + ((TxRxSelect==TX_DIR)?DIR_UP:DIR_DOWN);
24446 + IEEE80211_DEBUG(IEEE80211_DL_TS, "to add Ts\n");
24447 + if(!list_empty(pUnusedList))
24448 + {
24449 + (*ppTS) = list_entry(pUnusedList->next, TS_COMMON_INFO, List);
24450 + list_del_init(&(*ppTS)->List);
24451 + if(TxRxSelect==TX_DIR)
24452 + {
24453 + PTX_TS_RECORD tmp = container_of(*ppTS, TX_TS_RECORD, TsCommonInfo);
24454 + ResetTxTsEntry(tmp);
24455 + }
24456 + else{
24457 + PRX_TS_RECORD tmp = container_of(*ppTS, RX_TS_RECORD, TsCommonInfo);
24458 + ResetRxTsEntry(tmp);
24459 + }
24460 +
24461 + IEEE80211_DEBUG(IEEE80211_DL_TS, "to init current TS, UP:%d, Dir:%d, addr:"MAC_FMT"\n", UP, Dir, MAC_ARG(Addr));
24462 + // Prepare TS Info releated field
24463 + pTSInfo->field.ucTrafficType = 0; // Traffic type: WMM is reserved in this field
24464 + pTSInfo->field.ucTSID = UP; // TSID
24465 + pTSInfo->field.ucDirection = Dir; // Direction: if there is DirectLink, this need additional consideration.
24466 + pTSInfo->field.ucAccessPolicy = 1; // Access policy
24467 + pTSInfo->field.ucAggregation = 0; // Aggregation
24468 + pTSInfo->field.ucPSB = 0; // Aggregation
24469 + pTSInfo->field.ucUP = UP; // User priority
24470 + pTSInfo->field.ucTSInfoAckPolicy = 0; // Ack policy
24471 + pTSInfo->field.ucSchedule = 0; // Schedule
24472 +
24473 + MakeTSEntry(*ppTS, Addr, &TSpec, NULL, 0, 0);
24474 + AdmitTS(ieee, *ppTS, 0);
24475 + list_add_tail(&((*ppTS)->List), pAddmitList);
24476 + // if there is DirectLink, we need to do additional operation here!!
24477 +
24478 + return true;
24479 + }
24480 + else
24481 + {
24482 + IEEE80211_DEBUG(IEEE80211_DL_ERR, "in function %s() There is not enough TS record to be used!!", __FUNCTION__);
24483 + return false;
24484 + }
24485 + }
24486 + }
24487 +}
24488 +
24489 +void RemoveTsEntry(
24490 + struct ieee80211_device* ieee,
24491 + PTS_COMMON_INFO pTs,
24492 + TR_SELECT TxRxSelect
24493 + )
24494 +{
24495 + //u32 flags = 0;
24496 + unsigned long flags = 0;
24497 + del_timer_sync(&pTs->SetupTimer);
24498 + del_timer_sync(&pTs->InactTimer);
24499 + TsInitDelBA(ieee, pTs, TxRxSelect);
24500 +
24501 + if(TxRxSelect == RX_DIR)
24502 + {
24503 +//#ifdef TO_DO_LIST
24504 + PRX_REORDER_ENTRY pRxReorderEntry;
24505 + PRX_TS_RECORD pRxTS = (PRX_TS_RECORD)pTs;
24506 + if(timer_pending(&pRxTS->RxPktPendingTimer))
24507 + del_timer_sync(&pRxTS->RxPktPendingTimer);
24508 +
24509 + while(!list_empty(&pRxTS->RxPendingPktList))
24510 + {
24511 + // PlatformAcquireSpinLock(Adapter, RT_RX_SPINLOCK);
24512 + spin_lock_irqsave(&(ieee->reorder_spinlock), flags);
24513 + //pRxReorderEntry = list_entry(&pRxTS->RxPendingPktList.prev,RX_REORDER_ENTRY,List);
24514 + pRxReorderEntry = (PRX_REORDER_ENTRY)list_entry(pRxTS->RxPendingPktList.prev,RX_REORDER_ENTRY,List);
24515 + list_del_init(&pRxReorderEntry->List);
24516 + {
24517 + int i = 0;
24518 + struct ieee80211_rxb * prxb = pRxReorderEntry->prxb;
24519 + if (unlikely(!prxb))
24520 + {
24521 + spin_unlock_irqrestore(&(ieee->reorder_spinlock), flags);
24522 + return;
24523 + }
24524 + for(i =0; i < prxb->nr_subframes; i++) {
24525 + dev_kfree_skb(prxb->subframes[i]);
24526 + }
24527 + kfree(prxb);
24528 + prxb = NULL;
24529 + }
24530 + list_add_tail(&pRxReorderEntry->List,&ieee->RxReorder_Unused_List);
24531 + //PlatformReleaseSpinLock(Adapter, RT_RX_SPINLOCK);
24532 + spin_unlock_irqrestore(&(ieee->reorder_spinlock), flags);
24533 + }
24534 +
24535 +//#endif
24536 + }
24537 + else
24538 + {
24539 + PTX_TS_RECORD pTxTS = (PTX_TS_RECORD)pTs;
24540 + del_timer_sync(&pTxTS->TsAddBaTimer);
24541 + }
24542 +}
24543 +
24544 +void RemovePeerTS(struct ieee80211_device* ieee, u8* Addr)
24545 +{
24546 + PTS_COMMON_INFO pTS, pTmpTS;
24547 + printk("===========>RemovePeerTS,"MAC_FMT"\n", MAC_ARG(Addr));
24548 +#if 1
24549 + list_for_each_entry_safe(pTS, pTmpTS, &ieee->Tx_TS_Pending_List, List)
24550 + {
24551 + if (memcmp(pTS->Addr, Addr, 6) == 0)
24552 + {
24553 + RemoveTsEntry(ieee, pTS, TX_DIR);
24554 + list_del_init(&pTS->List);
24555 + list_add_tail(&pTS->List, &ieee->Tx_TS_Unused_List);
24556 + }
24557 + }
24558 +
24559 + list_for_each_entry_safe(pTS, pTmpTS, &ieee->Tx_TS_Admit_List, List)
24560 + {
24561 + if (memcmp(pTS->Addr, Addr, 6) == 0)
24562 + {
24563 + printk("====>remove Tx_TS_admin_list\n");
24564 + RemoveTsEntry(ieee, pTS, TX_DIR);
24565 + list_del_init(&pTS->List);
24566 + list_add_tail(&pTS->List, &ieee->Tx_TS_Unused_List);
24567 + }
24568 + }
24569 +
24570 + list_for_each_entry_safe(pTS, pTmpTS, &ieee->Rx_TS_Pending_List, List)
24571 + {
24572 + if (memcmp(pTS->Addr, Addr, 6) == 0)
24573 + {
24574 + RemoveTsEntry(ieee, pTS, RX_DIR);
24575 + list_del_init(&pTS->List);
24576 + list_add_tail(&pTS->List, &ieee->Rx_TS_Unused_List);
24577 + }
24578 + }
24579 +
24580 + list_for_each_entry_safe(pTS, pTmpTS, &ieee->Rx_TS_Admit_List, List)
24581 + {
24582 + if (memcmp(pTS->Addr, Addr, 6) == 0)
24583 + {
24584 + RemoveTsEntry(ieee, pTS, RX_DIR);
24585 + list_del_init(&pTS->List);
24586 + list_add_tail(&pTS->List, &ieee->Rx_TS_Unused_List);
24587 + }
24588 + }
24589 +#endif
24590 +}
24591 +
24592 +void RemoveAllTS(struct ieee80211_device* ieee)
24593 +{
24594 + PTS_COMMON_INFO pTS, pTmpTS;
24595 +#if 1
24596 + list_for_each_entry_safe(pTS, pTmpTS, &ieee->Tx_TS_Pending_List, List)
24597 + {
24598 + RemoveTsEntry(ieee, pTS, TX_DIR);
24599 + list_del_init(&pTS->List);
24600 + list_add_tail(&pTS->List, &ieee->Tx_TS_Unused_List);
24601 + }
24602 +
24603 + list_for_each_entry_safe(pTS, pTmpTS, &ieee->Tx_TS_Admit_List, List)
24604 + {
24605 + RemoveTsEntry(ieee, pTS, TX_DIR);
24606 + list_del_init(&pTS->List);
24607 + list_add_tail(&pTS->List, &ieee->Tx_TS_Unused_List);
24608 + }
24609 +
24610 + list_for_each_entry_safe(pTS, pTmpTS, &ieee->Rx_TS_Pending_List, List)
24611 + {
24612 + RemoveTsEntry(ieee, pTS, RX_DIR);
24613 + list_del_init(&pTS->List);
24614 + list_add_tail(&pTS->List, &ieee->Rx_TS_Unused_List);
24615 + }
24616 +
24617 + list_for_each_entry_safe(pTS, pTmpTS, &ieee->Rx_TS_Admit_List, List)
24618 + {
24619 + RemoveTsEntry(ieee, pTS, RX_DIR);
24620 + list_del_init(&pTS->List);
24621 + list_add_tail(&pTS->List, &ieee->Rx_TS_Unused_List);
24622 + }
24623 +#endif
24624 +}
24625 +
24626 +void TsStartAddBaProcess(struct ieee80211_device* ieee, PTX_TS_RECORD pTxTS)
24627 +{
24628 + if(pTxTS->bAddBaReqInProgress == false)
24629 + {
24630 + pTxTS->bAddBaReqInProgress = true;
24631 +#if 1
24632 + if(pTxTS->bAddBaReqDelayed)
24633 + {
24634 + IEEE80211_DEBUG(IEEE80211_DL_BA, "TsStartAddBaProcess(): Delayed Start ADDBA after 60 sec!!\n");
24635 + mod_timer(&pTxTS->TsAddBaTimer, jiffies + MSECS(TS_ADDBA_DELAY));
24636 + }
24637 + else
24638 + {
24639 + IEEE80211_DEBUG(IEEE80211_DL_BA,"TsStartAddBaProcess(): Immediately Start ADDBA now!!\n");
24640 + mod_timer(&pTxTS->TsAddBaTimer, jiffies+10); //set 10 ticks
24641 + }
24642 +#endif
24643 + }
24644 + else
24645 + IEEE80211_DEBUG(IEEE80211_DL_ERR, "%s()==>BA timer is already added\n", __FUNCTION__);
24646 +}
24647 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
24648 +EXPORT_SYMBOL_NOVERS(RemovePeerTS);
24649 +#else
24650 +//EXPORT_SYMBOL(RemovePeerTS);
24651 +#endif
24652 --- /dev/null
24653 +++ b/drivers/staging/rtl8192e/ieee80211/rtl_crypto.h
24654 @@ -0,0 +1,399 @@
24655 +/*
24656 + * Scatterlist Cryptographic API.
24657 + *
24658 + * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
24659 + * Copyright (c) 2002 David S. Miller (davem@redhat.com)
24660 + *
24661 + * Portions derived from Cryptoapi, by Alexander Kjeldaas <astor@fast.no>
24662 + * and Nettle, by Niels Mé°ˆler.
24663 + *
24664 + * This program is free software; you can redistribute it and/or modify it
24665 + * under the terms of the GNU General Public License as published by the Free
24666 + * Software Foundation; either version 2 of the License, or (at your option)
24667 + * any later version.
24668 + *
24669 + */
24670 +#ifndef _LINUX_CRYPTO_H
24671 +#define _LINUX_CRYPTO_H
24672 +
24673 +#include <linux/module.h>
24674 +#include <linux/kernel.h>
24675 +#include <linux/types.h>
24676 +#include <linux/list.h>
24677 +#include <linux/string.h>
24678 +#include <asm/page.h>
24679 +#include <asm/errno.h>
24680 +
24681 +#define crypto_register_alg crypto_register_alg_rsl
24682 +#define crypto_unregister_alg crypto_unregister_alg_rsl
24683 +#define crypto_alloc_tfm crypto_alloc_tfm_rsl
24684 +#define crypto_free_tfm crypto_free_tfm_rsl
24685 +#define crypto_alg_available crypto_alg_available_rsl
24686 +
24687 +/*
24688 + * Algorithm masks and types.
24689 + */
24690 +#define CRYPTO_ALG_TYPE_MASK 0x000000ff
24691 +#define CRYPTO_ALG_TYPE_CIPHER 0x00000001
24692 +#define CRYPTO_ALG_TYPE_DIGEST 0x00000002
24693 +#define CRYPTO_ALG_TYPE_COMPRESS 0x00000004
24694 +
24695 +/*
24696 + * Transform masks and values (for crt_flags).
24697 + */
24698 +#define CRYPTO_TFM_MODE_MASK 0x000000ff
24699 +#define CRYPTO_TFM_REQ_MASK 0x000fff00
24700 +#define CRYPTO_TFM_RES_MASK 0xfff00000
24701 +
24702 +#define CRYPTO_TFM_MODE_ECB 0x00000001
24703 +#define CRYPTO_TFM_MODE_CBC 0x00000002
24704 +#define CRYPTO_TFM_MODE_CFB 0x00000004
24705 +#define CRYPTO_TFM_MODE_CTR 0x00000008
24706 +
24707 +#define CRYPTO_TFM_REQ_WEAK_KEY 0x00000100
24708 +#define CRYPTO_TFM_RES_WEAK_KEY 0x00100000
24709 +#define CRYPTO_TFM_RES_BAD_KEY_LEN 0x00200000
24710 +#define CRYPTO_TFM_RES_BAD_KEY_SCHED 0x00400000
24711 +#define CRYPTO_TFM_RES_BAD_BLOCK_LEN 0x00800000
24712 +#define CRYPTO_TFM_RES_BAD_FLAGS 0x01000000
24713 +
24714 +/*
24715 + * Miscellaneous stuff.
24716 + */
24717 +#define CRYPTO_UNSPEC 0
24718 +#define CRYPTO_MAX_ALG_NAME 64
24719 +
24720 +struct scatterlist;
24721 +
24722 +/*
24723 + * Algorithms: modular crypto algorithm implementations, managed
24724 + * via crypto_register_alg() and crypto_unregister_alg().
24725 + */
24726 +struct cipher_alg {
24727 + unsigned int cia_min_keysize;
24728 + unsigned int cia_max_keysize;
24729 + int (*cia_setkey)(void *ctx, const u8 *key,
24730 + unsigned int keylen, u32 *flags);
24731 + void (*cia_encrypt)(void *ctx, u8 *dst, const u8 *src);
24732 + void (*cia_decrypt)(void *ctx, u8 *dst, const u8 *src);
24733 +};
24734 +
24735 +struct digest_alg {
24736 + unsigned int dia_digestsize;
24737 + void (*dia_init)(void *ctx);
24738 + void (*dia_update)(void *ctx, const u8 *data, unsigned int len);
24739 + void (*dia_final)(void *ctx, u8 *out);
24740 + int (*dia_setkey)(void *ctx, const u8 *key,
24741 + unsigned int keylen, u32 *flags);
24742 +};
24743 +
24744 +struct compress_alg {
24745 + int (*coa_init)(void *ctx);
24746 + void (*coa_exit)(void *ctx);
24747 + int (*coa_compress)(void *ctx, const u8 *src, unsigned int slen,
24748 + u8 *dst, unsigned int *dlen);
24749 + int (*coa_decompress)(void *ctx, const u8 *src, unsigned int slen,
24750 + u8 *dst, unsigned int *dlen);
24751 +};
24752 +
24753 +#define cra_cipher cra_u.cipher
24754 +#define cra_digest cra_u.digest
24755 +#define cra_compress cra_u.compress
24756 +
24757 +struct crypto_alg {
24758 + struct list_head cra_list;
24759 + u32 cra_flags;
24760 + unsigned int cra_blocksize;
24761 + unsigned int cra_ctxsize;
24762 + const char cra_name[CRYPTO_MAX_ALG_NAME];
24763 +
24764 + union {
24765 + struct cipher_alg cipher;
24766 + struct digest_alg digest;
24767 + struct compress_alg compress;
24768 + } cra_u;
24769 +
24770 + struct module *cra_module;
24771 +};
24772 +
24773 +/*
24774 + * Algorithm registration interface.
24775 + */
24776 +int crypto_register_alg(struct crypto_alg *alg);
24777 +int crypto_unregister_alg(struct crypto_alg *alg);
24778 +
24779 +/*
24780 + * Algorithm query interface.
24781 + */
24782 +int crypto_alg_available(const char *name, u32 flags);
24783 +
24784 +/*
24785 + * Transforms: user-instantiated objects which encapsulate algorithms
24786 + * and core processing logic. Managed via crypto_alloc_tfm() and
24787 + * crypto_free_tfm(), as well as the various helpers below.
24788 + */
24789 +struct crypto_tfm;
24790 +
24791 +struct cipher_tfm {
24792 + void *cit_iv;
24793 + unsigned int cit_ivsize;
24794 + u32 cit_mode;
24795 + int (*cit_setkey)(struct crypto_tfm *tfm,
24796 + const u8 *key, unsigned int keylen);
24797 + int (*cit_encrypt)(struct crypto_tfm *tfm,
24798 + struct scatterlist *dst,
24799 + struct scatterlist *src,
24800 + unsigned int nbytes);
24801 + int (*cit_encrypt_iv)(struct crypto_tfm *tfm,
24802 + struct scatterlist *dst,
24803 + struct scatterlist *src,
24804 + unsigned int nbytes, u8 *iv);
24805 + int (*cit_decrypt)(struct crypto_tfm *tfm,
24806 + struct scatterlist *dst,
24807 + struct scatterlist *src,
24808 + unsigned int nbytes);
24809 + int (*cit_decrypt_iv)(struct crypto_tfm *tfm,
24810 + struct scatterlist *dst,
24811 + struct scatterlist *src,
24812 + unsigned int nbytes, u8 *iv);
24813 + void (*cit_xor_block)(u8 *dst, const u8 *src);
24814 +};
24815 +
24816 +struct digest_tfm {
24817 + void (*dit_init)(struct crypto_tfm *tfm);
24818 + void (*dit_update)(struct crypto_tfm *tfm,
24819 + struct scatterlist *sg, unsigned int nsg);
24820 + void (*dit_final)(struct crypto_tfm *tfm, u8 *out);
24821 + void (*dit_digest)(struct crypto_tfm *tfm, struct scatterlist *sg,
24822 + unsigned int nsg, u8 *out);
24823 + int (*dit_setkey)(struct crypto_tfm *tfm,
24824 + const u8 *key, unsigned int keylen);
24825 +#ifdef CONFIG_CRYPTO_HMAC
24826 + void *dit_hmac_block;
24827 +#endif
24828 +};
24829 +
24830 +struct compress_tfm {
24831 + int (*cot_compress)(struct crypto_tfm *tfm,
24832 + const u8 *src, unsigned int slen,
24833 + u8 *dst, unsigned int *dlen);
24834 + int (*cot_decompress)(struct crypto_tfm *tfm,
24835 + const u8 *src, unsigned int slen,
24836 + u8 *dst, unsigned int *dlen);
24837 +};
24838 +
24839 +#define crt_cipher crt_u.cipher
24840 +#define crt_digest crt_u.digest
24841 +#define crt_compress crt_u.compress
24842 +
24843 +struct crypto_tfm {
24844 +
24845 + u32 crt_flags;
24846 +
24847 + union {
24848 + struct cipher_tfm cipher;
24849 + struct digest_tfm digest;
24850 + struct compress_tfm compress;
24851 + } crt_u;
24852 +
24853 + struct crypto_alg *__crt_alg;
24854 +};
24855 +
24856 +/*
24857 + * Transform user interface.
24858 + */
24859 +
24860 +/*
24861 + * crypto_alloc_tfm() will first attempt to locate an already loaded algorithm.
24862 + * If that fails and the kernel supports dynamically loadable modules, it
24863 + * will then attempt to load a module of the same name or alias. A refcount
24864 + * is grabbed on the algorithm which is then associated with the new transform.
24865 + *
24866 + * crypto_free_tfm() frees up the transform and any associated resources,
24867 + * then drops the refcount on the associated algorithm.
24868 + */
24869 +struct crypto_tfm *crypto_alloc_tfm(const char *alg_name, u32 tfm_flags);
24870 +void crypto_free_tfm(struct crypto_tfm *tfm);
24871 +
24872 +/*
24873 + * Transform helpers which query the underlying algorithm.
24874 + */
24875 +static inline const char *crypto_tfm_alg_name(struct crypto_tfm *tfm)
24876 +{
24877 + return tfm->__crt_alg->cra_name;
24878 +}
24879 +
24880 +static inline const char *crypto_tfm_alg_modname(struct crypto_tfm *tfm)
24881 +{
24882 + struct crypto_alg *alg = tfm->__crt_alg;
24883 +
24884 + if (alg->cra_module)
24885 + return alg->cra_module->name;
24886 + else
24887 + return NULL;
24888 +}
24889 +
24890 +static inline u32 crypto_tfm_alg_type(struct crypto_tfm *tfm)
24891 +{
24892 + return tfm->__crt_alg->cra_flags & CRYPTO_ALG_TYPE_MASK;
24893 +}
24894 +
24895 +static inline unsigned int crypto_tfm_alg_min_keysize(struct crypto_tfm *tfm)
24896 +{
24897 + BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
24898 + return tfm->__crt_alg->cra_cipher.cia_min_keysize;
24899 +}
24900 +
24901 +static inline unsigned int crypto_tfm_alg_max_keysize(struct crypto_tfm *tfm)
24902 +{
24903 + BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
24904 + return tfm->__crt_alg->cra_cipher.cia_max_keysize;
24905 +}
24906 +
24907 +static inline unsigned int crypto_tfm_alg_ivsize(struct crypto_tfm *tfm)
24908 +{
24909 + BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
24910 + return tfm->crt_cipher.cit_ivsize;
24911 +}
24912 +
24913 +static inline unsigned int crypto_tfm_alg_blocksize(struct crypto_tfm *tfm)
24914 +{
24915 + return tfm->__crt_alg->cra_blocksize;
24916 +}
24917 +
24918 +static inline unsigned int crypto_tfm_alg_digestsize(struct crypto_tfm *tfm)
24919 +{
24920 + BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_DIGEST);
24921 + return tfm->__crt_alg->cra_digest.dia_digestsize;
24922 +}
24923 +
24924 +/*
24925 + * API wrappers.
24926 + */
24927 +static inline void crypto_digest_init(struct crypto_tfm *tfm)
24928 +{
24929 + BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_DIGEST);
24930 + tfm->crt_digest.dit_init(tfm);
24931 +}
24932 +
24933 +static inline void crypto_digest_update(struct crypto_tfm *tfm,
24934 + struct scatterlist *sg,
24935 + unsigned int nsg)
24936 +{
24937 + BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_DIGEST);
24938 + tfm->crt_digest.dit_update(tfm, sg, nsg);
24939 +}
24940 +
24941 +static inline void crypto_digest_final(struct crypto_tfm *tfm, u8 *out)
24942 +{
24943 + BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_DIGEST);
24944 + tfm->crt_digest.dit_final(tfm, out);
24945 +}
24946 +
24947 +static inline void crypto_digest_digest(struct crypto_tfm *tfm,
24948 + struct scatterlist *sg,
24949 + unsigned int nsg, u8 *out)
24950 +{
24951 + BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_DIGEST);
24952 + tfm->crt_digest.dit_digest(tfm, sg, nsg, out);
24953 +}
24954 +
24955 +static inline int crypto_digest_setkey(struct crypto_tfm *tfm,
24956 + const u8 *key, unsigned int keylen)
24957 +{
24958 + BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_DIGEST);
24959 + if (tfm->crt_digest.dit_setkey == NULL)
24960 + return -ENOSYS;
24961 + return tfm->crt_digest.dit_setkey(tfm, key, keylen);
24962 +}
24963 +
24964 +static inline int crypto_cipher_setkey(struct crypto_tfm *tfm,
24965 + const u8 *key, unsigned int keylen)
24966 +{
24967 + BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
24968 + return tfm->crt_cipher.cit_setkey(tfm, key, keylen);
24969 +}
24970 +
24971 +static inline int crypto_cipher_encrypt(struct crypto_tfm *tfm,
24972 + struct scatterlist *dst,
24973 + struct scatterlist *src,
24974 + unsigned int nbytes)
24975 +{
24976 + BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
24977 + return tfm->crt_cipher.cit_encrypt(tfm, dst, src, nbytes);
24978 +}
24979 +
24980 +static inline int crypto_cipher_encrypt_iv(struct crypto_tfm *tfm,
24981 + struct scatterlist *dst,
24982 + struct scatterlist *src,
24983 + unsigned int nbytes, u8 *iv)
24984 +{
24985 + BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
24986 + BUG_ON(tfm->crt_cipher.cit_mode == CRYPTO_TFM_MODE_ECB);
24987 + return tfm->crt_cipher.cit_encrypt_iv(tfm, dst, src, nbytes, iv);
24988 +}
24989 +
24990 +static inline int crypto_cipher_decrypt(struct crypto_tfm *tfm,
24991 + struct scatterlist *dst,
24992 + struct scatterlist *src,
24993 + unsigned int nbytes)
24994 +{
24995 + BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
24996 + return tfm->crt_cipher.cit_decrypt(tfm, dst, src, nbytes);
24997 +}
24998 +
24999 +static inline int crypto_cipher_decrypt_iv(struct crypto_tfm *tfm,
25000 + struct scatterlist *dst,
25001 + struct scatterlist *src,
25002 + unsigned int nbytes, u8 *iv)
25003 +{
25004 + BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
25005 + BUG_ON(tfm->crt_cipher.cit_mode == CRYPTO_TFM_MODE_ECB);
25006 + return tfm->crt_cipher.cit_decrypt_iv(tfm, dst, src, nbytes, iv);
25007 +}
25008 +
25009 +static inline void crypto_cipher_set_iv(struct crypto_tfm *tfm,
25010 + const u8 *src, unsigned int len)
25011 +{
25012 + BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
25013 + memcpy(tfm->crt_cipher.cit_iv, src, len);
25014 +}
25015 +
25016 +static inline void crypto_cipher_get_iv(struct crypto_tfm *tfm,
25017 + u8 *dst, unsigned int len)
25018 +{
25019 + BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
25020 + memcpy(dst, tfm->crt_cipher.cit_iv, len);
25021 +}
25022 +
25023 +static inline int crypto_comp_compress(struct crypto_tfm *tfm,
25024 + const u8 *src, unsigned int slen,
25025 + u8 *dst, unsigned int *dlen)
25026 +{
25027 + BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_COMPRESS);
25028 + return tfm->crt_compress.cot_compress(tfm, src, slen, dst, dlen);
25029 +}
25030 +
25031 +static inline int crypto_comp_decompress(struct crypto_tfm *tfm,
25032 + const u8 *src, unsigned int slen,
25033 + u8 *dst, unsigned int *dlen)
25034 +{
25035 + BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_COMPRESS);
25036 + return tfm->crt_compress.cot_decompress(tfm, src, slen, dst, dlen);
25037 +}
25038 +
25039 +/*
25040 + * HMAC support.
25041 + */
25042 +#ifdef CONFIG_CRYPTO_HMAC
25043 +void crypto_hmac_init(struct crypto_tfm *tfm, u8 *key, unsigned int *keylen);
25044 +void crypto_hmac_update(struct crypto_tfm *tfm,
25045 + struct scatterlist *sg, unsigned int nsg);
25046 +void crypto_hmac_final(struct crypto_tfm *tfm, u8 *key,
25047 + unsigned int *keylen, u8 *out);
25048 +void crypto_hmac(struct crypto_tfm *tfm, u8 *key, unsigned int *keylen,
25049 + struct scatterlist *sg, unsigned int nsg, u8 *out);
25050 +#endif /* CONFIG_CRYPTO_HMAC */
25051 +
25052 +#endif /* _LINUX_CRYPTO_H */
25053 +
25054 --- /dev/null
25055 +++ b/drivers/staging/rtl8192e/ieee80211/scatterwalk.c
25056 @@ -0,0 +1,126 @@
25057 +/*
25058 + * Cryptographic API.
25059 + *
25060 + * Cipher operations.
25061 + *
25062 + * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
25063 + * 2002 Adam J. Richter <adam@yggdrasil.com>
25064 + * 2004 Jean-Luc Cooke <jlcooke@certainkey.com>
25065 + *
25066 + * This program is free software; you can redistribute it and/or modify it
25067 + * under the terms of the GNU General Public License as published by the Free
25068 + * Software Foundation; either version 2 of the License, or (at your option)
25069 + * any later version.
25070 + *
25071 + */
25072 +#include "kmap_types.h"
25073 +
25074 +#include <linux/kernel.h>
25075 +#include <linux/mm.h>
25076 +#include <linux/pagemap.h>
25077 +#include <linux/highmem.h>
25078 +#include <asm/scatterlist.h>
25079 +#include "internal.h"
25080 +#include "scatterwalk.h"
25081 +
25082 +enum km_type crypto_km_types[] = {
25083 + KM_USER0,
25084 + KM_USER1,
25085 + KM_SOFTIRQ0,
25086 + KM_SOFTIRQ1,
25087 +};
25088 +
25089 +void *scatterwalk_whichbuf(struct scatter_walk *walk, unsigned int nbytes, void *scratch)
25090 +{
25091 + if (nbytes <= walk->len_this_page &&
25092 + (((unsigned long)walk->data) & (PAGE_CACHE_SIZE - 1)) + nbytes <=
25093 + PAGE_CACHE_SIZE)
25094 + return walk->data;
25095 + else
25096 + return scratch;
25097 +}
25098 +
25099 +static void memcpy_dir(void *buf, void *sgdata, size_t nbytes, int out)
25100 +{
25101 + if (out)
25102 + memcpy(sgdata, buf, nbytes);
25103 + else
25104 + memcpy(buf, sgdata, nbytes);
25105 +}
25106 +
25107 +void scatterwalk_start(struct scatter_walk *walk, struct scatterlist *sg)
25108 +{
25109 + unsigned int rest_of_page;
25110 +
25111 + walk->sg = sg;
25112 +
25113 + walk->page = sg->page;
25114 + walk->len_this_segment = sg->length;
25115 +
25116 + rest_of_page = PAGE_CACHE_SIZE - (sg->offset & (PAGE_CACHE_SIZE - 1));
25117 + walk->len_this_page = min(sg->length, rest_of_page);
25118 + walk->offset = sg->offset;
25119 +}
25120 +
25121 +void scatterwalk_map(struct scatter_walk *walk, int out)
25122 +{
25123 + walk->data = crypto_kmap(walk->page, out) + walk->offset;
25124 +}
25125 +
25126 +static void scatterwalk_pagedone(struct scatter_walk *walk, int out,
25127 + unsigned int more)
25128 +{
25129 + /* walk->data may be pointing the first byte of the next page;
25130 + however, we know we transfered at least one byte. So,
25131 + walk->data - 1 will be a virtual address in the mapped page. */
25132 +
25133 + if (out)
25134 + flush_dcache_page(walk->page);
25135 +
25136 + if (more) {
25137 + walk->len_this_segment -= walk->len_this_page;
25138 +
25139 + if (walk->len_this_segment) {
25140 + walk->page++;
25141 + walk->len_this_page = min(walk->len_this_segment,
25142 + (unsigned)PAGE_CACHE_SIZE);
25143 + walk->offset = 0;
25144 + }
25145 + else
25146 + scatterwalk_start(walk, sg_next(walk->sg));
25147 + }
25148 +}
25149 +
25150 +void scatterwalk_done(struct scatter_walk *walk, int out, int more)
25151 +{
25152 + crypto_kunmap(walk->data, out);
25153 + if (walk->len_this_page == 0 || !more)
25154 + scatterwalk_pagedone(walk, out, more);
25155 +}
25156 +
25157 +/*
25158 + * Do not call this unless the total length of all of the fragments
25159 + * has been verified as multiple of the block size.
25160 + */
25161 +int scatterwalk_copychunks(void *buf, struct scatter_walk *walk,
25162 + size_t nbytes, int out)
25163 +{
25164 + if (buf != walk->data) {
25165 + while (nbytes > walk->len_this_page) {
25166 + memcpy_dir(buf, walk->data, walk->len_this_page, out);
25167 + buf += walk->len_this_page;
25168 + nbytes -= walk->len_this_page;
25169 +
25170 + crypto_kunmap(walk->data, out);
25171 + scatterwalk_pagedone(walk, out, 1);
25172 + scatterwalk_map(walk, out);
25173 + }
25174 +
25175 + memcpy_dir(buf, walk->data, nbytes, out);
25176 + }
25177 +
25178 + walk->offset += nbytes;
25179 + walk->len_this_page -= nbytes;
25180 + walk->len_this_segment -= nbytes;
25181 + return 0;
25182 +}
25183 --- /dev/null
25184 +++ b/drivers/staging/rtl8192e/ieee80211/scatterwalk.h
25185 @@ -0,0 +1,51 @@
25186 +/*
25187 + * Cryptographic API.
25188 + *
25189 + * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
25190 + * Copyright (c) 2002 Adam J. Richter <adam@yggdrasil.com>
25191 + * Copyright (c) 2004 Jean-Luc Cooke <jlcooke@certainkey.com>
25192 + *
25193 + * This program is free software; you can redistribute it and/or modify it
25194 + * under the terms of the GNU General Public License as published by the Free
25195 + * Software Foundation; either version 2 of the License, or (at your option)
25196 + * any later version.
25197 + *
25198 + */
25199 +
25200 +#ifndef _CRYPTO_SCATTERWALK_H
25201 +#define _CRYPTO_SCATTERWALK_H
25202 +#include <linux/mm.h>
25203 +#include <asm/scatterlist.h>
25204 +
25205 +struct scatter_walk {
25206 + struct scatterlist *sg;
25207 + struct page *page;
25208 + void *data;
25209 + unsigned int len_this_page;
25210 + unsigned int len_this_segment;
25211 + unsigned int offset;
25212 +};
25213 +
25214 +/* Define sg_next is an inline routine now in case we want to change
25215 + scatterlist to a linked list later. */
25216 +static inline struct scatterlist *sg_next(struct scatterlist *sg)
25217 +{
25218 + return sg + 1;
25219 +}
25220 +
25221 +static inline int scatterwalk_samebuf(struct scatter_walk *walk_in,
25222 + struct scatter_walk *walk_out,
25223 + void *src_p, void *dst_p)
25224 +{
25225 + return walk_in->page == walk_out->page &&
25226 + walk_in->offset == walk_out->offset &&
25227 + walk_in->data == src_p && walk_out->data == dst_p;
25228 +}
25229 +
25230 +void *scatterwalk_whichbuf(struct scatter_walk *walk, unsigned int nbytes, void *scratch);
25231 +void scatterwalk_start(struct scatter_walk *walk, struct scatterlist *sg);
25232 +int scatterwalk_copychunks(void *buf, struct scatter_walk *walk, size_t nbytes, int out);
25233 +void scatterwalk_map(struct scatter_walk *walk, int out);
25234 +void scatterwalk_done(struct scatter_walk *walk, int out, int more);
25235 +
25236 +#endif /* _CRYPTO_SCATTERWALK_H */
25237 --- /dev/null
25238 +++ b/drivers/staging/rtl8192e/ieee80211_crypt.h
25239 @@ -0,0 +1,86 @@
25240 +/*
25241 + * Original code based on Host AP (software wireless LAN access point) driver
25242 + * for Intersil Prism2/2.5/3.
25243 + *
25244 + * Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
25245 + * <jkmaline@cc.hut.fi>
25246 + * Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
25247 + *
25248 + * Adaption to a generic IEEE 802.11 stack by James Ketrenos
25249 + * <jketreno@linux.intel.com>
25250 + *
25251 + * Copyright (c) 2004, Intel Corporation
25252 + *
25253 + * This program is free software; you can redistribute it and/or modify
25254 + * it under the terms of the GNU General Public License version 2 as
25255 + * published by the Free Software Foundation. See README and COPYING for
25256 + * more details.
25257 + */
25258 +
25259 +/*
25260 + * This file defines the interface to the ieee80211 crypto module.
25261 + */
25262 +#ifndef IEEE80211_CRYPT_H
25263 +#define IEEE80211_CRYPT_H
25264 +
25265 +#include <linux/skbuff.h>
25266 +
25267 +struct ieee80211_crypto_ops {
25268 + const char *name;
25269 +
25270 + /* init new crypto context (e.g., allocate private data space,
25271 + * select IV, etc.); returns NULL on failure or pointer to allocated
25272 + * private data on success */
25273 + void * (*init)(int keyidx);
25274 +
25275 + /* deinitialize crypto context and free allocated private data */
25276 + void (*deinit)(void *priv);
25277 +
25278 + /* encrypt/decrypt return < 0 on error or >= 0 on success. The return
25279 + * value from decrypt_mpdu is passed as the keyidx value for
25280 + * decrypt_msdu. skb must have enough head and tail room for the
25281 + * encryption; if not, error will be returned; these functions are
25282 + * called for all MPDUs (i.e., fragments).
25283 + */
25284 + int (*encrypt_mpdu)(struct sk_buff *skb, int hdr_len, void *priv);
25285 + int (*decrypt_mpdu)(struct sk_buff *skb, int hdr_len, void *priv);
25286 +
25287 + /* These functions are called for full MSDUs, i.e. full frames.
25288 + * These can be NULL if full MSDU operations are not needed. */
25289 + int (*encrypt_msdu)(struct sk_buff *skb, int hdr_len, void *priv);
25290 + int (*decrypt_msdu)(struct sk_buff *skb, int keyidx, int hdr_len,
25291 + void *priv);
25292 +
25293 + int (*set_key)(void *key, int len, u8 *seq, void *priv);
25294 + int (*get_key)(void *key, int len, u8 *seq, void *priv);
25295 +
25296 + /* procfs handler for printing out key information and possible
25297 + * statistics */
25298 + char * (*print_stats)(char *p, void *priv);
25299 +
25300 + /* maximum number of bytes added by encryption; encrypt buf is
25301 + * allocated with extra_prefix_len bytes, copy of in_buf, and
25302 + * extra_postfix_len; encrypt need not use all this space, but
25303 + * the result must start at the beginning of the buffer and correct
25304 + * length must be returned */
25305 + int extra_prefix_len, extra_postfix_len;
25306 +
25307 + struct module *owner;
25308 +};
25309 +
25310 +struct ieee80211_crypt_data {
25311 + struct list_head list; /* delayed deletion list */
25312 + struct ieee80211_crypto_ops *ops;
25313 + void *priv;
25314 + atomic_t refcnt;
25315 +};
25316 +
25317 +int ieee80211_register_crypto_ops(struct ieee80211_crypto_ops *ops);
25318 +int ieee80211_unregister_crypto_ops(struct ieee80211_crypto_ops *ops);
25319 +struct ieee80211_crypto_ops * ieee80211_get_crypto_ops(const char *name);
25320 +void ieee80211_crypt_deinit_entries(struct ieee80211_device *, int);
25321 +void ieee80211_crypt_deinit_handler(unsigned long);
25322 +void ieee80211_crypt_delayed_deinit(struct ieee80211_device *ieee,
25323 + struct ieee80211_crypt_data **crypt);
25324 +
25325 +#endif
25326 --- /dev/null
25327 +++ b/drivers/staging/rtl8192e/r8180_93cx6.c
25328 @@ -0,0 +1,146 @@
25329 +/*
25330 + This files contains card eeprom (93c46 or 93c56) programming routines,
25331 + memory is addressed by 16 bits words.
25332 +
25333 + This is part of rtl8180 OpenSource driver.
25334 + Copyright (C) Andrea Merello 2004 <andreamrl@tiscali.it>
25335 + Released under the terms of GPL (General Public Licence)
25336 +
25337 + Parts of this driver are based on the GPL part of the
25338 + official realtek driver.
25339 +
25340 + Parts of this driver are based on the rtl8180 driver skeleton
25341 + from Patric Schenke & Andres Salomon.
25342 +
25343 + Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver.
25344 +
25345 + We want to tanks the Authors of those projects and the Ndiswrapper
25346 + project Authors.
25347 +*/
25348 +
25349 +#include "r8180_93cx6.h"
25350 +
25351 +static void eprom_cs(struct net_device *dev, short bit)
25352 +{
25353 + if(bit)
25354 + write_nic_byte(dev, EPROM_CMD,
25355 + (1<<EPROM_CS_SHIFT) | \
25356 + read_nic_byte(dev, EPROM_CMD)); //enable EPROM
25357 + else
25358 + write_nic_byte(dev, EPROM_CMD, read_nic_byte(dev, EPROM_CMD)\
25359 + &~(1<<EPROM_CS_SHIFT)); //disable EPROM
25360 +
25361 + force_pci_posting(dev);
25362 + udelay(EPROM_DELAY);
25363 +}
25364 +
25365 +
25366 +static void eprom_ck_cycle(struct net_device *dev)
25367 +{
25368 + write_nic_byte(dev, EPROM_CMD,
25369 + (1<<EPROM_CK_SHIFT) | read_nic_byte(dev,EPROM_CMD));
25370 + force_pci_posting(dev);
25371 + udelay(EPROM_DELAY);
25372 + write_nic_byte(dev, EPROM_CMD,
25373 + read_nic_byte(dev, EPROM_CMD) &~ (1<<EPROM_CK_SHIFT));
25374 + force_pci_posting(dev);
25375 + udelay(EPROM_DELAY);
25376 +}
25377 +
25378 +
25379 +static void eprom_w(struct net_device *dev,short bit)
25380 +{
25381 + if(bit)
25382 + write_nic_byte(dev, EPROM_CMD, (1<<EPROM_W_SHIFT) | \
25383 + read_nic_byte(dev,EPROM_CMD));
25384 + else
25385 + write_nic_byte(dev, EPROM_CMD, read_nic_byte(dev,EPROM_CMD)\
25386 + &~(1<<EPROM_W_SHIFT));
25387 +
25388 + force_pci_posting(dev);
25389 + udelay(EPROM_DELAY);
25390 +}
25391 +
25392 +
25393 +static short eprom_r(struct net_device *dev)
25394 +{
25395 + short bit;
25396 +
25397 + bit=(read_nic_byte(dev, EPROM_CMD) & (1<<EPROM_R_SHIFT) );
25398 + udelay(EPROM_DELAY);
25399 +
25400 + if(bit) return 1;
25401 + return 0;
25402 +}
25403 +
25404 +
25405 +static void eprom_send_bits_string(struct net_device *dev, short b[], int len)
25406 +{
25407 + int i;
25408 +
25409 + for(i=0; i<len; i++){
25410 + eprom_w(dev, b[i]);
25411 + eprom_ck_cycle(dev);
25412 + }
25413 +}
25414 +
25415 +
25416 +u32 eprom_read(struct net_device *dev, u32 addr)
25417 +{
25418 + struct r8192_priv *priv = ieee80211_priv(dev);
25419 + short read_cmd[]={1,1,0};
25420 + short addr_str[8];
25421 + int i;
25422 + int addr_len;
25423 + u32 ret;
25424 +
25425 + ret=0;
25426 + //enable EPROM programming
25427 + write_nic_byte(dev, EPROM_CMD,
25428 + (EPROM_CMD_PROGRAM<<EPROM_CMD_OPERATING_MODE_SHIFT));
25429 + force_pci_posting(dev);
25430 + udelay(EPROM_DELAY);
25431 +
25432 + if (priv->epromtype==EPROM_93c56){
25433 + addr_str[7]=addr & 1;
25434 + addr_str[6]=addr & (1<<1);
25435 + addr_str[5]=addr & (1<<2);
25436 + addr_str[4]=addr & (1<<3);
25437 + addr_str[3]=addr & (1<<4);
25438 + addr_str[2]=addr & (1<<5);
25439 + addr_str[1]=addr & (1<<6);
25440 + addr_str[0]=addr & (1<<7);
25441 + addr_len=8;
25442 + }else{
25443 + addr_str[5]=addr & 1;
25444 + addr_str[4]=addr & (1<<1);
25445 + addr_str[3]=addr & (1<<2);
25446 + addr_str[2]=addr & (1<<3);
25447 + addr_str[1]=addr & (1<<4);
25448 + addr_str[0]=addr & (1<<5);
25449 + addr_len=6;
25450 + }
25451 + eprom_cs(dev, 1);
25452 + eprom_ck_cycle(dev);
25453 + eprom_send_bits_string(dev, read_cmd, 3);
25454 + eprom_send_bits_string(dev, addr_str, addr_len);
25455 +
25456 + //keep chip pin D to low state while reading.
25457 + //I'm unsure if it is necessary, but anyway shouldn't hurt
25458 + eprom_w(dev, 0);
25459 +
25460 + for(i=0;i<16;i++){
25461 + //eeprom needs a clk cycle between writing opcode&adr
25462 + //and reading data. (eeprom outs a dummy 0)
25463 + eprom_ck_cycle(dev);
25464 + ret |= (eprom_r(dev)<<(15-i));
25465 + }
25466 +
25467 + eprom_cs(dev, 0);
25468 + eprom_ck_cycle(dev);
25469 +
25470 + //disable EPROM programming
25471 + write_nic_byte(dev, EPROM_CMD,
25472 + (EPROM_CMD_NORMAL<<EPROM_CMD_OPERATING_MODE_SHIFT));
25473 + return ret;
25474 +}
25475 --- /dev/null
25476 +++ b/drivers/staging/rtl8192e/r8180_93cx6.h
25477 @@ -0,0 +1,40 @@
25478 +/*
25479 + This is part of rtl8187 OpenSource driver
25480 + Copyright (C) Andrea Merello 2004-2005 <andreamrl@tiscali.it>
25481 + Released under the terms of GPL (General Public Licence)
25482 +
25483 + Parts of this driver are based on the GPL part of the official realtek driver
25484 + Parts of this driver are based on the rtl8180 driver skeleton from Patric Schenke & Andres Salomon
25485 + Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver
25486 +
25487 + We want to tanks the Authors of such projects and the Ndiswrapper project Authors.
25488 +*/
25489 +
25490 +/*This files contains card eeprom (93c46 or 93c56) programming routines*/
25491 +/*memory is addressed by WORDS*/
25492 +
25493 +#include "r8192E.h"
25494 +#include "r8192E_hw.h"
25495 +
25496 +#define EPROM_DELAY 10
25497 +
25498 +#define EPROM_ANAPARAM_ADDRLWORD 0xd
25499 +#define EPROM_ANAPARAM_ADDRHWORD 0xe
25500 +
25501 +#define EPROM_RFCHIPID 0x6
25502 +#define EPROM_TXPW_BASE 0x05
25503 +#define EPROM_RFCHIPID_RTL8225U 5
25504 +#define EPROM_RF_PARAM 0x4
25505 +#define EPROM_CONFIG2 0xc
25506 +
25507 +#define EPROM_VERSION 0x1E
25508 +#define MAC_ADR 0x7
25509 +
25510 +#define CIS 0x18
25511 +
25512 +#define EPROM_TXPW0 0x16
25513 +#define EPROM_TXPW2 0x1b
25514 +#define EPROM_TXPW1 0x3d
25515 +
25516 +
25517 +u32 eprom_read(struct net_device *dev,u32 addr); //reads a 16 bits word
25518 --- /dev/null
25519 +++ b/drivers/staging/rtl8192e/r8190_rtl8256.c
25520 @@ -0,0 +1,1161 @@
25521 +/*
25522 + This is part of the rtl8192 driver
25523 + released under the GPL (See file COPYING for details).
25524 +
25525 + This files contains programming code for the rtl8256
25526 + radio frontend.
25527 +
25528 + *Many* thanks to Realtek Corp. for their great support!
25529 +
25530 +*/
25531 +
25532 +#include "r8192E.h"
25533 +#include "r8192E_hw.h"
25534 +#include "r819xE_phyreg.h"
25535 +#include "r819xE_phy.h"
25536 +#include "r8190_rtl8256.h"
25537 +
25538 +/*--------------------------------------------------------------------------
25539 + * Overview: set RF band width (20M or 40M)
25540 + * Input: struct net_device* dev
25541 + * WIRELESS_BANDWIDTH_E Bandwidth //20M or 40M
25542 + * Output: NONE
25543 + * Return: NONE
25544 + * Note: 8226 support both 20M and 40 MHz
25545 + *---------------------------------------------------------------------------*/
25546 +void PHY_SetRF8256Bandwidth(struct net_device* dev , HT_CHANNEL_WIDTH Bandwidth) //20M or 40M
25547 +{
25548 + u8 eRFPath;
25549 + struct r8192_priv *priv = ieee80211_priv(dev);
25550 +
25551 + //for(eRFPath = RF90_PATH_A; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
25552 + for(eRFPath = 0; eRFPath <priv->NumTotalRFPath; eRFPath++)
25553 + {
25554 + if (!rtl8192_phy_CheckIsLegalRFPath(dev, eRFPath))
25555 + continue;
25556 +
25557 + switch(Bandwidth)
25558 + {
25559 + case HT_CHANNEL_WIDTH_20:
25560 + if(priv->card_8192_version == VERSION_8190_BD || priv->card_8192_version == VERSION_8190_BE)// 8256 D-cut, E-cut, xiong: consider it later!
25561 + {
25562 + rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x0b, bMask12Bits, 0x100); //phy para:1ba
25563 + rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x2c, bMask12Bits, 0x3d7);
25564 + rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x0e, bMask12Bits, 0x021);
25565 +
25566 + //cosa add for sd3's request 01/23/2008
25567 + //rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x14, bMask12Bits, 0x5ab);
25568 + }
25569 + else
25570 + {
25571 + RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): unknown hardware version\n");
25572 + }
25573 +
25574 + break;
25575 + case HT_CHANNEL_WIDTH_20_40:
25576 + if(priv->card_8192_version == VERSION_8190_BD ||priv->card_8192_version == VERSION_8190_BE)// 8256 D-cut, E-cut, xiong: consider it later!
25577 + {
25578 + rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x0b, bMask12Bits, 0x300); //phy para:3ba
25579 + rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x2c, bMask12Bits, 0x3ff);
25580 + rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x0e, bMask12Bits, 0x0e1);
25581 +
25582 + //cosa add for sd3's request 01/23/2008
25583 + #if 0
25584 + if(priv->chan == 3 || priv->chan == 9) //I need to set priv->chan whenever current channel changes
25585 + rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x14, bMask12Bits, 0x59b);
25586 + else
25587 + rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x14, bMask12Bits, 0x5ab);
25588 + #endif
25589 + }
25590 + else
25591 + {
25592 + RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): unknown hardware version\n");
25593 + }
25594 +
25595 +
25596 + break;
25597 + default:
25598 + RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): unknown Bandwidth: %#X\n",Bandwidth );
25599 + break;
25600 +
25601 + }
25602 + }
25603 + return;
25604 +}
25605 +/*--------------------------------------------------------------------------
25606 + * Overview: Interface to config 8256
25607 + * Input: struct net_device* dev
25608 + * Output: NONE
25609 + * Return: NONE
25610 + *---------------------------------------------------------------------------*/
25611 +RT_STATUS PHY_RF8256_Config(struct net_device* dev)
25612 +{
25613 + struct r8192_priv *priv = ieee80211_priv(dev);
25614 + // Initialize general global value
25615 + //
25616 + RT_STATUS rtStatus = RT_STATUS_SUCCESS;
25617 + // TODO: Extend RF_PATH_C and RF_PATH_D in the future
25618 + priv->NumTotalRFPath = RTL819X_TOTAL_RF_PATH;
25619 + // Config BB and RF
25620 + rtStatus = phy_RF8256_Config_ParaFile(dev);
25621 +
25622 + return rtStatus;
25623 +}
25624 +/*--------------------------------------------------------------------------
25625 + * Overview: Interface to config 8256
25626 + * Input: struct net_device* dev
25627 + * Output: NONE
25628 + * Return: NONE
25629 + *---------------------------------------------------------------------------*/
25630 +RT_STATUS phy_RF8256_Config_ParaFile(struct net_device* dev)
25631 +{
25632 + u32 u4RegValue = 0;
25633 + u8 eRFPath;
25634 + RT_STATUS rtStatus = RT_STATUS_SUCCESS;
25635 + BB_REGISTER_DEFINITION_T *pPhyReg;
25636 + struct r8192_priv *priv = ieee80211_priv(dev);
25637 + u32 RegOffSetToBeCheck = 0x3;
25638 + u32 RegValueToBeCheck = 0x7f1;
25639 + u32 RF3_Final_Value = 0;
25640 + u8 ConstRetryTimes = 5, RetryTimes = 5;
25641 + u8 ret = 0;
25642 + //3//-----------------------------------------------------------------
25643 + //3// <2> Initialize RF
25644 + //3//-----------------------------------------------------------------
25645 + for(eRFPath = (RF90_RADIO_PATH_E)RF90_PATH_A; eRFPath <priv->NumTotalRFPath; eRFPath++)
25646 + {
25647 + if (!rtl8192_phy_CheckIsLegalRFPath(dev, eRFPath))
25648 + continue;
25649 +
25650 + pPhyReg = &priv->PHYRegDef[eRFPath];
25651 +
25652 + // Joseph test for shorten RF config
25653 + // pHalData->RfReg0Value[eRFPath] = rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, rGlobalCtrl, bMaskDWord);
25654 +
25655 + /*----Store original RFENV control type----*/
25656 + switch(eRFPath)
25657 + {
25658 + case RF90_PATH_A:
25659 + case RF90_PATH_C:
25660 + u4RegValue = rtl8192_QueryBBReg(dev, pPhyReg->rfintfs, bRFSI_RFENV);
25661 + break;
25662 + case RF90_PATH_B :
25663 + case RF90_PATH_D:
25664 + u4RegValue = rtl8192_QueryBBReg(dev, pPhyReg->rfintfs, bRFSI_RFENV<<16);
25665 + break;
25666 + }
25667 +
25668 + /*----Set RF_ENV enable----*/
25669 + rtl8192_setBBreg(dev, pPhyReg->rfintfe, bRFSI_RFENV<<16, 0x1);
25670 +
25671 + /*----Set RF_ENV output high----*/
25672 + rtl8192_setBBreg(dev, pPhyReg->rfintfo, bRFSI_RFENV, 0x1);
25673 +
25674 + /* Set bit number of Address and Data for RF register */
25675 + rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); // Set 0 to 4 bits for Z-serial and set 1 to 6 bits for 8258
25676 + rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); // Set 0 to 12 bits for Z-serial and 8258, and set 1 to 14 bits for ???
25677 +
25678 + rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E) eRFPath, 0x0, bMask12Bits, 0xbf);
25679 +
25680 + /*----Check RF block (for FPGA platform only)----*/
25681 + // TODO: this function should be removed on ASIC , Emily 2007.2.2
25682 + rtStatus = rtl8192_phy_checkBBAndRF(dev, HW90_BLOCK_RF, (RF90_RADIO_PATH_E)eRFPath);
25683 + if(rtStatus!= RT_STATUS_SUCCESS)
25684 + {
25685 + RT_TRACE(COMP_ERR, "PHY_RF8256_Config():Check Radio[%d] Fail!!\n", eRFPath);
25686 + goto phy_RF8256_Config_ParaFile_Fail;
25687 + }
25688 +
25689 + RetryTimes = ConstRetryTimes;
25690 + RF3_Final_Value = 0;
25691 + /*----Initialize RF fom connfiguration file----*/
25692 + switch(eRFPath)
25693 + {
25694 + case RF90_PATH_A:
25695 + while(RF3_Final_Value!=RegValueToBeCheck && RetryTimes!=0)
25696 + {
25697 + ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,(RF90_RADIO_PATH_E)eRFPath);
25698 + RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, RegOffSetToBeCheck, bMask12Bits);
25699 + RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value);
25700 + RetryTimes--;
25701 + }
25702 + break;
25703 + case RF90_PATH_B:
25704 + while(RF3_Final_Value!=RegValueToBeCheck && RetryTimes!=0)
25705 + {
25706 + ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,(RF90_RADIO_PATH_E)eRFPath);
25707 + RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, RegOffSetToBeCheck, bMask12Bits);
25708 + RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value);
25709 + RetryTimes--;
25710 + }
25711 + break;
25712 + case RF90_PATH_C:
25713 + while(RF3_Final_Value!=RegValueToBeCheck && RetryTimes!=0)
25714 + {
25715 + ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,(RF90_RADIO_PATH_E)eRFPath);
25716 + RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, RegOffSetToBeCheck, bMask12Bits);
25717 + RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value);
25718 + RetryTimes--;
25719 + }
25720 + break;
25721 + case RF90_PATH_D:
25722 + while(RF3_Final_Value!=RegValueToBeCheck && RetryTimes!=0)
25723 + {
25724 + ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,(RF90_RADIO_PATH_E)eRFPath);
25725 + RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, RegOffSetToBeCheck, bMask12Bits);
25726 + RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value);
25727 + RetryTimes--;
25728 + }
25729 + break;
25730 + }
25731 +
25732 + /*----Restore RFENV control type----*/;
25733 + switch(eRFPath)
25734 + {
25735 + case RF90_PATH_A:
25736 + case RF90_PATH_C:
25737 + rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue);
25738 + break;
25739 + case RF90_PATH_B :
25740 + case RF90_PATH_D:
25741 + rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV<<16, u4RegValue);
25742 + break;
25743 + }
25744 +
25745 + if(ret){
25746 + RT_TRACE(COMP_ERR, "phy_RF8256_Config_ParaFile():Radio[%d] Fail!!", eRFPath);
25747 + goto phy_RF8256_Config_ParaFile_Fail;
25748 + }
25749 +
25750 + }
25751 +
25752 + RT_TRACE(COMP_PHY, "PHY Initialization Success\n") ;
25753 + return RT_STATUS_SUCCESS;
25754 +
25755 +phy_RF8256_Config_ParaFile_Fail:
25756 + RT_TRACE(COMP_ERR, "PHY Initialization failed\n") ;
25757 + return RT_STATUS_FAILURE;
25758 +}
25759 +
25760 +
25761 +void PHY_SetRF8256CCKTxPower(struct net_device* dev, u8 powerlevel)
25762 +{
25763 + u32 TxAGC=0;
25764 + struct r8192_priv *priv = ieee80211_priv(dev);
25765 +#ifdef RTL8190P
25766 + u8 byte0, byte1;
25767 +
25768 + TxAGC |= ((powerlevel<<8)|powerlevel);
25769 + TxAGC += priv->CCKTxPowerLevelOriginalOffset;
25770 +
25771 + if(priv->bDynamicTxLowPower == true //cosa 04282008 for cck long range
25772 + /*pMgntInfo->bScanInProgress == TRUE*/ ) //cosa 05/22/2008 for scan
25773 + {
25774 + if(priv->CustomerID == RT_CID_819x_Netcore)
25775 + TxAGC = 0x2222;
25776 + else
25777 + TxAGC += ((priv->CckPwEnl<<8)|priv->CckPwEnl);
25778 + }
25779 +
25780 + byte0 = (u8)(TxAGC & 0xff);
25781 + byte1 = (u8)((TxAGC & 0xff00)>>8);
25782 + if(byte0 > 0x24)
25783 + byte0 = 0x24;
25784 + if(byte1 > 0x24)
25785 + byte1 = 0x24;
25786 + if(priv->rf_type == RF_2T4R) //Only 2T4R you have to care the Antenna Tx Power offset
25787 + { // check antenna C over the max index 0x24
25788 + if(priv->RF_C_TxPwDiff > 0)
25789 + {
25790 + if( (byte0 + (u8)priv->RF_C_TxPwDiff) > 0x24)
25791 + byte0 = 0x24 - priv->RF_C_TxPwDiff;
25792 + if( (byte1 + (u8)priv->RF_C_TxPwDiff) > 0x24)
25793 + byte1 = 0x24 - priv->RF_C_TxPwDiff;
25794 + }
25795 + }
25796 + TxAGC = (byte1<<8) |byte0;
25797 + write_nic_dword(dev, CCK_TXAGC, TxAGC);
25798 +#else
25799 + #ifdef RTL8192E
25800 +
25801 + TxAGC = powerlevel;
25802 + if(priv->bDynamicTxLowPower == true)//cosa 04282008 for cck long range
25803 + {
25804 + if(priv->CustomerID == RT_CID_819x_Netcore)
25805 + TxAGC = 0x22;
25806 + else
25807 + TxAGC += priv->CckPwEnl;
25808 + }
25809 + if(TxAGC > 0x24)
25810 + TxAGC = 0x24;
25811 + rtl8192_setBBreg(dev, rTxAGC_CCK_Mcs32, bTxAGCRateCCK, TxAGC);
25812 + #endif
25813 +#endif
25814 +}
25815 +
25816 +
25817 +void PHY_SetRF8256OFDMTxPower(struct net_device* dev, u8 powerlevel)
25818 +{
25819 + struct r8192_priv *priv = ieee80211_priv(dev);
25820 + //Joseph TxPower for 8192 testing
25821 +#ifdef RTL8190P
25822 + u32 TxAGC1=0, TxAGC2=0, TxAGC2_tmp = 0;
25823 + u8 i, byteVal1[4], byteVal2[4], byteVal3[4];
25824 +
25825 + if(priv->bDynamicTxHighPower == true) //Add by Jacken 2008/03/06
25826 + {
25827 + TxAGC1 |= ((powerlevel<<24)|(powerlevel<<16)|(powerlevel<<8)|powerlevel);
25828 + //for tx power track
25829 + TxAGC2_tmp = TxAGC1;
25830 +
25831 + TxAGC1 += priv->MCSTxPowerLevelOriginalOffset[0];
25832 + TxAGC2 =0x03030303;
25833 +
25834 + //for tx power track
25835 + TxAGC2_tmp += priv->MCSTxPowerLevelOriginalOffset[1];
25836 + }
25837 + else
25838 + {
25839 + TxAGC1 |= ((powerlevel<<24)|(powerlevel<<16)|(powerlevel<<8)|powerlevel);
25840 + TxAGC2 = TxAGC1;
25841 +
25842 + TxAGC1 += priv->MCSTxPowerLevelOriginalOffset[0];
25843 + TxAGC2 += priv->MCSTxPowerLevelOriginalOffset[1];
25844 +
25845 + TxAGC2_tmp = TxAGC2;
25846 +
25847 + }
25848 + for(i=0; i<4; i++)
25849 + {
25850 + byteVal1[i] = (u8)( (TxAGC1 & (0xff<<(i*8))) >>(i*8) );
25851 + if(byteVal1[i] > 0x24)
25852 + byteVal1[i] = 0x24;
25853 + byteVal2[i] = (u8)( (TxAGC2 & (0xff<<(i*8))) >>(i*8) );
25854 + if(byteVal2[i] > 0x24)
25855 + byteVal2[i] = 0x24;
25856 +
25857 + //for tx power track
25858 + byteVal3[i] = (u8)( (TxAGC2_tmp & (0xff<<(i*8))) >>(i*8) );
25859 + if(byteVal3[i] > 0x24)
25860 + byteVal3[i] = 0x24;
25861 + }
25862 +
25863 + if(priv->rf_type == RF_2T4R) //Only 2T4R you have to care the Antenna Tx Power offset
25864 + { // check antenna C over the max index 0x24
25865 + if(priv->RF_C_TxPwDiff > 0)
25866 + {
25867 + for(i=0; i<4; i++)
25868 + {
25869 + if( (byteVal1[i] + (u8)priv->RF_C_TxPwDiff) > 0x24)
25870 + byteVal1[i] = 0x24 - priv->RF_C_TxPwDiff;
25871 + if( (byteVal2[i] + (u8)priv->RF_C_TxPwDiff) > 0x24)
25872 + byteVal2[i] = 0x24 - priv->RF_C_TxPwDiff;
25873 + if( (byteVal3[i] + (u8)priv->RF_C_TxPwDiff) > 0x24)
25874 + byteVal3[i] = 0x24 - priv->RF_C_TxPwDiff;
25875 + }
25876 + }
25877 + }
25878 +
25879 + TxAGC1 = (byteVal1[3]<<24) | (byteVal1[2]<<16) |(byteVal1[1]<<8) |byteVal1[0];
25880 + TxAGC2 = (byteVal2[3]<<24) | (byteVal2[2]<<16) |(byteVal2[1]<<8) |byteVal2[0];
25881 +
25882 + //for tx power track
25883 + TxAGC2_tmp = (byteVal3[3]<<24) | (byteVal3[2]<<16) |(byteVal3[1]<<8) |byteVal3[0];
25884 + priv->Pwr_Track = TxAGC2_tmp;
25885 + //DbgPrint("TxAGC2_tmp = 0x%x\n", TxAGC2_tmp);
25886 +
25887 + //DbgPrint("TxAGC1/TxAGC2 = 0x%x/0x%x\n", TxAGC1, TxAGC2);
25888 + write_nic_dword(dev, MCS_TXAGC, TxAGC1);
25889 + write_nic_dword(dev, MCS_TXAGC+4, TxAGC2);
25890 +#else
25891 +#ifdef RTL8192E
25892 + u32 writeVal, powerBase0, powerBase1, writeVal_tmp;
25893 + u8 index = 0;
25894 + u16 RegOffset[6] = {0xe00, 0xe04, 0xe10, 0xe14, 0xe18, 0xe1c};
25895 + u8 byte0, byte1, byte2, byte3;
25896 +
25897 + powerBase0 = powerlevel + priv->LegacyHTTxPowerDiff; //OFDM rates
25898 + powerBase0 = (powerBase0<<24) | (powerBase0<<16) |(powerBase0<<8) |powerBase0;
25899 + powerBase1 = powerlevel; //MCS rates
25900 + powerBase1 = (powerBase1<<24) | (powerBase1<<16) |(powerBase1<<8) |powerBase1;
25901 +
25902 + for(index=0; index<6; index++)
25903 + {
25904 + writeVal = priv->MCSTxPowerLevelOriginalOffset[index] + ((index<2)?powerBase0:powerBase1);
25905 + byte0 = (u8)(writeVal & 0x7f);
25906 + byte1 = (u8)((writeVal & 0x7f00)>>8);
25907 + byte2 = (u8)((writeVal & 0x7f0000)>>16);
25908 + byte3 = (u8)((writeVal & 0x7f000000)>>24);
25909 + if(byte0 > 0x24) // Max power index = 0x24
25910 + byte0 = 0x24;
25911 + if(byte1 > 0x24)
25912 + byte1 = 0x24;
25913 + if(byte2 > 0x24)
25914 + byte2 = 0x24;
25915 + if(byte3 > 0x24)
25916 + byte3 = 0x24;
25917 +
25918 + if(index == 3)
25919 + {
25920 + writeVal_tmp = (byte3<<24) | (byte2<<16) |(byte1<<8) |byte0;
25921 + priv->Pwr_Track = writeVal_tmp;
25922 + }
25923 +
25924 + if(priv->bDynamicTxHighPower == true) //Add by Jacken 2008/03/06 //when DM implement, add this
25925 + {
25926 + writeVal = 0x03030303;
25927 + }
25928 + else
25929 + {
25930 + writeVal = (byte3<<24) | (byte2<<16) |(byte1<<8) |byte0;
25931 + }
25932 + rtl8192_setBBreg(dev, RegOffset[index], 0x7f7f7f7f, writeVal);
25933 + }
25934 +
25935 +#endif
25936 +#endif
25937 + return;
25938 +}
25939 +
25940 +#define MAX_DOZE_WAITING_TIMES_9x 64
25941 +static bool
25942 +SetRFPowerState8190(
25943 + struct net_device* dev,
25944 + RT_RF_POWER_STATE eRFPowerState
25945 + )
25946 +{
25947 + struct r8192_priv *priv = ieee80211_priv(dev);
25948 + PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
25949 + bool bResult = true;
25950 + //u8 eRFPath;
25951 + u8 i = 0, QueueID = 0;
25952 + ptx_ring head=NULL,tail=NULL;
25953 +
25954 + if(priv->SetRFPowerStateInProgress == true)
25955 + return false;
25956 + RT_TRACE(COMP_POWER, "===========> SetRFPowerState8190()!\n");
25957 + priv->SetRFPowerStateInProgress = true;
25958 +
25959 + switch(priv->rf_chip)
25960 + {
25961 + case RF_8256:
25962 + switch( eRFPowerState )
25963 + {
25964 + case eRfOn:
25965 + RT_TRACE(COMP_POWER, "SetRFPowerState8190() eRfOn !\n");
25966 + //RXTX enable control: On
25967 + //for(eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
25968 + // PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)eRFPath, 0x4, 0xC00, 0x2);
25969 + #ifdef RTL8190P
25970 + if(priv->rf_type == RF_2T4R)
25971 + {
25972 + //enable RF-Chip A/B
25973 + rtl8192_setBBreg(dev, rFPGA0_XA_RFInterfaceOE, BIT4, 0x1); // 0x860[4]
25974 + //enable RF-Chip C/D
25975 + rtl8192_setBBreg(dev, rFPGA0_XC_RFInterfaceOE, BIT4, 0x1); // 0x868[4]
25976 + //analog to digital on
25977 + rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf00, 0xf);// 0x88c[11:8]
25978 + //digital to analog on
25979 + rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x1e0, 0xf); // 0x880[8:5]
25980 + //rx antenna on
25981 + rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0xf, 0xf);// 0xc04[3:0]
25982 + //rx antenna on
25983 + rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0xf, 0xf);// 0xd04[3:0]
25984 + //analog to digital part2 on
25985 + rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x1e00, 0xf); // 0x880[12:9]
25986 + }
25987 + else if(priv->rf_type == RF_1T2R) //RF-C, RF-D
25988 + {
25989 + //enable RF-Chip C/D
25990 + rtl8192_setBBreg(dev, rFPGA0_XC_RFInterfaceOE, BIT4, 0x1); // 0x868[4]
25991 + //analog to digital on
25992 + rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xc00, 0x3);// 0x88c[11:10]
25993 + //digital to analog on
25994 + rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x180, 0x3); // 0x880[8:7]
25995 + //rx antenna on
25996 + rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0xc, 0x3);// 0xc04[3:2]
25997 + //rx antenna on
25998 + rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0xc, 0x3);// 0xd04[3:2]
25999 + //analog to digital part2 on
26000 + rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x1800, 0x3); // 0x880[12:11]
26001 + }
26002 + #else
26003 + write_nic_byte(dev, ANAPAR, 0x37);//160MHz
26004 + write_nic_byte(dev, MacBlkCtrl, 0x17); // 0x403
26005 + mdelay(1);
26006 + //enable clock 80/88 MHz
26007 +
26008 + priv->bHwRfOffAction = 0;
26009 + //}
26010 +
26011 + // Baseband reset 2008.09.30 add
26012 + write_nic_byte(dev, BB_RESET, (read_nic_byte(dev, BB_RESET)|BIT0));
26013 +
26014 + //2 AFE
26015 + // 2008.09.30 add
26016 + rtl8192_setBBreg(dev, rFPGA0_AnalogParameter2, 0x20000000, 0x1); // 0x884
26017 + //analog to digital part2 on
26018 + rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x60, 0x3); // 0x880[6:5]
26019 + //digital to analog on
26020 + rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x98, 0x13); // 0x880[4:3]
26021 + //analog to digital on
26022 + rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf03, 0xf03);// 0x88c[9:8]
26023 + //rx antenna on
26024 + //PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, 0x3, 0x3);// 0xc04[1:0]
26025 + //rx antenna on 2008.09.30 mark
26026 + //PHY_SetBBReg(Adapter, rOFDM1_TRxPathEnable, 0x3, 0x3);// 0xd04[1:0]
26027 +
26028 + //2 RF
26029 + //enable RF-Chip A/B
26030 + rtl8192_setBBreg(dev, rFPGA0_XA_RFInterfaceOE, BIT4, 0x1); // 0x860[4]
26031 + rtl8192_setBBreg(dev, rFPGA0_XB_RFInterfaceOE, BIT4, 0x1); // 0x864[4]
26032 + #endif
26033 + break;
26034 +
26035 + //
26036 + // In current solution, RFSleep=RFOff in order to save power under 802.11 power save.
26037 + // By Bruce, 2008-01-16.
26038 + //
26039 + case eRfSleep:
26040 + case eRfOff:
26041 + RT_TRACE(COMP_POWER, "SetRFPowerState8190() eRfOff/Sleep !\n");
26042 + if (pPSC->bLeisurePs)
26043 + {
26044 + for(QueueID = 0, i = 0; QueueID < MAX_TX_QUEUE; )
26045 + {
26046 + switch(QueueID) {
26047 + case MGNT_QUEUE:
26048 + tail=priv->txmapringtail;
26049 + head=priv->txmapringhead;
26050 + break;
26051 +
26052 + case BK_QUEUE:
26053 + tail=priv->txbkpringtail;
26054 + head=priv->txbkpringhead;
26055 + break;
26056 +
26057 + case BE_QUEUE:
26058 + tail=priv->txbepringtail;
26059 + head=priv->txbepringhead;
26060 + break;
26061 +
26062 + case VI_QUEUE:
26063 + tail=priv->txvipringtail;
26064 + head=priv->txvipringhead;
26065 + break;
26066 +
26067 + case VO_QUEUE:
26068 + tail=priv->txvopringtail;
26069 + head=priv->txvopringhead;
26070 + break;
26071 +
26072 + default:
26073 + tail=head=NULL;
26074 + break;
26075 + }
26076 + if(tail == head)
26077 + {
26078 + //DbgPrint("QueueID = %d", QueueID);
26079 + QueueID++;
26080 + continue;
26081 + }
26082 + else
26083 + {
26084 + RT_TRACE(COMP_POWER, "eRf Off/Sleep: %d times BusyQueue[%d] !=0 before doze!\n", (i+1), QueueID);
26085 + udelay(10);
26086 + i++;
26087 + }
26088 +
26089 + if(i >= MAX_DOZE_WAITING_TIMES_9x)
26090 + {
26091 + RT_TRACE(COMP_POWER, "\n\n\n TimeOut!! SetRFPowerState8190(): eRfOff: %d times BusyQueue[%d] != 0 !!!\n\n\n", MAX_DOZE_WAITING_TIMES_9x, QueueID);
26092 + break;
26093 + }
26094 + }
26095 + }
26096 + #ifdef RTL8190P
26097 + if(priv->rf_type == RF_2T4R)
26098 + {
26099 + //disable RF-Chip A/B
26100 + rtl8192_setBBreg(dev, rFPGA0_XA_RFInterfaceOE, BIT4, 0x0); // 0x860[4]
26101 + }
26102 + //disable RF-Chip C/D
26103 + rtl8192_setBBreg(dev, rFPGA0_XC_RFInterfaceOE, BIT4, 0x0); // 0x868[4]
26104 + //analog to digital off, for power save
26105 + rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf00, 0x0);// 0x88c[11:8]
26106 + //digital to analog off, for power save
26107 + rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x1e0, 0x0); // 0x880[8:5]
26108 + //rx antenna off
26109 + rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0xf, 0x0);// 0xc04[3:0]
26110 + //rx antenna off
26111 + rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0xf, 0x0);// 0xd04[3:0]
26112 + //analog to digital part2 off, for power save
26113 + rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x1e00, 0x0); // 0x880[12:9]
26114 +#else //8192E
26115 + //2 RF
26116 + //disable RF-Chip A/B
26117 + rtl8192_setBBreg(dev, rFPGA0_XA_RFInterfaceOE, BIT4, 0x0); // 0x860[4]
26118 + rtl8192_setBBreg(dev, rFPGA0_XB_RFInterfaceOE, BIT4, 0x0); // 0x864[4]
26119 + //2 AFE
26120 + //analog to digital off, for power save
26121 + //PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter4, 0xf00, 0x0);// 0x88c[11:8]
26122 + rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf03, 0x0); // 2008.09.30 Modify
26123 + //digital to analog off, for power save
26124 + //PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter1, 0x18, 0x0); // 0x880[4:3]
26125 + rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x98, 0x0); // 0x880 2008.09.30 Modify
26126 + //rx antenna off 2008.09.30 mark
26127 + //PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, 0xf, 0x0);// 0xc04[3:0]
26128 + //rx antenna off 2008.09.30 mark
26129 + //PHY_SetBBReg(Adapter, rOFDM1_TRxPathEnable, 0xf, 0x0);// 0xd04[3:0]
26130 + //analog to digital part2 off, for power save
26131 + rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x60, 0x0); // 0x880[6:5]
26132 + // 2008.09.30 add
26133 + rtl8192_setBBreg(dev, rFPGA0_AnalogParameter2, 0x20000000, 0x0); // 0x884
26134 +
26135 +
26136 + //disable clock 80/88 MHz 2008.09.30 mark
26137 + //PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter1, 0x4, 0x0); // 0x880[2]
26138 + //2 BB
26139 + // Baseband reset 2008.09.30 add
26140 + write_nic_byte(dev, BB_RESET, (read_nic_byte(dev, BB_RESET)|BIT0)); // 0x101
26141 + //MAC: off
26142 + write_nic_byte(dev, MacBlkCtrl, 0x0); // 0x403
26143 + //slow down cpu/lbus clock from 160MHz to Lower
26144 + write_nic_byte(dev, ANAPAR, 0x07); // 0x 17 40MHz
26145 + priv->bHwRfOffAction = 0;
26146 + //}
26147 + #endif
26148 + break;
26149 +
26150 + default:
26151 + bResult = false;
26152 + RT_TRACE(COMP_ERR, "SetRFPowerState8190(): unknow state to set: 0x%X!!!\n", eRFPowerState);
26153 + break;
26154 + }
26155 +
26156 + break;
26157 +
26158 + default:
26159 + RT_TRACE(COMP_ERR, "SetRFPowerState8190(): Unknown RF type\n");
26160 + break;
26161 + }
26162 +
26163 + if(bResult)
26164 + {
26165 + // Update current RF state variable.
26166 + priv->ieee80211->eRFPowerState = eRFPowerState;
26167 +
26168 + switch(priv->rf_chip )
26169 + {
26170 + case RF_8256:
26171 + switch(priv->ieee80211->eRFPowerState)
26172 + {
26173 + case eRfOff:
26174 + //
26175 + //If Rf off reason is from IPS, Led should blink with no link, by Maddest 071015
26176 + //
26177 + if(priv->ieee80211->RfOffReason==RF_CHANGE_BY_IPS )
26178 + {
26179 + #ifdef TO_DO
26180 + Adapter->HalFunc.LedControlHandler(Adapter,LED_CTL_NO_LINK);
26181 + #endif
26182 + }
26183 + else
26184 + {
26185 + // Turn off LED if RF is not ON.
26186 + #ifdef TO_DO
26187 + Adapter->HalFunc.LedControlHandler(Adapter, LED_CTL_POWER_OFF);
26188 + #endif
26189 + }
26190 + break;
26191 +
26192 + case eRfOn:
26193 + // Turn on RF we are still linked, which might happen when
26194 + // we quickly turn off and on HW RF. 2006.05.12, by rcnjko.
26195 + if( priv->ieee80211->state == IEEE80211_LINKED)
26196 + {
26197 + #ifdef TO_DO
26198 + Adapter->HalFunc.LedControlHandler(Adapter, LED_CTL_LINK);
26199 + #endif
26200 + }
26201 + else
26202 + {
26203 + // Turn off LED if RF is not ON.
26204 + #ifdef TO_DO
26205 + Adapter->HalFunc.LedControlHandler(Adapter, LED_CTL_NO_LINK);
26206 + #endif
26207 + }
26208 + break;
26209 +
26210 + default:
26211 + // do nothing.
26212 + break;
26213 + }// Switch RF state
26214 +
26215 + break;
26216 +
26217 + default:
26218 + RT_TRACE(COMP_ERR, "SetRFPowerState8190(): Unknown RF type\n");
26219 + break;
26220 + }// Switch RFChipID
26221 + }
26222 +
26223 + priv->SetRFPowerStateInProgress = false;
26224 + RT_TRACE(COMP_POWER, "<=========== SetRFPowerState8190() bResult = %d!\n", bResult);
26225 + return bResult;
26226 +}
26227 +
26228 +
26229 +
26230 +//
26231 +// Description:
26232 +// Change RF power state.
26233 +//
26234 +// Assumption:
26235 +// This function must be executed in re-schdulable context,
26236 +// ie. PASSIVE_LEVEL.
26237 +//
26238 +// 050823, by rcnjko.
26239 +//
26240 +static bool
26241 +SetRFPowerState(
26242 + struct net_device* dev,
26243 + RT_RF_POWER_STATE eRFPowerState
26244 + )
26245 +{
26246 + struct r8192_priv *priv = ieee80211_priv(dev);
26247 +
26248 + bool bResult = false;
26249 +
26250 + RT_TRACE(COMP_RF,"---------> SetRFPowerState(): eRFPowerState(%d)\n", eRFPowerState);
26251 +#ifdef RTL8192E
26252 + if(eRFPowerState == priv->ieee80211->eRFPowerState && priv->bHwRfOffAction == 0)
26253 +#else
26254 + if(eRFPowerState == priv->ieee80211->eRFPowerState)
26255 +#endif
26256 + {
26257 + RT_TRACE(COMP_POWER, "<--------- SetRFPowerState(): discard the request for eRFPowerState(%d) is the same.\n", eRFPowerState);
26258 + return bResult;
26259 + }
26260 +
26261 + bResult = SetRFPowerState8190(dev, eRFPowerState);
26262 +
26263 + RT_TRACE(COMP_POWER, "<--------- SetRFPowerState(): bResult(%d)\n", bResult);
26264 +
26265 + return bResult;
26266 +}
26267 +
26268 +static void
26269 +MgntDisconnectIBSS(
26270 + struct net_device* dev
26271 +)
26272 +{
26273 + struct r8192_priv *priv = ieee80211_priv(dev);
26274 + //RT_OP_MODE OpMode;
26275 + u8 i;
26276 + bool bFilterOutNonAssociatedBSSID = false;
26277 +
26278 + //IEEE80211_DEBUG(IEEE80211_DL_TRACE, "XXXXXXXXXX MgntDisconnect IBSS\n");
26279 +
26280 + priv->ieee80211->state = IEEE80211_NOLINK;
26281 +
26282 +// PlatformZeroMemory( pMgntInfo->Bssid, 6 );
26283 + for(i=0;i<6;i++) priv->ieee80211->current_network.bssid[i]= 0x55;
26284 + priv->OpMode = RT_OP_MODE_NO_LINK;
26285 + write_nic_word(dev, BSSIDR, ((u16*)priv->ieee80211->current_network.bssid)[0]);
26286 + write_nic_dword(dev, BSSIDR+2, ((u32*)(priv->ieee80211->current_network.bssid+2))[0]);
26287 + {
26288 + RT_OP_MODE OpMode = priv->OpMode;
26289 + //LED_CTL_MODE LedAction = LED_CTL_NO_LINK;
26290 + u8 btMsr = read_nic_byte(dev, MSR);
26291 +
26292 + btMsr &= 0xfc;
26293 +
26294 + switch(OpMode)
26295 + {
26296 + case RT_OP_MODE_INFRASTRUCTURE:
26297 + btMsr |= MSR_LINK_MANAGED;
26298 + //LedAction = LED_CTL_LINK;
26299 + break;
26300 +
26301 + case RT_OP_MODE_IBSS:
26302 + btMsr |= MSR_LINK_ADHOC;
26303 + // led link set seperate
26304 + break;
26305 +
26306 + case RT_OP_MODE_AP:
26307 + btMsr |= MSR_LINK_MASTER;
26308 + //LedAction = LED_CTL_LINK;
26309 + break;
26310 +
26311 + default:
26312 + btMsr |= MSR_LINK_NONE;
26313 + break;
26314 + }
26315 +
26316 + write_nic_byte(dev, MSR, btMsr);
26317 +
26318 + // LED control
26319 + //Adapter->HalFunc.LedControlHandler(Adapter, LedAction);
26320 + }
26321 + ieee80211_stop_send_beacons(priv->ieee80211);
26322 +
26323 + // If disconnect, clear RCR CBSSID bit
26324 + bFilterOutNonAssociatedBSSID = false;
26325 + {
26326 + u32 RegRCR, Type;
26327 + Type = bFilterOutNonAssociatedBSSID;
26328 + RegRCR = read_nic_dword(dev,RCR);
26329 + priv->ReceiveConfig = RegRCR;
26330 + if (Type == true)
26331 + RegRCR |= (RCR_CBSSID);
26332 + else if (Type == false)
26333 + RegRCR &= (~RCR_CBSSID);
26334 +
26335 + {
26336 + write_nic_dword(dev, RCR,RegRCR);
26337 + priv->ReceiveConfig = RegRCR;
26338 + }
26339 +
26340 + }
26341 + //MgntIndicateMediaStatus( Adapter, RT_MEDIA_DISCONNECT, GENERAL_INDICATE );
26342 + notify_wx_assoc_event(priv->ieee80211);
26343 +
26344 +}
26345 +
26346 +static void
26347 +MlmeDisassociateRequest(
26348 + struct net_device* dev,
26349 + u8* asSta,
26350 + u8 asRsn
26351 + )
26352 +{
26353 + struct r8192_priv *priv = ieee80211_priv(dev);
26354 + u8 i;
26355 +
26356 + RemovePeerTS(priv->ieee80211, asSta);
26357 +
26358 + SendDisassociation( priv->ieee80211, asSta, asRsn );
26359 +
26360 + if(memcpy(priv->ieee80211->current_network.bssid,asSta,6) == NULL)
26361 + {
26362 + //ShuChen TODO: change media status.
26363 + //ShuChen TODO: What to do when disassociate.
26364 + priv->ieee80211->state = IEEE80211_NOLINK;
26365 + //pMgntInfo->AsocTimestamp = 0;
26366 + for(i=0;i<6;i++) priv->ieee80211->current_network.bssid[i] = 0x22;
26367 +// pMgntInfo->mBrates.Length = 0;
26368 +// Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_BASIC_RATE, (pu1Byte)(&pMgntInfo->mBrates) );
26369 + priv->OpMode = RT_OP_MODE_NO_LINK;
26370 + {
26371 + RT_OP_MODE OpMode = priv->OpMode;
26372 + //LED_CTL_MODE LedAction = LED_CTL_NO_LINK;
26373 + u8 btMsr = read_nic_byte(dev, MSR);
26374 +
26375 + btMsr &= 0xfc;
26376 +
26377 + switch(OpMode)
26378 + {
26379 + case RT_OP_MODE_INFRASTRUCTURE:
26380 + btMsr |= MSR_LINK_MANAGED;
26381 + //LedAction = LED_CTL_LINK;
26382 + break;
26383 +
26384 + case RT_OP_MODE_IBSS:
26385 + btMsr |= MSR_LINK_ADHOC;
26386 + // led link set seperate
26387 + break;
26388 +
26389 + case RT_OP_MODE_AP:
26390 + btMsr |= MSR_LINK_MASTER;
26391 + //LedAction = LED_CTL_LINK;
26392 + break;
26393 +
26394 + default:
26395 + btMsr |= MSR_LINK_NONE;
26396 + break;
26397 + }
26398 +
26399 + write_nic_byte(dev, MSR, btMsr);
26400 +
26401 + // LED control
26402 + //Adapter->HalFunc.LedControlHandler(Adapter, LedAction);
26403 + }
26404 + ieee80211_disassociate(priv->ieee80211);
26405 +
26406 + write_nic_word(dev, BSSIDR, ((u16*)priv->ieee80211->current_network.bssid)[0]);
26407 + write_nic_dword(dev, BSSIDR+2, ((u32*)(priv->ieee80211->current_network.bssid+2))[0]);
26408 +
26409 + }
26410 +
26411 +}
26412 +
26413 +
26414 +static void
26415 +MgntDisconnectAP(
26416 + struct net_device* dev,
26417 + u8 asRsn
26418 +)
26419 +{
26420 + struct r8192_priv *priv = ieee80211_priv(dev);
26421 + bool bFilterOutNonAssociatedBSSID = false;
26422 +
26423 +//
26424 +// Commented out by rcnjko, 2005.01.27:
26425 +// I move SecClearAllKeys() to MgntActSet_802_11_DISASSOCIATE().
26426 +//
26427 +// //2004/09/15, kcwu, the key should be cleared, or the new handshaking will not success
26428 +// SecClearAllKeys(Adapter);
26429 +
26430 + // In WPA WPA2 need to Clear all key ... because new key will set after new handshaking.
26431 +#ifdef TO_DO
26432 + if( pMgntInfo->SecurityInfo.AuthMode > RT_802_11AuthModeAutoSwitch ||
26433 + (pMgntInfo->bAPSuportCCKM && pMgntInfo->bCCX8021xenable) ) // In CCKM mode will Clear key
26434 + {
26435 + SecClearAllKeys(Adapter);
26436 + RT_TRACE(COMP_SEC, DBG_LOUD,("======>CCKM clear key..."))
26437 + }
26438 +#endif
26439 + // If disconnect, clear RCR CBSSID bit
26440 + bFilterOutNonAssociatedBSSID = false;
26441 + {
26442 + u32 RegRCR, Type;
26443 +
26444 + Type = bFilterOutNonAssociatedBSSID;
26445 + //Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_RCR, (pu1Byte)(&RegRCR));
26446 + RegRCR = read_nic_dword(dev,RCR);
26447 + priv->ReceiveConfig = RegRCR;
26448 +
26449 + if (Type == true)
26450 + RegRCR |= (RCR_CBSSID);
26451 + else if (Type == false)
26452 + RegRCR &= (~RCR_CBSSID);
26453 +
26454 + write_nic_dword(dev, RCR,RegRCR);
26455 + priv->ReceiveConfig = RegRCR;
26456 +
26457 +
26458 + }
26459 + // 2004.10.11, by rcnjko.
26460 + //MlmeDisassociateRequest( Adapter, pMgntInfo->Bssid, disas_lv_ss );
26461 + MlmeDisassociateRequest( dev, priv->ieee80211->current_network.bssid, asRsn );
26462 +
26463 + priv->ieee80211->state = IEEE80211_NOLINK;
26464 + //pMgntInfo->AsocTimestamp = 0;
26465 +}
26466 +
26467 +
26468 +static bool
26469 +MgntDisconnect(
26470 + struct net_device* dev,
26471 + u8 asRsn
26472 +)
26473 +{
26474 + struct r8192_priv *priv = ieee80211_priv(dev);
26475 +
26476 + //
26477 + // Schedule an workitem to wake up for ps mode, 070109, by rcnjko.
26478 + //
26479 +#ifdef TO_DO
26480 + if(pMgntInfo->mPss != eAwake)
26481 + {
26482 + //
26483 + // Using AwkaeTimer to prevent mismatch ps state.
26484 + // In the timer the state will be changed according to the RF is being awoke or not. By Bruce, 2007-10-31.
26485 + //
26486 + // PlatformScheduleWorkItem( &(pMgntInfo->AwakeWorkItem) );
26487 + PlatformSetTimer( Adapter, &(pMgntInfo->AwakeTimer), 0 );
26488 + }
26489 +#endif
26490 + // Follow 8180 AP mode, 2005.05.30, by rcnjko.
26491 +#ifdef TO_DO
26492 + if(pMgntInfo->mActingAsAp)
26493 + {
26494 + RT_TRACE(COMP_MLME, DBG_LOUD, ("MgntDisconnect() ===> AP_DisassociateAllStation\n"));
26495 + AP_DisassociateAllStation(Adapter, unspec_reason);
26496 + return TRUE;
26497 + }
26498 +#endif
26499 + // Indication of disassociation event.
26500 + //DrvIFIndicateDisassociation(Adapter, asRsn);
26501 +
26502 + // In adhoc mode, update beacon frame.
26503 + if( priv->ieee80211->state == IEEE80211_LINKED )
26504 + {
26505 + if( priv->ieee80211->iw_mode == IW_MODE_ADHOC )
26506 + {
26507 + //RT_TRACE(COMP_MLME, "MgntDisconnect() ===> MgntDisconnectIBSS\n");
26508 + MgntDisconnectIBSS(dev);
26509 + }
26510 + if( priv->ieee80211->iw_mode == IW_MODE_INFRA )
26511 + {
26512 + // We clear key here instead of MgntDisconnectAP() because that
26513 + // MgntActSet_802_11_DISASSOCIATE() is an interface called by OS,
26514 + // e.g. OID_802_11_DISASSOCIATE in Windows while as MgntDisconnectAP() is
26515 + // used to handle disassociation related things to AP, e.g. send Disassoc
26516 + // frame to AP. 2005.01.27, by rcnjko.
26517 + //IEEE80211_DEBUG(IEEE80211_DL_TRACE,"MgntDisconnect() ===> MgntDisconnectAP\n");
26518 + MgntDisconnectAP(dev, asRsn);
26519 + }
26520 +
26521 + // Inidicate Disconnect, 2005.02.23, by rcnjko.
26522 + //MgntIndicateMediaStatus( Adapter, RT_MEDIA_DISCONNECT, GENERAL_INDICATE);
26523 + }
26524 +
26525 + return true;
26526 +}
26527 +
26528 +//
26529 +// Description:
26530 +// Chang RF Power State.
26531 +// Note that, only MgntActSet_RF_State() is allowed to set HW_VAR_RF_STATE.
26532 +//
26533 +// Assumption:
26534 +// PASSIVE LEVEL.
26535 +//
26536 +bool
26537 +MgntActSet_RF_State(
26538 + struct net_device* dev,
26539 + RT_RF_POWER_STATE StateToSet,
26540 + RT_RF_CHANGE_SOURCE ChangeSource
26541 + )
26542 +{
26543 + struct r8192_priv *priv = ieee80211_priv(dev);
26544 + bool bActionAllowed = false;
26545 + bool bConnectBySSID = false;
26546 + RT_RF_POWER_STATE rtState;
26547 + u16 RFWaitCounter = 0;
26548 + unsigned long flag;
26549 + RT_TRACE(COMP_POWER, "===>MgntActSet_RF_State(): StateToSet(%d)\n",StateToSet);
26550 +
26551 + //1//
26552 + //1//<1>Prevent the race condition of RF state change.
26553 + //1//
26554 + // Only one thread can change the RF state at one time, and others should wait to be executed. By Bruce, 2007-11-28.
26555 +
26556 + while(true)
26557 + {
26558 + spin_lock_irqsave(&priv->rf_ps_lock,flag);
26559 + if(priv->RFChangeInProgress)
26560 + {
26561 + spin_unlock_irqrestore(&priv->rf_ps_lock,flag);
26562 + RT_TRACE(COMP_POWER, "MgntActSet_RF_State(): RF Change in progress! Wait to set..StateToSet(%d).\n", StateToSet);
26563 +
26564 + // Set RF after the previous action is done.
26565 + while(priv->RFChangeInProgress)
26566 + {
26567 + RFWaitCounter ++;
26568 + RT_TRACE(COMP_POWER, "MgntActSet_RF_State(): Wait 1 ms (%d times)...\n", RFWaitCounter);
26569 + udelay(1000); // 1 ms
26570 +
26571 + // Wait too long, return FALSE to avoid to be stuck here.
26572 + if(RFWaitCounter > 100)
26573 + {
26574 + RT_TRACE(COMP_ERR, "MgntActSet_RF_State(): Wait too logn to set RF\n");
26575 + // TODO: Reset RF state?
26576 + return false;
26577 + }
26578 + }
26579 + }
26580 + else
26581 + {
26582 + priv->RFChangeInProgress = true;
26583 + spin_unlock_irqrestore(&priv->rf_ps_lock,flag);
26584 + break;
26585 + }
26586 + }
26587 +
26588 + rtState = priv->ieee80211->eRFPowerState;
26589 +
26590 + switch(StateToSet)
26591 + {
26592 + case eRfOn:
26593 + //
26594 + // Turn On RF no matter the IPS setting because we need to update the RF state to Ndis under Vista, or
26595 + // the Windows does not allow the driver to perform site survey any more. By Bruce, 2007-10-02.
26596 + //
26597 +
26598 + priv->ieee80211->RfOffReason &= (~ChangeSource);
26599 +
26600 + if(! priv->ieee80211->RfOffReason)
26601 + {
26602 + priv->ieee80211->RfOffReason = 0;
26603 + bActionAllowed = true;
26604 +
26605 +
26606 + if(rtState == eRfOff && ChangeSource >=RF_CHANGE_BY_HW )
26607 + {
26608 + bConnectBySSID = true;
26609 + }
26610 + }
26611 + else
26612 + RT_TRACE(COMP_POWER, "MgntActSet_RF_State - eRfon reject pMgntInfo->RfOffReason= 0x%x, ChangeSource=0x%X\n", priv->ieee80211->RfOffReason, ChangeSource);
26613 +
26614 + break;
26615 +
26616 + case eRfOff:
26617 +
26618 + if (priv->ieee80211->RfOffReason > RF_CHANGE_BY_IPS)
26619 + {
26620 + //
26621 + // 060808, Annie:
26622 + // Disconnect to current BSS when radio off. Asked by QuanTa.
26623 + //
26624 + // Set all link status falg, by Bruce, 2007-06-26.
26625 + //MgntActSet_802_11_DISASSOCIATE( Adapter, disas_lv_ss );
26626 + MgntDisconnect(dev, disas_lv_ss);
26627 +
26628 + // Clear content of bssDesc[] and bssDesc4Query[] to avoid reporting old bss to UI.
26629 + // 2007.05.28, by shien chang.
26630 +
26631 + }
26632 +
26633 +
26634 + priv->ieee80211->RfOffReason |= ChangeSource;
26635 + bActionAllowed = true;
26636 + break;
26637 +
26638 + case eRfSleep:
26639 + priv->ieee80211->RfOffReason |= ChangeSource;
26640 + bActionAllowed = true;
26641 + break;
26642 +
26643 + default:
26644 + break;
26645 + }
26646 +
26647 + if(bActionAllowed)
26648 + {
26649 + RT_TRACE(COMP_POWER, "MgntActSet_RF_State(): Action is allowed.... StateToSet(%d), RfOffReason(%#X)\n", StateToSet, priv->ieee80211->RfOffReason);
26650 + // Config HW to the specified mode.
26651 + SetRFPowerState(dev, StateToSet);
26652 + // Turn on RF.
26653 + if(StateToSet == eRfOn)
26654 + {
26655 + //Adapter->HalFunc.HalEnableRxHandler(Adapter);
26656 + if(bConnectBySSID)
26657 + {
26658 + //MgntActSet_802_11_SSID(Adapter, Adapter->MgntInfo.Ssid.Octet, Adapter->MgntInfo.Ssid.Length, TRUE );
26659 + }
26660 + }
26661 + // Turn off RF.
26662 + else if(StateToSet == eRfOff)
26663 + {
26664 + //Adapter->HalFunc.HalDisableRxHandler(Adapter);
26665 + }
26666 + }
26667 + else
26668 + {
26669 + RT_TRACE(COMP_POWER, "MgntActSet_RF_State(): Action is rejected.... StateToSet(%d), ChangeSource(%#X), RfOffReason(%#X)\n", StateToSet, ChangeSource, priv->ieee80211->RfOffReason);
26670 + }
26671 +
26672 + // Release RF spinlock
26673 + spin_lock_irqsave(&priv->rf_ps_lock,flag);
26674 + priv->RFChangeInProgress = false;
26675 + spin_unlock_irqrestore(&priv->rf_ps_lock,flag);
26676 +
26677 + RT_TRACE(COMP_POWER, "<===MgntActSet_RF_State()\n");
26678 + return bActionAllowed;
26679 +}
26680 +
26681 +
26682 --- /dev/null
26683 +++ b/drivers/staging/rtl8192e/r8190_rtl8256.h
26684 @@ -0,0 +1,28 @@
26685 +/*
26686 + This is part of the rtl8180-sa2400 driver
26687 + released under the GPL (See file COPYING for details).
26688 + Copyright (c) 2005 Andrea Merello <andreamrl@tiscali.it>
26689 +
26690 + This files contains programming code for the rtl8256
26691 + radio frontend.
26692 +
26693 + *Many* thanks to Realtek Corp. for their great support!
26694 +
26695 +*/
26696 +
26697 +#ifndef RTL8225H
26698 +#define RTL8225H
26699 +
26700 +#ifdef RTL8190P
26701 +#define RTL819X_TOTAL_RF_PATH 4
26702 +#else
26703 +#define RTL819X_TOTAL_RF_PATH 2 //for 8192E
26704 +#endif
26705 +extern void PHY_SetRF8256Bandwidth(struct net_device* dev , HT_CHANNEL_WIDTH Bandwidth);
26706 +extern RT_STATUS PHY_RF8256_Config(struct net_device* dev);
26707 +extern RT_STATUS phy_RF8256_Config_ParaFile(struct net_device* dev);
26708 +extern void PHY_SetRF8256CCKTxPower(struct net_device* dev, u8 powerlevel);
26709 +extern void PHY_SetRF8256OFDMTxPower(struct net_device* dev, u8 powerlevel);
26710 +extern bool MgntActSet_RF_State(struct net_device* dev, RT_RF_POWER_STATE StateToSet, RT_RF_CHANGE_SOURCE ChangeSource);
26711 +
26712 +#endif
26713 --- /dev/null
26714 +++ b/drivers/staging/rtl8192e/r8192E.h
26715 @@ -0,0 +1,1554 @@
26716 +/*
26717 + This is part of rtl8187 OpenSource driver.
26718 + Copyright (C) Andrea Merello 2004-2005 <andreamrl@tiscali.it>
26719 + Released under the terms of GPL (General Public Licence)
26720 +
26721 + Parts of this driver are based on the GPL part of the
26722 + official realtek driver
26723 +
26724 + Parts of this driver are based on the rtl8192 driver skeleton
26725 + from Patric Schenke & Andres Salomon
26726 +
26727 + Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver
26728 +
26729 + We want to tanks the Authors of those projects and the Ndiswrapper
26730 + project Authors.
26731 +*/
26732 +
26733 +#ifndef R819xU_H
26734 +#define R819xU_H
26735 +
26736 +#include <linux/module.h>
26737 +#include <linux/kernel.h>
26738 +//#include <linux/config.h>
26739 +#include <linux/init.h>
26740 +#include <linux/ioport.h>
26741 +#include <linux/sched.h>
26742 +#include <linux/types.h>
26743 +#include <linux/slab.h>
26744 +#include <linux/netdevice.h>
26745 +#include <linux/pci.h>
26746 +//#include <linux/usb.h>
26747 +#include <linux/etherdevice.h>
26748 +#include <linux/delay.h>
26749 +#include <linux/rtnetlink.h> //for rtnl_lock()
26750 +#include <linux/wireless.h>
26751 +#include <linux/timer.h>
26752 +#include <linux/proc_fs.h> // Necessary because we use the proc fs
26753 +#include <linux/if_arp.h>
26754 +#include <linux/random.h>
26755 +#include <linux/version.h>
26756 +#include <asm/io.h>
26757 +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27))
26758 +#include <asm/semaphore.h>
26759 +#endif
26760 +#include "ieee80211.h"
26761 +
26762 +
26763 +
26764 +
26765 +#define RTL819xE_MODULE_NAME "rtl819xE"
26766 +//added for HW security, john.0629
26767 +#define FALSE 0
26768 +#define TRUE 1
26769 +#define MAX_KEY_LEN 61
26770 +#define KEY_BUF_SIZE 5
26771 +
26772 +#define BIT0 0x00000001
26773 +#define BIT1 0x00000002
26774 +#define BIT2 0x00000004
26775 +#define BIT3 0x00000008
26776 +#define BIT4 0x00000010
26777 +#define BIT5 0x00000020
26778 +#define BIT6 0x00000040
26779 +#define BIT7 0x00000080
26780 +#define BIT8 0x00000100
26781 +#define BIT9 0x00000200
26782 +#define BIT10 0x00000400
26783 +#define BIT11 0x00000800
26784 +#define BIT12 0x00001000
26785 +#define BIT13 0x00002000
26786 +#define BIT14 0x00004000
26787 +#define BIT15 0x00008000
26788 +#define BIT16 0x00010000
26789 +#define BIT17 0x00020000
26790 +#define BIT18 0x00040000
26791 +#define BIT19 0x00080000
26792 +#define BIT20 0x00100000
26793 +#define BIT21 0x00200000
26794 +#define BIT22 0x00400000
26795 +#define BIT23 0x00800000
26796 +#define BIT24 0x01000000
26797 +#define BIT25 0x02000000
26798 +#define BIT26 0x04000000
26799 +#define BIT27 0x08000000
26800 +#define BIT28 0x10000000
26801 +#define BIT29 0x20000000
26802 +#define BIT30 0x40000000
26803 +#define BIT31 0x80000000
26804 +// Rx smooth factor
26805 +#define Rx_Smooth_Factor 20
26806 +/* 2007/06/04 MH Define sliding window for RSSI history. */
26807 +#define PHY_RSSI_SLID_WIN_MAX 100
26808 +#define PHY_Beacon_RSSI_SLID_WIN_MAX 10
26809 +
26810 +#define IC_VersionCut_D 0x3
26811 +#define IC_VersionCut_E 0x4
26812 +
26813 +#if 0 //we need to use RT_TRACE instead DMESG as RT_TRACE will clearly show debug level wb.
26814 +#define DMESG(x,a...) printk(KERN_INFO RTL819xE_MODULE_NAME ": " x "\n", ## a)
26815 +#define DMESGW(x,a...) printk(KERN_WARNING RTL819xE_MODULE_NAME ": WW:" x "\n", ## a)
26816 +#define DMESGE(x,a...) printk(KERN_WARNING RTL819xE_MODULE_NAME ": EE:" x "\n", ## a)
26817 +#else
26818 +#define DMESG(x,a...)
26819 +#define DMESGW(x,a...)
26820 +#define DMESGE(x,a...)
26821 +extern u32 rt_global_debug_component;
26822 +#define RT_TRACE(component, x, args...) \
26823 +do { if(rt_global_debug_component & component) \
26824 + printk(KERN_DEBUG RTL819xE_MODULE_NAME ":" x "\n" , \
26825 + ##args);\
26826 +}while(0);
26827 +
26828 +#define COMP_TRACE BIT0 // For function call tracing.
26829 +#define COMP_DBG BIT1 // Only for temporary debug message.
26830 +#define COMP_INIT BIT2 // during driver initialization / halt / reset.
26831 +
26832 +
26833 +#define COMP_RECV BIT3 // Reveive part data path.
26834 +#define COMP_SEND BIT4 // Send part path.
26835 +#define COMP_IO BIT5 // I/O Related. Added by Annie, 2006-03-02.
26836 +#define COMP_POWER BIT6 // 802.11 Power Save mode or System/Device Power state related.
26837 +#define COMP_EPROM BIT7 // 802.11 link related: join/start BSS, leave BSS.
26838 +#define COMP_SWBW BIT8 // For bandwidth switch.
26839 +#define COMP_SEC BIT9// For Security.
26840 +
26841 +
26842 +#define COMP_TURBO BIT10 // For Turbo Mode related. By Annie, 2005-10-21.
26843 +#define COMP_QOS BIT11 // For QoS.
26844 +
26845 +#define COMP_RATE BIT12 // For Rate Adaptive mechanism, 2006.07.02, by rcnjko. #define COMP_EVENTS 0x00000080 // Event handling
26846 +#define COMP_RXDESC BIT13 // Show Rx desc information for SD3 debug. Added by Annie, 2006-07-15.
26847 +#define COMP_PHY BIT14
26848 +#define COMP_DIG BIT15 // For DIG, 2006.09.25, by rcnjko.
26849 +#define COMP_TXAGC BIT16 // For Tx power, 060928, by rcnjko.
26850 +#define COMP_HALDM BIT17 // For HW Dynamic Mechanism, 061010, by rcnjko.
26851 +#define COMP_POWER_TRACKING BIT18 //FOR 8190 TX POWER TRACKING
26852 +#define COMP_EVENTS BIT19 // Event handling
26853 +
26854 +#define COMP_RF BIT20 // For RF.
26855 +//1!!!!!!!!!!!!!!!!!!!!!!!!!!!
26856 +//1//1Attention Please!!!<11n or 8190 specific code should be put below this line>
26857 +//1!!!!!!!!!!!!!!!!!!!!!!!!!!!
26858 +
26859 +#define COMP_FIRMWARE BIT21 //for firmware downloading
26860 +#define COMP_HT BIT22 // For 802.11n HT related information. by Emily 2006-8-11
26861 +
26862 +#define COMP_RESET BIT23
26863 +#define COMP_CMDPKT BIT24
26864 +#define COMP_SCAN BIT25
26865 +#define COMP_IPS BIT26
26866 +#define COMP_DOWN BIT27 // for rm driver module
26867 +#define COMP_INTR BIT28 // for interrupt
26868 +#define COMP_ERR BIT31 // for error out, always on
26869 +#endif
26870 +
26871 +#define RTL819x_DEBUG
26872 +#ifdef RTL819x_DEBUG
26873 +#define assert(expr) \
26874 + if (!(expr)) { \
26875 + printk( "Assertion failed! %s,%s,%s,line=%d\n", \
26876 + #expr,__FILE__,__FUNCTION__,__LINE__); \
26877 + }
26878 +//wb added to debug out data buf
26879 +//if you want print DATA buffer related BA, please set ieee80211_debug_level to DATA|BA
26880 +#define RT_DEBUG_DATA(level, data, datalen) \
26881 + do{ if ((rt_global_debug_component & (level)) == (level)) \
26882 + { \
26883 + int i; \
26884 + u8* pdata = (u8*) data; \
26885 + printk(KERN_DEBUG RTL819xE_MODULE_NAME ": %s()\n", __FUNCTION__); \
26886 + for(i=0; i<(int)(datalen); i++) \
26887 + { \
26888 + printk("%2x ", pdata[i]); \
26889 + if ((i+1)%16 == 0) printk("\n"); \
26890 + } \
26891 + printk("\n"); \
26892 + } \
26893 + } while (0)
26894 +#else
26895 +#define assert(expr) do {} while (0)
26896 +#define RT_DEBUG_DATA(level, data, datalen) do {} while(0)
26897 +#endif /* RTL8169_DEBUG */
26898 +
26899 +
26900 +//
26901 +// Queue Select Value in TxDesc
26902 +//
26903 +#define QSLT_BK 0x1
26904 +#define QSLT_BE 0x0
26905 +#define QSLT_VI 0x4
26906 +#define QSLT_VO 0x6
26907 +#define QSLT_BEACON 0x10
26908 +#define QSLT_HIGH 0x11
26909 +#define QSLT_MGNT 0x12
26910 +#define QSLT_CMD 0x13
26911 +
26912 +#define DESC90_RATE1M 0x00
26913 +#define DESC90_RATE2M 0x01
26914 +#define DESC90_RATE5_5M 0x02
26915 +#define DESC90_RATE11M 0x03
26916 +#define DESC90_RATE6M 0x04
26917 +#define DESC90_RATE9M 0x05
26918 +#define DESC90_RATE12M 0x06
26919 +#define DESC90_RATE18M 0x07
26920 +#define DESC90_RATE24M 0x08
26921 +#define DESC90_RATE36M 0x09
26922 +#define DESC90_RATE48M 0x0a
26923 +#define DESC90_RATE54M 0x0b
26924 +#define DESC90_RATEMCS0 0x00
26925 +#define DESC90_RATEMCS1 0x01
26926 +#define DESC90_RATEMCS2 0x02
26927 +#define DESC90_RATEMCS3 0x03
26928 +#define DESC90_RATEMCS4 0x04
26929 +#define DESC90_RATEMCS5 0x05
26930 +#define DESC90_RATEMCS6 0x06
26931 +#define DESC90_RATEMCS7 0x07
26932 +#define DESC90_RATEMCS8 0x08
26933 +#define DESC90_RATEMCS9 0x09
26934 +#define DESC90_RATEMCS10 0x0a
26935 +#define DESC90_RATEMCS11 0x0b
26936 +#define DESC90_RATEMCS12 0x0c
26937 +#define DESC90_RATEMCS13 0x0d
26938 +#define DESC90_RATEMCS14 0x0e
26939 +#define DESC90_RATEMCS15 0x0f
26940 +#define DESC90_RATEMCS32 0x20
26941 +
26942 +#define RTL819X_DEFAULT_RF_TYPE RF_1T2R
26943 +#define EEPROM_Default_LegacyHTTxPowerDiff 0x4
26944 +#define IEEE80211_WATCH_DOG_TIME 2000
26945 +
26946 +/* For rtl819x */
26947 +typedef struct _tx_desc_819x_pci {
26948 + //DWORD 0
26949 + u16 PktSize;
26950 + u8 Offset;
26951 + u8 Reserved1:3;
26952 + u8 CmdInit:1;
26953 + u8 LastSeg:1;
26954 + u8 FirstSeg:1;
26955 + u8 LINIP:1;
26956 + u8 OWN:1;
26957 +
26958 + //DWORD 1
26959 + u8 TxFWInfoSize;
26960 + u8 RATid:3;
26961 + u8 DISFB:1;
26962 + u8 USERATE:1;
26963 + u8 MOREFRAG:1;
26964 + u8 NoEnc:1;
26965 + u8 PIFS:1;
26966 + u8 QueueSelect:5;
26967 + u8 NoACM:1;
26968 + u8 Resv:2;
26969 + u8 SecCAMID:5;
26970 + u8 SecDescAssign:1;
26971 + u8 SecType:2;
26972 +
26973 + //DWORD 2
26974 + u16 TxBufferSize;
26975 + u8 PktId:7;
26976 + u8 Resv1:1;
26977 + u8 Reserved2;
26978 +
26979 + //DWORD 3
26980 + u32 TxBuffAddr;
26981 +
26982 + //DWORD 4
26983 + u32 NextDescAddress;
26984 +
26985 + //DWORD 5,6,7
26986 + u32 Reserved5;
26987 + u32 Reserved6;
26988 + u32 Reserved7;
26989 +}tx_desc_819x_pci, *ptx_desc_819x_pci;
26990 +
26991 +
26992 +typedef struct _tx_desc_cmd_819x_pci {
26993 + //DWORD 0
26994 + u16 PktSize;
26995 + u8 Reserved1;
26996 + u8 CmdType:3;
26997 + u8 CmdInit:1;
26998 + u8 LastSeg:1;
26999 + u8 FirstSeg:1;
27000 + u8 LINIP:1;
27001 + u8 OWN:1;
27002 +
27003 + //DOWRD 1
27004 + u16 ElementReport;
27005 + u16 Reserved2;
27006 +
27007 + //DOWRD 2
27008 + u16 TxBufferSize;
27009 + u16 Reserved3;
27010 +
27011 + //DWORD 3,4,5
27012 + u32 TxBufferAddr;
27013 + u32 NextDescAddress;
27014 + u32 Reserved4;
27015 + u32 Reserved5;
27016 + u32 Reserved6;
27017 +}tx_desc_cmd_819x_pci, *ptx_desc_cmd_819x_pci;
27018 +
27019 +
27020 +typedef struct _tx_fwinfo_819x_pci {
27021 + //DOWRD 0
27022 + u8 TxRate:7;
27023 + u8 CtsEnable:1;
27024 + u8 RtsRate:7;
27025 + u8 RtsEnable:1;
27026 + u8 TxHT:1;
27027 + u8 Short:1; //Short PLCP for CCK, or short GI for 11n MCS
27028 + u8 TxBandwidth:1; // This is used for HT MCS rate only.
27029 + u8 TxSubCarrier:2; // This is used for legacy OFDM rate only.
27030 + u8 STBC:2;
27031 + u8 AllowAggregation:1;
27032 + u8 RtsHT:1; //Interpre RtsRate field as high throughput data rate
27033 + u8 RtsShort:1; //Short PLCP for CCK, or short GI for 11n MCS
27034 + u8 RtsBandwidth:1; // This is used for HT MCS rate only.
27035 + u8 RtsSubcarrier:2; // This is used for legacy OFDM rate only.
27036 + u8 RtsSTBC:2;
27037 + u8 EnableCPUDur:1; //Enable firmware to recalculate and assign packet duration
27038 +
27039 + //DWORD 1
27040 + u8 RxMF:2;
27041 + u8 RxAMD:3;
27042 + u8 Reserved1:3;
27043 + u8 Reserved2;
27044 + u8 Reserved3;
27045 + u8 Reserved4;
27046 +
27047 + //u32 Reserved;
27048 +}tx_fwinfo_819x_pci, *ptx_fwinfo_819x_pci;
27049 +
27050 +typedef struct rtl8192_rx_info {
27051 + struct urb *urb;
27052 + struct net_device *dev;
27053 + u8 out_pipe;
27054 +}rtl8192_rx_info ;
27055 +typedef struct _rx_desc_819x_pci{
27056 + //DOWRD 0
27057 + u16 Length:14;
27058 + u16 CRC32:1;
27059 + u16 ICV:1;
27060 + u8 RxDrvInfoSize;
27061 + u8 Shift:2;
27062 + u8 PHYStatus:1;
27063 + u8 SWDec:1;
27064 + u8 LastSeg:1;
27065 + u8 FirstSeg:1;
27066 + u8 EOR:1;
27067 + u8 OWN:1;
27068 +
27069 + //DWORD 1
27070 + u32 Reserved2;
27071 +
27072 + //DWORD 2
27073 + u32 Reserved3;
27074 +
27075 + //DWORD 3
27076 + u32 BufferAddress;
27077 +
27078 +}rx_desc_819x_pci, *prx_desc_819x_pci;
27079 +
27080 +typedef struct _rx_fwinfo_819x_pci{
27081 + //DWORD 0
27082 + u16 Reserved1:12;
27083 + u16 PartAggr:1;
27084 + u16 FirstAGGR:1;
27085 + u16 Reserved2:2;
27086 +
27087 + u8 RxRate:7;
27088 + u8 RxHT:1;
27089 +
27090 + u8 BW:1;
27091 + u8 SPLCP:1;
27092 + u8 Reserved3:2;
27093 + u8 PAM:1;
27094 + u8 Mcast:1;
27095 + u8 Bcast:1;
27096 + u8 Reserved4:1;
27097 +
27098 + //DWORD 1
27099 + u32 TSFL;
27100 +
27101 +}rx_fwinfo_819x_pci, *prx_fwinfo_819x_pci;
27102 +
27103 +#define MAX_DEV_ADDR_SIZE 8 /* support till 64 bit bus width OS */
27104 +#define MAX_FIRMWARE_INFORMATION_SIZE 32 /*2006/04/30 by Emily forRTL8190*/
27105 +#define MAX_802_11_HEADER_LENGTH (40 + MAX_FIRMWARE_INFORMATION_SIZE)
27106 +#define ENCRYPTION_MAX_OVERHEAD 128
27107 +//#define USB_HWDESC_HEADER_LEN sizeof(tx_desc_819x_usb)
27108 +//#define TX_PACKET_SHIFT_BYTES (USB_HWDESC_HEADER_LEN + sizeof(tx_fwinfo_819x_usb))
27109 +#define MAX_FRAGMENT_COUNT 8
27110 +#define MAX_TRANSMIT_BUFFER_SIZE (1600+(MAX_802_11_HEADER_LENGTH+ENCRYPTION_MAX_OVERHEAD)*MAX_FRAGMENT_COUNT)
27111 +
27112 +#define scrclng 4 // octets for crc32 (FCS, ICV)
27113 +/* 8190 Loopback Mode definition */
27114 +typedef enum _rtl819x_loopback{
27115 + RTL819X_NO_LOOPBACK = 0,
27116 + RTL819X_MAC_LOOPBACK = 1,
27117 + RTL819X_DMA_LOOPBACK = 2,
27118 + RTL819X_CCK_LOOPBACK = 3,
27119 +}rtl819x_loopback_e;
27120 +
27121 +/* due to rtl8192 firmware */
27122 +typedef enum _desc_packet_type_e{
27123 + DESC_PACKET_TYPE_INIT = 0,
27124 + DESC_PACKET_TYPE_NORMAL = 1,
27125 +}desc_packet_type_e;
27126 +
27127 +typedef enum _firmware_source{
27128 + FW_SOURCE_IMG_FILE = 0,
27129 + FW_SOURCE_HEADER_FILE = 1, //from header file
27130 +}firmware_source_e, *pfirmware_source_e;
27131 +
27132 +typedef enum _firmware_status{
27133 + FW_STATUS_0_INIT = 0,
27134 + FW_STATUS_1_MOVE_BOOT_CODE = 1,
27135 + FW_STATUS_2_MOVE_MAIN_CODE = 2,
27136 + FW_STATUS_3_TURNON_CPU = 3,
27137 + FW_STATUS_4_MOVE_DATA_CODE = 4,
27138 + FW_STATUS_5_READY = 5,
27139 +}firmware_status_e;
27140 +
27141 +typedef struct _rt_firmare_seg_container {
27142 + u16 seg_size;
27143 + u8 *seg_ptr;
27144 +}fw_seg_container, *pfw_seg_container;
27145 +
27146 +typedef struct _rt_firmware{
27147 + firmware_status_e firmware_status;
27148 + u16 cmdpacket_frag_thresold;
27149 +#define RTL8190_MAX_FIRMWARE_CODE_SIZE 64000 //64k
27150 +#define MAX_FW_INIT_STEP 3
27151 + u8 firmware_buf[MAX_FW_INIT_STEP][RTL8190_MAX_FIRMWARE_CODE_SIZE];
27152 + u16 firmware_buf_size[MAX_FW_INIT_STEP];
27153 +}rt_firmware, *prt_firmware;
27154 +//+by amy 080507
27155 +#define MAX_RECEIVE_BUFFER_SIZE 9100 // Add this to 9100 bytes to receive A-MSDU from RT-AP
27156 +
27157 +/* Firmware Queue Layout */
27158 +#define NUM_OF_FIRMWARE_QUEUE 10
27159 +#define NUM_OF_PAGES_IN_FW 0x100
27160 +#define NUM_OF_PAGE_IN_FW_QUEUE_BE 0x0aa
27161 +#define NUM_OF_PAGE_IN_FW_QUEUE_BK 0x007
27162 +#define NUM_OF_PAGE_IN_FW_QUEUE_VI 0x024
27163 +#define NUM_OF_PAGE_IN_FW_QUEUE_VO 0x007
27164 +#define NUM_OF_PAGE_IN_FW_QUEUE_HCCA 0
27165 +#define NUM_OF_PAGE_IN_FW_QUEUE_CMD 0x2
27166 +#define NUM_OF_PAGE_IN_FW_QUEUE_MGNT 0x10
27167 +#define NUM_OF_PAGE_IN_FW_QUEUE_HIGH 0
27168 +#define NUM_OF_PAGE_IN_FW_QUEUE_BCN 0x4
27169 +#define NUM_OF_PAGE_IN_FW_QUEUE_PUB 0xd
27170 +#define APPLIED_RESERVED_QUEUE_IN_FW 0x80000000
27171 +#define RSVD_FW_QUEUE_PAGE_BK_SHIFT 0x00
27172 +#define RSVD_FW_QUEUE_PAGE_BE_SHIFT 0x08
27173 +#define RSVD_FW_QUEUE_PAGE_VI_SHIFT 0x10
27174 +#define RSVD_FW_QUEUE_PAGE_VO_SHIFT 0x18
27175 +#define RSVD_FW_QUEUE_PAGE_MGNT_SHIFT 0x10
27176 +#define RSVD_FW_QUEUE_PAGE_CMD_SHIFT 0x08
27177 +#define RSVD_FW_QUEUE_PAGE_BCN_SHIFT 0x00
27178 +#define RSVD_FW_QUEUE_PAGE_PUB_SHIFT 0x08
27179 +
27180 +//8187B Security
27181 +//#define RWCAM 0xA0 // Software read/write CAM config
27182 +//#define WCAMI 0xA4 // Software write CAM input content
27183 +//#define RCAMO 0xA8 // Output value from CAM according to 0xa0 setting
27184 +#define DCAM 0xAC // Debug CAM Interface
27185 +#define AESMSK_FC 0xB2 // AES Mask register for frame control (0xB2~0xB3). Added by Annie, 2006-03-06.
27186 +
27187 +
27188 +#define CAM_CONTENT_COUNT 8
27189 +//#define CFG_DEFAULT_KEY BIT5
27190 +#define CFG_VALID BIT15
27191 +#if 0
27192 +//----------------------------------------------------------------------------
27193 +// 8187B WPA Config Register (offset 0xb0, 1 byte)
27194 +//----------------------------------------------------------------------------
27195 +#define SCR_UseDK 0x01
27196 +#define SCR_TxSecEnable 0x02
27197 +#define SCR_RxSecEnable 0x04
27198 +
27199 +//----------------------------------------------------------------------------
27200 +// 8187B CAM Config Setting (offset 0xb0, 1 byte)
27201 +//----------------------------------------------------------------------------
27202 +#define CAM_VALID 0x8000
27203 +#define CAM_NOTVALID 0x0000
27204 +#define CAM_USEDK 0x0020
27205 +
27206 +
27207 +#define CAM_NONE 0x0
27208 +#define CAM_WEP40 0x01
27209 +#define CAM_TKIP 0x02
27210 +#define CAM_AES 0x04
27211 +#define CAM_WEP104 0x05
27212 +
27213 +//#define CAM_SIZE 16
27214 +#define TOTAL_CAM_ENTRY 16
27215 +#define CAM_ENTRY_LEN_IN_DW 6 // 6, unit: in u4byte. Added by Annie, 2006-05-25.
27216 +#define CAM_ENTRY_LEN_IN_BYTE (CAM_ENTRY_LEN_IN_DW*sizeof(u32)) // 24, unit: in u1byte. Added by Annie, 2006-05-25.
27217 +
27218 +#define CAM_CONFIG_USEDK 1
27219 +#define CAM_CONFIG_NO_USEDK 0
27220 +
27221 +#define CAM_WRITE 0x00010000
27222 +#define CAM_READ 0x00000000
27223 +#define CAM_POLLINIG 0x80000000
27224 +
27225 +//=================================================================
27226 +//=================================================================
27227 +
27228 +#endif
27229 +#define EPROM_93c46 0
27230 +#define EPROM_93c56 1
27231 +
27232 +#define DEFAULT_FRAG_THRESHOLD 2342U
27233 +#define MIN_FRAG_THRESHOLD 256U
27234 +#define DEFAULT_BEACONINTERVAL 0x64U
27235 +#define DEFAULT_BEACON_ESSID "Rtl819xU"
27236 +
27237 +#define DEFAULT_SSID ""
27238 +#define DEFAULT_RETRY_RTS 7
27239 +#define DEFAULT_RETRY_DATA 7
27240 +#define PRISM_HDR_SIZE 64
27241 +
27242 +#define PHY_RSSI_SLID_WIN_MAX 100
27243 +
27244 +
27245 +typedef enum _WIRELESS_MODE {
27246 + WIRELESS_MODE_UNKNOWN = 0x00,
27247 + WIRELESS_MODE_A = 0x01,
27248 + WIRELESS_MODE_B = 0x02,
27249 + WIRELESS_MODE_G = 0x04,
27250 + WIRELESS_MODE_AUTO = 0x08,
27251 + WIRELESS_MODE_N_24G = 0x10,
27252 + WIRELESS_MODE_N_5G = 0x20
27253 +} WIRELESS_MODE;
27254 +
27255 +#define RTL_IOCTL_WPA_SUPPLICANT SIOCIWFIRSTPRIV+30
27256 +
27257 +typedef struct buffer
27258 +{
27259 + struct buffer *next;
27260 + u32 *buf;
27261 + dma_addr_t dma;
27262 +
27263 +} buffer;
27264 +
27265 +typedef struct rtl_reg_debug{
27266 + unsigned int cmd;
27267 + struct {
27268 + unsigned char type;
27269 + unsigned char addr;
27270 + unsigned char page;
27271 + unsigned char length;
27272 + } head;
27273 + unsigned char buf[0xff];
27274 +}rtl_reg_debug;
27275 +
27276 +#if 0
27277 +
27278 +typedef struct tx_pendingbuf
27279 +{
27280 + struct ieee80211_txb *txb;
27281 + short ispending;
27282 + short descfrag;
27283 +} tx_pendigbuf;
27284 +
27285 +#endif
27286 +
27287 +typedef struct _rt_9x_tx_rate_history {
27288 + u32 cck[4];
27289 + u32 ofdm[8];
27290 + // HT_MCS[0][]: BW=0 SG=0
27291 + // HT_MCS[1][]: BW=1 SG=0
27292 + // HT_MCS[2][]: BW=0 SG=1
27293 + // HT_MCS[3][]: BW=1 SG=1
27294 + u32 ht_mcs[4][16];
27295 +}rt_tx_rahis_t, *prt_tx_rahis_t;
27296 +
27297 +typedef struct _RT_SMOOTH_DATA_4RF {
27298 + char elements[4][100];//array to store values
27299 + u32 index; //index to current array to store
27300 + u32 TotalNum; //num of valid elements
27301 + u32 TotalVal[4]; //sum of valid elements
27302 +}RT_SMOOTH_DATA_4RF, *PRT_SMOOTH_DATA_4RF;
27303 +
27304 +typedef enum _tag_TxCmd_Config_Index{
27305 + TXCMD_TXRA_HISTORY_CTRL = 0xFF900000,
27306 + TXCMD_RESET_TX_PKT_BUFF = 0xFF900001,
27307 + TXCMD_RESET_RX_PKT_BUFF = 0xFF900002,
27308 + TXCMD_SET_TX_DURATION = 0xFF900003,
27309 + TXCMD_SET_RX_RSSI = 0xFF900004,
27310 + TXCMD_SET_TX_PWR_TRACKING = 0xFF900005,
27311 + TXCMD_XXXX_CTRL,
27312 +}DCMD_TXCMD_OP;
27313 +
27314 +typedef struct Stats
27315 +{
27316 + unsigned long txrdu;
27317 + unsigned long rxrdu;
27318 + //unsigned long rxnolast;
27319 + //unsigned long rxnodata;
27320 +// unsigned long rxreset;
27321 +// unsigned long rxnopointer;
27322 + unsigned long rxok;
27323 + unsigned long rxframgment;
27324 + unsigned long rxcmdpkt[4]; //08/05/08 amy rx cmd element txfeedback/bcn report/cfg set/query
27325 + unsigned long rxurberr;
27326 + unsigned long rxstaterr;
27327 + unsigned long rxcrcerrmin;//crc error (0-500)
27328 + unsigned long rxcrcerrmid;//crc error (500-1000)
27329 + unsigned long rxcrcerrmax;//crc error (>1000)
27330 + unsigned long received_rate_histogram[4][32]; //0: Total, 1:OK, 2:CRC, 3:ICV, 2007 07 03 cosa
27331 + unsigned long received_preamble_GI[2][32]; //0: Long preamble/GI, 1:Short preamble/GI
27332 + unsigned long rx_AMPDUsize_histogram[5]; // level: (<4K), (4K~8K), (8K~16K), (16K~32K), (32K~64K)
27333 + unsigned long rx_AMPDUnum_histogram[5]; // level: (<5), (5~10), (10~20), (20~40), (>40)
27334 + unsigned long numpacket_matchbssid; // debug use only.
27335 + unsigned long numpacket_toself; // debug use only.
27336 + unsigned long num_process_phyinfo; // debug use only.
27337 + unsigned long numqry_phystatus;
27338 + unsigned long numqry_phystatusCCK;
27339 + unsigned long numqry_phystatusHT;
27340 + unsigned long received_bwtype[5]; //0: 20M, 1: funn40M, 2: upper20M, 3: lower20M, 4: duplicate
27341 + unsigned long txnperr;
27342 + unsigned long txnpdrop;
27343 + unsigned long txresumed;
27344 +// unsigned long rxerr;
27345 + unsigned long rxoverflow;
27346 + unsigned long rxint;
27347 + unsigned long txnpokint;
27348 +// unsigned long txhpokint;
27349 +// unsigned long txhperr;
27350 + unsigned long ints;
27351 + unsigned long shints;
27352 + unsigned long txoverflow;
27353 +// unsigned long rxdmafail;
27354 +// unsigned long txbeacon;
27355 +// unsigned long txbeaconerr;
27356 + unsigned long txlpokint;
27357 + unsigned long txlpdrop;
27358 + unsigned long txlperr;
27359 + unsigned long txbeokint;
27360 + unsigned long txbedrop;
27361 + unsigned long txbeerr;
27362 + unsigned long txbkokint;
27363 + unsigned long txbkdrop;
27364 + unsigned long txbkerr;
27365 + unsigned long txviokint;
27366 + unsigned long txvidrop;
27367 + unsigned long txvierr;
27368 + unsigned long txvookint;
27369 + unsigned long txvodrop;
27370 + unsigned long txvoerr;
27371 + unsigned long txbeaconokint;
27372 + unsigned long txbeacondrop;
27373 + unsigned long txbeaconerr;
27374 + unsigned long txmanageokint;
27375 + unsigned long txmanagedrop;
27376 + unsigned long txmanageerr;
27377 + unsigned long txcmdpktokint;
27378 + unsigned long txdatapkt;
27379 + unsigned long txfeedback;
27380 + unsigned long txfeedbackok;
27381 + unsigned long txoktotal;
27382 + unsigned long txokbytestotal;
27383 + unsigned long txokinperiod;
27384 + unsigned long txmulticast;
27385 + unsigned long txbytesmulticast;
27386 + unsigned long txbroadcast;
27387 + unsigned long txbytesbroadcast;
27388 + unsigned long txunicast;
27389 + unsigned long txbytesunicast;
27390 + unsigned long rxbytesunicast;
27391 + unsigned long txfeedbackfail;
27392 + unsigned long txerrtotal;
27393 + unsigned long txerrbytestotal;
27394 + unsigned long txerrmulticast;
27395 + unsigned long txerrbroadcast;
27396 + unsigned long txerrunicast;
27397 + unsigned long txretrycount;
27398 + unsigned long txfeedbackretry;
27399 + u8 last_packet_rate;
27400 + unsigned long slide_signal_strength[100];
27401 + unsigned long slide_evm[100];
27402 + unsigned long slide_rssi_total; // For recording sliding window's RSSI value
27403 + unsigned long slide_evm_total; // For recording sliding window's EVM value
27404 + long signal_strength; // Transformed, in dbm. Beautified signal strength for UI, not correct.
27405 + long signal_quality;
27406 + long last_signal_strength_inpercent;
27407 + long recv_signal_power; // Correct smoothed ss in Dbm, only used in driver to report real power now.
27408 + u8 rx_rssi_percentage[4];
27409 + u8 rx_evm_percentage[2];
27410 + long rxSNRdB[4];
27411 + rt_tx_rahis_t txrate;
27412 + u32 Slide_Beacon_pwdb[100]; //cosa add for beacon rssi
27413 + u32 Slide_Beacon_Total; //cosa add for beacon rssi
27414 + RT_SMOOTH_DATA_4RF cck_adc_pwdb;
27415 + u32 CurrentShowTxate;
27416 +
27417 +
27418 +} Stats;
27419 +
27420 +
27421 +// Bandwidth Offset
27422 +#define HAL_PRIME_CHNL_OFFSET_DONT_CARE 0
27423 +#define HAL_PRIME_CHNL_OFFSET_LOWER 1
27424 +#define HAL_PRIME_CHNL_OFFSET_UPPER 2
27425 +
27426 +//+by amy 080507
27427 +
27428 +typedef struct ChnlAccessSetting {
27429 + u16 SIFS_Timer;
27430 + u16 DIFS_Timer;
27431 + u16 SlotTimeTimer;
27432 + u16 EIFS_Timer;
27433 + u16 CWminIndex;
27434 + u16 CWmaxIndex;
27435 +}*PCHANNEL_ACCESS_SETTING,CHANNEL_ACCESS_SETTING;
27436 +
27437 +typedef struct _BB_REGISTER_DEFINITION{
27438 + u32 rfintfs; // set software control: // 0x870~0x877[8 bytes]
27439 + u32 rfintfi; // readback data: // 0x8e0~0x8e7[8 bytes]
27440 + u32 rfintfo; // output data: // 0x860~0x86f [16 bytes]
27441 + u32 rfintfe; // output enable: // 0x860~0x86f [16 bytes]
27442 + u32 rf3wireOffset; // LSSI data: // 0x840~0x84f [16 bytes]
27443 + u32 rfLSSI_Select; // BB Band Select: // 0x878~0x87f [8 bytes]
27444 + u32 rfTxGainStage; // Tx gain stage: // 0x80c~0x80f [4 bytes]
27445 + u32 rfHSSIPara1; // wire parameter control1 : // 0x820~0x823,0x828~0x82b, 0x830~0x833, 0x838~0x83b [16 bytes]
27446 + u32 rfHSSIPara2; // wire parameter control2 : // 0x824~0x827,0x82c~0x82f, 0x834~0x837, 0x83c~0x83f [16 bytes]
27447 + u32 rfSwitchControl; //Tx Rx antenna control : // 0x858~0x85f [16 bytes]
27448 + u32 rfAGCControl1; //AGC parameter control1 : // 0xc50~0xc53,0xc58~0xc5b, 0xc60~0xc63, 0xc68~0xc6b [16 bytes]
27449 + u32 rfAGCControl2; //AGC parameter control2 : // 0xc54~0xc57,0xc5c~0xc5f, 0xc64~0xc67, 0xc6c~0xc6f [16 bytes]
27450 + u32 rfRxIQImbalance; //OFDM Rx IQ imbalance matrix : // 0xc14~0xc17,0xc1c~0xc1f, 0xc24~0xc27, 0xc2c~0xc2f [16 bytes]
27451 + u32 rfRxAFE; //Rx IQ DC ofset and Rx digital filter, Rx DC notch filter : // 0xc10~0xc13,0xc18~0xc1b, 0xc20~0xc23, 0xc28~0xc2b [16 bytes]
27452 + u32 rfTxIQImbalance; //OFDM Tx IQ imbalance matrix // 0xc80~0xc83,0xc88~0xc8b, 0xc90~0xc93, 0xc98~0xc9b [16 bytes]
27453 + u32 rfTxAFE; //Tx IQ DC Offset and Tx DFIR type // 0xc84~0xc87,0xc8c~0xc8f, 0xc94~0xc97, 0xc9c~0xc9f [16 bytes]
27454 + u32 rfLSSIReadBack; //LSSI RF readback data // 0x8a0~0x8af [16 bytes]
27455 +}BB_REGISTER_DEFINITION_T, *PBB_REGISTER_DEFINITION_T;
27456 +
27457 +typedef enum _RT_RF_TYPE_819xU{
27458 + RF_TYPE_MIN = 0,
27459 + RF_8225,
27460 + RF_8256,
27461 + RF_8258,
27462 + RF_PSEUDO_11N = 4,
27463 +}RT_RF_TYPE_819xU, *PRT_RF_TYPE_819xU;
27464 +
27465 +
27466 +typedef struct _rate_adaptive
27467 +{
27468 + u8 rate_adaptive_disabled;
27469 + u8 ratr_state;
27470 + u16 reserve;
27471 +
27472 + u32 high_rssi_thresh_for_ra;
27473 + u32 high2low_rssi_thresh_for_ra;
27474 + u8 low2high_rssi_thresh_for_ra40M;
27475 + u32 low_rssi_thresh_for_ra40M;
27476 + u8 low2high_rssi_thresh_for_ra20M;
27477 + u32 low_rssi_thresh_for_ra20M;
27478 + u32 upper_rssi_threshold_ratr;
27479 + u32 middle_rssi_threshold_ratr;
27480 + u32 low_rssi_threshold_ratr;
27481 + u32 low_rssi_threshold_ratr_40M;
27482 + u32 low_rssi_threshold_ratr_20M;
27483 + u8 ping_rssi_enable; //cosa add for test
27484 + u32 ping_rssi_ratr; //cosa add for test
27485 + u32 ping_rssi_thresh_for_ra;//cosa add for test
27486 + u32 last_ratr;
27487 +
27488 +} rate_adaptive, *prate_adaptive;
27489 +#define TxBBGainTableLength 37
27490 +#define CCKTxBBGainTableLength 23
27491 +typedef struct _txbbgain_struct
27492 +{
27493 + long txbb_iq_amplifygain;
27494 + u32 txbbgain_value;
27495 +} txbbgain_struct, *ptxbbgain_struct;
27496 +
27497 +typedef struct _ccktxbbgain_struct
27498 +{
27499 + //The Value is from a22 to a29 one Byte one time is much Safer
27500 + u8 ccktxbb_valuearray[8];
27501 +} ccktxbbgain_struct,*pccktxbbgain_struct;
27502 +
27503 +
27504 +typedef struct _init_gain
27505 +{
27506 + u8 xaagccore1;
27507 + u8 xbagccore1;
27508 + u8 xcagccore1;
27509 + u8 xdagccore1;
27510 + u8 cca;
27511 +
27512 +} init_gain, *pinit_gain;
27513 +
27514 +/* 2007/11/02 MH Define RF mode temporarily for test. */
27515 +typedef enum tag_Rf_Operatetion_State
27516 +{
27517 + RF_STEP_INIT = 0,
27518 + RF_STEP_NORMAL,
27519 + RF_STEP_MAX
27520 +}RF_STEP_E;
27521 +
27522 +typedef enum _RT_STATUS{
27523 + RT_STATUS_SUCCESS,
27524 + RT_STATUS_FAILURE,
27525 + RT_STATUS_PENDING,
27526 + RT_STATUS_RESOURCE
27527 +}RT_STATUS,*PRT_STATUS;
27528 +
27529 +typedef enum _RT_CUSTOMER_ID
27530 +{
27531 + RT_CID_DEFAULT = 0,
27532 + RT_CID_8187_ALPHA0 = 1,
27533 + RT_CID_8187_SERCOMM_PS = 2,
27534 + RT_CID_8187_HW_LED = 3,
27535 + RT_CID_8187_NETGEAR = 4,
27536 + RT_CID_WHQL = 5,
27537 + RT_CID_819x_CAMEO = 6,
27538 + RT_CID_819x_RUNTOP = 7,
27539 + RT_CID_819x_Senao = 8,
27540 + RT_CID_TOSHIBA = 9, // Merge by Jacken, 2008/01/31.
27541 + RT_CID_819x_Netcore = 10,
27542 + RT_CID_Nettronix = 11,
27543 + RT_CID_DLINK = 12,
27544 + RT_CID_PRONET = 13,
27545 + RT_CID_COREGA = 14,
27546 +}RT_CUSTOMER_ID, *PRT_CUSTOMER_ID;
27547 +
27548 +//================================================================================
27549 +// LED customization.
27550 +//================================================================================
27551 +
27552 +typedef enum _LED_STRATEGY_8190{
27553 + SW_LED_MODE0, // SW control 1 LED via GPIO0. It is default option.
27554 + SW_LED_MODE1, // SW control for PCI Express
27555 + SW_LED_MODE2, // SW control for Cameo.
27556 + SW_LED_MODE3, // SW contorl for RunTop.
27557 + SW_LED_MODE4, // SW control for Netcore
27558 + SW_LED_MODE5, //added by vivi, for led new mode, DLINK
27559 + SW_LED_MODE6, //added by vivi, for led new mode, PRONET
27560 + HW_LED, // HW control 2 LEDs, LED0 and LED1 (there are 4 different control modes)
27561 +}LED_STRATEGY_8190, *PLED_STRATEGY_8190;
27562 +
27563 +#define CHANNEL_PLAN_LEN 10
27564 +
27565 +#define sCrcLng 4
27566 +
27567 +typedef struct _TX_FWINFO_STRUCUTRE{
27568 + //DOWRD 0
27569 + u8 TxRate:7;
27570 + u8 CtsEnable:1;
27571 + u8 RtsRate:7;
27572 + u8 RtsEnable:1;
27573 + u8 TxHT:1;
27574 + u8 Short:1;
27575 + u8 TxBandwidth:1;
27576 + u8 TxSubCarrier:2;
27577 + u8 STBC:2;
27578 + u8 AllowAggregation:1;
27579 + u8 RtsHT:1;
27580 + u8 RtsShort:1;
27581 + u8 RtsBandwidth:1;
27582 + u8 RtsSubcarrier:2;
27583 + u8 RtsSTBC:2;
27584 + u8 EnableCPUDur:1;
27585 +
27586 + //DWORD 1
27587 + u32 RxMF:2;
27588 + u32 RxAMD:3;
27589 + u32 Reserved1:3;
27590 + u32 TxAGCOffset:4;
27591 + u32 TxAGCSign:1;
27592 + u32 Tx_INFO_RSVD:6;
27593 + u32 PacketID:13;
27594 +}TX_FWINFO_T;
27595 +
27596 +
27597 +typedef struct _TX_FWINFO_8190PCI{
27598 + //DOWRD 0
27599 + u8 TxRate:7;
27600 + u8 CtsEnable:1;
27601 + u8 RtsRate:7;
27602 + u8 RtsEnable:1;
27603 + u8 TxHT:1;
27604 + u8 Short:1; //Short PLCP for CCK, or short GI for 11n MCS
27605 + u8 TxBandwidth:1; // This is used for HT MCS rate only.
27606 + u8 TxSubCarrier:2; // This is used for legacy OFDM rate only.
27607 + u8 STBC:2;
27608 + u8 AllowAggregation:1;
27609 + u8 RtsHT:1; //Interpre RtsRate field as high throughput data rate
27610 + u8 RtsShort:1; //Short PLCP for CCK, or short GI for 11n MCS
27611 + u8 RtsBandwidth:1; // This is used for HT MCS rate only.
27612 + u8 RtsSubcarrier:2; // This is used for legacy OFDM rate only.
27613 + u8 RtsSTBC:2;
27614 + u8 EnableCPUDur:1; //Enable firmware to recalculate and assign packet duration
27615 +
27616 + //DWORD 1
27617 + u32 RxMF:2;
27618 + u32 RxAMD:3;
27619 + u32 TxPerPktInfoFeedback:1; // 1: indicate that the transimission info of this packet should be gathered by Firmware and retured by Rx Cmd.
27620 + u32 Reserved1:2;
27621 + u32 TxAGCOffset:4; // Only 90 support
27622 + u32 TxAGCSign:1; // Only 90 support
27623 + u32 RAW_TXD:1; // MAC will send data in txpktbuffer without any processing,such as CRC check
27624 + u32 Retry_Limit:4; // CCX Support relative retry limit FW page only support 4 bits now.
27625 + u32 Reserved2:1;
27626 + u32 PacketID:13;
27627 +
27628 + // DW 2
27629 +
27630 +}TX_FWINFO_8190PCI, *PTX_FWINFO_8190PCI;
27631 +
27632 +typedef struct _phy_ofdm_rx_status_report_819xpci
27633 +{
27634 + u8 trsw_gain_X[4];
27635 + u8 pwdb_all;
27636 + u8 cfosho_X[4];
27637 + u8 cfotail_X[4];
27638 + u8 rxevm_X[2];
27639 + u8 rxsnr_X[4];
27640 + u8 pdsnr_X[2];
27641 + u8 csi_current_X[2];
27642 + u8 csi_target_X[2];
27643 + u8 sigevm;
27644 + u8 max_ex_pwr;
27645 + u8 sgi_en;
27646 + u8 rxsc_sgien_exflg;
27647 +}phy_sts_ofdm_819xpci_t;
27648 +
27649 +typedef struct _phy_cck_rx_status_report_819xpci
27650 +{
27651 + /* For CCK rate descriptor. This is a unsigned 8:1 variable. LSB bit presend
27652 + 0.5. And MSB 7 bts presend a signed value. Range from -64~+63.5. */
27653 + u8 adc_pwdb_X[4];
27654 + u8 sq_rpt;
27655 + u8 cck_agc_rpt;
27656 +}phy_sts_cck_819xpci_t;
27657 +
27658 +typedef struct _phy_ofdm_rx_status_rxsc_sgien_exintfflag{
27659 + u8 reserved:4;
27660 + u8 rxsc:2;
27661 + u8 sgi_en:1;
27662 + u8 ex_intf_flag:1;
27663 +}phy_ofdm_rx_status_rxsc_sgien_exintfflag;
27664 +
27665 +typedef enum _RT_OP_MODE{
27666 + RT_OP_MODE_AP,
27667 + RT_OP_MODE_INFRASTRUCTURE,
27668 + RT_OP_MODE_IBSS,
27669 + RT_OP_MODE_NO_LINK,
27670 +}RT_OP_MODE, *PRT_OP_MODE;
27671 +
27672 +
27673 +/* 2007/11/02 MH Define RF mode temporarily for test. */
27674 +typedef enum tag_Rf_OpType
27675 +{
27676 + RF_OP_By_SW_3wire = 0,
27677 + RF_OP_By_FW,
27678 + RF_OP_MAX
27679 +}RF_OpType_E;
27680 +
27681 +typedef enum _RESET_TYPE {
27682 + RESET_TYPE_NORESET = 0x00,
27683 + RESET_TYPE_NORMAL = 0x01,
27684 + RESET_TYPE_SILENT = 0x02
27685 +} RESET_TYPE;
27686 +
27687 +typedef struct _tx_ring{
27688 + u32 * desc;
27689 + u8 nStuckCount;
27690 + struct _tx_ring * next;
27691 +}__attribute__ ((packed)) tx_ring, * ptx_ring;
27692 +
27693 +struct rtl8192_tx_ring {
27694 + tx_desc_819x_pci *desc;
27695 + dma_addr_t dma;
27696 + unsigned int idx;
27697 + unsigned int entries;
27698 + struct sk_buff_head queue;
27699 +};
27700 +
27701 +#define NIC_SEND_HANG_THRESHOLD_NORMAL 4
27702 +#define NIC_SEND_HANG_THRESHOLD_POWERSAVE 8
27703 +#define MAX_TX_QUEUE 9 // BK, BE, VI, VO, HCCA, MANAGEMENT, COMMAND, HIGH, BEACON.
27704 +
27705 +#define MAX_RX_COUNT 64
27706 +#define MAX_TX_QUEUE_COUNT 9
27707 +
27708 +typedef struct r8192_priv
27709 +{
27710 + struct pci_dev *pdev;
27711 + //added for maintain info from eeprom
27712 + short epromtype;
27713 + u16 eeprom_vid;
27714 + u16 eeprom_did;
27715 + u8 eeprom_CustomerID;
27716 + u16 eeprom_ChannelPlan;
27717 + RT_CUSTOMER_ID CustomerID;
27718 + LED_STRATEGY_8190 LedStrategy;
27719 + //bool bDcut;
27720 + u8 IC_Cut;
27721 + int irq;
27722 + short irq_enabled;
27723 + struct ieee80211_device *ieee80211;
27724 + bool being_init_adapter;
27725 + u8 Rf_Mode;
27726 + short card_8192; /* O: rtl8192, 1:rtl8185 V B/C, 2:rtl8185 V D */
27727 + u8 card_8192_version; /* if TCR reports card V B/C this discriminates */
27728 +// short phy_ver; /* meaningful for rtl8225 1:A 2:B 3:C */
27729 + short enable_gpio0;
27730 + enum card_type {PCI,MINIPCI,CARDBUS,USB/*rtl8187*/}card_type;
27731 + short hw_plcp_len;
27732 + short plcp_preamble_mode;
27733 + u8 ScanDelay;
27734 + spinlock_t irq_lock;
27735 + spinlock_t irq_th_lock;
27736 + spinlock_t tx_lock;
27737 + spinlock_t rf_ps_lock;
27738 +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,16))
27739 + struct semaphore mutex;
27740 +#else
27741 + struct mutex mutex;
27742 +#endif
27743 + spinlock_t rf_lock; //used to lock rf write operation added by wb
27744 + spinlock_t ps_lock;
27745 +
27746 + u32 irq_mask;
27747 +// short irq_enabled;
27748 +// struct net_device *dev; //comment this out.
27749 + short chan;
27750 + short sens;
27751 + short max_sens;
27752 + u32 rx_prevlen;
27753 +/*RX stuff*/
27754 + rx_desc_819x_pci *rx_ring;
27755 + dma_addr_t rx_ring_dma;
27756 + unsigned int rx_idx;
27757 + struct sk_buff *rx_buf[MAX_RX_COUNT];
27758 + int rxringcount;
27759 + u16 rxbuffersize;
27760 +
27761 +
27762 + struct sk_buff *rx_skb;
27763 + u32 *rxring;
27764 + u32 *rxringtail;
27765 + dma_addr_t rxringdma;
27766 + struct buffer *rxbuffer;
27767 + struct buffer *rxbufferhead;
27768 + short rx_skb_complete;
27769 +/*TX stuff*/
27770 + struct rtl8192_tx_ring tx_ring[MAX_TX_QUEUE_COUNT];
27771 + int txringcount;
27772 +//{
27773 + int txbuffsize;
27774 + int txfwbuffersize;
27775 + //struct tx_pendingbuf txnp_pending;
27776 + //struct tasklet_struct irq_tx_tasklet;
27777 + struct tasklet_struct irq_rx_tasklet;
27778 + struct tasklet_struct irq_tx_tasklet;
27779 + struct tasklet_struct irq_prepare_beacon_tasklet;
27780 + struct buffer *txmapbufs;
27781 + struct buffer *txbkpbufs;
27782 + struct buffer *txbepbufs;
27783 + struct buffer *txvipbufs;
27784 + struct buffer *txvopbufs;
27785 + struct buffer *txcmdbufs;
27786 + struct buffer *txmapbufstail;
27787 + struct buffer *txbkpbufstail;
27788 + struct buffer *txbepbufstail;
27789 + struct buffer *txvipbufstail;
27790 + struct buffer *txvopbufstail;
27791 + struct buffer *txcmdbufstail;
27792 + /* adhoc/master mode stuff */
27793 + ptx_ring txbeaconringtail;
27794 + dma_addr_t txbeaconringdma;
27795 + ptx_ring txbeaconring;
27796 + int txbeaconcount;
27797 + struct buffer *txbeaconbufs;
27798 + struct buffer *txbeaconbufstail;
27799 + ptx_ring txmapring;
27800 + ptx_ring txbkpring;
27801 + ptx_ring txbepring;
27802 + ptx_ring txvipring;
27803 + ptx_ring txvopring;
27804 + ptx_ring txcmdring;
27805 + ptx_ring txmapringtail;
27806 + ptx_ring txbkpringtail;
27807 + ptx_ring txbepringtail;
27808 + ptx_ring txvipringtail;
27809 + ptx_ring txvopringtail;
27810 + ptx_ring txcmdringtail;
27811 + ptx_ring txmapringhead;
27812 + ptx_ring txbkpringhead;
27813 + ptx_ring txbepringhead;
27814 + ptx_ring txvipringhead;
27815 + ptx_ring txvopringhead;
27816 + ptx_ring txcmdringhead;
27817 + dma_addr_t txmapringdma;
27818 + dma_addr_t txbkpringdma;
27819 + dma_addr_t txbepringdma;
27820 + dma_addr_t txvipringdma;
27821 + dma_addr_t txvopringdma;
27822 + dma_addr_t txcmdringdma;
27823 + // u8 chtxpwr[15]; //channels from 1 to 14, 0 not used
27824 +// u8 chtxpwr_ofdm[15]; //channels from 1 to 14, 0 not used
27825 +// u8 cck_txpwr_base;
27826 +// u8 ofdm_txpwr_base;
27827 +// u8 challow[15]; //channels from 1 to 14, 0 not used
27828 + short up;
27829 + short crcmon; //if 1 allow bad crc frame reception in monitor mode
27830 +// short prism_hdr;
27831 +
27832 +// struct timer_list scan_timer;
27833 + /*short scanpending;
27834 + short stopscan;*/
27835 +// spinlock_t scan_lock;
27836 +// u8 active_probe;
27837 + //u8 active_scan_num;
27838 + struct semaphore wx_sem;
27839 + struct semaphore rf_sem; //used to lock rf write operation added by wb, modified by david
27840 +// short hw_wep;
27841 +
27842 +// short digphy;
27843 +// short antb;
27844 +// short diversity;
27845 +// u8 cs_treshold;
27846 +// short rcr_csense;
27847 + u8 rf_type; //0 means 1T2R, 1 means 2T4R
27848 + RT_RF_TYPE_819xU rf_chip;
27849 +
27850 +// u32 key0[4];
27851 + short (*rf_set_sens)(struct net_device *dev,short sens);
27852 + u8 (*rf_set_chan)(struct net_device *dev,u8 ch);
27853 + void (*rf_close)(struct net_device *dev);
27854 + void (*rf_init)(struct net_device *dev);
27855 + //short rate;
27856 + short promisc;
27857 + /*stats*/
27858 + struct Stats stats;
27859 + struct iw_statistics wstats;
27860 + struct proc_dir_entry *dir_dev;
27861 +
27862 + /*RX stuff*/
27863 +// u32 *rxring;
27864 +// u32 *rxringtail;
27865 +// dma_addr_t rxringdma;
27866 +
27867 +#ifdef THOMAS_BEACON
27868 + u32 *oldaddr;
27869 +#endif
27870 +#ifdef THOMAS_TASKLET
27871 + atomic_t irt_counter;//count for irq_rx_tasklet
27872 +#endif
27873 +#ifdef JACKSON_NEW_RX
27874 + struct sk_buff **pp_rxskb;
27875 + int rx_inx;
27876 +#endif
27877 +
27878 +/* modified by davad for Rx process */
27879 + struct sk_buff_head rx_queue;
27880 + struct sk_buff_head skb_queue;
27881 +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
27882 + struct tq_struct qos_activate;
27883 +#else
27884 + struct work_struct qos_activate;
27885 +#endif
27886 + short tx_urb_index;
27887 + atomic_t tx_pending[0x10];//UART_PRIORITY+1
27888 +
27889 + struct urb *rxurb_task;
27890 +
27891 + //2 Tx Related variables
27892 + u16 ShortRetryLimit;
27893 + u16 LongRetryLimit;
27894 + u32 TransmitConfig;
27895 + u8 RegCWinMin; // For turbo mode CW adaptive. Added by Annie, 2005-10-27.
27896 +
27897 + u32 LastRxDescTSFHigh;
27898 + u32 LastRxDescTSFLow;
27899 +
27900 +
27901 + //2 Rx Related variables
27902 + u16 EarlyRxThreshold;
27903 + u32 ReceiveConfig;
27904 + u8 AcmControl;
27905 +
27906 + u8 RFProgType;
27907 +
27908 + u8 retry_data;
27909 + u8 retry_rts;
27910 + u16 rts;
27911 +
27912 + struct ChnlAccessSetting ChannelAccessSetting;
27913 +
27914 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
27915 + struct work_struct reset_wq;
27916 +#else
27917 + struct tq_struct reset_wq;
27918 +#endif
27919 +
27920 +/**********************************************************/
27921 +//for rtl819xPci
27922 + // Data Rate Config. Added by Annie, 2006-04-13.
27923 + u16 basic_rate;
27924 + u8 short_preamble;
27925 + u8 slot_time;
27926 + u16 SifsTime;
27927 +/* WirelessMode*/
27928 + u8 RegWirelessMode;
27929 +/*Firmware*/
27930 + prt_firmware pFirmware;
27931 + rtl819x_loopback_e LoopbackMode;
27932 + firmware_source_e firmware_source;
27933 + bool AutoloadFailFlag;
27934 + u16 EEPROMTxPowerDiff;
27935 + u16 EEPROMAntPwDiff; // Antenna gain offset from B/C/D to A
27936 + u8 EEPROMThermalMeter;
27937 + u8 EEPROMPwDiff;
27938 + u8 EEPROMCrystalCap;
27939 + u8 EEPROM_Def_Ver;
27940 + u8 EEPROMTxPowerLevelCCK[14];// CCK channel 1~14
27941 + // The following definition is for eeprom 93c56
27942 + u8 EEPROMRfACCKChnl1TxPwLevel[3]; //RF-A CCK Tx Power Level at channel 7
27943 + u8 EEPROMRfAOfdmChnlTxPwLevel[3];//RF-A CCK Tx Power Level at [0],[1],[2] = channel 1,7,13
27944 + u8 EEPROMRfCCCKChnl1TxPwLevel[3]; //RF-C CCK Tx Power Level at channel 7
27945 + u8 EEPROMRfCOfdmChnlTxPwLevel[3];//RF-C CCK Tx Power Level at [0],[1],[2] = channel 1,7,13
27946 + u8 EEPROMTxPowerLevelCCK_V1[3];
27947 + u8 EEPROMTxPowerLevelOFDM24G[14]; // OFDM 2.4G channel 1~14
27948 + u8 EEPROMTxPowerLevelOFDM5G[24]; // OFDM 5G
27949 + u8 EEPROMLegacyHTTxPowerDiff; // Legacy to HT rate power diff
27950 + bool bTXPowerDataReadFromEEPORM;
27951 +/*channel plan*/
27952 + u16 RegChannelPlan; // Channel Plan specifed by user, 15: following setting of EEPROM, 0-14: default channel plan index specified by user.
27953 + u16 ChannelPlan;
27954 +/*PS related*/
27955 + bool RegRfOff;
27956 + // Rf off action for power save
27957 + u8 bHwRfOffAction; //0:No action, 1:By GPIO, 2:By Disable
27958 +/*PHY related*/
27959 + BB_REGISTER_DEFINITION_T PHYRegDef[4]; //Radio A/B/C/D
27960 + // Read/write are allow for following hardware information variables
27961 + u32 MCSTxPowerLevelOriginalOffset[6];
27962 + u32 CCKTxPowerLevelOriginalOffset;
27963 + u8 TxPowerLevelCCK[14]; // CCK channel 1~14
27964 + u8 TxPowerLevelCCK_A[14]; // RF-A, CCK channel 1~14
27965 + u8 TxPowerLevelCCK_C[14];
27966 + u8 TxPowerLevelOFDM24G[14]; // OFDM 2.4G channel 1~14
27967 + u8 TxPowerLevelOFDM5G[14]; // OFDM 5G
27968 + u8 TxPowerLevelOFDM24G_A[14]; // RF-A, OFDM 2.4G channel 1~14
27969 + u8 TxPowerLevelOFDM24G_C[14]; // RF-C, OFDM 2.4G channel 1~14
27970 + u8 LegacyHTTxPowerDiff; // Legacy to HT rate power diff
27971 + u8 TxPowerDiff;
27972 + char RF_C_TxPwDiff; // Antenna gain offset, rf-c to rf-a
27973 + u8 AntennaTxPwDiff[3]; // Antenna gain offset, index 0 for B, 1 for C, and 2 for D
27974 + u8 CrystalCap; // CrystalCap.
27975 + u8 ThermalMeter[2]; // ThermalMeter, index 0 for RFIC0, and 1 for RFIC1
27976 + //05/27/2008 cck power enlarge
27977 + u8 CckPwEnl;
27978 + u16 TSSI_13dBm;
27979 + u32 Pwr_Track;
27980 + u8 CCKPresentAttentuation_20Mdefault;
27981 + u8 CCKPresentAttentuation_40Mdefault;
27982 + char CCKPresentAttentuation_difference;
27983 + char CCKPresentAttentuation;
27984 + // Use to calculate PWBD.
27985 + u8 bCckHighPower;
27986 + long undecorated_smoothed_pwdb;
27987 + long undecorated_smoothed_cck_adc_pwdb[4];
27988 + //for set channel
27989 + u8 SwChnlInProgress;
27990 + u8 SwChnlStage;
27991 + u8 SwChnlStep;
27992 + u8 SetBWModeInProgress;
27993 + HT_CHANNEL_WIDTH CurrentChannelBW;
27994 +
27995 + // 8190 40MHz mode
27996 + //
27997 + u8 nCur40MhzPrimeSC; // Control channel sub-carrier
27998 + // Joseph test for shorten RF configuration time.
27999 + // We save RF reg0 in this variable to reduce RF reading.
28000 + //
28001 + u32 RfReg0Value[4];
28002 + u8 NumTotalRFPath;
28003 + bool brfpath_rxenable[4];
28004 +//+by amy 080507
28005 + struct timer_list watch_dog_timer;
28006 +
28007 +//+by amy 080515 for dynamic mechenism
28008 + //Add by amy Tx Power Control for Near/Far Range 2008/05/15
28009 + bool bdynamic_txpower; //bDynamicTxPower
28010 + bool bDynamicTxHighPower; // Tx high power state
28011 + bool bDynamicTxLowPower; // Tx low power state
28012 + bool bLastDTPFlag_High;
28013 + bool bLastDTPFlag_Low;
28014 +
28015 + bool bstore_last_dtpflag;
28016 + bool bstart_txctrl_bydtp; //Define to discriminate on High power State or on sitesuvey to change Tx gain index
28017 + //Add by amy for Rate Adaptive
28018 + rate_adaptive rate_adaptive;
28019 + //Add by amy for TX power tracking
28020 + //2008/05/15 Mars OPEN/CLOSE TX POWER TRACKING
28021 + txbbgain_struct txbbgain_table[TxBBGainTableLength];
28022 + u8 txpower_count;//For 6 sec do tracking again
28023 + bool btxpower_trackingInit;
28024 + u8 OFDM_index;
28025 + u8 CCK_index;
28026 + u8 Record_CCK_20Mindex;
28027 + u8 Record_CCK_40Mindex;
28028 + //2007/09/10 Mars Add CCK TX Power Tracking
28029 + ccktxbbgain_struct cck_txbbgain_table[CCKTxBBGainTableLength];
28030 + ccktxbbgain_struct cck_txbbgain_ch14_table[CCKTxBBGainTableLength];
28031 + u8 rfa_txpowertrackingindex;
28032 + u8 rfa_txpowertrackingindex_real;
28033 + u8 rfa_txpowertracking_default;
28034 + u8 rfc_txpowertrackingindex;
28035 + u8 rfc_txpowertrackingindex_real;
28036 + u8 rfc_txpowertracking_default;
28037 + bool btxpower_tracking;
28038 + bool bcck_in_ch14;
28039 +
28040 + //For Backup Initial Gain
28041 + init_gain initgain_backup;
28042 + u8 DefaultInitialGain[4];
28043 + // For EDCA Turbo mode, Added by amy 080515.
28044 + bool bis_any_nonbepkts;
28045 + bool bcurrent_turbo_EDCA;
28046 +
28047 + bool bis_cur_rdlstate;
28048 + struct timer_list fsync_timer;
28049 + bool bfsync_processing; // 500ms Fsync timer is active or not
28050 + u32 rate_record;
28051 + u32 rateCountDiffRecord;
28052 + u32 ContiuneDiffCount;
28053 + bool bswitch_fsync;
28054 +
28055 + u8 framesync;
28056 + u32 framesyncC34;
28057 + u8 framesyncMonitor;
28058 + //Added by amy 080516 for RX related
28059 + u16 nrxAMPDU_size;
28060 + u8 nrxAMPDU_aggr_num;
28061 +
28062 + /*Last RxDesc TSF value*/
28063 + u32 last_rxdesc_tsf_high;
28064 + u32 last_rxdesc_tsf_low;
28065 +
28066 + //by amy for gpio
28067 + bool bHwRadioOff;
28068 + //by amy for ps
28069 + bool RFChangeInProgress; // RF Chnage in progress, by Bruce, 2007-10-30
28070 + bool SetRFPowerStateInProgress;
28071 + RT_OP_MODE OpMode;
28072 + //by amy for reset_count
28073 + u32 reset_count;
28074 + bool bpbc_pressed;
28075 + //by amy for debug
28076 + u32 txpower_checkcnt;
28077 + u32 txpower_tracking_callback_cnt;
28078 + u8 thermal_read_val[40];
28079 + u8 thermal_readback_index;
28080 + u32 ccktxpower_adjustcnt_not_ch14;
28081 + u32 ccktxpower_adjustcnt_ch14;
28082 + u8 tx_fwinfo_force_subcarriermode;
28083 + u8 tx_fwinfo_force_subcarrierval;
28084 +
28085 + //by amy for silent reset
28086 + RESET_TYPE ResetProgress;
28087 + bool bForcedSilentReset;
28088 + bool bDisableNormalResetCheck;
28089 + u16 TxCounter;
28090 + u16 RxCounter;
28091 + int IrpPendingCount;
28092 + bool bResetInProgress;
28093 + bool force_reset;
28094 + u8 InitialGainOperateType;
28095 +
28096 + //define work item by amy 080526
28097 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
28098 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
28099 + struct delayed_work update_beacon_wq;
28100 + struct delayed_work watch_dog_wq;
28101 + struct delayed_work txpower_tracking_wq;
28102 + struct delayed_work rfpath_check_wq;
28103 + struct delayed_work gpio_change_rf_wq;
28104 + struct delayed_work initialgain_operate_wq;
28105 +#else
28106 + struct work_struct update_beacon_wq;
28107 + struct work_struct watch_dog_wq;
28108 + struct work_struct txpower_tracking_wq;
28109 + struct work_struct rfpath_check_wq;
28110 + struct work_struct gpio_change_rf_wq;
28111 + struct work_struct initialgain_operate_wq;
28112 +#endif
28113 + struct workqueue_struct *priv_wq;
28114 +#else
28115 + struct tq_struct update_beacon_wq;
28116 + /* used for periodly scan */
28117 + struct tq_struct txpower_tracking_wq;
28118 + struct tq_struct rfpath_check_wq;
28119 + struct tq_struct watch_dog_wq;
28120 + struct tq_struct gpio_change_rf_wq;
28121 + struct tq_struct initialgain_operate_wq;
28122 +#endif
28123 +}r8192_priv;
28124 +
28125 +// for rtl8187
28126 +// now mirging to rtl8187B
28127 +/*
28128 +typedef enum{
28129 + LOW_PRIORITY = 0x02,
28130 + NORM_PRIORITY
28131 + } priority_t;
28132 +*/
28133 +//for rtl8187B
28134 +#if 0
28135 +typedef enum{
28136 + BULK_PRIORITY = 0x01,
28137 + //RSVD0,
28138 + //RSVD1,
28139 + LOW_PRIORITY,
28140 + NORM_PRIORITY,
28141 + VO_PRIORITY,
28142 + VI_PRIORITY, //0x05
28143 + BE_PRIORITY,
28144 + BK_PRIORITY,
28145 + CMD_PRIORITY,//0x8
28146 + RSVD3,
28147 + BEACON_PRIORITY, //0x0A
28148 + HIGH_PRIORITY,
28149 + MANAGE_PRIORITY,
28150 + RSVD4,
28151 + RSVD5,
28152 + UART_PRIORITY //0x0F
28153 +} priority_t;
28154 +#endif
28155 +typedef enum{
28156 + NIC_8192E = 1,
28157 + } nic_t;
28158 +
28159 +
28160 +#if 0 //defined in Qos.h
28161 +//typedef u32 AC_CODING;
28162 +#define AC0_BE 0 // ACI: 0x00 // Best Effort
28163 +#define AC1_BK 1 // ACI: 0x01 // Background
28164 +#define AC2_VI 2 // ACI: 0x10 // Video
28165 +#define AC3_VO 3 // ACI: 0x11 // Voice
28166 +#define AC_MAX 4 // Max: define total number; Should not to be used as a real enum.
28167 +
28168 +//
28169 +// ECWmin/ECWmax field.
28170 +// Ref: WMM spec 2.2.2: WME Parameter Element, p.13.
28171 +//
28172 +typedef union _ECW{
28173 + u8 charData;
28174 + struct
28175 + {
28176 + u8 ECWmin:4;
28177 + u8 ECWmax:4;
28178 + }f; // Field
28179 +}ECW, *PECW;
28180 +
28181 +//
28182 +// ACI/AIFSN Field.
28183 +// Ref: WMM spec 2.2.2: WME Parameter Element, p.12.
28184 +//
28185 +typedef union _ACI_AIFSN{
28186 + u8 charData;
28187 +
28188 + struct
28189 + {
28190 + u8 AIFSN:4;
28191 + u8 ACM:1;
28192 + u8 ACI:2;
28193 + u8 Reserved:1;
28194 + }f; // Field
28195 +}ACI_AIFSN, *PACI_AIFSN;
28196 +
28197 +//
28198 +// AC Parameters Record Format.
28199 +// Ref: WMM spec 2.2.2: WME Parameter Element, p.12.
28200 +//
28201 +typedef union _AC_PARAM{
28202 + u32 longData;
28203 + u8 charData[4];
28204 +
28205 + struct
28206 + {
28207 + ACI_AIFSN AciAifsn;
28208 + ECW Ecw;
28209 + u16 TXOPLimit;
28210 + }f; // Field
28211 +}AC_PARAM, *PAC_PARAM;
28212 +
28213 +#endif
28214 +bool init_firmware(struct net_device *dev);
28215 +void rtl819xE_tx_cmd(struct net_device *dev, struct sk_buff *skb);
28216 +short rtl8192_tx(struct net_device *dev, struct sk_buff* skb);
28217 +u32 read_cam(struct net_device *dev, u8 addr);
28218 +void write_cam(struct net_device *dev, u8 addr, u32 data);
28219 +u8 read_nic_byte(struct net_device *dev, int x);
28220 +u8 read_nic_byte_E(struct net_device *dev, int x);
28221 +u32 read_nic_dword(struct net_device *dev, int x);
28222 +u16 read_nic_word(struct net_device *dev, int x) ;
28223 +void write_nic_byte(struct net_device *dev, int x,u8 y);
28224 +void write_nic_byte_E(struct net_device *dev, int x,u8 y);
28225 +void write_nic_word(struct net_device *dev, int x,u16 y);
28226 +void write_nic_dword(struct net_device *dev, int x,u32 y);
28227 +void force_pci_posting(struct net_device *dev);
28228 +
28229 +void rtl8192_rtx_disable(struct net_device *);
28230 +void rtl8192_rx_enable(struct net_device *);
28231 +void rtl8192_tx_enable(struct net_device *);
28232 +
28233 +void rtl8192_disassociate(struct net_device *dev);
28234 +//void fix_rx_fifo(struct net_device *dev);
28235 +void rtl8185_set_rf_pins_enable(struct net_device *dev,u32 a);
28236 +
28237 +void rtl8192_set_anaparam(struct net_device *dev,u32 a);
28238 +void rtl8185_set_anaparam2(struct net_device *dev,u32 a);
28239 +void rtl8192_update_msr(struct net_device *dev);
28240 +int rtl8192_down(struct net_device *dev);
28241 +int rtl8192_up(struct net_device *dev);
28242 +void rtl8192_commit(struct net_device *dev);
28243 +void rtl8192_set_chan(struct net_device *dev,short ch);
28244 +void write_phy(struct net_device *dev, u8 adr, u8 data);
28245 +void write_phy_cck(struct net_device *dev, u8 adr, u32 data);
28246 +void write_phy_ofdm(struct net_device *dev, u8 adr, u32 data);
28247 +void rtl8185_tx_antenna(struct net_device *dev, u8 ant);
28248 +void rtl8187_set_rxconf(struct net_device *dev);
28249 +//short check_nic_enough_desc(struct net_device *dev, priority_t priority);
28250 +void rtl8192_start_beacon(struct net_device *dev);
28251 +void CamResetAllEntry(struct net_device* dev);
28252 +void EnableHWSecurityConfig8192(struct net_device *dev);
28253 +void setKey(struct net_device *dev, u8 EntryNo, u8 KeyIndex, u16 KeyType, u8 *MacAddr, u8 DefaultKey, u32 *KeyContent );
28254 +void CamPrintDbgReg(struct net_device* dev);
28255 +extern void dm_cck_txpower_adjust(struct net_device *dev,bool binch14);
28256 +extern void firmware_init_param(struct net_device *dev);
28257 +extern RT_STATUS cmpk_message_handle_tx(struct net_device *dev, u8* codevirtualaddress, u32 packettype, u32 buffer_len);
28258 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
28259 +void rtl8192_hw_wakeup_wq (struct work_struct *work);
28260 +#else
28261 +void rtl8192_hw_wakeup_wq(struct net_device *dev);
28262 +#endif
28263 +
28264 +short rtl8192_is_tx_queue_empty(struct net_device *dev);
28265 +#ifdef ENABLE_IPS
28266 +void IPSEnter(struct net_device *dev);
28267 +void IPSLeave(struct net_device *dev);
28268 +#endif
28269 +#endif
28270 --- /dev/null
28271 +++ b/drivers/staging/rtl8192e/r8192E_core.c
28272 @@ -0,0 +1,6928 @@
28273 +/******************************************************************************
28274 + * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
28275 + * Linux device driver for RTL8190P / RTL8192E
28276 + *
28277 + * Based on the r8180 driver, which is:
28278 + * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
28279 + * This program is free software; you can redistribute it and/or modify it
28280 + * under the terms of version 2 of the GNU General Public License as
28281 + * published by the Free Software Foundation.
28282 + *
28283 + * This program is distributed in the hope that it will be useful, but WITHOUT
28284 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
28285 + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
28286 + * more details.
28287 + *
28288 + * You should have received a copy of the GNU General Public License along with
28289 + * this program; if not, write to the Free Software Foundation, Inc.,
28290 + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
28291 + *
28292 + * The full GNU General Public License is included in this distribution in the
28293 + * file called LICENSE.
28294 + *
28295 + * Contact Information:
28296 + * Jerry chuang <wlanfae@realtek.com>
28297 + */
28298 +
28299 +
28300 +#undef LOOP_TEST
28301 +#undef RX_DONT_PASS_UL
28302 +#undef DEBUG_EPROM
28303 +#undef DEBUG_RX_VERBOSE
28304 +#undef DUMMY_RX
28305 +#undef DEBUG_ZERO_RX
28306 +#undef DEBUG_RX_SKB
28307 +#undef DEBUG_TX_FRAG
28308 +#undef DEBUG_RX_FRAG
28309 +#undef DEBUG_TX_FILLDESC
28310 +#undef DEBUG_TX
28311 +#undef DEBUG_IRQ
28312 +#undef DEBUG_RX
28313 +#undef DEBUG_RXALLOC
28314 +#undef DEBUG_REGISTERS
28315 +#undef DEBUG_RING
28316 +#undef DEBUG_IRQ_TASKLET
28317 +#undef DEBUG_TX_ALLOC
28318 +#undef DEBUG_TX_DESC
28319 +
28320 +//#define CONFIG_RTL8192_IO_MAP
28321 +#include <asm/uaccess.h>
28322 +#include "r8192E_hw.h"
28323 +#include "r8192E.h"
28324 +#include "r8190_rtl8256.h" /* RTL8225 Radio frontend */
28325 +#include "r8180_93cx6.h" /* Card EEPROM */
28326 +#include "r8192E_wx.h"
28327 +#include "r819xE_phy.h" //added by WB 4.30.2008
28328 +#include "r819xE_phyreg.h"
28329 +#include "r819xE_cmdpkt.h"
28330 +#include "r8192E_dm.h"
28331 +//#include "r8192xU_phyreg.h"
28332 +//#include <linux/usb.h>
28333 +// FIXME: check if 2.6.7 is ok
28334 +
28335 +#ifdef CONFIG_PM_RTL
28336 +#include "r8192_pm.h"
28337 +#endif
28338 +
28339 +#ifdef ENABLE_DOT11D
28340 +#include "dot11d.h"
28341 +#endif
28342 +
28343 +//set here to open your trace code. //WB
28344 +u32 rt_global_debug_component = \
28345 + // COMP_INIT |
28346 + // COMP_EPROM |
28347 + // COMP_PHY |
28348 + // COMP_RF |
28349 + COMP_FIRMWARE |
28350 + // COMP_TRACE |
28351 + // COMP_DOWN |
28352 + // COMP_SWBW |
28353 + // COMP_SEC |
28354 +// COMP_QOS |
28355 +// COMP_RATE |
28356 + // COMP_RECV |
28357 + // COMP_SEND |
28358 + // COMP_POWER |
28359 + // COMP_EVENTS |
28360 + // COMP_RESET |
28361 + // COMP_CMDPKT |
28362 + // COMP_POWER_TRACKING |
28363 + // COMP_INTR |
28364 + COMP_ERR ; //always open err flags on
28365 +#ifndef PCI_DEVICE
28366 +#define PCI_DEVICE(vend,dev)\
28367 + .vendor=(vend),.device=(dev),\
28368 + .subvendor=PCI_ANY_ID,.subdevice=PCI_ANY_ID
28369 +#endif
28370 +static struct pci_device_id rtl8192_pci_id_tbl[] __devinitdata = {
28371 +#ifdef RTL8190P
28372 + /* Realtek */
28373 + /* Dlink */
28374 + { PCI_DEVICE(0x10ec, 0x8190) },
28375 + /* Corega */
28376 + { PCI_DEVICE(0x07aa, 0x0045) },
28377 + { PCI_DEVICE(0x07aa, 0x0046) },
28378 +#else
28379 + /* Realtek */
28380 + { PCI_DEVICE(0x10ec, 0x8192) },
28381 +
28382 + /* Corega */
28383 + { PCI_DEVICE(0x07aa, 0x0044) },
28384 + { PCI_DEVICE(0x07aa, 0x0047) },
28385 +#endif
28386 + {}
28387 +};
28388 +
28389 +static char* ifname = "wlan%d";
28390 +#if 0
28391 +static int hwseqnum = 0;
28392 +static int hwwep = 0;
28393 +#endif
28394 +static int hwwep = 1; //default use hw. set 0 to use software security
28395 +static int channels = 0x3fff;
28396 +
28397 +MODULE_LICENSE("GPL");
28398 +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
28399 +MODULE_VERSION("V 1.1");
28400 +#endif
28401 +MODULE_DEVICE_TABLE(pci, rtl8192_pci_id_tbl);
28402 +//MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
28403 +MODULE_DESCRIPTION("Linux driver for Realtek RTL819x WiFi cards");
28404 +
28405 +#if 0
28406 +MODULE_PARM(ifname,"s");
28407 +MODULE_PARM_DESC(devname," Net interface name, wlan%d=default");
28408 +
28409 +MODULE_PARM(hwseqnum,"i");
28410 +MODULE_PARM_DESC(hwseqnum," Try to use hardware 802.11 header sequence numbers. Zero=default");
28411 +
28412 +MODULE_PARM(hwwep,"i");
28413 +MODULE_PARM_DESC(hwwep," Try to use hardware WEP support. Still broken and not available on all cards");
28414 +
28415 +MODULE_PARM(channels,"i");
28416 +MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
28417 +#endif
28418 +
28419 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 9)
28420 +module_param(ifname, charp, S_IRUGO|S_IWUSR );
28421 +//module_param(hwseqnum,int, S_IRUGO|S_IWUSR);
28422 +module_param(hwwep,int, S_IRUGO|S_IWUSR);
28423 +module_param(channels,int, S_IRUGO|S_IWUSR);
28424 +#else
28425 +MODULE_PARM(ifname, "s");
28426 +//MODULE_PARM(hwseqnum,"i");
28427 +MODULE_PARM(hwwep,"i");
28428 +MODULE_PARM(channels,"i");
28429 +#endif
28430 +
28431 +MODULE_PARM_DESC(ifname," Net interface name, wlan%d=default");
28432 +//MODULE_PARM_DESC(hwseqnum," Try to use hardware 802.11 header sequence numbers. Zero=default");
28433 +MODULE_PARM_DESC(hwwep," Try to use hardware WEP support. Still broken and not available on all cards");
28434 +MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
28435 +
28436 +static int __devinit rtl8192_pci_probe(struct pci_dev *pdev,
28437 + const struct pci_device_id *id);
28438 +static void __devexit rtl8192_pci_disconnect(struct pci_dev *pdev);
28439 +
28440 +static struct pci_driver rtl8192_pci_driver = {
28441 + .name = RTL819xE_MODULE_NAME, /* Driver name */
28442 + .id_table = rtl8192_pci_id_tbl, /* PCI_ID table */
28443 + .probe = rtl8192_pci_probe, /* probe fn */
28444 + .remove = __devexit_p(rtl8192_pci_disconnect), /* remove fn */
28445 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2, 5, 0)
28446 +#ifdef CONFIG_PM_RTL
28447 + .suspend = rtl8192E_suspend, /* PM suspend fn */
28448 + .resume = rtl8192E_resume, /* PM resume fn */
28449 +#else
28450 + .suspend = NULL, /* PM suspend fn */
28451 + .resume = NULL, /* PM resume fn */
28452 +#endif
28453 +#endif
28454 +};
28455 +
28456 +#ifdef ENABLE_DOT11D
28457 +
28458 +typedef struct _CHANNEL_LIST
28459 +{
28460 + u8 Channel[32];
28461 + u8 Len;
28462 +}CHANNEL_LIST, *PCHANNEL_LIST;
28463 +
28464 +static CHANNEL_LIST ChannelPlan[] = {
28465 + {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64,149,153,157,161,165},24}, //FCC
28466 + {{1,2,3,4,5,6,7,8,9,10,11},11}, //IC
28467 + {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //ETSI
28468 + {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //Spain. Change to ETSI.
28469 + {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //France. Change to ETSI.
28470 + {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, //MKK //MKK
28471 + {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22},//MKK1
28472 + {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //Israel.
28473 + {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, // For 11a , TELEC
28474 + {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64}, 22}, //MIC
28475 + {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14} //For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626
28476 +};
28477 +
28478 +static void rtl819x_set_channel_map(u8 channel_plan, struct r8192_priv* priv)
28479 +{
28480 + int i, max_chan=-1, min_chan=-1;
28481 + struct ieee80211_device* ieee = priv->ieee80211;
28482 + switch (channel_plan)
28483 + {
28484 + case COUNTRY_CODE_FCC:
28485 + case COUNTRY_CODE_IC:
28486 + case COUNTRY_CODE_ETSI:
28487 + case COUNTRY_CODE_SPAIN:
28488 + case COUNTRY_CODE_FRANCE:
28489 + case COUNTRY_CODE_MKK:
28490 + case COUNTRY_CODE_MKK1:
28491 + case COUNTRY_CODE_ISRAEL:
28492 + case COUNTRY_CODE_TELEC:
28493 + case COUNTRY_CODE_MIC:
28494 + {
28495 + Dot11d_Init(ieee);
28496 + ieee->bGlobalDomain = false;
28497 + //acturally 8225 & 8256 rf chip only support B,G,24N mode
28498 + if ((priv->rf_chip == RF_8225) || (priv->rf_chip == RF_8256))
28499 + {
28500 + min_chan = 1;
28501 + max_chan = 14;
28502 + }
28503 + else
28504 + {
28505 + RT_TRACE(COMP_ERR, "unknown rf chip, can't set channel map in function:%s()\n", __FUNCTION__);
28506 + }
28507 + if (ChannelPlan[channel_plan].Len != 0){
28508 + // Clear old channel map
28509 + memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
28510 + // Set new channel map
28511 + for (i=0;i<ChannelPlan[channel_plan].Len;i++)
28512 + {
28513 + if (ChannelPlan[channel_plan].Channel[i] < min_chan || ChannelPlan[channel_plan].Channel[i] > max_chan)
28514 + break;
28515 + GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
28516 + }
28517 + }
28518 + break;
28519 + }
28520 + case COUNTRY_CODE_GLOBAL_DOMAIN:
28521 + {
28522 + GET_DOT11D_INFO(ieee)->bEnabled = 0; //this flag enabled to follow 11d country IE setting, otherwise, it shall follow global domain setting
28523 + Dot11d_Reset(ieee);
28524 + ieee->bGlobalDomain = true;
28525 + break;
28526 + }
28527 + default:
28528 + break;
28529 + }
28530 +}
28531 +#endif
28532 +
28533 +
28534 +#define eqMacAddr(a,b) ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 )
28535 +/* 2007/07/25 MH Defien temp tx fw info. */
28536 +static TX_FWINFO_T Tmp_TxFwInfo;
28537 +
28538 +
28539 +#define rx_hal_is_cck_rate(_pdrvinfo)\
28540 + (_pdrvinfo->RxRate == DESC90_RATE1M ||\
28541 + _pdrvinfo->RxRate == DESC90_RATE2M ||\
28542 + _pdrvinfo->RxRate == DESC90_RATE5_5M ||\
28543 + _pdrvinfo->RxRate == DESC90_RATE11M) &&\
28544 + !_pdrvinfo->RxHT\
28545 +
28546 +
28547 +void CamResetAllEntry(struct net_device *dev)
28548 +{
28549 + //u8 ucIndex;
28550 + u32 ulcommand = 0;
28551 +
28552 +#if 1
28553 + ulcommand |= BIT31|BIT30;
28554 + write_nic_dword(dev, RWCAM, ulcommand);
28555 +#else
28556 + for(ucIndex=0;ucIndex<TOTAL_CAM_ENTRY;ucIndex++)
28557 + CAM_mark_invalid(dev, ucIndex);
28558 + for(ucIndex=0;ucIndex<TOTAL_CAM_ENTRY;ucIndex++)
28559 + CAM_empty_entry(dev, ucIndex);
28560 +#endif
28561 +}
28562 +
28563 +
28564 +void write_cam(struct net_device *dev, u8 addr, u32 data)
28565 +{
28566 + write_nic_dword(dev, WCAMI, data);
28567 + write_nic_dword(dev, RWCAM, BIT31|BIT16|(addr&0xff) );
28568 +}
28569 +u32 read_cam(struct net_device *dev, u8 addr)
28570 +{
28571 + write_nic_dword(dev, RWCAM, 0x80000000|(addr&0xff) );
28572 + return read_nic_dword(dev, 0xa8);
28573 +}
28574 +
28575 +////////////////////////////////////////////////////////////
28576 +#ifdef CONFIG_RTL8180_IO_MAP
28577 +
28578 +u8 read_nic_byte(struct net_device *dev, int x)
28579 +{
28580 + return 0xff&inb(dev->base_addr +x);
28581 +}
28582 +
28583 +u32 read_nic_dword(struct net_device *dev, int x)
28584 +{
28585 + return inl(dev->base_addr +x);
28586 +}
28587 +
28588 +u16 read_nic_word(struct net_device *dev, int x)
28589 +{
28590 + return inw(dev->base_addr +x);
28591 +}
28592 +
28593 +void write_nic_byte(struct net_device *dev, int x,u8 y)
28594 +{
28595 + outb(y&0xff,dev->base_addr +x);
28596 +}
28597 +
28598 +void write_nic_word(struct net_device *dev, int x,u16 y)
28599 +{
28600 + outw(y,dev->base_addr +x);
28601 +}
28602 +
28603 +void write_nic_dword(struct net_device *dev, int x,u32 y)
28604 +{
28605 + outl(y,dev->base_addr +x);
28606 +}
28607 +
28608 +#else /* RTL_IO_MAP */
28609 +
28610 +u8 read_nic_byte(struct net_device *dev, int x)
28611 +{
28612 + return 0xff&readb((u8*)dev->mem_start +x);
28613 +}
28614 +
28615 +u32 read_nic_dword(struct net_device *dev, int x)
28616 +{
28617 + return readl((u8*)dev->mem_start +x);
28618 +}
28619 +
28620 +u16 read_nic_word(struct net_device *dev, int x)
28621 +{
28622 + return readw((u8*)dev->mem_start +x);
28623 +}
28624 +
28625 +void write_nic_byte(struct net_device *dev, int x,u8 y)
28626 +{
28627 + writeb(y,(u8*)dev->mem_start +x);
28628 + udelay(20);
28629 +}
28630 +
28631 +void write_nic_dword(struct net_device *dev, int x,u32 y)
28632 +{
28633 + writel(y,(u8*)dev->mem_start +x);
28634 + udelay(20);
28635 +}
28636 +
28637 +void write_nic_word(struct net_device *dev, int x,u16 y)
28638 +{
28639 + writew(y,(u8*)dev->mem_start +x);
28640 + udelay(20);
28641 +}
28642 +
28643 +#endif /* RTL_IO_MAP */
28644 +
28645 +
28646 +///////////////////////////////////////////////////////////
28647 +
28648 +//u8 read_phy_cck(struct net_device *dev, u8 adr);
28649 +//u8 read_phy_ofdm(struct net_device *dev, u8 adr);
28650 +/* this might still called in what was the PHY rtl8185/rtl8192 common code
28651 + * plans are to possibilty turn it again in one common code...
28652 + */
28653 +inline void force_pci_posting(struct net_device *dev)
28654 +{
28655 +}
28656 +
28657 +
28658 +//warning message WB
28659 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)
28660 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
28661 +void rtl8192_interrupt(int irq, void *netdev, struct pt_regs *regs);
28662 +#else
28663 +irqreturn_t rtl8192_interrupt(int irq, void *netdev, struct pt_regs *regs);
28664 +#endif
28665 +#else
28666 +irqreturn_t rtl8192_interrupt(int irq, void *netdev);
28667 +#endif
28668 +//static struct net_device_stats *rtl8192_stats(struct net_device *dev);
28669 +void rtl8192_commit(struct net_device *dev);
28670 +//void rtl8192_restart(struct net_device *dev);
28671 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
28672 +void rtl8192_restart(struct work_struct *work);
28673 +//void rtl8192_rq_tx_ack(struct work_struct *work);
28674 +#else
28675 + void rtl8192_restart(struct net_device *dev);
28676 +// //void rtl8192_rq_tx_ack(struct net_device *dev);
28677 + #endif
28678 +
28679 +void watch_dog_timer_callback(unsigned long data);
28680 +#ifdef ENABLE_IPS
28681 +void IPSEnter(struct net_device *dev);
28682 +void IPSLeave(struct net_device *dev);
28683 +void InactivePsWorkItemCallback(struct net_device *dev);
28684 +#endif
28685 +/****************************************************************************
28686 + -----------------------------PROCFS STUFF-------------------------
28687 +*****************************************************************************/
28688 +
28689 +static struct proc_dir_entry *rtl8192_proc = NULL;
28690 +
28691 +
28692 +
28693 +static int proc_get_stats_ap(char *page, char **start,
28694 + off_t offset, int count,
28695 + int *eof, void *data)
28696 +{
28697 + struct net_device *dev = data;
28698 + struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
28699 + struct ieee80211_device *ieee = priv->ieee80211;
28700 + struct ieee80211_network *target;
28701 +
28702 + int len = 0;
28703 +
28704 + list_for_each_entry(target, &ieee->network_list, list) {
28705 +
28706 + len += snprintf(page + len, count - len,
28707 + "%s ", target->ssid);
28708 +
28709 + if(target->wpa_ie_len>0 || target->rsn_ie_len>0){
28710 + len += snprintf(page + len, count - len,
28711 + "WPA\n");
28712 + }
28713 + else{
28714 + len += snprintf(page + len, count - len,
28715 + "non_WPA\n");
28716 + }
28717 +
28718 + }
28719 +
28720 + *eof = 1;
28721 + return len;
28722 +}
28723 +
28724 +static int proc_get_registers(char *page, char **start,
28725 + off_t offset, int count,
28726 + int *eof, void *data)
28727 +{
28728 + struct net_device *dev = data;
28729 +// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
28730 +
28731 + int len = 0;
28732 + int i,n;
28733 +
28734 + int max=0xff;
28735 +
28736 + /* This dump the current register page */
28737 + len += snprintf(page + len, count - len,
28738 + "\n####################page 0##################\n ");
28739 +
28740 + for(n=0;n<=max;)
28741 + {
28742 + //printk( "\nD: %2x> ", n);
28743 + len += snprintf(page + len, count - len,
28744 + "\nD: %2x > ",n);
28745 +
28746 + for(i=0;i<16 && n<=max;i++,n++)
28747 + len += snprintf(page + len, count - len,
28748 + "%2x ",read_nic_byte(dev,n));
28749 +
28750 + // printk("%2x ",read_nic_byte(dev,n));
28751 + }
28752 + len += snprintf(page + len, count - len,"\n");
28753 + len += snprintf(page + len, count - len,
28754 + "\n####################page 1##################\n ");
28755 + for(n=0;n<=max;)
28756 + {
28757 + //printk( "\nD: %2x> ", n);
28758 + len += snprintf(page + len, count - len,
28759 + "\nD: %2x > ",n);
28760 +
28761 + for(i=0;i<16 && n<=max;i++,n++)
28762 + len += snprintf(page + len, count - len,
28763 + "%2x ",read_nic_byte(dev,0x100|n));
28764 +
28765 + // printk("%2x ",read_nic_byte(dev,n));
28766 + }
28767 +
28768 + len += snprintf(page + len, count - len,
28769 + "\n####################page 3##################\n ");
28770 + for(n=0;n<=max;)
28771 + {
28772 + //printk( "\nD: %2x> ", n);
28773 + len += snprintf(page + len, count - len,
28774 + "\nD: %2x > ",n);
28775 +
28776 + for(i=0;i<16 && n<=max;i++,n++)
28777 + len += snprintf(page + len, count - len,
28778 + "%2x ",read_nic_byte(dev,0x300|n));
28779 +
28780 + // printk("%2x ",read_nic_byte(dev,n));
28781 + }
28782 +
28783 +
28784 + *eof = 1;
28785 + return len;
28786 +
28787 +}
28788 +
28789 +
28790 +#if 0
28791 +static int proc_get_cck_reg(char *page, char **start,
28792 + off_t offset, int count,
28793 + int *eof, void *data)
28794 +{
28795 + struct net_device *dev = data;
28796 +// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
28797 +
28798 + int len = 0;
28799 + int i,n;
28800 +
28801 + int max = 0x5F;
28802 +
28803 + /* This dump the current register page */
28804 + for(n=0;n<=max;)
28805 + {
28806 + //printk( "\nD: %2x> ", n);
28807 + len += snprintf(page + len, count - len,
28808 + "\nD: %2x > ",n);
28809 +
28810 + for(i=0;i<16 && n<=max;i++,n++)
28811 + len += snprintf(page + len, count - len,
28812 + "%2x ",read_phy_cck(dev,n));
28813 +
28814 + // printk("%2x ",read_nic_byte(dev,n));
28815 + }
28816 + len += snprintf(page + len, count - len,"\n");
28817 +
28818 +
28819 + *eof = 1;
28820 + return len;
28821 +}
28822 +
28823 +#endif
28824 +
28825 +#if 0
28826 +static int proc_get_ofdm_reg(char *page, char **start,
28827 + off_t offset, int count,
28828 + int *eof, void *data)
28829 +{
28830 +
28831 + struct net_device *dev = data;
28832 +// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
28833 +
28834 + int len = 0;
28835 + int i,n;
28836 +
28837 + //int max=0xff;
28838 + int max = 0x40;
28839 +
28840 + /* This dump the current register page */
28841 + for(n=0;n<=max;)
28842 + {
28843 + //printk( "\nD: %2x> ", n);
28844 + len += snprintf(page + len, count - len,
28845 + "\nD: %2x > ",n);
28846 +
28847 + for(i=0;i<16 && n<=max;i++,n++)
28848 + len += snprintf(page + len, count - len,
28849 + "%2x ",read_phy_ofdm(dev,n));
28850 +
28851 + // printk("%2x ",read_nic_byte(dev,n));
28852 + }
28853 + len += snprintf(page + len, count - len,"\n");
28854 +
28855 +
28856 +
28857 + *eof = 1;
28858 + return len;
28859 +}
28860 +
28861 +#endif
28862 +
28863 +#if 0
28864 +static int proc_get_stats_hw(char *page, char **start,
28865 + off_t offset, int count,
28866 + int *eof, void *data)
28867 +{
28868 + struct net_device *dev = data;
28869 + struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
28870 +
28871 + int len = 0;
28872 +
28873 + len += snprintf(page + len, count - len,
28874 + "NIC int: %lu\n"
28875 + "Total int: %lu\n",
28876 + priv->stats.ints,
28877 + priv->stats.shints);
28878 +
28879 + *eof = 1;
28880 + return len;
28881 +}
28882 +#endif
28883 +
28884 +static int proc_get_stats_tx(char *page, char **start,
28885 + off_t offset, int count,
28886 + int *eof, void *data)
28887 +{
28888 + struct net_device *dev = data;
28889 + struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
28890 +
28891 + int len = 0;
28892 +
28893 + len += snprintf(page + len, count - len,
28894 + "TX VI priority ok int: %lu\n"
28895 +// "TX VI priority error int: %lu\n"
28896 + "TX VO priority ok int: %lu\n"
28897 +// "TX VO priority error int: %lu\n"
28898 + "TX BE priority ok int: %lu\n"
28899 +// "TX BE priority error int: %lu\n"
28900 + "TX BK priority ok int: %lu\n"
28901 +// "TX BK priority error int: %lu\n"
28902 + "TX MANAGE priority ok int: %lu\n"
28903 +// "TX MANAGE priority error int: %lu\n"
28904 + "TX BEACON priority ok int: %lu\n"
28905 + "TX BEACON priority error int: %lu\n"
28906 + "TX CMDPKT priority ok int: %lu\n"
28907 +// "TX high priority ok int: %lu\n"
28908 +// "TX high priority failed error int: %lu\n"
28909 +// "TX queue resume: %lu\n"
28910 + "TX queue stopped?: %d\n"
28911 + "TX fifo overflow: %lu\n"
28912 +// "TX beacon: %lu\n"
28913 +// "TX VI queue: %d\n"
28914 +// "TX VO queue: %d\n"
28915 +// "TX BE queue: %d\n"
28916 +// "TX BK queue: %d\n"
28917 +// "TX HW queue: %d\n"
28918 +// "TX VI dropped: %lu\n"
28919 +// "TX VO dropped: %lu\n"
28920 +// "TX BE dropped: %lu\n"
28921 +// "TX BK dropped: %lu\n"
28922 + "TX total data packets %lu\n"
28923 + "TX total data bytes :%lu\n",
28924 +// "TX beacon aborted: %lu\n",
28925 + priv->stats.txviokint,
28926 +// priv->stats.txvierr,
28927 + priv->stats.txvookint,
28928 +// priv->stats.txvoerr,
28929 + priv->stats.txbeokint,
28930 +// priv->stats.txbeerr,
28931 + priv->stats.txbkokint,
28932 +// priv->stats.txbkerr,
28933 + priv->stats.txmanageokint,
28934 +// priv->stats.txmanageerr,
28935 + priv->stats.txbeaconokint,
28936 + priv->stats.txbeaconerr,
28937 + priv->stats.txcmdpktokint,
28938 +// priv->stats.txhpokint,
28939 +// priv->stats.txhperr,
28940 +// priv->stats.txresumed,
28941 + netif_queue_stopped(dev),
28942 + priv->stats.txoverflow,
28943 +// priv->stats.txbeacon,
28944 +// atomic_read(&(priv->tx_pending[VI_QUEUE])),
28945 +// atomic_read(&(priv->tx_pending[VO_QUEUE])),
28946 +// atomic_read(&(priv->tx_pending[BE_QUEUE])),
28947 +// atomic_read(&(priv->tx_pending[BK_QUEUE])),
28948 +// read_nic_byte(dev, TXFIFOCOUNT),
28949 +// priv->stats.txvidrop,
28950 +// priv->stats.txvodrop,
28951 + priv->ieee80211->stats.tx_packets,
28952 + priv->ieee80211->stats.tx_bytes
28953 +
28954 +
28955 +// priv->stats.txbedrop,
28956 +// priv->stats.txbkdrop
28957 + // priv->stats.txdatapkt
28958 +// priv->stats.txbeaconerr
28959 + );
28960 +
28961 + *eof = 1;
28962 + return len;
28963 +}
28964 +
28965 +
28966 +
28967 +static int proc_get_stats_rx(char *page, char **start,
28968 + off_t offset, int count,
28969 + int *eof, void *data)
28970 +{
28971 + struct net_device *dev = data;
28972 + struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
28973 +
28974 + int len = 0;
28975 +
28976 + len += snprintf(page + len, count - len,
28977 + "RX packets: %lu\n"
28978 + "RX desc err: %lu\n"
28979 + "RX rx overflow error: %lu\n"
28980 + "RX invalid urb error: %lu\n",
28981 + priv->stats.rxint,
28982 + priv->stats.rxrdu,
28983 + priv->stats.rxoverflow,
28984 + priv->stats.rxurberr);
28985 +
28986 + *eof = 1;
28987 + return len;
28988 +}
28989 +
28990 +static void rtl8192_proc_module_init(void)
28991 +{
28992 + RT_TRACE(COMP_INIT, "Initializing proc filesystem");
28993 +#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
28994 + rtl8192_proc=create_proc_entry(RTL819xE_MODULE_NAME, S_IFDIR, proc_net);
28995 +#else
28996 + rtl8192_proc=create_proc_entry(RTL819xE_MODULE_NAME, S_IFDIR, init_net.proc_net);
28997 +#endif
28998 +}
28999 +
29000 +
29001 +static void rtl8192_proc_module_remove(void)
29002 +{
29003 +#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
29004 + remove_proc_entry(RTL819xE_MODULE_NAME, proc_net);
29005 +#else
29006 + remove_proc_entry(RTL819xE_MODULE_NAME, init_net.proc_net);
29007 +#endif
29008 +}
29009 +
29010 +
29011 +static void rtl8192_proc_remove_one(struct net_device *dev)
29012 +{
29013 + struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
29014 +
29015 + printk("dev name=======> %s\n",dev->name);
29016 +
29017 + if (priv->dir_dev) {
29018 + // remove_proc_entry("stats-hw", priv->dir_dev);
29019 + remove_proc_entry("stats-tx", priv->dir_dev);
29020 + remove_proc_entry("stats-rx", priv->dir_dev);
29021 + // remove_proc_entry("stats-ieee", priv->dir_dev);
29022 + remove_proc_entry("stats-ap", priv->dir_dev);
29023 + remove_proc_entry("registers", priv->dir_dev);
29024 + // remove_proc_entry("cck-registers",priv->dir_dev);
29025 + // remove_proc_entry("ofdm-registers",priv->dir_dev);
29026 + //remove_proc_entry(dev->name, rtl8192_proc);
29027 + remove_proc_entry("wlan0", rtl8192_proc);
29028 + priv->dir_dev = NULL;
29029 + }
29030 +}
29031 +
29032 +
29033 +static void rtl8192_proc_init_one(struct net_device *dev)
29034 +{
29035 + struct proc_dir_entry *e;
29036 + struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
29037 + priv->dir_dev = create_proc_entry(dev->name,
29038 + S_IFDIR | S_IRUGO | S_IXUGO,
29039 + rtl8192_proc);
29040 + if (!priv->dir_dev) {
29041 + RT_TRACE(COMP_ERR, "Unable to initialize /proc/net/rtl8192/%s\n",
29042 + dev->name);
29043 + return;
29044 + }
29045 + #if 0
29046 + e = create_proc_read_entry("stats-hw", S_IFREG | S_IRUGO,
29047 + priv->dir_dev, proc_get_stats_hw, dev);
29048 +
29049 + if (!e) {
29050 + DMESGE("Unable to initialize "
29051 + "/proc/net/rtl8192/%s/stats-hw\n",
29052 + dev->name);
29053 + }
29054 + #endif
29055 + e = create_proc_read_entry("stats-rx", S_IFREG | S_IRUGO,
29056 + priv->dir_dev, proc_get_stats_rx, dev);
29057 +
29058 + if (!e) {
29059 + RT_TRACE(COMP_ERR,"Unable to initialize "
29060 + "/proc/net/rtl8192/%s/stats-rx\n",
29061 + dev->name);
29062 + }
29063 +
29064 +
29065 + e = create_proc_read_entry("stats-tx", S_IFREG | S_IRUGO,
29066 + priv->dir_dev, proc_get_stats_tx, dev);
29067 +
29068 + if (!e) {
29069 + RT_TRACE(COMP_ERR, "Unable to initialize "
29070 + "/proc/net/rtl8192/%s/stats-tx\n",
29071 + dev->name);
29072 + }
29073 + #if 0
29074 + e = create_proc_read_entry("stats-ieee", S_IFREG | S_IRUGO,
29075 + priv->dir_dev, proc_get_stats_ieee, dev);
29076 +
29077 + if (!e) {
29078 + DMESGE("Unable to initialize "
29079 + "/proc/net/rtl8192/%s/stats-ieee\n",
29080 + dev->name);
29081 + }
29082 +
29083 + #endif
29084 +
29085 + e = create_proc_read_entry("stats-ap", S_IFREG | S_IRUGO,
29086 + priv->dir_dev, proc_get_stats_ap, dev);
29087 +
29088 + if (!e) {
29089 + RT_TRACE(COMP_ERR, "Unable to initialize "
29090 + "/proc/net/rtl8192/%s/stats-ap\n",
29091 + dev->name);
29092 + }
29093 +
29094 + e = create_proc_read_entry("registers", S_IFREG | S_IRUGO,
29095 + priv->dir_dev, proc_get_registers, dev);
29096 + if (!e) {
29097 + RT_TRACE(COMP_ERR, "Unable to initialize "
29098 + "/proc/net/rtl8192/%s/registers\n",
29099 + dev->name);
29100 + }
29101 +#if 0
29102 + e = create_proc_read_entry("cck-registers", S_IFREG | S_IRUGO,
29103 + priv->dir_dev, proc_get_cck_reg, dev);
29104 + if (!e) {
29105 + RT_TRACE(COMP_ERR, "Unable to initialize "
29106 + "/proc/net/rtl8192/%s/cck-registers\n",
29107 + dev->name);
29108 + }
29109 +
29110 + e = create_proc_read_entry("ofdm-registers", S_IFREG | S_IRUGO,
29111 + priv->dir_dev, proc_get_ofdm_reg, dev);
29112 + if (!e) {
29113 + RT_TRACE(COMP_ERR, "Unable to initialize "
29114 + "/proc/net/rtl8192/%s/ofdm-registers\n",
29115 + dev->name);
29116 + }
29117 +#endif
29118 +}
29119 +/****************************************************************************
29120 + -----------------------------MISC STUFF-------------------------
29121 +*****************************************************************************/
29122 +
29123 +short check_nic_enough_desc(struct net_device *dev, int prio)
29124 +{
29125 + struct r8192_priv *priv = ieee80211_priv(dev);
29126 + struct rtl8192_tx_ring *ring = &priv->tx_ring[prio];
29127 +
29128 + /* for now we reserve two free descriptor as a safety boundary
29129 + * between the tail and the head
29130 + */
29131 + if (ring->entries - skb_queue_len(&ring->queue) >= 2) {
29132 + return 1;
29133 + } else {
29134 + return 0;
29135 + }
29136 +}
29137 +
29138 +static void tx_timeout(struct net_device *dev)
29139 +{
29140 + struct r8192_priv *priv = ieee80211_priv(dev);
29141 + //rtl8192_commit(dev);
29142 +
29143 +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
29144 + schedule_work(&priv->reset_wq);
29145 +#else
29146 + schedule_task(&priv->reset_wq);
29147 +#endif
29148 + printk("TXTIMEOUT");
29149 +}
29150 +
29151 +
29152 +/****************************************************************************
29153 + ------------------------------HW STUFF---------------------------
29154 +*****************************************************************************/
29155 +
29156 +
29157 +static void rtl8192_irq_enable(struct net_device *dev)
29158 +{
29159 + struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
29160 + priv->irq_enabled = 1;
29161 + write_nic_dword(dev,INTA_MASK, priv->irq_mask);
29162 +}
29163 +
29164 +
29165 +static void rtl8192_irq_disable(struct net_device *dev)
29166 +{
29167 + struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
29168 +
29169 + write_nic_dword(dev,INTA_MASK,0);
29170 + force_pci_posting(dev);
29171 + priv->irq_enabled = 0;
29172 +}
29173 +
29174 +
29175 +static void rtl8192_set_mode(struct net_device *dev,int mode)
29176 +{
29177 + u8 ecmd;
29178 + ecmd=read_nic_byte(dev, EPROM_CMD);
29179 + ecmd=ecmd &~ EPROM_CMD_OPERATING_MODE_MASK;
29180 + ecmd=ecmd | (mode<<EPROM_CMD_OPERATING_MODE_SHIFT);
29181 + ecmd=ecmd &~ (1<<EPROM_CS_SHIFT);
29182 + ecmd=ecmd &~ (1<<EPROM_CK_SHIFT);
29183 + write_nic_byte(dev, EPROM_CMD, ecmd);
29184 +}
29185 +
29186 +
29187 +void rtl8192_update_msr(struct net_device *dev)
29188 +{
29189 + struct r8192_priv *priv = ieee80211_priv(dev);
29190 + u8 msr;
29191 +
29192 + msr = read_nic_byte(dev, MSR);
29193 + msr &= ~ MSR_LINK_MASK;
29194 +
29195 + /* do not change in link_state != WLAN_LINK_ASSOCIATED.
29196 + * msr must be updated if the state is ASSOCIATING.
29197 + * this is intentional and make sense for ad-hoc and
29198 + * master (see the create BSS/IBSS func)
29199 + */
29200 + if (priv->ieee80211->state == IEEE80211_LINKED){
29201 +
29202 + if (priv->ieee80211->iw_mode == IW_MODE_INFRA)
29203 + msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT);
29204 + else if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
29205 + msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
29206 + else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
29207 + msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
29208 +
29209 + }else
29210 + msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
29211 +
29212 + write_nic_byte(dev, MSR, msr);
29213 +}
29214 +
29215 +void rtl8192_set_chan(struct net_device *dev,short ch)
29216 +{
29217 + struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
29218 + RT_TRACE(COMP_RF, "=====>%s()====ch:%d\n", __FUNCTION__, ch);
29219 + priv->chan=ch;
29220 +#if 0
29221 + if(priv->ieee80211->iw_mode == IW_MODE_ADHOC ||
29222 + priv->ieee80211->iw_mode == IW_MODE_MASTER){
29223 +
29224 + priv->ieee80211->link_state = WLAN_LINK_ASSOCIATED;
29225 + priv->ieee80211->master_chan = ch;
29226 + rtl8192_update_beacon_ch(dev);
29227 + }
29228 +#endif
29229 +
29230 + /* this hack should avoid frame TX during channel setting*/
29231 +
29232 +
29233 + // tx = read_nic_dword(dev,TX_CONF);
29234 + // tx &= ~TX_LOOPBACK_MASK;
29235 +
29236 +#ifndef LOOP_TEST
29237 + //TODO
29238 + // write_nic_dword(dev,TX_CONF, tx |( TX_LOOPBACK_MAC<<TX_LOOPBACK_SHIFT));
29239 +
29240 + //need to implement rf set channel here WB
29241 +
29242 + if (priv->rf_set_chan)
29243 + priv->rf_set_chan(dev,priv->chan);
29244 + // mdelay(10);
29245 + // write_nic_dword(dev,TX_CONF,tx | (TX_LOOPBACK_NONE<<TX_LOOPBACK_SHIFT));
29246 +#endif
29247 +}
29248 +
29249 +void rtl8192_rx_enable(struct net_device *dev)
29250 +{
29251 + struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
29252 + write_nic_dword(dev, RDQDA,priv->rx_ring_dma);
29253 +}
29254 +
29255 +/* the TX_DESC_BASE setting is according to the following queue index
29256 + * BK_QUEUE ===> 0
29257 + * BE_QUEUE ===> 1
29258 + * VI_QUEUE ===> 2
29259 + * VO_QUEUE ===> 3
29260 + * HCCA_QUEUE ===> 4
29261 + * TXCMD_QUEUE ===> 5
29262 + * MGNT_QUEUE ===> 6
29263 + * HIGH_QUEUE ===> 7
29264 + * BEACON_QUEUE ===> 8
29265 + * */
29266 +static u32 TX_DESC_BASE[] = {BKQDA, BEQDA, VIQDA, VOQDA, HCCAQDA, CQDA, MQDA, HQDA, BQDA};
29267 +void rtl8192_tx_enable(struct net_device *dev)
29268 +{
29269 + struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
29270 + u32 i;
29271 + for (i = 0; i < MAX_TX_QUEUE_COUNT; i++)
29272 + write_nic_dword(dev, TX_DESC_BASE[i], priv->tx_ring[i].dma);
29273 +
29274 + ieee80211_reset_queue(priv->ieee80211);
29275 +}
29276 +
29277 +#if 0
29278 +void rtl8192_beacon_tx_enable(struct net_device *dev)
29279 +{
29280 + struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
29281 + u32 reg;
29282 +
29283 + reg = read_nic_dword(priv->ieee80211->dev,INTA_MASK);
29284 +
29285 + /* enable Beacon realted interrupt signal */
29286 + reg |= (IMR_BcnInt | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
29287 + write_nic_byte(dev,reg);
29288 +}
29289 +#endif
29290 +
29291 +static void rtl8192_free_rx_ring(struct net_device *dev)
29292 +{
29293 + struct r8192_priv *priv = ieee80211_priv(dev);
29294 + int i;
29295 +
29296 + for (i = 0; i < priv->rxringcount; i++) {
29297 + struct sk_buff *skb = priv->rx_buf[i];
29298 + if (!skb)
29299 + continue;
29300 +
29301 + pci_unmap_single(priv->pdev,
29302 + *((dma_addr_t *)skb->cb),
29303 + priv->rxbuffersize, PCI_DMA_FROMDEVICE);
29304 + kfree_skb(skb);
29305 + }
29306 +
29307 + pci_free_consistent(priv->pdev, sizeof(*priv->rx_ring) * priv->rxringcount,
29308 + priv->rx_ring, priv->rx_ring_dma);
29309 + priv->rx_ring = NULL;
29310 +}
29311 +
29312 +static void rtl8192_free_tx_ring(struct net_device *dev, unsigned int prio)
29313 +{
29314 + struct r8192_priv *priv = ieee80211_priv(dev);
29315 + struct rtl8192_tx_ring *ring = &priv->tx_ring[prio];
29316 +
29317 + while (skb_queue_len(&ring->queue)) {
29318 + tx_desc_819x_pci *entry = &ring->desc[ring->idx];
29319 + struct sk_buff *skb = __skb_dequeue(&ring->queue);
29320 +
29321 + pci_unmap_single(priv->pdev, le32_to_cpu(entry->TxBuffAddr),
29322 + skb->len, PCI_DMA_TODEVICE);
29323 + kfree_skb(skb);
29324 + ring->idx = (ring->idx + 1) % ring->entries;
29325 + }
29326 +
29327 + pci_free_consistent(priv->pdev, sizeof(*ring->desc)*ring->entries,
29328 + ring->desc, ring->dma);
29329 + ring->desc = NULL;
29330 +}
29331 +
29332 +
29333 +static void rtl8192_beacon_disable(struct net_device *dev)
29334 +{
29335 + struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
29336 + u32 reg;
29337 +
29338 + reg = read_nic_dword(priv->ieee80211->dev,INTA_MASK);
29339 +
29340 + /* disable Beacon realted interrupt signal */
29341 + reg &= ~(IMR_BcnInt | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
29342 + write_nic_dword(priv->ieee80211->dev, INTA_MASK, reg);
29343 +}
29344 +
29345 +void rtl8192_rtx_disable(struct net_device *dev)
29346 +{
29347 + u8 cmd;
29348 + struct r8192_priv *priv = ieee80211_priv(dev);
29349 + int i;
29350 +
29351 + cmd=read_nic_byte(dev,CMDR);
29352 +// if(!priv->ieee80211->bSupportRemoteWakeUp) {
29353 + write_nic_byte(dev, CMDR, cmd &~ \
29354 + (CR_TE|CR_RE));
29355 +// }
29356 + force_pci_posting(dev);
29357 + mdelay(30);
29358 +
29359 + for(i = 0; i < MAX_QUEUE_SIZE; i++) {
29360 + skb_queue_purge(&priv->ieee80211->skb_waitQ [i]);
29361 + }
29362 + for(i = 0; i < MAX_QUEUE_SIZE; i++) {
29363 + skb_queue_purge(&priv->ieee80211->skb_aggQ [i]);
29364 + }
29365 +
29366 +
29367 + skb_queue_purge(&priv->skb_queue);
29368 + return;
29369 +}
29370 +
29371 +static void rtl8192_reset(struct net_device *dev)
29372 +{
29373 + rtl8192_irq_disable(dev);
29374 + printk("This is RTL819xP Reset procedure\n");
29375 +}
29376 +
29377 +static u16 rtl_rate[] = {10,20,55,110,60,90,120,180,240,360,480,540};
29378 +inline u16 rtl8192_rate2rate(short rate)
29379 +{
29380 + if (rate >11) return 0;
29381 + return rtl_rate[rate];
29382 +}
29383 +
29384 +
29385 +
29386 +#if 0
29387 +void rtl8192_tx_queues_stop(struct net_device *dev)
29388 +{
29389 + //struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
29390 + u8 dma_poll_mask = (1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
29391 + dma_poll_mask |= (1<<TX_DMA_STOP_HIPRIORITY_SHIFT);
29392 + dma_poll_mask |= (1<<TX_DMA_STOP_NORMPRIORITY_SHIFT);
29393 + dma_poll_mask |= (1<<TX_DMA_STOP_BEACON_SHIFT);
29394 +
29395 + rtl8192_set_mode(dev,EPROM_CMD_CONFIG);
29396 + write_nic_byte(dev,TX_DMA_POLLING,dma_poll_mask);
29397 + rtl8192_set_mode(dev,EPROM_CMD_NORMAL);
29398 +}
29399 +#endif
29400 +
29401 +static void rtl8192_data_hard_stop(struct net_device *dev)
29402 +{
29403 + //FIXME !!
29404 + #if 0
29405 + struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
29406 + priv->dma_poll_mask |= (1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
29407 + rtl8192_set_mode(dev,EPROM_CMD_CONFIG);
29408 + write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
29409 + rtl8192_set_mode(dev,EPROM_CMD_NORMAL);
29410 + #endif
29411 +}
29412 +
29413 +
29414 +static void rtl8192_data_hard_resume(struct net_device *dev)
29415 +{
29416 + // FIXME !!
29417 + #if 0
29418 + struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
29419 + priv->dma_poll_mask &= ~(1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
29420 + rtl8192_set_mode(dev,EPROM_CMD_CONFIG);
29421 + write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
29422 + rtl8192_set_mode(dev,EPROM_CMD_NORMAL);
29423 + #endif
29424 +}
29425 +
29426 +/* this function TX data frames when the ieee80211 stack requires this.
29427 + * It checks also if we need to stop the ieee tx queue, eventually do it
29428 + */
29429 +static void rtl8192_hard_data_xmit(struct sk_buff *skb, struct net_device *dev, int rate)
29430 +{
29431 + struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
29432 + int ret;
29433 + //unsigned long flags;
29434 + cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
29435 + u8 queue_index = tcb_desc->queue_index;
29436 + /* shall not be referred by command packet */
29437 + assert(queue_index != TXCMD_QUEUE);
29438 +
29439 + //spin_lock_irqsave(&priv->tx_lock,flags);
29440 +
29441 + memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev));
29442 +#if 0
29443 + tcb_desc->RATRIndex = 7;
29444 + tcb_desc->bTxDisableRateFallBack = 1;
29445 + tcb_desc->bTxUseDriverAssingedRate = 1;
29446 + tcb_desc->bTxEnableFwCalcDur = 1;
29447 +#endif
29448 + skb_push(skb, priv->ieee80211->tx_headroom);
29449 + ret = rtl8192_tx(dev, skb);
29450 + if(ret != 0) {
29451 + kfree_skb(skb);
29452 + };
29453 +
29454 +//
29455 + if(queue_index!=MGNT_QUEUE) {
29456 + priv->ieee80211->stats.tx_bytes+=(skb->len - priv->ieee80211->tx_headroom);
29457 + priv->ieee80211->stats.tx_packets++;
29458 + }
29459 +
29460 + //spin_unlock_irqrestore(&priv->tx_lock,flags);
29461 +
29462 +// return ret;
29463 + return;
29464 +}
29465 +
29466 +/* This is a rough attempt to TX a frame
29467 + * This is called by the ieee 80211 stack to TX management frames.
29468 + * If the ring is full packet are dropped (for data frame the queue
29469 + * is stopped before this can happen).
29470 + */
29471 +static int rtl8192_hard_start_xmit(struct sk_buff *skb,struct net_device *dev)
29472 +{
29473 + struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
29474 +
29475 +
29476 + int ret;
29477 + //unsigned long flags;
29478 + cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
29479 + u8 queue_index = tcb_desc->queue_index;
29480 +
29481 +
29482 + //spin_lock_irqsave(&priv->tx_lock,flags);
29483 +
29484 + memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev));
29485 + if(queue_index == TXCMD_QUEUE) {
29486 + // skb_push(skb, USB_HWDESC_HEADER_LEN);
29487 + rtl819xE_tx_cmd(dev, skb);
29488 + ret = 0;
29489 + //spin_unlock_irqrestore(&priv->tx_lock,flags);
29490 + return ret;
29491 + } else {
29492 + // RT_TRACE(COMP_SEND, "To send management packet\n");
29493 + tcb_desc->RATRIndex = 7;
29494 + tcb_desc->bTxDisableRateFallBack = 1;
29495 + tcb_desc->bTxUseDriverAssingedRate = 1;
29496 + tcb_desc->bTxEnableFwCalcDur = 1;
29497 + skb_push(skb, priv->ieee80211->tx_headroom);
29498 + ret = rtl8192_tx(dev, skb);
29499 + if(ret != 0) {
29500 + kfree_skb(skb);
29501 + };
29502 + }
29503 +
29504 +// priv->ieee80211->stats.tx_bytes+=skb->len;
29505 +// priv->ieee80211->stats.tx_packets++;
29506 +
29507 + //spin_unlock_irqrestore(&priv->tx_lock,flags);
29508 +
29509 + return ret;
29510 +
29511 +}
29512 +
29513 +
29514 +void rtl8192_try_wake_queue(struct net_device *dev, int pri);
29515 +
29516 +static void rtl8192_tx_isr(struct net_device *dev, int prio)
29517 +{
29518 + struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
29519 +
29520 + struct rtl8192_tx_ring *ring = &priv->tx_ring[prio];
29521 +
29522 + while (skb_queue_len(&ring->queue)) {
29523 + tx_desc_819x_pci *entry = &ring->desc[ring->idx];
29524 + struct sk_buff *skb;
29525 +
29526 + /* beacon packet will only use the first descriptor defautly,
29527 + * and the OWN may not be cleared by the hardware
29528 + * */
29529 + if(prio != BEACON_QUEUE) {
29530 + if(entry->OWN)
29531 + return;
29532 + ring->idx = (ring->idx + 1) % ring->entries;
29533 + }
29534 +
29535 + skb = __skb_dequeue(&ring->queue);
29536 + pci_unmap_single(priv->pdev, le32_to_cpu(entry->TxBuffAddr),
29537 + skb->len, PCI_DMA_TODEVICE);
29538 +
29539 + kfree_skb(skb);
29540 + }
29541 + if (prio == MGNT_QUEUE){
29542 + if (priv->ieee80211->ack_tx_to_ieee){
29543 + if (rtl8192_is_tx_queue_empty(dev)){
29544 + priv->ieee80211->ack_tx_to_ieee = 0;
29545 + ieee80211_ps_tx_ack(priv->ieee80211, 1);
29546 + }
29547 + }
29548 + }
29549 +
29550 + if(prio != BEACON_QUEUE) {
29551 + /* try to deal with the pending packets */
29552 + tasklet_schedule(&priv->irq_tx_tasklet);
29553 + }
29554 +
29555 +}
29556 +
29557 +static void rtl8192_stop_beacon(struct net_device *dev)
29558 +{
29559 + //rtl8192_beacon_disable(dev);
29560 +}
29561 +
29562 +static void rtl8192_config_rate(struct net_device* dev, u16* rate_config)
29563 +{
29564 + struct r8192_priv *priv = ieee80211_priv(dev);
29565 + struct ieee80211_network *net;
29566 + u8 i=0, basic_rate = 0;
29567 + net = & priv->ieee80211->current_network;
29568 +
29569 + for (i=0; i<net->rates_len; i++)
29570 + {
29571 + basic_rate = net->rates[i]&0x7f;
29572 + switch(basic_rate)
29573 + {
29574 + case MGN_1M: *rate_config |= RRSR_1M; break;
29575 + case MGN_2M: *rate_config |= RRSR_2M; break;
29576 + case MGN_5_5M: *rate_config |= RRSR_5_5M; break;
29577 + case MGN_11M: *rate_config |= RRSR_11M; break;
29578 + case MGN_6M: *rate_config |= RRSR_6M; break;
29579 + case MGN_9M: *rate_config |= RRSR_9M; break;
29580 + case MGN_12M: *rate_config |= RRSR_12M; break;
29581 + case MGN_18M: *rate_config |= RRSR_18M; break;
29582 + case MGN_24M: *rate_config |= RRSR_24M; break;
29583 + case MGN_36M: *rate_config |= RRSR_36M; break;
29584 + case MGN_48M: *rate_config |= RRSR_48M; break;
29585 + case MGN_54M: *rate_config |= RRSR_54M; break;
29586 + }
29587 + }
29588 + for (i=0; i<net->rates_ex_len; i++)
29589 + {
29590 + basic_rate = net->rates_ex[i]&0x7f;
29591 + switch(basic_rate)
29592 + {
29593 + case MGN_1M: *rate_config |= RRSR_1M; break;
29594 + case MGN_2M: *rate_config |= RRSR_2M; break;
29595 + case MGN_5_5M: *rate_config |= RRSR_5_5M; break;
29596 + case MGN_11M: *rate_config |= RRSR_11M; break;
29597 + case MGN_6M: *rate_config |= RRSR_6M; break;
29598 + case MGN_9M: *rate_config |= RRSR_9M; break;
29599 + case MGN_12M: *rate_config |= RRSR_12M; break;
29600 + case MGN_18M: *rate_config |= RRSR_18M; break;
29601 + case MGN_24M: *rate_config |= RRSR_24M; break;
29602 + case MGN_36M: *rate_config |= RRSR_36M; break;
29603 + case MGN_48M: *rate_config |= RRSR_48M; break;
29604 + case MGN_54M: *rate_config |= RRSR_54M; break;
29605 + }
29606 + }
29607 +}
29608 +
29609 +
29610 +#define SHORT_SLOT_TIME 9
29611 +#define NON_SHORT_SLOT_TIME 20
29612 +
29613 +static void rtl8192_update_cap(struct net_device* dev, u16 cap)
29614 +{
29615 + u32 tmp = 0;
29616 + struct r8192_priv *priv = ieee80211_priv(dev);
29617 + struct ieee80211_network *net = &priv->ieee80211->current_network;
29618 + priv->short_preamble = cap & WLAN_CAPABILITY_SHORT_PREAMBLE;
29619 + tmp = priv->basic_rate;
29620 + if (priv->short_preamble)
29621 + tmp |= BRSR_AckShortPmb;
29622 + write_nic_dword(dev, RRSR, tmp);
29623 +
29624 + if (net->mode & (IEEE_G|IEEE_N_24G))
29625 + {
29626 + u8 slot_time = 0;
29627 + if ((cap & WLAN_CAPABILITY_SHORT_SLOT)&&(!priv->ieee80211->pHTInfo->bCurrentRT2RTLongSlotTime))
29628 + {//short slot time
29629 + slot_time = SHORT_SLOT_TIME;
29630 + }
29631 + else //long slot time
29632 + slot_time = NON_SHORT_SLOT_TIME;
29633 + priv->slot_time = slot_time;
29634 + write_nic_byte(dev, SLOT_TIME, slot_time);
29635 + }
29636 +
29637 +}
29638 +
29639 +static void rtl8192_net_update(struct net_device *dev)
29640 +{
29641 +
29642 + struct r8192_priv *priv = ieee80211_priv(dev);
29643 + struct ieee80211_network *net;
29644 + u16 BcnTimeCfg = 0, BcnCW = 6, BcnIFS = 0xf;
29645 + u16 rate_config = 0;
29646 + net = &priv->ieee80211->current_network;
29647 + //update Basic rate: RR, BRSR
29648 + rtl8192_config_rate(dev, &rate_config);
29649 + // 2007.01.16, by Emily
29650 + // Select RRSR (in Legacy-OFDM and CCK)
29651 + // For 8190, we select only 24M, 12M, 6M, 11M, 5.5M, 2M, and 1M from the Basic rate.
29652 + // We do not use other rates.
29653 + priv->basic_rate = rate_config &= 0x15f;
29654 + //BSSID
29655 + write_nic_dword(dev,BSSIDR,((u32*)net->bssid)[0]);
29656 + write_nic_word(dev,BSSIDR+4,((u16*)net->bssid)[2]);
29657 +#if 0
29658 + //MSR
29659 + rtl8192_update_msr(dev);
29660 +#endif
29661 +
29662 +
29663 +// rtl8192_update_cap(dev, net->capability);
29664 + if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
29665 + {
29666 + write_nic_word(dev, ATIMWND, 2);
29667 + write_nic_word(dev, BCN_DMATIME, 256);
29668 + write_nic_word(dev, BCN_INTERVAL, net->beacon_interval);
29669 + // write_nic_word(dev, BcnIntTime, 100);
29670 + //BIT15 of BCN_DRV_EARLY_INT will indicate whether software beacon or hw beacon is applied.
29671 + write_nic_word(dev, BCN_DRV_EARLY_INT, 10);
29672 + write_nic_byte(dev, BCN_ERR_THRESH, 100);
29673 +
29674 + BcnTimeCfg |= (BcnCW<<BCN_TCFG_CW_SHIFT);
29675 + // TODO: BcnIFS may required to be changed on ASIC
29676 + BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
29677 +
29678 + write_nic_word(dev, BCN_TCFG, BcnTimeCfg);
29679 + }
29680 +
29681 +
29682 +}
29683 +
29684 +void rtl819xE_tx_cmd(struct net_device *dev, struct sk_buff *skb)
29685 +{
29686 + struct r8192_priv *priv = ieee80211_priv(dev);
29687 + struct rtl8192_tx_ring *ring;
29688 + tx_desc_819x_pci *entry;
29689 + unsigned int idx;
29690 + dma_addr_t mapping;
29691 + cb_desc *tcb_desc;
29692 + unsigned long flags;
29693 +
29694 + ring = &priv->tx_ring[TXCMD_QUEUE];
29695 + mapping = pci_map_single(priv->pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
29696 +
29697 + spin_lock_irqsave(&priv->irq_th_lock,flags);
29698 + idx = (ring->idx + skb_queue_len(&ring->queue)) % ring->entries;
29699 + entry = &ring->desc[idx];
29700 +
29701 + tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
29702 + memset(entry,0,12);
29703 + entry->LINIP = tcb_desc->bLastIniPkt;
29704 + entry->FirstSeg = 1;//first segment
29705 + entry->LastSeg = 1; //last segment
29706 + if(tcb_desc->bCmdOrInit == DESC_PACKET_TYPE_INIT) {
29707 + entry->CmdInit = DESC_PACKET_TYPE_INIT;
29708 + } else {
29709 + entry->CmdInit = DESC_PACKET_TYPE_NORMAL;
29710 + entry->Offset = sizeof(TX_FWINFO_8190PCI) + 8;
29711 + entry->PktSize = (u16)(tcb_desc->pkt_size + entry->Offset);
29712 + entry->QueueSelect = QSLT_CMD;
29713 + entry->TxFWInfoSize = 0x08;
29714 + entry->RATid = (u8)DESC_PACKET_TYPE_INIT;
29715 + }
29716 + entry->TxBufferSize = skb->len;
29717 + entry->TxBuffAddr = cpu_to_le32(mapping);
29718 + entry->OWN = 1;
29719 +
29720 +#ifdef JOHN_DUMP_TXDESC
29721 + { int i;
29722 + tx_desc_819x_pci *entry1 = &ring->desc[0];
29723 + unsigned int *ptr= (unsigned int *)entry1;
29724 + printk("<Tx descriptor>:\n");
29725 + for (i = 0; i < 8; i++)
29726 + printk("%8x ", ptr[i]);
29727 + printk("\n");
29728 + }
29729 +#endif
29730 + __skb_queue_tail(&ring->queue, skb);
29731 + spin_unlock_irqrestore(&priv->irq_th_lock,flags);
29732 +
29733 + write_nic_byte(dev, TPPoll, TPPoll_CQ);
29734 +
29735 + return;
29736 +}
29737 +
29738 +/*
29739 + * Mapping Software/Hardware descriptor queue id to "Queue Select Field"
29740 + * in TxFwInfo data structure
29741 + * 2006.10.30 by Emily
29742 + *
29743 + * \param QUEUEID Software Queue
29744 +*/
29745 +static u8 MapHwQueueToFirmwareQueue(u8 QueueID)
29746 +{
29747 + u8 QueueSelect = 0x0; //defualt set to
29748 +
29749 + switch(QueueID) {
29750 + case BE_QUEUE:
29751 + QueueSelect = QSLT_BE; //or QSelect = pTcb->priority;
29752 + break;
29753 +
29754 + case BK_QUEUE:
29755 + QueueSelect = QSLT_BK; //or QSelect = pTcb->priority;
29756 + break;
29757 +
29758 + case VO_QUEUE:
29759 + QueueSelect = QSLT_VO; //or QSelect = pTcb->priority;
29760 + break;
29761 +
29762 + case VI_QUEUE:
29763 + QueueSelect = QSLT_VI; //or QSelect = pTcb->priority;
29764 + break;
29765 + case MGNT_QUEUE:
29766 + QueueSelect = QSLT_MGNT;
29767 + break;
29768 +
29769 + case BEACON_QUEUE:
29770 + QueueSelect = QSLT_BEACON;
29771 + break;
29772 +
29773 + // TODO: 2006.10.30 mark other queue selection until we verify it is OK
29774 + // TODO: Remove Assertions
29775 +//#if (RTL819X_FPGA_VER & RTL819X_FPGA_GUANGAN_070502)
29776 + case TXCMD_QUEUE:
29777 + QueueSelect = QSLT_CMD;
29778 + break;
29779 +//#endif
29780 + case HIGH_QUEUE:
29781 + //QueueSelect = QSLT_HIGH;
29782 + //break;
29783 +
29784 + default:
29785 + RT_TRACE(COMP_ERR, "TransmitTCB(): Impossible Queue Selection: %d \n", QueueID);
29786 + break;
29787 + }
29788 + return QueueSelect;
29789 +}
29790 +
29791 +static u8 MRateToHwRate8190Pci(u8 rate)
29792 +{
29793 + u8 ret = DESC90_RATE1M;
29794 +
29795 + switch(rate) {
29796 + case MGN_1M: ret = DESC90_RATE1M; break;
29797 + case MGN_2M: ret = DESC90_RATE2M; break;
29798 + case MGN_5_5M: ret = DESC90_RATE5_5M; break;
29799 + case MGN_11M: ret = DESC90_RATE11M; break;
29800 + case MGN_6M: ret = DESC90_RATE6M; break;
29801 + case MGN_9M: ret = DESC90_RATE9M; break;
29802 + case MGN_12M: ret = DESC90_RATE12M; break;
29803 + case MGN_18M: ret = DESC90_RATE18M; break;
29804 + case MGN_24M: ret = DESC90_RATE24M; break;
29805 + case MGN_36M: ret = DESC90_RATE36M; break;
29806 + case MGN_48M: ret = DESC90_RATE48M; break;
29807 + case MGN_54M: ret = DESC90_RATE54M; break;
29808 +
29809 + // HT rate since here
29810 + case MGN_MCS0: ret = DESC90_RATEMCS0; break;
29811 + case MGN_MCS1: ret = DESC90_RATEMCS1; break;
29812 + case MGN_MCS2: ret = DESC90_RATEMCS2; break;
29813 + case MGN_MCS3: ret = DESC90_RATEMCS3; break;
29814 + case MGN_MCS4: ret = DESC90_RATEMCS4; break;
29815 + case MGN_MCS5: ret = DESC90_RATEMCS5; break;
29816 + case MGN_MCS6: ret = DESC90_RATEMCS6; break;
29817 + case MGN_MCS7: ret = DESC90_RATEMCS7; break;
29818 + case MGN_MCS8: ret = DESC90_RATEMCS8; break;
29819 + case MGN_MCS9: ret = DESC90_RATEMCS9; break;
29820 + case MGN_MCS10: ret = DESC90_RATEMCS10; break;
29821 + case MGN_MCS11: ret = DESC90_RATEMCS11; break;
29822 + case MGN_MCS12: ret = DESC90_RATEMCS12; break;
29823 + case MGN_MCS13: ret = DESC90_RATEMCS13; break;
29824 + case MGN_MCS14: ret = DESC90_RATEMCS14; break;
29825 + case MGN_MCS15: ret = DESC90_RATEMCS15; break;
29826 + case (0x80|0x20): ret = DESC90_RATEMCS32; break;
29827 +
29828 + default: break;
29829 + }
29830 + return ret;
29831 +}
29832 +
29833 +
29834 +static u8 QueryIsShort(u8 TxHT, u8 TxRate, cb_desc *tcb_desc)
29835 +{
29836 + u8 tmp_Short;
29837 +
29838 + tmp_Short = (TxHT==1)?((tcb_desc->bUseShortGI)?1:0):((tcb_desc->bUseShortPreamble)?1:0);
29839 +
29840 + if(TxHT==1 && TxRate != DESC90_RATEMCS15)
29841 + tmp_Short = 0;
29842 +
29843 + return tmp_Short;
29844 +}
29845 +
29846 +/*
29847 + * The tx procedure is just as following,
29848 + * skb->cb will contain all the following information,
29849 + * priority, morefrag, rate, &dev.
29850 + * */
29851 +short rtl8192_tx(struct net_device *dev, struct sk_buff* skb)
29852 +{
29853 + struct r8192_priv *priv = ieee80211_priv(dev);
29854 + struct rtl8192_tx_ring *ring;
29855 + unsigned long flags;
29856 + cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
29857 + tx_desc_819x_pci *pdesc = NULL;
29858 + TX_FWINFO_8190PCI *pTxFwInfo = NULL;
29859 + dma_addr_t mapping;
29860 + bool multi_addr=false,broad_addr=false,uni_addr=false;
29861 + u8* pda_addr = NULL;
29862 + int idx;
29863 +
29864 + mapping = pci_map_single(priv->pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
29865 + /* collect the tx packets statitcs */
29866 + pda_addr = ((u8*)skb->data) + sizeof(TX_FWINFO_8190PCI);
29867 + if(is_multicast_ether_addr(pda_addr))
29868 + multi_addr = true;
29869 + else if(is_broadcast_ether_addr(pda_addr))
29870 + broad_addr = true;
29871 + else
29872 + uni_addr = true;
29873 +
29874 + if(uni_addr)
29875 + priv->stats.txbytesunicast += (u8)(skb->len) - sizeof(TX_FWINFO_8190PCI);
29876 + else if(multi_addr)
29877 + priv->stats.txbytesmulticast +=(u8)(skb->len) - sizeof(TX_FWINFO_8190PCI);
29878 + else
29879 + priv->stats.txbytesbroadcast += (u8)(skb->len) - sizeof(TX_FWINFO_8190PCI);
29880 +
29881 + /* fill tx firmware */
29882 + pTxFwInfo = (PTX_FWINFO_8190PCI)skb->data;
29883 + memset(pTxFwInfo,0,sizeof(TX_FWINFO_8190PCI));
29884 + pTxFwInfo->TxHT = (tcb_desc->data_rate&0x80)?1:0;
29885 + pTxFwInfo->TxRate = MRateToHwRate8190Pci((u8)tcb_desc->data_rate);
29886 + pTxFwInfo->EnableCPUDur = tcb_desc->bTxEnableFwCalcDur;
29887 + pTxFwInfo->Short = QueryIsShort(pTxFwInfo->TxHT, pTxFwInfo->TxRate, tcb_desc);
29888 +
29889 + /* Aggregation related */
29890 + if(tcb_desc->bAMPDUEnable) {
29891 + pTxFwInfo->AllowAggregation = 1;
29892 + pTxFwInfo->RxMF = tcb_desc->ampdu_factor;
29893 + pTxFwInfo->RxAMD = tcb_desc->ampdu_density;
29894 + } else {
29895 + pTxFwInfo->AllowAggregation = 0;
29896 + pTxFwInfo->RxMF = 0;
29897 + pTxFwInfo->RxAMD = 0;
29898 + }
29899 +
29900 + //
29901 + // Protection mode related
29902 + //
29903 + pTxFwInfo->RtsEnable = (tcb_desc->bRTSEnable)?1:0;
29904 + pTxFwInfo->CtsEnable = (tcb_desc->bCTSEnable)?1:0;
29905 + pTxFwInfo->RtsSTBC = (tcb_desc->bRTSSTBC)?1:0;
29906 + pTxFwInfo->RtsHT= (tcb_desc->rts_rate&0x80)?1:0;
29907 + pTxFwInfo->RtsRate = MRateToHwRate8190Pci((u8)tcb_desc->rts_rate);
29908 + pTxFwInfo->RtsBandwidth = 0;
29909 + pTxFwInfo->RtsSubcarrier = tcb_desc->RTSSC;
29910 + pTxFwInfo->RtsShort = (pTxFwInfo->RtsHT==0)?(tcb_desc->bRTSUseShortPreamble?1:0):(tcb_desc->bRTSUseShortGI?1:0);
29911 + //
29912 + // Set Bandwidth and sub-channel settings.
29913 + //
29914 + if(priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40)
29915 + {
29916 + if(tcb_desc->bPacketBW)
29917 + {
29918 + pTxFwInfo->TxBandwidth = 1;
29919 +#ifdef RTL8190P
29920 + pTxFwInfo->TxSubCarrier = 3;
29921 +#else
29922 + pTxFwInfo->TxSubCarrier = 0; //By SD3's Jerry suggestion, use duplicated mode, cosa 04012008
29923 +#endif
29924 + }
29925 + else
29926 + {
29927 + pTxFwInfo->TxBandwidth = 0;
29928 + pTxFwInfo->TxSubCarrier = priv->nCur40MhzPrimeSC;
29929 + }
29930 + } else {
29931 + pTxFwInfo->TxBandwidth = 0;
29932 + pTxFwInfo->TxSubCarrier = 0;
29933 + }
29934 +
29935 + if (0)
29936 + {
29937 + /* 2007/07/25 MH Copy current TX FW info.*/
29938 + memcpy((void*)(&Tmp_TxFwInfo), (void*)(pTxFwInfo), sizeof(TX_FWINFO_8190PCI));
29939 + printk("&&&&&&&&&&&&&&&&&&&&&&====>print out fwinf\n");
29940 + printk("===>enable fwcacl:%d\n", Tmp_TxFwInfo.EnableCPUDur);
29941 + printk("===>RTS STBC:%d\n", Tmp_TxFwInfo.RtsSTBC);
29942 + printk("===>RTS Subcarrier:%d\n", Tmp_TxFwInfo.RtsSubcarrier);
29943 + printk("===>Allow Aggregation:%d\n", Tmp_TxFwInfo.AllowAggregation);
29944 + printk("===>TX HT bit:%d\n", Tmp_TxFwInfo.TxHT);
29945 + printk("===>Tx rate:%d\n", Tmp_TxFwInfo.TxRate);
29946 + printk("===>Received AMPDU Density:%d\n", Tmp_TxFwInfo.RxAMD);
29947 + printk("===>Received MPDU Factor:%d\n", Tmp_TxFwInfo.RxMF);
29948 + printk("===>TxBandwidth:%d\n", Tmp_TxFwInfo.TxBandwidth);
29949 + printk("===>TxSubCarrier:%d\n", Tmp_TxFwInfo.TxSubCarrier);
29950 +
29951 + printk("<=====**********************out of print\n");
29952 +
29953 + }
29954 + spin_lock_irqsave(&priv->irq_th_lock,flags);
29955 + ring = &priv->tx_ring[tcb_desc->queue_index];
29956 + if (tcb_desc->queue_index != BEACON_QUEUE) {
29957 + idx = (ring->idx + skb_queue_len(&ring->queue)) % ring->entries;
29958 + } else {
29959 + idx = 0;
29960 + }
29961 +
29962 + pdesc = &ring->desc[idx];
29963 + if((pdesc->OWN == 1) && (tcb_desc->queue_index != BEACON_QUEUE)) {
29964 + RT_TRACE(COMP_ERR,"No more TX desc@%d, ring->idx = %d,idx = %d,%x", \
29965 + tcb_desc->queue_index,ring->idx, idx,skb->len);
29966 + return skb->len;
29967 + }
29968 +
29969 + /* fill tx descriptor */
29970 + memset((u8*)pdesc,0,12);
29971 + /*DWORD 0*/
29972 + pdesc->LINIP = 0;
29973 + pdesc->CmdInit = 1;
29974 + pdesc->Offset = sizeof(TX_FWINFO_8190PCI) + 8; //We must add 8!! Emily
29975 + pdesc->PktSize = (u16)skb->len-sizeof(TX_FWINFO_8190PCI);
29976 +
29977 + /*DWORD 1*/
29978 + pdesc->SecCAMID= 0;
29979 + pdesc->RATid = tcb_desc->RATRIndex;
29980 +
29981 +
29982 + pdesc->NoEnc = 1;
29983 + pdesc->SecType = 0x0;
29984 + if (tcb_desc->bHwSec) {
29985 + static u8 tmp =0;
29986 + if (!tmp) {
29987 + printk("==>================hw sec\n");
29988 + tmp = 1;
29989 + }
29990 + switch (priv->ieee80211->pairwise_key_type) {
29991 + case KEY_TYPE_WEP40:
29992 + case KEY_TYPE_WEP104:
29993 + pdesc->SecType = 0x1;
29994 + pdesc->NoEnc = 0;
29995 + break;
29996 + case KEY_TYPE_TKIP:
29997 + pdesc->SecType = 0x2;
29998 + pdesc->NoEnc = 0;
29999 + break;
30000 + case KEY_TYPE_CCMP:
30001 + pdesc->SecType = 0x3;
30002 + pdesc->NoEnc = 0;
30003 + break;
30004 + case KEY_TYPE_NA:
30005 + pdesc->SecType = 0x0;
30006 + pdesc->NoEnc = 1;
30007 + break;
30008 + }
30009 + }
30010 +
30011 + //
30012 + // Set Packet ID
30013 + //
30014 + pdesc->PktId = 0x0;
30015 +
30016 + pdesc->QueueSelect = MapHwQueueToFirmwareQueue(tcb_desc->queue_index);
30017 + pdesc->TxFWInfoSize = sizeof(TX_FWINFO_8190PCI);
30018 +
30019 + pdesc->DISFB = tcb_desc->bTxDisableRateFallBack;
30020 + pdesc->USERATE = tcb_desc->bTxUseDriverAssingedRate;
30021 +
30022 + pdesc->FirstSeg =1;
30023 + pdesc->LastSeg = 1;
30024 + pdesc->TxBufferSize = skb->len;
30025 +
30026 + pdesc->TxBuffAddr = cpu_to_le32(mapping);
30027 + __skb_queue_tail(&ring->queue, skb);
30028 + pdesc->OWN = 1;
30029 + spin_unlock_irqrestore(&priv->irq_th_lock,flags);
30030 + dev->trans_start = jiffies;
30031 + write_nic_word(dev,TPPoll,0x01<<tcb_desc->queue_index);
30032 + return 0;
30033 +}
30034 +
30035 +static short rtl8192_alloc_rx_desc_ring(struct net_device *dev)
30036 +{
30037 + struct r8192_priv *priv = ieee80211_priv(dev);
30038 + rx_desc_819x_pci *entry = NULL;
30039 + int i;
30040 +
30041 + priv->rx_ring = pci_alloc_consistent(priv->pdev,
30042 + sizeof(*priv->rx_ring) * priv->rxringcount, &priv->rx_ring_dma);
30043 +
30044 + if (!priv->rx_ring || (unsigned long)priv->rx_ring & 0xFF) {
30045 + RT_TRACE(COMP_ERR,"Cannot allocate RX ring\n");
30046 + return -ENOMEM;
30047 + }
30048 +
30049 + memset(priv->rx_ring, 0, sizeof(*priv->rx_ring) * priv->rxringcount);
30050 + priv->rx_idx = 0;
30051 +
30052 + for (i = 0; i < priv->rxringcount; i++) {
30053 + struct sk_buff *skb = dev_alloc_skb(priv->rxbuffersize);
30054 + dma_addr_t *mapping;
30055 + entry = &priv->rx_ring[i];
30056 + if (!skb)
30057 + return 0;
30058 + priv->rx_buf[i] = skb;
30059 + mapping = (dma_addr_t *)skb->cb;
30060 + *mapping = pci_map_single(priv->pdev, skb->tail,//skb_tail_pointer(skb),
30061 + priv->rxbuffersize, PCI_DMA_FROMDEVICE);
30062 +
30063 + entry->BufferAddress = cpu_to_le32(*mapping);
30064 +
30065 + entry->Length = priv->rxbuffersize;
30066 + entry->OWN = 1;
30067 + }
30068 +
30069 + entry->EOR = 1;
30070 + return 0;
30071 +}
30072 +
30073 +static int rtl8192_alloc_tx_desc_ring(struct net_device *dev,
30074 + unsigned int prio, unsigned int entries)
30075 +{
30076 + struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
30077 + tx_desc_819x_pci *ring;
30078 + dma_addr_t dma;
30079 + int i;
30080 +
30081 + ring = pci_alloc_consistent(priv->pdev, sizeof(*ring) * entries, &dma);
30082 + if (!ring || (unsigned long)ring & 0xFF) {
30083 + RT_TRACE(COMP_ERR, "Cannot allocate TX ring (prio = %d)\n", prio);
30084 + return -ENOMEM;
30085 + }
30086 +
30087 + memset(ring, 0, sizeof(*ring)*entries);
30088 + priv->tx_ring[prio].desc = ring;
30089 + priv->tx_ring[prio].dma = dma;
30090 + priv->tx_ring[prio].idx = 0;
30091 + priv->tx_ring[prio].entries = entries;
30092 + skb_queue_head_init(&priv->tx_ring[prio].queue);
30093 +
30094 + for (i = 0; i < entries; i++)
30095 + ring[i].NextDescAddress =
30096 + cpu_to_le32((u32)dma + ((i + 1) % entries) * sizeof(*ring));
30097 +
30098 + return 0;
30099 +}
30100 +
30101 +
30102 +static short rtl8192_pci_initdescring(struct net_device *dev)
30103 +{
30104 + u32 ret;
30105 + int i;
30106 + struct r8192_priv *priv = ieee80211_priv(dev);
30107 +
30108 + ret = rtl8192_alloc_rx_desc_ring(dev);
30109 + if (ret) {
30110 + return ret;
30111 + }
30112 +
30113 +
30114 + /* general process for other queue */
30115 + for (i = 0; i < MAX_TX_QUEUE_COUNT; i++) {
30116 + if ((ret = rtl8192_alloc_tx_desc_ring(dev, i, priv->txringcount)))
30117 + goto err_free_rings;
30118 + }
30119 +
30120 +#if 0
30121 + /* specific process for hardware beacon process */
30122 + if ((ret = rtl8192_alloc_tx_desc_ring(dev, MAX_TX_QUEUE_COUNT - 1, 2)))
30123 + goto err_free_rings;
30124 +#endif
30125 +
30126 + return 0;
30127 +
30128 +err_free_rings:
30129 + rtl8192_free_rx_ring(dev);
30130 + for (i = 0; i < MAX_TX_QUEUE_COUNT; i++)
30131 + if (priv->tx_ring[i].desc)
30132 + rtl8192_free_tx_ring(dev, i);
30133 + return 1;
30134 +}
30135 +
30136 +static void rtl8192_pci_resetdescring(struct net_device *dev)
30137 +{
30138 + struct r8192_priv *priv = ieee80211_priv(dev);
30139 + int i;
30140 +
30141 + /* force the rx_idx to the first one */
30142 + if(priv->rx_ring) {
30143 + rx_desc_819x_pci *entry = NULL;
30144 + for (i = 0; i < priv->rxringcount; i++) {
30145 + entry = &priv->rx_ring[i];
30146 + entry->OWN = 1;
30147 + }
30148 + priv->rx_idx = 0;
30149 + }
30150 +
30151 + /* after reset, release previous pending packet, and force the
30152 + * tx idx to the first one */
30153 + for (i = 0; i < MAX_TX_QUEUE_COUNT; i++) {
30154 + if (priv->tx_ring[i].desc) {
30155 + struct rtl8192_tx_ring *ring = &priv->tx_ring[i];
30156 +
30157 + while (skb_queue_len(&ring->queue)) {
30158 + tx_desc_819x_pci *entry = &ring->desc[ring->idx];
30159 + struct sk_buff *skb = __skb_dequeue(&ring->queue);
30160 +
30161 + pci_unmap_single(priv->pdev, le32_to_cpu(entry->TxBuffAddr),
30162 + skb->len, PCI_DMA_TODEVICE);
30163 + kfree_skb(skb);
30164 + ring->idx = (ring->idx + 1) % ring->entries;
30165 + }
30166 + ring->idx = 0;
30167 + }
30168 + }
30169 +}
30170 +
30171 +#if 1
30172 +extern void rtl8192_update_ratr_table(struct net_device* dev);
30173 +static void rtl8192_link_change(struct net_device *dev)
30174 +{
30175 +// int i;
30176 +
30177 + struct r8192_priv *priv = ieee80211_priv(dev);
30178 + struct ieee80211_device* ieee = priv->ieee80211;
30179 + //write_nic_word(dev, BCN_INTR_ITV, net->beacon_interval);
30180 + if (ieee->state == IEEE80211_LINKED)
30181 + {
30182 + rtl8192_net_update(dev);
30183 + rtl8192_update_ratr_table(dev);
30184 +#if 1
30185 + //add this as in pure N mode, wep encryption will use software way, but there is no chance to set this as wep will not set group key in wext. WB.2008.07.08
30186 + if ((KEY_TYPE_WEP40 == ieee->pairwise_key_type) || (KEY_TYPE_WEP104 == ieee->pairwise_key_type))
30187 + EnableHWSecurityConfig8192(dev);
30188 +#endif
30189 + }
30190 + else
30191 + {
30192 + write_nic_byte(dev, 0x173, 0);
30193 + }
30194 + /*update timing params*/
30195 + //rtl8192_set_chan(dev, priv->chan);
30196 + //MSR
30197 + rtl8192_update_msr(dev);
30198 +
30199 + // 2007/10/16 MH MAC Will update TSF according to all received beacon, so we have
30200 + // // To set CBSSID bit when link with any AP or STA.
30201 + if (ieee->iw_mode == IW_MODE_INFRA || ieee->iw_mode == IW_MODE_ADHOC)
30202 + {
30203 + u32 reg = 0;
30204 + reg = read_nic_dword(dev, RCR);
30205 + if (priv->ieee80211->state == IEEE80211_LINKED)
30206 + priv->ReceiveConfig = reg |= RCR_CBSSID;
30207 + else
30208 + priv->ReceiveConfig = reg &= ~RCR_CBSSID;
30209 + write_nic_dword(dev, RCR, reg);
30210 + }
30211 +}
30212 +#endif
30213 +
30214 +
30215 +static struct ieee80211_qos_parameters def_qos_parameters = {
30216 + {3,3,3,3},/* cw_min */
30217 + {7,7,7,7},/* cw_max */
30218 + {2,2,2,2},/* aifs */
30219 + {0,0,0,0},/* flags */
30220 + {0,0,0,0} /* tx_op_limit */
30221 +};
30222 +
30223 +#if LINUX_VERSION_CODE >=KERNEL_VERSION(2,6,20)
30224 +static void rtl8192_update_beacon(struct work_struct * work)
30225 +{
30226 + struct r8192_priv *priv = container_of(work, struct r8192_priv, update_beacon_wq.work);
30227 + struct net_device *dev = priv->ieee80211->dev;
30228 +#else
30229 +void rtl8192_update_beacon(struct net_device *dev)
30230 +{
30231 + struct r8192_priv *priv = ieee80211_priv(dev);
30232 +#endif
30233 + struct ieee80211_device* ieee = priv->ieee80211;
30234 + struct ieee80211_network* net = &ieee->current_network;
30235 +
30236 + if (ieee->pHTInfo->bCurrentHTSupport)
30237 + HTUpdateSelfAndPeerSetting(ieee, net);
30238 + ieee->pHTInfo->bCurrentRT2RTLongSlotTime = net->bssht.bdRT2RTLongSlotTime;
30239 + rtl8192_update_cap(dev, net->capability);
30240 +}
30241 +/*
30242 +* background support to run QoS activate functionality
30243 +*/
30244 +static int WDCAPARA_ADD[] = {EDCAPARA_BE,EDCAPARA_BK,EDCAPARA_VI,EDCAPARA_VO};
30245 +#if LINUX_VERSION_CODE >=KERNEL_VERSION(2,6,20)
30246 +static void rtl8192_qos_activate(struct work_struct * work)
30247 +{
30248 + struct r8192_priv *priv = container_of(work, struct r8192_priv, qos_activate);
30249 + struct net_device *dev = priv->ieee80211->dev;
30250 +#else
30251 +void rtl8192_qos_activate(struct net_device *dev)
30252 +{
30253 + struct r8192_priv *priv = ieee80211_priv(dev);
30254 +#endif
30255 + struct ieee80211_qos_parameters *qos_parameters = &priv->ieee80211->current_network.qos_data.parameters;
30256 + u8 mode = priv->ieee80211->current_network.mode;
30257 +// u32 size = sizeof(struct ieee80211_qos_parameters);
30258 + u8 u1bAIFS;
30259 + u32 u4bAcParam;
30260 + int i;
30261 + if (priv == NULL)
30262 + return;
30263 +
30264 +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,16))
30265 + down(&priv->mutex);
30266 +#else
30267 + mutex_lock(&priv->mutex);
30268 +#endif
30269 + if(priv->ieee80211->state != IEEE80211_LINKED)
30270 + goto success;
30271 + RT_TRACE(COMP_QOS,"qos active process with associate response received\n");
30272 + /* It better set slot time at first */
30273 + /* For we just support b/g mode at present, let the slot time at 9/20 selection */
30274 + /* update the ac parameter to related registers */
30275 + for(i = 0; i < QOS_QUEUE_NUM; i++) {
30276 + //Mode G/A: slotTimeTimer = 9; Mode B: 20
30277 + u1bAIFS = qos_parameters->aifs[i] * ((mode&(IEEE_G|IEEE_N_24G)) ?9:20) + aSifsTime;
30278 + u4bAcParam = ((((u32)(qos_parameters->tx_op_limit[i]))<< AC_PARAM_TXOP_LIMIT_OFFSET)|
30279 + (((u32)(qos_parameters->cw_max[i]))<< AC_PARAM_ECW_MAX_OFFSET)|
30280 + (((u32)(qos_parameters->cw_min[i]))<< AC_PARAM_ECW_MIN_OFFSET)|
30281 + ((u32)u1bAIFS << AC_PARAM_AIFS_OFFSET));
30282 + printk("===>u4bAcParam:%x, ", u4bAcParam);
30283 + write_nic_dword(dev, WDCAPARA_ADD[i], u4bAcParam);
30284 + //write_nic_dword(dev, WDCAPARA_ADD[i], 0x005e4332);
30285 + }
30286 +
30287 +success:
30288 +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,16))
30289 + up(&priv->mutex);
30290 +#else
30291 + mutex_unlock(&priv->mutex);
30292 +#endif
30293 +}
30294 +
30295 +static int rtl8192_qos_handle_probe_response(struct r8192_priv *priv,
30296 + int active_network,
30297 + struct ieee80211_network *network)
30298 +{
30299 + int ret = 0;
30300 + u32 size = sizeof(struct ieee80211_qos_parameters);
30301 +
30302 + if(priv->ieee80211->state !=IEEE80211_LINKED)
30303 + return ret;
30304 +
30305 + if ((priv->ieee80211->iw_mode != IW_MODE_INFRA))
30306 + return ret;
30307 +
30308 + if (network->flags & NETWORK_HAS_QOS_MASK) {
30309 + if (active_network &&
30310 + (network->flags & NETWORK_HAS_QOS_PARAMETERS))
30311 + network->qos_data.active = network->qos_data.supported;
30312 +
30313 + if ((network->qos_data.active == 1) && (active_network == 1) &&
30314 + (network->flags & NETWORK_HAS_QOS_PARAMETERS) &&
30315 + (network->qos_data.old_param_count !=
30316 + network->qos_data.param_count)) {
30317 + network->qos_data.old_param_count =
30318 + network->qos_data.param_count;
30319 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
30320 + queue_work(priv->priv_wq, &priv->qos_activate);
30321 +#else
30322 + schedule_task(&priv->qos_activate);
30323 +#endif
30324 + RT_TRACE (COMP_QOS, "QoS parameters change call "
30325 + "qos_activate\n");
30326 + }
30327 + } else {
30328 + memcpy(&priv->ieee80211->current_network.qos_data.parameters,\
30329 + &def_qos_parameters, size);
30330 +
30331 + if ((network->qos_data.active == 1) && (active_network == 1)) {
30332 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
30333 + queue_work(priv->priv_wq, &priv->qos_activate);
30334 +#else
30335 + schedule_task(&priv->qos_activate);
30336 +#endif
30337 + RT_TRACE(COMP_QOS, "QoS was disabled call qos_activate \n");
30338 + }
30339 + network->qos_data.active = 0;
30340 + network->qos_data.supported = 0;
30341 + }
30342 +
30343 + return 0;
30344 +}
30345 +
30346 +/* handle manage frame frame beacon and probe response */
30347 +static int rtl8192_handle_beacon(struct net_device * dev,
30348 + struct ieee80211_beacon * beacon,
30349 + struct ieee80211_network * network)
30350 +{
30351 + struct r8192_priv *priv = ieee80211_priv(dev);
30352 +
30353 + rtl8192_qos_handle_probe_response(priv,1,network);
30354 +
30355 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
30356 + queue_delayed_work(priv->priv_wq, &priv->update_beacon_wq, 0);
30357 +#else
30358 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
30359 + schedule_task(&priv->update_beacon_wq);
30360 +#else
30361 + queue_work(priv->priv_wq, &priv->update_beacon_wq);
30362 +#endif
30363 +#endif
30364 + return 0;
30365 +
30366 +}
30367 +
30368 +/*
30369 +* handling the beaconing responses. if we get different QoS setting
30370 +* off the network from the associated setting, adjust the QoS
30371 +* setting
30372 +*/
30373 +static int rtl8192_qos_association_resp(struct r8192_priv *priv,
30374 + struct ieee80211_network *network)
30375 +{
30376 + int ret = 0;
30377 + unsigned long flags;
30378 + u32 size = sizeof(struct ieee80211_qos_parameters);
30379 + int set_qos_param = 0;
30380 +
30381 + if ((priv == NULL) || (network == NULL))
30382 + return ret;
30383 +
30384 + if(priv->ieee80211->state !=IEEE80211_LINKED)
30385 + return ret;
30386 +
30387 + if ((priv->ieee80211->iw_mode != IW_MODE_INFRA))
30388 + return ret;
30389 +
30390 + spin_lock_irqsave(&priv->ieee80211->lock, flags);
30391 + if(network->flags & NETWORK_HAS_QOS_PARAMETERS) {
30392 + memcpy(&priv->ieee80211->current_network.qos_data.parameters,\
30393 + &network->qos_data.parameters,\
30394 + sizeof(struct ieee80211_qos_parameters));
30395 + priv->ieee80211->current_network.qos_data.active = 1;
30396 +#if 0
30397 + if((priv->ieee80211->current_network.qos_data.param_count != \
30398 + network->qos_data.param_count))
30399 +#endif
30400 + {
30401 + set_qos_param = 1;
30402 + /* update qos parameter for current network */
30403 + priv->ieee80211->current_network.qos_data.old_param_count = \
30404 + priv->ieee80211->current_network.qos_data.param_count;
30405 + priv->ieee80211->current_network.qos_data.param_count = \
30406 + network->qos_data.param_count;
30407 + }
30408 + } else {
30409 + memcpy(&priv->ieee80211->current_network.qos_data.parameters,\
30410 + &def_qos_parameters, size);
30411 + priv->ieee80211->current_network.qos_data.active = 0;
30412 + priv->ieee80211->current_network.qos_data.supported = 0;
30413 + set_qos_param = 1;
30414 + }
30415 +
30416 + spin_unlock_irqrestore(&priv->ieee80211->lock, flags);
30417 +
30418 + RT_TRACE(COMP_QOS, "%s: network->flags = %d,%d\n",__FUNCTION__,network->flags ,priv->ieee80211->current_network.qos_data.active);
30419 + if (set_qos_param == 1)
30420 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
30421 + queue_work(priv->priv_wq, &priv->qos_activate);
30422 +#else
30423 + schedule_task(&priv->qos_activate);
30424 +#endif
30425 +
30426 +
30427 + return ret;
30428 +}
30429 +
30430 +
30431 +static int rtl8192_handle_assoc_response(struct net_device *dev,
30432 + struct ieee80211_assoc_response_frame *resp,
30433 + struct ieee80211_network *network)
30434 +{
30435 + struct r8192_priv *priv = ieee80211_priv(dev);
30436 + rtl8192_qos_association_resp(priv, network);
30437 + return 0;
30438 +}
30439 +
30440 +
30441 +//updateRATRTabel for MCS only. Basic rate is not implement.
30442 +void rtl8192_update_ratr_table(struct net_device* dev)
30443 + // POCTET_STRING posLegacyRate,
30444 + // u8* pMcsRate)
30445 + // PRT_WLAN_STA pEntry)
30446 +{
30447 + struct r8192_priv* priv = ieee80211_priv(dev);
30448 + struct ieee80211_device* ieee = priv->ieee80211;
30449 + u8* pMcsRate = ieee->dot11HTOperationalRateSet;
30450 + //struct ieee80211_network *net = &ieee->current_network;
30451 + u32 ratr_value = 0;
30452 + u8 rate_index = 0;
30453 +
30454 + rtl8192_config_rate(dev, (u16*)(&ratr_value));
30455 + ratr_value |= (*(u16*)(pMcsRate)) << 12;
30456 +// switch (net->mode)
30457 + switch (ieee->mode)
30458 + {
30459 + case IEEE_A:
30460 + ratr_value &= 0x00000FF0;
30461 + break;
30462 + case IEEE_B:
30463 + ratr_value &= 0x0000000F;
30464 + break;
30465 + case IEEE_G:
30466 + ratr_value &= 0x00000FF7;
30467 + break;
30468 + case IEEE_N_24G:
30469 + case IEEE_N_5G:
30470 + if (ieee->pHTInfo->PeerMimoPs == 0) //MIMO_PS_STATIC
30471 + ratr_value &= 0x0007F007;
30472 + else{
30473 + if (priv->rf_type == RF_1T2R)
30474 + ratr_value &= 0x000FF007;
30475 + else
30476 + ratr_value &= 0x0F81F007;
30477 + }
30478 + break;
30479 + default:
30480 + break;
30481 + }
30482 + ratr_value &= 0x0FFFFFFF;
30483 + if(ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI40MHz){
30484 + ratr_value |= 0x80000000;
30485 + }else if(!ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI20MHz){
30486 + ratr_value |= 0x80000000;
30487 + }
30488 + write_nic_dword(dev, RATR0+rate_index*4, ratr_value);
30489 + write_nic_byte(dev, UFWP, 1);
30490 +}
30491 +
30492 +static u8 ccmp_ie[4] = {0x00,0x50,0xf2,0x04};
30493 +static u8 ccmp_rsn_ie[4] = {0x00, 0x0f, 0xac, 0x04};
30494 +static bool GetNmodeSupportBySecCfg8190Pci(struct net_device*dev)
30495 +{
30496 +#if 1
30497 + struct r8192_priv* priv = ieee80211_priv(dev);
30498 + struct ieee80211_device* ieee = priv->ieee80211;
30499 + int wpa_ie_len= ieee->wpa_ie_len;
30500 + struct ieee80211_crypt_data* crypt;
30501 + int encrypt;
30502 +
30503 + crypt = ieee->crypt[ieee->tx_keyidx];
30504 + encrypt = (ieee->current_network.capability & WLAN_CAPABILITY_PRIVACY) || (ieee->host_encrypt && crypt && crypt->ops && (0 == strcmp(crypt->ops->name,"WEP")));
30505 +
30506 + /* simply judge */
30507 + if(encrypt && (wpa_ie_len == 0)) {
30508 + /* wep encryption, no N mode setting */
30509 + return false;
30510 +// } else if((wpa_ie_len != 0)&&(memcmp(&(ieee->wpa_ie[14]),ccmp_ie,4))) {
30511 + } else if((wpa_ie_len != 0)) {
30512 + /* parse pairwise key type */
30513 + //if((pairwisekey = WEP40)||(pairwisekey = WEP104)||(pairwisekey = TKIP))
30514 + if (((ieee->wpa_ie[0] == 0xdd) && (!memcmp(&(ieee->wpa_ie[14]),ccmp_ie,4))) || ((ieee->wpa_ie[0] == 0x30) && (!memcmp(&ieee->wpa_ie[10],ccmp_rsn_ie, 4))))
30515 + return true;
30516 + else
30517 + return false;
30518 + } else {
30519 + //RT_TRACE(COMP_ERR,"In %s The GroupEncAlgorithm is [4]\n",__FUNCTION__ );
30520 + return true;
30521 + }
30522 +
30523 +#if 0
30524 + //In here we discuss with SD4 David. He think we still can send TKIP in broadcast group key in MCS rate.
30525 + //We can't force in G mode if Pairwie key is AES and group key is TKIP
30526 + if((pSecInfo->GroupEncAlgorithm == WEP104_Encryption) || (pSecInfo->GroupEncAlgorithm == WEP40_Encryption) ||
30527 + (pSecInfo->PairwiseEncAlgorithm == WEP104_Encryption) ||
30528 + (pSecInfo->PairwiseEncAlgorithm == WEP40_Encryption) || (pSecInfo->PairwiseEncAlgorithm == TKIP_Encryption))
30529 + {
30530 + return false;
30531 + }
30532 + else
30533 + return true;
30534 +#endif
30535 + return true;
30536 +#endif
30537 +}
30538 +
30539 +static void rtl8192_refresh_supportrate(struct r8192_priv* priv)
30540 +{
30541 + struct ieee80211_device* ieee = priv->ieee80211;
30542 + //we donot consider set support rate for ABG mode, only HT MCS rate is set here.
30543 + if (ieee->mode == WIRELESS_MODE_N_24G || ieee->mode == WIRELESS_MODE_N_5G)
30544 + {
30545 + memcpy(ieee->Regdot11HTOperationalRateSet, ieee->RegHTSuppRateSet, 16);
30546 + //RT_DEBUG_DATA(COMP_INIT, ieee->RegHTSuppRateSet, 16);
30547 + //RT_DEBUG_DATA(COMP_INIT, ieee->Regdot11HTOperationalRateSet, 16);
30548 + }
30549 + else
30550 + memset(ieee->Regdot11HTOperationalRateSet, 0, 16);
30551 + return;
30552 +}
30553 +
30554 +static u8 rtl8192_getSupportedWireleeMode(struct net_device*dev)
30555 +{
30556 + struct r8192_priv *priv = ieee80211_priv(dev);
30557 + u8 ret = 0;
30558 + switch(priv->rf_chip)
30559 + {
30560 + case RF_8225:
30561 + case RF_8256:
30562 + case RF_PSEUDO_11N:
30563 + ret = (WIRELESS_MODE_N_24G|WIRELESS_MODE_G|WIRELESS_MODE_B);
30564 + break;
30565 + case RF_8258:
30566 + ret = (WIRELESS_MODE_A|WIRELESS_MODE_N_5G);
30567 + break;
30568 + default:
30569 + ret = WIRELESS_MODE_B;
30570 + break;
30571 + }
30572 + return ret;
30573 +}
30574 +
30575 +static void rtl8192_SetWirelessMode(struct net_device* dev, u8 wireless_mode)
30576 +{
30577 + struct r8192_priv *priv = ieee80211_priv(dev);
30578 + u8 bSupportMode = rtl8192_getSupportedWireleeMode(dev);
30579 +
30580 +#if 1
30581 + if ((wireless_mode == WIRELESS_MODE_AUTO) || ((wireless_mode&bSupportMode)==0))
30582 + {
30583 + if(bSupportMode & WIRELESS_MODE_N_24G)
30584 + {
30585 + wireless_mode = WIRELESS_MODE_N_24G;
30586 + }
30587 + else if(bSupportMode & WIRELESS_MODE_N_5G)
30588 + {
30589 + wireless_mode = WIRELESS_MODE_N_5G;
30590 + }
30591 + else if((bSupportMode & WIRELESS_MODE_A))
30592 + {
30593 + wireless_mode = WIRELESS_MODE_A;
30594 + }
30595 + else if((bSupportMode & WIRELESS_MODE_G))
30596 + {
30597 + wireless_mode = WIRELESS_MODE_G;
30598 + }
30599 + else if((bSupportMode & WIRELESS_MODE_B))
30600 + {
30601 + wireless_mode = WIRELESS_MODE_B;
30602 + }
30603 + else{
30604 + RT_TRACE(COMP_ERR, "%s(), No valid wireless mode supported, SupportedWirelessMode(%x)!!!\n", __FUNCTION__,bSupportMode);
30605 + wireless_mode = WIRELESS_MODE_B;
30606 + }
30607 + }
30608 +#ifdef TO_DO_LIST //// TODO: this function doesn't work well at this time, we shoud wait for FPGA
30609 + ActUpdateChannelAccessSetting( pAdapter, pHalData->CurrentWirelessMode, &pAdapter->MgntInfo.Info8185.ChannelAccessSetting );
30610 +#endif
30611 + priv->ieee80211->mode = wireless_mode;
30612 +
30613 + if ((wireless_mode == WIRELESS_MODE_N_24G) || (wireless_mode == WIRELESS_MODE_N_5G))
30614 + priv->ieee80211->pHTInfo->bEnableHT = 1;
30615 + else
30616 + priv->ieee80211->pHTInfo->bEnableHT = 0;
30617 + RT_TRACE(COMP_INIT, "Current Wireless Mode is %x\n", wireless_mode);
30618 + rtl8192_refresh_supportrate(priv);
30619 +#endif
30620 +
30621 +}
30622 +//init priv variables here
30623 +
30624 +static bool GetHalfNmodeSupportByAPs819xPci(struct net_device* dev)
30625 +{
30626 + bool Reval;
30627 + struct r8192_priv* priv = ieee80211_priv(dev);
30628 + struct ieee80211_device* ieee = priv->ieee80211;
30629 +
30630 + if(ieee->bHalfWirelessN24GMode == true)
30631 + Reval = true;
30632 + else
30633 + Reval = false;
30634 +
30635 + return Reval;
30636 +}
30637 +
30638 +short rtl8192_is_tx_queue_empty(struct net_device *dev)
30639 +{
30640 + int i=0;
30641 + struct r8192_priv *priv = ieee80211_priv(dev);
30642 + for (i=0; i<=MGNT_QUEUE; i++)
30643 + {
30644 + if ((i== TXCMD_QUEUE) || (i == HCCA_QUEUE) )
30645 + continue;
30646 + if (skb_queue_len(&(&priv->tx_ring[i])->queue) > 0){
30647 + printk("===>tx queue is not empty:%d, %d\n", i, skb_queue_len(&(&priv->tx_ring[i])->queue));
30648 + return 0;
30649 + }
30650 + }
30651 + return 1;
30652 +}
30653 +#if 0
30654 +void rtl8192_rq_tx_ack(struct net_device *dev)
30655 +{
30656 + struct r8192_priv *priv = ieee80211_priv(dev);
30657 + priv->ieee80211->ack_tx_to_ieee = 1;
30658 +}
30659 +#endif
30660 +static void rtl8192_hw_sleep_down(struct net_device *dev)
30661 +{
30662 + RT_TRACE(COMP_POWER, "%s()============>come to sleep down\n", __FUNCTION__);
30663 + MgntActSet_RF_State(dev, eRfSleep, RF_CHANGE_BY_PS);
30664 +}
30665 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
30666 +static void rtl8192_hw_sleep_wq (struct work_struct *work)
30667 +{
30668 +// struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq);
30669 +// struct ieee80211_device * ieee = (struct ieee80211_device*)
30670 +// container_of(work, struct ieee80211_device, watch_dog_wq);
30671 + struct delayed_work *dwork = container_of(work,struct delayed_work,work);
30672 + struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_sleep_wq);
30673 + struct net_device *dev = ieee->dev;
30674 +#else
30675 +void rtl8192_hw_sleep_wq(struct net_device* dev)
30676 +{
30677 +#endif
30678 + //printk("=========>%s()\n", __FUNCTION__);
30679 + rtl8192_hw_sleep_down(dev);
30680 +}
30681 +// printk("dev is %d\n",dev);
30682 +// printk("&*&(^*(&(&=========>%s()\n", __FUNCTION__);
30683 +static void rtl8192_hw_wakeup(struct net_device* dev)
30684 +{
30685 +// u32 flags = 0;
30686 +
30687 +// spin_lock_irqsave(&priv->ps_lock,flags);
30688 + RT_TRACE(COMP_POWER, "%s()============>come to wake up\n", __FUNCTION__);
30689 + MgntActSet_RF_State(dev, eRfOn, RF_CHANGE_BY_PS);
30690 + //FIXME: will we send package stored while nic is sleep?
30691 +// spin_unlock_irqrestore(&priv->ps_lock,flags);
30692 +}
30693 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
30694 +void rtl8192_hw_wakeup_wq (struct work_struct *work)
30695 +{
30696 +// struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq);
30697 +// struct ieee80211_device * ieee = (struct ieee80211_device*)
30698 +// container_of(work, struct ieee80211_device, watch_dog_wq);
30699 + struct delayed_work *dwork = container_of(work,struct delayed_work,work);
30700 + struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_wakeup_wq);
30701 + struct net_device *dev = ieee->dev;
30702 +#else
30703 +void rtl8192_hw_wakeup_wq(struct net_device* dev)
30704 +{
30705 +#endif
30706 + rtl8192_hw_wakeup(dev);
30707 +
30708 +}
30709 +
30710 +#define MIN_SLEEP_TIME 50
30711 +#define MAX_SLEEP_TIME 10000
30712 +static void rtl8192_hw_to_sleep(struct net_device *dev, u32 th, u32 tl)
30713 +{
30714 +
30715 + struct r8192_priv *priv = ieee80211_priv(dev);
30716 +
30717 + u32 rb = jiffies;
30718 + unsigned long flags;
30719 +
30720 + spin_lock_irqsave(&priv->ps_lock,flags);
30721 +
30722 + /* Writing HW register with 0 equals to disable
30723 + * the timer, that is not really what we want
30724 + */
30725 + tl -= MSECS(4+16+7);
30726 +
30727 + //if(tl == 0) tl = 1;
30728 +
30729 + /* FIXME HACK FIXME HACK */
30730 +// force_pci_posting(dev);
30731 + //mdelay(1);
30732 +
30733 +// rb = read_nic_dword(dev, TSFTR);
30734 +
30735 + /* If the interval in witch we are requested to sleep is too
30736 + * short then give up and remain awake
30737 + */
30738 + if(((tl>=rb)&& (tl-rb) <= MSECS(MIN_SLEEP_TIME))
30739 + ||((rb>tl)&& (rb-tl) < MSECS(MIN_SLEEP_TIME))) {
30740 + spin_unlock_irqrestore(&priv->ps_lock,flags);
30741 + printk("too short to sleep\n");
30742 + return;
30743 + }
30744 +
30745 +// write_nic_dword(dev, TimerInt, tl);
30746 +// rb = read_nic_dword(dev, TSFTR);
30747 + {
30748 + u32 tmp = (tl>rb)?(tl-rb):(rb-tl);
30749 + // if (tl<rb)
30750 + queue_delayed_work(priv->ieee80211->wq, &priv->ieee80211->hw_wakeup_wq, tmp); //as tl may be less than rb
30751 + }
30752 + /* if we suspect the TimerInt is gone beyond tl
30753 + * while setting it, then give up
30754 + */
30755 +#if 1
30756 + if(((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME)))||
30757 + ((tl < rb) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))) {
30758 + printk("========>too long to sleep:%x, %x, %lx\n", tl, rb, MSECS(MAX_SLEEP_TIME));
30759 + spin_unlock_irqrestore(&priv->ps_lock,flags);
30760 + return;
30761 + }
30762 +#endif
30763 +// if(priv->rf_sleep)
30764 +// priv->rf_sleep(dev);
30765 +
30766 + //printk("<=========%s()\n", __FUNCTION__);
30767 + queue_delayed_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_sleep_wq,0);
30768 + spin_unlock_irqrestore(&priv->ps_lock,flags);
30769 +}
30770 +static void rtl8192_init_priv_variable(struct net_device* dev)
30771 +{
30772 + struct r8192_priv *priv = ieee80211_priv(dev);
30773 + u8 i;
30774 + priv->being_init_adapter = false;
30775 + priv->txbuffsize = 1600;//1024;
30776 + priv->txfwbuffersize = 4096;
30777 + priv->txringcount = 64;//32;
30778 + //priv->txbeaconcount = priv->txringcount;
30779 + priv->txbeaconcount = 2;
30780 + priv->rxbuffersize = 9100;//2048;//1024;
30781 + priv->rxringcount = MAX_RX_COUNT;//64;
30782 + priv->irq_enabled=0;
30783 + priv->card_8192 = NIC_8192E;
30784 + priv->rx_skb_complete = 1;
30785 + priv->chan = 1; //set to channel 1
30786 + priv->RegWirelessMode = WIRELESS_MODE_AUTO;
30787 + priv->RegChannelPlan = 0xf;
30788 + priv->nrxAMPDU_size = 0;
30789 + priv->nrxAMPDU_aggr_num = 0;
30790 + priv->last_rxdesc_tsf_high = 0;
30791 + priv->last_rxdesc_tsf_low = 0;
30792 + priv->ieee80211->mode = WIRELESS_MODE_AUTO; //SET AUTO
30793 + priv->ieee80211->iw_mode = IW_MODE_INFRA;
30794 + priv->ieee80211->ieee_up=0;
30795 + priv->retry_rts = DEFAULT_RETRY_RTS;
30796 + priv->retry_data = DEFAULT_RETRY_DATA;
30797 + priv->ieee80211->rts = DEFAULT_RTS_THRESHOLD;
30798 + priv->ieee80211->rate = 110; //11 mbps
30799 + priv->ieee80211->short_slot = 1;
30800 + priv->promisc = (dev->flags & IFF_PROMISC) ? 1:0;
30801 + priv->bcck_in_ch14 = false;
30802 + priv->bfsync_processing = false;
30803 + priv->CCKPresentAttentuation = 0;
30804 + priv->rfa_txpowertrackingindex = 0;
30805 + priv->rfc_txpowertrackingindex = 0;
30806 + priv->CckPwEnl = 6;
30807 + priv->ScanDelay = 50;//for Scan TODO
30808 + //added by amy for silent reset
30809 + priv->ResetProgress = RESET_TYPE_NORESET;
30810 + priv->bForcedSilentReset = 0;
30811 + priv->bDisableNormalResetCheck = false;
30812 + priv->force_reset = false;
30813 + //added by amy for power save
30814 + priv->RegRfOff = 0;
30815 + priv->ieee80211->RfOffReason = 0;
30816 + priv->RFChangeInProgress = false;
30817 + priv->bHwRfOffAction = 0;
30818 + priv->SetRFPowerStateInProgress = false;
30819 + priv->ieee80211->PowerSaveControl.bInactivePs = true;
30820 + priv->ieee80211->PowerSaveControl.bIPSModeBackup = false;
30821 + //just for debug
30822 + priv->txpower_checkcnt = 0;
30823 + priv->thermal_readback_index =0;
30824 + priv->txpower_tracking_callback_cnt = 0;
30825 + priv->ccktxpower_adjustcnt_ch14 = 0;
30826 + priv->ccktxpower_adjustcnt_not_ch14 = 0;
30827 +
30828 + priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
30829 + priv->ieee80211->iw_mode = IW_MODE_INFRA;
30830 + priv->ieee80211->softmac_features = IEEE_SOFTMAC_SCAN |
30831 + IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
30832 + IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE;/* |
30833 + IEEE_SOFTMAC_BEACONS;*///added by amy 080604 //| //IEEE_SOFTMAC_SINGLE_QUEUE;
30834 +
30835 + priv->ieee80211->active_scan = 1;
30836 + priv->ieee80211->modulation = IEEE80211_CCK_MODULATION | IEEE80211_OFDM_MODULATION;
30837 + priv->ieee80211->host_encrypt = 1;
30838 + priv->ieee80211->host_decrypt = 1;
30839 + //priv->ieee80211->start_send_beacons = NULL;//rtl819xusb_beacon_tx;//-by amy 080604
30840 + //priv->ieee80211->stop_send_beacons = NULL;//rtl8192_beacon_stop;//-by amy 080604
30841 + priv->ieee80211->start_send_beacons = rtl8192_start_beacon;//+by david 081107
30842 + priv->ieee80211->stop_send_beacons = rtl8192_stop_beacon;//+by david 081107
30843 + priv->ieee80211->softmac_hard_start_xmit = rtl8192_hard_start_xmit;
30844 + priv->ieee80211->set_chan = rtl8192_set_chan;
30845 + priv->ieee80211->link_change = rtl8192_link_change;
30846 + priv->ieee80211->softmac_data_hard_start_xmit = rtl8192_hard_data_xmit;
30847 + priv->ieee80211->data_hard_stop = rtl8192_data_hard_stop;
30848 + priv->ieee80211->data_hard_resume = rtl8192_data_hard_resume;
30849 + priv->ieee80211->init_wmmparam_flag = 0;
30850 + priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
30851 + priv->ieee80211->check_nic_enough_desc = check_nic_enough_desc;
30852 + priv->ieee80211->tx_headroom = sizeof(TX_FWINFO_8190PCI);
30853 + priv->ieee80211->qos_support = 1;
30854 + priv->ieee80211->dot11PowerSaveMode = 0;
30855 + //added by WB
30856 +// priv->ieee80211->SwChnlByTimerHandler = rtl8192_phy_SwChnl;
30857 + priv->ieee80211->SetBWModeHandler = rtl8192_SetBWMode;
30858 + priv->ieee80211->handle_assoc_response = rtl8192_handle_assoc_response;
30859 + priv->ieee80211->handle_beacon = rtl8192_handle_beacon;
30860 +
30861 + priv->ieee80211->sta_wake_up = rtl8192_hw_wakeup;
30862 +// priv->ieee80211->ps_request_tx_ack = rtl8192_rq_tx_ack;
30863 + priv->ieee80211->enter_sleep_state = rtl8192_hw_to_sleep;
30864 + priv->ieee80211->ps_is_queue_empty = rtl8192_is_tx_queue_empty;
30865 + //added by david
30866 + priv->ieee80211->GetNmodeSupportBySecCfg = GetNmodeSupportBySecCfg8190Pci;
30867 + priv->ieee80211->SetWirelessMode = rtl8192_SetWirelessMode;
30868 + priv->ieee80211->GetHalfNmodeSupportByAPsHandler = GetHalfNmodeSupportByAPs819xPci;
30869 +
30870 + //added by amy
30871 + priv->ieee80211->InitialGainHandler = InitialGain819xPci;
30872 +
30873 + priv->card_type = USB;
30874 + {
30875 + priv->ShortRetryLimit = 0x30;
30876 + priv->LongRetryLimit = 0x30;
30877 + }
30878 + priv->EarlyRxThreshold = 7;
30879 + priv->enable_gpio0 = 0;
30880 +
30881 + priv->TransmitConfig = 0;
30882 +
30883 + priv->ReceiveConfig = RCR_ADD3 |
30884 + RCR_AMF | RCR_ADF | //accept management/data
30885 + RCR_AICV | //accept control frame for SW AP needs PS-poll, 2005.07.07, by rcnjko.
30886 + RCR_AB | RCR_AM | RCR_APM | //accept BC/MC/UC
30887 + RCR_AAP | ((u32)7<<RCR_MXDMA_OFFSET) |
30888 + ((u32)7 << RCR_FIFO_OFFSET) | RCR_ONLYERLPKT;
30889 +
30890 + priv->irq_mask = (u32)(IMR_ROK | IMR_VODOK | IMR_VIDOK | IMR_BEDOK | IMR_BKDOK |\
30891 + IMR_HCCADOK | IMR_MGNTDOK | IMR_COMDOK | IMR_HIGHDOK |\
30892 + IMR_BDOK | IMR_RXCMDOK | IMR_TIMEOUT0 | IMR_RDU | IMR_RXFOVW |\
30893 + IMR_TXFOVW | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
30894 +
30895 + priv->AcmControl = 0;
30896 + priv->pFirmware = (rt_firmware*)vmalloc(sizeof(rt_firmware));
30897 + if (priv->pFirmware)
30898 + memset(priv->pFirmware, 0, sizeof(rt_firmware));
30899 +
30900 + /* rx related queue */
30901 + skb_queue_head_init(&priv->rx_queue);
30902 + skb_queue_head_init(&priv->skb_queue);
30903 +
30904 + /* Tx related queue */
30905 + for(i = 0; i < MAX_QUEUE_SIZE; i++) {
30906 + skb_queue_head_init(&priv->ieee80211->skb_waitQ [i]);
30907 + }
30908 + for(i = 0; i < MAX_QUEUE_SIZE; i++) {
30909 + skb_queue_head_init(&priv->ieee80211->skb_aggQ [i]);
30910 + }
30911 + priv->rf_set_chan = rtl8192_phy_SwChnl;
30912 +}
30913 +
30914 +//init lock here
30915 +static void rtl8192_init_priv_lock(struct r8192_priv* priv)
30916 +{
30917 + spin_lock_init(&priv->tx_lock);
30918 + spin_lock_init(&priv->irq_lock);//added by thomas
30919 + spin_lock_init(&priv->irq_th_lock);
30920 + spin_lock_init(&priv->rf_ps_lock);
30921 + spin_lock_init(&priv->ps_lock);
30922 + //spin_lock_init(&priv->rf_lock);
30923 + sema_init(&priv->wx_sem,1);
30924 + sema_init(&priv->rf_sem,1);
30925 +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,16))
30926 + sema_init(&priv->mutex, 1);
30927 +#else
30928 + mutex_init(&priv->mutex);
30929 +#endif
30930 +}
30931 +
30932 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
30933 +extern void rtl819x_watchdog_wqcallback(struct work_struct *work);
30934 +#else
30935 +extern void rtl819x_watchdog_wqcallback(struct net_device *dev);
30936 +#endif
30937 +
30938 +void rtl8192_irq_rx_tasklet(struct r8192_priv *priv);
30939 +void rtl8192_irq_tx_tasklet(struct r8192_priv *priv);
30940 +void rtl8192_prepare_beacon(struct r8192_priv *priv);
30941 +//init tasklet and wait_queue here. only 2.6 above kernel is considered
30942 +#define DRV_NAME "wlan0"
30943 +static void rtl8192_init_priv_task(struct net_device* dev)
30944 +{
30945 + struct r8192_priv *priv = ieee80211_priv(dev);
30946 +
30947 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
30948 +#ifdef PF_SYNCTHREAD
30949 + priv->priv_wq = create_workqueue(DRV_NAME,0);
30950 +#else
30951 + priv->priv_wq = create_workqueue(DRV_NAME);
30952 +#endif
30953 +#endif
30954 +
30955 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
30956 +// INIT_WORK(&priv->reset_wq, (void(*)(void*)) rtl8192_restart);
30957 + INIT_WORK(&priv->reset_wq, rtl8192_restart);
30958 +// INIT_DELAYED_WORK(&priv->watch_dog_wq, hal_dm_watchdog);
30959 + INIT_DELAYED_WORK(&priv->watch_dog_wq, rtl819x_watchdog_wqcallback);
30960 + INIT_DELAYED_WORK(&priv->txpower_tracking_wq, dm_txpower_trackingcallback);
30961 + INIT_DELAYED_WORK(&priv->rfpath_check_wq, dm_rf_pathcheck_workitemcallback);
30962 + INIT_DELAYED_WORK(&priv->update_beacon_wq, rtl8192_update_beacon);
30963 + //INIT_WORK(&priv->SwChnlWorkItem, rtl8192_SwChnl_WorkItem);
30964 + //INIT_WORK(&priv->SetBWModeWorkItem, rtl8192_SetBWModeWorkItem);
30965 + INIT_WORK(&priv->qos_activate, rtl8192_qos_activate);
30966 + INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq,(void*) rtl8192_hw_wakeup_wq);
30967 + INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq,(void*) rtl8192_hw_sleep_wq);
30968 +
30969 +#else
30970 +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
30971 + tq_init(&priv->reset_wq, (void*)rtl8192_restart, dev);
30972 + tq_init(&priv->watch_dog_wq, (void*)rtl819x_watchdog_wqcallback, dev);
30973 + tq_init(&priv->txpower_tracking_wq, (void*)dm_txpower_trackingcallback, dev);
30974 + tq_init(&priv->rfpath_check_wq, (void*)dm_rf_pathcheck_workitemcallback, dev);
30975 + tq_init(&priv->update_beacon_wq, (void*)rtl8192_update_beacon, dev);
30976 + //tq_init(&priv->SwChnlWorkItem, (void*) rtl8192_SwChnl_WorkItem, dev);
30977 + //tq_init(&priv->SetBWModeWorkItem, (void*)rtl8192_SetBWModeWorkItem, dev);
30978 + tq_init(&priv->qos_activate, (void *)rtl8192_qos_activate, dev);
30979 + tq_init(&priv->ieee80211->hw_wakeup_wq,(void*) rtl8192_hw_wakeup_wq, dev);
30980 + tq_init(&priv->ieee80211->hw_sleep_wq,(void*) rtl8192_hw_sleep_wq, dev);
30981 +
30982 +#else
30983 + INIT_WORK(&priv->reset_wq,(void(*)(void*)) rtl8192_restart,dev);
30984 +// INIT_WORK(&priv->watch_dog_wq, (void(*)(void*)) hal_dm_watchdog,dev);
30985 + INIT_WORK(&priv->watch_dog_wq, (void(*)(void*)) rtl819x_watchdog_wqcallback,dev);
30986 + INIT_WORK(&priv->txpower_tracking_wq, (void(*)(void*)) dm_txpower_trackingcallback,dev);
30987 + INIT_WORK(&priv->rfpath_check_wq, (void(*)(void*)) dm_rf_pathcheck_workitemcallback,dev);
30988 + INIT_WORK(&priv->update_beacon_wq, (void(*)(void*))rtl8192_update_beacon,dev);
30989 + //INIT_WORK(&priv->SwChnlWorkItem, (void(*)(void*)) rtl8192_SwChnl_WorkItem, dev);
30990 + //INIT_WORK(&priv->SetBWModeWorkItem, (void(*)(void*)) rtl8192_SetBWModeWorkItem, dev);
30991 + INIT_WORK(&priv->qos_activate, (void(*)(void *))rtl8192_qos_activate, dev);
30992 + INIT_WORK(&priv->ieee80211->hw_wakeup_wq,(void*) rtl8192_hw_wakeup_wq, dev);
30993 + INIT_WORK(&priv->ieee80211->hw_sleep_wq,(void*) rtl8192_hw_sleep_wq, dev);
30994 +#endif
30995 +#endif
30996 +
30997 + tasklet_init(&priv->irq_rx_tasklet,
30998 + (void(*)(unsigned long))rtl8192_irq_rx_tasklet,
30999 + (unsigned long)priv);
31000 + tasklet_init(&priv->irq_tx_tasklet,
31001 + (void(*)(unsigned long))rtl8192_irq_tx_tasklet,
31002 + (unsigned long)priv);
31003 + tasklet_init(&priv->irq_prepare_beacon_tasklet,
31004 + (void(*)(unsigned long))rtl8192_prepare_beacon,
31005 + (unsigned long)priv);
31006 +}
31007 +
31008 +static void rtl8192_get_eeprom_size(struct net_device* dev)
31009 +{
31010 + u16 curCR = 0;
31011 + struct r8192_priv *priv = ieee80211_priv(dev);
31012 + RT_TRACE(COMP_INIT, "===========>%s()\n", __FUNCTION__);
31013 + curCR = read_nic_dword(dev, EPROM_CMD);
31014 + RT_TRACE(COMP_INIT, "read from Reg Cmd9346CR(%x):%x\n", EPROM_CMD, curCR);
31015 + //whether need I consider BIT5?
31016 + priv->epromtype = (curCR & EPROM_CMD_9356SEL) ? EPROM_93c56 : EPROM_93c46;
31017 + RT_TRACE(COMP_INIT, "<===========%s(), epromtype:%d\n", __FUNCTION__, priv->epromtype);
31018 +}
31019 +
31020 +//used to swap endian. as ntohl & htonl are not neccessary to swap endian, so use this instead.
31021 +static inline u16 endian_swap(u16* data)
31022 +{
31023 + u16 tmp = *data;
31024 + *data = (tmp >> 8) | (tmp << 8);
31025 + return *data;
31026 +}
31027 +
31028 +/*
31029 + * Note: Adapter->EEPROMAddressSize should be set before this function call.
31030 + * EEPROM address size can be got through GetEEPROMSize8185()
31031 +*/
31032 +static void rtl8192_read_eeprom_info(struct net_device* dev)
31033 +{
31034 + struct r8192_priv *priv = ieee80211_priv(dev);
31035 +
31036 + u8 tempval;
31037 +#ifdef RTL8192E
31038 + u8 ICVer8192, ICVer8256;
31039 +#endif
31040 + u16 i,usValue, IC_Version;
31041 + u16 EEPROMId;
31042 +#ifdef RTL8190P
31043 + u8 offset;//, tmpAFR;
31044 + u8 EepromTxPower[100];
31045 +#endif
31046 + u8 bMac_Tmp_Addr[6] = {0x00, 0xe0, 0x4c, 0x00, 0x00, 0x01};
31047 + RT_TRACE(COMP_INIT, "====> rtl8192_read_eeprom_info\n");
31048 +
31049 +
31050 + // TODO: I don't know if we need to apply EF function to EEPROM read function
31051 +
31052 + //2 Read EEPROM ID to make sure autoload is success
31053 + EEPROMId = eprom_read(dev, 0);
31054 + if( EEPROMId != RTL8190_EEPROM_ID )
31055 + {
31056 + RT_TRACE(COMP_ERR, "EEPROM ID is invalid:%x, %x\n", EEPROMId, RTL8190_EEPROM_ID);
31057 + priv->AutoloadFailFlag=true;
31058 + }
31059 + else
31060 + {
31061 + priv->AutoloadFailFlag=false;
31062 + }
31063 +
31064 + //
31065 + // Assign Chip Version ID
31066 + //
31067 + // Read IC Version && Channel Plan
31068 + if(!priv->AutoloadFailFlag)
31069 + {
31070 + // VID, PID
31071 + priv->eeprom_vid = eprom_read(dev, (EEPROM_VID >> 1));
31072 + priv->eeprom_did = eprom_read(dev, (EEPROM_DID >> 1));
31073 +
31074 + usValue = eprom_read(dev, (u16)(EEPROM_Customer_ID>>1)) >> 8 ;
31075 + priv->eeprom_CustomerID = (u8)( usValue & 0xff);
31076 + usValue = eprom_read(dev, (EEPROM_ICVersion_ChannelPlan>>1));
31077 + priv->eeprom_ChannelPlan = usValue&0xff;
31078 + IC_Version = ((usValue&0xff00)>>8);
31079 +
31080 +#ifdef RTL8190P
31081 + priv->card_8192_version = (VERSION_8190)(IC_Version);
31082 +#else
31083 + #ifdef RTL8192E
31084 + ICVer8192 = (IC_Version&0xf); //bit0~3; 1:A cut, 2:B cut, 3:C cut...
31085 + ICVer8256 = ((IC_Version&0xf0)>>4);//bit4~6, bit7 reserved for other RF chip; 1:A cut, 2:B cut, 3:C cut...
31086 + RT_TRACE(COMP_INIT, "\nICVer8192 = 0x%x\n", ICVer8192);
31087 + RT_TRACE(COMP_INIT, "\nICVer8256 = 0x%x\n", ICVer8256);
31088 + if(ICVer8192 == 0x2) //B-cut
31089 + {
31090 + if(ICVer8256 == 0x5) //E-cut
31091 + priv->card_8192_version= VERSION_8190_BE;
31092 + }
31093 + #endif
31094 +#endif
31095 + switch(priv->card_8192_version)
31096 + {
31097 + case VERSION_8190_BD:
31098 + case VERSION_8190_BE:
31099 + break;
31100 + default:
31101 + priv->card_8192_version = VERSION_8190_BD;
31102 + break;
31103 + }
31104 + RT_TRACE(COMP_INIT, "\nIC Version = 0x%x\n", priv->card_8192_version);
31105 + }
31106 + else
31107 + {
31108 + priv->card_8192_version = VERSION_8190_BD;
31109 + priv->eeprom_vid = 0;
31110 + priv->eeprom_did = 0;
31111 + priv->eeprom_CustomerID = 0;
31112 + priv->eeprom_ChannelPlan = 0;
31113 + RT_TRACE(COMP_INIT, "\nIC Version = 0x%x\n", 0xff);
31114 + }
31115 +
31116 + RT_TRACE(COMP_INIT, "EEPROM VID = 0x%4x\n", priv->eeprom_vid);
31117 + RT_TRACE(COMP_INIT, "EEPROM DID = 0x%4x\n", priv->eeprom_did);
31118 + RT_TRACE(COMP_INIT,"EEPROM Customer ID: 0x%2x\n", priv->eeprom_CustomerID);
31119 +
31120 + //2 Read Permanent MAC address
31121 + if(!priv->AutoloadFailFlag)
31122 + {
31123 + for(i = 0; i < 6; i += 2)
31124 + {
31125 + usValue = eprom_read(dev, (u16) ((EEPROM_NODE_ADDRESS_BYTE_0+i)>>1));
31126 + *(u16*)(&dev->dev_addr[i]) = usValue;
31127 + }
31128 + } else {
31129 + // when auto load failed, the last address byte set to be a random one.
31130 + // added by david woo.2007/11/7
31131 + memcpy(dev->dev_addr, bMac_Tmp_Addr, 6);
31132 + #if 0
31133 + for(i = 0; i < 6; i++)
31134 + {
31135 + Adapter->PermanentAddress[i] = sMacAddr[i];
31136 + PlatformEFIOWrite1Byte(Adapter, IDR0+i, sMacAddr[i]);
31137 + }
31138 + #endif
31139 + }
31140 +
31141 + RT_TRACE(COMP_INIT, "Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n",
31142 + dev->dev_addr[0], dev->dev_addr[1],
31143 + dev->dev_addr[2], dev->dev_addr[3],
31144 + dev->dev_addr[4], dev->dev_addr[5]);
31145 +
31146 + //2 TX Power Check EEPROM Fail or not
31147 + if(priv->card_8192_version > VERSION_8190_BD) {
31148 + priv->bTXPowerDataReadFromEEPORM = true;
31149 + } else {
31150 + priv->bTXPowerDataReadFromEEPORM = false;
31151 + }
31152 +
31153 + // 2007/11/15 MH 8190PCI Default=2T4R, 8192PCIE dafault=1T2R
31154 + priv->rf_type = RTL819X_DEFAULT_RF_TYPE;
31155 +
31156 + if(priv->card_8192_version > VERSION_8190_BD)
31157 + {
31158 + // Read RF-indication and Tx Power gain index diff of legacy to HT OFDM rate.
31159 + if(!priv->AutoloadFailFlag)
31160 + {
31161 + tempval = (eprom_read(dev, (EEPROM_RFInd_PowerDiff>>1))) & 0xff;
31162 + priv->EEPROMLegacyHTTxPowerDiff = tempval & 0xf; // bit[3:0]
31163 +
31164 + if (tempval&0x80) //RF-indication, bit[7]
31165 + priv->rf_type = RF_1T2R;
31166 + else
31167 + priv->rf_type = RF_2T4R;
31168 + }
31169 + else
31170 + {
31171 + priv->EEPROMLegacyHTTxPowerDiff = EEPROM_Default_LegacyHTTxPowerDiff;
31172 + }
31173 + RT_TRACE(COMP_INIT, "EEPROMLegacyHTTxPowerDiff = %d\n",
31174 + priv->EEPROMLegacyHTTxPowerDiff);
31175 +
31176 + // Read ThermalMeter from EEPROM
31177 + if(!priv->AutoloadFailFlag)
31178 + {
31179 + priv->EEPROMThermalMeter = (u8)(((eprom_read(dev, (EEPROM_ThermalMeter>>1))) & 0xff00)>>8);
31180 + }
31181 + else
31182 + {
31183 + priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
31184 + }
31185 + RT_TRACE(COMP_INIT, "ThermalMeter = %d\n", priv->EEPROMThermalMeter);
31186 + //vivi, for tx power track
31187 + priv->TSSI_13dBm = priv->EEPROMThermalMeter *100;
31188 +
31189 + if(priv->epromtype == EPROM_93c46)
31190 + {
31191 + // Read antenna tx power offset of B/C/D to A and CrystalCap from EEPROM
31192 + if(!priv->AutoloadFailFlag)
31193 + {
31194 + usValue = eprom_read(dev, (EEPROM_TxPwDiff_CrystalCap>>1));
31195 + priv->EEPROMAntPwDiff = (usValue&0x0fff);
31196 + priv->EEPROMCrystalCap = (u8)((usValue&0xf000)>>12);
31197 + }
31198 + else
31199 + {
31200 + priv->EEPROMAntPwDiff = EEPROM_Default_AntTxPowerDiff;
31201 + priv->EEPROMCrystalCap = EEPROM_Default_TxPwDiff_CrystalCap;
31202 + }
31203 + RT_TRACE(COMP_INIT, "EEPROMAntPwDiff = %d\n", priv->EEPROMAntPwDiff);
31204 + RT_TRACE(COMP_INIT, "EEPROMCrystalCap = %d\n", priv->EEPROMCrystalCap);
31205 +
31206 + //
31207 + // Get per-channel Tx Power Level
31208 + //
31209 + for(i=0; i<14; i+=2)
31210 + {
31211 + if(!priv->AutoloadFailFlag)
31212 + {
31213 + usValue = eprom_read(dev, (u16) ((EEPROM_TxPwIndex_CCK+i)>>1) );
31214 + }
31215 + else
31216 + {
31217 + usValue = EEPROM_Default_TxPower;
31218 + }
31219 + *((u16*)(&priv->EEPROMTxPowerLevelCCK[i])) = usValue;
31220 + RT_TRACE(COMP_INIT,"CCK Tx Power Level, Index %d = 0x%02x\n", i, priv->EEPROMTxPowerLevelCCK[i]);
31221 + RT_TRACE(COMP_INIT, "CCK Tx Power Level, Index %d = 0x%02x\n", i+1, priv->EEPROMTxPowerLevelCCK[i+1]);
31222 + }
31223 + for(i=0; i<14; i+=2)
31224 + {
31225 + if(!priv->AutoloadFailFlag)
31226 + {
31227 + usValue = eprom_read(dev, (u16) ((EEPROM_TxPwIndex_OFDM_24G+i)>>1) );
31228 + }
31229 + else
31230 + {
31231 + usValue = EEPROM_Default_TxPower;
31232 + }
31233 + *((u16*)(&priv->EEPROMTxPowerLevelOFDM24G[i])) = usValue;
31234 + RT_TRACE(COMP_INIT, "OFDM 2.4G Tx Power Level, Index %d = 0x%02x\n", i, priv->EEPROMTxPowerLevelOFDM24G[i]);
31235 + RT_TRACE(COMP_INIT, "OFDM 2.4G Tx Power Level, Index %d = 0x%02x\n", i+1, priv->EEPROMTxPowerLevelOFDM24G[i+1]);
31236 + }
31237 + }
31238 + else if(priv->epromtype== EPROM_93c56)
31239 + {
31240 + #ifdef RTL8190P
31241 + // Read CrystalCap from EEPROM
31242 + if(!priv->AutoloadFailFlag)
31243 + {
31244 + priv->EEPROMAntPwDiff = EEPROM_Default_AntTxPowerDiff;
31245 + priv->EEPROMCrystalCap = (u8)(((eprom_read(dev, (EEPROM_C56_CrystalCap>>1))) & 0xf000)>>12);
31246 + }
31247 + else
31248 + {
31249 + priv->EEPROMAntPwDiff = EEPROM_Default_AntTxPowerDiff;
31250 + priv->EEPROMCrystalCap = EEPROM_Default_TxPwDiff_CrystalCap;
31251 + }
31252 + RT_TRACE(COMP_INIT,"EEPROMAntPwDiff = %d\n", priv->EEPROMAntPwDiff);
31253 + RT_TRACE(COMP_INIT, "EEPROMCrystalCap = %d\n", priv->EEPROMCrystalCap);
31254 +
31255 + // Get Tx Power Level by Channel
31256 + if(!priv->AutoloadFailFlag)
31257 + {
31258 + // Read Tx power of Channel 1 ~ 14 from EEPROM.
31259 + for(i = 0; i < 12; i+=2)
31260 + {
31261 + if (i <6)
31262 + offset = EEPROM_C56_RfA_CCK_Chnl1_TxPwIndex + i;
31263 + else
31264 + offset = EEPROM_C56_RfC_CCK_Chnl1_TxPwIndex + i - 6;
31265 + usValue = eprom_read(dev, (offset>>1));
31266 + *((u16*)(&EepromTxPower[i])) = usValue;
31267 + }
31268 +
31269 + for(i = 0; i < 12; i++)
31270 + {
31271 + if (i <= 2)
31272 + priv->EEPROMRfACCKChnl1TxPwLevel[i] = EepromTxPower[i];
31273 + else if ((i >=3 )&&(i <= 5))
31274 + priv->EEPROMRfAOfdmChnlTxPwLevel[i-3] = EepromTxPower[i];
31275 + else if ((i >=6 )&&(i <= 8))
31276 + priv->EEPROMRfCCCKChnl1TxPwLevel[i-6] = EepromTxPower[i];
31277 + else
31278 + priv->EEPROMRfCOfdmChnlTxPwLevel[i-9] = EepromTxPower[i];
31279 + }
31280 + }
31281 + else
31282 + {
31283 + priv->EEPROMRfACCKChnl1TxPwLevel[0] = EEPROM_Default_TxPowerLevel;
31284 + priv->EEPROMRfACCKChnl1TxPwLevel[1] = EEPROM_Default_TxPowerLevel;
31285 + priv->EEPROMRfACCKChnl1TxPwLevel[2] = EEPROM_Default_TxPowerLevel;
31286 +
31287 + priv->EEPROMRfAOfdmChnlTxPwLevel[0] = EEPROM_Default_TxPowerLevel;
31288 + priv->EEPROMRfAOfdmChnlTxPwLevel[1] = EEPROM_Default_TxPowerLevel;
31289 + priv->EEPROMRfAOfdmChnlTxPwLevel[2] = EEPROM_Default_TxPowerLevel;
31290 +
31291 + priv->EEPROMRfCCCKChnl1TxPwLevel[0] = EEPROM_Default_TxPowerLevel;
31292 + priv->EEPROMRfCCCKChnl1TxPwLevel[1] = EEPROM_Default_TxPowerLevel;
31293 + priv->EEPROMRfCCCKChnl1TxPwLevel[2] = EEPROM_Default_TxPowerLevel;
31294 +
31295 + priv->EEPROMRfCOfdmChnlTxPwLevel[0] = EEPROM_Default_TxPowerLevel;
31296 + priv->EEPROMRfCOfdmChnlTxPwLevel[1] = EEPROM_Default_TxPowerLevel;
31297 + priv->EEPROMRfCOfdmChnlTxPwLevel[2] = EEPROM_Default_TxPowerLevel;
31298 + }
31299 + RT_TRACE(COMP_INIT, "priv->EEPROMRfACCKChnl1TxPwLevel[0] = 0x%x\n", priv->EEPROMRfACCKChnl1TxPwLevel[0]);
31300 + RT_TRACE(COMP_INIT, "priv->EEPROMRfACCKChnl1TxPwLevel[1] = 0x%x\n", priv->EEPROMRfACCKChnl1TxPwLevel[1]);
31301 + RT_TRACE(COMP_INIT, "priv->EEPROMRfACCKChnl1TxPwLevel[2] = 0x%x\n", priv->EEPROMRfACCKChnl1TxPwLevel[2]);
31302 + RT_TRACE(COMP_INIT, "priv->EEPROMRfAOfdmChnlTxPwLevel[0] = 0x%x\n", priv->EEPROMRfAOfdmChnlTxPwLevel[0]);
31303 + RT_TRACE(COMP_INIT, "priv->EEPROMRfAOfdmChnlTxPwLevel[1] = 0x%x\n", priv->EEPROMRfAOfdmChnlTxPwLevel[1]);
31304 + RT_TRACE(COMP_INIT, "priv->EEPROMRfAOfdmChnlTxPwLevel[2] = 0x%x\n", priv->EEPROMRfAOfdmChnlTxPwLevel[2]);
31305 + RT_TRACE(COMP_INIT, "priv->EEPROMRfCCCKChnl1TxPwLevel[0] = 0x%x\n", priv->EEPROMRfCCCKChnl1TxPwLevel[0]);
31306 + RT_TRACE(COMP_INIT, "priv->EEPROMRfCCCKChnl1TxPwLevel[1] = 0x%x\n", priv->EEPROMRfCCCKChnl1TxPwLevel[1]);
31307 + RT_TRACE(COMP_INIT, "priv->EEPROMRfCCCKChnl1TxPwLevel[2] = 0x%x\n", priv->EEPROMRfCCCKChnl1TxPwLevel[2]);
31308 + RT_TRACE(COMP_INIT, "priv->EEPROMRfCOfdmChnlTxPwLevel[0] = 0x%x\n", priv->EEPROMRfCOfdmChnlTxPwLevel[0]);
31309 + RT_TRACE(COMP_INIT, "priv->EEPROMRfCOfdmChnlTxPwLevel[1] = 0x%x\n", priv->EEPROMRfCOfdmChnlTxPwLevel[1]);
31310 + RT_TRACE(COMP_INIT, "priv->EEPROMRfCOfdmChnlTxPwLevel[2] = 0x%x\n", priv->EEPROMRfCOfdmChnlTxPwLevel[2]);
31311 +#endif
31312 +
31313 + }
31314 + //
31315 + // Update HAL variables.
31316 + //
31317 + if(priv->epromtype == EPROM_93c46)
31318 + {
31319 + for(i=0; i<14; i++)
31320 + {
31321 + priv->TxPowerLevelCCK[i] = priv->EEPROMTxPowerLevelCCK[i];
31322 + priv->TxPowerLevelOFDM24G[i] = priv->EEPROMTxPowerLevelOFDM24G[i];
31323 + }
31324 + priv->LegacyHTTxPowerDiff = priv->EEPROMLegacyHTTxPowerDiff;
31325 + // Antenna B gain offset to antenna A, bit0~3
31326 + priv->AntennaTxPwDiff[0] = (priv->EEPROMAntPwDiff & 0xf);
31327 + // Antenna C gain offset to antenna A, bit4~7
31328 + priv->AntennaTxPwDiff[1] = ((priv->EEPROMAntPwDiff & 0xf0)>>4);
31329 + // Antenna D gain offset to antenna A, bit8~11
31330 + priv->AntennaTxPwDiff[2] = ((priv->EEPROMAntPwDiff & 0xf00)>>8);
31331 + // CrystalCap, bit12~15
31332 + priv->CrystalCap = priv->EEPROMCrystalCap;
31333 + // ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
31334 + priv->ThermalMeter[0] = (priv->EEPROMThermalMeter & 0xf);
31335 + priv->ThermalMeter[1] = ((priv->EEPROMThermalMeter & 0xf0)>>4);
31336 + }
31337 + else if(priv->epromtype == EPROM_93c56)
31338 + {
31339 + //char cck_pwr_diff_a=0, cck_pwr_diff_c=0;
31340 +
31341 + //cck_pwr_diff_a = pHalData->EEPROMRfACCKChnl7TxPwLevel - pHalData->EEPROMRfAOfdmChnlTxPwLevel[1];
31342 + //cck_pwr_diff_c = pHalData->EEPROMRfCCCKChnl7TxPwLevel - pHalData->EEPROMRfCOfdmChnlTxPwLevel[1];
31343 + for(i=0; i<3; i++) // channel 1~3 use the same Tx Power Level.
31344 + {
31345 + priv->TxPowerLevelCCK_A[i] = priv->EEPROMRfACCKChnl1TxPwLevel[0];
31346 + priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[0];
31347 + priv->TxPowerLevelCCK_C[i] = priv->EEPROMRfCCCKChnl1TxPwLevel[0];
31348 + priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[0];
31349 + }
31350 + for(i=3; i<9; i++) // channel 4~9 use the same Tx Power Level
31351 + {
31352 + priv->TxPowerLevelCCK_A[i] = priv->EEPROMRfACCKChnl1TxPwLevel[1];
31353 + priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[1];
31354 + priv->TxPowerLevelCCK_C[i] = priv->EEPROMRfCCCKChnl1TxPwLevel[1];
31355 + priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[1];
31356 + }
31357 + for(i=9; i<14; i++) // channel 10~14 use the same Tx Power Level
31358 + {
31359 + priv->TxPowerLevelCCK_A[i] = priv->EEPROMRfACCKChnl1TxPwLevel[2];
31360 + priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[2];
31361 + priv->TxPowerLevelCCK_C[i] = priv->EEPROMRfCCCKChnl1TxPwLevel[2];
31362 + priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[2];
31363 + }
31364 + for(i=0; i<14; i++)
31365 + RT_TRACE(COMP_INIT, "priv->TxPowerLevelCCK_A[%d] = 0x%x\n", i, priv->TxPowerLevelCCK_A[i]);
31366 + for(i=0; i<14; i++)
31367 + RT_TRACE(COMP_INIT,"priv->TxPowerLevelOFDM24G_A[%d] = 0x%x\n", i, priv->TxPowerLevelOFDM24G_A[i]);
31368 + for(i=0; i<14; i++)
31369 + RT_TRACE(COMP_INIT, "priv->TxPowerLevelCCK_C[%d] = 0x%x\n", i, priv->TxPowerLevelCCK_C[i]);
31370 + for(i=0; i<14; i++)
31371 + RT_TRACE(COMP_INIT, "priv->TxPowerLevelOFDM24G_C[%d] = 0x%x\n", i, priv->TxPowerLevelOFDM24G_C[i]);
31372 + priv->LegacyHTTxPowerDiff = priv->EEPROMLegacyHTTxPowerDiff;
31373 + priv->AntennaTxPwDiff[0] = 0;
31374 + priv->AntennaTxPwDiff[1] = 0;
31375 + priv->AntennaTxPwDiff[2] = 0;
31376 + priv->CrystalCap = priv->EEPROMCrystalCap;
31377 + // ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
31378 + priv->ThermalMeter[0] = (priv->EEPROMThermalMeter & 0xf);
31379 + priv->ThermalMeter[1] = ((priv->EEPROMThermalMeter & 0xf0)>>4);
31380 + }
31381 + }
31382 +
31383 + if(priv->rf_type == RF_1T2R)
31384 + {
31385 + RT_TRACE(COMP_INIT, "\n1T2R config\n");
31386 + }
31387 + else if (priv->rf_type == RF_2T4R)
31388 + {
31389 + RT_TRACE(COMP_INIT, "\n2T4R config\n");
31390 + }
31391 +
31392 + // 2008/01/16 MH We can only know RF type in the function. So we have to init
31393 + // DIG RATR table again.
31394 + init_rate_adaptive(dev);
31395 +
31396 + //1 Make a copy for following variables and we can change them if we want
31397 +
31398 + priv->rf_chip= RF_8256;
31399 +
31400 + if(priv->RegChannelPlan == 0xf)
31401 + {
31402 + priv->ChannelPlan = priv->eeprom_ChannelPlan;
31403 + }
31404 + else
31405 + {
31406 + priv->ChannelPlan = priv->RegChannelPlan;
31407 + }
31408 +
31409 + //
31410 + // Used PID and DID to Set CustomerID
31411 + //
31412 + if( priv->eeprom_vid == 0x1186 && priv->eeprom_did == 0x3304 )
31413 + {
31414 + priv->CustomerID = RT_CID_DLINK;
31415 + }
31416 +
31417 + switch(priv->eeprom_CustomerID)
31418 + {
31419 + case EEPROM_CID_DEFAULT:
31420 + priv->CustomerID = RT_CID_DEFAULT;
31421 + break;
31422 + case EEPROM_CID_CAMEO:
31423 + priv->CustomerID = RT_CID_819x_CAMEO;
31424 + break;
31425 + case EEPROM_CID_RUNTOP:
31426 + priv->CustomerID = RT_CID_819x_RUNTOP;
31427 + break;
31428 + case EEPROM_CID_NetCore:
31429 + priv->CustomerID = RT_CID_819x_Netcore;
31430 + break;
31431 + case EEPROM_CID_TOSHIBA: // Merge by Jacken, 2008/01/31
31432 + priv->CustomerID = RT_CID_TOSHIBA;
31433 + if(priv->eeprom_ChannelPlan&0x80)
31434 + priv->ChannelPlan = priv->eeprom_ChannelPlan&0x7f;
31435 + else
31436 + priv->ChannelPlan = 0x0;
31437 + RT_TRACE(COMP_INIT, "Toshiba ChannelPlan = 0x%x\n",
31438 + priv->ChannelPlan);
31439 + break;
31440 + case EEPROM_CID_Nettronix:
31441 + priv->ScanDelay = 100; //cosa add for scan
31442 + priv->CustomerID = RT_CID_Nettronix;
31443 + break;
31444 + case EEPROM_CID_Pronet:
31445 + priv->CustomerID = RT_CID_PRONET;
31446 + break;
31447 + case EEPROM_CID_DLINK:
31448 + priv->CustomerID = RT_CID_DLINK;
31449 + break;
31450 +
31451 + case EEPROM_CID_WHQL:
31452 + //Adapter->bInHctTest = TRUE;//do not supported
31453 +
31454 + //priv->bSupportTurboMode = FALSE;
31455 + //priv->bAutoTurboBy8186 = FALSE;
31456 +
31457 + //pMgntInfo->PowerSaveControl.bInactivePs = FALSE;
31458 + //pMgntInfo->PowerSaveControl.bIPSModeBackup = FALSE;
31459 + //pMgntInfo->PowerSaveControl.bLeisurePs = FALSE;
31460 +
31461 + break;
31462 + default:
31463 + // value from RegCustomerID
31464 + break;
31465 + }
31466 +
31467 + //Avoid the channel plan array overflow, by Bruce, 2007-08-27.
31468 + if(priv->ChannelPlan > CHANNEL_PLAN_LEN - 1)
31469 + priv->ChannelPlan = 0; //FCC
31470 +
31471 + switch(priv->CustomerID)
31472 + {
31473 + case RT_CID_DEFAULT:
31474 + #ifdef RTL8190P
31475 + priv->LedStrategy = HW_LED;
31476 + #else
31477 + #ifdef RTL8192E
31478 + priv->LedStrategy = SW_LED_MODE1;
31479 + #endif
31480 + #endif
31481 + break;
31482 +
31483 + case RT_CID_819x_CAMEO:
31484 + priv->LedStrategy = SW_LED_MODE2;
31485 + break;
31486 +
31487 + case RT_CID_819x_RUNTOP:
31488 + priv->LedStrategy = SW_LED_MODE3;
31489 + break;
31490 +
31491 + case RT_CID_819x_Netcore:
31492 + priv->LedStrategy = SW_LED_MODE4;
31493 + break;
31494 +
31495 + case RT_CID_Nettronix:
31496 + priv->LedStrategy = SW_LED_MODE5;
31497 + break;
31498 +
31499 + case RT_CID_PRONET:
31500 + priv->LedStrategy = SW_LED_MODE6;
31501 + break;
31502 +
31503 + case RT_CID_TOSHIBA: //Modify by Jacken 2008/01/31
31504 + // Do nothing.
31505 + //break;
31506 +
31507 + default:
31508 + #ifdef RTL8190P
31509 + priv->LedStrategy = HW_LED;
31510 + #else
31511 + #ifdef RTL8192E
31512 + priv->LedStrategy = SW_LED_MODE1;
31513 + #endif
31514 + #endif
31515 + break;
31516 + }
31517 +/*
31518 + //2008.06.03, for WOL
31519 + if( priv->eeprom_vid == 0x1186 && priv->eeprom_did == 0x3304)
31520 + priv->ieee80211->bSupportRemoteWakeUp = TRUE;
31521 + else
31522 + priv->ieee80211->bSupportRemoteWakeUp = FALSE;
31523 +*/
31524 + RT_TRACE(COMP_INIT, "RegChannelPlan(%d)\n", priv->RegChannelPlan);
31525 + RT_TRACE(COMP_INIT, "ChannelPlan = %d \n", priv->ChannelPlan);
31526 + RT_TRACE(COMP_INIT, "LedStrategy = %d \n", priv->LedStrategy);
31527 + RT_TRACE(COMP_TRACE, "<==== ReadAdapterInfo\n");
31528 +
31529 + return ;
31530 +}
31531 +
31532 +
31533 +static short rtl8192_get_channel_map(struct net_device * dev)
31534 +{
31535 + struct r8192_priv *priv = ieee80211_priv(dev);
31536 +#ifdef ENABLE_DOT11D
31537 + if(priv->ChannelPlan> COUNTRY_CODE_GLOBAL_DOMAIN){
31538 + printk("rtl8180_init:Error channel plan! Set to default.\n");
31539 + priv->ChannelPlan= 0;
31540 + }
31541 + RT_TRACE(COMP_INIT, "Channel plan is %d\n",priv->ChannelPlan);
31542 +
31543 + rtl819x_set_channel_map(priv->ChannelPlan, priv);
31544 +#else
31545 + int ch,i;
31546 + //Set Default Channel Plan
31547 + if(!channels){
31548 + DMESG("No channels, aborting");
31549 + return -1;
31550 + }
31551 + ch=channels;
31552 + priv->ChannelPlan= 0;//hikaru
31553 + // set channels 1..14 allowed in given locale
31554 + for (i=1; i<=14; i++) {
31555 + (priv->ieee80211->channel_map)[i] = (u8)(ch & 0x01);
31556 + ch >>= 1;
31557 + }
31558 +#endif
31559 + return 0;
31560 +}
31561 +
31562 +static short rtl8192_init(struct net_device *dev)
31563 +{
31564 + struct r8192_priv *priv = ieee80211_priv(dev);
31565 + memset(&(priv->stats),0,sizeof(struct Stats));
31566 + rtl8192_init_priv_variable(dev);
31567 + rtl8192_init_priv_lock(priv);
31568 + rtl8192_init_priv_task(dev);
31569 + rtl8192_get_eeprom_size(dev);
31570 + rtl8192_read_eeprom_info(dev);
31571 + rtl8192_get_channel_map(dev);
31572 + init_hal_dm(dev);
31573 + init_timer(&priv->watch_dog_timer);
31574 + priv->watch_dog_timer.data = (unsigned long)dev;
31575 + priv->watch_dog_timer.function = watch_dog_timer_callback;
31576 +#if defined(IRQF_SHARED)
31577 + if(request_irq(dev->irq, (void*)rtl8192_interrupt, IRQF_SHARED, dev->name, dev)){
31578 +#else
31579 + if(request_irq(dev->irq, (void *)rtl8192_interrupt, SA_SHIRQ, dev->name, dev)){
31580 +#endif
31581 + printk("Error allocating IRQ %d",dev->irq);
31582 + return -1;
31583 + }else{
31584 + priv->irq=dev->irq;
31585 + printk("IRQ %d",dev->irq);
31586 + }
31587 + if(rtl8192_pci_initdescring(dev)!=0){
31588 + printk("Endopoints initialization failed");
31589 + return -1;
31590 + }
31591 +
31592 + //rtl8192_rx_enable(dev);
31593 + //rtl8192_adapter_start(dev);
31594 + return 0;
31595 +}
31596 +
31597 +/******************************************************************************
31598 + *function: This function actually only set RRSR, RATR and BW_OPMODE registers
31599 + * not to do all the hw config as its name says
31600 + * input: net_device dev
31601 + * output: none
31602 + * return: none
31603 + * notice: This part need to modified according to the rate set we filtered
31604 + * ****************************************************************************/
31605 +static void rtl8192_hwconfig(struct net_device* dev)
31606 +{
31607 + u32 regRATR = 0, regRRSR = 0;
31608 + u8 regBwOpMode = 0, regTmp = 0;
31609 + struct r8192_priv *priv = ieee80211_priv(dev);
31610 +
31611 +// Set RRSR, RATR, and BW_OPMODE registers
31612 + //
31613 + switch(priv->ieee80211->mode)
31614 + {
31615 + case WIRELESS_MODE_B:
31616 + regBwOpMode = BW_OPMODE_20MHZ;
31617 + regRATR = RATE_ALL_CCK;
31618 + regRRSR = RATE_ALL_CCK;
31619 + break;
31620 + case WIRELESS_MODE_A:
31621 + regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ;
31622 + regRATR = RATE_ALL_OFDM_AG;
31623 + regRRSR = RATE_ALL_OFDM_AG;
31624 + break;
31625 + case WIRELESS_MODE_G:
31626 + regBwOpMode = BW_OPMODE_20MHZ;
31627 + regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
31628 + regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
31629 + break;
31630 + case WIRELESS_MODE_AUTO:
31631 + case WIRELESS_MODE_N_24G:
31632 + // It support CCK rate by default.
31633 + // CCK rate will be filtered out only when associated AP does not support it.
31634 + regBwOpMode = BW_OPMODE_20MHZ;
31635 + regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
31636 + regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
31637 + break;
31638 + case WIRELESS_MODE_N_5G:
31639 + regBwOpMode = BW_OPMODE_5G;
31640 + regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
31641 + regRRSR = RATE_ALL_OFDM_AG;
31642 + break;
31643 + }
31644 +
31645 + write_nic_byte(dev, BW_OPMODE, regBwOpMode);
31646 + {
31647 + u32 ratr_value = 0;
31648 + ratr_value = regRATR;
31649 + if (priv->rf_type == RF_1T2R)
31650 + {
31651 + ratr_value &= ~(RATE_ALL_OFDM_2SS);
31652 + }
31653 + write_nic_dword(dev, RATR0, ratr_value);
31654 + write_nic_byte(dev, UFWP, 1);
31655 + }
31656 + regTmp = read_nic_byte(dev, 0x313);
31657 + regRRSR = ((regTmp) << 24) | (regRRSR & 0x00ffffff);
31658 + write_nic_dword(dev, RRSR, regRRSR);
31659 +
31660 + //
31661 + // Set Retry Limit here
31662 + //
31663 + write_nic_word(dev, RETRY_LIMIT,
31664 + priv->ShortRetryLimit << RETRY_LIMIT_SHORT_SHIFT | \
31665 + priv->LongRetryLimit << RETRY_LIMIT_LONG_SHIFT);
31666 + // Set Contention Window here
31667 +
31668 + // Set Tx AGC
31669 +
31670 + // Set Tx Antenna including Feedback control
31671 +
31672 + // Set Auto Rate fallback control
31673 +
31674 +
31675 +}
31676 +
31677 +
31678 +static RT_STATUS rtl8192_adapter_start(struct net_device *dev)
31679 +{
31680 + struct r8192_priv *priv = ieee80211_priv(dev);
31681 +// struct ieee80211_device *ieee = priv->ieee80211;
31682 + u32 ulRegRead;
31683 + RT_STATUS rtStatus = RT_STATUS_SUCCESS;
31684 +// static char szMACPHYRegFile[] = RTL819X_PHY_MACPHY_REG;
31685 +// static char szMACPHYRegPGFile[] = RTL819X_PHY_MACPHY_REG_PG;
31686 + //u8 eRFPath;
31687 + u8 tmpvalue;
31688 +#ifdef RTL8192E
31689 + u8 ICVersion,SwitchingRegulatorOutput;
31690 +#endif
31691 + bool bfirmwareok = true;
31692 +#ifdef RTL8190P
31693 + u8 ucRegRead;
31694 +#endif
31695 + u32 tmpRegA, tmpRegC, TempCCk;
31696 + int i =0;
31697 +// u32 dwRegRead = 0;
31698 +
31699 + RT_TRACE(COMP_INIT, "====>%s()\n", __FUNCTION__);
31700 + priv->being_init_adapter = true;
31701 + rtl8192_pci_resetdescring(dev);
31702 + // 2007/11/02 MH Before initalizing RF. We can not use FW to do RF-R/W.
31703 + priv->Rf_Mode = RF_OP_By_SW_3wire;
31704 +#ifdef RTL8192E
31705 + //dPLL on
31706 + if(priv->ResetProgress == RESET_TYPE_NORESET)
31707 + {
31708 + write_nic_byte(dev, ANAPAR, 0x37);
31709 + // Accordign to designer's explain, LBUS active will never > 10ms. We delay 10ms
31710 + // Joseph increae the time to prevent firmware download fail
31711 + mdelay(500);
31712 + }
31713 +#endif
31714 + //PlatformSleepUs(10000);
31715 + // For any kind of InitializeAdapter process, we shall use system now!!
31716 + priv->pFirmware->firmware_status = FW_STATUS_0_INIT;
31717 +
31718 + // Set to eRfoff in order not to count receive count.
31719 + if(priv->RegRfOff == TRUE)
31720 + priv->ieee80211->eRFPowerState = eRfOff;
31721 +
31722 + //
31723 + //3 //Config CPUReset Register
31724 + //3//
31725 + //3 Firmware Reset Or Not
31726 + ulRegRead = read_nic_dword(dev, CPU_GEN);
31727 + if(priv->pFirmware->firmware_status == FW_STATUS_0_INIT)
31728 + { //called from MPInitialized. do nothing
31729 + ulRegRead |= CPU_GEN_SYSTEM_RESET;
31730 + }else if(priv->pFirmware->firmware_status == FW_STATUS_5_READY)
31731 + ulRegRead |= CPU_GEN_FIRMWARE_RESET; // Called from MPReset
31732 + else
31733 + RT_TRACE(COMP_ERR, "ERROR in %s(): undefined firmware state(%d)\n", __FUNCTION__, priv->pFirmware->firmware_status);
31734 +
31735 +#ifdef RTL8190P
31736 + //2008.06.03, for WOL 90 hw bug
31737 + ulRegRead &= (~(CPU_GEN_GPIO_UART));
31738 +#endif
31739 +
31740 + write_nic_dword(dev, CPU_GEN, ulRegRead);
31741 + //mdelay(100);
31742 +
31743 +#ifdef RTL8192E
31744 +
31745 + //3//
31746 + //3 //Fix the issue of E-cut high temperature issue
31747 + //3//
31748 + // TODO: E cut only
31749 + ICVersion = read_nic_byte(dev, IC_VERRSION);
31750 + if(ICVersion >= 0x4) //E-cut only
31751 + {
31752 + // HW SD suggest that we should not wirte this register too often, so driver
31753 + // should readback this register. This register will be modified only when
31754 + // power on reset
31755 + SwitchingRegulatorOutput = read_nic_byte(dev, SWREGULATOR);
31756 + if(SwitchingRegulatorOutput != 0xb8)
31757 + {
31758 + write_nic_byte(dev, SWREGULATOR, 0xa8);
31759 + mdelay(1);
31760 + write_nic_byte(dev, SWREGULATOR, 0xb8);
31761 + }
31762 + }
31763 +#endif
31764 +
31765 +
31766 + //3//
31767 + //3// Initialize BB before MAC
31768 + //3//
31769 + RT_TRACE(COMP_INIT, "BB Config Start!\n");
31770 + rtStatus = rtl8192_BBConfig(dev);
31771 + if(rtStatus != RT_STATUS_SUCCESS)
31772 + {
31773 + RT_TRACE(COMP_ERR, "BB Config failed\n");
31774 + return rtStatus;
31775 + }
31776 + RT_TRACE(COMP_INIT,"BB Config Finished!\n");
31777 +
31778 + //3//Set Loopback mode or Normal mode
31779 + //3//
31780 + //2006.12.13 by emily. Note!We should not merge these two CPU_GEN register writings
31781 + // because setting of System_Reset bit reset MAC to default transmission mode.
31782 + //Loopback mode or not
31783 + priv->LoopbackMode = RTL819X_NO_LOOPBACK;
31784 + //priv->LoopbackMode = RTL819X_MAC_LOOPBACK;
31785 + if(priv->ResetProgress == RESET_TYPE_NORESET)
31786 + {
31787 + ulRegRead = read_nic_dword(dev, CPU_GEN);
31788 + if(priv->LoopbackMode == RTL819X_NO_LOOPBACK)
31789 + {
31790 + ulRegRead = ((ulRegRead & CPU_GEN_NO_LOOPBACK_MSK) | CPU_GEN_NO_LOOPBACK_SET);
31791 + }
31792 + else if (priv->LoopbackMode == RTL819X_MAC_LOOPBACK )
31793 + {
31794 + ulRegRead |= CPU_CCK_LOOPBACK;
31795 + }
31796 + else
31797 + {
31798 + RT_TRACE(COMP_ERR,"Serious error: wrong loopback mode setting\n");
31799 + }
31800 +
31801 + //2008.06.03, for WOL
31802 + //ulRegRead &= (~(CPU_GEN_GPIO_UART));
31803 + write_nic_dword(dev, CPU_GEN, ulRegRead);
31804 +
31805 + // 2006.11.29. After reset cpu, we sholud wait for a second, otherwise, it may fail to write registers. Emily
31806 + udelay(500);
31807 + }
31808 + //3Set Hardware(Do nothing now)
31809 + rtl8192_hwconfig(dev);
31810 + //2=======================================================
31811 + // Common Setting for all of the FPGA platform. (part 1)
31812 + //2=======================================================
31813 + // If there is changes, please make sure it applies to all of the FPGA version
31814 + //3 Turn on Tx/Rx
31815 + write_nic_byte(dev, CMDR, CR_RE|CR_TE);
31816 +
31817 + //2Set Tx dma burst
31818 +#ifdef RTL8190P
31819 + write_nic_byte(dev, PCIF, ((MXDMA2_NoLimit<<MXDMA2_RX_SHIFT) | \
31820 + (MXDMA2_NoLimit<<MXDMA2_TX_SHIFT) | \
31821 + (1<<MULRW_SHIFT)));
31822 +#else
31823 + #ifdef RTL8192E
31824 + write_nic_byte(dev, PCIF, ((MXDMA2_NoLimit<<MXDMA2_RX_SHIFT) |\
31825 + (MXDMA2_NoLimit<<MXDMA2_TX_SHIFT) ));
31826 + #endif
31827 +#endif
31828 + //set IDR0 here
31829 + write_nic_dword(dev, MAC0, ((u32*)dev->dev_addr)[0]);
31830 + write_nic_word(dev, MAC4, ((u16*)(dev->dev_addr + 4))[0]);
31831 + //set RCR
31832 + write_nic_dword(dev, RCR, priv->ReceiveConfig);
31833 +
31834 + //3 Initialize Number of Reserved Pages in Firmware Queue
31835 + #ifdef TO_DO_LIST
31836 + if(priv->bInHctTest)
31837 + {
31838 + PlatformEFIOWrite4Byte(Adapter, RQPN1, NUM_OF_PAGE_IN_FW_QUEUE_BK_DTM << RSVD_FW_QUEUE_PAGE_BK_SHIFT |\
31839 + NUM_OF_PAGE_IN_FW_QUEUE_BE_DTM << RSVD_FW_QUEUE_PAGE_BE_SHIFT | \
31840 + NUM_OF_PAGE_IN_FW_QUEUE_VI_DTM << RSVD_FW_QUEUE_PAGE_VI_SHIFT | \
31841 + NUM_OF_PAGE_IN_FW_QUEUE_VO_DTM <<RSVD_FW_QUEUE_PAGE_VO_SHIFT);
31842 + PlatformEFIOWrite4Byte(Adapter, RQPN2, NUM_OF_PAGE_IN_FW_QUEUE_MGNT << RSVD_FW_QUEUE_PAGE_MGNT_SHIFT);
31843 + PlatformEFIOWrite4Byte(Adapter, RQPN3, APPLIED_RESERVED_QUEUE_IN_FW| \
31844 + NUM_OF_PAGE_IN_FW_QUEUE_BCN<<RSVD_FW_QUEUE_PAGE_BCN_SHIFT|\
31845 + NUM_OF_PAGE_IN_FW_QUEUE_PUB_DTM<<RSVD_FW_QUEUE_PAGE_PUB_SHIFT);
31846 + }
31847 + else
31848 + #endif
31849 + {
31850 + write_nic_dword(dev, RQPN1, NUM_OF_PAGE_IN_FW_QUEUE_BK << RSVD_FW_QUEUE_PAGE_BK_SHIFT |\
31851 + NUM_OF_PAGE_IN_FW_QUEUE_BE << RSVD_FW_QUEUE_PAGE_BE_SHIFT | \
31852 + NUM_OF_PAGE_IN_FW_QUEUE_VI << RSVD_FW_QUEUE_PAGE_VI_SHIFT | \
31853 + NUM_OF_PAGE_IN_FW_QUEUE_VO <<RSVD_FW_QUEUE_PAGE_VO_SHIFT);
31854 + write_nic_dword(dev, RQPN2, NUM_OF_PAGE_IN_FW_QUEUE_MGNT << RSVD_FW_QUEUE_PAGE_MGNT_SHIFT);
31855 + write_nic_dword(dev, RQPN3, APPLIED_RESERVED_QUEUE_IN_FW| \
31856 + NUM_OF_PAGE_IN_FW_QUEUE_BCN<<RSVD_FW_QUEUE_PAGE_BCN_SHIFT|\
31857 + NUM_OF_PAGE_IN_FW_QUEUE_PUB<<RSVD_FW_QUEUE_PAGE_PUB_SHIFT);
31858 + }
31859 +
31860 + rtl8192_tx_enable(dev);
31861 + rtl8192_rx_enable(dev);
31862 + //3Set Response Rate Setting Register
31863 + // CCK rate is supported by default.
31864 + // CCK rate will be filtered out only when associated AP does not support it.
31865 + ulRegRead = (0xFFF00000 & read_nic_dword(dev, RRSR)) | RATE_ALL_OFDM_AG | RATE_ALL_CCK;
31866 + write_nic_dword(dev, RRSR, ulRegRead);
31867 + write_nic_dword(dev, RATR0+4*7, (RATE_ALL_OFDM_AG | RATE_ALL_CCK));
31868 +
31869 + //2Set AckTimeout
31870 + // TODO: (it value is only for FPGA version). need to be changed!!2006.12.18, by Emily
31871 + write_nic_byte(dev, ACK_TIMEOUT, 0x30);
31872 +
31873 + //rtl8192_actset_wirelessmode(dev,priv->RegWirelessMode);
31874 + if(priv->ResetProgress == RESET_TYPE_NORESET)
31875 + rtl8192_SetWirelessMode(dev, priv->ieee80211->mode);
31876 + //-----------------------------------------------------------------------------
31877 + // Set up security related. 070106, by rcnjko:
31878 + // 1. Clear all H/W keys.
31879 + // 2. Enable H/W encryption/decryption.
31880 + //-----------------------------------------------------------------------------
31881 + CamResetAllEntry(dev);
31882 + {
31883 + u8 SECR_value = 0x0;
31884 + SECR_value |= SCR_TxEncEnable;
31885 + SECR_value |= SCR_RxDecEnable;
31886 + SECR_value |= SCR_NoSKMC;
31887 + write_nic_byte(dev, SECR, SECR_value);
31888 + }
31889 + //3Beacon related
31890 + write_nic_word(dev, ATIMWND, 2);
31891 + write_nic_word(dev, BCN_INTERVAL, 100);
31892 + for (i=0; i<QOS_QUEUE_NUM; i++)
31893 + write_nic_dword(dev, WDCAPARA_ADD[i], 0x005e4332);
31894 + //
31895 + // Switching regulator controller: This is set temporarily.
31896 + // It's not sure if this can be removed in the future.
31897 + // PJ advised to leave it by default.
31898 + //
31899 + write_nic_byte(dev, 0xbe, 0xc0);
31900 +
31901 + //2=======================================================
31902 + // Set PHY related configuration defined in MAC register bank
31903 + //2=======================================================
31904 + rtl8192_phy_configmac(dev);
31905 +
31906 + if (priv->card_8192_version > (u8) VERSION_8190_BD) {
31907 + rtl8192_phy_getTxPower(dev);
31908 + rtl8192_phy_setTxPower(dev, priv->chan);
31909 + }
31910 +
31911 + //if D or C cut
31912 + tmpvalue = read_nic_byte(dev, IC_VERRSION);
31913 + priv->IC_Cut = tmpvalue;
31914 + RT_TRACE(COMP_INIT, "priv->IC_Cut = 0x%x\n", priv->IC_Cut);
31915 + if(priv->IC_Cut >= IC_VersionCut_D)
31916 + {
31917 + //pHalData->bDcut = TRUE;
31918 + if(priv->IC_Cut == IC_VersionCut_D)
31919 + RT_TRACE(COMP_INIT, "D-cut\n");
31920 + if(priv->IC_Cut == IC_VersionCut_E)
31921 + {
31922 + RT_TRACE(COMP_INIT, "E-cut\n");
31923 + // HW SD suggest that we should not wirte this register too often, so driver
31924 + // should readback this register. This register will be modified only when
31925 + // power on reset
31926 + }
31927 + }
31928 + else
31929 + {
31930 + //pHalData->bDcut = FALSE;
31931 + RT_TRACE(COMP_INIT, "Before C-cut\n");
31932 + }
31933 +
31934 +#if 1
31935 + //Firmware download
31936 + RT_TRACE(COMP_INIT, "Load Firmware!\n");
31937 + bfirmwareok = init_firmware(dev);
31938 + if(bfirmwareok != true) {
31939 + rtStatus = RT_STATUS_FAILURE;
31940 + return rtStatus;
31941 + }
31942 + RT_TRACE(COMP_INIT, "Load Firmware finished!\n");
31943 +#endif
31944 + //RF config
31945 + if(priv->ResetProgress == RESET_TYPE_NORESET)
31946 + {
31947 + RT_TRACE(COMP_INIT, "RF Config Started!\n");
31948 + rtStatus = rtl8192_phy_RFConfig(dev);
31949 + if(rtStatus != RT_STATUS_SUCCESS)
31950 + {
31951 + RT_TRACE(COMP_ERR, "RF Config failed\n");
31952 + return rtStatus;
31953 + }
31954 + RT_TRACE(COMP_INIT, "RF Config Finished!\n");
31955 + }
31956 + rtl8192_phy_updateInitGain(dev);
31957 +
31958 + /*---- Set CCK and OFDM Block "ON"----*/
31959 + rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn, 0x1);
31960 + rtl8192_setBBreg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1);
31961 +
31962 +#ifdef RTL8192E
31963 + //Enable Led
31964 + write_nic_byte(dev, 0x87, 0x0);
31965 +#endif
31966 +#ifdef RTL8190P
31967 + //2008.06.03, for WOL
31968 + ucRegRead = read_nic_byte(dev, GPE);
31969 + ucRegRead |= BIT0;
31970 + write_nic_byte(dev, GPE, ucRegRead);
31971 +
31972 + ucRegRead = read_nic_byte(dev, GPO);
31973 + ucRegRead &= ~BIT0;
31974 + write_nic_byte(dev, GPO, ucRegRead);
31975 +#endif
31976 +
31977 + //2=======================================================
31978 + // RF Power Save
31979 + //2=======================================================
31980 +#ifdef ENABLE_IPS
31981 +
31982 +{
31983 + if(priv->RegRfOff == TRUE)
31984 + { // User disable RF via registry.
31985 + RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for RegRfOff ----------\n",__FUNCTION__);
31986 + MgntActSet_RF_State(dev, eRfOff, RF_CHANGE_BY_SW);
31987 +#if 0//cosa, ask SD3 willis and he doesn't know what is this for
31988 + // Those action will be discard in MgntActSet_RF_State because off the same state
31989 + for(eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
31990 + PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)eRFPath, 0x4, 0xC00, 0x0);
31991 +#endif
31992 + }
31993 + else if(priv->ieee80211->RfOffReason > RF_CHANGE_BY_PS)
31994 + { // H/W or S/W RF OFF before sleep.
31995 + RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for RfOffReason(%d) ----------\n", __FUNCTION__,priv->ieee80211->RfOffReason);
31996 + MgntActSet_RF_State(dev, eRfOff, priv->ieee80211->RfOffReason);
31997 + }
31998 + else if(priv->ieee80211->RfOffReason >= RF_CHANGE_BY_IPS)
31999 + { // H/W or S/W RF OFF before sleep.
32000 + RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for RfOffReason(%d) ----------\n", __FUNCTION__,priv->ieee80211->RfOffReason);
32001 + MgntActSet_RF_State(dev, eRfOff, priv->ieee80211->RfOffReason);
32002 + }
32003 + else
32004 + {
32005 + RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): RF-ON \n",__FUNCTION__);
32006 + priv->ieee80211->eRFPowerState = eRfOn;
32007 + priv->ieee80211->RfOffReason = 0;
32008 + //DrvIFIndicateCurrentPhyStatus(Adapter);
32009 + // LED control
32010 + //Adapter->HalFunc.LedControlHandler(Adapter, LED_CTL_POWER_ON);
32011 +
32012 + //
32013 + // If inactive power mode is enabled, disable rf while in disconnected state.
32014 + // But we should still tell upper layer we are in rf on state.
32015 + // 2007.07.16, by shien chang.
32016 + //
32017 + //if(!Adapter->bInHctTest)
32018 + //IPSEnter(Adapter);
32019 +
32020 + }
32021 +}
32022 +#endif
32023 + if(1){
32024 +#ifdef RTL8192E
32025 + // We can force firmware to do RF-R/W
32026 + if(priv->ieee80211->FwRWRF)
32027 + priv->Rf_Mode = RF_OP_By_FW;
32028 + else
32029 + priv->Rf_Mode = RF_OP_By_SW_3wire;
32030 +#else
32031 + priv->Rf_Mode = RF_OP_By_SW_3wire;
32032 +#endif
32033 + }
32034 +#ifdef RTL8190P
32035 + if(priv->ResetProgress == RESET_TYPE_NORESET)
32036 + {
32037 + dm_initialize_txpower_tracking(dev);
32038 +
32039 + tmpRegA= rtl8192_QueryBBReg(dev,rOFDM0_XATxIQImbalance,bMaskDWord);
32040 + tmpRegC= rtl8192_QueryBBReg(dev,rOFDM0_XCTxIQImbalance,bMaskDWord);
32041 +
32042 + if(priv->rf_type == RF_2T4R){
32043 + for(i = 0; i<TxBBGainTableLength; i++)
32044 + {
32045 + if(tmpRegA == priv->txbbgain_table[i].txbbgain_value)
32046 + {
32047 + priv->rfa_txpowertrackingindex= (u8)i;
32048 + priv->rfa_txpowertrackingindex_real= (u8)i;
32049 + priv->rfa_txpowertracking_default = priv->rfa_txpowertrackingindex;
32050 + break;
32051 + }
32052 + }
32053 + }
32054 + for(i = 0; i<TxBBGainTableLength; i++)
32055 + {
32056 + if(tmpRegC == priv->txbbgain_table[i].txbbgain_value)
32057 + {
32058 + priv->rfc_txpowertrackingindex= (u8)i;
32059 + priv->rfc_txpowertrackingindex_real= (u8)i;
32060 + priv->rfc_txpowertracking_default = priv->rfc_txpowertrackingindex;
32061 + break;
32062 + }
32063 + }
32064 + TempCCk = rtl8192_QueryBBReg(dev, rCCK0_TxFilter1, bMaskByte2);
32065 +
32066 + for(i=0 ; i<CCKTxBBGainTableLength ; i++)
32067 + {
32068 + if(TempCCk == priv->cck_txbbgain_table[i].ccktxbb_valuearray[0])
32069 + {
32070 + priv->CCKPresentAttentuation_20Mdefault =(u8) i;
32071 + break;
32072 + }
32073 + }
32074 + priv->CCKPresentAttentuation_40Mdefault = 0;
32075 + priv->CCKPresentAttentuation_difference = 0;
32076 + priv->CCKPresentAttentuation = priv->CCKPresentAttentuation_20Mdefault;
32077 + RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_initial = %d\n", priv->rfa_txpowertrackingindex);
32078 + RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_real__initial = %d\n", priv->rfa_txpowertrackingindex_real);
32079 + RT_TRACE(COMP_POWER_TRACKING, "priv->rfc_txpowertrackingindex_initial = %d\n", priv->rfc_txpowertrackingindex);
32080 + RT_TRACE(COMP_POWER_TRACKING, "priv->rfc_txpowertrackingindex_real_initial = %d\n", priv->rfc_txpowertrackingindex_real);
32081 + RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_difference_initial = %d\n", priv->CCKPresentAttentuation_difference);
32082 + RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_initial = %d\n", priv->CCKPresentAttentuation);
32083 + }
32084 +#else
32085 + #ifdef RTL8192E
32086 + if(priv->ResetProgress == RESET_TYPE_NORESET)
32087 + {
32088 + dm_initialize_txpower_tracking(dev);
32089 +
32090 + if(priv->IC_Cut >= IC_VersionCut_D)
32091 + {
32092 + tmpRegA= rtl8192_QueryBBReg(dev,rOFDM0_XATxIQImbalance,bMaskDWord);
32093 + tmpRegC= rtl8192_QueryBBReg(dev,rOFDM0_XCTxIQImbalance,bMaskDWord);
32094 + for(i = 0; i<TxBBGainTableLength; i++)
32095 + {
32096 + if(tmpRegA == priv->txbbgain_table[i].txbbgain_value)
32097 + {
32098 + priv->rfa_txpowertrackingindex= (u8)i;
32099 + priv->rfa_txpowertrackingindex_real= (u8)i;
32100 + priv->rfa_txpowertracking_default = priv->rfa_txpowertrackingindex;
32101 + break;
32102 + }
32103 + }
32104 +
32105 + TempCCk = rtl8192_QueryBBReg(dev, rCCK0_TxFilter1, bMaskByte2);
32106 +
32107 + for(i=0 ; i<CCKTxBBGainTableLength ; i++)
32108 + {
32109 + if(TempCCk == priv->cck_txbbgain_table[i].ccktxbb_valuearray[0])
32110 + {
32111 + priv->CCKPresentAttentuation_20Mdefault =(u8) i;
32112 + break;
32113 + }
32114 + }
32115 + priv->CCKPresentAttentuation_40Mdefault = 0;
32116 + priv->CCKPresentAttentuation_difference = 0;
32117 + priv->CCKPresentAttentuation = priv->CCKPresentAttentuation_20Mdefault;
32118 + RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_initial = %d\n", priv->rfa_txpowertrackingindex);
32119 + RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_real__initial = %d\n", priv->rfa_txpowertrackingindex_real);
32120 + RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_difference_initial = %d\n", priv->CCKPresentAttentuation_difference);
32121 + RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_initial = %d\n", priv->CCKPresentAttentuation);
32122 + priv->btxpower_tracking = FALSE;//TEMPLY DISABLE
32123 + }
32124 + }
32125 + #endif
32126 +#endif
32127 + rtl8192_irq_enable(dev);
32128 + priv->being_init_adapter = false;
32129 + return rtStatus;
32130 +
32131 +}
32132 +
32133 +void rtl8192_prepare_beacon(struct r8192_priv *priv)
32134 +{
32135 + struct sk_buff *skb;
32136 + //unsigned long flags;
32137 + cb_desc *tcb_desc;
32138 +
32139 + skb = ieee80211_get_beacon(priv->ieee80211);
32140 + tcb_desc = (cb_desc *)(skb->cb + 8);
32141 + //printk("===========> %s\n", __FUNCTION__);
32142 + //spin_lock_irqsave(&priv->tx_lock,flags);
32143 + /* prepare misc info for the beacon xmit */
32144 + tcb_desc->queue_index = BEACON_QUEUE;
32145 + /* IBSS does not support HT yet, use 1M defautly */
32146 + tcb_desc->data_rate = 2;
32147 + tcb_desc->RATRIndex = 7;
32148 + tcb_desc->bTxDisableRateFallBack = 1;
32149 + tcb_desc->bTxUseDriverAssingedRate = 1;
32150 +
32151 + skb_push(skb, priv->ieee80211->tx_headroom);
32152 + if(skb){
32153 + rtl8192_tx(priv->ieee80211->dev,skb);
32154 + }
32155 + //spin_unlock_irqrestore (&priv->tx_lock, flags);
32156 +}
32157 +
32158 +#if 0
32159 +void rtl8192_beacon_tx_enable(struct net_device *dev)
32160 +{
32161 + struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
32162 +
32163 + rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
32164 +#ifdef CONFIG_RTL8185B
32165 + priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_BQ);MgntQuery_MgntFrameTxRateMgntQuery_MgntFrameTxRate
32166 + write_nic_byte(dev,TPPollStop, priv->dma_poll_mask);
32167 +#else
32168 + priv->dma_poll_mask &=~(1<<TX_DMA_STOP_BEACON_SHIFT);
32169 + write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
32170 +#endif
32171 + rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
32172 +}
32173 +#endif
32174 +
32175 +
32176 +/* this configures registers for beacon tx and enables it via
32177 + * rtl8192_beacon_tx_enable(). rtl8192_beacon_tx_disable() might
32178 + * be used to stop beacon transmission
32179 + */
32180 +void rtl8192_start_beacon(struct net_device *dev)
32181 +{
32182 + struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
32183 + struct ieee80211_network *net = &priv->ieee80211->current_network;
32184 + u16 BcnTimeCfg = 0;
32185 + u16 BcnCW = 6;
32186 + u16 BcnIFS = 0xf;
32187 +
32188 + DMESG("Enabling beacon TX");
32189 + //rtl8192_prepare_beacon(dev);
32190 + rtl8192_irq_disable(dev);
32191 + //rtl8192_beacon_tx_enable(dev);
32192 +
32193 + /* ATIM window */
32194 + write_nic_word(dev, ATIMWND, 2);
32195 +
32196 + /* Beacon interval (in unit of TU) */
32197 + write_nic_word(dev, BCN_INTERVAL, net->beacon_interval);
32198 +
32199 + /*
32200 + * DrvErlyInt (in unit of TU).
32201 + * (Time to send interrupt to notify driver to c
32202 + * hange beacon content)
32203 + * */
32204 + write_nic_word(dev, BCN_DRV_EARLY_INT, 10);
32205 +
32206 + /*
32207 + * BcnDMATIM(in unit of us).
32208 + * Indicates the time before TBTT to perform beacon queue DMA
32209 + * */
32210 + write_nic_word(dev, BCN_DMATIME, 256);
32211 +
32212 + /*
32213 + * Force beacon frame transmission even after receiving
32214 + * beacon frame from other ad hoc STA
32215 + * */
32216 + write_nic_byte(dev, BCN_ERR_THRESH, 100);
32217 +
32218 + /* Set CW and IFS */
32219 + BcnTimeCfg |= BcnCW<<BCN_TCFG_CW_SHIFT;
32220 + BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
32221 + write_nic_word(dev, BCN_TCFG, BcnTimeCfg);
32222 +
32223 +
32224 + /* enable the interrupt for ad-hoc process */
32225 + rtl8192_irq_enable(dev);
32226 +}
32227 +/***************************************************************************
32228 + -------------------------------NET STUFF---------------------------
32229 +***************************************************************************/
32230 +#if 0
32231 +static struct net_device_stats *rtl8192_stats(struct net_device *dev)
32232 +{
32233 + struct r8192_priv *priv = ieee80211_priv(dev);
32234 +
32235 + return &priv->ieee80211->stats;
32236 +}
32237 +#endif
32238 +
32239 +
32240 +
32241 +static bool HalTxCheckStuck8190Pci(struct net_device *dev)
32242 +{
32243 + u16 RegTxCounter = read_nic_word(dev, 0x128);
32244 + struct r8192_priv *priv = ieee80211_priv(dev);
32245 + bool bStuck = FALSE;
32246 + RT_TRACE(COMP_RESET,"%s():RegTxCounter is %d,TxCounter is %d\n",__FUNCTION__,RegTxCounter,priv->TxCounter);
32247 + if(priv->TxCounter==RegTxCounter)
32248 + bStuck = TRUE;
32249 +
32250 + priv->TxCounter = RegTxCounter;
32251 +
32252 + return bStuck;
32253 +}
32254 +
32255 +/*
32256 +* <Assumption: RT_TX_SPINLOCK is acquired.>
32257 +* First added: 2006.11.19 by emily
32258 +*/
32259 +static RESET_TYPE
32260 +TxCheckStuck(struct net_device *dev)
32261 +{
32262 + struct r8192_priv *priv = ieee80211_priv(dev);
32263 + u8 QueueID;
32264 + ptx_ring head=NULL,tail=NULL,txring = NULL;
32265 + u8 ResetThreshold = NIC_SEND_HANG_THRESHOLD_POWERSAVE;
32266 + bool bCheckFwTxCnt = false;
32267 + //unsigned long flags;
32268 +
32269 + //
32270 + // Decide Stuch threshold according to current power save mode
32271 + //
32272 + //printk("++++++++++++>%s()\n",__FUNCTION__);
32273 + switch (priv->ieee80211->dot11PowerSaveMode)
32274 + {
32275 + // The threshold value may required to be adjusted .
32276 + case eActive: // Active/Continuous access.
32277 + ResetThreshold = NIC_SEND_HANG_THRESHOLD_NORMAL;
32278 + break;
32279 + case eMaxPs: // Max power save mode.
32280 + ResetThreshold = NIC_SEND_HANG_THRESHOLD_POWERSAVE;
32281 + break;
32282 + case eFastPs: // Fast power save mode.
32283 + ResetThreshold = NIC_SEND_HANG_THRESHOLD_POWERSAVE;
32284 + break;
32285 + }
32286 +
32287 + //
32288 + // Check whether specific tcb has been queued for a specific time
32289 + //
32290 + for(QueueID = 0; QueueID < MAX_TX_QUEUE; QueueID++)
32291 + {
32292 +
32293 +
32294 + if(QueueID == TXCMD_QUEUE)
32295 + continue;
32296 +
32297 + switch(QueueID) {
32298 + case MGNT_QUEUE:
32299 + tail=priv->txmapringtail;
32300 + head=priv->txmapringhead;
32301 + break;
32302 +
32303 + case BK_QUEUE:
32304 + tail=priv->txbkpringtail;
32305 + head=priv->txbkpringhead;
32306 + break;
32307 +
32308 + case BE_QUEUE:
32309 + tail=priv->txbepringtail;
32310 + head=priv->txbepringhead;
32311 + break;
32312 +
32313 + case VI_QUEUE:
32314 + tail=priv->txvipringtail;
32315 + head=priv->txvipringhead;
32316 + break;
32317 +
32318 + case VO_QUEUE:
32319 + tail=priv->txvopringtail;
32320 + head=priv->txvopringhead;
32321 + break;
32322 +
32323 + default:
32324 + tail=head=NULL;
32325 + break;
32326 + }
32327 +
32328 + if(tail == head)
32329 + continue;
32330 + else
32331 + {
32332 + txring = head;
32333 + if(txring == NULL)
32334 + {
32335 + RT_TRACE(COMP_ERR,"%s():txring is NULL , BUG!\n",__FUNCTION__);
32336 + continue;
32337 + }
32338 + txring->nStuckCount++;
32339 + #if 0
32340 + if(txring->nStuckCount > ResetThreshold)
32341 + {
32342 + RT_TRACE( COMP_RESET, "<== TxCheckStuck()\n" );
32343 + return RESET_TYPE_NORMAL;
32344 + }
32345 + #endif
32346 + bCheckFwTxCnt = TRUE;
32347 + }
32348 + }
32349 +#if 1
32350 + if(bCheckFwTxCnt)
32351 + {
32352 + if(HalTxCheckStuck8190Pci(dev))
32353 + {
32354 + RT_TRACE(COMP_RESET, "TxCheckStuck(): Fw indicates no Tx condition! \n");
32355 + return RESET_TYPE_SILENT;
32356 + }
32357 + }
32358 +#endif
32359 + return RESET_TYPE_NORESET;
32360 +}
32361 +
32362 +
32363 +static bool HalRxCheckStuck8190Pci(struct net_device *dev)
32364 +{
32365 + struct r8192_priv *priv = ieee80211_priv(dev);
32366 + u16 RegRxCounter = read_nic_word(dev, 0x130);
32367 + bool bStuck = FALSE;
32368 + static u8 rx_chk_cnt = 0;
32369 + RT_TRACE(COMP_RESET,"%s(): RegRxCounter is %d,RxCounter is %d\n",__FUNCTION__,RegRxCounter,priv->RxCounter);
32370 + // If rssi is small, we should check rx for long time because of bad rx.
32371 + // or maybe it will continuous silent reset every 2 seconds.
32372 + rx_chk_cnt++;
32373 + if(priv->undecorated_smoothed_pwdb >= (RateAdaptiveTH_High+5))
32374 + {
32375 + rx_chk_cnt = 0; //high rssi, check rx stuck right now.
32376 + }
32377 + else if(priv->undecorated_smoothed_pwdb < (RateAdaptiveTH_High+5) &&
32378 + ((priv->CurrentChannelBW!=HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb>=RateAdaptiveTH_Low_40M) ||
32379 + (priv->CurrentChannelBW==HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb>=RateAdaptiveTH_Low_20M)) )
32380 +
32381 + {
32382 + if(rx_chk_cnt < 2)
32383 + {
32384 + return bStuck;
32385 + }
32386 + else
32387 + {
32388 + rx_chk_cnt = 0;
32389 + }
32390 + }
32391 + else if(((priv->CurrentChannelBW!=HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb<RateAdaptiveTH_Low_40M) ||
32392 + (priv->CurrentChannelBW==HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb<RateAdaptiveTH_Low_20M)) &&
32393 + priv->undecorated_smoothed_pwdb >= VeryLowRSSI)
32394 + {
32395 + if(rx_chk_cnt < 4)
32396 + {
32397 + //DbgPrint("RSSI < %d && RSSI >= %d, no check this time \n", RateAdaptiveTH_Low, VeryLowRSSI);
32398 + return bStuck;
32399 + }
32400 + else
32401 + {
32402 + rx_chk_cnt = 0;
32403 + //DbgPrint("RSSI < %d && RSSI >= %d, check this time \n", RateAdaptiveTH_Low, VeryLowRSSI);
32404 + }
32405 + }
32406 + else
32407 + {
32408 + if(rx_chk_cnt < 8)
32409 + {
32410 + //DbgPrint("RSSI <= %d, no check this time \n", VeryLowRSSI);
32411 + return bStuck;
32412 + }
32413 + else
32414 + {
32415 + rx_chk_cnt = 0;
32416 + //DbgPrint("RSSI <= %d, check this time \n", VeryLowRSSI);
32417 + }
32418 + }
32419 +#if 0
32420 + if (rx_chk_cnt < 2)
32421 + return bStuck;
32422 + else
32423 + rx_chk_cnt = 0;
32424 +#endif
32425 + if(priv->RxCounter==RegRxCounter)
32426 + bStuck = TRUE;
32427 +
32428 + priv->RxCounter = RegRxCounter;
32429 +
32430 + return bStuck;
32431 +}
32432 +
32433 +static RESET_TYPE RxCheckStuck(struct net_device *dev)
32434 +{
32435 +
32436 + if(HalRxCheckStuck8190Pci(dev))
32437 + {
32438 + RT_TRACE(COMP_RESET, "RxStuck Condition\n");
32439 + return RESET_TYPE_SILENT;
32440 + }
32441 +
32442 + return RESET_TYPE_NORESET;
32443 +}
32444 +
32445 +static RESET_TYPE
32446 +rtl819x_ifcheck_resetornot(struct net_device *dev)
32447 +{
32448 + struct r8192_priv *priv = ieee80211_priv(dev);
32449 + RESET_TYPE TxResetType = RESET_TYPE_NORESET;
32450 + RESET_TYPE RxResetType = RESET_TYPE_NORESET;
32451 + RT_RF_POWER_STATE rfState;
32452 +
32453 + rfState = priv->ieee80211->eRFPowerState;
32454 +
32455 + TxResetType = TxCheckStuck(dev);
32456 +#if 1
32457 + if( rfState != eRfOff &&
32458 + /*ADAPTER_TEST_STATUS_FLAG(Adapter, ADAPTER_STATUS_FW_DOWNLOAD_FAILURE)) &&*/
32459 + (priv->ieee80211->iw_mode != IW_MODE_ADHOC))
32460 + {
32461 + // If driver is in the status of firmware download failure , driver skips RF initialization and RF is
32462 + // in turned off state. Driver should check whether Rx stuck and do silent reset. And
32463 + // if driver is in firmware download failure status, driver should initialize RF in the following
32464 + // silent reset procedure Emily, 2008.01.21
32465 +
32466 + // Driver should not check RX stuck in IBSS mode because it is required to
32467 + // set Check BSSID in order to send beacon, however, if check BSSID is
32468 + // set, STA cannot hear any packet a all. Emily, 2008.04.12
32469 + RxResetType = RxCheckStuck(dev);
32470 + }
32471 +#endif
32472 +
32473 + RT_TRACE(COMP_RESET,"%s(): TxResetType is %d, RxResetType is %d\n",__FUNCTION__,TxResetType,RxResetType);
32474 + if(TxResetType==RESET_TYPE_NORMAL || RxResetType==RESET_TYPE_NORMAL)
32475 + return RESET_TYPE_NORMAL;
32476 + else if(TxResetType==RESET_TYPE_SILENT || RxResetType==RESET_TYPE_SILENT)
32477 + return RESET_TYPE_SILENT;
32478 + else
32479 + return RESET_TYPE_NORESET;
32480 +
32481 +}
32482 +
32483 +
32484 +static void CamRestoreAllEntry(struct net_device *dev)
32485 +{
32486 + u8 EntryId = 0;
32487 + struct r8192_priv *priv = ieee80211_priv(dev);
32488 + u8* MacAddr = priv->ieee80211->current_network.bssid;
32489 +
32490 + static u8 CAM_CONST_ADDR[4][6] = {
32491 + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
32492 + {0x00, 0x00, 0x00, 0x00, 0x00, 0x01},
32493 + {0x00, 0x00, 0x00, 0x00, 0x00, 0x02},
32494 + {0x00, 0x00, 0x00, 0x00, 0x00, 0x03}};
32495 + static u8 CAM_CONST_BROAD[] =
32496 + {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
32497 +
32498 + RT_TRACE(COMP_SEC, "CamRestoreAllEntry: \n");
32499 +
32500 +
32501 + if ((priv->ieee80211->pairwise_key_type == KEY_TYPE_WEP40)||
32502 + (priv->ieee80211->pairwise_key_type == KEY_TYPE_WEP104))
32503 + {
32504 +
32505 + for(EntryId=0; EntryId<4; EntryId++)
32506 + {
32507 + {
32508 + MacAddr = CAM_CONST_ADDR[EntryId];
32509 + setKey(dev,
32510 + EntryId ,
32511 + EntryId,
32512 + priv->ieee80211->pairwise_key_type,
32513 + MacAddr,
32514 + 0,
32515 + NULL);
32516 + }
32517 + }
32518 +
32519 + }
32520 + else if(priv->ieee80211->pairwise_key_type == KEY_TYPE_TKIP)
32521 + {
32522 +
32523 + {
32524 + if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
32525 + setKey(dev,
32526 + 4,
32527 + 0,
32528 + priv->ieee80211->pairwise_key_type,
32529 + (u8*)dev->dev_addr,
32530 + 0,
32531 + NULL);
32532 + else
32533 + setKey(dev,
32534 + 4,
32535 + 0,
32536 + priv->ieee80211->pairwise_key_type,
32537 + MacAddr,
32538 + 0,
32539 + NULL);
32540 + }
32541 + }
32542 + else if(priv->ieee80211->pairwise_key_type == KEY_TYPE_CCMP)
32543 + {
32544 +
32545 + {
32546 + if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
32547 + setKey(dev,
32548 + 4,
32549 + 0,
32550 + priv->ieee80211->pairwise_key_type,
32551 + (u8*)dev->dev_addr,
32552 + 0,
32553 + NULL);
32554 + else
32555 + setKey(dev,
32556 + 4,
32557 + 0,
32558 + priv->ieee80211->pairwise_key_type,
32559 + MacAddr,
32560 + 0,
32561 + NULL);
32562 + }
32563 + }
32564 +
32565 +
32566 +
32567 + if(priv->ieee80211->group_key_type == KEY_TYPE_TKIP)
32568 + {
32569 + MacAddr = CAM_CONST_BROAD;
32570 + for(EntryId=1 ; EntryId<4 ; EntryId++)
32571 + {
32572 + {
32573 + setKey(dev,
32574 + EntryId,
32575 + EntryId,
32576 + priv->ieee80211->group_key_type,
32577 + MacAddr,
32578 + 0,
32579 + NULL);
32580 + }
32581 + }
32582 + if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
32583 + setKey(dev,
32584 + 0,
32585 + 0,
32586 + priv->ieee80211->group_key_type,
32587 + CAM_CONST_ADDR[0],
32588 + 0,
32589 + NULL);
32590 + }
32591 + else if(priv->ieee80211->group_key_type == KEY_TYPE_CCMP)
32592 + {
32593 + MacAddr = CAM_CONST_BROAD;
32594 + for(EntryId=1; EntryId<4 ; EntryId++)
32595 + {
32596 + {
32597 + setKey(dev,
32598 + EntryId ,
32599 + EntryId,
32600 + priv->ieee80211->group_key_type,
32601 + MacAddr,
32602 + 0,
32603 + NULL);
32604 + }
32605 + }
32606 +
32607 + if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
32608 + setKey(dev,
32609 + 0 ,
32610 + 0,
32611 + priv->ieee80211->group_key_type,
32612 + CAM_CONST_ADDR[0],
32613 + 0,
32614 + NULL);
32615 + }
32616 +}
32617 +
32618 +void rtl8192_cancel_deferred_work(struct r8192_priv* priv);
32619 +int _rtl8192_up(struct net_device *dev);
32620 +
32621 +/*
32622 + * This function is used to fix Tx/Rx stop bug temporarily.
32623 + * This function will do "system reset" to NIC when Tx or Rx is stuck.
32624 + * The method checking Tx/Rx stuck of this function is supported by FW,
32625 + * which reports Tx and Rx counter to register 0x128 and 0x130.
32626 + * */
32627 +static void rtl819x_ifsilentreset(struct net_device *dev)
32628 +{
32629 + struct r8192_priv *priv = ieee80211_priv(dev);
32630 + u8 reset_times = 0;
32631 + int reset_status = 0;
32632 + struct ieee80211_device *ieee = priv->ieee80211;
32633 +
32634 +
32635 + // 2007.07.20. If we need to check CCK stop, please uncomment this line.
32636 + //bStuck = Adapter->HalFunc.CheckHWStopHandler(Adapter);
32637 +
32638 + if(priv->ResetProgress==RESET_TYPE_NORESET)
32639 + {
32640 +RESET_START:
32641 +
32642 + RT_TRACE(COMP_RESET,"=========>Reset progress!! \n");
32643 +
32644 + // Set the variable for reset.
32645 + priv->ResetProgress = RESET_TYPE_SILENT;
32646 +// rtl8192_close(dev);
32647 +#if 1
32648 + down(&priv->wx_sem);
32649 + if(priv->up == 0)
32650 + {
32651 + RT_TRACE(COMP_ERR,"%s():the driver is not up! return\n",__FUNCTION__);
32652 + up(&priv->wx_sem);
32653 + return ;
32654 + }
32655 + priv->up = 0;
32656 + RT_TRACE(COMP_RESET,"%s():======>start to down the driver\n",__FUNCTION__);
32657 + if(!netif_queue_stopped(dev))
32658 + netif_stop_queue(dev);
32659 +
32660 + dm_backup_dynamic_mechanism_state(dev);
32661 +
32662 + rtl8192_irq_disable(dev);
32663 + rtl8192_cancel_deferred_work(priv);
32664 + deinit_hal_dm(dev);
32665 + del_timer_sync(&priv->watch_dog_timer);
32666 + ieee->sync_scan_hurryup = 1;
32667 + if(ieee->state == IEEE80211_LINKED)
32668 + {
32669 + down(&ieee->wx_sem);
32670 + printk("ieee->state is IEEE80211_LINKED\n");
32671 + ieee80211_stop_send_beacons(priv->ieee80211);
32672 + del_timer_sync(&ieee->associate_timer);
32673 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
32674 + cancel_delayed_work(&ieee->associate_retry_wq);
32675 +#endif
32676 + ieee80211_stop_scan(ieee);
32677 + netif_carrier_off(dev);
32678 + up(&ieee->wx_sem);
32679 + }
32680 + else{
32681 + printk("ieee->state is NOT LINKED\n");
32682 + ieee80211_softmac_stop_protocol(priv->ieee80211);
32683 + }
32684 + rtl8192_rtx_disable(dev);
32685 + up(&priv->wx_sem);
32686 + RT_TRACE(COMP_RESET,"%s():<==========down process is finished\n",__FUNCTION__);
32687 + RT_TRACE(COMP_RESET,"%s():===========>start to up the driver\n",__FUNCTION__);
32688 + reset_status = _rtl8192_up(dev);
32689 +
32690 + RT_TRACE(COMP_RESET,"%s():<===========up process is finished\n",__FUNCTION__);
32691 + if(reset_status == -1)
32692 + {
32693 + if(reset_times < 3)
32694 + {
32695 + reset_times++;
32696 + goto RESET_START;
32697 + }
32698 + else
32699 + {
32700 + RT_TRACE(COMP_ERR," ERR!!! %s(): Reset Failed!!\n",__FUNCTION__);
32701 + }
32702 + }
32703 +#endif
32704 + ieee->is_silent_reset = 1;
32705 +#if 1
32706 + EnableHWSecurityConfig8192(dev);
32707 +#if 1
32708 + if(ieee->state == IEEE80211_LINKED && ieee->iw_mode == IW_MODE_INFRA)
32709 + {
32710 + ieee->set_chan(ieee->dev, ieee->current_network.channel);
32711 +
32712 +#if 1
32713 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
32714 + queue_work(ieee->wq, &ieee->associate_complete_wq);
32715 +#else
32716 + schedule_task(&ieee->associate_complete_wq);
32717 +#endif
32718 +#endif
32719 +
32720 + }
32721 + else if(ieee->state == IEEE80211_LINKED && ieee->iw_mode == IW_MODE_ADHOC)
32722 + {
32723 + ieee->set_chan(ieee->dev, ieee->current_network.channel);
32724 + ieee->link_change(ieee->dev);
32725 +
32726 + // notify_wx_assoc_event(ieee);
32727 +
32728 + ieee80211_start_send_beacons(ieee);
32729 +
32730 + if (ieee->data_hard_resume)
32731 + ieee->data_hard_resume(ieee->dev);
32732 + netif_carrier_on(ieee->dev);
32733 + }
32734 +#endif
32735 +
32736 + CamRestoreAllEntry(dev);
32737 +
32738 + // Restore the previous setting for all dynamic mechanism
32739 + dm_restore_dynamic_mechanism_state(dev);
32740 +
32741 + priv->ResetProgress = RESET_TYPE_NORESET;
32742 + priv->reset_count++;
32743 +
32744 + priv->bForcedSilentReset =false;
32745 + priv->bResetInProgress = false;
32746 +
32747 + // For test --> force write UFWP.
32748 + write_nic_byte(dev, UFWP, 1);
32749 + RT_TRACE(COMP_RESET, "Reset finished!! ====>[%d]\n", priv->reset_count);
32750 +#endif
32751 + }
32752 +}
32753 +
32754 +#ifdef ENABLE_IPS
32755 +void InactivePsWorkItemCallback(struct net_device *dev)
32756 +{
32757 + struct r8192_priv *priv = ieee80211_priv(dev);
32758 + PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
32759 + //u8 index = 0;
32760 +
32761 + RT_TRACE(COMP_POWER, "InactivePsWorkItemCallback() ---------> \n");
32762 + //
32763 + // This flag "bSwRfProcessing", indicates the status of IPS procedure, should be set if the IPS workitem
32764 + // is really scheduled.
32765 + // The old code, sets this flag before scheduling the IPS workitem and however, at the same time the
32766 + // previous IPS workitem did not end yet, fails to schedule the current workitem. Thus, bSwRfProcessing
32767 + // blocks the IPS procedure of switching RF.
32768 + // By Bruce, 2007-12-25.
32769 + //
32770 + pPSC->bSwRfProcessing = TRUE;
32771 +
32772 + RT_TRACE(COMP_RF, "InactivePsWorkItemCallback(): Set RF to %s.\n", \
32773 + pPSC->eInactivePowerState == eRfOff?"OFF":"ON");
32774 +
32775 +
32776 + MgntActSet_RF_State(dev, pPSC->eInactivePowerState, RF_CHANGE_BY_IPS);
32777 +
32778 + //
32779 + // To solve CAM values miss in RF OFF, rewrite CAM values after RF ON. By Bruce, 2007-09-20.
32780 + //
32781 +#if 0
32782 + if(pPSC->eInactivePowerState == eRfOn)
32783 + CamRestoreAllEntry(dev);
32784 +#endif
32785 + pPSC->bSwRfProcessing = FALSE;
32786 + RT_TRACE(COMP_POWER, "InactivePsWorkItemCallback() <--------- \n");
32787 +}
32788 +
32789 +//
32790 +// Description:
32791 +// Enter the inactive power save mode. RF will be off
32792 +// 2007.08.17, by shien chang.
32793 +//
32794 +void
32795 +IPSEnter(struct net_device *dev)
32796 +{
32797 + struct r8192_priv *priv = ieee80211_priv(dev);
32798 + PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
32799 + RT_RF_POWER_STATE rtState;
32800 +
32801 + if (pPSC->bInactivePs)
32802 + {
32803 + rtState = priv->ieee80211->eRFPowerState;
32804 + //
32805 + // Added by Bruce, 2007-12-25.
32806 + // Do not enter IPS in the following conditions:
32807 + // (1) RF is already OFF or Sleep
32808 + // (2) bSwRfProcessing (indicates the IPS is still under going)
32809 + // (3) Connectted (only disconnected can trigger IPS)
32810 + // (4) IBSS (send Beacon)
32811 + // (5) AP mode (send Beacon)
32812 + //
32813 + if (rtState == eRfOn && !pPSC->bSwRfProcessing
32814 + && (priv->ieee80211->state != IEEE80211_LINKED) )
32815 + {
32816 + RT_TRACE(COMP_RF,"IPSEnter(): Turn off RF.\n");
32817 + pPSC->eInactivePowerState = eRfOff;
32818 +// queue_work(priv->priv_wq,&(pPSC->InactivePsWorkItem));
32819 + InactivePsWorkItemCallback(dev);
32820 + }
32821 + }
32822 +}
32823 +
32824 +//
32825 +// Description:
32826 +// Leave the inactive power save mode, RF will be on.
32827 +// 2007.08.17, by shien chang.
32828 +//
32829 +void
32830 +IPSLeave(struct net_device *dev)
32831 +{
32832 + struct r8192_priv *priv = ieee80211_priv(dev);
32833 + PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
32834 + RT_RF_POWER_STATE rtState;
32835 +
32836 + if (pPSC->bInactivePs)
32837 + {
32838 + rtState = priv->ieee80211->eRFPowerState;
32839 + if (rtState != eRfOn && !pPSC->bSwRfProcessing && priv->ieee80211->RfOffReason <= RF_CHANGE_BY_IPS)
32840 + {
32841 + RT_TRACE(COMP_POWER, "IPSLeave(): Turn on RF.\n");
32842 + pPSC->eInactivePowerState = eRfOn;
32843 +// queue_work(priv->priv_wq,&(pPSC->InactivePsWorkItem));
32844 + InactivePsWorkItemCallback(dev);
32845 + }
32846 + }
32847 +}
32848 +#endif
32849 +
32850 +static void rtl819x_update_rxcounts(
32851 + struct r8192_priv *priv,
32852 + u32* TotalRxBcnNum,
32853 + u32* TotalRxDataNum
32854 +)
32855 +{
32856 + u16 SlotIndex;
32857 + u8 i;
32858 +
32859 + *TotalRxBcnNum = 0;
32860 + *TotalRxDataNum = 0;
32861 +
32862 + SlotIndex = (priv->ieee80211->LinkDetectInfo.SlotIndex++)%(priv->ieee80211->LinkDetectInfo.SlotNum);
32863 + priv->ieee80211->LinkDetectInfo.RxBcnNum[SlotIndex] = priv->ieee80211->LinkDetectInfo.NumRecvBcnInPeriod;
32864 + priv->ieee80211->LinkDetectInfo.RxDataNum[SlotIndex] = priv->ieee80211->LinkDetectInfo.NumRecvDataInPeriod;
32865 + for( i=0; i<priv->ieee80211->LinkDetectInfo.SlotNum; i++ ){
32866 + *TotalRxBcnNum += priv->ieee80211->LinkDetectInfo.RxBcnNum[i];
32867 + *TotalRxDataNum += priv->ieee80211->LinkDetectInfo.RxDataNum[i];
32868 + }
32869 +}
32870 +
32871 +
32872 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
32873 +void rtl819x_watchdog_wqcallback(struct work_struct *work)
32874 +{
32875 + struct delayed_work *dwork = container_of(work,struct delayed_work,work);
32876 + struct r8192_priv *priv = container_of(dwork,struct r8192_priv,watch_dog_wq);
32877 + struct net_device *dev = priv->ieee80211->dev;
32878 +#else
32879 +extern void rtl819x_watchdog_wqcallback(struct net_device *dev)
32880 +{
32881 + struct r8192_priv *priv = ieee80211_priv(dev);
32882 +#endif
32883 + struct ieee80211_device* ieee = priv->ieee80211;
32884 + RESET_TYPE ResetType = RESET_TYPE_NORESET;
32885 + static u8 check_reset_cnt=0;
32886 + unsigned long flags;
32887 + bool bBusyTraffic = false;
32888 + static u8 last_time = 0;
32889 + if(!priv->up)
32890 + return;
32891 + hal_dm_watchdog(dev);
32892 +#ifdef ENABLE_IPS
32893 +// printk("watch_dog ENABLE_IPS\n");
32894 + if(ieee->actscanning == false){
32895 + if((ieee->iw_mode != IW_MODE_ADHOC) && (ieee->state == IEEE80211_NOLINK) && (ieee->beinretry == false) && (ieee->eRFPowerState == eRfOn) && !ieee->is_set_key){
32896 + if(ieee->PowerSaveControl.ReturnPoint == IPS_CALLBACK_NONE){
32897 + printk("====================>haha:IPSEnter()\n");
32898 + IPSEnter(dev);
32899 + //ieee80211_stop_scan(priv->ieee80211);
32900 + }
32901 + }
32902 + }
32903 +#endif
32904 + {//to get busy traffic condition
32905 + if(ieee->state == IEEE80211_LINKED)
32906 + {
32907 + if( ieee->LinkDetectInfo.NumRxOkInPeriod> 666 ||
32908 + ieee->LinkDetectInfo.NumTxOkInPeriod> 666 ) {
32909 + bBusyTraffic = true;
32910 + }
32911 +
32912 + }
32913 + ieee->LinkDetectInfo.NumRxOkInPeriod = 0;
32914 + ieee->LinkDetectInfo.NumTxOkInPeriod = 0;
32915 + ieee->LinkDetectInfo.bBusyTraffic = bBusyTraffic;
32916 + }
32917 +
32918 +
32919 + //added by amy for AP roaming
32920 + if (1)
32921 + {
32922 + if(ieee->state == IEEE80211_LINKED && ieee->iw_mode == IW_MODE_INFRA)
32923 + {
32924 + u32 TotalRxBcnNum = 0;
32925 + u32 TotalRxDataNum = 0;
32926 +
32927 + rtl819x_update_rxcounts(priv, &TotalRxBcnNum, &TotalRxDataNum);
32928 + if((TotalRxBcnNum+TotalRxDataNum) == 0)
32929 + {
32930 + if( ieee->eRFPowerState == eRfOff)
32931 + RT_TRACE(COMP_ERR,"========>%s()\n",__FUNCTION__);
32932 + printk("===>%s(): AP is power off,connect another one\n",__FUNCTION__);
32933 + // Dot11d_Reset(dev);
32934 + ieee->state = IEEE80211_ASSOCIATING;
32935 + notify_wx_assoc_event(priv->ieee80211);
32936 + RemovePeerTS(priv->ieee80211,priv->ieee80211->current_network.bssid);
32937 + ieee->is_roaming = true;
32938 + ieee->is_set_key = false;
32939 + ieee->link_change(dev);
32940 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
32941 + queue_work(ieee->wq, &ieee->associate_procedure_wq);
32942 +#else
32943 + schedule_task(&ieee->associate_procedure_wq);
32944 +#endif
32945 + }
32946 + }
32947 + ieee->LinkDetectInfo.NumRecvBcnInPeriod=0;
32948 + ieee->LinkDetectInfo.NumRecvDataInPeriod=0;
32949 +
32950 + }
32951 + //check if reset the driver
32952 + spin_lock_irqsave(&priv->tx_lock,flags);
32953 + if(check_reset_cnt++ >= 3 && !ieee->is_roaming && (last_time != 1))
32954 + {
32955 + ResetType = rtl819x_ifcheck_resetornot(dev);
32956 + check_reset_cnt = 3;
32957 + //DbgPrint("Start to check silent reset\n");
32958 + }
32959 + spin_unlock_irqrestore(&priv->tx_lock,flags);
32960 + if(!priv->bDisableNormalResetCheck && ResetType == RESET_TYPE_NORMAL)
32961 + {
32962 + priv->ResetProgress = RESET_TYPE_NORMAL;
32963 + RT_TRACE(COMP_RESET,"%s(): NOMAL RESET\n",__FUNCTION__);
32964 + return;
32965 + }
32966 + /* disable silent reset temply 2008.9.11*/
32967 +#if 1
32968 + if( ((priv->force_reset) || (!priv->bDisableNormalResetCheck && ResetType==RESET_TYPE_SILENT))) // This is control by OID set in Pomelo
32969 + {
32970 + last_time = 1;
32971 + rtl819x_ifsilentreset(dev);
32972 + }
32973 + else
32974 + last_time = 0;
32975 +#endif
32976 + priv->force_reset = false;
32977 + priv->bForcedSilentReset = false;
32978 + priv->bResetInProgress = false;
32979 + RT_TRACE(COMP_TRACE, " <==RtUsbCheckForHangWorkItemCallback()\n");
32980 +
32981 +}
32982 +
32983 +void watch_dog_timer_callback(unsigned long data)
32984 +{
32985 + struct r8192_priv *priv = ieee80211_priv((struct net_device *) data);
32986 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
32987 + queue_delayed_work(priv->priv_wq,&priv->watch_dog_wq,0);
32988 +#else
32989 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
32990 + schedule_task(&priv->watch_dog_wq);
32991 +#else
32992 + queue_work(priv->priv_wq,&priv->watch_dog_wq);
32993 +#endif
32994 +#endif
32995 + mod_timer(&priv->watch_dog_timer, jiffies + MSECS(IEEE80211_WATCH_DOG_TIME));
32996 +
32997 +}
32998 +int _rtl8192_up(struct net_device *dev)
32999 +{
33000 + struct r8192_priv *priv = ieee80211_priv(dev);
33001 + //int i;
33002 + RT_STATUS init_status = RT_STATUS_SUCCESS;
33003 + priv->up=1;
33004 + priv->ieee80211->ieee_up=1;
33005 + RT_TRACE(COMP_INIT, "Bringing up iface");
33006 +
33007 + init_status = rtl8192_adapter_start(dev);
33008 + if(init_status != RT_STATUS_SUCCESS)
33009 + {
33010 + RT_TRACE(COMP_ERR,"ERR!!! %s(): initialization is failed!\n",__FUNCTION__);
33011 + return -1;
33012 + }
33013 + RT_TRACE(COMP_INIT, "start adapter finished\n");
33014 +#ifdef RTL8192E
33015 + if(priv->ieee80211->eRFPowerState!=eRfOn)
33016 + MgntActSet_RF_State(dev, eRfOn, priv->ieee80211->RfOffReason);
33017 +#endif
33018 + if(priv->ieee80211->state != IEEE80211_LINKED)
33019 + ieee80211_softmac_start_protocol(priv->ieee80211);
33020 + ieee80211_reset_queue(priv->ieee80211);
33021 + watch_dog_timer_callback((unsigned long) dev);
33022 + if(!netif_queue_stopped(dev))
33023 + netif_start_queue(dev);
33024 + else
33025 + netif_wake_queue(dev);
33026 +
33027 + return 0;
33028 +}
33029 +
33030 +
33031 +static int rtl8192_open(struct net_device *dev)
33032 +{
33033 + struct r8192_priv *priv = ieee80211_priv(dev);
33034 + int ret;
33035 +
33036 + down(&priv->wx_sem);
33037 + ret = rtl8192_up(dev);
33038 + up(&priv->wx_sem);
33039 + return ret;
33040 +
33041 +}
33042 +
33043 +
33044 +int rtl8192_up(struct net_device *dev)
33045 +{
33046 + struct r8192_priv *priv = ieee80211_priv(dev);
33047 +
33048 + if (priv->up == 1) return -1;
33049 +
33050 + return _rtl8192_up(dev);
33051 +}
33052 +
33053 +
33054 +static int rtl8192_close(struct net_device *dev)
33055 +{
33056 + struct r8192_priv *priv = ieee80211_priv(dev);
33057 + int ret;
33058 +
33059 + down(&priv->wx_sem);
33060 +
33061 + ret = rtl8192_down(dev);
33062 +
33063 + up(&priv->wx_sem);
33064 +
33065 + return ret;
33066 +
33067 +}
33068 +
33069 +int rtl8192_down(struct net_device *dev)
33070 +{
33071 + struct r8192_priv *priv = ieee80211_priv(dev);
33072 +// int i;
33073 +#if 0
33074 + u8 ucRegRead;
33075 + u32 ulRegRead;
33076 +#endif
33077 + if (priv->up == 0) return -1;
33078 +
33079 + priv->up=0;
33080 + priv->ieee80211->ieee_up = 0;
33081 + RT_TRACE(COMP_DOWN, "==========>%s()\n", __FUNCTION__);
33082 +/* FIXME */
33083 + if (!netif_queue_stopped(dev))
33084 + netif_stop_queue(dev);
33085 +
33086 + rtl8192_irq_disable(dev);
33087 +#if 0
33088 + if(!priv->ieee80211->bSupportRemoteWakeUp) {
33089 + MgntActSet_RF_State(dev, eRfOff, RF_CHANGE_BY_INIT);
33090 + // 2006.11.30. System reset bit
33091 + ulRegRead = read_nic_dword(dev, CPU_GEN);
33092 + ulRegRead|=CPU_GEN_SYSTEM_RESET;
33093 + write_nic_dword(dev, CPU_GEN, ulRegRead);
33094 + } else {
33095 + //2008.06.03 for WOL
33096 + write_nic_dword(dev, WFCRC0, 0xffffffff);
33097 + write_nic_dword(dev, WFCRC1, 0xffffffff);
33098 + write_nic_dword(dev, WFCRC2, 0xffffffff);
33099 +#ifdef RTL8190P
33100 + //GPIO 0 = TRUE
33101 + ucRegRead = read_nic_byte(dev, GPO);
33102 + ucRegRead |= BIT0;
33103 + write_nic_byte(dev, GPO, ucRegRead);
33104 +#endif
33105 + //Write PMR register
33106 + write_nic_byte(dev, PMR, 0x5);
33107 + //Disable tx, enanble rx
33108 + write_nic_byte(dev, MacBlkCtrl, 0xa);
33109 + }
33110 +#endif
33111 +// flush_scheduled_work();
33112 + rtl8192_cancel_deferred_work(priv);
33113 + deinit_hal_dm(dev);
33114 + del_timer_sync(&priv->watch_dog_timer);
33115 +
33116 + ieee80211_softmac_stop_protocol(priv->ieee80211);
33117 +#ifdef ENABLE_IPS
33118 + MgntActSet_RF_State(dev, eRfOff, RF_CHANGE_BY_INIT);
33119 +#endif
33120 + rtl8192_rtx_disable(dev);
33121 + memset(&priv->ieee80211->current_network, 0 , offsetof(struct ieee80211_network, list));
33122 +
33123 + RT_TRACE(COMP_DOWN, "<==========%s()\n", __FUNCTION__);
33124 +
33125 + return 0;
33126 +}
33127 +
33128 +
33129 +void rtl8192_commit(struct net_device *dev)
33130 +{
33131 + struct r8192_priv *priv = ieee80211_priv(dev);
33132 +
33133 + if (priv->up == 0) return ;
33134 +
33135 +
33136 + ieee80211_softmac_stop_protocol(priv->ieee80211);
33137 +
33138 + rtl8192_irq_disable(dev);
33139 + rtl8192_rtx_disable(dev);
33140 + _rtl8192_up(dev);
33141 +}
33142 +
33143 +/*
33144 +void rtl8192_restart(struct net_device *dev)
33145 +{
33146 + struct r8192_priv *priv = ieee80211_priv(dev);
33147 +*/
33148 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
33149 +void rtl8192_restart(struct work_struct *work)
33150 +{
33151 + struct r8192_priv *priv = container_of(work, struct r8192_priv, reset_wq);
33152 + struct net_device *dev = priv->ieee80211->dev;
33153 +#else
33154 +void rtl8192_restart(struct net_device *dev)
33155 +{
33156 +
33157 + struct r8192_priv *priv = ieee80211_priv(dev);
33158 +#endif
33159 +
33160 + down(&priv->wx_sem);
33161 +
33162 + rtl8192_commit(dev);
33163 +
33164 + up(&priv->wx_sem);
33165 +}
33166 +
33167 +static void r8192_set_multicast(struct net_device *dev)
33168 +{
33169 + struct r8192_priv *priv = ieee80211_priv(dev);
33170 + short promisc;
33171 +
33172 + //down(&priv->wx_sem);
33173 +
33174 + /* FIXME FIXME */
33175 +
33176 + promisc = (dev->flags & IFF_PROMISC) ? 1:0;
33177 +
33178 + if (promisc != priv->promisc) {
33179 + ;
33180 + // rtl8192_commit(dev);
33181 + }
33182 +
33183 + priv->promisc = promisc;
33184 +
33185 + //schedule_work(&priv->reset_wq);
33186 + //up(&priv->wx_sem);
33187 +}
33188 +
33189 +
33190 +static int r8192_set_mac_adr(struct net_device *dev, void *mac)
33191 +{
33192 + struct r8192_priv *priv = ieee80211_priv(dev);
33193 + struct sockaddr *addr = mac;
33194 +
33195 + down(&priv->wx_sem);
33196 +
33197 + memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
33198 +
33199 +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
33200 + schedule_work(&priv->reset_wq);
33201 +#else
33202 + schedule_task(&priv->reset_wq);
33203 +#endif
33204 + up(&priv->wx_sem);
33205 +
33206 + return 0;
33207 +}
33208 +
33209 +/* based on ipw2200 driver */
33210 +static int rtl8192_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
33211 +{
33212 + struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
33213 + struct iwreq *wrq = (struct iwreq *)rq;
33214 + int ret=-1;
33215 + struct ieee80211_device *ieee = priv->ieee80211;
33216 + u32 key[4];
33217 + u8 broadcast_addr[6] = {0xff,0xff,0xff,0xff,0xff,0xff};
33218 + struct iw_point *p = &wrq->u.data;
33219 + struct ieee_param *ipw = NULL;//(struct ieee_param *)wrq->u.data.pointer;
33220 +
33221 + down(&priv->wx_sem);
33222 +
33223 +
33224 + if (p->length < sizeof(struct ieee_param) || !p->pointer){
33225 + ret = -EINVAL;
33226 + goto out;
33227 + }
33228 +
33229 + ipw = (struct ieee_param *)kmalloc(p->length, GFP_KERNEL);
33230 + if (ipw == NULL){
33231 + ret = -ENOMEM;
33232 + goto out;
33233 + }
33234 + if (copy_from_user(ipw, p->pointer, p->length)) {
33235 + kfree(ipw);
33236 + ret = -EFAULT;
33237 + goto out;
33238 + }
33239 +
33240 + switch (cmd) {
33241 + case RTL_IOCTL_WPA_SUPPLICANT:
33242 + //parse here for HW security
33243 + if (ipw->cmd == IEEE_CMD_SET_ENCRYPTION)
33244 + {
33245 + if (ipw->u.crypt.set_tx)
33246 + {
33247 + if (strcmp(ipw->u.crypt.alg, "CCMP") == 0)
33248 + ieee->pairwise_key_type = KEY_TYPE_CCMP;
33249 + else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0)
33250 + ieee->pairwise_key_type = KEY_TYPE_TKIP;
33251 + else if (strcmp(ipw->u.crypt.alg, "WEP") == 0)
33252 + {
33253 + if (ipw->u.crypt.key_len == 13)
33254 + ieee->pairwise_key_type = KEY_TYPE_WEP104;
33255 + else if (ipw->u.crypt.key_len == 5)
33256 + ieee->pairwise_key_type = KEY_TYPE_WEP40;
33257 + }
33258 + else
33259 + ieee->pairwise_key_type = KEY_TYPE_NA;
33260 +
33261 + if (ieee->pairwise_key_type)
33262 + {
33263 + memcpy((u8*)key, ipw->u.crypt.key, 16);
33264 + EnableHWSecurityConfig8192(dev);
33265 + //we fill both index entry and 4th entry for pairwise key as in IPW interface, adhoc will only get here, so we need index entry for its default key serching!
33266 + //added by WB.
33267 + setKey(dev, 4, ipw->u.crypt.idx, ieee->pairwise_key_type, (u8*)ieee->ap_mac_addr, 0, key);
33268 + if (ieee->auth_mode != 2) //LEAP WEP will never set this.
33269 + setKey(dev, ipw->u.crypt.idx, ipw->u.crypt.idx, ieee->pairwise_key_type, (u8*)ieee->ap_mac_addr, 0, key);
33270 + }
33271 + if ((ieee->pairwise_key_type == KEY_TYPE_CCMP) && ieee->pHTInfo->bCurrentHTSupport){
33272 + write_nic_byte(dev, 0x173, 1); //fix aes bug
33273 + }
33274 +
33275 + }
33276 + else //if (ipw->u.crypt.idx) //group key use idx > 0
33277 + {
33278 + memcpy((u8*)key, ipw->u.crypt.key, 16);
33279 + if (strcmp(ipw->u.crypt.alg, "CCMP") == 0)
33280 + ieee->group_key_type= KEY_TYPE_CCMP;
33281 + else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0)
33282 + ieee->group_key_type = KEY_TYPE_TKIP;
33283 + else if (strcmp(ipw->u.crypt.alg, "WEP") == 0)
33284 + {
33285 + if (ipw->u.crypt.key_len == 13)
33286 + ieee->group_key_type = KEY_TYPE_WEP104;
33287 + else if (ipw->u.crypt.key_len == 5)
33288 + ieee->group_key_type = KEY_TYPE_WEP40;
33289 + }
33290 + else
33291 + ieee->group_key_type = KEY_TYPE_NA;
33292 +
33293 + if (ieee->group_key_type)
33294 + {
33295 + setKey( dev,
33296 + ipw->u.crypt.idx,
33297 + ipw->u.crypt.idx, //KeyIndex
33298 + ieee->group_key_type, //KeyType
33299 + broadcast_addr, //MacAddr
33300 + 0, //DefaultKey
33301 + key); //KeyContent
33302 + }
33303 + }
33304 + }
33305 +#ifdef JOHN_DEBUG
33306 + //john's test 0711
33307 + {
33308 + int i;
33309 + printk("@@ wrq->u pointer = ");
33310 + for(i=0;i<wrq->u.data.length;i++){
33311 + if(i%10==0) printk("\n");
33312 + printk( "%8x|", ((u32*)wrq->u.data.pointer)[i] );
33313 + }
33314 + printk("\n");
33315 + }
33316 +#endif /*JOHN_DEBUG*/
33317 + ret = ieee80211_wpa_supplicant_ioctl(priv->ieee80211, &wrq->u.data);
33318 + break;
33319 +
33320 + default:
33321 + ret = -EOPNOTSUPP;
33322 + break;
33323 + }
33324 +
33325 + kfree(ipw);
33326 +out:
33327 + up(&priv->wx_sem);
33328 +
33329 + return ret;
33330 +}
33331 +
33332 +static u8 HwRateToMRate90(bool bIsHT, u8 rate)
33333 +{
33334 + u8 ret_rate = 0x02;
33335 +
33336 + if(!bIsHT) {
33337 + switch(rate) {
33338 + case DESC90_RATE1M: ret_rate = MGN_1M; break;
33339 + case DESC90_RATE2M: ret_rate = MGN_2M; break;
33340 + case DESC90_RATE5_5M: ret_rate = MGN_5_5M; break;
33341 + case DESC90_RATE11M: ret_rate = MGN_11M; break;
33342 + case DESC90_RATE6M: ret_rate = MGN_6M; break;
33343 + case DESC90_RATE9M: ret_rate = MGN_9M; break;
33344 + case DESC90_RATE12M: ret_rate = MGN_12M; break;
33345 + case DESC90_RATE18M: ret_rate = MGN_18M; break;
33346 + case DESC90_RATE24M: ret_rate = MGN_24M; break;
33347 + case DESC90_RATE36M: ret_rate = MGN_36M; break;
33348 + case DESC90_RATE48M: ret_rate = MGN_48M; break;
33349 + case DESC90_RATE54M: ret_rate = MGN_54M; break;
33350 +
33351 + default:
33352 + RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n", rate, bIsHT);
33353 + break;
33354 + }
33355 +
33356 + } else {
33357 + switch(rate) {
33358 + case DESC90_RATEMCS0: ret_rate = MGN_MCS0; break;
33359 + case DESC90_RATEMCS1: ret_rate = MGN_MCS1; break;
33360 + case DESC90_RATEMCS2: ret_rate = MGN_MCS2; break;
33361 + case DESC90_RATEMCS3: ret_rate = MGN_MCS3; break;
33362 + case DESC90_RATEMCS4: ret_rate = MGN_MCS4; break;
33363 + case DESC90_RATEMCS5: ret_rate = MGN_MCS5; break;
33364 + case DESC90_RATEMCS6: ret_rate = MGN_MCS6; break;
33365 + case DESC90_RATEMCS7: ret_rate = MGN_MCS7; break;
33366 + case DESC90_RATEMCS8: ret_rate = MGN_MCS8; break;
33367 + case DESC90_RATEMCS9: ret_rate = MGN_MCS9; break;
33368 + case DESC90_RATEMCS10: ret_rate = MGN_MCS10; break;
33369 + case DESC90_RATEMCS11: ret_rate = MGN_MCS11; break;
33370 + case DESC90_RATEMCS12: ret_rate = MGN_MCS12; break;
33371 + case DESC90_RATEMCS13: ret_rate = MGN_MCS13; break;
33372 + case DESC90_RATEMCS14: ret_rate = MGN_MCS14; break;
33373 + case DESC90_RATEMCS15: ret_rate = MGN_MCS15; break;
33374 + case DESC90_RATEMCS32: ret_rate = (0x80|0x20); break;
33375 +
33376 + default:
33377 + RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n",rate, bIsHT);
33378 + break;
33379 + }
33380 + }
33381 +
33382 + return ret_rate;
33383 +}
33384 +
33385 +/**
33386 + * Function: UpdateRxPktTimeStamp
33387 + * Overview: Recored down the TSF time stamp when receiving a packet
33388 + *
33389 + * Input:
33390 + * PADAPTER Adapter
33391 + * PRT_RFD pRfd,
33392 + *
33393 + * Output:
33394 + * PRT_RFD pRfd
33395 + * (pRfd->Status.TimeStampHigh is updated)
33396 + * (pRfd->Status.TimeStampLow is updated)
33397 + * Return:
33398 + * None
33399 + */
33400 +static void UpdateRxPktTimeStamp8190 (struct net_device *dev, struct ieee80211_rx_stats *stats)
33401 +{
33402 + struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
33403 +
33404 + if(stats->bIsAMPDU && !stats->bFirstMPDU) {
33405 + stats->mac_time[0] = priv->LastRxDescTSFLow;
33406 + stats->mac_time[1] = priv->LastRxDescTSFHigh;
33407 + } else {
33408 + priv->LastRxDescTSFLow = stats->mac_time[0];
33409 + priv->LastRxDescTSFHigh = stats->mac_time[1];
33410 + }
33411 +}
33412 +
33413 +static long rtl819x_translate_todbm(u8 signal_strength_index)// 0-100 index.
33414 +{
33415 + long signal_power; // in dBm.
33416 +
33417 + // Translate to dBm (x=0.5y-95).
33418 + signal_power = (long)((signal_strength_index + 1) >> 1);
33419 + signal_power -= 95;
33420 +
33421 + return signal_power;
33422 +}
33423 +
33424 +//
33425 +// Description:
33426 +// Update Rx signal related information in the packet reeived
33427 +// to RxStats. User application can query RxStats to realize
33428 +// current Rx signal status.
33429 +//
33430 +// Assumption:
33431 +// In normal operation, user only care about the information of the BSS
33432 +// and we shall invoke this function if the packet received is from the BSS.
33433 +//
33434 +static void
33435 +rtl819x_update_rxsignalstatistics8190pci(
33436 + struct r8192_priv * priv,
33437 + struct ieee80211_rx_stats * pprevious_stats
33438 + )
33439 +{
33440 + int weighting = 0;
33441 +
33442 + //2 <ToDo> Update Rx Statistics (such as signal strength and signal quality).
33443 +
33444 + // Initila state
33445 + if(priv->stats.recv_signal_power == 0)
33446 + priv->stats.recv_signal_power = pprevious_stats->RecvSignalPower;
33447 +
33448 + // To avoid the past result restricting the statistics sensitivity, weight the current power (5/6) to speed up the
33449 + // reaction of smoothed Signal Power.
33450 + if(pprevious_stats->RecvSignalPower > priv->stats.recv_signal_power)
33451 + weighting = 5;
33452 + else if(pprevious_stats->RecvSignalPower < priv->stats.recv_signal_power)
33453 + weighting = (-5);
33454 + //
33455 + // We need more correct power of received packets and the "SignalStrength" of RxStats have been beautified or translated,
33456 + // so we record the correct power in Dbm here. By Bruce, 2008-03-07.
33457 + //
33458 + priv->stats.recv_signal_power = (priv->stats.recv_signal_power * 5 + pprevious_stats->RecvSignalPower + weighting) / 6;
33459 +}
33460 +
33461 +static void
33462 +rtl8190_process_cck_rxpathsel(
33463 + struct r8192_priv * priv,
33464 + struct ieee80211_rx_stats * pprevious_stats
33465 + )
33466 +{
33467 +#ifdef RTL8190P //Only 90P 2T4R need to check
33468 + char last_cck_adc_pwdb[4]={0,0,0,0};
33469 + u8 i;
33470 +//cosa add for Rx path selection
33471 + if(priv->rf_type == RF_2T4R && DM_RxPathSelTable.Enable)
33472 + {
33473 + if(pprevious_stats->bIsCCK &&
33474 + (pprevious_stats->bPacketToSelf ||pprevious_stats->bPacketBeacon))
33475 + {
33476 + /* record the cck adc_pwdb to the sliding window. */
33477 + if(priv->stats.cck_adc_pwdb.TotalNum++ >= PHY_RSSI_SLID_WIN_MAX)
33478 + {
33479 + priv->stats.cck_adc_pwdb.TotalNum = PHY_RSSI_SLID_WIN_MAX;
33480 + for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
33481 + {
33482 + last_cck_adc_pwdb[i] = priv->stats.cck_adc_pwdb.elements[i][priv->stats.cck_adc_pwdb.index];
33483 + priv->stats.cck_adc_pwdb.TotalVal[i] -= last_cck_adc_pwdb[i];
33484 + }
33485 + }
33486 + for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
33487 + {
33488 + priv->stats.cck_adc_pwdb.TotalVal[i] += pprevious_stats->cck_adc_pwdb[i];
33489 + priv->stats.cck_adc_pwdb.elements[i][priv->stats.cck_adc_pwdb.index] = pprevious_stats->cck_adc_pwdb[i];
33490 + }
33491 + priv->stats.cck_adc_pwdb.index++;
33492 + if(priv->stats.cck_adc_pwdb.index >= PHY_RSSI_SLID_WIN_MAX)
33493 + priv->stats.cck_adc_pwdb.index = 0;
33494 +
33495 + for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
33496 + {
33497 + DM_RxPathSelTable.cck_pwdb_sta[i] = priv->stats.cck_adc_pwdb.TotalVal[i]/priv->stats.cck_adc_pwdb.TotalNum;
33498 + }
33499 +
33500 + for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
33501 + {
33502 + if(pprevious_stats->cck_adc_pwdb[i] > (char)priv->undecorated_smoothed_cck_adc_pwdb[i])
33503 + {
33504 + priv->undecorated_smoothed_cck_adc_pwdb[i] =
33505 + ( (priv->undecorated_smoothed_cck_adc_pwdb[i]*(Rx_Smooth_Factor-1)) +
33506 + (pprevious_stats->cck_adc_pwdb[i])) /(Rx_Smooth_Factor);
33507 + priv->undecorated_smoothed_cck_adc_pwdb[i] = priv->undecorated_smoothed_cck_adc_pwdb[i] + 1;
33508 + }
33509 + else
33510 + {
33511 + priv->undecorated_smoothed_cck_adc_pwdb[i] =
33512 + ( (priv->undecorated_smoothed_cck_adc_pwdb[i]*(Rx_Smooth_Factor-1)) +
33513 + (pprevious_stats->cck_adc_pwdb[i])) /(Rx_Smooth_Factor);
33514 + }
33515 + }
33516 + }
33517 + }
33518 +#endif
33519 +}
33520 +
33521 +
33522 +/* 2008/01/22 MH We can not delcare RSSI/EVM total value of sliding window to
33523 + be a local static. Otherwise, it may increase when we return from S3/S4. The
33524 + value will be kept in memory or disk. We must delcare the value in adapter
33525 + and it will be reinitialized when return from S3/S4. */
33526 +static void rtl8192_process_phyinfo(struct r8192_priv * priv, u8* buffer,struct ieee80211_rx_stats * pprevious_stats, struct ieee80211_rx_stats * pcurrent_stats)
33527 +{
33528 + bool bcheck = false;
33529 + u8 rfpath;
33530 + u32 nspatial_stream, tmp_val;
33531 + //u8 i;
33532 + static u32 slide_rssi_index=0, slide_rssi_statistics=0;
33533 + static u32 slide_evm_index=0, slide_evm_statistics=0;
33534 + static u32 last_rssi=0, last_evm=0;
33535 + //cosa add for rx path selection
33536 +// static long slide_cck_adc_pwdb_index=0, slide_cck_adc_pwdb_statistics=0;
33537 +// static char last_cck_adc_pwdb[4]={0,0,0,0};
33538 + //cosa add for beacon rssi smoothing
33539 + static u32 slide_beacon_adc_pwdb_index=0, slide_beacon_adc_pwdb_statistics=0;
33540 + static u32 last_beacon_adc_pwdb=0;
33541 +
33542 + struct ieee80211_hdr_3addr *hdr;
33543 + u16 sc ;
33544 + unsigned int frag,seq;
33545 + hdr = (struct ieee80211_hdr_3addr *)buffer;
33546 + sc = le16_to_cpu(hdr->seq_ctl);
33547 + frag = WLAN_GET_SEQ_FRAG(sc);
33548 + seq = WLAN_GET_SEQ_SEQ(sc);
33549 + //cosa add 04292008 to record the sequence number
33550 + pcurrent_stats->Seq_Num = seq;
33551 + //
33552 + // Check whether we should take the previous packet into accounting
33553 + //
33554 + if(!pprevious_stats->bIsAMPDU)
33555 + {
33556 + // if previous packet is not aggregated packet
33557 + bcheck = true;
33558 + }else
33559 + {
33560 +//remve for that we don't use AMPDU to calculate PWDB,because the reported PWDB of some AP is fault.
33561 +#if 0
33562 + // if previous packet is aggregated packet, and current packet
33563 + // (1) is not AMPDU
33564 + // (2) is the first packet of one AMPDU
33565 + // that means the previous packet is the last one aggregated packet
33566 + if( !pcurrent_stats->bIsAMPDU || pcurrent_stats->bFirstMPDU)
33567 + bcheck = true;
33568 +#endif
33569 + }
33570 +
33571 + if(slide_rssi_statistics++ >= PHY_RSSI_SLID_WIN_MAX)
33572 + {
33573 + slide_rssi_statistics = PHY_RSSI_SLID_WIN_MAX;
33574 + last_rssi = priv->stats.slide_signal_strength[slide_rssi_index];
33575 + priv->stats.slide_rssi_total -= last_rssi;
33576 + }
33577 + priv->stats.slide_rssi_total += pprevious_stats->SignalStrength;
33578 +
33579 + priv->stats.slide_signal_strength[slide_rssi_index++] = pprevious_stats->SignalStrength;
33580 + if(slide_rssi_index >= PHY_RSSI_SLID_WIN_MAX)
33581 + slide_rssi_index = 0;
33582 +
33583 + // <1> Showed on UI for user, in dbm
33584 + tmp_val = priv->stats.slide_rssi_total/slide_rssi_statistics;
33585 + priv->stats.signal_strength = rtl819x_translate_todbm((u8)tmp_val);
33586 + pcurrent_stats->rssi = priv->stats.signal_strength;
33587 + //
33588 + // If the previous packet does not match the criteria, neglect it
33589 + //
33590 + if(!pprevious_stats->bPacketMatchBSSID)
33591 + {
33592 + if(!pprevious_stats->bToSelfBA)
33593 + return;
33594 + }
33595 +
33596 + if(!bcheck)
33597 + return;
33598 +
33599 + rtl8190_process_cck_rxpathsel(priv,pprevious_stats);
33600 +
33601 + //
33602 + // Check RSSI
33603 + //
33604 + priv->stats.num_process_phyinfo++;
33605 +#if 0
33606 + /* record the general signal strength to the sliding window. */
33607 + if(slide_rssi_statistics++ >= PHY_RSSI_SLID_WIN_MAX)
33608 + {
33609 + slide_rssi_statistics = PHY_RSSI_SLID_WIN_MAX;
33610 + last_rssi = priv->stats.slide_signal_strength[slide_rssi_index];
33611 + priv->stats.slide_rssi_total -= last_rssi;
33612 + }
33613 + priv->stats.slide_rssi_total += pprevious_stats->SignalStrength;
33614 +
33615 + priv->stats.slide_signal_strength[slide_rssi_index++] = pprevious_stats->SignalStrength;
33616 + if(slide_rssi_index >= PHY_RSSI_SLID_WIN_MAX)
33617 + slide_rssi_index = 0;
33618 +
33619 + // <1> Showed on UI for user, in dbm
33620 + tmp_val = priv->stats.slide_rssi_total/slide_rssi_statistics;
33621 + priv->stats.signal_strength = rtl819x_translate_todbm((u8)tmp_val);
33622 +
33623 +#endif
33624 + // <2> Showed on UI for engineering
33625 + // hardware does not provide rssi information for each rf path in CCK
33626 + if(!pprevious_stats->bIsCCK && pprevious_stats->bPacketToSelf)
33627 + {
33628 + for (rfpath = RF90_PATH_A; rfpath < RF90_PATH_C; rfpath++)
33629 + {
33630 + if (!rtl8192_phy_CheckIsLegalRFPath(priv->ieee80211->dev, rfpath))
33631 + continue;
33632 + RT_TRACE(COMP_DBG,"Jacken -> pPreviousstats->RxMIMOSignalStrength[rfpath] = %d \n" ,pprevious_stats->RxMIMOSignalStrength[rfpath] );
33633 + //Fixed by Jacken 2008-03-20
33634 + if(priv->stats.rx_rssi_percentage[rfpath] == 0)
33635 + {
33636 + priv->stats.rx_rssi_percentage[rfpath] = pprevious_stats->RxMIMOSignalStrength[rfpath];
33637 + //DbgPrint("MIMO RSSI initialize \n");
33638 + }
33639 + if(pprevious_stats->RxMIMOSignalStrength[rfpath] > priv->stats.rx_rssi_percentage[rfpath])
33640 + {
33641 + priv->stats.rx_rssi_percentage[rfpath] =
33642 + ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
33643 + (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
33644 + priv->stats.rx_rssi_percentage[rfpath] = priv->stats.rx_rssi_percentage[rfpath] + 1;
33645 + }
33646 + else
33647 + {
33648 + priv->stats.rx_rssi_percentage[rfpath] =
33649 + ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
33650 + (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
33651 + }
33652 + RT_TRACE(COMP_DBG,"Jacken -> priv->RxStats.RxRSSIPercentage[rfPath] = %d \n" ,priv->stats.rx_rssi_percentage[rfpath] );
33653 + }
33654 + }
33655 +
33656 +
33657 + //
33658 + // Check PWDB.
33659 + //
33660 + //cosa add for beacon rssi smoothing by average.
33661 + if(pprevious_stats->bPacketBeacon)
33662 + {
33663 + /* record the beacon pwdb to the sliding window. */
33664 + if(slide_beacon_adc_pwdb_statistics++ >= PHY_Beacon_RSSI_SLID_WIN_MAX)
33665 + {
33666 + slide_beacon_adc_pwdb_statistics = PHY_Beacon_RSSI_SLID_WIN_MAX;
33667 + last_beacon_adc_pwdb = priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index];
33668 + priv->stats.Slide_Beacon_Total -= last_beacon_adc_pwdb;
33669 + //DbgPrint("slide_beacon_adc_pwdb_index = %d, last_beacon_adc_pwdb = %d, Adapter->RxStats.Slide_Beacon_Total = %d\n",
33670 + // slide_beacon_adc_pwdb_index, last_beacon_adc_pwdb, Adapter->RxStats.Slide_Beacon_Total);
33671 + }
33672 + priv->stats.Slide_Beacon_Total += pprevious_stats->RxPWDBAll;
33673 + priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index] = pprevious_stats->RxPWDBAll;
33674 + //DbgPrint("slide_beacon_adc_pwdb_index = %d, pPreviousRfd->Status.RxPWDBAll = %d\n", slide_beacon_adc_pwdb_index, pPreviousRfd->Status.RxPWDBAll);
33675 + slide_beacon_adc_pwdb_index++;
33676 + if(slide_beacon_adc_pwdb_index >= PHY_Beacon_RSSI_SLID_WIN_MAX)
33677 + slide_beacon_adc_pwdb_index = 0;
33678 + pprevious_stats->RxPWDBAll = priv->stats.Slide_Beacon_Total/slide_beacon_adc_pwdb_statistics;
33679 + if(pprevious_stats->RxPWDBAll >= 3)
33680 + pprevious_stats->RxPWDBAll -= 3;
33681 + }
33682 +
33683 + RT_TRACE(COMP_RXDESC, "Smooth %s PWDB = %d\n",
33684 + pprevious_stats->bIsCCK? "CCK": "OFDM",
33685 + pprevious_stats->RxPWDBAll);
33686 +
33687 + if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
33688 + {
33689 + if(priv->undecorated_smoothed_pwdb < 0) // initialize
33690 + {
33691 + priv->undecorated_smoothed_pwdb = pprevious_stats->RxPWDBAll;
33692 + //DbgPrint("First pwdb initialize \n");
33693 + }
33694 +#if 1
33695 + if(pprevious_stats->RxPWDBAll > (u32)priv->undecorated_smoothed_pwdb)
33696 + {
33697 + priv->undecorated_smoothed_pwdb =
33698 + ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
33699 + (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
33700 + priv->undecorated_smoothed_pwdb = priv->undecorated_smoothed_pwdb + 1;
33701 + }
33702 + else
33703 + {
33704 + priv->undecorated_smoothed_pwdb =
33705 + ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
33706 + (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
33707 + }
33708 +#else
33709 + //Fixed by Jacken 2008-03-20
33710 + if(pPreviousRfd->Status.RxPWDBAll > (u32)pHalData->UndecoratedSmoothedPWDB)
33711 + {
33712 + pHalData->UndecoratedSmoothedPWDB =
33713 + ( ((pHalData->UndecoratedSmoothedPWDB)* 5) + (pPreviousRfd->Status.RxPWDBAll)) / 6;
33714 + pHalData->UndecoratedSmoothedPWDB = pHalData->UndecoratedSmoothedPWDB + 1;
33715 + }
33716 + else
33717 + {
33718 + pHalData->UndecoratedSmoothedPWDB =
33719 + ( ((pHalData->UndecoratedSmoothedPWDB)* 5) + (pPreviousRfd->Status.RxPWDBAll)) / 6;
33720 + }
33721 +#endif
33722 + rtl819x_update_rxsignalstatistics8190pci(priv,pprevious_stats);
33723 + }
33724 +
33725 + //
33726 + // Check EVM
33727 + //
33728 + /* record the general EVM to the sliding window. */
33729 + if(pprevious_stats->SignalQuality == 0)
33730 + {
33731 + }
33732 + else
33733 + {
33734 + if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA){
33735 + if(slide_evm_statistics++ >= PHY_RSSI_SLID_WIN_MAX){
33736 + slide_evm_statistics = PHY_RSSI_SLID_WIN_MAX;
33737 + last_evm = priv->stats.slide_evm[slide_evm_index];
33738 + priv->stats.slide_evm_total -= last_evm;
33739 + }
33740 +
33741 + priv->stats.slide_evm_total += pprevious_stats->SignalQuality;
33742 +
33743 + priv->stats.slide_evm[slide_evm_index++] = pprevious_stats->SignalQuality;
33744 + if(slide_evm_index >= PHY_RSSI_SLID_WIN_MAX)
33745 + slide_evm_index = 0;
33746 +
33747 + // <1> Showed on UI for user, in percentage.
33748 + tmp_val = priv->stats.slide_evm_total/slide_evm_statistics;
33749 + priv->stats.signal_quality = tmp_val;
33750 + //cosa add 10/11/2007, Showed on UI for user in Windows Vista, for Link quality.
33751 + priv->stats.last_signal_strength_inpercent = tmp_val;
33752 + }
33753 +
33754 + // <2> Showed on UI for engineering
33755 + if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
33756 + {
33757 + for(nspatial_stream = 0; nspatial_stream<2 ; nspatial_stream++) // 2 spatial stream
33758 + {
33759 + if(pprevious_stats->RxMIMOSignalQuality[nspatial_stream] != -1)
33760 + {
33761 + if(priv->stats.rx_evm_percentage[nspatial_stream] == 0) // initialize
33762 + {
33763 + priv->stats.rx_evm_percentage[nspatial_stream] = pprevious_stats->RxMIMOSignalQuality[nspatial_stream];
33764 + }
33765 + priv->stats.rx_evm_percentage[nspatial_stream] =
33766 + ( (priv->stats.rx_evm_percentage[nspatial_stream]* (Rx_Smooth_Factor-1)) +
33767 + (pprevious_stats->RxMIMOSignalQuality[nspatial_stream]* 1)) / (Rx_Smooth_Factor);
33768 + }
33769 + }
33770 + }
33771 + }
33772 +
33773 +}
33774 +
33775 +/*-----------------------------------------------------------------------------
33776 + * Function: rtl819x_query_rxpwrpercentage()
33777 + *
33778 + * Overview:
33779 + *
33780 + * Input: char antpower
33781 + *
33782 + * Output: NONE
33783 + *
33784 + * Return: 0-100 percentage
33785 + *
33786 + * Revised History:
33787 + * When Who Remark
33788 + * 05/26/2008 amy Create Version 0 porting from windows code.
33789 + *
33790 + *---------------------------------------------------------------------------*/
33791 +static u8 rtl819x_query_rxpwrpercentage(
33792 + char antpower
33793 + )
33794 +{
33795 + if ((antpower <= -100) || (antpower >= 20))
33796 + {
33797 + return 0;
33798 + }
33799 + else if (antpower >= 0)
33800 + {
33801 + return 100;
33802 + }
33803 + else
33804 + {
33805 + return (100+antpower);
33806 + }
33807 +
33808 +} /* QueryRxPwrPercentage */
33809 +
33810 +static u8
33811 +rtl819x_evm_dbtopercentage(
33812 + char value
33813 + )
33814 +{
33815 + char ret_val;
33816 +
33817 + ret_val = value;
33818 +
33819 + if(ret_val >= 0)
33820 + ret_val = 0;
33821 + if(ret_val <= -33)
33822 + ret_val = -33;
33823 + ret_val = 0 - ret_val;
33824 + ret_val*=3;
33825 + if(ret_val == 99)
33826 + ret_val = 100;
33827 + return(ret_val);
33828 +}
33829 +
33830 +//
33831 +// Description:
33832 +// We want good-looking for signal strength/quality
33833 +// 2007/7/19 01:09, by cosa.
33834 +//
33835 +static long rtl819x_signal_scale_mapping(long currsig)
33836 +{
33837 + long retsig;
33838 +
33839 + // Step 1. Scale mapping.
33840 + if(currsig >= 61 && currsig <= 100)
33841 + {
33842 + retsig = 90 + ((currsig - 60) / 4);
33843 + }
33844 + else if(currsig >= 41 && currsig <= 60)
33845 + {
33846 + retsig = 78 + ((currsig - 40) / 2);
33847 + }
33848 + else if(currsig >= 31 && currsig <= 40)
33849 + {
33850 + retsig = 66 + (currsig - 30);
33851 + }
33852 + else if(currsig >= 21 && currsig <= 30)
33853 + {
33854 + retsig = 54 + (currsig - 20);
33855 + }
33856 + else if(currsig >= 5 && currsig <= 20)
33857 + {
33858 + retsig = 42 + (((currsig - 5) * 2) / 3);
33859 + }
33860 + else if(currsig == 4)
33861 + {
33862 + retsig = 36;
33863 + }
33864 + else if(currsig == 3)
33865 + {
33866 + retsig = 27;
33867 + }
33868 + else if(currsig == 2)
33869 + {
33870 + retsig = 18;
33871 + }
33872 + else if(currsig == 1)
33873 + {
33874 + retsig = 9;
33875 + }
33876 + else
33877 + {
33878 + retsig = currsig;
33879 + }
33880 +
33881 + return retsig;
33882 +}
33883 +
33884 +static void rtl8192_query_rxphystatus(
33885 + struct r8192_priv * priv,
33886 + struct ieee80211_rx_stats * pstats,
33887 + prx_desc_819x_pci pdesc,
33888 + prx_fwinfo_819x_pci pdrvinfo,
33889 + struct ieee80211_rx_stats * precord_stats,
33890 + bool bpacket_match_bssid,
33891 + bool bpacket_toself,
33892 + bool bPacketBeacon,
33893 + bool bToSelfBA
33894 + )
33895 +{
33896 + //PRT_RFD_STATUS pRtRfdStatus = &(pRfd->Status);
33897 + phy_sts_ofdm_819xpci_t* pofdm_buf;
33898 + phy_sts_cck_819xpci_t * pcck_buf;
33899 + phy_ofdm_rx_status_rxsc_sgien_exintfflag* prxsc;
33900 + u8 *prxpkt;
33901 + u8 i,max_spatial_stream, tmp_rxsnr, tmp_rxevm, rxsc_sgien_exflg;
33902 + char rx_pwr[4], rx_pwr_all=0;
33903 + //long rx_avg_pwr = 0;
33904 + char rx_snrX, rx_evmX;
33905 + u8 evm, pwdb_all;
33906 + u32 RSSI, total_rssi=0;//, total_evm=0;
33907 +// long signal_strength_index = 0;
33908 + u8 is_cck_rate=0;
33909 + u8 rf_rx_num = 0;
33910 +
33911 + /* 2007/07/04 MH For OFDM RSSI. For high power or not. */
33912 + static u8 check_reg824 = 0;
33913 + static u32 reg824_bit9 = 0;
33914 +
33915 + priv->stats.numqry_phystatus++;
33916 +
33917 + is_cck_rate = rx_hal_is_cck_rate(pdrvinfo);
33918 +
33919 + // Record it for next packet processing
33920 + memset(precord_stats, 0, sizeof(struct ieee80211_rx_stats));
33921 + pstats->bPacketMatchBSSID = precord_stats->bPacketMatchBSSID = bpacket_match_bssid;
33922 + pstats->bPacketToSelf = precord_stats->bPacketToSelf = bpacket_toself;
33923 + pstats->bIsCCK = precord_stats->bIsCCK = is_cck_rate;//RX_HAL_IS_CCK_RATE(pDrvInfo);
33924 + pstats->bPacketBeacon = precord_stats->bPacketBeacon = bPacketBeacon;
33925 + pstats->bToSelfBA = precord_stats->bToSelfBA = bToSelfBA;
33926 + /*2007.08.30 requested by SD3 Jerry */
33927 + if(check_reg824 == 0)
33928 + {
33929 + reg824_bit9 = rtl8192_QueryBBReg(priv->ieee80211->dev, rFPGA0_XA_HSSIParameter2, 0x200);
33930 + check_reg824 = 1;
33931 + }
33932 +
33933 +
33934 + prxpkt = (u8*)pdrvinfo;
33935 +
33936 + /* Move pointer to the 16th bytes. Phy status start address. */
33937 + prxpkt += sizeof(rx_fwinfo_819x_pci);
33938 +
33939 + /* Initial the cck and ofdm buffer pointer */
33940 + pcck_buf = (phy_sts_cck_819xpci_t *)prxpkt;
33941 + pofdm_buf = (phy_sts_ofdm_819xpci_t *)prxpkt;
33942 +
33943 + pstats->RxMIMOSignalQuality[0] = -1;
33944 + pstats->RxMIMOSignalQuality[1] = -1;
33945 + precord_stats->RxMIMOSignalQuality[0] = -1;
33946 + precord_stats->RxMIMOSignalQuality[1] = -1;
33947 +
33948 + if(is_cck_rate)
33949 + {
33950 + //
33951 + // (1)Hardware does not provide RSSI for CCK
33952 + //
33953 +
33954 + //
33955 + // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
33956 + //
33957 + u8 report;//, cck_agc_rpt;
33958 +#ifdef RTL8190P
33959 + u8 tmp_pwdb;
33960 + char cck_adc_pwdb[4];
33961 +#endif
33962 + priv->stats.numqry_phystatusCCK++;
33963 +
33964 +#ifdef RTL8190P //Only 90P 2T4R need to check
33965 + if(priv->rf_type == RF_2T4R && DM_RxPathSelTable.Enable && bpacket_match_bssid)
33966 + {
33967 + for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
33968 + {
33969 + tmp_pwdb = pcck_buf->adc_pwdb_X[i];
33970 + cck_adc_pwdb[i] = (char)tmp_pwdb;
33971 + cck_adc_pwdb[i] /= 2;
33972 + pstats->cck_adc_pwdb[i] = precord_stats->cck_adc_pwdb[i] = cck_adc_pwdb[i];
33973 + //DbgPrint("RF-%d tmp_pwdb = 0x%x, cck_adc_pwdb = %d", i, tmp_pwdb, cck_adc_pwdb[i]);
33974 + }
33975 + }
33976 +#endif
33977 +
33978 + if(!reg824_bit9)
33979 + {
33980 + report = pcck_buf->cck_agc_rpt & 0xc0;
33981 + report = report>>6;
33982 + switch(report)
33983 + {
33984 + //Fixed by Jacken from Bryant 2008-03-20
33985 + //Original value is -38 , -26 , -14 , -2
33986 + //Fixed value is -35 , -23 , -11 , 6
33987 + case 0x3:
33988 + rx_pwr_all = -35 - (pcck_buf->cck_agc_rpt & 0x3e);
33989 + break;
33990 + case 0x2:
33991 + rx_pwr_all = -23 - (pcck_buf->cck_agc_rpt & 0x3e);
33992 + break;
33993 + case 0x1:
33994 + rx_pwr_all = -11 - (pcck_buf->cck_agc_rpt & 0x3e);
33995 + break;
33996 + case 0x0:
33997 + rx_pwr_all = 8 - (pcck_buf->cck_agc_rpt & 0x3e);
33998 + break;
33999 + }
34000 + }
34001 + else
34002 + {
34003 + report = pcck_buf->cck_agc_rpt & 0x60;
34004 + report = report>>5;
34005 + switch(report)
34006 + {
34007 + case 0x3:
34008 + rx_pwr_all = -35 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
34009 + break;
34010 + case 0x2:
34011 + rx_pwr_all = -23 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1);
34012 + break;
34013 + case 0x1:
34014 + rx_pwr_all = -11 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
34015 + break;
34016 + case 0x0:
34017 + rx_pwr_all = -8 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
34018 + break;
34019 + }
34020 + }
34021 +
34022 + pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);
34023 + pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
34024 + pstats->RecvSignalPower = rx_pwr_all;
34025 +
34026 + //
34027 + // (3) Get Signal Quality (EVM)
34028 + //
34029 + if(bpacket_match_bssid)
34030 + {
34031 + u8 sq;
34032 +
34033 + if(pstats->RxPWDBAll > 40)
34034 + {
34035 + sq = 100;
34036 + }else
34037 + {
34038 + sq = pcck_buf->sq_rpt;
34039 +
34040 + if(pcck_buf->sq_rpt > 64)
34041 + sq = 0;
34042 + else if (pcck_buf->sq_rpt < 20)
34043 + sq = 100;
34044 + else
34045 + sq = ((64-sq) * 100) / 44;
34046 + }
34047 + pstats->SignalQuality = precord_stats->SignalQuality = sq;
34048 + pstats->RxMIMOSignalQuality[0] = precord_stats->RxMIMOSignalQuality[0] = sq;
34049 + pstats->RxMIMOSignalQuality[1] = precord_stats->RxMIMOSignalQuality[1] = -1;
34050 + }
34051 + }
34052 + else
34053 + {
34054 + priv->stats.numqry_phystatusHT++;
34055 + //
34056 + // (1)Get RSSI for HT rate
34057 + //
34058 + for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
34059 + {
34060 + // 2008/01/30 MH we will judge RF RX path now.
34061 + if (priv->brfpath_rxenable[i])
34062 + rf_rx_num++;
34063 + //else
34064 + //continue;
34065 +
34066 + //Fixed by Jacken from Bryant 2008-03-20
34067 + //Original value is 106
34068 +#ifdef RTL8190P //Modify by Jacken 2008/03/31
34069 + rx_pwr[i] = ((pofdm_buf->trsw_gain_X[i]&0x3F)*2) - 106;
34070 +#else
34071 + rx_pwr[i] = ((pofdm_buf->trsw_gain_X[i]&0x3F)*2) - 110;
34072 +#endif
34073 +
34074 + //Get Rx snr value in DB
34075 + tmp_rxsnr = pofdm_buf->rxsnr_X[i];
34076 + rx_snrX = (char)(tmp_rxsnr);
34077 + rx_snrX /= 2;
34078 + priv->stats.rxSNRdB[i] = (long)rx_snrX;
34079 +
34080 + /* Translate DBM to percentage. */
34081 + RSSI = rtl819x_query_rxpwrpercentage(rx_pwr[i]);
34082 + if (priv->brfpath_rxenable[i])
34083 + total_rssi += RSSI;
34084 +
34085 + /* Record Signal Strength for next packet */
34086 + if(bpacket_match_bssid)
34087 + {
34088 + pstats->RxMIMOSignalStrength[i] =(u8) RSSI;
34089 + precord_stats->RxMIMOSignalStrength[i] =(u8) RSSI;
34090 + }
34091 + }
34092 +
34093 +
34094 + //
34095 + // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
34096 + //
34097 + //Fixed by Jacken from Bryant 2008-03-20
34098 + //Original value is 106
34099 + rx_pwr_all = (((pofdm_buf->pwdb_all ) >> 1 )& 0x7f) -106;
34100 + pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);
34101 +
34102 + pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
34103 + pstats->RxPower = precord_stats->RxPower = rx_pwr_all;
34104 + pstats->RecvSignalPower = rx_pwr_all;
34105 + //
34106 + // (3)EVM of HT rate
34107 + //
34108 + if(pdrvinfo->RxHT && pdrvinfo->RxRate>=DESC90_RATEMCS8 &&
34109 + pdrvinfo->RxRate<=DESC90_RATEMCS15)
34110 + max_spatial_stream = 2; //both spatial stream make sense
34111 + else
34112 + max_spatial_stream = 1; //only spatial stream 1 makes sense
34113 +
34114 + for(i=0; i<max_spatial_stream; i++)
34115 + {
34116 + tmp_rxevm = pofdm_buf->rxevm_X[i];
34117 + rx_evmX = (char)(tmp_rxevm);
34118 +
34119 + // Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment
34120 + // fill most significant bit to "zero" when doing shifting operation which may change a negative
34121 + // value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore.
34122 + rx_evmX /= 2; //dbm
34123 +
34124 + evm = rtl819x_evm_dbtopercentage(rx_evmX);
34125 +#if 0
34126 + EVM = SignalScaleMapping(EVM);//make it good looking, from 0~100
34127 +#endif
34128 + if(bpacket_match_bssid)
34129 + {
34130 + if(i==0) // Fill value in RFD, Get the first spatial stream only
34131 + pstats->SignalQuality = precord_stats->SignalQuality = (u8)(evm & 0xff);
34132 + pstats->RxMIMOSignalQuality[i] = precord_stats->RxMIMOSignalQuality[i] = (u8)(evm & 0xff);
34133 + }
34134 + }
34135 +
34136 +
34137 + /* record rx statistics for debug */
34138 + rxsc_sgien_exflg = pofdm_buf->rxsc_sgien_exflg;
34139 + prxsc = (phy_ofdm_rx_status_rxsc_sgien_exintfflag *)&rxsc_sgien_exflg;
34140 + if(pdrvinfo->BW) //40M channel
34141 + priv->stats.received_bwtype[1+prxsc->rxsc]++;
34142 + else //20M channel
34143 + priv->stats.received_bwtype[0]++;
34144 + }
34145 +
34146 + //UI BSS List signal strength(in percentage), make it good looking, from 0~100.
34147 + //It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().
34148 + if(is_cck_rate)
34149 + {
34150 + pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)pwdb_all));//PWDB_ALL;
34151 +
34152 + }
34153 + else
34154 + {
34155 + //pRfd->Status.SignalStrength = pRecordRfd->Status.SignalStrength = (u1Byte)(SignalScaleMapping(total_rssi/=RF90_PATH_MAX));//(u1Byte)(total_rssi/=RF90_PATH_MAX);
34156 + // We can judge RX path number now.
34157 + if (rf_rx_num != 0)
34158 + pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)(total_rssi/=rf_rx_num)));
34159 + }
34160 +} /* QueryRxPhyStatus8190Pci */
34161 +
34162 +static void
34163 +rtl8192_record_rxdesc_forlateruse(
34164 + struct ieee80211_rx_stats * psrc_stats,
34165 + struct ieee80211_rx_stats * ptarget_stats
34166 +)
34167 +{
34168 + ptarget_stats->bIsAMPDU = psrc_stats->bIsAMPDU;
34169 + ptarget_stats->bFirstMPDU = psrc_stats->bFirstMPDU;
34170 + //ptarget_stats->Seq_Num = psrc_stats->Seq_Num;
34171 +}
34172 +
34173 +
34174 +
34175 +static void TranslateRxSignalStuff819xpci(struct net_device *dev,
34176 + struct sk_buff *skb,
34177 + struct ieee80211_rx_stats * pstats,
34178 + prx_desc_819x_pci pdesc,
34179 + prx_fwinfo_819x_pci pdrvinfo)
34180 +{
34181 + // TODO: We must only check packet for current MAC address. Not finish
34182 + struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
34183 + bool bpacket_match_bssid, bpacket_toself;
34184 + bool bPacketBeacon=false, bToSelfBA=false;
34185 + static struct ieee80211_rx_stats previous_stats;
34186 + struct ieee80211_hdr_3addr *hdr;
34187 + u16 fc,type;
34188 +
34189 + // Get Signal Quality for only RX data queue (but not command queue)
34190 +
34191 + u8* tmp_buf;
34192 + u8 *praddr;
34193 +
34194 + /* Get MAC frame start address. */
34195 + tmp_buf = skb->data;
34196 +
34197 + hdr = (struct ieee80211_hdr_3addr *)tmp_buf;
34198 + fc = le16_to_cpu(hdr->frame_ctl);
34199 + type = WLAN_FC_GET_TYPE(fc);
34200 + praddr = hdr->addr1;
34201 +
34202 + /* Check if the received packet is acceptabe. */
34203 + bpacket_match_bssid = ((IEEE80211_FTYPE_CTL != type) &&
34204 + (eqMacAddr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS)? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS )? hdr->addr2 : hdr->addr3))
34205 + && (!pstats->bHwError) && (!pstats->bCRC)&& (!pstats->bICV));
34206 + bpacket_toself = bpacket_match_bssid & (eqMacAddr(praddr, priv->ieee80211->dev->dev_addr));
34207 +#if 1//cosa
34208 + if(WLAN_FC_GET_FRAMETYPE(fc)== IEEE80211_STYPE_BEACON)
34209 + {
34210 + bPacketBeacon = true;
34211 + //DbgPrint("Beacon 2, MatchBSSID = %d, ToSelf = %d \n", bPacketMatchBSSID, bPacketToSelf);
34212 + }
34213 + if(WLAN_FC_GET_FRAMETYPE(fc) == IEEE80211_STYPE_BLOCKACK)
34214 + {
34215 + if((eqMacAddr(praddr,dev->dev_addr)))
34216 + bToSelfBA = true;
34217 + //DbgPrint("BlockAck, MatchBSSID = %d, ToSelf = %d \n", bPacketMatchBSSID, bPacketToSelf);
34218 + }
34219 +
34220 +#endif
34221 + if(bpacket_match_bssid)
34222 + {
34223 + priv->stats.numpacket_matchbssid++;
34224 + }
34225 + if(bpacket_toself){
34226 + priv->stats.numpacket_toself++;
34227 + }
34228 + //
34229 + // Process PHY information for previous packet (RSSI/PWDB/EVM)
34230 + //
34231 + // Because phy information is contained in the last packet of AMPDU only, so driver
34232 + // should process phy information of previous packet
34233 + rtl8192_process_phyinfo(priv, tmp_buf,&previous_stats, pstats);
34234 + rtl8192_query_rxphystatus(priv, pstats, pdesc, pdrvinfo, &previous_stats, bpacket_match_bssid,
34235 + bpacket_toself ,bPacketBeacon, bToSelfBA);
34236 + rtl8192_record_rxdesc_forlateruse(pstats, &previous_stats);
34237 +
34238 +}
34239 +
34240 +
34241 +static void rtl8192_tx_resume(struct net_device *dev)
34242 +{
34243 + struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
34244 + struct ieee80211_device *ieee = priv->ieee80211;
34245 + struct sk_buff *skb;
34246 + int queue_index;
34247 +
34248 + for(queue_index = BK_QUEUE; queue_index < TXCMD_QUEUE;queue_index++) {
34249 + while((!skb_queue_empty(&ieee->skb_waitQ[queue_index]))&&
34250 + (priv->ieee80211->check_nic_enough_desc(dev,queue_index) > 0)) {
34251 + /* 1. dequeue the packet from the wait queue */
34252 + skb = skb_dequeue(&ieee->skb_waitQ[queue_index]);
34253 + /* 2. tx the packet directly */
34254 + ieee->softmac_data_hard_start_xmit(skb,dev,0/* rate useless now*/);
34255 + #if 0
34256 + if(queue_index!=MGNT_QUEUE) {
34257 + ieee->stats.tx_packets++;
34258 + ieee->stats.tx_bytes += skb->len;
34259 + }
34260 + #endif
34261 + }
34262 + }
34263 +}
34264 +
34265 +void rtl8192_irq_tx_tasklet(struct r8192_priv *priv)
34266 +{
34267 + rtl8192_tx_resume(priv->ieee80211->dev);
34268 +}
34269 +
34270 +/**
34271 +* Function: UpdateReceivedRateHistogramStatistics
34272 +* Overview: Recored down the received data rate
34273 +*
34274 +* Input:
34275 +* PADAPTER Adapter
34276 +* PRT_RFD pRfd,
34277 +*
34278 +* Output:
34279 +* PRT_TCB Adapter
34280 +* (Adapter->RxStats.ReceivedRateHistogram[] is updated)
34281 +* Return:
34282 +* None
34283 +*/
34284 +static void UpdateReceivedRateHistogramStatistics8190(
34285 + struct net_device *dev,
34286 + struct ieee80211_rx_stats* pstats
34287 + )
34288 +{
34289 + struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
34290 + u32 rcvType=1; //0: Total, 1:OK, 2:CRC, 3:ICV
34291 + u32 rateIndex;
34292 + u32 preamble_guardinterval; //1: short preamble/GI, 0: long preamble/GI
34293 +
34294 + /* 2007/03/09 MH We will not update rate of packet from rx cmd queue. */
34295 + #if 0
34296 + if (pRfd->queue_id == CMPK_RX_QUEUE_ID)
34297 + return;
34298 + #endif
34299 + if(pstats->bCRC)
34300 + rcvType = 2;
34301 + else if(pstats->bICV)
34302 + rcvType = 3;
34303 +
34304 + if(pstats->bShortPreamble)
34305 + preamble_guardinterval = 1;// short
34306 + else
34307 + preamble_guardinterval = 0;// long
34308 +
34309 + switch(pstats->rate)
34310 + {
34311 + //
34312 + // CCK rate
34313 + //
34314 + case MGN_1M: rateIndex = 0; break;
34315 + case MGN_2M: rateIndex = 1; break;
34316 + case MGN_5_5M: rateIndex = 2; break;
34317 + case MGN_11M: rateIndex = 3; break;
34318 + //
34319 + // Legacy OFDM rate
34320 + //
34321 + case MGN_6M: rateIndex = 4; break;
34322 + case MGN_9M: rateIndex = 5; break;
34323 + case MGN_12M: rateIndex = 6; break;
34324 + case MGN_18M: rateIndex = 7; break;
34325 + case MGN_24M: rateIndex = 8; break;
34326 + case MGN_36M: rateIndex = 9; break;
34327 + case MGN_48M: rateIndex = 10; break;
34328 + case MGN_54M: rateIndex = 11; break;
34329 + //
34330 + // 11n High throughput rate
34331 + //
34332 + case MGN_MCS0: rateIndex = 12; break;
34333 + case MGN_MCS1: rateIndex = 13; break;
34334 + case MGN_MCS2: rateIndex = 14; break;
34335 + case MGN_MCS3: rateIndex = 15; break;
34336 + case MGN_MCS4: rateIndex = 16; break;
34337 + case MGN_MCS5: rateIndex = 17; break;
34338 + case MGN_MCS6: rateIndex = 18; break;
34339 + case MGN_MCS7: rateIndex = 19; break;
34340 + case MGN_MCS8: rateIndex = 20; break;
34341 + case MGN_MCS9: rateIndex = 21; break;
34342 + case MGN_MCS10: rateIndex = 22; break;
34343 + case MGN_MCS11: rateIndex = 23; break;
34344 + case MGN_MCS12: rateIndex = 24; break;
34345 + case MGN_MCS13: rateIndex = 25; break;
34346 + case MGN_MCS14: rateIndex = 26; break;
34347 + case MGN_MCS15: rateIndex = 27; break;
34348 + default: rateIndex = 28; break;
34349 + }
34350 + priv->stats.received_preamble_GI[preamble_guardinterval][rateIndex]++;
34351 + priv->stats.received_rate_histogram[0][rateIndex]++; //total
34352 + priv->stats.received_rate_histogram[rcvType][rateIndex]++;
34353 +}
34354 +
34355 +static void rtl8192_rx(struct net_device *dev)
34356 +{
34357 + struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
34358 + struct ieee80211_hdr_1addr *ieee80211_hdr = NULL;
34359 + bool unicast_packet = false;
34360 + struct ieee80211_rx_stats stats = {
34361 + .signal = 0,
34362 + .noise = -98,
34363 + .rate = 0,
34364 + .freq = IEEE80211_24GHZ_BAND,
34365 + };
34366 + unsigned int count = priv->rxringcount;
34367 +
34368 + stats.nic_type = NIC_8192E;
34369 +
34370 + while (count--) {
34371 + rx_desc_819x_pci *pdesc = &priv->rx_ring[priv->rx_idx];//rx descriptor
34372 + struct sk_buff *skb = priv->rx_buf[priv->rx_idx];//rx pkt
34373 +
34374 + if (pdesc->OWN){
34375 + /* wait data to be filled by hardware */
34376 + return;
34377 + } else {
34378 + stats.bICV = pdesc->ICV;
34379 + stats.bCRC = pdesc->CRC32;
34380 + stats.bHwError = pdesc->CRC32 | pdesc->ICV;
34381 +
34382 + stats.Length = pdesc->Length;
34383 + if(stats.Length < 24)
34384 + stats.bHwError |= 1;
34385 +
34386 + if(stats.bHwError) {
34387 + stats.bShift = false;
34388 +
34389 + if(pdesc->CRC32) {
34390 + if (pdesc->Length <500)
34391 + priv->stats.rxcrcerrmin++;
34392 + else if (pdesc->Length >1000)
34393 + priv->stats.rxcrcerrmax++;
34394 + else
34395 + priv->stats.rxcrcerrmid++;
34396 + }
34397 + goto done;
34398 + } else {
34399 + prx_fwinfo_819x_pci pDrvInfo = NULL;
34400 + struct sk_buff *new_skb = dev_alloc_skb(priv->rxbuffersize);
34401 +
34402 + if (unlikely(!new_skb)) {
34403 + goto done;
34404 + }
34405 +
34406 + stats.RxDrvInfoSize = pdesc->RxDrvInfoSize;
34407 + stats.RxBufShift = ((pdesc->Shift)&0x03);
34408 + stats.Decrypted = !pdesc->SWDec;
34409 +
34410 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
34411 + pci_dma_sync_single_for_cpu(priv->pdev,
34412 +#else
34413 + pci_unmap_single(priv->pdev,
34414 +#endif
34415 + *((dma_addr_t *)skb->cb),
34416 + priv->rxbuffersize,
34417 + PCI_DMA_FROMDEVICE);
34418 + skb_put(skb, pdesc->Length);
34419 + pDrvInfo = (rx_fwinfo_819x_pci *)(skb->data + stats.RxBufShift);
34420 + skb_reserve(skb, stats.RxDrvInfoSize + stats.RxBufShift);
34421 +
34422 + stats.rate = HwRateToMRate90((bool)pDrvInfo->RxHT, (u8)pDrvInfo->RxRate);
34423 + stats.bShortPreamble = pDrvInfo->SPLCP;
34424 +
34425 + /* it is debug only. It should be disabled in released driver.
34426 + * 2007.1.11 by Emily
34427 + * */
34428 + UpdateReceivedRateHistogramStatistics8190(dev, &stats);
34429 +
34430 + stats.bIsAMPDU = (pDrvInfo->PartAggr==1);
34431 + stats.bFirstMPDU = (pDrvInfo->PartAggr==1) && (pDrvInfo->FirstAGGR==1);
34432 +
34433 + stats.TimeStampLow = pDrvInfo->TSFL;
34434 + stats.TimeStampHigh = read_nic_dword(dev, TSFR+4);
34435 +
34436 + UpdateRxPktTimeStamp8190(dev, &stats);
34437 +
34438 + //
34439 + // Get Total offset of MPDU Frame Body
34440 + //
34441 + if((stats.RxBufShift + stats.RxDrvInfoSize) > 0)
34442 + stats.bShift = 1;
34443 +
34444 + stats.RxIs40MHzPacket = pDrvInfo->BW;
34445 +
34446 + /* ???? */
34447 + TranslateRxSignalStuff819xpci(dev,skb, &stats, pdesc, pDrvInfo);
34448 +
34449 + /* Rx A-MPDU */
34450 + if(pDrvInfo->FirstAGGR==1 || pDrvInfo->PartAggr == 1)
34451 + RT_TRACE(COMP_RXDESC, "pDrvInfo->FirstAGGR = %d, pDrvInfo->PartAggr = %d\n",
34452 + pDrvInfo->FirstAGGR, pDrvInfo->PartAggr);
34453 + skb_trim(skb, skb->len - 4/*sCrcLng*/);
34454 + /* rx packets statistics */
34455 + ieee80211_hdr = (struct ieee80211_hdr_1addr *)skb->data;
34456 + unicast_packet = false;
34457 +
34458 + if(is_broadcast_ether_addr(ieee80211_hdr->addr1)) {
34459 + //TODO
34460 + }else if(is_multicast_ether_addr(ieee80211_hdr->addr1)){
34461 + //TODO
34462 + }else {
34463 + /* unicast packet */
34464 + unicast_packet = true;
34465 + }
34466 +
34467 + stats.packetlength = stats.Length-4;
34468 + stats.fraglength = stats.packetlength;
34469 + stats.fragoffset = 0;
34470 + stats.ntotalfrag = 1;
34471 +
34472 + if(!ieee80211_rx(priv->ieee80211, skb, &stats)){
34473 + dev_kfree_skb_any(skb);
34474 + } else {
34475 + priv->stats.rxok++;
34476 + if(unicast_packet) {
34477 + priv->stats.rxbytesunicast += skb->len;
34478 + }
34479 + }
34480 +
34481 + skb = new_skb;
34482 + priv->rx_buf[priv->rx_idx] = skb;
34483 + *((dma_addr_t *) skb->cb) = pci_map_single(priv->pdev, skb->tail, priv->rxbuffersize, PCI_DMA_FROMDEVICE);
34484 +// *((dma_addr_t *) skb->cb) = pci_map_single(priv->pdev, skb_tail_pointer(skb), priv->rxbuffersize, PCI_DMA_FROMDEVICE);
34485 + }
34486 +
34487 + }
34488 +done:
34489 + pdesc->BufferAddress = cpu_to_le32(*((dma_addr_t *)skb->cb));
34490 + pdesc->OWN = 1;
34491 + pdesc->Length = priv->rxbuffersize;
34492 + if (priv->rx_idx == priv->rxringcount-1)
34493 + pdesc->EOR = 1;
34494 + priv->rx_idx = (priv->rx_idx + 1) % priv->rxringcount;
34495 + }
34496 +
34497 +}
34498 +
34499 +void rtl8192_irq_rx_tasklet(struct r8192_priv *priv)
34500 +{
34501 + rtl8192_rx(priv->ieee80211->dev);
34502 + /* unmask RDU */
34503 + write_nic_dword(priv->ieee80211->dev, INTA_MASK,read_nic_dword(priv->ieee80211->dev, INTA_MASK) | IMR_RDU);
34504 +}
34505 +
34506 +static const struct net_device_ops rtl8192_netdev_ops = {
34507 + .ndo_open = rtl8192_open,
34508 + .ndo_stop = rtl8192_close,
34509 +/* .ndo_get_stats = rtl8192_stats, */
34510 + .ndo_tx_timeout = tx_timeout,
34511 + .ndo_do_ioctl = rtl8192_ioctl,
34512 + .ndo_set_multicast_list = r8192_set_multicast,
34513 + .ndo_set_mac_address = r8192_set_mac_adr,
34514 + .ndo_start_xmit = ieee80211_xmit,
34515 +};
34516 +
34517 +/****************************************************************************
34518 + ---------------------------- PCI_STUFF---------------------------
34519 +*****************************************************************************/
34520 +
34521 +static int __devinit rtl8192_pci_probe(struct pci_dev *pdev,
34522 + const struct pci_device_id *id)
34523 +{
34524 + unsigned long ioaddr = 0;
34525 + struct net_device *dev = NULL;
34526 + struct r8192_priv *priv= NULL;
34527 + u8 unit = 0;
34528 +
34529 +#ifdef CONFIG_RTL8192_IO_MAP
34530 + unsigned long pio_start, pio_len, pio_flags;
34531 +#else
34532 + unsigned long pmem_start, pmem_len, pmem_flags;
34533 +#endif //end #ifdef RTL_IO_MAP
34534 +
34535 + RT_TRACE(COMP_INIT,"Configuring chip resources");
34536 +
34537 + if( pci_enable_device (pdev) ){
34538 + RT_TRACE(COMP_ERR,"Failed to enable PCI device");
34539 + return -EIO;
34540 + }
34541 +
34542 + pci_set_master(pdev);
34543 + //pci_set_wmi(pdev);
34544 + pci_set_dma_mask(pdev, 0xffffff00ULL);
34545 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
34546 + pci_set_consistent_dma_mask(pdev,0xffffff00ULL);
34547 +#endif
34548 + dev = alloc_ieee80211(sizeof(struct r8192_priv));
34549 + if (!dev)
34550 + return -ENOMEM;
34551 +
34552 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
34553 + SET_MODULE_OWNER(dev);
34554 +#endif
34555 +
34556 + pci_set_drvdata(pdev, dev);
34557 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
34558 + SET_NETDEV_DEV(dev, &pdev->dev);
34559 +#endif
34560 + priv = ieee80211_priv(dev);
34561 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
34562 + priv->ieee80211 = netdev_priv(dev);
34563 +#else
34564 + priv->ieee80211 = (struct ieee80211_device *)dev->priv;
34565 +#endif
34566 + priv->pdev=pdev;
34567 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
34568 + if((pdev->subsystem_vendor == PCI_VENDOR_ID_DLINK)&&(pdev->subsystem_device == 0x3304)){
34569 + priv->ieee80211->bSupportRemoteWakeUp = 1;
34570 + } else
34571 +#endif
34572 + {
34573 + priv->ieee80211->bSupportRemoteWakeUp = 0;
34574 + }
34575 +
34576 +#ifdef CONFIG_RTL8192_IO_MAP
34577 +
34578 + pio_start = (unsigned long)pci_resource_start (pdev, 0);
34579 + pio_len = (unsigned long)pci_resource_len (pdev, 0);
34580 + pio_flags = (unsigned long)pci_resource_flags (pdev, 0);
34581 +
34582 + if (!(pio_flags & IORESOURCE_IO)) {
34583 + RT_TRACE(COMP_ERR,"region #0 not a PIO resource, aborting");
34584 + goto fail;
34585 + }
34586 +
34587 + //DMESG("IO space @ 0x%08lx", pio_start );
34588 + if( ! request_region( pio_start, pio_len, RTL819xE_MODULE_NAME ) ){
34589 + RT_TRACE(COMP_ERR,"request_region failed!");
34590 + goto fail;
34591 + }
34592 +
34593 + ioaddr = pio_start;
34594 + dev->base_addr = ioaddr; // device I/O address
34595 +
34596 +#else
34597 +
34598 + pmem_start = pci_resource_start(pdev, 1);
34599 + pmem_len = pci_resource_len(pdev, 1);
34600 + pmem_flags = pci_resource_flags (pdev, 1);
34601 +
34602 + if (!(pmem_flags & IORESOURCE_MEM)) {
34603 + RT_TRACE(COMP_ERR,"region #1 not a MMIO resource, aborting");
34604 + goto fail;
34605 + }
34606 +
34607 + //DMESG("Memory mapped space @ 0x%08lx ", pmem_start);
34608 + if( ! request_mem_region(pmem_start, pmem_len, RTL819xE_MODULE_NAME)) {
34609 + RT_TRACE(COMP_ERR,"request_mem_region failed!");
34610 + goto fail;
34611 + }
34612 +
34613 +
34614 + ioaddr = (unsigned long)ioremap_nocache( pmem_start, pmem_len);
34615 + if( ioaddr == (unsigned long)NULL ){
34616 + RT_TRACE(COMP_ERR,"ioremap failed!");
34617 + // release_mem_region( pmem_start, pmem_len );
34618 + goto fail1;
34619 + }
34620 +
34621 + dev->mem_start = ioaddr; // shared mem start
34622 + dev->mem_end = ioaddr + pci_resource_len(pdev, 0); // shared mem end
34623 +
34624 +#endif //end #ifdef RTL_IO_MAP
34625 +
34626 + /* We disable the RETRY_TIMEOUT register (0x41) to keep
34627 + * PCI Tx retries from interfering with C3 CPU state */
34628 + pci_write_config_byte(pdev, 0x41, 0x00);
34629 +
34630 +
34631 + pci_read_config_byte(pdev, 0x05, &unit);
34632 + pci_write_config_byte(pdev, 0x05, unit & (~0x04));
34633 +
34634 + dev->irq = pdev->irq;
34635 + priv->irq = 0;
34636 +
34637 + dev->netdev_ops = &rtl8192_netdev_ops;
34638 +#if 0
34639 + dev->open = rtl8192_open;
34640 + dev->stop = rtl8192_close;
34641 + //dev->hard_start_xmit = rtl8192_8023_hard_start_xmit;
34642 + dev->tx_timeout = tx_timeout;
34643 + //dev->wireless_handlers = &r8192_wx_handlers_def;
34644 + dev->do_ioctl = rtl8192_ioctl;
34645 + dev->set_multicast_list = r8192_set_multicast;
34646 + dev->set_mac_address = r8192_set_mac_adr;
34647 +#endif
34648 +
34649 + //DMESG("Oops: i'm coming\n");
34650 +#if WIRELESS_EXT >= 12
34651 +#if WIRELESS_EXT < 17
34652 + dev->get_wireless_stats = r8192_get_wireless_stats;
34653 +#endif
34654 + dev->wireless_handlers = (struct iw_handler_def *) &r8192_wx_handlers_def;
34655 +#endif
34656 + //dev->get_wireless_stats = r8192_get_wireless_stats;
34657 + dev->type=ARPHRD_ETHER;
34658 +
34659 + dev->watchdog_timeo = HZ*3; //modified by john, 0805
34660 +
34661 + if (dev_alloc_name(dev, ifname) < 0){
34662 + RT_TRACE(COMP_INIT, "Oops: devname already taken! Trying wlan%%d...\n");
34663 + ifname = "wlan%d";
34664 + dev_alloc_name(dev, ifname);
34665 + }
34666 +
34667 + RT_TRACE(COMP_INIT, "Driver probe completed1\n");
34668 + if(rtl8192_init(dev)!=0){
34669 + RT_TRACE(COMP_ERR, "Initialization failed");
34670 + goto fail;
34671 + }
34672 +
34673 + netif_carrier_off(dev);
34674 + netif_stop_queue(dev);
34675 +
34676 + register_netdev(dev);
34677 + RT_TRACE(COMP_INIT, "dev name=======> %s\n",dev->name);
34678 + rtl8192_proc_init_one(dev);
34679 +
34680 +
34681 + RT_TRACE(COMP_INIT, "Driver probe completed\n");
34682 +//#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
34683 +// return dev;
34684 +//#else
34685 + return 0;
34686 +//#endif
34687 +
34688 +fail1:
34689 +
34690 +#ifdef CONFIG_RTL8180_IO_MAP
34691 +
34692 + if( dev->base_addr != 0 ){
34693 +
34694 + release_region(dev->base_addr,
34695 + pci_resource_len(pdev, 0) );
34696 + }
34697 +#else
34698 + if( dev->mem_start != (unsigned long)NULL ){
34699 + iounmap( (void *)dev->mem_start );
34700 + release_mem_region( pci_resource_start(pdev, 1),
34701 + pci_resource_len(pdev, 1) );
34702 + }
34703 +#endif //end #ifdef RTL_IO_MAP
34704 +
34705 +fail:
34706 + if(dev){
34707 +
34708 + if (priv->irq) {
34709 + free_irq(dev->irq, dev);
34710 + dev->irq=0;
34711 + }
34712 + free_ieee80211(dev);
34713 + }
34714 +
34715 + pci_disable_device(pdev);
34716 +
34717 + DMESG("wlan driver load failed\n");
34718 + pci_set_drvdata(pdev, NULL);
34719 + return -ENODEV;
34720 +
34721 +}
34722 +
34723 +/* detach all the work and timer structure declared or inititialized
34724 + * in r8192_init function.
34725 + * */
34726 +void rtl8192_cancel_deferred_work(struct r8192_priv* priv)
34727 +{
34728 + /* call cancel_work_sync instead of cancel_delayed_work if and only if Linux_version_code
34729 + * is or is newer than 2.6.20 and work structure is defined to be struct work_struct.
34730 + * Otherwise call cancel_delayed_work is enough.
34731 + * FIXME (2.6.20 shoud 2.6.22, work_struct shoud not cancel)
34732 + * */
34733 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
34734 + cancel_delayed_work(&priv->watch_dog_wq);
34735 + cancel_delayed_work(&priv->update_beacon_wq);
34736 + cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
34737 + cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
34738 +#ifdef RTL8192E
34739 + cancel_delayed_work(&priv->gpio_change_rf_wq);
34740 +#endif
34741 +#endif
34742 +#if LINUX_VERSION_CODE >=KERNEL_VERSION(2,6,22)
34743 + cancel_work_sync(&priv->reset_wq);
34744 + cancel_work_sync(&priv->qos_activate);
34745 + //cancel_work_sync(&priv->SetBWModeWorkItem);
34746 + //cancel_work_sync(&priv->SwChnlWorkItem);
34747 +#else
34748 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
34749 + cancel_delayed_work(&priv->reset_wq);
34750 + cancel_delayed_work(&priv->qos_activate);
34751 + //cancel_delayed_work(&priv->SetBWModeWorkItem);
34752 + //cancel_delayed_work(&priv->SwChnlWorkItem);
34753 +#endif
34754 +#endif
34755 +
34756 +}
34757 +
34758 +
34759 +static void __devexit rtl8192_pci_disconnect(struct pci_dev *pdev)
34760 +{
34761 + struct net_device *dev = pci_get_drvdata(pdev);
34762 + struct r8192_priv *priv ;
34763 +
34764 + if(dev){
34765 +
34766 + unregister_netdev(dev);
34767 +
34768 + priv=ieee80211_priv(dev);
34769 +
34770 + rtl8192_proc_remove_one(dev);
34771 +
34772 + rtl8192_down(dev);
34773 + if (priv->pFirmware)
34774 + {
34775 + vfree(priv->pFirmware);
34776 + priv->pFirmware = NULL;
34777 + }
34778 + // priv->rf_close(dev);
34779 + // rtl8192_usb_deleteendpoints(dev);
34780 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
34781 + destroy_workqueue(priv->priv_wq);
34782 +#endif
34783 + /* redundant with rtl8192_down */
34784 + // rtl8192_irq_disable(dev);
34785 + // rtl8192_reset(dev);
34786 + // mdelay(10);
34787 + {
34788 + u32 i;
34789 + /* free tx/rx rings */
34790 + rtl8192_free_rx_ring(dev);
34791 + for (i = 0; i < MAX_TX_QUEUE_COUNT; i++) {
34792 + rtl8192_free_tx_ring(dev, i);
34793 + }
34794 + }
34795 + if(priv->irq){
34796 +
34797 + printk("Freeing irq %d\n",dev->irq);
34798 + free_irq(dev->irq, dev);
34799 + priv->irq=0;
34800 +
34801 + }
34802 +
34803 +
34804 +
34805 + // free_beacon_desc_ring(dev,priv->txbeaconcount);
34806 +
34807 +#ifdef CONFIG_RTL8180_IO_MAP
34808 +
34809 + if( dev->base_addr != 0 ){
34810 +
34811 + release_region(dev->base_addr,
34812 + pci_resource_len(pdev, 0) );
34813 + }
34814 +#else
34815 + if( dev->mem_start != (unsigned long)NULL ){
34816 + iounmap( (void *)dev->mem_start );
34817 + release_mem_region( pci_resource_start(pdev, 1),
34818 + pci_resource_len(pdev, 1) );
34819 + }
34820 +#endif /*end #ifdef RTL_IO_MAP*/
34821 + free_ieee80211(dev);
34822 +
34823 + }
34824 +
34825 + pci_disable_device(pdev);
34826 + RT_TRACE(COMP_DOWN, "wlan driver removed\n");
34827 +}
34828 +
34829 +extern int ieee80211_init(void);
34830 +extern void ieee80211_exit(void);
34831 +
34832 +static int __init rtl8192_pci_module_init(void)
34833 +{
34834 + int retval;
34835 +
34836 + retval = ieee80211_init();
34837 + if (retval)
34838 + return retval;
34839 +
34840 + printk(KERN_INFO "\nLinux kernel driver for RTL8192 based WLAN cards\n");
34841 + printk(KERN_INFO "Copyright (c) 2007-2008, Realsil Wlan\n");
34842 + RT_TRACE(COMP_INIT, "Initializing module");
34843 + RT_TRACE(COMP_INIT, "Wireless extensions version %d", WIRELESS_EXT);
34844 + rtl8192_proc_module_init();
34845 +#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22))
34846 + if(0!=pci_module_init(&rtl8192_pci_driver))
34847 +#else
34848 + if(0!=pci_register_driver(&rtl8192_pci_driver))
34849 +#endif
34850 + {
34851 + DMESG("No device found");
34852 + /*pci_unregister_driver (&rtl8192_pci_driver);*/
34853 + return -ENODEV;
34854 + }
34855 + return 0;
34856 +}
34857 +
34858 +
34859 +static void __exit rtl8192_pci_module_exit(void)
34860 +{
34861 + pci_unregister_driver(&rtl8192_pci_driver);
34862 +
34863 + RT_TRACE(COMP_DOWN, "Exiting");
34864 + rtl8192_proc_module_remove();
34865 + ieee80211_exit();
34866 +}
34867 +
34868 +//warning message WB
34869 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)
34870 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
34871 +void rtl8192_interrupt(int irq, void *netdev, struct pt_regs *regs)
34872 +#else
34873 +irqreturn_t rtl8192_interrupt(int irq, void *netdev, struct pt_regs *regs)
34874 +#endif
34875 +#else
34876 +irqreturn_t rtl8192_interrupt(int irq, void *netdev)
34877 +#endif
34878 +{
34879 + struct net_device *dev = (struct net_device *) netdev;
34880 + struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
34881 + unsigned long flags;
34882 + u32 inta;
34883 + /* We should return IRQ_NONE, but for now let me keep this */
34884 + if(priv->irq_enabled == 0){
34885 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
34886 + return;
34887 +#else
34888 + return IRQ_HANDLED;
34889 +#endif
34890 + }
34891 +
34892 + spin_lock_irqsave(&priv->irq_th_lock,flags);
34893 +
34894 + //ISR: 4bytes
34895 +
34896 + inta = read_nic_dword(dev, ISR);// & priv->IntrMask;
34897 + write_nic_dword(dev,ISR,inta); // reset int situation
34898 +
34899 + priv->stats.shints++;
34900 + //DMESG("Enter interrupt, ISR value = 0x%08x", inta);
34901 + if(!inta){
34902 + spin_unlock_irqrestore(&priv->irq_th_lock,flags);
34903 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
34904 + return;
34905 +#else
34906 + return IRQ_HANDLED;
34907 +#endif
34908 + /*
34909 + most probably we can safely return IRQ_NONE,
34910 + but for now is better to avoid problems
34911 + */
34912 + }
34913 +
34914 + if(inta == 0xffff){
34915 + /* HW disappared */
34916 + spin_unlock_irqrestore(&priv->irq_th_lock,flags);
34917 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
34918 + return;
34919 +#else
34920 + return IRQ_HANDLED;
34921 +#endif
34922 + }
34923 +
34924 + priv->stats.ints++;
34925 +#ifdef DEBUG_IRQ
34926 + DMESG("NIC irq %x",inta);
34927 +#endif
34928 + //priv->irqpending = inta;
34929 +
34930 +
34931 + if(!netif_running(dev)) {
34932 + spin_unlock_irqrestore(&priv->irq_th_lock,flags);
34933 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
34934 + return;
34935 +#else
34936 + return IRQ_HANDLED;
34937 +#endif
34938 + }
34939 +
34940 + if(inta & IMR_TIMEOUT0){
34941 + // write_nic_dword(dev, TimerInt, 0);
34942 + //DMESG("=================>waking up");
34943 + // rtl8180_hw_wakeup(dev);
34944 + }
34945 +
34946 + if(inta & IMR_TBDOK){
34947 + RT_TRACE(COMP_INTR, "beacon ok interrupt!\n");
34948 + rtl8192_tx_isr(dev, BEACON_QUEUE);
34949 + priv->stats.txbeaconokint++;
34950 + }
34951 +
34952 + if(inta & IMR_TBDER){
34953 + RT_TRACE(COMP_INTR, "beacon ok interrupt!\n");
34954 + rtl8192_tx_isr(dev, BEACON_QUEUE);
34955 + priv->stats.txbeaconerr++;
34956 + }
34957 +
34958 + if(inta & IMR_MGNTDOK ) {
34959 + RT_TRACE(COMP_INTR, "Manage ok interrupt!\n");
34960 + priv->stats.txmanageokint++;
34961 + rtl8192_tx_isr(dev,MGNT_QUEUE);
34962 +
34963 + }
34964 +
34965 + if(inta & IMR_COMDOK)
34966 + {
34967 + priv->stats.txcmdpktokint++;
34968 + rtl8192_tx_isr(dev,TXCMD_QUEUE);
34969 + }
34970 +
34971 + if(inta & IMR_ROK){
34972 +#ifdef DEBUG_RX
34973 + DMESG("Frame arrived !");
34974 +#endif
34975 + priv->stats.rxint++;
34976 + tasklet_schedule(&priv->irq_rx_tasklet);
34977 + }
34978 +
34979 + if(inta & IMR_BcnInt) {
34980 + RT_TRACE(COMP_INTR, "prepare beacon for interrupt!\n");
34981 + tasklet_schedule(&priv->irq_prepare_beacon_tasklet);
34982 + }
34983 +
34984 + if(inta & IMR_RDU){
34985 + RT_TRACE(COMP_INTR, "rx descriptor unavailable!\n");
34986 + priv->stats.rxrdu++;
34987 + /* reset int situation */
34988 + write_nic_dword(dev,INTA_MASK,read_nic_dword(dev, INTA_MASK) & ~IMR_RDU);
34989 + tasklet_schedule(&priv->irq_rx_tasklet);
34990 + }
34991 +
34992 + if(inta & IMR_RXFOVW){
34993 + RT_TRACE(COMP_INTR, "rx overflow !\n");
34994 + priv->stats.rxoverflow++;
34995 + tasklet_schedule(&priv->irq_rx_tasklet);
34996 + }
34997 +
34998 + if(inta & IMR_TXFOVW) priv->stats.txoverflow++;
34999 +
35000 + if(inta & IMR_BKDOK){
35001 + RT_TRACE(COMP_INTR, "BK Tx OK interrupt!\n");
35002 + priv->stats.txbkokint++;
35003 + priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
35004 + rtl8192_tx_isr(dev,BK_QUEUE);
35005 + rtl8192_try_wake_queue(dev, BK_QUEUE);
35006 + }
35007 +
35008 + if(inta & IMR_BEDOK){
35009 + RT_TRACE(COMP_INTR, "BE TX OK interrupt!\n");
35010 + priv->stats.txbeokint++;
35011 + priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
35012 + rtl8192_tx_isr(dev,BE_QUEUE);
35013 + rtl8192_try_wake_queue(dev, BE_QUEUE);
35014 + }
35015 +
35016 + if(inta & IMR_VIDOK){
35017 + RT_TRACE(COMP_INTR, "VI TX OK interrupt!\n");
35018 + priv->stats.txviokint++;
35019 + priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
35020 + rtl8192_tx_isr(dev,VI_QUEUE);
35021 + rtl8192_try_wake_queue(dev, VI_QUEUE);
35022 + }
35023 +
35024 + if(inta & IMR_VODOK){
35025 + priv->stats.txvookint++;
35026 + priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
35027 + rtl8192_tx_isr(dev,VO_QUEUE);
35028 + rtl8192_try_wake_queue(dev, VO_QUEUE);
35029 + }
35030 +
35031 + force_pci_posting(dev);
35032 + spin_unlock_irqrestore(&priv->irq_th_lock,flags);
35033 +
35034 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
35035 + return;
35036 +#else
35037 + return IRQ_HANDLED;
35038 +#endif
35039 +}
35040 +
35041 +void rtl8192_try_wake_queue(struct net_device *dev, int pri)
35042 +{
35043 +#if 0
35044 + unsigned long flags;
35045 + short enough_desc;
35046 + struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
35047 +
35048 + spin_lock_irqsave(&priv->tx_lock,flags);
35049 + enough_desc = check_nic_enough_desc(dev,pri);
35050 + spin_unlock_irqrestore(&priv->tx_lock,flags);
35051 +
35052 + if(enough_desc)
35053 + ieee80211_wake_queue(priv->ieee80211);
35054 +#endif
35055 +}
35056 +
35057 +
35058 +void EnableHWSecurityConfig8192(struct net_device *dev)
35059 +{
35060 + u8 SECR_value = 0x0;
35061 + // struct ieee80211_device* ieee1 = container_of(&dev, struct ieee80211_device, dev);
35062 + //printk("==>ieee1:%p, dev:%p\n", ieee1, dev);
35063 + struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
35064 + struct ieee80211_device* ieee = priv->ieee80211;
35065 + //printk("==>ieee:%p, dev:%p\n", ieee, dev);
35066 + SECR_value = SCR_TxEncEnable | SCR_RxDecEnable;
35067 +#if 1
35068 + if (((KEY_TYPE_WEP40 == ieee->pairwise_key_type) || (KEY_TYPE_WEP104 == ieee->pairwise_key_type)) && (priv->ieee80211->auth_mode != 2))
35069 + {
35070 + SECR_value |= SCR_RxUseDK;
35071 + SECR_value |= SCR_TxUseDK;
35072 + }
35073 + else if ((ieee->iw_mode == IW_MODE_ADHOC) && (ieee->pairwise_key_type & (KEY_TYPE_CCMP | KEY_TYPE_TKIP)))
35074 + {
35075 + SECR_value |= SCR_RxUseDK;
35076 + SECR_value |= SCR_TxUseDK;
35077 + }
35078 +
35079 +#endif
35080 +
35081 + //add HWSec active enable here.
35082 +//default using hwsec. when peer AP is in N mode only and pairwise_key_type is none_aes(which HT_IOT_ACT_PURE_N_MODE indicates it), use software security. when peer AP is in b,g,n mode mixed and pairwise_key_type is none_aes, use g mode hw security. WB on 2008.7.4
35083 + ieee->hwsec_active = 1;
35084 +
35085 + if ((ieee->pHTInfo->IOTAction&HT_IOT_ACT_PURE_N_MODE) || !hwwep)//!ieee->hwsec_support) //add hwsec_support flag to totol control hw_sec on/off
35086 + {
35087 + ieee->hwsec_active = 0;
35088 + SECR_value &= ~SCR_RxDecEnable;
35089 + }
35090 +
35091 + RT_TRACE(COMP_SEC,"%s:, hwsec:%d, pairwise_key:%d, SECR_value:%x\n", __FUNCTION__, \
35092 + ieee->hwsec_active, ieee->pairwise_key_type, SECR_value);
35093 + {
35094 + write_nic_byte(dev, SECR, SECR_value);//SECR_value | SCR_UseDK );
35095 + }
35096 +
35097 +}
35098 +#define TOTAL_CAM_ENTRY 32
35099 +//#define CAM_CONTENT_COUNT 8
35100 +void setKey( struct net_device *dev,
35101 + u8 EntryNo,
35102 + u8 KeyIndex,
35103 + u16 KeyType,
35104 + u8 *MacAddr,
35105 + u8 DefaultKey,
35106 + u32 *KeyContent )
35107 +{
35108 + u32 TargetCommand = 0;
35109 + u32 TargetContent = 0;
35110 + u16 usConfig = 0;
35111 + u8 i;
35112 +#ifdef ENABLE_IPS
35113 + struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
35114 + RT_RF_POWER_STATE rtState;
35115 + rtState = priv->ieee80211->eRFPowerState;
35116 + if(priv->ieee80211->PowerSaveControl.bInactivePs){
35117 + if(rtState == eRfOff){
35118 + if(priv->ieee80211->RfOffReason > RF_CHANGE_BY_IPS)
35119 + {
35120 + RT_TRACE(COMP_ERR, "%s(): RF is OFF.\n",__FUNCTION__);
35121 + up(&priv->wx_sem);
35122 + return ;
35123 + }
35124 + else{
35125 + IPSLeave(dev);
35126 + }
35127 + }
35128 + }
35129 + priv->ieee80211->is_set_key = true;
35130 +#endif
35131 + if (EntryNo >= TOTAL_CAM_ENTRY)
35132 + RT_TRACE(COMP_ERR, "cam entry exceeds in setKey()\n");
35133 +
35134 + RT_TRACE(COMP_SEC, "====>to setKey(), dev:%p, EntryNo:%d, KeyIndex:%d, KeyType:%d, MacAddr"MAC_FMT"\n", dev,EntryNo, KeyIndex, KeyType, MAC_ARG(MacAddr));
35135 +
35136 + if (DefaultKey)
35137 + usConfig |= BIT15 | (KeyType<<2);
35138 + else
35139 + usConfig |= BIT15 | (KeyType<<2) | KeyIndex;
35140 +// usConfig |= BIT15 | (KeyType<<2) | (DefaultKey<<5) | KeyIndex;
35141 +
35142 +
35143 + for(i=0 ; i<CAM_CONTENT_COUNT; i++){
35144 + TargetCommand = i+CAM_CONTENT_COUNT*EntryNo;
35145 + TargetCommand |= BIT31|BIT16;
35146 +
35147 + if(i==0){//MAC|Config
35148 + TargetContent = (u32)(*(MacAddr+0)) << 16|
35149 + (u32)(*(MacAddr+1)) << 24|
35150 + (u32)usConfig;
35151 +
35152 + write_nic_dword(dev, WCAMI, TargetContent);
35153 + write_nic_dword(dev, RWCAM, TargetCommand);
35154 + // printk("setkey cam =%8x\n", read_cam(dev, i+6*EntryNo));
35155 + }
35156 + else if(i==1){//MAC
35157 + TargetContent = (u32)(*(MacAddr+2)) |
35158 + (u32)(*(MacAddr+3)) << 8|
35159 + (u32)(*(MacAddr+4)) << 16|
35160 + (u32)(*(MacAddr+5)) << 24;
35161 + write_nic_dword(dev, WCAMI, TargetContent);
35162 + write_nic_dword(dev, RWCAM, TargetCommand);
35163 + }
35164 + else { //Key Material
35165 + if(KeyContent != NULL)
35166 + {
35167 + write_nic_dword(dev, WCAMI, (u32)(*(KeyContent+i-2)) );
35168 + write_nic_dword(dev, RWCAM, TargetCommand);
35169 + }
35170 + }
35171 + }
35172 + RT_TRACE(COMP_SEC,"=========>after set key, usconfig:%x\n", usConfig);
35173 +}
35174 +// This function seems not ready! WB
35175 +void CamPrintDbgReg(struct net_device* dev)
35176 +{
35177 + unsigned long rvalue;
35178 + unsigned char ucValue;
35179 + write_nic_dword(dev, DCAM, 0x80000000);
35180 + msleep(40);
35181 + rvalue = read_nic_dword(dev, DCAM); //delay_ms(40);
35182 + RT_TRACE(COMP_SEC, " TX CAM=%8lX ",rvalue);
35183 + if((rvalue & 0x40000000) != 0x4000000)
35184 + RT_TRACE(COMP_SEC, "-->TX Key Not Found ");
35185 + msleep(20);
35186 + write_nic_dword(dev, DCAM, 0x00000000); //delay_ms(40);
35187 + rvalue = read_nic_dword(dev, DCAM); //delay_ms(40);
35188 + RT_TRACE(COMP_SEC, "RX CAM=%8lX ",rvalue);
35189 + if((rvalue & 0x40000000) != 0x4000000)
35190 + RT_TRACE(COMP_SEC, "-->CAM Key Not Found ");
35191 + ucValue = read_nic_byte(dev, SECR);
35192 + RT_TRACE(COMP_SEC, "WPA_Config=%x \n",ucValue);
35193 +}
35194 +
35195 +
35196 +/***************************************************************************
35197 + ------------------- module init / exit stubs ----------------
35198 +****************************************************************************/
35199 +module_init(rtl8192_pci_module_init);
35200 +module_exit(rtl8192_pci_module_exit);
35201 --- /dev/null
35202 +++ b/drivers/staging/rtl8192e/r8192E_dm.c
35203 @@ -0,0 +1,4115 @@
35204 +/*++
35205 +Copyright-c Realtek Semiconductor Corp. All rights reserved.
35206 +
35207 +Module Name:
35208 + r8192U_dm.c
35209 +
35210 +Abstract:
35211 + HW dynamic mechanism.
35212 +
35213 +Major Change History:
35214 + When Who What
35215 + ---------- --------------- -------------------------------
35216 + 2008-05-14 amy create version 0 porting from windows code.
35217 +
35218 +--*/
35219 +#include "r8192E.h"
35220 +#include "r8192E_dm.h"
35221 +#include "r8192E_hw.h"
35222 +#include "r819xE_phy.h"
35223 +#include "r819xE_phyreg.h"
35224 +#include "r8190_rtl8256.h"
35225 +/*---------------------------Define Local Constant---------------------------*/
35226 +//
35227 +// Indicate different AP vendor for IOT issue.
35228 +//
35229 +#ifdef RTL8190P
35230 +static u32 edca_setting_DL[HT_IOT_PEER_MAX] =
35231 +{ 0x5e4322, 0x5e4322, 0x5e4322, 0x604322, 0xa44f, 0x5e4322};
35232 +static u32 edca_setting_UL[HT_IOT_PEER_MAX] =
35233 +{ 0x5e4322, 0xa44f, 0x5e4322, 0x604322, 0x5e4322, 0x5e4322};
35234 +#else
35235 +#ifdef RTL8192E
35236 +static u32 edca_setting_DL[HT_IOT_PEER_MAX] =
35237 +{ 0x5e4322, 0x5e4322, 0x5e4322, 0x604322, 0xa44f, 0x5e4322};
35238 +static u32 edca_setting_UL[HT_IOT_PEER_MAX] =
35239 +{ 0x5e4322, 0xa44f, 0x5e4322, 0x604322, 0x5e4322, 0x5e4322};
35240 +#else
35241 +static u32 edca_setting_DL[HT_IOT_PEER_MAX] =
35242 +{ 0x5e4322, 0x5e4322, 0x5e4322, 0x604322, 0xa44f, 0x5ea44f};
35243 +static u32 edca_setting_UL[HT_IOT_PEER_MAX] =
35244 +{ 0x5e4322, 0xa44f, 0x5e4322, 0x604322, 0x5ea44f, 0x5ea44f};
35245 +#endif
35246 +#endif
35247 +
35248 +#define RTK_UL_EDCA 0xa44f
35249 +#define RTK_DL_EDCA 0x5e4322
35250 +/*---------------------------Define Local Constant---------------------------*/
35251 +
35252 +
35253 +/*------------------------Define global variable-----------------------------*/
35254 +// Debug variable ?
35255 +dig_t dm_digtable;
35256 +// Store current shoftware write register content for MAC PHY.
35257 +u8 dm_shadow[16][256] = {{0}};
35258 +// For Dynamic Rx Path Selection by Signal Strength
35259 +DRxPathSel DM_RxPathSelTable;
35260 +/*------------------------Define global variable-----------------------------*/
35261 +
35262 +
35263 +/*------------------------Define local variable------------------------------*/
35264 +/*------------------------Define local variable------------------------------*/
35265 +
35266 +
35267 +/*--------------------Define export function prototype-----------------------*/
35268 +extern void init_hal_dm(struct net_device *dev);
35269 +extern void deinit_hal_dm(struct net_device *dev);
35270 +
35271 +extern void hal_dm_watchdog(struct net_device *dev);
35272 +
35273 +
35274 +extern void init_rate_adaptive(struct net_device *dev);
35275 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
35276 +extern void dm_txpower_trackingcallback(struct work_struct *work);
35277 +#else
35278 +extern void dm_txpower_trackingcallback(struct net_device *dev);
35279 +#endif
35280 +
35281 +extern void dm_cck_txpower_adjust(struct net_device *dev,bool binch14);
35282 +extern void dm_restore_dynamic_mechanism_state(struct net_device *dev);
35283 +extern void dm_backup_dynamic_mechanism_state(struct net_device *dev);
35284 +extern void dm_change_dynamic_initgain_thresh(struct net_device *dev,
35285 + u32 dm_type,
35286 + u32 dm_value);
35287 +extern void DM_ChangeFsyncSetting(struct net_device *dev,
35288 + s32 DM_Type,
35289 + s32 DM_Value);
35290 +extern void dm_force_tx_fw_info(struct net_device *dev,
35291 + u32 force_type,
35292 + u32 force_value);
35293 +extern void dm_init_edca_turbo(struct net_device *dev);
35294 +extern void dm_rf_operation_test_callback(unsigned long data);
35295 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
35296 +extern void dm_rf_pathcheck_workitemcallback(struct work_struct *work);
35297 +#else
35298 +extern void dm_rf_pathcheck_workitemcallback(struct net_device *dev);
35299 +#endif
35300 +extern void dm_fsync_timer_callback(unsigned long data);
35301 +#if 0
35302 +extern bool dm_check_lbus_status(struct net_device *dev);
35303 +#endif
35304 +extern void dm_check_fsync(struct net_device *dev);
35305 +extern void dm_shadow_init(struct net_device *dev);
35306 +extern void dm_initialize_txpower_tracking(struct net_device *dev);
35307 +
35308 +#ifdef RTL8192E
35309 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
35310 +extern void dm_gpio_change_rf_callback(struct work_struct *work);
35311 +#else
35312 +extern void dm_gpio_change_rf_callback(struct net_device *dev);
35313 +#endif
35314 +#endif
35315 +
35316 +
35317 +
35318 +/*--------------------Define export function prototype-----------------------*/
35319 +
35320 +
35321 +/*---------------------Define local function prototype-----------------------*/
35322 +// DM --> Rate Adaptive
35323 +static void dm_check_rate_adaptive(struct net_device *dev);
35324 +
35325 +// DM --> Bandwidth switch
35326 +static void dm_init_bandwidth_autoswitch(struct net_device *dev);
35327 +static void dm_bandwidth_autoswitch( struct net_device *dev);
35328 +
35329 +// DM --> TX power control
35330 +//static void dm_initialize_txpower_tracking(struct net_device *dev);
35331 +
35332 +static void dm_check_txpower_tracking(struct net_device *dev);
35333 +
35334 +
35335 +
35336 +//static void dm_txpower_reset_recovery(struct net_device *dev);
35337 +
35338 +
35339 +// DM --> BB init gain restore
35340 +#ifndef RTL8192U
35341 +static void dm_bb_initialgain_restore(struct net_device *dev);
35342 +
35343 +
35344 +// DM --> BB init gain backup
35345 +static void dm_bb_initialgain_backup(struct net_device *dev);
35346 +#endif
35347 +
35348 +// DM --> Dynamic Init Gain by RSSI
35349 +static void dm_dig_init(struct net_device *dev);
35350 +static void dm_ctrl_initgain_byrssi(struct net_device *dev);
35351 +static void dm_ctrl_initgain_byrssi_highpwr(struct net_device *dev);
35352 +static void dm_ctrl_initgain_byrssi_by_driverrssi( struct net_device *dev);
35353 +static void dm_ctrl_initgain_byrssi_by_fwfalse_alarm(struct net_device *dev);
35354 +static void dm_initial_gain(struct net_device *dev);
35355 +static void dm_pd_th(struct net_device *dev);
35356 +static void dm_cs_ratio(struct net_device *dev);
35357 +
35358 +static void dm_init_ctstoself(struct net_device *dev);
35359 +// DM --> EDCA turboe mode control
35360 +static void dm_check_edca_turbo(struct net_device *dev);
35361 +
35362 +// DM --> HW RF control
35363 +static void dm_check_rfctrl_gpio(struct net_device *dev);
35364 +
35365 +#ifndef RTL8190P
35366 +//static void dm_gpio_change_rf(struct net_device *dev);
35367 +#endif
35368 +// DM --> Check PBC
35369 +static void dm_check_pbc_gpio(struct net_device *dev);
35370 +
35371 +
35372 +// DM --> Check current RX RF path state
35373 +static void dm_check_rx_path_selection(struct net_device *dev);
35374 +static void dm_init_rxpath_selection(struct net_device *dev);
35375 +static void dm_rxpath_sel_byrssi(struct net_device *dev);
35376 +
35377 +
35378 +// DM --> Fsync for broadcom ap
35379 +static void dm_init_fsync(struct net_device *dev);
35380 +static void dm_deInit_fsync(struct net_device *dev);
35381 +
35382 +//Added by vivi, 20080522
35383 +static void dm_check_txrateandretrycount(struct net_device *dev);
35384 +
35385 +/*---------------------Define local function prototype-----------------------*/
35386 +
35387 +/*---------------------Define of Tx Power Control For Near/Far Range --------*/ //Add by Jacken 2008/02/18
35388 +static void dm_init_dynamic_txpower(struct net_device *dev);
35389 +static void dm_dynamic_txpower(struct net_device *dev);
35390 +
35391 +
35392 +// DM --> For rate adaptive and DIG, we must send RSSI to firmware
35393 +static void dm_send_rssi_tofw(struct net_device *dev);
35394 +static void dm_ctstoself(struct net_device *dev);
35395 +/*---------------------------Define function prototype------------------------*/
35396 +//================================================================================
35397 +// HW Dynamic mechanism interface.
35398 +//================================================================================
35399 +
35400 +//
35401 +// Description:
35402 +// Prepare SW resource for HW dynamic mechanism.
35403 +//
35404 +// Assumption:
35405 +// This function is only invoked at driver intialization once.
35406 +//
35407 +//
35408 +void init_hal_dm(struct net_device *dev)
35409 +{
35410 + struct r8192_priv *priv = ieee80211_priv(dev);
35411 +
35412 + // Undecorated Smoothed Signal Strength, it can utilized to dynamic mechanism.
35413 + priv->undecorated_smoothed_pwdb = -1;
35414 +
35415 + //Initial TX Power Control for near/far range , add by amy 2008/05/15, porting from windows code.
35416 + dm_init_dynamic_txpower(dev);
35417 + init_rate_adaptive(dev);
35418 + //dm_initialize_txpower_tracking(dev);
35419 + dm_dig_init(dev);
35420 + dm_init_edca_turbo(dev);
35421 + dm_init_bandwidth_autoswitch(dev);
35422 + dm_init_fsync(dev);
35423 + dm_init_rxpath_selection(dev);
35424 + dm_init_ctstoself(dev);
35425 +#ifdef RTL8192E
35426 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
35427 + INIT_DELAYED_WORK(&priv->gpio_change_rf_wq, dm_gpio_change_rf_callback);
35428 +#else
35429 + INIT_WORK(&priv->gpio_change_rf_wq, (void(*)(void*)) dm_gpio_change_rf_callback,dev);
35430 +#endif
35431 +#endif
35432 +
35433 +} // InitHalDm
35434 +
35435 +void deinit_hal_dm(struct net_device *dev)
35436 +{
35437 +
35438 + dm_deInit_fsync(dev);
35439 +
35440 +}
35441 +
35442 +
35443 +#ifdef USB_RX_AGGREGATION_SUPPORT
35444 +void dm_CheckRxAggregation(struct net_device *dev) {
35445 + struct r8192_priv *priv = ieee80211_priv((struct net_device *)dev);
35446 + PRT_HIGH_THROUGHPUT pHTInfo = priv->ieee80211->pHTInfo;
35447 + static unsigned long lastTxOkCnt = 0;
35448 + static unsigned long lastRxOkCnt = 0;
35449 + unsigned long curTxOkCnt = 0;
35450 + unsigned long curRxOkCnt = 0;
35451 +
35452 +/*
35453 + if (pHalData->bForcedUsbRxAggr) {
35454 + if (pHalData->ForcedUsbRxAggrInfo == 0) {
35455 + if (pHalData->bCurrentRxAggrEnable) {
35456 + Adapter->HalFunc.HalUsbRxAggrHandler(Adapter, FALSE);
35457 + }
35458 + } else {
35459 + if (!pHalData->bCurrentRxAggrEnable || (pHalData->ForcedUsbRxAggrInfo != pHalData->LastUsbRxAggrInfoSetting)) {
35460 + Adapter->HalFunc.HalUsbRxAggrHandler(Adapter, TRUE);
35461 + }
35462 + }
35463 + return;
35464 + }
35465 +
35466 +*/
35467 + curTxOkCnt = priv->stats.txbytesunicast - lastTxOkCnt;
35468 + curRxOkCnt = priv->stats.rxbytesunicast - lastRxOkCnt;
35469 +
35470 + if((curTxOkCnt + curRxOkCnt) < 15000000) {
35471 + return;
35472 + }
35473 +
35474 + if(curTxOkCnt > 4*curRxOkCnt) {
35475 + if (priv->bCurrentRxAggrEnable) {
35476 + write_nic_dword(dev, 0x1a8, 0);
35477 + priv->bCurrentRxAggrEnable = false;
35478 + }
35479 + }else{
35480 + if (!priv->bCurrentRxAggrEnable && !pHTInfo->bCurrentRT2RTAggregation) {
35481 + u32 ulValue;
35482 + ulValue = (pHTInfo->UsbRxFwAggrEn<<24) | (pHTInfo->UsbRxFwAggrPageNum<<16) |
35483 + (pHTInfo->UsbRxFwAggrPacketNum<<8) | (pHTInfo->UsbRxFwAggrTimeout);
35484 + /*
35485 + * If usb rx firmware aggregation is enabled,
35486 + * when anyone of three threshold conditions above is reached,
35487 + * firmware will send aggregated packet to driver.
35488 + */
35489 + write_nic_dword(dev, 0x1a8, ulValue);
35490 + priv->bCurrentRxAggrEnable = true;
35491 + }
35492 + }
35493 +
35494 + lastTxOkCnt = priv->stats.txbytesunicast;
35495 + lastRxOkCnt = priv->stats.rxbytesunicast;
35496 +} // dm_CheckEdcaTurbo
35497 +#endif
35498 +
35499 +
35500 +
35501 +void hal_dm_watchdog(struct net_device *dev)
35502 +{
35503 + //struct r8192_priv *priv = ieee80211_priv(dev);
35504 +
35505 + //static u8 previous_bssid[6] ={0};
35506 +
35507 + /*Add by amy 2008/05/15 ,porting from windows code.*/
35508 + dm_check_rate_adaptive(dev);
35509 + dm_dynamic_txpower(dev);
35510 + dm_check_txrateandretrycount(dev);
35511 +
35512 + dm_check_txpower_tracking(dev);
35513 +
35514 + dm_ctrl_initgain_byrssi(dev);
35515 + dm_check_edca_turbo(dev);
35516 + dm_bandwidth_autoswitch(dev);
35517 +
35518 + dm_check_rfctrl_gpio(dev);
35519 + dm_check_rx_path_selection(dev);
35520 + dm_check_fsync(dev);
35521 +
35522 + // Add by amy 2008-05-15 porting from windows code.
35523 + dm_check_pbc_gpio(dev);
35524 + dm_send_rssi_tofw(dev);
35525 + dm_ctstoself(dev);
35526 +
35527 +#ifdef USB_RX_AGGREGATION_SUPPORT
35528 + dm_CheckRxAggregation(dev);
35529 +#endif
35530 +} //HalDmWatchDog
35531 +
35532 +
35533 +/*
35534 + * Decide Rate Adaptive Set according to distance (signal strength)
35535 + * 01/11/2008 MHC Modify input arguments and RATR table level.
35536 + * 01/16/2008 MHC RF_Type is assigned in ReadAdapterInfo(). We must call
35537 + * the function after making sure RF_Type.
35538 + */
35539 +void init_rate_adaptive(struct net_device * dev)
35540 +{
35541 +
35542 + struct r8192_priv *priv = ieee80211_priv(dev);
35543 + prate_adaptive pra = (prate_adaptive)&priv->rate_adaptive;
35544 +
35545 + pra->ratr_state = DM_RATR_STA_MAX;
35546 + pra->high2low_rssi_thresh_for_ra = RateAdaptiveTH_High;
35547 + pra->low2high_rssi_thresh_for_ra20M = RateAdaptiveTH_Low_20M+5;
35548 + pra->low2high_rssi_thresh_for_ra40M = RateAdaptiveTH_Low_40M+5;
35549 +
35550 + pra->high_rssi_thresh_for_ra = RateAdaptiveTH_High+5;
35551 + pra->low_rssi_thresh_for_ra20M = RateAdaptiveTH_Low_20M;
35552 + pra->low_rssi_thresh_for_ra40M = RateAdaptiveTH_Low_40M;
35553 +
35554 + if(priv->CustomerID == RT_CID_819x_Netcore)
35555 + pra->ping_rssi_enable = 1;
35556 + else
35557 + pra->ping_rssi_enable = 0;
35558 + pra->ping_rssi_thresh_for_ra = 15;
35559 +
35560 +
35561 + if (priv->rf_type == RF_2T4R)
35562 + {
35563 + // 07/10/08 MH Modify for RA smooth scheme.
35564 + /* 2008/01/11 MH Modify 2T RATR table for different RSSI. 080515 porting by amy from windows code.*/
35565 + pra->upper_rssi_threshold_ratr = 0x8f0f0000;
35566 + pra->middle_rssi_threshold_ratr = 0x8f0ff000;
35567 + pra->low_rssi_threshold_ratr = 0x8f0ff001;
35568 + pra->low_rssi_threshold_ratr_40M = 0x8f0ff005;
35569 + pra->low_rssi_threshold_ratr_20M = 0x8f0ff001;
35570 + pra->ping_rssi_ratr = 0x0000000d;//cosa add for test
35571 + }
35572 + else if (priv->rf_type == RF_1T2R)
35573 + {
35574 + pra->upper_rssi_threshold_ratr = 0x000f0000;
35575 + pra->middle_rssi_threshold_ratr = 0x000ff000;
35576 + pra->low_rssi_threshold_ratr = 0x000ff001;
35577 + pra->low_rssi_threshold_ratr_40M = 0x000ff005;
35578 + pra->low_rssi_threshold_ratr_20M = 0x000ff001;
35579 + pra->ping_rssi_ratr = 0x0000000d;//cosa add for test
35580 + }
35581 +
35582 +} // InitRateAdaptive
35583 +
35584 +
35585 +/*-----------------------------------------------------------------------------
35586 + * Function: dm_check_rate_adaptive()
35587 + *
35588 + * Overview:
35589 + *
35590 + * Input: NONE
35591 + *
35592 + * Output: NONE
35593 + *
35594 + * Return: NONE
35595 + *
35596 + * Revised History:
35597 + * When Who Remark
35598 + * 05/26/08 amy Create version 0 proting from windows code.
35599 + *
35600 + *---------------------------------------------------------------------------*/
35601 +static void dm_check_rate_adaptive(struct net_device * dev)
35602 +{
35603 + struct r8192_priv *priv = ieee80211_priv(dev);
35604 + PRT_HIGH_THROUGHPUT pHTInfo = priv->ieee80211->pHTInfo;
35605 + prate_adaptive pra = (prate_adaptive)&priv->rate_adaptive;
35606 + u32 currentRATR, targetRATR = 0;
35607 + u32 LowRSSIThreshForRA = 0, HighRSSIThreshForRA = 0;
35608 + bool bshort_gi_enabled = false;
35609 + static u8 ping_rssi_state=0;
35610 +
35611 +
35612 + if(!priv->up)
35613 + {
35614 + RT_TRACE(COMP_RATE, "<---- dm_check_rate_adaptive(): driver is going to unload\n");
35615 + return;
35616 + }
35617 +
35618 + if(pra->rate_adaptive_disabled)//this variable is set by ioctl.
35619 + return;
35620 +
35621 + // TODO: Only 11n mode is implemented currently,
35622 + if( !(priv->ieee80211->mode == WIRELESS_MODE_N_24G ||
35623 + priv->ieee80211->mode == WIRELESS_MODE_N_5G))
35624 + return;
35625 +
35626 + if( priv->ieee80211->state == IEEE80211_LINKED )
35627 + {
35628 + // RT_TRACE(COMP_RATE, "dm_CheckRateAdaptive(): \t");
35629 +
35630 + //
35631 + // Check whether Short GI is enabled
35632 + //
35633 + bshort_gi_enabled = (pHTInfo->bCurTxBW40MHz && pHTInfo->bCurShortGI40MHz) ||
35634 + (!pHTInfo->bCurTxBW40MHz && pHTInfo->bCurShortGI20MHz);
35635 +
35636 +
35637 + pra->upper_rssi_threshold_ratr =
35638 + (pra->upper_rssi_threshold_ratr & (~BIT31)) | ((bshort_gi_enabled)? BIT31:0) ;
35639 +
35640 + pra->middle_rssi_threshold_ratr =
35641 + (pra->middle_rssi_threshold_ratr & (~BIT31)) | ((bshort_gi_enabled)? BIT31:0) ;
35642 +
35643 + if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
35644 + {
35645 + pra->low_rssi_threshold_ratr =
35646 + (pra->low_rssi_threshold_ratr_40M & (~BIT31)) | ((bshort_gi_enabled)? BIT31:0) ;
35647 + }
35648 + else
35649 + {
35650 + pra->low_rssi_threshold_ratr =
35651 + (pra->low_rssi_threshold_ratr_20M & (~BIT31)) | ((bshort_gi_enabled)? BIT31:0) ;
35652 + }
35653 + //cosa add for test
35654 + pra->ping_rssi_ratr =
35655 + (pra->ping_rssi_ratr & (~BIT31)) | ((bshort_gi_enabled)? BIT31:0) ;
35656 +
35657 + /* 2007/10/08 MH We support RA smooth scheme now. When it is the first
35658 + time to link with AP. We will not change upper/lower threshold. If
35659 + STA stay in high or low level, we must change two different threshold
35660 + to prevent jumping frequently. */
35661 + if (pra->ratr_state == DM_RATR_STA_HIGH)
35662 + {
35663 + HighRSSIThreshForRA = pra->high2low_rssi_thresh_for_ra;
35664 + LowRSSIThreshForRA = (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)?
35665 + (pra->low_rssi_thresh_for_ra40M):(pra->low_rssi_thresh_for_ra20M);
35666 + }
35667 + else if (pra->ratr_state == DM_RATR_STA_LOW)
35668 + {
35669 + HighRSSIThreshForRA = pra->high_rssi_thresh_for_ra;
35670 + LowRSSIThreshForRA = (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)?
35671 + (pra->low2high_rssi_thresh_for_ra40M):(pra->low2high_rssi_thresh_for_ra20M);
35672 + }
35673 + else
35674 + {
35675 + HighRSSIThreshForRA = pra->high_rssi_thresh_for_ra;
35676 + LowRSSIThreshForRA = (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)?
35677 + (pra->low_rssi_thresh_for_ra40M):(pra->low_rssi_thresh_for_ra20M);
35678 + }
35679 +
35680 + //DbgPrint("[DM] THresh H/L=%d/%d\n\r", RATR.HighRSSIThreshForRA, RATR.LowRSSIThreshForRA);
35681 + if(priv->undecorated_smoothed_pwdb >= (long)HighRSSIThreshForRA)
35682 + {
35683 + //DbgPrint("[DM] RSSI=%d STA=HIGH\n\r", pHalData->UndecoratedSmoothedPWDB);
35684 + pra->ratr_state = DM_RATR_STA_HIGH;
35685 + targetRATR = pra->upper_rssi_threshold_ratr;
35686 + }else if(priv->undecorated_smoothed_pwdb >= (long)LowRSSIThreshForRA)
35687 + {
35688 + //DbgPrint("[DM] RSSI=%d STA=Middle\n\r", pHalData->UndecoratedSmoothedPWDB);
35689 + pra->ratr_state = DM_RATR_STA_MIDDLE;
35690 + targetRATR = pra->middle_rssi_threshold_ratr;
35691 + }else
35692 + {
35693 + //DbgPrint("[DM] RSSI=%d STA=LOW\n\r", pHalData->UndecoratedSmoothedPWDB);
35694 + pra->ratr_state = DM_RATR_STA_LOW;
35695 + targetRATR = pra->low_rssi_threshold_ratr;
35696 + }
35697 +
35698 + //cosa add for test
35699 + if(pra->ping_rssi_enable)
35700 + {
35701 + //pHalData->UndecoratedSmoothedPWDB = 19;
35702 + if(priv->undecorated_smoothed_pwdb < (long)(pra->ping_rssi_thresh_for_ra+5))
35703 + {
35704 + if( (priv->undecorated_smoothed_pwdb < (long)pra->ping_rssi_thresh_for_ra) ||
35705 + ping_rssi_state )
35706 + {
35707 + //DbgPrint("TestRSSI = %d, set RATR to 0x%x \n", pHalData->UndecoratedSmoothedPWDB, pRA->TestRSSIRATR);
35708 + pra->ratr_state = DM_RATR_STA_LOW;
35709 + targetRATR = pra->ping_rssi_ratr;
35710 + ping_rssi_state = 1;
35711 + }
35712 + //else
35713 + // DbgPrint("TestRSSI is between the range. \n");
35714 + }
35715 + else
35716 + {
35717 + //DbgPrint("TestRSSI Recover to 0x%x \n", targetRATR);
35718 + ping_rssi_state = 0;
35719 + }
35720 + }
35721 +
35722 + // 2008.04.01
35723 +#if 1
35724 + // For RTL819X, if pairwisekey = wep/tkip, we support only MCS0~7.
35725 + if(priv->ieee80211->GetHalfNmodeSupportByAPsHandler(dev))
35726 + targetRATR &= 0xf00fffff;
35727 +#endif
35728 +
35729 + //
35730 + // Check whether updating of RATR0 is required
35731 + //
35732 + currentRATR = read_nic_dword(dev, RATR0);
35733 + if( targetRATR != currentRATR )
35734 + {
35735 + u32 ratr_value;
35736 + ratr_value = targetRATR;
35737 + RT_TRACE(COMP_RATE,"currentRATR = %x, targetRATR = %x\n", currentRATR, targetRATR);
35738 + if(priv->rf_type == RF_1T2R)
35739 + {
35740 + ratr_value &= ~(RATE_ALL_OFDM_2SS);
35741 + }
35742 + write_nic_dword(dev, RATR0, ratr_value);
35743 + write_nic_byte(dev, UFWP, 1);
35744 +
35745 + pra->last_ratr = targetRATR;
35746 + }
35747 +
35748 + }
35749 + else
35750 + {
35751 + pra->ratr_state = DM_RATR_STA_MAX;
35752 + }
35753 +
35754 +} // dm_CheckRateAdaptive
35755 +
35756 +
35757 +static void dm_init_bandwidth_autoswitch(struct net_device * dev)
35758 +{
35759 + struct r8192_priv *priv = ieee80211_priv(dev);
35760 +
35761 + priv->ieee80211->bandwidth_auto_switch.threshold_20Mhzto40Mhz = BW_AUTO_SWITCH_LOW_HIGH;
35762 + priv->ieee80211->bandwidth_auto_switch.threshold_40Mhzto20Mhz = BW_AUTO_SWITCH_HIGH_LOW;
35763 + priv->ieee80211->bandwidth_auto_switch.bforced_tx20Mhz = false;
35764 + priv->ieee80211->bandwidth_auto_switch.bautoswitch_enable = false;
35765 +
35766 +} // dm_init_bandwidth_autoswitch
35767 +
35768 +
35769 +static void dm_bandwidth_autoswitch(struct net_device * dev)
35770 +{
35771 + struct r8192_priv *priv = ieee80211_priv(dev);
35772 +
35773 + if(priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20 ||!priv->ieee80211->bandwidth_auto_switch.bautoswitch_enable){
35774 + return;
35775 + }else{
35776 + if(priv->ieee80211->bandwidth_auto_switch.bforced_tx20Mhz == false){//If send packets in 40 Mhz in 20/40
35777 + if(priv->undecorated_smoothed_pwdb <= priv->ieee80211->bandwidth_auto_switch.threshold_40Mhzto20Mhz)
35778 + priv->ieee80211->bandwidth_auto_switch.bforced_tx20Mhz = true;
35779 + }else{//in force send packets in 20 Mhz in 20/40
35780 + if(priv->undecorated_smoothed_pwdb >= priv->ieee80211->bandwidth_auto_switch.threshold_20Mhzto40Mhz)
35781 + priv->ieee80211->bandwidth_auto_switch.bforced_tx20Mhz = false;
35782 +
35783 + }
35784 + }
35785 +} // dm_BandwidthAutoSwitch
35786 +
35787 +//OFDM default at 0db, index=6.
35788 +#ifndef RTL8190P
35789 +static u32 OFDMSwingTable[OFDM_Table_Length] = {
35790 + 0x7f8001fe, // 0, +6db
35791 + 0x71c001c7, // 1, +5db
35792 + 0x65400195, // 2, +4db
35793 + 0x5a400169, // 3, +3db
35794 + 0x50800142, // 4, +2db
35795 + 0x47c0011f, // 5, +1db
35796 + 0x40000100, // 6, +0db ===> default, upper for higher temprature, lower for low temprature
35797 + 0x390000e4, // 7, -1db
35798 + 0x32c000cb, // 8, -2db
35799 + 0x2d4000b5, // 9, -3db
35800 + 0x288000a2, // 10, -4db
35801 + 0x24000090, // 11, -5db
35802 + 0x20000080, // 12, -6db
35803 + 0x1c800072, // 13, -7db
35804 + 0x19800066, // 14, -8db
35805 + 0x26c0005b, // 15, -9db
35806 + 0x24400051, // 16, -10db
35807 + 0x12000048, // 17, -11db
35808 + 0x10000040 // 18, -12db
35809 +};
35810 +static u8 CCKSwingTable_Ch1_Ch13[CCK_Table_length][8] = {
35811 + {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, // 0, +0db ===> CCK40M default
35812 + {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, // 1, -1db
35813 + {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, // 2, -2db
35814 + {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, // 3, -3db
35815 + {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, // 4, -4db
35816 + {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, // 5, -5db
35817 + {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, // 6, -6db ===> CCK20M default
35818 + {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, // 7, -7db
35819 + {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, // 8, -8db
35820 + {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, // 9, -9db
35821 + {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 10, -10db
35822 + {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01} // 11, -11db
35823 +};
35824 +
35825 +static u8 CCKSwingTable_Ch14[CCK_Table_length][8] = {
35826 + {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, // 0, +0db ===> CCK40M default
35827 + {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, // 1, -1db
35828 + {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, // 2, -2db
35829 + {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, // 3, -3db
35830 + {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, // 4, -4db
35831 + {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, // 5, -5db
35832 + {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 6, -6db ===> CCK20M default
35833 + {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, // 7, -7db
35834 + {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 8, -8db
35835 + {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 9, -9db
35836 + {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 10, -10db
35837 + {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00} // 11, -11db
35838 +};
35839 +#endif
35840 +#define Pw_Track_Flag 0x11d
35841 +#define Tssi_Mea_Value 0x13c
35842 +#define Tssi_Report_Value1 0x134
35843 +#define Tssi_Report_Value2 0x13e
35844 +#define FW_Busy_Flag 0x13f
35845 +static void dm_TXPowerTrackingCallback_TSSI(struct net_device * dev)
35846 + {
35847 + struct r8192_priv *priv = ieee80211_priv(dev);
35848 + bool bHighpowerstate, viviflag = FALSE;
35849 + DCMD_TXCMD_T tx_cmd;
35850 + u8 powerlevelOFDM24G;
35851 + int i =0, j = 0, k = 0;
35852 + u8 RF_Type, tmp_report[5]={0, 0, 0, 0, 0};
35853 + u32 Value;
35854 + u8 Pwr_Flag;
35855 + u16 Avg_TSSI_Meas, TSSI_13dBm, Avg_TSSI_Meas_from_driver=0;
35856 +#ifdef RTL8192U
35857 + RT_STATUS rtStatus = RT_STATUS_SUCCESS;
35858 +#endif
35859 +// bool rtStatus = true;
35860 + u32 delta=0;
35861 + RT_TRACE(COMP_POWER_TRACKING,"%s()\n",__FUNCTION__);
35862 +// write_nic_byte(dev, 0x1ba, 0);
35863 + write_nic_byte(dev, Pw_Track_Flag, 0);
35864 + write_nic_byte(dev, FW_Busy_Flag, 0);
35865 + priv->ieee80211->bdynamic_txpower_enable = false;
35866 + bHighpowerstate = priv->bDynamicTxHighPower;
35867 +
35868 + powerlevelOFDM24G = (u8)(priv->Pwr_Track>>24);
35869 + RF_Type = priv->rf_type;
35870 + Value = (RF_Type<<8) | powerlevelOFDM24G;
35871 +
35872 + RT_TRACE(COMP_POWER_TRACKING, "powerlevelOFDM24G = %x\n", powerlevelOFDM24G);
35873 +
35874 + for(j = 0; j<=30; j++)
35875 +{ //fill tx_cmd
35876 +
35877 + tx_cmd.Op = TXCMD_SET_TX_PWR_TRACKING;
35878 + tx_cmd.Length = 4;
35879 + tx_cmd.Value = Value;
35880 +#ifdef RTL8192U
35881 + rtStatus = SendTxCommandPacket(dev, &tx_cmd, 12);
35882 + if (rtStatus == RT_STATUS_FAILURE)
35883 + {
35884 + RT_TRACE(COMP_POWER_TRACKING, "Set configuration with tx cmd queue fail!\n");
35885 + }
35886 +#else
35887 + cmpk_message_handle_tx(dev, (u8*)&tx_cmd, DESC_PACKET_TYPE_INIT, sizeof(DCMD_TXCMD_T));
35888 +#endif
35889 + mdelay(1);
35890 + //DbgPrint("hi, vivi, strange\n");
35891 + for(i = 0;i <= 30; i++)
35892 + {
35893 + Pwr_Flag = read_nic_byte(dev, Pw_Track_Flag);
35894 +
35895 + if (Pwr_Flag == 0)
35896 + {
35897 + mdelay(1);
35898 + continue;
35899 + }
35900 +
35901 + Avg_TSSI_Meas = read_nic_word(dev, Tssi_Mea_Value);
35902 +
35903 + if(Avg_TSSI_Meas == 0)
35904 + {
35905 + write_nic_byte(dev, Pw_Track_Flag, 0);
35906 + write_nic_byte(dev, FW_Busy_Flag, 0);
35907 + return;
35908 + }
35909 +
35910 + for(k = 0;k < 5; k++)
35911 + {
35912 + if(k !=4)
35913 + tmp_report[k] = read_nic_byte(dev, Tssi_Report_Value1+k);
35914 + else
35915 + tmp_report[k] = read_nic_byte(dev, Tssi_Report_Value2);
35916 +
35917 + RT_TRACE(COMP_POWER_TRACKING, "TSSI_report_value = %d\n", tmp_report[k]);
35918 + }
35919 +
35920 + //check if the report value is right
35921 + for(k = 0;k < 5; k++)
35922 + {
35923 + if(tmp_report[k] <= 20)
35924 + {
35925 + viviflag =TRUE;
35926 + break;
35927 + }
35928 + }
35929 + if(viviflag ==TRUE)
35930 + {
35931 + write_nic_byte(dev, Pw_Track_Flag, 0);
35932 + viviflag = FALSE;
35933 + RT_TRACE(COMP_POWER_TRACKING, "we filted this data\n");
35934 + for(k = 0;k < 5; k++)
35935 + tmp_report[k] = 0;
35936 + break;
35937 + }
35938 +
35939 + for(k = 0;k < 5; k++)
35940 + {
35941 + Avg_TSSI_Meas_from_driver += tmp_report[k];
35942 + }
35943 +
35944 + Avg_TSSI_Meas_from_driver = Avg_TSSI_Meas_from_driver*100/5;
35945 + RT_TRACE(COMP_POWER_TRACKING, "Avg_TSSI_Meas_from_driver = %d\n", Avg_TSSI_Meas_from_driver);
35946 + TSSI_13dBm = priv->TSSI_13dBm;
35947 + RT_TRACE(COMP_POWER_TRACKING, "TSSI_13dBm = %d\n", TSSI_13dBm);
35948 +
35949 + //if(abs(Avg_TSSI_Meas_from_driver - TSSI_13dBm) <= E_FOR_TX_POWER_TRACK)
35950 + // For MacOS-compatible
35951 + if(Avg_TSSI_Meas_from_driver > TSSI_13dBm)
35952 + delta = Avg_TSSI_Meas_from_driver - TSSI_13dBm;
35953 + else
35954 + delta = TSSI_13dBm - Avg_TSSI_Meas_from_driver;
35955 +
35956 + if(delta <= E_FOR_TX_POWER_TRACK)
35957 + {
35958 + priv->ieee80211->bdynamic_txpower_enable = TRUE;
35959 + write_nic_byte(dev, Pw_Track_Flag, 0);
35960 + write_nic_byte(dev, FW_Busy_Flag, 0);
35961 + RT_TRACE(COMP_POWER_TRACKING, "tx power track is done\n");
35962 + RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex = %d\n", priv->rfa_txpowertrackingindex);
35963 + RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_real = %d\n", priv->rfa_txpowertrackingindex_real);
35964 +#ifdef RTL8190P
35965 + RT_TRACE(COMP_POWER_TRACKING, "priv->rfc_txpowertrackingindex = %d\n", priv->rfc_txpowertrackingindex);
35966 + RT_TRACE(COMP_POWER_TRACKING, "priv->rfc_txpowertrackingindex_real = %d\n", priv->rfc_txpowertrackingindex_real);
35967 +#endif
35968 + RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_difference = %d\n", priv->CCKPresentAttentuation_difference);
35969 + RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation = %d\n", priv->CCKPresentAttentuation);
35970 + return;
35971 + }
35972 + else
35973 + {
35974 + if(Avg_TSSI_Meas_from_driver < TSSI_13dBm - E_FOR_TX_POWER_TRACK)
35975 + {
35976 + if (RF_Type == RF_2T4R)
35977 + {
35978 +
35979 + if((priv->rfa_txpowertrackingindex > 0) &&(priv->rfc_txpowertrackingindex > 0))
35980 + {
35981 + priv->rfa_txpowertrackingindex--;
35982 + if(priv->rfa_txpowertrackingindex_real > 4)
35983 + {
35984 + priv->rfa_txpowertrackingindex_real--;
35985 + rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfa_txpowertrackingindex_real].txbbgain_value);
35986 + }
35987 +
35988 + priv->rfc_txpowertrackingindex--;
35989 + if(priv->rfc_txpowertrackingindex_real > 4)
35990 + {
35991 + priv->rfc_txpowertrackingindex_real--;
35992 + rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfc_txpowertrackingindex_real].txbbgain_value);
35993 + }
35994 + }
35995 + else
35996 + {
35997 + rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[4].txbbgain_value);
35998 + rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[4].txbbgain_value);
35999 + }
36000 + }
36001 + else
36002 + {
36003 + if(priv->rfc_txpowertrackingindex > 0)
36004 + {
36005 + priv->rfc_txpowertrackingindex--;
36006 + if(priv->rfc_txpowertrackingindex_real > 4)
36007 + {
36008 + priv->rfc_txpowertrackingindex_real--;
36009 + rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfc_txpowertrackingindex_real].txbbgain_value);
36010 + }
36011 + }
36012 + else
36013 + rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[4].txbbgain_value);
36014 + }
36015 + }
36016 + else
36017 + {
36018 + if (RF_Type == RF_2T4R)
36019 + {
36020 + if((priv->rfa_txpowertrackingindex < TxBBGainTableLength - 1) &&(priv->rfc_txpowertrackingindex < TxBBGainTableLength - 1))
36021 + {
36022 + priv->rfa_txpowertrackingindex++;
36023 + priv->rfa_txpowertrackingindex_real++;
36024 + rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfa_txpowertrackingindex_real].txbbgain_value);
36025 + priv->rfc_txpowertrackingindex++;
36026 + priv->rfc_txpowertrackingindex_real++;
36027 + rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfc_txpowertrackingindex_real].txbbgain_value);
36028 + }
36029 + else
36030 + {
36031 + rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[TxBBGainTableLength - 1].txbbgain_value);
36032 + rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[TxBBGainTableLength - 1].txbbgain_value);
36033 + }
36034 + }
36035 + else
36036 + {
36037 + if(priv->rfc_txpowertrackingindex < (TxBBGainTableLength - 1))
36038 + {
36039 + priv->rfc_txpowertrackingindex++;
36040 + priv->rfc_txpowertrackingindex_real++;
36041 + rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfc_txpowertrackingindex_real].txbbgain_value);
36042 + }
36043 + else
36044 + rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[TxBBGainTableLength - 1].txbbgain_value);
36045 + }
36046 + }
36047 + if (RF_Type == RF_2T4R)
36048 + priv->CCKPresentAttentuation_difference
36049 + = priv->rfa_txpowertrackingindex - priv->rfa_txpowertracking_default;
36050 + else
36051 + priv->CCKPresentAttentuation_difference
36052 + = priv->rfc_txpowertrackingindex - priv->rfc_txpowertracking_default;
36053 +
36054 + if(priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
36055 + priv->CCKPresentAttentuation
36056 + = priv->CCKPresentAttentuation_20Mdefault + priv->CCKPresentAttentuation_difference;
36057 + else
36058 + priv->CCKPresentAttentuation
36059 + = priv->CCKPresentAttentuation_40Mdefault + priv->CCKPresentAttentuation_difference;
36060 +
36061 + if(priv->CCKPresentAttentuation > (CCKTxBBGainTableLength-1))
36062 + priv->CCKPresentAttentuation = CCKTxBBGainTableLength-1;
36063 + if(priv->CCKPresentAttentuation < 0)
36064 + priv->CCKPresentAttentuation = 0;
36065 +
36066 + if(1)
36067 + {
36068 + if(priv->ieee80211->current_network.channel == 14 && !priv->bcck_in_ch14)
36069 + {
36070 + priv->bcck_in_ch14 = TRUE;
36071 + dm_cck_txpower_adjust(dev,priv->bcck_in_ch14);
36072 + }
36073 + else if(priv->ieee80211->current_network.channel != 14 && priv->bcck_in_ch14)
36074 + {
36075 + priv->bcck_in_ch14 = FALSE;
36076 + dm_cck_txpower_adjust(dev,priv->bcck_in_ch14);
36077 + }
36078 + else
36079 + dm_cck_txpower_adjust(dev,priv->bcck_in_ch14);
36080 + }
36081 + RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex = %d\n", priv->rfa_txpowertrackingindex);
36082 + RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_real = %d\n", priv->rfa_txpowertrackingindex_real);
36083 +#ifdef RTL8190P
36084 + RT_TRACE(COMP_POWER_TRACKING, "priv->rfc_txpowertrackingindex = %d\n", priv->rfc_txpowertrackingindex);
36085 + RT_TRACE(COMP_POWER_TRACKING, "priv->rfc_txpowertrackingindex_real = %d\n", priv->rfc_txpowertrackingindex_real);
36086 +#endif
36087 + RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_difference = %d\n", priv->CCKPresentAttentuation_difference);
36088 + RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation = %d\n", priv->CCKPresentAttentuation);
36089 +
36090 + if (priv->CCKPresentAttentuation_difference <= -12||priv->CCKPresentAttentuation_difference >= 24)
36091 + {
36092 + priv->ieee80211->bdynamic_txpower_enable = TRUE;
36093 + write_nic_byte(dev, Pw_Track_Flag, 0);
36094 + write_nic_byte(dev, FW_Busy_Flag, 0);
36095 + RT_TRACE(COMP_POWER_TRACKING, "tx power track--->limited\n");
36096 + return;
36097 + }
36098 +
36099 +
36100 + }
36101 + write_nic_byte(dev, Pw_Track_Flag, 0);
36102 + Avg_TSSI_Meas_from_driver = 0;
36103 + for(k = 0;k < 5; k++)
36104 + tmp_report[k] = 0;
36105 + break;
36106 + }
36107 + write_nic_byte(dev, FW_Busy_Flag, 0);
36108 +}
36109 + priv->ieee80211->bdynamic_txpower_enable = TRUE;
36110 + write_nic_byte(dev, Pw_Track_Flag, 0);
36111 +}
36112 +#ifndef RTL8190P
36113 +static void dm_TXPowerTrackingCallback_ThermalMeter(struct net_device * dev)
36114 +{
36115 +#define ThermalMeterVal 9
36116 + struct r8192_priv *priv = ieee80211_priv(dev);
36117 + u32 tmpRegA, TempCCk;
36118 + u8 tmpOFDMindex, tmpCCKindex, tmpCCK20Mindex, tmpCCK40Mindex, tmpval;
36119 + int i =0, CCKSwingNeedUpdate=0;
36120 +
36121 + if(!priv->btxpower_trackingInit)
36122 + {
36123 + //Query OFDM default setting
36124 + tmpRegA= rtl8192_QueryBBReg(dev, rOFDM0_XATxIQImbalance, bMaskDWord);
36125 + for(i=0; i<OFDM_Table_Length; i++) //find the index
36126 + {
36127 + if(tmpRegA == OFDMSwingTable[i])
36128 + {
36129 + priv->OFDM_index= (u8)i;
36130 + RT_TRACE(COMP_POWER_TRACKING, "Initial reg0x%x = 0x%x, OFDM_index=0x%x\n",
36131 + rOFDM0_XATxIQImbalance, tmpRegA, priv->OFDM_index);
36132 + }
36133 + }
36134 +
36135 + //Query CCK default setting From 0xa22
36136 + TempCCk = rtl8192_QueryBBReg(dev, rCCK0_TxFilter1, bMaskByte2);
36137 + for(i=0 ; i<CCK_Table_length ; i++)
36138 + {
36139 + if(TempCCk == (u32)CCKSwingTable_Ch1_Ch13[i][0])
36140 + {
36141 + priv->CCK_index =(u8) i;
36142 + RT_TRACE(COMP_POWER_TRACKING, "Initial reg0x%x = 0x%x, CCK_index=0x%x\n",
36143 + rCCK0_TxFilter1, TempCCk, priv->CCK_index);
36144 + break;
36145 + }
36146 +}
36147 + priv->btxpower_trackingInit = TRUE;
36148 + //pHalData->TXPowercount = 0;
36149 + return;
36150 + }
36151 +
36152 + //==========================
36153 + // this is only for test, should be masked
36154 +#if 0
36155 +{
36156 + //UINT32 eRFPath;
36157 + //UINT32 start_rf, end_rf;
36158 + UINT32 curr_addr;
36159 + //UINT32 reg_addr;
36160 + //UINT32 reg_addr_end;
36161 + UINT32 reg_value;
36162 + //start_rf = RF90_PATH_A;
36163 + //end_rf = RF90_PATH_B;//RF90_PATH_MAX;
36164 + //reg_addr = 0x0;
36165 + //reg_addr_end = 0x2F;
36166 +
36167 + for (curr_addr = 0; curr_addr < 0x2d; curr_addr++)
36168 + {
36169 + reg_value = PHY_QueryRFReg( Adapter, (RF90_RADIO_PATH_E)RF90_PATH_A,
36170 + curr_addr, bMaskDWord);
36171 + }
36172 +
36173 + pHalData->TXPowercount = 0;
36174 + return;
36175 +}
36176 +#endif
36177 + //==========================
36178 +
36179 + // read and filter out unreasonable value
36180 + tmpRegA = rtl8192_phy_QueryRFReg(dev, RF90_PATH_A, 0x12, 0x078); // 0x12: RF Reg[10:7]
36181 + RT_TRACE(COMP_POWER_TRACKING, "Readback ThermalMeterA = %d \n", tmpRegA);
36182 + if(tmpRegA < 3 || tmpRegA > 13)
36183 + return;
36184 + if(tmpRegA >= 12) // if over 12, TP will be bad when high temprature
36185 + tmpRegA = 12;
36186 + RT_TRACE(COMP_POWER_TRACKING, "Valid ThermalMeterA = %d \n", tmpRegA);
36187 + priv->ThermalMeter[0] = ThermalMeterVal; //We use fixed value by Bryant's suggestion
36188 + priv->ThermalMeter[1] = ThermalMeterVal; //We use fixed value by Bryant's suggestion
36189 +
36190 + //Get current RF-A temprature index
36191 + if(priv->ThermalMeter[0] >= (u8)tmpRegA) //lower temprature
36192 + {
36193 + tmpOFDMindex = tmpCCK20Mindex = 6+(priv->ThermalMeter[0]-(u8)tmpRegA);
36194 + tmpCCK40Mindex = tmpCCK20Mindex - 6;
36195 + if(tmpOFDMindex >= OFDM_Table_Length)
36196 + tmpOFDMindex = OFDM_Table_Length-1;
36197 + if(tmpCCK20Mindex >= CCK_Table_length)
36198 + tmpCCK20Mindex = CCK_Table_length-1;
36199 + if(tmpCCK40Mindex >= CCK_Table_length)
36200 + tmpCCK40Mindex = CCK_Table_length-1;
36201 + }
36202 + else
36203 + {
36204 + tmpval = ((u8)tmpRegA - priv->ThermalMeter[0]);
36205 + if(tmpval >= 6) // higher temprature
36206 + tmpOFDMindex = tmpCCK20Mindex = 0; // max to +6dB
36207 + else
36208 + tmpOFDMindex = tmpCCK20Mindex = 6 - tmpval;
36209 + tmpCCK40Mindex = 0;
36210 + }
36211 + //DbgPrint("%ddb, tmpOFDMindex = %d, tmpCCK20Mindex = %d, tmpCCK40Mindex = %d",
36212 + //((u1Byte)tmpRegA - pHalData->ThermalMeter[0]),
36213 + //tmpOFDMindex, tmpCCK20Mindex, tmpCCK40Mindex);
36214 + if(priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) //40M
36215 + tmpCCKindex = tmpCCK40Mindex;
36216 + else
36217 + tmpCCKindex = tmpCCK20Mindex;
36218 +
36219 + //record for bandwidth swith
36220 + priv->Record_CCK_20Mindex = tmpCCK20Mindex;
36221 + priv->Record_CCK_40Mindex = tmpCCK40Mindex;
36222 + RT_TRACE(COMP_POWER_TRACKING, "Record_CCK_20Mindex / Record_CCK_40Mindex = %d / %d.\n",
36223 + priv->Record_CCK_20Mindex, priv->Record_CCK_40Mindex);
36224 +
36225 + if(priv->ieee80211->current_network.channel == 14 && !priv->bcck_in_ch14)
36226 + {
36227 + priv->bcck_in_ch14 = TRUE;
36228 + CCKSwingNeedUpdate = 1;
36229 + }
36230 + else if(priv->ieee80211->current_network.channel != 14 && priv->bcck_in_ch14)
36231 + {
36232 + priv->bcck_in_ch14 = FALSE;
36233 + CCKSwingNeedUpdate = 1;
36234 + }
36235 +
36236 + if(priv->CCK_index != tmpCCKindex)
36237 +{
36238 + priv->CCK_index = tmpCCKindex;
36239 + CCKSwingNeedUpdate = 1;
36240 + }
36241 +
36242 + if(CCKSwingNeedUpdate)
36243 + {
36244 + //DbgPrint("Update CCK Swing, CCK_index = %d\n", pHalData->CCK_index);
36245 + dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
36246 + }
36247 + if(priv->OFDM_index != tmpOFDMindex)
36248 + {
36249 + priv->OFDM_index = tmpOFDMindex;
36250 + rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, OFDMSwingTable[priv->OFDM_index]);
36251 + RT_TRACE(COMP_POWER_TRACKING, "Update OFDMSwing[%d] = 0x%x\n",
36252 + priv->OFDM_index, OFDMSwingTable[priv->OFDM_index]);
36253 + }
36254 + priv->txpower_count = 0;
36255 +}
36256 +#endif
36257 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
36258 +void dm_txpower_trackingcallback(struct work_struct *work)
36259 +{
36260 + struct delayed_work *dwork = container_of(work,struct delayed_work,work);
36261 + struct r8192_priv *priv = container_of(dwork,struct r8192_priv,txpower_tracking_wq);
36262 + struct net_device *dev = priv->ieee80211->dev;
36263 +#else
36264 +extern void dm_txpower_trackingcallback(struct net_device *dev)
36265 +{
36266 +#ifndef RTL8190P
36267 + struct r8192_priv *priv = ieee80211_priv(dev);
36268 +#endif
36269 +#endif
36270 +
36271 +#ifdef RTL8190P
36272 + dm_TXPowerTrackingCallback_TSSI(dev);
36273 +#else
36274 + //if(priv->bDcut == TRUE)
36275 + if(priv->IC_Cut >= IC_VersionCut_D)
36276 + dm_TXPowerTrackingCallback_TSSI(dev);
36277 + else
36278 + dm_TXPowerTrackingCallback_ThermalMeter(dev);
36279 +#endif
36280 +}
36281 +
36282 +
36283 +static void dm_InitializeTXPowerTracking_TSSI(struct net_device *dev)
36284 +{
36285 +
36286 + struct r8192_priv *priv = ieee80211_priv(dev);
36287 +
36288 + //Initial the Tx BB index and mapping value
36289 + priv->txbbgain_table[0].txbb_iq_amplifygain = 12;
36290 + priv->txbbgain_table[0].txbbgain_value=0x7f8001fe;
36291 + priv->txbbgain_table[1].txbb_iq_amplifygain = 11;
36292 + priv->txbbgain_table[1].txbbgain_value=0x788001e2;
36293 + priv->txbbgain_table[2].txbb_iq_amplifygain = 10;
36294 + priv->txbbgain_table[2].txbbgain_value=0x71c001c7;
36295 + priv->txbbgain_table[3].txbb_iq_amplifygain = 9;
36296 + priv->txbbgain_table[3].txbbgain_value=0x6b8001ae;
36297 + priv->txbbgain_table[4].txbb_iq_amplifygain = 8;
36298 + priv->txbbgain_table[4].txbbgain_value=0x65400195;
36299 + priv->txbbgain_table[5].txbb_iq_amplifygain = 7;
36300 + priv->txbbgain_table[5].txbbgain_value=0x5fc0017f;
36301 + priv->txbbgain_table[6].txbb_iq_amplifygain = 6;
36302 + priv->txbbgain_table[6].txbbgain_value=0x5a400169;
36303 + priv->txbbgain_table[7].txbb_iq_amplifygain = 5;
36304 + priv->txbbgain_table[7].txbbgain_value=0x55400155;
36305 + priv->txbbgain_table[8].txbb_iq_amplifygain = 4;
36306 + priv->txbbgain_table[8].txbbgain_value=0x50800142;
36307 + priv->txbbgain_table[9].txbb_iq_amplifygain = 3;
36308 + priv->txbbgain_table[9].txbbgain_value=0x4c000130;
36309 + priv->txbbgain_table[10].txbb_iq_amplifygain = 2;
36310 + priv->txbbgain_table[10].txbbgain_value=0x47c0011f;
36311 + priv->txbbgain_table[11].txbb_iq_amplifygain = 1;
36312 + priv->txbbgain_table[11].txbbgain_value=0x43c0010f;
36313 + priv->txbbgain_table[12].txbb_iq_amplifygain = 0;
36314 + priv->txbbgain_table[12].txbbgain_value=0x40000100;
36315 + priv->txbbgain_table[13].txbb_iq_amplifygain = -1;
36316 + priv->txbbgain_table[13].txbbgain_value=0x3c8000f2;
36317 + priv->txbbgain_table[14].txbb_iq_amplifygain = -2;
36318 + priv->txbbgain_table[14].txbbgain_value=0x390000e4;
36319 + priv->txbbgain_table[15].txbb_iq_amplifygain = -3;
36320 + priv->txbbgain_table[15].txbbgain_value=0x35c000d7;
36321 + priv->txbbgain_table[16].txbb_iq_amplifygain = -4;
36322 + priv->txbbgain_table[16].txbbgain_value=0x32c000cb;
36323 + priv->txbbgain_table[17].txbb_iq_amplifygain = -5;
36324 + priv->txbbgain_table[17].txbbgain_value=0x300000c0;
36325 + priv->txbbgain_table[18].txbb_iq_amplifygain = -6;
36326 + priv->txbbgain_table[18].txbbgain_value=0x2d4000b5;
36327 + priv->txbbgain_table[19].txbb_iq_amplifygain = -7;
36328 + priv->txbbgain_table[19].txbbgain_value=0x2ac000ab;
36329 + priv->txbbgain_table[20].txbb_iq_amplifygain = -8;
36330 + priv->txbbgain_table[20].txbbgain_value=0x288000a2;
36331 + priv->txbbgain_table[21].txbb_iq_amplifygain = -9;
36332 + priv->txbbgain_table[21].txbbgain_value=0x26000098;
36333 + priv->txbbgain_table[22].txbb_iq_amplifygain = -10;
36334 + priv->txbbgain_table[22].txbbgain_value=0x24000090;
36335 + priv->txbbgain_table[23].txbb_iq_amplifygain = -11;
36336 + priv->txbbgain_table[23].txbbgain_value=0x22000088;
36337 + priv->txbbgain_table[24].txbb_iq_amplifygain = -12;
36338 + priv->txbbgain_table[24].txbbgain_value=0x20000080;
36339 + priv->txbbgain_table[25].txbb_iq_amplifygain = -13;
36340 + priv->txbbgain_table[25].txbbgain_value=0x1a00006c;
36341 + priv->txbbgain_table[26].txbb_iq_amplifygain = -14;
36342 + priv->txbbgain_table[26].txbbgain_value=0x1c800072;
36343 + priv->txbbgain_table[27].txbb_iq_amplifygain = -15;
36344 + priv->txbbgain_table[27].txbbgain_value=0x18000060;
36345 + priv->txbbgain_table[28].txbb_iq_amplifygain = -16;
36346 + priv->txbbgain_table[28].txbbgain_value=0x19800066;
36347 + priv->txbbgain_table[29].txbb_iq_amplifygain = -17;
36348 + priv->txbbgain_table[29].txbbgain_value=0x15800056;
36349 + priv->txbbgain_table[30].txbb_iq_amplifygain = -18;
36350 + priv->txbbgain_table[30].txbbgain_value=0x26c0005b;
36351 + priv->txbbgain_table[31].txbb_iq_amplifygain = -19;
36352 + priv->txbbgain_table[31].txbbgain_value=0x14400051;
36353 + priv->txbbgain_table[32].txbb_iq_amplifygain = -20;
36354 + priv->txbbgain_table[32].txbbgain_value=0x24400051;
36355 + priv->txbbgain_table[33].txbb_iq_amplifygain = -21;
36356 + priv->txbbgain_table[33].txbbgain_value=0x1300004c;
36357 + priv->txbbgain_table[34].txbb_iq_amplifygain = -22;
36358 + priv->txbbgain_table[34].txbbgain_value=0x12000048;
36359 + priv->txbbgain_table[35].txbb_iq_amplifygain = -23;
36360 + priv->txbbgain_table[35].txbbgain_value=0x11000044;
36361 + priv->txbbgain_table[36].txbb_iq_amplifygain = -24;
36362 + priv->txbbgain_table[36].txbbgain_value=0x10000040;
36363 +
36364 + //ccktxbb_valuearray[0] is 0xA22 [1] is 0xA24 ...[7] is 0xA29
36365 + //This Table is for CH1~CH13
36366 + priv->cck_txbbgain_table[0].ccktxbb_valuearray[0] = 0x36;
36367 + priv->cck_txbbgain_table[0].ccktxbb_valuearray[1] = 0x35;
36368 + priv->cck_txbbgain_table[0].ccktxbb_valuearray[2] = 0x2e;
36369 + priv->cck_txbbgain_table[0].ccktxbb_valuearray[3] = 0x25;
36370 + priv->cck_txbbgain_table[0].ccktxbb_valuearray[4] = 0x1c;
36371 + priv->cck_txbbgain_table[0].ccktxbb_valuearray[5] = 0x12;
36372 + priv->cck_txbbgain_table[0].ccktxbb_valuearray[6] = 0x09;
36373 + priv->cck_txbbgain_table[0].ccktxbb_valuearray[7] = 0x04;
36374 +
36375 + priv->cck_txbbgain_table[1].ccktxbb_valuearray[0] = 0x33;
36376 + priv->cck_txbbgain_table[1].ccktxbb_valuearray[1] = 0x32;
36377 + priv->cck_txbbgain_table[1].ccktxbb_valuearray[2] = 0x2b;
36378 + priv->cck_txbbgain_table[1].ccktxbb_valuearray[3] = 0x23;
36379 + priv->cck_txbbgain_table[1].ccktxbb_valuearray[4] = 0x1a;
36380 + priv->cck_txbbgain_table[1].ccktxbb_valuearray[5] = 0x11;
36381 + priv->cck_txbbgain_table[1].ccktxbb_valuearray[6] = 0x08;
36382 + priv->cck_txbbgain_table[1].ccktxbb_valuearray[7] = 0x04;
36383 +
36384 + priv->cck_txbbgain_table[2].ccktxbb_valuearray[0] = 0x30;
36385 + priv->cck_txbbgain_table[2].ccktxbb_valuearray[1] = 0x2f;
36386 + priv->cck_txbbgain_table[2].ccktxbb_valuearray[2] = 0x29;
36387 + priv->cck_txbbgain_table[2].ccktxbb_valuearray[3] = 0x21;
36388 + priv->cck_txbbgain_table[2].ccktxbb_valuearray[4] = 0x19;
36389 + priv->cck_txbbgain_table[2].ccktxbb_valuearray[5] = 0x10;
36390 + priv->cck_txbbgain_table[2].ccktxbb_valuearray[6] = 0x08;
36391 + priv->cck_txbbgain_table[2].ccktxbb_valuearray[7] = 0x03;
36392 +
36393 + priv->cck_txbbgain_table[3].ccktxbb_valuearray[0] = 0x2d;
36394 + priv->cck_txbbgain_table[3].ccktxbb_valuearray[1] = 0x2d;
36395 + priv->cck_txbbgain_table[3].ccktxbb_valuearray[2] = 0x27;
36396 + priv->cck_txbbgain_table[3].ccktxbb_valuearray[3] = 0x1f;
36397 + priv->cck_txbbgain_table[3].ccktxbb_valuearray[4] = 0x18;
36398 + priv->cck_txbbgain_table[3].ccktxbb_valuearray[5] = 0x0f;
36399 + priv->cck_txbbgain_table[3].ccktxbb_valuearray[6] = 0x08;
36400 + priv->cck_txbbgain_table[3].ccktxbb_valuearray[7] = 0x03;
36401 +
36402 + priv->cck_txbbgain_table[4].ccktxbb_valuearray[0] = 0x2b;
36403 + priv->cck_txbbgain_table[4].ccktxbb_valuearray[1] = 0x2a;
36404 + priv->cck_txbbgain_table[4].ccktxbb_valuearray[2] = 0x25;
36405 + priv->cck_txbbgain_table[4].ccktxbb_valuearray[3] = 0x1e;
36406 + priv->cck_txbbgain_table[4].ccktxbb_valuearray[4] = 0x16;
36407 + priv->cck_txbbgain_table[4].ccktxbb_valuearray[5] = 0x0e;
36408 + priv->cck_txbbgain_table[4].ccktxbb_valuearray[6] = 0x07;
36409 + priv->cck_txbbgain_table[4].ccktxbb_valuearray[7] = 0x03;
36410 +
36411 + priv->cck_txbbgain_table[5].ccktxbb_valuearray[0] = 0x28;
36412 + priv->cck_txbbgain_table[5].ccktxbb_valuearray[1] = 0x28;
36413 + priv->cck_txbbgain_table[5].ccktxbb_valuearray[2] = 0x22;
36414 + priv->cck_txbbgain_table[5].ccktxbb_valuearray[3] = 0x1c;
36415 + priv->cck_txbbgain_table[5].ccktxbb_valuearray[4] = 0x15;
36416 + priv->cck_txbbgain_table[5].ccktxbb_valuearray[5] = 0x0d;
36417 + priv->cck_txbbgain_table[5].ccktxbb_valuearray[6] = 0x07;
36418 + priv->cck_txbbgain_table[5].ccktxbb_valuearray[7] = 0x03;
36419 +
36420 + priv->cck_txbbgain_table[6].ccktxbb_valuearray[0] = 0x26;
36421 + priv->cck_txbbgain_table[6].ccktxbb_valuearray[1] = 0x25;
36422 + priv->cck_txbbgain_table[6].ccktxbb_valuearray[2] = 0x21;
36423 + priv->cck_txbbgain_table[6].ccktxbb_valuearray[3] = 0x1b;
36424 + priv->cck_txbbgain_table[6].ccktxbb_valuearray[4] = 0x14;
36425 + priv->cck_txbbgain_table[6].ccktxbb_valuearray[5] = 0x0d;
36426 + priv->cck_txbbgain_table[6].ccktxbb_valuearray[6] = 0x06;
36427 + priv->cck_txbbgain_table[6].ccktxbb_valuearray[7] = 0x03;
36428 +
36429 + priv->cck_txbbgain_table[7].ccktxbb_valuearray[0] = 0x24;
36430 + priv->cck_txbbgain_table[7].ccktxbb_valuearray[1] = 0x23;
36431 + priv->cck_txbbgain_table[7].ccktxbb_valuearray[2] = 0x1f;
36432 + priv->cck_txbbgain_table[7].ccktxbb_valuearray[3] = 0x19;
36433 + priv->cck_txbbgain_table[7].ccktxbb_valuearray[4] = 0x13;
36434 + priv->cck_txbbgain_table[7].ccktxbb_valuearray[5] = 0x0c;
36435 + priv->cck_txbbgain_table[7].ccktxbb_valuearray[6] = 0x06;
36436 + priv->cck_txbbgain_table[7].ccktxbb_valuearray[7] = 0x03;
36437 +
36438 + priv->cck_txbbgain_table[8].ccktxbb_valuearray[0] = 0x22;
36439 + priv->cck_txbbgain_table[8].ccktxbb_valuearray[1] = 0x21;
36440 + priv->cck_txbbgain_table[8].ccktxbb_valuearray[2] = 0x1d;
36441 + priv->cck_txbbgain_table[8].ccktxbb_valuearray[3] = 0x18;
36442 + priv->cck_txbbgain_table[8].ccktxbb_valuearray[4] = 0x11;
36443 + priv->cck_txbbgain_table[8].ccktxbb_valuearray[5] = 0x0b;
36444 + priv->cck_txbbgain_table[8].ccktxbb_valuearray[6] = 0x06;
36445 + priv->cck_txbbgain_table[8].ccktxbb_valuearray[7] = 0x02;
36446 +
36447 + priv->cck_txbbgain_table[9].ccktxbb_valuearray[0] = 0x20;
36448 + priv->cck_txbbgain_table[9].ccktxbb_valuearray[1] = 0x20;
36449 + priv->cck_txbbgain_table[9].ccktxbb_valuearray[2] = 0x1b;
36450 + priv->cck_txbbgain_table[9].ccktxbb_valuearray[3] = 0x16;
36451 + priv->cck_txbbgain_table[9].ccktxbb_valuearray[4] = 0x11;
36452 + priv->cck_txbbgain_table[9].ccktxbb_valuearray[5] = 0x08;
36453 + priv->cck_txbbgain_table[9].ccktxbb_valuearray[6] = 0x05;
36454 + priv->cck_txbbgain_table[9].ccktxbb_valuearray[7] = 0x02;
36455 +
36456 + priv->cck_txbbgain_table[10].ccktxbb_valuearray[0] = 0x1f;
36457 + priv->cck_txbbgain_table[10].ccktxbb_valuearray[1] = 0x1e;
36458 + priv->cck_txbbgain_table[10].ccktxbb_valuearray[2] = 0x1a;
36459 + priv->cck_txbbgain_table[10].ccktxbb_valuearray[3] = 0x15;
36460 + priv->cck_txbbgain_table[10].ccktxbb_valuearray[4] = 0x10;
36461 + priv->cck_txbbgain_table[10].ccktxbb_valuearray[5] = 0x0a;
36462 + priv->cck_txbbgain_table[10].ccktxbb_valuearray[6] = 0x05;
36463 + priv->cck_txbbgain_table[10].ccktxbb_valuearray[7] = 0x02;
36464 +
36465 + priv->cck_txbbgain_table[11].ccktxbb_valuearray[0] = 0x1d;
36466 + priv->cck_txbbgain_table[11].ccktxbb_valuearray[1] = 0x1c;
36467 + priv->cck_txbbgain_table[11].ccktxbb_valuearray[2] = 0x18;
36468 + priv->cck_txbbgain_table[11].ccktxbb_valuearray[3] = 0x14;
36469 + priv->cck_txbbgain_table[11].ccktxbb_valuearray[4] = 0x0f;
36470 + priv->cck_txbbgain_table[11].ccktxbb_valuearray[5] = 0x0a;
36471 + priv->cck_txbbgain_table[11].ccktxbb_valuearray[6] = 0x05;
36472 + priv->cck_txbbgain_table[11].ccktxbb_valuearray[7] = 0x02;
36473 +
36474 + priv->cck_txbbgain_table[12].ccktxbb_valuearray[0] = 0x1b;
36475 + priv->cck_txbbgain_table[12].ccktxbb_valuearray[1] = 0x1a;
36476 + priv->cck_txbbgain_table[12].ccktxbb_valuearray[2] = 0x17;
36477 + priv->cck_txbbgain_table[12].ccktxbb_valuearray[3] = 0x13;
36478 + priv->cck_txbbgain_table[12].ccktxbb_valuearray[4] = 0x0e;
36479 + priv->cck_txbbgain_table[12].ccktxbb_valuearray[5] = 0x09;
36480 + priv->cck_txbbgain_table[12].ccktxbb_valuearray[6] = 0x04;
36481 + priv->cck_txbbgain_table[12].ccktxbb_valuearray[7] = 0x02;
36482 +
36483 + priv->cck_txbbgain_table[13].ccktxbb_valuearray[0] = 0x1a;
36484 + priv->cck_txbbgain_table[13].ccktxbb_valuearray[1] = 0x19;
36485 + priv->cck_txbbgain_table[13].ccktxbb_valuearray[2] = 0x16;
36486 + priv->cck_txbbgain_table[13].ccktxbb_valuearray[3] = 0x12;
36487 + priv->cck_txbbgain_table[13].ccktxbb_valuearray[4] = 0x0d;
36488 + priv->cck_txbbgain_table[13].ccktxbb_valuearray[5] = 0x09;
36489 + priv->cck_txbbgain_table[13].ccktxbb_valuearray[6] = 0x04;
36490 + priv->cck_txbbgain_table[13].ccktxbb_valuearray[7] = 0x02;
36491 +
36492 + priv->cck_txbbgain_table[14].ccktxbb_valuearray[0] = 0x18;
36493 + priv->cck_txbbgain_table[14].ccktxbb_valuearray[1] = 0x17;
36494 + priv->cck_txbbgain_table[14].ccktxbb_valuearray[2] = 0x15;
36495 + priv->cck_txbbgain_table[14].ccktxbb_valuearray[3] = 0x11;
36496 + priv->cck_txbbgain_table[14].ccktxbb_valuearray[4] = 0x0c;
36497 + priv->cck_txbbgain_table[14].ccktxbb_valuearray[5] = 0x08;
36498 + priv->cck_txbbgain_table[14].ccktxbb_valuearray[6] = 0x04;
36499 + priv->cck_txbbgain_table[14].ccktxbb_valuearray[7] = 0x02;
36500 +
36501 + priv->cck_txbbgain_table[15].ccktxbb_valuearray[0] = 0x17;
36502 + priv->cck_txbbgain_table[15].ccktxbb_valuearray[1] = 0x16;
36503 + priv->cck_txbbgain_table[15].ccktxbb_valuearray[2] = 0x13;
36504 + priv->cck_txbbgain_table[15].ccktxbb_valuearray[3] = 0x10;
36505 + priv->cck_txbbgain_table[15].ccktxbb_valuearray[4] = 0x0c;
36506 + priv->cck_txbbgain_table[15].ccktxbb_valuearray[5] = 0x08;
36507 + priv->cck_txbbgain_table[15].ccktxbb_valuearray[6] = 0x04;
36508 + priv->cck_txbbgain_table[15].ccktxbb_valuearray[7] = 0x02;
36509 +
36510 + priv->cck_txbbgain_table[16].ccktxbb_valuearray[0] = 0x16;
36511 + priv->cck_txbbgain_table[16].ccktxbb_valuearray[1] = 0x15;
36512 + priv->cck_txbbgain_table[16].ccktxbb_valuearray[2] = 0x12;
36513 + priv->cck_txbbgain_table[16].ccktxbb_valuearray[3] = 0x0f;
36514 + priv->cck_txbbgain_table[16].ccktxbb_valuearray[4] = 0x0b;
36515 + priv->cck_txbbgain_table[16].ccktxbb_valuearray[5] = 0x07;
36516 + priv->cck_txbbgain_table[16].ccktxbb_valuearray[6] = 0x04;
36517 + priv->cck_txbbgain_table[16].ccktxbb_valuearray[7] = 0x01;
36518 +
36519 + priv->cck_txbbgain_table[17].ccktxbb_valuearray[0] = 0x14;
36520 + priv->cck_txbbgain_table[17].ccktxbb_valuearray[1] = 0x14;
36521 + priv->cck_txbbgain_table[17].ccktxbb_valuearray[2] = 0x11;
36522 + priv->cck_txbbgain_table[17].ccktxbb_valuearray[3] = 0x0e;
36523 + priv->cck_txbbgain_table[17].ccktxbb_valuearray[4] = 0x0b;
36524 + priv->cck_txbbgain_table[17].ccktxbb_valuearray[5] = 0x07;
36525 + priv->cck_txbbgain_table[17].ccktxbb_valuearray[6] = 0x03;
36526 + priv->cck_txbbgain_table[17].ccktxbb_valuearray[7] = 0x02;
36527 +
36528 + priv->cck_txbbgain_table[18].ccktxbb_valuearray[0] = 0x13;
36529 + priv->cck_txbbgain_table[18].ccktxbb_valuearray[1] = 0x13;
36530 + priv->cck_txbbgain_table[18].ccktxbb_valuearray[2] = 0x10;
36531 + priv->cck_txbbgain_table[18].ccktxbb_valuearray[3] = 0x0d;
36532 + priv->cck_txbbgain_table[18].ccktxbb_valuearray[4] = 0x0a;
36533 + priv->cck_txbbgain_table[18].ccktxbb_valuearray[5] = 0x06;
36534 + priv->cck_txbbgain_table[18].ccktxbb_valuearray[6] = 0x03;
36535 + priv->cck_txbbgain_table[18].ccktxbb_valuearray[7] = 0x01;
36536 +
36537 + priv->cck_txbbgain_table[19].ccktxbb_valuearray[0] = 0x12;
36538 + priv->cck_txbbgain_table[19].ccktxbb_valuearray[1] = 0x12;
36539 + priv->cck_txbbgain_table[19].ccktxbb_valuearray[2] = 0x0f;
36540 + priv->cck_txbbgain_table[19].ccktxbb_valuearray[3] = 0x0c;
36541 + priv->cck_txbbgain_table[19].ccktxbb_valuearray[4] = 0x09;
36542 + priv->cck_txbbgain_table[19].ccktxbb_valuearray[5] = 0x06;
36543 + priv->cck_txbbgain_table[19].ccktxbb_valuearray[6] = 0x03;
36544 + priv->cck_txbbgain_table[19].ccktxbb_valuearray[7] = 0x01;
36545 +
36546 + priv->cck_txbbgain_table[20].ccktxbb_valuearray[0] = 0x11;
36547 + priv->cck_txbbgain_table[20].ccktxbb_valuearray[1] = 0x11;
36548 + priv->cck_txbbgain_table[20].ccktxbb_valuearray[2] = 0x0f;
36549 + priv->cck_txbbgain_table[20].ccktxbb_valuearray[3] = 0x0c;
36550 + priv->cck_txbbgain_table[20].ccktxbb_valuearray[4] = 0x09;
36551 + priv->cck_txbbgain_table[20].ccktxbb_valuearray[5] = 0x06;
36552 + priv->cck_txbbgain_table[20].ccktxbb_valuearray[6] = 0x03;
36553 + priv->cck_txbbgain_table[20].ccktxbb_valuearray[7] = 0x01;
36554 +
36555 + priv->cck_txbbgain_table[21].ccktxbb_valuearray[0] = 0x10;
36556 + priv->cck_txbbgain_table[21].ccktxbb_valuearray[1] = 0x10;
36557 + priv->cck_txbbgain_table[21].ccktxbb_valuearray[2] = 0x0e;
36558 + priv->cck_txbbgain_table[21].ccktxbb_valuearray[3] = 0x0b;
36559 + priv->cck_txbbgain_table[21].ccktxbb_valuearray[4] = 0x08;
36560 + priv->cck_txbbgain_table[21].ccktxbb_valuearray[5] = 0x05;
36561 + priv->cck_txbbgain_table[21].ccktxbb_valuearray[6] = 0x03;
36562 + priv->cck_txbbgain_table[21].ccktxbb_valuearray[7] = 0x01;
36563 +
36564 + priv->cck_txbbgain_table[22].ccktxbb_valuearray[0] = 0x0f;
36565 + priv->cck_txbbgain_table[22].ccktxbb_valuearray[1] = 0x0f;
36566 + priv->cck_txbbgain_table[22].ccktxbb_valuearray[2] = 0x0d;
36567 + priv->cck_txbbgain_table[22].ccktxbb_valuearray[3] = 0x0b;
36568 + priv->cck_txbbgain_table[22].ccktxbb_valuearray[4] = 0x08;
36569 + priv->cck_txbbgain_table[22].ccktxbb_valuearray[5] = 0x05;
36570 + priv->cck_txbbgain_table[22].ccktxbb_valuearray[6] = 0x03;
36571 + priv->cck_txbbgain_table[22].ccktxbb_valuearray[7] = 0x01;
36572 +
36573 + //ccktxbb_valuearray[0] is 0xA22 [1] is 0xA24 ...[7] is 0xA29
36574 + //This Table is for CH14
36575 + priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[0] = 0x36;
36576 + priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[1] = 0x35;
36577 + priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[2] = 0x2e;
36578 + priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[3] = 0x1b;
36579 + priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[4] = 0x00;
36580 + priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[5] = 0x00;
36581 + priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[6] = 0x00;
36582 + priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[7] = 0x00;
36583 +
36584 + priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[0] = 0x33;
36585 + priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[1] = 0x32;
36586 + priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[2] = 0x2b;
36587 + priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[3] = 0x19;
36588 + priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[4] = 0x00;
36589 + priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[5] = 0x00;
36590 + priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[6] = 0x00;
36591 + priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[7] = 0x00;
36592 +
36593 + priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[0] = 0x30;
36594 + priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[1] = 0x2f;
36595 + priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[2] = 0x29;
36596 + priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[3] = 0x18;
36597 + priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[4] = 0x00;
36598 + priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[5] = 0x00;
36599 + priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[6] = 0x00;
36600 + priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[7] = 0x00;
36601 +
36602 + priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[0] = 0x2d;
36603 + priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[1] = 0x2d;
36604 + priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[2] = 0x27;
36605 + priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[3] = 0x17;
36606 + priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[4] = 0x00;
36607 + priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[5] = 0x00;
36608 + priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[6] = 0x00;
36609 + priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[7] = 0x00;
36610 +
36611 + priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[0] = 0x2b;
36612 + priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[1] = 0x2a;
36613 + priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[2] = 0x25;
36614 + priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[3] = 0x15;
36615 + priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[4] = 0x00;
36616 + priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[5] = 0x00;
36617 + priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[6] = 0x00;
36618 + priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[7] = 0x00;
36619 +
36620 + priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[0] = 0x28;
36621 + priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[1] = 0x28;
36622 + priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[2] = 0x22;
36623 + priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[3] = 0x14;
36624 + priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[4] = 0x00;
36625 + priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[5] = 0x00;
36626 + priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[6] = 0x00;
36627 + priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[7] = 0x00;
36628 +
36629 + priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[0] = 0x26;
36630 + priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[1] = 0x25;
36631 + priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[2] = 0x21;
36632 + priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[3] = 0x13;
36633 + priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[4] = 0x00;
36634 + priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[5] = 0x00;
36635 + priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[6] = 0x00;
36636 + priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[7] = 0x00;
36637 +
36638 + priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[0] = 0x24;
36639 + priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[1] = 0x23;
36640 + priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[2] = 0x1f;
36641 + priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[3] = 0x12;
36642 + priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[4] = 0x00;
36643 + priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[5] = 0x00;
36644 + priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[6] = 0x00;
36645 + priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[7] = 0x00;
36646 +
36647 + priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[0] = 0x22;
36648 + priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[1] = 0x21;
36649 + priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[2] = 0x1d;
36650 + priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[3] = 0x11;
36651 + priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[4] = 0x00;
36652 + priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[5] = 0x00;
36653 + priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[6] = 0x00;
36654 + priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[7] = 0x00;
36655 +
36656 + priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[0] = 0x20;
36657 + priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[1] = 0x20;
36658 + priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[2] = 0x1b;
36659 + priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[3] = 0x10;
36660 + priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[4] = 0x00;
36661 + priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[5] = 0x00;
36662 + priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[6] = 0x00;
36663 + priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[7] = 0x00;
36664 +
36665 + priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[0] = 0x1f;
36666 + priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[1] = 0x1e;
36667 + priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[2] = 0x1a;
36668 + priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[3] = 0x0f;
36669 + priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[4] = 0x00;
36670 + priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[5] = 0x00;
36671 + priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[6] = 0x00;
36672 + priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[7] = 0x00;
36673 +
36674 + priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[0] = 0x1d;
36675 + priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[1] = 0x1c;
36676 + priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[2] = 0x18;
36677 + priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[3] = 0x0e;
36678 + priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[4] = 0x00;
36679 + priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[5] = 0x00;
36680 + priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[6] = 0x00;
36681 + priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[7] = 0x00;
36682 +
36683 + priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[0] = 0x1b;
36684 + priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[1] = 0x1a;
36685 + priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[2] = 0x17;
36686 + priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[3] = 0x0e;
36687 + priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[4] = 0x00;
36688 + priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[5] = 0x00;
36689 + priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[6] = 0x00;
36690 + priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[7] = 0x00;
36691 +
36692 + priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[0] = 0x1a;
36693 + priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[1] = 0x19;
36694 + priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[2] = 0x16;
36695 + priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[3] = 0x0d;
36696 + priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[4] = 0x00;
36697 + priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[5] = 0x00;
36698 + priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[6] = 0x00;
36699 + priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[7] = 0x00;
36700 +
36701 + priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[0] = 0x18;
36702 + priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[1] = 0x17;
36703 + priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[2] = 0x15;
36704 + priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[3] = 0x0c;
36705 + priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[4] = 0x00;
36706 + priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[5] = 0x00;
36707 + priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[6] = 0x00;
36708 + priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[7] = 0x00;
36709 +
36710 + priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[0] = 0x17;
36711 + priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[1] = 0x16;
36712 + priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[2] = 0x13;
36713 + priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[3] = 0x0b;
36714 + priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[4] = 0x00;
36715 + priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[5] = 0x00;
36716 + priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[6] = 0x00;
36717 + priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[7] = 0x00;
36718 +
36719 + priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[0] = 0x16;
36720 + priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[1] = 0x15;
36721 + priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[2] = 0x12;
36722 + priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[3] = 0x0b;
36723 + priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[4] = 0x00;
36724 + priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[5] = 0x00;
36725 + priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[6] = 0x00;
36726 + priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[7] = 0x00;
36727 +
36728 + priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[0] = 0x14;
36729 + priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[1] = 0x14;
36730 + priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[2] = 0x11;
36731 + priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[3] = 0x0a;
36732 + priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[4] = 0x00;
36733 + priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[5] = 0x00;
36734 + priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[6] = 0x00;
36735 + priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[7] = 0x00;
36736 +
36737 + priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[0] = 0x13;
36738 + priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[1] = 0x13;
36739 + priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[2] = 0x10;
36740 + priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[3] = 0x0a;
36741 + priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[4] = 0x00;
36742 + priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[5] = 0x00;
36743 + priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[6] = 0x00;
36744 + priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[7] = 0x00;
36745 +
36746 + priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[0] = 0x12;
36747 + priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[1] = 0x12;
36748 + priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[2] = 0x0f;
36749 + priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[3] = 0x09;
36750 + priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[4] = 0x00;
36751 + priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[5] = 0x00;
36752 + priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[6] = 0x00;
36753 + priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[7] = 0x00;
36754 +
36755 + priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[0] = 0x11;
36756 + priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[1] = 0x11;
36757 + priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[2] = 0x0f;
36758 + priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[3] = 0x09;
36759 + priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[4] = 0x00;
36760 + priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[5] = 0x00;
36761 + priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[6] = 0x00;
36762 + priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[7] = 0x00;
36763 +
36764 + priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[0] = 0x10;
36765 + priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[1] = 0x10;
36766 + priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[2] = 0x0e;
36767 + priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[3] = 0x08;
36768 + priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[4] = 0x00;
36769 + priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[5] = 0x00;
36770 + priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[6] = 0x00;
36771 + priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[7] = 0x00;
36772 +
36773 + priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[0] = 0x0f;
36774 + priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[1] = 0x0f;
36775 + priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[2] = 0x0d;
36776 + priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[3] = 0x08;
36777 + priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[4] = 0x00;
36778 + priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[5] = 0x00;
36779 + priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[6] = 0x00;
36780 + priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[7] = 0x00;
36781 +
36782 + priv->btxpower_tracking = TRUE;
36783 + priv->txpower_count = 0;
36784 + priv->btxpower_trackingInit = FALSE;
36785 +
36786 +}
36787 +#ifndef RTL8190P
36788 +static void dm_InitializeTXPowerTracking_ThermalMeter(struct net_device *dev)
36789 +{
36790 + struct r8192_priv *priv = ieee80211_priv(dev);
36791 +
36792 + // Tx Power tracking by Theremal Meter require Firmware R/W 3-wire. This mechanism
36793 + // can be enabled only when Firmware R/W 3-wire is enabled. Otherwise, frequent r/w
36794 + // 3-wire by driver cause RF goes into wrong state.
36795 + if(priv->ieee80211->FwRWRF)
36796 + priv->btxpower_tracking = TRUE;
36797 + else
36798 + priv->btxpower_tracking = FALSE;
36799 + priv->txpower_count = 0;
36800 + priv->btxpower_trackingInit = FALSE;
36801 +}
36802 +#endif
36803 +
36804 +void dm_initialize_txpower_tracking(struct net_device *dev)
36805 +{
36806 +#ifndef RTL8190P
36807 + struct r8192_priv *priv = ieee80211_priv(dev);
36808 +#endif
36809 +#ifdef RTL8190P
36810 + dm_InitializeTXPowerTracking_TSSI(dev);
36811 +#else
36812 + //if(priv->bDcut == TRUE)
36813 + if(priv->IC_Cut >= IC_VersionCut_D)
36814 + dm_InitializeTXPowerTracking_TSSI(dev);
36815 + else
36816 + dm_InitializeTXPowerTracking_ThermalMeter(dev);
36817 +#endif
36818 +} // dm_InitializeTXPowerTracking
36819 +
36820 +
36821 +static void dm_CheckTXPowerTracking_TSSI(struct net_device *dev)
36822 +{
36823 + struct r8192_priv *priv = ieee80211_priv(dev);
36824 + static u32 tx_power_track_counter = 0;
36825 + RT_TRACE(COMP_POWER_TRACKING,"%s()\n",__FUNCTION__);
36826 + if(read_nic_byte(dev, 0x11e) ==1)
36827 + return;
36828 + if(!priv->btxpower_tracking)
36829 + return;
36830 + tx_power_track_counter++;
36831 +
36832 +
36833 + if(tx_power_track_counter > 90)
36834 + {
36835 + #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
36836 + queue_delayed_work(priv->priv_wq,&priv->txpower_tracking_wq,0);
36837 + #else
36838 + #if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
36839 + schedule_task(&priv->txpower_tracking_wq);
36840 + #else
36841 + queue_work(priv->priv_wq,&priv->txpower_tracking_wq);
36842 + #endif
36843 + #endif
36844 + tx_power_track_counter =0;
36845 + }
36846 +
36847 +}
36848 +
36849 +#ifndef RTL8190P
36850 +static void dm_CheckTXPowerTracking_ThermalMeter(struct net_device *dev)
36851 +{
36852 + struct r8192_priv *priv = ieee80211_priv(dev);
36853 + static u8 TM_Trigger=0;
36854 +#if 0
36855 + u1Byte i;
36856 + u4Byte tmpRegA;
36857 + for(i=0; i<50; i++)
36858 + {
36859 + tmpRegA = PHY_QueryRFReg(Adapter, RF90_PATH_A, 0x12, 0x078); // 0x12: RF Reg[10:7]
36860 + PHY_SetRFReg(Adapter, RF90_PATH_A, 0x02, bMask12Bits, 0x4d);
36861 + //delay_us(100);
36862 + PHY_SetRFReg(Adapter, RF90_PATH_A, 0x02, bMask12Bits, 0x4f);
36863 + //delay_us(100);
36864 + }
36865 + DbgPrint("Trigger and readback ThermalMeter, write RF reg0x2 = 0x4d to 0x4f for 50 times\n");
36866 +#else
36867 + //DbgPrint("dm_CheckTXPowerTracking() \n");
36868 + if(!priv->btxpower_tracking)
36869 + return;
36870 + else
36871 + {
36872 + if(priv->txpower_count <= 2)
36873 + {
36874 + priv->txpower_count++;
36875 + return;
36876 + }
36877 + }
36878 +
36879 + if(!TM_Trigger)
36880 + {
36881 + //Attention!! You have to wirte all 12bits data to RF, or it may cause RF to crash
36882 + //actually write reg0x02 bit1=0, then bit1=1.
36883 + //DbgPrint("Trigger ThermalMeter, write RF reg0x2 = 0x4d to 0x4f\n");
36884 + rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4d);
36885 + rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4f);
36886 + rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4d);
36887 + rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4f);
36888 + TM_Trigger = 1;
36889 + return;
36890 + }
36891 + else
36892 + {
36893 + //DbgPrint("Schedule TxPowerTrackingWorkItem\n");
36894 + #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
36895 + queue_delayed_work(priv->priv_wq,&priv->txpower_tracking_wq,0);
36896 + #else
36897 + #if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
36898 + schedule_task(&priv->txpower_tracking_wq);
36899 + #else
36900 + queue_work(priv->priv_wq,&priv->txpower_tracking_wq);
36901 + #endif
36902 + #endif
36903 + TM_Trigger = 0;
36904 + }
36905 +#endif
36906 + }
36907 +#endif
36908 +
36909 +static void dm_check_txpower_tracking(struct net_device *dev)
36910 +{
36911 +#ifndef RTL8190P
36912 + struct r8192_priv *priv = ieee80211_priv(dev);
36913 + //static u32 tx_power_track_counter = 0;
36914 +#endif
36915 +#ifdef RTL8190P
36916 + dm_CheckTXPowerTracking_TSSI(dev);
36917 +#else
36918 + //if(priv->bDcut == TRUE)
36919 + if(priv->IC_Cut >= IC_VersionCut_D)
36920 + dm_CheckTXPowerTracking_TSSI(dev);
36921 + else
36922 + dm_CheckTXPowerTracking_ThermalMeter(dev);
36923 +#endif
36924 +
36925 +} // dm_CheckTXPowerTracking
36926 +
36927 +
36928 +static void dm_CCKTxPowerAdjust_TSSI(struct net_device *dev, bool bInCH14)
36929 +{
36930 + u32 TempVal;
36931 + struct r8192_priv *priv = ieee80211_priv(dev);
36932 + //Write 0xa22 0xa23
36933 + TempVal = 0;
36934 + if(!bInCH14){
36935 + //Write 0xa22 0xa23
36936 + TempVal = (u32)(priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[0] +
36937 + (priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[1]<<8)) ;
36938 +
36939 + rtl8192_setBBreg(dev, rCCK0_TxFilter1,bMaskHWord, TempVal);
36940 + //Write 0xa24 ~ 0xa27
36941 + TempVal = 0;
36942 + TempVal = (u32)(priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[2] +
36943 + (priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[3]<<8) +
36944 + (priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[4]<<16 )+
36945 + (priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[5]<<24));
36946 + rtl8192_setBBreg(dev, rCCK0_TxFilter2,bMaskDWord, TempVal);
36947 + //Write 0xa28 0xa29
36948 + TempVal = 0;
36949 + TempVal = (u32)(priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[6] +
36950 + (priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[7]<<8)) ;
36951 +
36952 + rtl8192_setBBreg(dev, rCCK0_DebugPort,bMaskLWord, TempVal);
36953 + }
36954 + else
36955 + {
36956 + TempVal = (u32)(priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[0] +
36957 + (priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[1]<<8)) ;
36958 +
36959 + rtl8192_setBBreg(dev, rCCK0_TxFilter1,bMaskHWord, TempVal);
36960 + //Write 0xa24 ~ 0xa27
36961 + TempVal = 0;
36962 + TempVal = (u32)(priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[2] +
36963 + (priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[3]<<8) +
36964 + (priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[4]<<16 )+
36965 + (priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[5]<<24));
36966 + rtl8192_setBBreg(dev, rCCK0_TxFilter2,bMaskDWord, TempVal);
36967 + //Write 0xa28 0xa29
36968 + TempVal = 0;
36969 + TempVal = (u32)(priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[6] +
36970 + (priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[7]<<8)) ;
36971 +
36972 + rtl8192_setBBreg(dev, rCCK0_DebugPort,bMaskLWord, TempVal);
36973 + }
36974 +
36975 +
36976 +}
36977 +#ifndef RTL8190P
36978 +static void dm_CCKTxPowerAdjust_ThermalMeter(struct net_device *dev, bool bInCH14)
36979 +{
36980 + u32 TempVal;
36981 + struct r8192_priv *priv = ieee80211_priv(dev);
36982 +
36983 + TempVal = 0;
36984 + if(!bInCH14)
36985 + {
36986 + //Write 0xa22 0xa23
36987 + TempVal = CCKSwingTable_Ch1_Ch13[priv->CCK_index][0] +
36988 + (CCKSwingTable_Ch1_Ch13[priv->CCK_index][1]<<8) ;
36989 + rtl8192_setBBreg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
36990 + RT_TRACE(COMP_POWER_TRACKING, "CCK not chnl 14, reg 0x%x = 0x%x\n",
36991 + rCCK0_TxFilter1, TempVal);
36992 + //Write 0xa24 ~ 0xa27
36993 + TempVal = 0;
36994 + TempVal = CCKSwingTable_Ch1_Ch13[priv->CCK_index][2] +
36995 + (CCKSwingTable_Ch1_Ch13[priv->CCK_index][3]<<8) +
36996 + (CCKSwingTable_Ch1_Ch13[priv->CCK_index][4]<<16 )+
36997 + (CCKSwingTable_Ch1_Ch13[priv->CCK_index][5]<<24);
36998 + rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
36999 + RT_TRACE(COMP_POWER_TRACKING, "CCK not chnl 14, reg 0x%x = 0x%x\n",
37000 + rCCK0_TxFilter2, TempVal);
37001 + //Write 0xa28 0xa29
37002 + TempVal = 0;
37003 + TempVal = CCKSwingTable_Ch1_Ch13[priv->CCK_index][6] +
37004 + (CCKSwingTable_Ch1_Ch13[priv->CCK_index][7]<<8) ;
37005 +
37006 + rtl8192_setBBreg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
37007 + RT_TRACE(COMP_POWER_TRACKING, "CCK not chnl 14, reg 0x%x = 0x%x\n",
37008 + rCCK0_DebugPort, TempVal);
37009 + }
37010 + else
37011 + {
37012 +// priv->CCKTxPowerAdjustCntNotCh14++; //cosa add for debug.
37013 + //Write 0xa22 0xa23
37014 + TempVal = CCKSwingTable_Ch14[priv->CCK_index][0] +
37015 + (CCKSwingTable_Ch14[priv->CCK_index][1]<<8) ;
37016 +
37017 + rtl8192_setBBreg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
37018 + RT_TRACE(COMP_POWER_TRACKING, "CCK chnl 14, reg 0x%x = 0x%x\n",
37019 + rCCK0_TxFilter1, TempVal);
37020 + //Write 0xa24 ~ 0xa27
37021 + TempVal = 0;
37022 + TempVal = CCKSwingTable_Ch14[priv->CCK_index][2] +
37023 + (CCKSwingTable_Ch14[priv->CCK_index][3]<<8) +
37024 + (CCKSwingTable_Ch14[priv->CCK_index][4]<<16 )+
37025 + (CCKSwingTable_Ch14[priv->CCK_index][5]<<24);
37026 + rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
37027 + RT_TRACE(COMP_POWER_TRACKING, "CCK chnl 14, reg 0x%x = 0x%x\n",
37028 + rCCK0_TxFilter2, TempVal);
37029 + //Write 0xa28 0xa29
37030 + TempVal = 0;
37031 + TempVal = CCKSwingTable_Ch14[priv->CCK_index][6] +
37032 + (CCKSwingTable_Ch14[priv->CCK_index][7]<<8) ;
37033 +
37034 + rtl8192_setBBreg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
37035 + RT_TRACE(COMP_POWER_TRACKING,"CCK chnl 14, reg 0x%x = 0x%x\n",
37036 + rCCK0_DebugPort, TempVal);
37037 + }
37038 + }
37039 +#endif
37040 +
37041 +
37042 +void dm_cck_txpower_adjust(struct net_device *dev, bool binch14)
37043 +{ // dm_CCKTxPowerAdjust
37044 +#ifndef RTL8190P
37045 + struct r8192_priv *priv = ieee80211_priv(dev);
37046 +#endif
37047 +#ifdef RTL8190P
37048 + dm_CCKTxPowerAdjust_TSSI(dev, binch14);
37049 +#else
37050 + //if(priv->bDcut == TRUE)
37051 + if(priv->IC_Cut >= IC_VersionCut_D)
37052 + dm_CCKTxPowerAdjust_TSSI(dev, binch14);
37053 + else
37054 + dm_CCKTxPowerAdjust_ThermalMeter(dev, binch14);
37055 +#endif
37056 +}
37057 +
37058 +
37059 +#ifndef RTL8192U
37060 +static void dm_txpower_reset_recovery(
37061 + struct net_device *dev
37062 +)
37063 +{
37064 + struct r8192_priv *priv = ieee80211_priv(dev);
37065 +
37066 + RT_TRACE(COMP_POWER_TRACKING, "Start Reset Recovery ==>\n");
37067 + rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfa_txpowertrackingindex].txbbgain_value);
37068 + RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery: Fill in 0xc80 is %08x\n",priv->txbbgain_table[priv->rfa_txpowertrackingindex].txbbgain_value);
37069 + RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery: Fill in RFA_txPowerTrackingIndex is %x\n",priv->rfa_txpowertrackingindex);
37070 + RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery : RF A I/Q Amplify Gain is %ld\n",priv->txbbgain_table[priv->rfa_txpowertrackingindex].txbb_iq_amplifygain);
37071 + RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery: CCK Attenuation is %d dB\n",priv->CCKPresentAttentuation);
37072 + dm_cck_txpower_adjust(dev,priv->bcck_in_ch14);
37073 +
37074 + rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfc_txpowertrackingindex].txbbgain_value);
37075 + RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery: Fill in 0xc90 is %08x\n",priv->txbbgain_table[priv->rfc_txpowertrackingindex].txbbgain_value);
37076 + RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery: Fill in RFC_txPowerTrackingIndex is %x\n",priv->rfc_txpowertrackingindex);
37077 + RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery : RF C I/Q Amplify Gain is %ld\n",priv->txbbgain_table[priv->rfc_txpowertrackingindex].txbb_iq_amplifygain);
37078 +
37079 +} // dm_TXPowerResetRecovery
37080 +
37081 +void dm_restore_dynamic_mechanism_state(struct net_device *dev)
37082 +{
37083 + struct r8192_priv *priv = ieee80211_priv(dev);
37084 + u32 reg_ratr = priv->rate_adaptive.last_ratr;
37085 +
37086 + if(!priv->up)
37087 + {
37088 + RT_TRACE(COMP_RATE, "<---- dm_restore_dynamic_mechanism_state(): driver is going to unload\n");
37089 + return;
37090 + }
37091 +
37092 + //
37093 + // Restore previous state for rate adaptive
37094 + //
37095 + if(priv->rate_adaptive.rate_adaptive_disabled)
37096 + return;
37097 + // TODO: Only 11n mode is implemented currently,
37098 + if( !(priv->ieee80211->mode==WIRELESS_MODE_N_24G ||
37099 + priv->ieee80211->mode==WIRELESS_MODE_N_5G))
37100 + return;
37101 + {
37102 + /* 2007/11/15 MH Copy from 8190PCI. */
37103 + u32 ratr_value;
37104 + ratr_value = reg_ratr;
37105 + if(priv->rf_type == RF_1T2R) // 1T2R, Spatial Stream 2 should be disabled
37106 + {
37107 + ratr_value &=~ (RATE_ALL_OFDM_2SS);
37108 + //DbgPrint("HW_VAR_TATR_0 from 0x%x ==> 0x%x\n", ((pu4Byte)(val))[0], ratr_value);
37109 + }
37110 + //DbgPrint("set HW_VAR_TATR_0 = 0x%x\n", ratr_value);
37111 + //cosa PlatformEFIOWrite4Byte(Adapter, RATR0, ((pu4Byte)(val))[0]);
37112 + write_nic_dword(dev, RATR0, ratr_value);
37113 + write_nic_byte(dev, UFWP, 1);
37114 +#if 0 // Disable old code.
37115 + u1Byte index;
37116 + u4Byte input_value;
37117 + index = (u1Byte)((((pu4Byte)(val))[0]) >> 28);
37118 + input_value = (((pu4Byte)(val))[0]) & 0x0fffffff;
37119 + // TODO: Correct it. Emily 2007.01.11
37120 + PlatformEFIOWrite4Byte(Adapter, RATR0+index*4, input_value);
37121 +#endif
37122 + }
37123 + //Resore TX Power Tracking Index
37124 + if(priv->btxpower_trackingInit && priv->btxpower_tracking){
37125 + dm_txpower_reset_recovery(dev);
37126 + }
37127 +
37128 + //
37129 + //Restore BB Initial Gain
37130 + //
37131 + dm_bb_initialgain_restore(dev);
37132 +
37133 +} // DM_RestoreDynamicMechanismState
37134 +
37135 +static void dm_bb_initialgain_restore(struct net_device *dev)
37136 +{
37137 + struct r8192_priv *priv = ieee80211_priv(dev);
37138 + u32 bit_mask = 0x7f; //Bit0~ Bit6
37139 +
37140 + if(dm_digtable.dig_algorithm == DIG_ALGO_BY_RSSI)
37141 + return;
37142 +
37143 + //Disable Initial Gain
37144 + //PHY_SetBBReg(Adapter, UFWP, bMaskLWord, 0x800);
37145 + rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); // Only clear byte 1 and rewrite.
37146 + rtl8192_setBBreg(dev, rOFDM0_XAAGCCore1, bit_mask, (u32)priv->initgain_backup.xaagccore1);
37147 + rtl8192_setBBreg(dev, rOFDM0_XBAGCCore1, bit_mask, (u32)priv->initgain_backup.xbagccore1);
37148 + rtl8192_setBBreg(dev, rOFDM0_XCAGCCore1, bit_mask, (u32)priv->initgain_backup.xcagccore1);
37149 + rtl8192_setBBreg(dev, rOFDM0_XDAGCCore1, bit_mask, (u32)priv->initgain_backup.xdagccore1);
37150 + bit_mask = bMaskByte2;
37151 + rtl8192_setBBreg(dev, rCCK0_CCA, bit_mask, (u32)priv->initgain_backup.cca);
37152 +
37153 + RT_TRACE(COMP_DIG, "dm_BBInitialGainRestore 0xc50 is %x\n",priv->initgain_backup.xaagccore1);
37154 + RT_TRACE(COMP_DIG, "dm_BBInitialGainRestore 0xc58 is %x\n",priv->initgain_backup.xbagccore1);
37155 + RT_TRACE(COMP_DIG, "dm_BBInitialGainRestore 0xc60 is %x\n",priv->initgain_backup.xcagccore1);
37156 + RT_TRACE(COMP_DIG, "dm_BBInitialGainRestore 0xc68 is %x\n",priv->initgain_backup.xdagccore1);
37157 + RT_TRACE(COMP_DIG, "dm_BBInitialGainRestore 0xa0a is %x\n",priv->initgain_backup.cca);
37158 + //Enable Initial Gain
37159 + //PHY_SetBBReg(Adapter, UFWP, bMaskLWord, 0x100);
37160 + rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1); // Only clear byte 1 and rewrite.
37161 +
37162 +} // dm_BBInitialGainRestore
37163 +
37164 +
37165 +void dm_backup_dynamic_mechanism_state(struct net_device *dev)
37166 +{
37167 + struct r8192_priv *priv = ieee80211_priv(dev);
37168 +
37169 + // Fsync to avoid reset
37170 + priv->bswitch_fsync = false;
37171 + priv->bfsync_processing = false;
37172 + //Backup BB InitialGain
37173 + dm_bb_initialgain_backup(dev);
37174 +
37175 +} // DM_BackupDynamicMechanismState
37176 +
37177 +
37178 +static void dm_bb_initialgain_backup(struct net_device *dev)
37179 +{
37180 + struct r8192_priv *priv = ieee80211_priv(dev);
37181 + u32 bit_mask = bMaskByte0; //Bit0~ Bit6
37182 +
37183 + if(dm_digtable.dig_algorithm == DIG_ALGO_BY_RSSI)
37184 + return;
37185 +
37186 + //PHY_SetBBReg(Adapter, UFWP, bMaskLWord, 0x800);
37187 + rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); // Only clear byte 1 and rewrite.
37188 + priv->initgain_backup.xaagccore1 = (u8)rtl8192_QueryBBReg(dev, rOFDM0_XAAGCCore1, bit_mask);
37189 + priv->initgain_backup.xbagccore1 = (u8)rtl8192_QueryBBReg(dev, rOFDM0_XBAGCCore1, bit_mask);
37190 + priv->initgain_backup.xcagccore1 = (u8)rtl8192_QueryBBReg(dev, rOFDM0_XCAGCCore1, bit_mask);
37191 + priv->initgain_backup.xdagccore1 = (u8)rtl8192_QueryBBReg(dev, rOFDM0_XDAGCCore1, bit_mask);
37192 + bit_mask = bMaskByte2;
37193 + priv->initgain_backup.cca = (u8)rtl8192_QueryBBReg(dev, rCCK0_CCA, bit_mask);
37194 +
37195 + RT_TRACE(COMP_DIG, "BBInitialGainBackup 0xc50 is %x\n",priv->initgain_backup.xaagccore1);
37196 + RT_TRACE(COMP_DIG, "BBInitialGainBackup 0xc58 is %x\n",priv->initgain_backup.xbagccore1);
37197 + RT_TRACE(COMP_DIG, "BBInitialGainBackup 0xc60 is %x\n",priv->initgain_backup.xcagccore1);
37198 + RT_TRACE(COMP_DIG, "BBInitialGainBackup 0xc68 is %x\n",priv->initgain_backup.xdagccore1);
37199 + RT_TRACE(COMP_DIG, "BBInitialGainBackup 0xa0a is %x\n",priv->initgain_backup.cca);
37200 +
37201 +} // dm_BBInitialGainBakcup
37202 +
37203 +#endif
37204 +/*-----------------------------------------------------------------------------
37205 + * Function: dm_change_dynamic_initgain_thresh()
37206 + *
37207 + * Overview:
37208 + *
37209 + * Input: NONE
37210 + *
37211 + * Output: NONE
37212 + *
37213 + * Return: NONE
37214 + *
37215 + * Revised History:
37216 + * When Who Remark
37217 + * 05/29/2008 amy Create Version 0 porting from windows code.
37218 + *
37219 + *---------------------------------------------------------------------------*/
37220 +void dm_change_dynamic_initgain_thresh(struct net_device *dev, u32 dm_type, u32 dm_value)
37221 +{
37222 + if (dm_type == DIG_TYPE_THRESH_HIGH)
37223 + {
37224 + dm_digtable.rssi_high_thresh = dm_value;
37225 + }
37226 + else if (dm_type == DIG_TYPE_THRESH_LOW)
37227 + {
37228 + dm_digtable.rssi_low_thresh = dm_value;
37229 + }
37230 + else if (dm_type == DIG_TYPE_THRESH_HIGHPWR_HIGH)
37231 + {
37232 + dm_digtable.rssi_high_power_highthresh = dm_value;
37233 + }
37234 + else if (dm_type == DIG_TYPE_THRESH_HIGHPWR_HIGH)
37235 + {
37236 + dm_digtable.rssi_high_power_highthresh = dm_value;
37237 + }
37238 + else if (dm_type == DIG_TYPE_ENABLE)
37239 + {
37240 + dm_digtable.dig_state = DM_STA_DIG_MAX;
37241 + dm_digtable.dig_enable_flag = true;
37242 + }
37243 + else if (dm_type == DIG_TYPE_DISABLE)
37244 + {
37245 + dm_digtable.dig_state = DM_STA_DIG_MAX;
37246 + dm_digtable.dig_enable_flag = false;
37247 + }
37248 + else if (dm_type == DIG_TYPE_DBG_MODE)
37249 + {
37250 + if(dm_value >= DM_DBG_MAX)
37251 + dm_value = DM_DBG_OFF;
37252 + dm_digtable.dbg_mode = (u8)dm_value;
37253 + }
37254 + else if (dm_type == DIG_TYPE_RSSI)
37255 + {
37256 + if(dm_value > 100)
37257 + dm_value = 30;
37258 + dm_digtable.rssi_val = (long)dm_value;
37259 + }
37260 + else if (dm_type == DIG_TYPE_ALGORITHM)
37261 + {
37262 + if (dm_value >= DIG_ALGO_MAX)
37263 + dm_value = DIG_ALGO_BY_FALSE_ALARM;
37264 + if(dm_digtable.dig_algorithm != (u8)dm_value)
37265 + dm_digtable.dig_algorithm_switch = 1;
37266 + dm_digtable.dig_algorithm = (u8)dm_value;
37267 + }
37268 + else if (dm_type == DIG_TYPE_BACKOFF)
37269 + {
37270 + if(dm_value > 30)
37271 + dm_value = 30;
37272 + dm_digtable.backoff_val = (u8)dm_value;
37273 + }
37274 + else if(dm_type == DIG_TYPE_RX_GAIN_MIN)
37275 + {
37276 + if(dm_value == 0)
37277 + dm_value = 0x1;
37278 + dm_digtable.rx_gain_range_min = (u8)dm_value;
37279 + }
37280 + else if(dm_type == DIG_TYPE_RX_GAIN_MAX)
37281 + {
37282 + if(dm_value > 0x50)
37283 + dm_value = 0x50;
37284 + dm_digtable.rx_gain_range_max = (u8)dm_value;
37285 + }
37286 +} /* DM_ChangeDynamicInitGainThresh */
37287 +
37288 +
37289 +/*-----------------------------------------------------------------------------
37290 + * Function: dm_dig_init()
37291 + *
37292 + * Overview: Set DIG scheme init value.
37293 + *
37294 + * Input: NONE
37295 + *
37296 + * Output: NONE
37297 + *
37298 + * Return: NONE
37299 + *
37300 + * Revised History:
37301 + * When Who Remark
37302 + * 05/15/2008 amy Create Version 0 porting from windows code.
37303 + *
37304 + *---------------------------------------------------------------------------*/
37305 +static void dm_dig_init(struct net_device *dev)
37306 +{
37307 + struct r8192_priv *priv = ieee80211_priv(dev);
37308 + /* 2007/10/05 MH Disable DIG scheme now. Not tested. */
37309 + dm_digtable.dig_enable_flag = true;
37310 + dm_digtable.dig_algorithm = DIG_ALGO_BY_RSSI;
37311 + dm_digtable.dbg_mode = DM_DBG_OFF; //off=by real rssi value, on=by DM_DigTable.Rssi_val for new dig
37312 + dm_digtable.dig_algorithm_switch = 0;
37313 +
37314 + /* 2007/10/04 MH Define init gain threshol. */
37315 + dm_digtable.dig_state = DM_STA_DIG_MAX;
37316 + dm_digtable.dig_highpwr_state = DM_STA_DIG_MAX;
37317 + dm_digtable.initialgain_lowerbound_state = false;
37318 +
37319 + dm_digtable.rssi_low_thresh = DM_DIG_THRESH_LOW;
37320 + dm_digtable.rssi_high_thresh = DM_DIG_THRESH_HIGH;
37321 +
37322 + dm_digtable.rssi_high_power_lowthresh = DM_DIG_HIGH_PWR_THRESH_LOW;
37323 + dm_digtable.rssi_high_power_highthresh = DM_DIG_HIGH_PWR_THRESH_HIGH;
37324 +
37325 + dm_digtable.rssi_val = 50; //for new dig debug rssi value
37326 + dm_digtable.backoff_val = DM_DIG_BACKOFF;
37327 + dm_digtable.rx_gain_range_max = DM_DIG_MAX;
37328 + if(priv->CustomerID == RT_CID_819x_Netcore)
37329 + dm_digtable.rx_gain_range_min = DM_DIG_MIN_Netcore;
37330 + else
37331 + dm_digtable.rx_gain_range_min = DM_DIG_MIN;
37332 +
37333 +} /* dm_dig_init */
37334 +
37335 +
37336 +/*-----------------------------------------------------------------------------
37337 + * Function: dm_ctrl_initgain_byrssi()
37338 + *
37339 + * Overview: Driver must monitor RSSI and notify firmware to change initial
37340 + * gain according to different threshold. BB team provide the
37341 + * suggested solution.
37342 + *
37343 + * Input: struct net_device *dev
37344 + *
37345 + * Output: NONE
37346 + *
37347 + * Return: NONE
37348 + *
37349 + * Revised History:
37350 + * When Who Remark
37351 + * 05/27/2008 amy Create Version 0 porting from windows code.
37352 + *---------------------------------------------------------------------------*/
37353 +static void dm_ctrl_initgain_byrssi(struct net_device *dev)
37354 +{
37355 +
37356 + if (dm_digtable.dig_enable_flag == false)
37357 + return;
37358 +
37359 + if(dm_digtable.dig_algorithm == DIG_ALGO_BY_FALSE_ALARM)
37360 + dm_ctrl_initgain_byrssi_by_fwfalse_alarm(dev);
37361 + else if(dm_digtable.dig_algorithm == DIG_ALGO_BY_RSSI)
37362 + dm_ctrl_initgain_byrssi_by_driverrssi(dev);
37363 + else
37364 + return;
37365 +}
37366 +
37367 +
37368 +static void dm_ctrl_initgain_byrssi_by_driverrssi(
37369 + struct net_device *dev)
37370 +{
37371 + struct r8192_priv *priv = ieee80211_priv(dev);
37372 + u8 i;
37373 + static u8 fw_dig=0;
37374 +
37375 + if (dm_digtable.dig_enable_flag == false)
37376 + return;
37377 +
37378 + //DbgPrint("Dig by Sw Rssi \n");
37379 + if(dm_digtable.dig_algorithm_switch) // if swithed algorithm, we have to disable FW Dig.
37380 + fw_dig = 0;
37381 + if(fw_dig <= 3) // execute several times to make sure the FW Dig is disabled
37382 + {// FW DIG Off
37383 + for(i=0; i<3; i++)
37384 + rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); // Only clear byte 1 and rewrite.
37385 + fw_dig++;
37386 + dm_digtable.dig_state = DM_STA_DIG_OFF; //fw dig off.
37387 + }
37388 +
37389 + if(priv->ieee80211->state == IEEE80211_LINKED)
37390 + dm_digtable.cur_connect_state = DIG_CONNECT;
37391 + else
37392 + dm_digtable.cur_connect_state = DIG_DISCONNECT;
37393 +
37394 + //DbgPrint("DM_DigTable.PreConnectState = %d, DM_DigTable.CurConnectState = %d \n",
37395 + //DM_DigTable.PreConnectState, DM_DigTable.CurConnectState);
37396 +
37397 + if(dm_digtable.dbg_mode == DM_DBG_OFF)
37398 + dm_digtable.rssi_val = priv->undecorated_smoothed_pwdb;
37399 + //DbgPrint("DM_DigTable.Rssi_val = %d \n", DM_DigTable.Rssi_val);
37400 + dm_initial_gain(dev);
37401 + dm_pd_th(dev);
37402 + dm_cs_ratio(dev);
37403 + if(dm_digtable.dig_algorithm_switch)
37404 + dm_digtable.dig_algorithm_switch = 0;
37405 + dm_digtable.pre_connect_state = dm_digtable.cur_connect_state;
37406 +
37407 +} /* dm_CtrlInitGainByRssi */
37408 +
37409 +static void dm_ctrl_initgain_byrssi_by_fwfalse_alarm(
37410 + struct net_device *dev)
37411 +{
37412 + struct r8192_priv *priv = ieee80211_priv(dev);
37413 + static u32 reset_cnt = 0;
37414 + u8 i;
37415 +
37416 + if (dm_digtable.dig_enable_flag == false)
37417 + return;
37418 +
37419 + if(dm_digtable.dig_algorithm_switch)
37420 + {
37421 + dm_digtable.dig_state = DM_STA_DIG_MAX;
37422 + // Fw DIG On.
37423 + for(i=0; i<3; i++)
37424 + rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1); // Only clear byte 1 and rewrite.
37425 + dm_digtable.dig_algorithm_switch = 0;
37426 + }
37427 +
37428 + if (priv->ieee80211->state != IEEE80211_LINKED)
37429 + return;
37430 +
37431 + // For smooth, we can not change DIG state.
37432 + if ((priv->undecorated_smoothed_pwdb > dm_digtable.rssi_low_thresh) &&
37433 + (priv->undecorated_smoothed_pwdb < dm_digtable.rssi_high_thresh))
37434 + {
37435 + return;
37436 + }
37437 + //DbgPrint("Dig by Fw False Alarm\n");
37438 + //if (DM_DigTable.Dig_State == DM_STA_DIG_OFF)
37439 + /*DbgPrint("DIG Check\n\r RSSI=%d LOW=%d HIGH=%d STATE=%d",
37440 + pHalData->UndecoratedSmoothedPWDB, DM_DigTable.RssiLowThresh,
37441 + DM_DigTable.RssiHighThresh, DM_DigTable.Dig_State);*/
37442 + /* 1. When RSSI decrease, We have to judge if it is smaller than a treshold
37443 + and then execute below step. */
37444 + if ((priv->undecorated_smoothed_pwdb <= dm_digtable.rssi_low_thresh))
37445 + {
37446 + /* 2008/02/05 MH When we execute silent reset, the DIG PHY parameters
37447 + will be reset to init value. We must prevent the condition. */
37448 + if (dm_digtable.dig_state == DM_STA_DIG_OFF &&
37449 + (priv->reset_count == reset_cnt))
37450 + {
37451 + return;
37452 + }
37453 + else
37454 + {
37455 + reset_cnt = priv->reset_count;
37456 + }
37457 +
37458 + // If DIG is off, DIG high power state must reset.
37459 + dm_digtable.dig_highpwr_state = DM_STA_DIG_MAX;
37460 + dm_digtable.dig_state = DM_STA_DIG_OFF;
37461 +
37462 + // 1.1 DIG Off.
37463 + rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); // Only clear byte 1 and rewrite.
37464 +
37465 + // 1.2 Set initial gain.
37466 + write_nic_byte(dev, rOFDM0_XAAGCCore1, 0x17);
37467 + write_nic_byte(dev, rOFDM0_XBAGCCore1, 0x17);
37468 + write_nic_byte(dev, rOFDM0_XCAGCCore1, 0x17);
37469 + write_nic_byte(dev, rOFDM0_XDAGCCore1, 0x17);
37470 +
37471 + // 1.3 Lower PD_TH for OFDM.
37472 + if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
37473 + {
37474 + /* 2008/01/11 MH 40MHZ 90/92 register are not the same. */
37475 + // 2008/02/05 MH SD3-Jerry 92U/92E PD_TH are the same.
37476 + #ifdef RTL8190P
37477 + write_nic_byte(dev, rOFDM0_RxDetector1, 0x40);
37478 + #else
37479 + write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x00);
37480 + #endif
37481 + /*else if (priv->card_8192 == HARDWARE_TYPE_RTL8190P)
37482 + write_nic_byte(pAdapter, rOFDM0_RxDetector1, 0x40);
37483 + */
37484 + //else if (pAdapter->HardwareType == HARDWARE_TYPE_RTL8192E)
37485 +
37486 +
37487 + //else
37488 + //PlatformEFIOWrite1Byte(pAdapter, rOFDM0_RxDetector1, 0x40);
37489 + }
37490 + else
37491 + write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);
37492 +
37493 + // 1.4 Lower CS ratio for CCK.
37494 + write_nic_byte(dev, 0xa0a, 0x08);
37495 +
37496 + // 1.5 Higher EDCCA.
37497 + //PlatformEFIOWrite4Byte(pAdapter, rOFDM0_ECCAThreshold, 0x325);
37498 + return;
37499 +
37500 + }
37501 +
37502 + /* 2. When RSSI increase, We have to judge if it is larger than a treshold
37503 + and then execute below step. */
37504 + if ((priv->undecorated_smoothed_pwdb >= dm_digtable.rssi_high_thresh) )
37505 + {
37506 + u8 reset_flag = 0;
37507 +
37508 + if (dm_digtable.dig_state == DM_STA_DIG_ON &&
37509 + (priv->reset_count == reset_cnt))
37510 + {
37511 + dm_ctrl_initgain_byrssi_highpwr(dev);
37512 + return;
37513 + }
37514 + else
37515 + {
37516 + if (priv->reset_count != reset_cnt)
37517 + reset_flag = 1;
37518 +
37519 + reset_cnt = priv->reset_count;
37520 + }
37521 +
37522 + dm_digtable.dig_state = DM_STA_DIG_ON;
37523 + //DbgPrint("DIG ON\n\r");
37524 +
37525 + // 2.1 Set initial gain.
37526 + // 2008/02/26 MH SD3-Jerry suggest to prevent dirty environment.
37527 + if (reset_flag == 1)
37528 + {
37529 + write_nic_byte(dev, rOFDM0_XAAGCCore1, 0x2c);
37530 + write_nic_byte(dev, rOFDM0_XBAGCCore1, 0x2c);
37531 + write_nic_byte(dev, rOFDM0_XCAGCCore1, 0x2c);
37532 + write_nic_byte(dev, rOFDM0_XDAGCCore1, 0x2c);
37533 + }
37534 + else
37535 + {
37536 + write_nic_byte(dev, rOFDM0_XAAGCCore1, 0x20);
37537 + write_nic_byte(dev, rOFDM0_XBAGCCore1, 0x20);
37538 + write_nic_byte(dev, rOFDM0_XCAGCCore1, 0x20);
37539 + write_nic_byte(dev, rOFDM0_XDAGCCore1, 0x20);
37540 + }
37541 +
37542 + // 2.2 Higher PD_TH for OFDM.
37543 + if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
37544 + {
37545 + /* 2008/01/11 MH 40MHZ 90/92 register are not the same. */
37546 + // 2008/02/05 MH SD3-Jerry 92U/92E PD_TH are the same.
37547 + #ifdef RTL8190P
37548 + write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);
37549 + #else
37550 + write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x20);
37551 + #endif
37552 + /*
37553 + else if (priv->card_8192 == HARDWARE_TYPE_RTL8190P)
37554 + write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);
37555 + */
37556 + //else if (pAdapter->HardwareType == HARDWARE_TYPE_RTL8192E)
37557 +
37558 + //else
37559 + //PlatformEFIOWrite1Byte(pAdapter, rOFDM0_RxDetector1, 0x42);
37560 + }
37561 + else
37562 + write_nic_byte(dev, rOFDM0_RxDetector1, 0x44);
37563 +
37564 + // 2.3 Higher CS ratio for CCK.
37565 + write_nic_byte(dev, 0xa0a, 0xcd);
37566 +
37567 + // 2.4 Lower EDCCA.
37568 + /* 2008/01/11 MH 90/92 series are the same. */
37569 + //PlatformEFIOWrite4Byte(pAdapter, rOFDM0_ECCAThreshold, 0x346);
37570 +
37571 + // 2.5 DIG On.
37572 + rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1); // Only clear byte 1 and rewrite.
37573 +
37574 + }
37575 +
37576 + dm_ctrl_initgain_byrssi_highpwr(dev);
37577 +
37578 +} /* dm_CtrlInitGainByRssi */
37579 +
37580 +
37581 +/*-----------------------------------------------------------------------------
37582 + * Function: dm_ctrl_initgain_byrssi_highpwr()
37583 + *
37584 + * Overview:
37585 + *
37586 + * Input: NONE
37587 + *
37588 + * Output: NONE
37589 + *
37590 + * Return: NONE
37591 + *
37592 + * Revised History:
37593 + * When Who Remark
37594 + * 05/28/2008 amy Create Version 0 porting from windows code.
37595 + *
37596 + *---------------------------------------------------------------------------*/
37597 +static void dm_ctrl_initgain_byrssi_highpwr(
37598 + struct net_device * dev)
37599 +{
37600 + struct r8192_priv *priv = ieee80211_priv(dev);
37601 + static u32 reset_cnt_highpwr = 0;
37602 +
37603 + // For smooth, we can not change high power DIG state in the range.
37604 + if ((priv->undecorated_smoothed_pwdb > dm_digtable.rssi_high_power_lowthresh) &&
37605 + (priv->undecorated_smoothed_pwdb < dm_digtable.rssi_high_power_highthresh))
37606 + {
37607 + return;
37608 + }
37609 +
37610 + /* 3. When RSSI >75% or <70%, it is a high power issue. We have to judge if
37611 + it is larger than a treshold and then execute below step. */
37612 + // 2008/02/05 MH SD3-Jerry Modify PD_TH for high power issue.
37613 + if (priv->undecorated_smoothed_pwdb >= dm_digtable.rssi_high_power_highthresh)
37614 + {
37615 + if (dm_digtable.dig_highpwr_state == DM_STA_DIG_ON &&
37616 + (priv->reset_count == reset_cnt_highpwr))
37617 + return;
37618 + else
37619 + dm_digtable.dig_highpwr_state = DM_STA_DIG_ON;
37620 +
37621 + // 3.1 Higher PD_TH for OFDM for high power state.
37622 + if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
37623 + {
37624 + #ifdef RTL8190P
37625 + write_nic_byte(dev, rOFDM0_RxDetector1, 0x41);
37626 + #else
37627 + write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x10);
37628 + #endif
37629 +
37630 + /*else if (priv->card_8192 == HARDWARE_TYPE_RTL8190P)
37631 + write_nic_byte(dev, rOFDM0_RxDetector1, 0x41);
37632 + */
37633 +
37634 + }
37635 + else
37636 + write_nic_byte(dev, rOFDM0_RxDetector1, 0x43);
37637 + }
37638 + else
37639 + {
37640 + if (dm_digtable.dig_highpwr_state == DM_STA_DIG_OFF&&
37641 + (priv->reset_count == reset_cnt_highpwr))
37642 + return;
37643 + else
37644 + dm_digtable.dig_highpwr_state = DM_STA_DIG_OFF;
37645 +
37646 + if (priv->undecorated_smoothed_pwdb < dm_digtable.rssi_high_power_lowthresh &&
37647 + priv->undecorated_smoothed_pwdb >= dm_digtable.rssi_high_thresh)
37648 + {
37649 + // 3.2 Recover PD_TH for OFDM for normal power region.
37650 + if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
37651 + {
37652 + #ifdef RTL8190P
37653 + write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);
37654 + #else
37655 + write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x20);
37656 + #endif
37657 + /*else if (priv->card_8192 == HARDWARE_TYPE_RTL8190P)
37658 + write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);
37659 + */
37660 +
37661 + }
37662 + else
37663 + write_nic_byte(dev, rOFDM0_RxDetector1, 0x44);
37664 + }
37665 + }
37666 +
37667 + reset_cnt_highpwr = priv->reset_count;
37668 +
37669 +} /* dm_CtrlInitGainByRssiHighPwr */
37670 +
37671 +
37672 +static void dm_initial_gain(
37673 + struct net_device * dev)
37674 +{
37675 + struct r8192_priv *priv = ieee80211_priv(dev);
37676 + u8 initial_gain=0;
37677 + static u8 initialized=0, force_write=0;
37678 + static u32 reset_cnt=0;
37679 +
37680 + if(dm_digtable.dig_algorithm_switch)
37681 + {
37682 + initialized = 0;
37683 + reset_cnt = 0;
37684 + }
37685 +
37686 + if(dm_digtable.pre_connect_state == dm_digtable.cur_connect_state)
37687 + {
37688 + if(dm_digtable.cur_connect_state == DIG_CONNECT)
37689 + {
37690 + if((dm_digtable.rssi_val+10-dm_digtable.backoff_val) > dm_digtable.rx_gain_range_max)
37691 + dm_digtable.cur_ig_value = dm_digtable.rx_gain_range_max;
37692 + else if((dm_digtable.rssi_val+10-dm_digtable.backoff_val) < dm_digtable.rx_gain_range_min)
37693 + dm_digtable.cur_ig_value = dm_digtable.rx_gain_range_min;
37694 + else
37695 + dm_digtable.cur_ig_value = dm_digtable.rssi_val+10-dm_digtable.backoff_val;
37696 + }
37697 + else //current state is disconnected
37698 + {
37699 + if(dm_digtable.cur_ig_value == 0)
37700 + dm_digtable.cur_ig_value = priv->DefaultInitialGain[0];
37701 + else
37702 + dm_digtable.cur_ig_value = dm_digtable.pre_ig_value;
37703 + }
37704 + }
37705 + else // disconnected -> connected or connected -> disconnected
37706 + {
37707 + dm_digtable.cur_ig_value = priv->DefaultInitialGain[0];
37708 + dm_digtable.pre_ig_value = 0;
37709 + }
37710 + //DbgPrint("DM_DigTable.CurIGValue = 0x%x, DM_DigTable.PreIGValue = 0x%x\n", DM_DigTable.CurIGValue, DM_DigTable.PreIGValue);
37711 +
37712 + // if silent reset happened, we should rewrite the values back
37713 + if(priv->reset_count != reset_cnt)
37714 + {
37715 + force_write = 1;
37716 + reset_cnt = priv->reset_count;
37717 + }
37718 +
37719 + if(dm_digtable.pre_ig_value != read_nic_byte(dev, rOFDM0_XAAGCCore1))
37720 + force_write = 1;
37721 +
37722 + {
37723 + if((dm_digtable.pre_ig_value != dm_digtable.cur_ig_value)
37724 + || !initialized || force_write)
37725 + {
37726 + initial_gain = (u8)dm_digtable.cur_ig_value;
37727 + //DbgPrint("Write initial gain = 0x%x\n", initial_gain);
37728 + // Set initial gain.
37729 + write_nic_byte(dev, rOFDM0_XAAGCCore1, initial_gain);
37730 + write_nic_byte(dev, rOFDM0_XBAGCCore1, initial_gain);
37731 + write_nic_byte(dev, rOFDM0_XCAGCCore1, initial_gain);
37732 + write_nic_byte(dev, rOFDM0_XDAGCCore1, initial_gain);
37733 + dm_digtable.pre_ig_value = dm_digtable.cur_ig_value;
37734 + initialized = 1;
37735 + force_write = 0;
37736 + }
37737 + }
37738 +}
37739 +
37740 +static void dm_pd_th(
37741 + struct net_device * dev)
37742 +{
37743 + struct r8192_priv *priv = ieee80211_priv(dev);
37744 + static u8 initialized=0, force_write=0;
37745 + static u32 reset_cnt = 0;
37746 +
37747 + if(dm_digtable.dig_algorithm_switch)
37748 + {
37749 + initialized = 0;
37750 + reset_cnt = 0;
37751 + }
37752 +
37753 + if(dm_digtable.pre_connect_state == dm_digtable.cur_connect_state)
37754 + {
37755 + if(dm_digtable.cur_connect_state == DIG_CONNECT)
37756 + {
37757 + if (dm_digtable.rssi_val >= dm_digtable.rssi_high_power_highthresh)
37758 + dm_digtable.curpd_thstate = DIG_PD_AT_HIGH_POWER;
37759 + else if ((dm_digtable.rssi_val <= dm_digtable.rssi_low_thresh))
37760 + dm_digtable.curpd_thstate = DIG_PD_AT_LOW_POWER;
37761 + else if ((dm_digtable.rssi_val >= dm_digtable.rssi_high_thresh) &&
37762 + (dm_digtable.rssi_val < dm_digtable.rssi_high_power_lowthresh))
37763 + dm_digtable.curpd_thstate = DIG_PD_AT_NORMAL_POWER;
37764 + else
37765 + dm_digtable.curpd_thstate = dm_digtable.prepd_thstate;
37766 + }
37767 + else
37768 + {
37769 + dm_digtable.curpd_thstate = DIG_PD_AT_LOW_POWER;
37770 + }
37771 + }
37772 + else // disconnected -> connected or connected -> disconnected
37773 + {
37774 + dm_digtable.curpd_thstate = DIG_PD_AT_LOW_POWER;
37775 + }
37776 +
37777 + // if silent reset happened, we should rewrite the values back
37778 + if(priv->reset_count != reset_cnt)
37779 + {
37780 + force_write = 1;
37781 + reset_cnt = priv->reset_count;
37782 + }
37783 +
37784 + {
37785 + if((dm_digtable.prepd_thstate != dm_digtable.curpd_thstate) ||
37786 + (initialized<=3) || force_write)
37787 + {
37788 + //DbgPrint("Write PD_TH state = %d\n", DM_DigTable.CurPD_THState);
37789 + if(dm_digtable.curpd_thstate == DIG_PD_AT_LOW_POWER)
37790 + {
37791 + // Lower PD_TH for OFDM.
37792 + if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
37793 + {
37794 + /* 2008/01/11 MH 40MHZ 90/92 register are not the same. */
37795 + // 2008/02/05 MH SD3-Jerry 92U/92E PD_TH are the same.
37796 + #ifdef RTL8190P
37797 + write_nic_byte(dev, rOFDM0_RxDetector1, 0x40);
37798 + #else
37799 + write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x00);
37800 + #endif
37801 + /*else if (priv->card_8192 == HARDWARE_TYPE_RTL8190P)
37802 + write_nic_byte(dev, rOFDM0_RxDetector1, 0x40);
37803 + */
37804 + }
37805 + else
37806 + write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);
37807 + }
37808 + else if(dm_digtable.curpd_thstate == DIG_PD_AT_NORMAL_POWER)
37809 + {
37810 + // Higher PD_TH for OFDM.
37811 + if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
37812 + {
37813 + /* 2008/01/11 MH 40MHZ 90/92 register are not the same. */
37814 + // 2008/02/05 MH SD3-Jerry 92U/92E PD_TH are the same.
37815 + #ifdef RTL8190P
37816 + write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);
37817 + #else
37818 + write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x20);
37819 + #endif
37820 + /*else if (priv->card_8192 == HARDWARE_TYPE_RTL8190P)
37821 + write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);
37822 + */
37823 + }
37824 + else
37825 + write_nic_byte(dev, rOFDM0_RxDetector1, 0x44);
37826 + }
37827 + else if(dm_digtable.curpd_thstate == DIG_PD_AT_HIGH_POWER)
37828 + {
37829 + // Higher PD_TH for OFDM for high power state.
37830 + if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
37831 + {
37832 + #ifdef RTL8190P
37833 + write_nic_byte(dev, rOFDM0_RxDetector1, 0x41);
37834 + #else
37835 + write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x10);
37836 + #endif
37837 + /*else if (priv->card_8192 == HARDWARE_TYPE_RTL8190P)
37838 + write_nic_byte(dev, rOFDM0_RxDetector1, 0x41);
37839 + */
37840 + }
37841 + else
37842 + write_nic_byte(dev, rOFDM0_RxDetector1, 0x43);
37843 + }
37844 + dm_digtable.prepd_thstate = dm_digtable.curpd_thstate;
37845 + if(initialized <= 3)
37846 + initialized++;
37847 + force_write = 0;
37848 + }
37849 + }
37850 +}
37851 +
37852 +static void dm_cs_ratio(
37853 + struct net_device * dev)
37854 +{
37855 + struct r8192_priv *priv = ieee80211_priv(dev);
37856 + static u8 initialized=0,force_write=0;
37857 + static u32 reset_cnt = 0;
37858 +
37859 + if(dm_digtable.dig_algorithm_switch)
37860 + {
37861 + initialized = 0;
37862 + reset_cnt = 0;
37863 + }
37864 +
37865 + if(dm_digtable.pre_connect_state == dm_digtable.cur_connect_state)
37866 + {
37867 + if(dm_digtable.cur_connect_state == DIG_CONNECT)
37868 + {
37869 + if ((dm_digtable.rssi_val <= dm_digtable.rssi_low_thresh))
37870 + dm_digtable.curcs_ratio_state = DIG_CS_RATIO_LOWER;
37871 + else if ((dm_digtable.rssi_val >= dm_digtable.rssi_high_thresh) )
37872 + dm_digtable.curcs_ratio_state = DIG_CS_RATIO_HIGHER;
37873 + else
37874 + dm_digtable.curcs_ratio_state = dm_digtable.precs_ratio_state;
37875 + }
37876 + else
37877 + {
37878 + dm_digtable.curcs_ratio_state = DIG_CS_RATIO_LOWER;
37879 + }
37880 + }
37881 + else // disconnected -> connected or connected -> disconnected
37882 + {
37883 + dm_digtable.curcs_ratio_state = DIG_CS_RATIO_LOWER;
37884 + }
37885 +
37886 + // if silent reset happened, we should rewrite the values back
37887 + if(priv->reset_count != reset_cnt)
37888 + {
37889 + force_write = 1;
37890 + reset_cnt = priv->reset_count;
37891 + }
37892 +
37893 +
37894 + {
37895 + if((dm_digtable.precs_ratio_state != dm_digtable.curcs_ratio_state) ||
37896 + !initialized || force_write)
37897 + {
37898 + //DbgPrint("Write CS_ratio state = %d\n", DM_DigTable.CurCS_ratioState);
37899 + if(dm_digtable.curcs_ratio_state == DIG_CS_RATIO_LOWER)
37900 + {
37901 + // Lower CS ratio for CCK.
37902 + write_nic_byte(dev, 0xa0a, 0x08);
37903 + }
37904 + else if(dm_digtable.curcs_ratio_state == DIG_CS_RATIO_HIGHER)
37905 + {
37906 + // Higher CS ratio for CCK.
37907 + write_nic_byte(dev, 0xa0a, 0xcd);
37908 + }
37909 + dm_digtable.precs_ratio_state = dm_digtable.curcs_ratio_state;
37910 + initialized = 1;
37911 + force_write = 0;
37912 + }
37913 + }
37914 +}
37915 +
37916 +void dm_init_edca_turbo(struct net_device *dev)
37917 +{
37918 + struct r8192_priv *priv = ieee80211_priv(dev);
37919 +
37920 + priv->bcurrent_turbo_EDCA = false;
37921 + priv->ieee80211->bis_any_nonbepkts = false;
37922 + priv->bis_cur_rdlstate = false;
37923 +} // dm_init_edca_turbo
37924 +
37925 +#if 1
37926 +static void dm_check_edca_turbo(
37927 + struct net_device * dev)
37928 +{
37929 + struct r8192_priv *priv = ieee80211_priv(dev);
37930 + PRT_HIGH_THROUGHPUT pHTInfo = priv->ieee80211->pHTInfo;
37931 + //PSTA_QOS pStaQos = pMgntInfo->pStaQos;
37932 +
37933 + // Keep past Tx/Rx packet count for RT-to-RT EDCA turbo.
37934 + static unsigned long lastTxOkCnt = 0;
37935 + static unsigned long lastRxOkCnt = 0;
37936 + unsigned long curTxOkCnt = 0;
37937 + unsigned long curRxOkCnt = 0;
37938 +
37939 + //
37940 + // Do not be Turbo if it's under WiFi config and Qos Enabled, because the EDCA parameters
37941 + // should follow the settings from QAP. By Bruce, 2007-12-07.
37942 + //
37943 + #if 1
37944 + if(priv->ieee80211->state != IEEE80211_LINKED)
37945 + goto dm_CheckEdcaTurbo_EXIT;
37946 + #endif
37947 + // We do not turn on EDCA turbo mode for some AP that has IOT issue
37948 + if(priv->ieee80211->pHTInfo->IOTAction & HT_IOT_ACT_DISABLE_EDCA_TURBO)
37949 + goto dm_CheckEdcaTurbo_EXIT;
37950 +
37951 +// printk("========>%s():bis_any_nonbepkts is %d\n",__FUNCTION__,priv->bis_any_nonbepkts);
37952 + // Check the status for current condition.
37953 + if(!priv->ieee80211->bis_any_nonbepkts)
37954 + {
37955 + curTxOkCnt = priv->stats.txbytesunicast - lastTxOkCnt;
37956 + curRxOkCnt = priv->stats.rxbytesunicast - lastRxOkCnt;
37957 + // For RT-AP, we needs to turn it on when Rx>Tx
37958 + if(curRxOkCnt > 4*curTxOkCnt)
37959 + {
37960 + //printk("%s():curRxOkCnt > 4*curTxOkCnt\n");
37961 + if(!priv->bis_cur_rdlstate || !priv->bcurrent_turbo_EDCA)
37962 + {
37963 + write_nic_dword(dev, EDCAPARA_BE, edca_setting_DL[pHTInfo->IOTPeer]);
37964 + priv->bis_cur_rdlstate = true;
37965 + }
37966 + }
37967 + else
37968 + {
37969 +
37970 + //printk("%s():curRxOkCnt < 4*curTxOkCnt\n");
37971 + if(priv->bis_cur_rdlstate || !priv->bcurrent_turbo_EDCA)
37972 + {
37973 + write_nic_dword(dev, EDCAPARA_BE, edca_setting_UL[pHTInfo->IOTPeer]);
37974 + priv->bis_cur_rdlstate = false;
37975 + }
37976 +
37977 + }
37978 +
37979 + priv->bcurrent_turbo_EDCA = true;
37980 + }
37981 + else
37982 + {
37983 + //
37984 + // Turn Off EDCA turbo here.
37985 + // Restore original EDCA according to the declaration of AP.
37986 + //
37987 + if(priv->bcurrent_turbo_EDCA)
37988 + {
37989 +
37990 + {
37991 + u8 u1bAIFS;
37992 + u32 u4bAcParam;
37993 + struct ieee80211_qos_parameters *qos_parameters = &priv->ieee80211->current_network.qos_data.parameters;
37994 + u8 mode = priv->ieee80211->mode;
37995 +
37996 + // For Each time updating EDCA parameter, reset EDCA turbo mode status.
37997 + dm_init_edca_turbo(dev);
37998 + u1bAIFS = qos_parameters->aifs[0] * ((mode&(IEEE_G|IEEE_N_24G)) ?9:20) + aSifsTime;
37999 + u4bAcParam = ((((u32)(qos_parameters->tx_op_limit[0]))<< AC_PARAM_TXOP_LIMIT_OFFSET)|
38000 + (((u32)(qos_parameters->cw_max[0]))<< AC_PARAM_ECW_MAX_OFFSET)|
38001 + (((u32)(qos_parameters->cw_min[0]))<< AC_PARAM_ECW_MIN_OFFSET)|
38002 + ((u32)u1bAIFS << AC_PARAM_AIFS_OFFSET));
38003 + printk("===>u4bAcParam:%x, ", u4bAcParam);
38004 + //write_nic_dword(dev, WDCAPARA_ADD[i], u4bAcParam);
38005 + write_nic_dword(dev, EDCAPARA_BE, u4bAcParam);
38006 +
38007 + // Check ACM bit.
38008 + // If it is set, immediately set ACM control bit to downgrading AC for passing WMM testplan. Annie, 2005-12-13.
38009 + {
38010 + // TODO: Modified this part and try to set acm control in only 1 IO processing!!
38011 +
38012 + PACI_AIFSN pAciAifsn = (PACI_AIFSN)&(qos_parameters->aifs[0]);
38013 + u8 AcmCtrl = read_nic_byte( dev, AcmHwCtrl );
38014 + if( pAciAifsn->f.ACM )
38015 + { // ACM bit is 1.
38016 + AcmCtrl |= AcmHw_BeqEn;
38017 + }
38018 + else
38019 + { // ACM bit is 0.
38020 + AcmCtrl &= (~AcmHw_BeqEn);
38021 + }
38022 +
38023 + RT_TRACE( COMP_QOS,"SetHwReg8190pci(): [HW_VAR_ACM_CTRL] Write 0x%X\n", AcmCtrl ) ;
38024 + write_nic_byte(dev, AcmHwCtrl, AcmCtrl );
38025 + }
38026 + }
38027 + priv->bcurrent_turbo_EDCA = false;
38028 + }
38029 + }
38030 +
38031 +
38032 +dm_CheckEdcaTurbo_EXIT:
38033 + // Set variables for next time.
38034 + priv->ieee80211->bis_any_nonbepkts = false;
38035 + lastTxOkCnt = priv->stats.txbytesunicast;
38036 + lastRxOkCnt = priv->stats.rxbytesunicast;
38037 +} // dm_CheckEdcaTurbo
38038 +#endif
38039 +
38040 +static void dm_init_ctstoself(struct net_device * dev)
38041 +{
38042 + struct r8192_priv *priv = ieee80211_priv((struct net_device *)dev);
38043 +
38044 + priv->ieee80211->bCTSToSelfEnable = TRUE;
38045 + priv->ieee80211->CTSToSelfTH = CTSToSelfTHVal;
38046 +}
38047 +
38048 +static void dm_ctstoself(struct net_device *dev)
38049 +{
38050 + struct r8192_priv *priv = ieee80211_priv((struct net_device *)dev);
38051 + PRT_HIGH_THROUGHPUT pHTInfo = priv->ieee80211->pHTInfo;
38052 + static unsigned long lastTxOkCnt = 0;
38053 + static unsigned long lastRxOkCnt = 0;
38054 + unsigned long curTxOkCnt = 0;
38055 + unsigned long curRxOkCnt = 0;
38056 +
38057 + if(priv->ieee80211->bCTSToSelfEnable != TRUE)
38058 + {
38059 + pHTInfo->IOTAction &= ~HT_IOT_ACT_FORCED_CTS2SELF;
38060 + return;
38061 + }
38062 + /*
38063 + 1. Uplink
38064 + 2. Linksys350/Linksys300N
38065 + 3. <50 disable, >55 enable
38066 + */
38067 +
38068 + if(pHTInfo->IOTPeer == HT_IOT_PEER_BROADCOM)
38069 + {
38070 + curTxOkCnt = priv->stats.txbytesunicast - lastTxOkCnt;
38071 + curRxOkCnt = priv->stats.rxbytesunicast - lastRxOkCnt;
38072 + if(curRxOkCnt > 4*curTxOkCnt) //downlink, disable CTS to self
38073 + {
38074 + pHTInfo->IOTAction &= ~HT_IOT_ACT_FORCED_CTS2SELF;
38075 + //DbgPrint("dm_CTSToSelf() ==> CTS to self disabled -- downlink\n");
38076 + }
38077 + else //uplink
38078 + {
38079 + #if 1
38080 + pHTInfo->IOTAction |= HT_IOT_ACT_FORCED_CTS2SELF;
38081 + #else
38082 + if(priv->undecorated_smoothed_pwdb < priv->ieee80211->CTSToSelfTH) // disable CTS to self
38083 + {
38084 + pHTInfo->IOTAction &= ~HT_IOT_ACT_FORCED_CTS2SELF;
38085 + //DbgPrint("dm_CTSToSelf() ==> CTS to self disabled\n");
38086 + }
38087 + else if(priv->undecorated_smoothed_pwdb >= (priv->ieee80211->CTSToSelfTH+5)) // enable CTS to self
38088 + {
38089 + pHTInfo->IOTAction |= HT_IOT_ACT_FORCED_CTS2SELF;
38090 + //DbgPrint("dm_CTSToSelf() ==> CTS to self enabled\n");
38091 + }
38092 + #endif
38093 + }
38094 +
38095 + lastTxOkCnt = priv->stats.txbytesunicast;
38096 + lastRxOkCnt = priv->stats.rxbytesunicast;
38097 + }
38098 +}
38099 +
38100 +
38101 +#if 0
38102 +/*-----------------------------------------------------------------------------
38103 + * Function: dm_rf_operation_test_callback()
38104 + *
38105 + * Overview: Only for RF operation test now.
38106 + *
38107 + * Input: NONE
38108 + *
38109 + * Output: NONE
38110 + *
38111 + * Return: NONE
38112 + *
38113 + * Revised History:
38114 + * When Who Remark
38115 + * 05/29/2008 amy Create Version 0 porting from windows code.
38116 + *
38117 + *---------------------------------------------------------------------------*/
38118 +void dm_rf_operation_test_callback(unsigned long dev)
38119 +{
38120 +// struct r8192_priv *priv = ieee80211_priv((struct net_device *)dev);
38121 + u8 erfpath;
38122 +
38123 +
38124 + for(erfpath=0; erfpath<4; erfpath++)
38125 + {
38126 + //DbgPrint("Set RF-%d\n\r", eRFPath);
38127 + //PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)eRFPath, 0x2c, bMask12Bits, 0x3d7);
38128 + udelay(100);
38129 + }
38130 +
38131 + {
38132 + //PlatformSetPeriodicTimer(Adapter, &pHalData->RfTest1Timer, 500);
38133 + }
38134 +
38135 + // For test
38136 + {
38137 + //u8 i;
38138 + //PlatformSetPeriodicTimer(Adapter, &pHalData->RfTest1Timer, 500);
38139 +#if 0
38140 + for(i=0; i<50; i++)
38141 + {
38142 + // Write Test
38143 + PHY_SetRFReg(Adapter, RF90_PATH_A, 0x02, bMask12Bits, 0x4d);
38144 + //delay_us(100);
38145 + PHY_SetRFReg(Adapter, RF90_PATH_A, 0x02, bMask12Bits, 0x4f);
38146 + //delay_us(100);
38147 + PHY_SetRFReg(Adapter, RF90_PATH_C, 0x02, bMask12Bits, 0x4d);
38148 + //delay_us(100);
38149 + PHY_SetRFReg(Adapter, RF90_PATH_C, 0x02, bMask12Bits, 0x4f);
38150 + //delay_us(100);
38151 +
38152 +#if 0
38153 + // Read test
38154 + PHY_QueryRFReg(Adapter, RF90_PATH_A, 0x02, bMask12Bits);
38155 + //delay_us(100);
38156 + PHY_QueryRFReg(Adapter, RF90_PATH_A, 0x02, bMask12Bits);
38157 + //delay_us(100);
38158 + PHY_QueryRFReg(Adapter, RF90_PATH_A, 0x12, bMask12Bits);
38159 + //delay_us(100);
38160 + PHY_QueryRFReg(Adapter, RF90_PATH_A, 0x12, bMask12Bits);
38161 + //delay_us(100);
38162 + PHY_QueryRFReg(Adapter, RF90_PATH_A, 0x21, bMask12Bits);
38163 + //delay_us(100);
38164 + PHY_QueryRFReg(Adapter, RF90_PATH_A, 0x21, bMask12Bits);
38165 + //delay_us(100);
38166 +#endif
38167 + }
38168 +#endif
38169 + }
38170 +
38171 +} /* DM_RfOperationTestCallBack */
38172 +#endif
38173 +
38174 +/*-----------------------------------------------------------------------------
38175 + * Function: dm_check_rfctrl_gpio()
38176 + *
38177 + * Overview: Copy 8187B template for 9xseries.
38178 + *
38179 + * Input: NONE
38180 + *
38181 + * Output: NONE
38182 + *
38183 + * Return: NONE
38184 + *
38185 + * Revised History:
38186 + * When Who Remark
38187 + * 05/28/2008 amy Create Version 0 porting from windows code.
38188 + *
38189 + *---------------------------------------------------------------------------*/
38190 +#if 1
38191 +static void dm_check_rfctrl_gpio(struct net_device * dev)
38192 +{
38193 +#ifdef RTL8192E
38194 + struct r8192_priv *priv = ieee80211_priv(dev);
38195 +#endif
38196 +
38197 + // Walk around for DTM test, we will not enable HW - radio on/off because r/w
38198 + // page 1 register before Lextra bus is enabled cause system fails when resuming
38199 + // from S4. 20080218, Emily
38200 +
38201 + // Stop to execute workitem to prevent S3/S4 bug.
38202 +#ifdef RTL8190P
38203 + return;
38204 +#endif
38205 +#ifdef RTL8192U
38206 + return;
38207 +#endif
38208 +#ifdef RTL8192E
38209 + #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
38210 + queue_delayed_work(priv->priv_wq,&priv->gpio_change_rf_wq,0);
38211 + #else
38212 + #if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
38213 + schedule_task(&priv->gpio_change_rf_wq);
38214 + #else
38215 + queue_work(priv->priv_wq,&priv->gpio_change_rf_wq);
38216 + #endif
38217 + #endif
38218 +#endif
38219 +
38220 +} /* dm_CheckRfCtrlGPIO */
38221 +
38222 +#endif
38223 +/*-----------------------------------------------------------------------------
38224 + * Function: dm_check_pbc_gpio()
38225 + *
38226 + * Overview: Check if PBC button is pressed.
38227 + *
38228 + * Input: NONE
38229 + *
38230 + * Output: NONE
38231 + *
38232 + * Return: NONE
38233 + *
38234 + * Revised History:
38235 + * When Who Remark
38236 + * 05/28/2008 amy Create Version 0 porting from windows code.
38237 + *
38238 + *---------------------------------------------------------------------------*/
38239 +static void dm_check_pbc_gpio(struct net_device *dev)
38240 +{
38241 +#ifdef RTL8192U
38242 + struct r8192_priv *priv = ieee80211_priv(dev);
38243 + u8 tmp1byte;
38244 +
38245 +
38246 + tmp1byte = read_nic_byte(dev,GPI);
38247 + if(tmp1byte == 0xff)
38248 + return;
38249 +
38250 + if (tmp1byte&BIT6 || tmp1byte&BIT0)
38251 + {
38252 + // Here we only set bPbcPressed to TRUE
38253 + // After trigger PBC, the variable will be set to FALSE
38254 + RT_TRACE(COMP_IO, "CheckPbcGPIO - PBC is pressed\n");
38255 + priv->bpbc_pressed = true;
38256 + }
38257 +#endif
38258 +
38259 +}
38260 +
38261 +#ifdef RTL8192E
38262 +
38263 +/*-----------------------------------------------------------------------------
38264 + * Function: dm_GPIOChangeRF
38265 + * Overview: PCI will not support workitem call back HW radio on-off control.
38266 + *
38267 + * Input: NONE
38268 + *
38269 + * Output: NONE
38270 + *
38271 + * Return: NONE
38272 + *
38273 + * Revised History:
38274 + * When Who Remark
38275 + * 02/21/2008 MHC Create Version 0.
38276 + *
38277 + *---------------------------------------------------------------------------*/
38278 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
38279 +void dm_gpio_change_rf_callback(struct work_struct *work)
38280 +{
38281 + struct delayed_work *dwork = container_of(work,struct delayed_work,work);
38282 + struct r8192_priv *priv = container_of(dwork,struct r8192_priv,gpio_change_rf_wq);
38283 + struct net_device *dev = priv->ieee80211->dev;
38284 +#else
38285 +extern void dm_gpio_change_rf_callback(struct net_device *dev)
38286 +{
38287 + struct r8192_priv *priv = ieee80211_priv(dev);
38288 +#endif
38289 + u8 tmp1byte;
38290 + RT_RF_POWER_STATE eRfPowerStateToSet;
38291 + bool bActuallySet = false;
38292 +
38293 + bActuallySet=false;
38294 +
38295 + if(!priv->up)
38296 + {
38297 + RT_TRACE((COMP_INIT | COMP_POWER | COMP_RF),"dm_gpio_change_rf_callback(): Callback function breaks out!!\n");
38298 + }
38299 + else
38300 + {
38301 + // 0x108 GPIO input register is read only
38302 + //set 0x108 B1= 1: RF-ON; 0: RF-OFF.
38303 + tmp1byte = read_nic_byte(dev,GPI);
38304 +
38305 + eRfPowerStateToSet = (tmp1byte&BIT1) ? eRfOn : eRfOff;
38306 +
38307 + if( (priv->bHwRadioOff == true) && (eRfPowerStateToSet == eRfOn))
38308 + {
38309 + RT_TRACE(COMP_RF, "gpiochangeRF - HW Radio ON\n");
38310 +
38311 + priv->bHwRadioOff = false;
38312 + bActuallySet = true;
38313 + }
38314 + else if ( (priv->bHwRadioOff == false) && (eRfPowerStateToSet == eRfOff))
38315 + {
38316 + RT_TRACE(COMP_RF, "gpiochangeRF - HW Radio OFF\n");
38317 + priv->bHwRadioOff = true;
38318 + bActuallySet = true;
38319 + }
38320 +
38321 + if(bActuallySet)
38322 + {
38323 + priv->bHwRfOffAction = 1;
38324 + MgntActSet_RF_State(dev, eRfPowerStateToSet, RF_CHANGE_BY_HW);
38325 + //DrvIFIndicateCurrentPhyStatus(pAdapter);
38326 +
38327 + }
38328 + else
38329 + {
38330 + msleep(2000);
38331 + }
38332 +
38333 + }
38334 +
38335 +} /* dm_GPIOChangeRF */
38336 +
38337 +#endif
38338 +/*-----------------------------------------------------------------------------
38339 + * Function: DM_RFPathCheckWorkItemCallBack()
38340 + *
38341 + * Overview: Check if Current RF RX path is enabled
38342 + *
38343 + * Input: NONE
38344 + *
38345 + * Output: NONE
38346 + *
38347 + * Return: NONE
38348 + *
38349 + * Revised History:
38350 + * When Who Remark
38351 + * 01/30/2008 MHC Create Version 0.
38352 + *
38353 + *---------------------------------------------------------------------------*/
38354 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
38355 +void dm_rf_pathcheck_workitemcallback(struct work_struct *work)
38356 +{
38357 + struct delayed_work *dwork = container_of(work,struct delayed_work,work);
38358 + struct r8192_priv *priv = container_of(dwork,struct r8192_priv,rfpath_check_wq);
38359 + struct net_device *dev =priv->ieee80211->dev;
38360 +#else
38361 +extern void dm_rf_pathcheck_workitemcallback(struct net_device *dev)
38362 +{
38363 + struct r8192_priv *priv = ieee80211_priv(dev);
38364 +#endif
38365 + //bool bactually_set = false;
38366 + u8 rfpath = 0, i;
38367 +
38368 +
38369 + /* 2008/01/30 MH After discussing with SD3 Jerry, 0xc04/0xd04 register will
38370 + always be the same. We only read 0xc04 now. */
38371 + rfpath = read_nic_byte(dev, 0xc04);
38372 +
38373 + // Check Bit 0-3, it means if RF A-D is enabled.
38374 + for (i = 0; i < RF90_PATH_MAX; i++)
38375 + {
38376 + if (rfpath & (0x01<<i))
38377 + priv->brfpath_rxenable[i] = 1;
38378 + else
38379 + priv->brfpath_rxenable[i] = 0;
38380 + }
38381 + if(!DM_RxPathSelTable.Enable)
38382 + return;
38383 +
38384 + dm_rxpath_sel_byrssi(dev);
38385 +} /* DM_RFPathCheckWorkItemCallBack */
38386 +
38387 +static void dm_init_rxpath_selection(struct net_device * dev)
38388 +{
38389 + u8 i;
38390 + struct r8192_priv *priv = ieee80211_priv(dev);
38391 + DM_RxPathSelTable.Enable = 1; //default enabled
38392 + DM_RxPathSelTable.SS_TH_low = RxPathSelection_SS_TH_low;
38393 + DM_RxPathSelTable.diff_TH = RxPathSelection_diff_TH;
38394 + if(priv->CustomerID == RT_CID_819x_Netcore)
38395 + DM_RxPathSelTable.cck_method = CCK_Rx_Version_2;
38396 + else
38397 + DM_RxPathSelTable.cck_method = CCK_Rx_Version_1;
38398 + DM_RxPathSelTable.DbgMode = DM_DBG_OFF;
38399 + DM_RxPathSelTable.disabledRF = 0;
38400 + for(i=0; i<4; i++)
38401 + {
38402 + DM_RxPathSelTable.rf_rssi[i] = 50;
38403 + DM_RxPathSelTable.cck_pwdb_sta[i] = -64;
38404 + DM_RxPathSelTable.rf_enable_rssi_th[i] = 100;
38405 + }
38406 +}
38407 +
38408 +static void dm_rxpath_sel_byrssi(struct net_device * dev)
38409 +{
38410 + struct r8192_priv *priv = ieee80211_priv(dev);
38411 + u8 i, max_rssi_index=0, min_rssi_index=0, sec_rssi_index=0, rf_num=0;
38412 + u8 tmp_max_rssi=0, tmp_min_rssi=0, tmp_sec_rssi=0;
38413 + u8 cck_default_Rx=0x2; //RF-C
38414 + u8 cck_optional_Rx=0x3;//RF-D
38415 + long tmp_cck_max_pwdb=0, tmp_cck_min_pwdb=0, tmp_cck_sec_pwdb=0;
38416 + u8 cck_rx_ver2_max_index=0, cck_rx_ver2_min_index=0, cck_rx_ver2_sec_index=0;
38417 + u8 cur_rf_rssi;
38418 + long cur_cck_pwdb;
38419 + static u8 disabled_rf_cnt=0, cck_Rx_Path_initialized=0;
38420 + u8 update_cck_rx_path;
38421 +
38422 + if(priv->rf_type != RF_2T4R)
38423 + return;
38424 +
38425 + if(!cck_Rx_Path_initialized)
38426 + {
38427 + DM_RxPathSelTable.cck_Rx_path = (read_nic_byte(dev, 0xa07)&0xf);
38428 + cck_Rx_Path_initialized = 1;
38429 + }
38430 +
38431 + DM_RxPathSelTable.disabledRF = 0xf;
38432 + DM_RxPathSelTable.disabledRF &=~ (read_nic_byte(dev, 0xc04));
38433 +
38434 + if(priv->ieee80211->mode == WIRELESS_MODE_B)
38435 + {
38436 + DM_RxPathSelTable.cck_method = CCK_Rx_Version_2; //pure B mode, fixed cck version2
38437 + //DbgPrint("Pure B mode, use cck rx version2 \n");
38438 + }
38439 +
38440 + //decide max/sec/min rssi index
38441 + for (i=0; i<RF90_PATH_MAX; i++)
38442 + {
38443 + if(!DM_RxPathSelTable.DbgMode)
38444 + DM_RxPathSelTable.rf_rssi[i] = priv->stats.rx_rssi_percentage[i];
38445 +
38446 + if(priv->brfpath_rxenable[i])
38447 + {
38448 + rf_num++;
38449 + cur_rf_rssi = DM_RxPathSelTable.rf_rssi[i];
38450 +
38451 + if(rf_num == 1) // find first enabled rf path and the rssi values
38452 + { //initialize, set all rssi index to the same one
38453 + max_rssi_index = min_rssi_index = sec_rssi_index = i;
38454 + tmp_max_rssi = tmp_min_rssi = tmp_sec_rssi = cur_rf_rssi;
38455 + }
38456 + else if(rf_num == 2)
38457 + { // we pick up the max index first, and let sec and min to be the same one
38458 + if(cur_rf_rssi >= tmp_max_rssi)
38459 + {
38460 + tmp_max_rssi = cur_rf_rssi;
38461 + max_rssi_index = i;
38462 + }
38463 + else
38464 + {
38465 + tmp_sec_rssi = tmp_min_rssi = cur_rf_rssi;
38466 + sec_rssi_index = min_rssi_index = i;
38467 + }
38468 + }
38469 + else
38470 + {
38471 + if(cur_rf_rssi > tmp_max_rssi)
38472 + {
38473 + tmp_sec_rssi = tmp_max_rssi;
38474 + sec_rssi_index = max_rssi_index;
38475 + tmp_max_rssi = cur_rf_rssi;
38476 + max_rssi_index = i;
38477 + }
38478 + else if(cur_rf_rssi == tmp_max_rssi)
38479 + { // let sec and min point to the different index
38480 + tmp_sec_rssi = cur_rf_rssi;
38481 + sec_rssi_index = i;
38482 + }
38483 + else if((cur_rf_rssi < tmp_max_rssi) &&(cur_rf_rssi > tmp_sec_rssi))
38484 + {
38485 + tmp_sec_rssi = cur_rf_rssi;
38486 + sec_rssi_index = i;
38487 + }
38488 + else if(cur_rf_rssi == tmp_sec_rssi)
38489 + {
38490 + if(tmp_sec_rssi == tmp_min_rssi)
38491 + { // let sec and min point to the different index
38492 + tmp_sec_rssi = cur_rf_rssi;
38493 + sec_rssi_index = i;
38494 + }
38495 + else
38496 + {
38497 + // This case we don't need to set any index
38498 + }
38499 + }
38500 + else if((cur_rf_rssi < tmp_sec_rssi) && (cur_rf_rssi > tmp_min_rssi))
38501 + {
38502 + // This case we don't need to set any index
38503 + }
38504 + else if(cur_rf_rssi == tmp_min_rssi)
38505 + {
38506 + if(tmp_sec_rssi == tmp_min_rssi)
38507 + { // let sec and min point to the different index
38508 + tmp_min_rssi = cur_rf_rssi;
38509 + min_rssi_index = i;
38510 + }
38511 + else
38512 + {
38513 + // This case we don't need to set any index
38514 + }
38515 + }
38516 + else if(cur_rf_rssi < tmp_min_rssi)
38517 + {
38518 + tmp_min_rssi = cur_rf_rssi;
38519 + min_rssi_index = i;
38520 + }
38521 + }
38522 + }
38523 + }
38524 +
38525 + rf_num = 0;
38526 + // decide max/sec/min cck pwdb index
38527 + if(DM_RxPathSelTable.cck_method == CCK_Rx_Version_2)
38528 + {
38529 + for (i=0; i<RF90_PATH_MAX; i++)
38530 + {
38531 + if(priv->brfpath_rxenable[i])
38532 + {
38533 + rf_num++;
38534 + cur_cck_pwdb = DM_RxPathSelTable.cck_pwdb_sta[i];
38535 +
38536 + if(rf_num == 1) // find first enabled rf path and the rssi values
38537 + { //initialize, set all rssi index to the same one
38538 + cck_rx_ver2_max_index = cck_rx_ver2_min_index = cck_rx_ver2_sec_index = i;
38539 + tmp_cck_max_pwdb = tmp_cck_min_pwdb = tmp_cck_sec_pwdb = cur_cck_pwdb;
38540 + }
38541 + else if(rf_num == 2)
38542 + { // we pick up the max index first, and let sec and min to be the same one
38543 + if(cur_cck_pwdb >= tmp_cck_max_pwdb)
38544 + {
38545 + tmp_cck_max_pwdb = cur_cck_pwdb;
38546 + cck_rx_ver2_max_index = i;
38547 + }
38548 + else
38549 + {
38550 + tmp_cck_sec_pwdb = tmp_cck_min_pwdb = cur_cck_pwdb;
38551 + cck_rx_ver2_sec_index = cck_rx_ver2_min_index = i;
38552 + }
38553 + }
38554 + else
38555 + {
38556 + if(cur_cck_pwdb > tmp_cck_max_pwdb)
38557 + {
38558 + tmp_cck_sec_pwdb = tmp_cck_max_pwdb;
38559 + cck_rx_ver2_sec_index = cck_rx_ver2_max_index;
38560 + tmp_cck_max_pwdb = cur_cck_pwdb;
38561 + cck_rx_ver2_max_index = i;
38562 + }
38563 + else if(cur_cck_pwdb == tmp_cck_max_pwdb)
38564 + { // let sec and min point to the different index
38565 + tmp_cck_sec_pwdb = cur_cck_pwdb;
38566 + cck_rx_ver2_sec_index = i;
38567 + }
38568 + else if((cur_cck_pwdb < tmp_cck_max_pwdb) &&(cur_cck_pwdb > tmp_cck_sec_pwdb))
38569 + {
38570 + tmp_cck_sec_pwdb = cur_cck_pwdb;
38571 + cck_rx_ver2_sec_index = i;
38572 + }
38573 + else if(cur_cck_pwdb == tmp_cck_sec_pwdb)
38574 + {
38575 + if(tmp_cck_sec_pwdb == tmp_cck_min_pwdb)
38576 + { // let sec and min point to the different index
38577 + tmp_cck_sec_pwdb = cur_cck_pwdb;
38578 + cck_rx_ver2_sec_index = i;
38579 + }
38580 + else
38581 + {
38582 + // This case we don't need to set any index
38583 + }
38584 + }
38585 + else if((cur_cck_pwdb < tmp_cck_sec_pwdb) && (cur_cck_pwdb > tmp_cck_min_pwdb))
38586 + {
38587 + // This case we don't need to set any index
38588 + }
38589 + else if(cur_cck_pwdb == tmp_cck_min_pwdb)
38590 + {
38591 + if(tmp_cck_sec_pwdb == tmp_cck_min_pwdb)
38592 + { // let sec and min point to the different index
38593 + tmp_cck_min_pwdb = cur_cck_pwdb;
38594 + cck_rx_ver2_min_index = i;
38595 + }
38596 + else
38597 + {
38598 + // This case we don't need to set any index
38599 + }
38600 + }
38601 + else if(cur_cck_pwdb < tmp_cck_min_pwdb)
38602 + {
38603 + tmp_cck_min_pwdb = cur_cck_pwdb;
38604 + cck_rx_ver2_min_index = i;
38605 + }
38606 + }
38607 +
38608 + }
38609 + }
38610 + }
38611 +
38612 +
38613 + // Set CCK Rx path
38614 + // reg0xA07[3:2]=cck default rx path, reg0xa07[1:0]=cck optional rx path.
38615 + update_cck_rx_path = 0;
38616 + if(DM_RxPathSelTable.cck_method == CCK_Rx_Version_2)
38617 + {
38618 + cck_default_Rx = cck_rx_ver2_max_index;
38619 + cck_optional_Rx = cck_rx_ver2_sec_index;
38620 + if(tmp_cck_max_pwdb != -64)
38621 + update_cck_rx_path = 1;
38622 + }
38623 +
38624 + if(tmp_min_rssi < DM_RxPathSelTable.SS_TH_low && disabled_rf_cnt < 2)
38625 + {
38626 + if((tmp_max_rssi - tmp_min_rssi) >= DM_RxPathSelTable.diff_TH)
38627 + {
38628 + //record the enabled rssi threshold
38629 + DM_RxPathSelTable.rf_enable_rssi_th[min_rssi_index] = tmp_max_rssi+5;
38630 + //disable the BB Rx path, OFDM
38631 + rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0x1<<min_rssi_index, 0x0); // 0xc04[3:0]
38632 + rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0x1<<min_rssi_index, 0x0); // 0xd04[3:0]
38633 + disabled_rf_cnt++;
38634 + }
38635 + if(DM_RxPathSelTable.cck_method == CCK_Rx_Version_1)
38636 + {
38637 + cck_default_Rx = max_rssi_index;
38638 + cck_optional_Rx = sec_rssi_index;
38639 + if(tmp_max_rssi)
38640 + update_cck_rx_path = 1;
38641 + }
38642 + }
38643 +
38644 + if(update_cck_rx_path)
38645 + {
38646 + DM_RxPathSelTable.cck_Rx_path = (cck_default_Rx<<2)|(cck_optional_Rx);
38647 + rtl8192_setBBreg(dev, rCCK0_AFESetting, 0x0f000000, DM_RxPathSelTable.cck_Rx_path);
38648 + }
38649 +
38650 + if(DM_RxPathSelTable.disabledRF)
38651 + {
38652 + for(i=0; i<4; i++)
38653 + {
38654 + if((DM_RxPathSelTable.disabledRF>>i) & 0x1) //disabled rf
38655 + {
38656 + if(tmp_max_rssi >= DM_RxPathSelTable.rf_enable_rssi_th[i])
38657 + {
38658 + //enable the BB Rx path
38659 + //DbgPrint("RF-%d is enabled. \n", 0x1<<i);
38660 + rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0x1<<i, 0x1); // 0xc04[3:0]
38661 + rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0x1<<i, 0x1); // 0xd04[3:0]
38662 + DM_RxPathSelTable.rf_enable_rssi_th[i] = 100;
38663 + disabled_rf_cnt--;
38664 + }
38665 + }
38666 + }
38667 + }
38668 +}
38669 +
38670 +/*-----------------------------------------------------------------------------
38671 + * Function: dm_check_rx_path_selection()
38672 + *
38673 + * Overview: Call a workitem to check current RXRF path and Rx Path selection by RSSI.
38674 + *
38675 + * Input: NONE
38676 + *
38677 + * Output: NONE
38678 + *
38679 + * Return: NONE
38680 + *
38681 + * Revised History:
38682 + * When Who Remark
38683 + * 05/28/2008 amy Create Version 0 porting from windows code.
38684 + *
38685 + *---------------------------------------------------------------------------*/
38686 +static void dm_check_rx_path_selection(struct net_device *dev)
38687 +{
38688 + struct r8192_priv *priv = ieee80211_priv(dev);
38689 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
38690 + queue_delayed_work(priv->priv_wq,&priv->rfpath_check_wq,0);
38691 +#else
38692 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
38693 + schedule_task(&priv->rfpath_check_wq);
38694 +#else
38695 + queue_work(priv->priv_wq,&priv->rfpath_check_wq);
38696 +#endif
38697 +#endif
38698 +} /* dm_CheckRxRFPath */
38699 +
38700 +
38701 +static void dm_init_fsync (struct net_device *dev)
38702 +{
38703 + struct r8192_priv *priv = ieee80211_priv(dev);
38704 +
38705 + priv->ieee80211->fsync_time_interval = 500;
38706 + priv->ieee80211->fsync_rate_bitmap = 0x0f000800;
38707 + priv->ieee80211->fsync_rssi_threshold = 30;
38708 +#ifdef RTL8190P
38709 + priv->ieee80211->bfsync_enable = true;
38710 +#else
38711 + priv->ieee80211->bfsync_enable = false;
38712 +#endif
38713 + priv->ieee80211->fsync_multiple_timeinterval = 3;
38714 + priv->ieee80211->fsync_firstdiff_ratethreshold= 100;
38715 + priv->ieee80211->fsync_seconddiff_ratethreshold= 200;
38716 + priv->ieee80211->fsync_state = Default_Fsync;
38717 + priv->framesyncMonitor = 1; // current default 0xc38 monitor on
38718 +
38719 + init_timer(&priv->fsync_timer);
38720 + priv->fsync_timer.data = (unsigned long)dev;
38721 + priv->fsync_timer.function = dm_fsync_timer_callback;
38722 +}
38723 +
38724 +
38725 +static void dm_deInit_fsync(struct net_device *dev)
38726 +{
38727 + struct r8192_priv *priv = ieee80211_priv(dev);
38728 + del_timer_sync(&priv->fsync_timer);
38729 +}
38730 +
38731 +void dm_fsync_timer_callback(unsigned long data)
38732 +{
38733 + struct net_device *dev = (struct net_device *)data;
38734 + struct r8192_priv *priv = ieee80211_priv((struct net_device *)data);
38735 + u32 rate_index, rate_count = 0, rate_count_diff=0;
38736 + bool bSwitchFromCountDiff = false;
38737 + bool bDoubleTimeInterval = false;
38738 +
38739 + if( priv->ieee80211->state == IEEE80211_LINKED &&
38740 + priv->ieee80211->bfsync_enable &&
38741 + (priv->ieee80211->pHTInfo->IOTAction & HT_IOT_ACT_CDD_FSYNC))
38742 + {
38743 + // Count rate 54, MCS [7], [12, 13, 14, 15]
38744 + u32 rate_bitmap;
38745 + for(rate_index = 0; rate_index <= 27; rate_index++)
38746 + {
38747 + rate_bitmap = 1 << rate_index;
38748 + if(priv->ieee80211->fsync_rate_bitmap & rate_bitmap)
38749 + rate_count+= priv->stats.received_rate_histogram[1][rate_index];
38750 + }
38751 +
38752 + if(rate_count < priv->rate_record)
38753 + rate_count_diff = 0xffffffff - rate_count + priv->rate_record;
38754 + else
38755 + rate_count_diff = rate_count - priv->rate_record;
38756 + if(rate_count_diff < priv->rateCountDiffRecord)
38757 + {
38758 +
38759 + u32 DiffNum = priv->rateCountDiffRecord - rate_count_diff;
38760 + // Contiune count
38761 + if(DiffNum >= priv->ieee80211->fsync_seconddiff_ratethreshold)
38762 + priv->ContiuneDiffCount++;
38763 + else
38764 + priv->ContiuneDiffCount = 0;
38765 +
38766 + // Contiune count over
38767 + if(priv->ContiuneDiffCount >=2)
38768 + {
38769 + bSwitchFromCountDiff = true;
38770 + priv->ContiuneDiffCount = 0;
38771 + }
38772 + }
38773 + else
38774 + {
38775 + // Stop contiune count
38776 + priv->ContiuneDiffCount = 0;
38777 + }
38778 +
38779 + //If Count diff <= FsyncRateCountThreshold
38780 + if(rate_count_diff <= priv->ieee80211->fsync_firstdiff_ratethreshold)
38781 + {
38782 + bSwitchFromCountDiff = true;
38783 + priv->ContiuneDiffCount = 0;
38784 + }
38785 + priv->rate_record = rate_count;
38786 + priv->rateCountDiffRecord = rate_count_diff;
38787 + RT_TRACE(COMP_HALDM, "rateRecord %d rateCount %d, rateCountdiff %d bSwitchFsync %d\n", priv->rate_record, rate_count, rate_count_diff , priv->bswitch_fsync);
38788 + // if we never receive those mcs rate and rssi > 30 % then switch fsyn
38789 + if(priv->undecorated_smoothed_pwdb > priv->ieee80211->fsync_rssi_threshold && bSwitchFromCountDiff)
38790 + {
38791 + bDoubleTimeInterval = true;
38792 + priv->bswitch_fsync = !priv->bswitch_fsync;
38793 + if(priv->bswitch_fsync)
38794 + {
38795 + #ifdef RTL8190P
38796 + write_nic_byte(dev,0xC36, 0x00);
38797 + #else
38798 + write_nic_byte(dev,0xC36, 0x1c);
38799 + #endif
38800 + write_nic_byte(dev, 0xC3e, 0x90);
38801 + }
38802 + else
38803 + {
38804 + #ifdef RTL8190P
38805 + write_nic_byte(dev, 0xC36, 0x40);
38806 + #else
38807 + write_nic_byte(dev, 0xC36, 0x5c);
38808 + #endif
38809 + write_nic_byte(dev, 0xC3e, 0x96);
38810 + }
38811 + }
38812 + else if(priv->undecorated_smoothed_pwdb <= priv->ieee80211->fsync_rssi_threshold)
38813 + {
38814 + if(priv->bswitch_fsync)
38815 + {
38816 + priv->bswitch_fsync = false;
38817 + #ifdef RTL8190P
38818 + write_nic_byte(dev, 0xC36, 0x40);
38819 + #else
38820 + write_nic_byte(dev, 0xC36, 0x5c);
38821 + #endif
38822 + write_nic_byte(dev, 0xC3e, 0x96);
38823 + }
38824 + }
38825 + if(bDoubleTimeInterval){
38826 + if(timer_pending(&priv->fsync_timer))
38827 + del_timer_sync(&priv->fsync_timer);
38828 + priv->fsync_timer.expires = jiffies + MSECS(priv->ieee80211->fsync_time_interval*priv->ieee80211->fsync_multiple_timeinterval);
38829 + add_timer(&priv->fsync_timer);
38830 + }
38831 + else{
38832 + if(timer_pending(&priv->fsync_timer))
38833 + del_timer_sync(&priv->fsync_timer);
38834 + priv->fsync_timer.expires = jiffies + MSECS(priv->ieee80211->fsync_time_interval);
38835 + add_timer(&priv->fsync_timer);
38836 + }
38837 + }
38838 + else
38839 + {
38840 + // Let Register return to default value;
38841 + if(priv->bswitch_fsync)
38842 + {
38843 + priv->bswitch_fsync = false;
38844 + #ifdef RTL8190P
38845 + write_nic_byte(dev, 0xC36, 0x40);
38846 + #else
38847 + write_nic_byte(dev, 0xC36, 0x5c);
38848 + #endif
38849 + write_nic_byte(dev, 0xC3e, 0x96);
38850 + }
38851 + priv->ContiuneDiffCount = 0;
38852 + #ifdef RTL8190P
38853 + write_nic_dword(dev, rOFDM0_RxDetector2, 0x164052cd);
38854 + #else
38855 + write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c52cd);
38856 + #endif
38857 + }
38858 + RT_TRACE(COMP_HALDM, "ContiuneDiffCount %d\n", priv->ContiuneDiffCount);
38859 + RT_TRACE(COMP_HALDM, "rateRecord %d rateCount %d, rateCountdiff %d bSwitchFsync %d\n", priv->rate_record, rate_count, rate_count_diff , priv->bswitch_fsync);
38860 +}
38861 +
38862 +static void dm_StartHWFsync(struct net_device *dev)
38863 +{
38864 + RT_TRACE(COMP_HALDM, "%s\n", __FUNCTION__);
38865 + write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c12cf);
38866 + write_nic_byte(dev, 0xc3b, 0x41);
38867 +}
38868 +
38869 +static void dm_EndSWFsync(struct net_device *dev)
38870 +{
38871 + struct r8192_priv *priv = ieee80211_priv(dev);
38872 +
38873 + RT_TRACE(COMP_HALDM, "%s\n", __FUNCTION__);
38874 + del_timer_sync(&(priv->fsync_timer));
38875 +
38876 + // Let Register return to default value;
38877 + if(priv->bswitch_fsync)
38878 + {
38879 + priv->bswitch_fsync = false;
38880 +
38881 + #ifdef RTL8190P
38882 + write_nic_byte(dev, 0xC36, 0x40);
38883 + #else
38884 + write_nic_byte(dev, 0xC36, 0x5c);
38885 +#endif
38886 +
38887 + write_nic_byte(dev, 0xC3e, 0x96);
38888 + }
38889 +
38890 + priv->ContiuneDiffCount = 0;
38891 +#ifndef RTL8190P
38892 + write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c52cd);
38893 +#endif
38894 +
38895 +}
38896 +
38897 +static void dm_StartSWFsync(struct net_device *dev)
38898 +{
38899 + struct r8192_priv *priv = ieee80211_priv(dev);
38900 + u32 rateIndex;
38901 + u32 rateBitmap;
38902 +
38903 + RT_TRACE(COMP_HALDM,"%s\n", __FUNCTION__);
38904 + // Initial rate record to zero, start to record.
38905 + priv->rate_record = 0;
38906 + // Initial contiune diff count to zero, start to record.
38907 + priv->ContiuneDiffCount = 0;
38908 + priv->rateCountDiffRecord = 0;
38909 + priv->bswitch_fsync = false;
38910 +
38911 + if(priv->ieee80211->mode == WIRELESS_MODE_N_24G)
38912 + {
38913 + priv->ieee80211->fsync_firstdiff_ratethreshold= 600;
38914 + priv->ieee80211->fsync_seconddiff_ratethreshold = 0xffff;
38915 + }
38916 + else
38917 + {
38918 + priv->ieee80211->fsync_firstdiff_ratethreshold= 200;
38919 + priv->ieee80211->fsync_seconddiff_ratethreshold = 200;
38920 + }
38921 + for(rateIndex = 0; rateIndex <= 27; rateIndex++)
38922 + {
38923 + rateBitmap = 1 << rateIndex;
38924 + if(priv->ieee80211->fsync_rate_bitmap & rateBitmap)
38925 + priv->rate_record += priv->stats.received_rate_histogram[1][rateIndex];
38926 + }
38927 + if(timer_pending(&priv->fsync_timer))
38928 + del_timer_sync(&priv->fsync_timer);
38929 + priv->fsync_timer.expires = jiffies + MSECS(priv->ieee80211->fsync_time_interval);
38930 + add_timer(&priv->fsync_timer);
38931 +
38932 +#ifndef RTL8190P
38933 + write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c12cd);
38934 +#endif
38935 +
38936 +}
38937 +
38938 +static void dm_EndHWFsync(struct net_device *dev)
38939 +{
38940 + RT_TRACE(COMP_HALDM,"%s\n", __FUNCTION__);
38941 + write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c52cd);
38942 + write_nic_byte(dev, 0xc3b, 0x49);
38943 +
38944 +}
38945 +
38946 +void dm_check_fsync(struct net_device *dev)
38947 +{
38948 +#define RegC38_Default 0
38949 +#define RegC38_NonFsync_Other_AP 1
38950 +#define RegC38_Fsync_AP_BCM 2
38951 + struct r8192_priv *priv = ieee80211_priv(dev);
38952 + //u32 framesyncC34;
38953 + static u8 reg_c38_State=RegC38_Default;
38954 + static u32 reset_cnt=0;
38955 +
38956 + RT_TRACE(COMP_HALDM, "RSSI %d TimeInterval %d MultipleTimeInterval %d\n", priv->ieee80211->fsync_rssi_threshold, priv->ieee80211->fsync_time_interval, priv->ieee80211->fsync_multiple_timeinterval);
38957 + RT_TRACE(COMP_HALDM, "RateBitmap 0x%x FirstDiffRateThreshold %d SecondDiffRateThreshold %d\n", priv->ieee80211->fsync_rate_bitmap, priv->ieee80211->fsync_firstdiff_ratethreshold, priv->ieee80211->fsync_seconddiff_ratethreshold);
38958 +
38959 + if( priv->ieee80211->state == IEEE80211_LINKED &&
38960 + (priv->ieee80211->pHTInfo->IOTAction & HT_IOT_ACT_CDD_FSYNC))
38961 + {
38962 + if(priv->ieee80211->bfsync_enable == 0)
38963 + {
38964 + switch(priv->ieee80211->fsync_state)
38965 + {
38966 + case Default_Fsync:
38967 + dm_StartHWFsync(dev);
38968 + priv->ieee80211->fsync_state = HW_Fsync;
38969 + break;
38970 + case SW_Fsync:
38971 + dm_EndSWFsync(dev);
38972 + dm_StartHWFsync(dev);
38973 + priv->ieee80211->fsync_state = HW_Fsync;
38974 + break;
38975 + case HW_Fsync:
38976 + default:
38977 + break;
38978 + }
38979 + }
38980 + else
38981 + {
38982 + switch(priv->ieee80211->fsync_state)
38983 + {
38984 + case Default_Fsync:
38985 + dm_StartSWFsync(dev);
38986 + priv->ieee80211->fsync_state = SW_Fsync;
38987 + break;
38988 + case HW_Fsync:
38989 + dm_EndHWFsync(dev);
38990 + dm_StartSWFsync(dev);
38991 + priv->ieee80211->fsync_state = SW_Fsync;
38992 + break;
38993 + case SW_Fsync:
38994 + default:
38995 + break;
38996 +
38997 + }
38998 + }
38999 + if(priv->framesyncMonitor)
39000 + {
39001 + if(reg_c38_State != RegC38_Fsync_AP_BCM)
39002 + { //For broadcom AP we write different default value
39003 + #ifdef RTL8190P
39004 + write_nic_byte(dev, rOFDM0_RxDetector3, 0x15);
39005 + #else
39006 + write_nic_byte(dev, rOFDM0_RxDetector3, 0x95);
39007 + #endif
39008 +
39009 + reg_c38_State = RegC38_Fsync_AP_BCM;
39010 + }
39011 + }
39012 + }
39013 + else
39014 + {
39015 + switch(priv->ieee80211->fsync_state)
39016 + {
39017 + case HW_Fsync:
39018 + dm_EndHWFsync(dev);
39019 + priv->ieee80211->fsync_state = Default_Fsync;
39020 + break;
39021 + case SW_Fsync:
39022 + dm_EndSWFsync(dev);
39023 + priv->ieee80211->fsync_state = Default_Fsync;
39024 + break;
39025 + case Default_Fsync:
39026 + default:
39027 + break;
39028 + }
39029 +
39030 + if(priv->framesyncMonitor)
39031 + {
39032 + if(priv->ieee80211->state == IEEE80211_LINKED)
39033 + {
39034 + if(priv->undecorated_smoothed_pwdb <= RegC38_TH)
39035 + {
39036 + if(reg_c38_State != RegC38_NonFsync_Other_AP)
39037 + {
39038 + #ifdef RTL8190P
39039 + write_nic_byte(dev, rOFDM0_RxDetector3, 0x10);
39040 + #else
39041 + write_nic_byte(dev, rOFDM0_RxDetector3, 0x90);
39042 + #endif
39043 +
39044 + reg_c38_State = RegC38_NonFsync_Other_AP;
39045 + #if 0//cosa
39046 + if (Adapter->HardwareType == HARDWARE_TYPE_RTL8190P)
39047 + DbgPrint("Fsync is idle, rssi<=35, write 0xc38 = 0x%x \n", 0x10);
39048 + else
39049 + DbgPrint("Fsync is idle, rssi<=35, write 0xc38 = 0x%x \n", 0x90);
39050 + #endif
39051 + }
39052 + }
39053 + else if(priv->undecorated_smoothed_pwdb >= (RegC38_TH+5))
39054 + {
39055 + if(reg_c38_State)
39056 + {
39057 + write_nic_byte(dev, rOFDM0_RxDetector3, priv->framesync);
39058 + reg_c38_State = RegC38_Default;
39059 + //DbgPrint("Fsync is idle, rssi>=40, write 0xc38 = 0x%x \n", pHalData->framesync);
39060 + }
39061 + }
39062 + }
39063 + else
39064 + {
39065 + if(reg_c38_State)
39066 + {
39067 + write_nic_byte(dev, rOFDM0_RxDetector3, priv->framesync);
39068 + reg_c38_State = RegC38_Default;
39069 + //DbgPrint("Fsync is idle, not connected, write 0xc38 = 0x%x \n", pHalData->framesync);
39070 + }
39071 + }
39072 + }
39073 + }
39074 + if(priv->framesyncMonitor)
39075 + {
39076 + if(priv->reset_count != reset_cnt)
39077 + { //After silent reset, the reg_c38_State will be returned to default value
39078 + write_nic_byte(dev, rOFDM0_RxDetector3, priv->framesync);
39079 + reg_c38_State = RegC38_Default;
39080 + reset_cnt = priv->reset_count;
39081 + //DbgPrint("reg_c38_State = 0 for silent reset. \n");
39082 + }
39083 + }
39084 + else
39085 + {
39086 + if(reg_c38_State)
39087 + {
39088 + write_nic_byte(dev, rOFDM0_RxDetector3, priv->framesync);
39089 + reg_c38_State = RegC38_Default;
39090 + //DbgPrint("framesync no monitor, write 0xc38 = 0x%x \n", pHalData->framesync);
39091 + }
39092 + }
39093 +}
39094 +
39095 +#if 0
39096 +/*-----------------------------------------------------------------------------
39097 + * Function: DM_CheckLBusStatus()
39098 + *
39099 + * Overview: For 9x series, we must make sure LBUS is active for IO.
39100 + *
39101 + * Input: NONE
39102 + *
39103 + * Output: NONE
39104 + *
39105 + * Return: NONE
39106 + *
39107 + * Revised History:
39108 + * When Who Remark
39109 + * 02/22/2008 MHC Create Version 0.
39110 + *
39111 + *---------------------------------------------------------------------------*/
39112 +extern s1Byte DM_CheckLBusStatus(IN PADAPTER Adapter)
39113 +{
39114 + PMGNT_INFO pMgntInfo=&Adapter->MgntInfo;
39115 +
39116 +#if (HAL_CODE_BASE & RTL819X)
39117 +
39118 +#if (HAL_CODE_BASE == RTL8192)
39119 +
39120 +#if( DEV_BUS_TYPE==PCI_INTERFACE)
39121 + //return (pMgntInfo->bLbusEnable); // For debug only
39122 + return TRUE;
39123 +#endif
39124 +
39125 +#if( DEV_BUS_TYPE==USB_INTERFACE)
39126 + return TRUE;
39127 +#endif
39128 +
39129 +#endif // #if (HAL_CODE_BASE == RTL8192)
39130 +
39131 +#if (HAL_CODE_BASE == RTL8190)
39132 + return TRUE;
39133 +#endif // #if (HAL_CODE_BASE == RTL8190)
39134 +
39135 +#endif // #if (HAL_CODE_BASE & RTL819X)
39136 +} /* DM_CheckLBusStatus */
39137 +
39138 +#endif
39139 +
39140 +/*-----------------------------------------------------------------------------
39141 + * Function: dm_shadow_init()
39142 + *
39143 + * Overview: Store all NIC MAC/BB register content.
39144 + *
39145 + * Input: NONE
39146 + *
39147 + * Output: NONE
39148 + *
39149 + * Return: NONE
39150 + *
39151 + * Revised History:
39152 + * When Who Remark
39153 + * 05/29/2008 amy Create Version 0 porting from windows code.
39154 + *
39155 + *---------------------------------------------------------------------------*/
39156 +void dm_shadow_init(struct net_device *dev)
39157 +{
39158 + u8 page;
39159 + u16 offset;
39160 +
39161 + for (page = 0; page < 5; page++)
39162 + for (offset = 0; offset < 256; offset++)
39163 + {
39164 + dm_shadow[page][offset] = read_nic_byte(dev, offset+page*256);
39165 + //DbgPrint("P-%d/O-%02x=%02x\r\n", page, offset, DM_Shadow[page][offset]);
39166 + }
39167 +
39168 + for (page = 8; page < 11; page++)
39169 + for (offset = 0; offset < 256; offset++)
39170 + dm_shadow[page][offset] = read_nic_byte(dev, offset+page*256);
39171 +
39172 + for (page = 12; page < 15; page++)
39173 + for (offset = 0; offset < 256; offset++)
39174 + dm_shadow[page][offset] = read_nic_byte(dev, offset+page*256);
39175 +
39176 +} /* dm_shadow_init */
39177 +
39178 +/*---------------------------Define function prototype------------------------*/
39179 +/*-----------------------------------------------------------------------------
39180 + * Function: DM_DynamicTxPower()
39181 + *
39182 + * Overview: Detect Signal strength to control TX Registry
39183 + Tx Power Control For Near/Far Range
39184 + *
39185 + * Input: NONE
39186 + *
39187 + * Output: NONE
39188 + *
39189 + * Return: NONE
39190 + *
39191 + * Revised History:
39192 + * When Who Remark
39193 + * 03/06/2008 Jacken Create Version 0.
39194 + *
39195 + *---------------------------------------------------------------------------*/
39196 +static void dm_init_dynamic_txpower(struct net_device *dev)
39197 +{
39198 + struct r8192_priv *priv = ieee80211_priv(dev);
39199 +
39200 + //Initial TX Power Control for near/far range , add by amy 2008/05/15, porting from windows code.
39201 + priv->ieee80211->bdynamic_txpower_enable = true; //Default to enable Tx Power Control
39202 + priv->bLastDTPFlag_High = false;
39203 + priv->bLastDTPFlag_Low = false;
39204 + priv->bDynamicTxHighPower = false;
39205 + priv->bDynamicTxLowPower = false;
39206 +}
39207 +
39208 +static void dm_dynamic_txpower(struct net_device *dev)
39209 +{
39210 + struct r8192_priv *priv = ieee80211_priv(dev);
39211 + unsigned int txhipower_threshhold=0;
39212 + unsigned int txlowpower_threshold=0;
39213 + if(priv->ieee80211->bdynamic_txpower_enable != true)
39214 + {
39215 + priv->bDynamicTxHighPower = false;
39216 + priv->bDynamicTxLowPower = false;
39217 + return;
39218 + }
39219 + //printk("priv->ieee80211->current_network.unknown_cap_exist is %d ,priv->ieee80211->current_network.broadcom_cap_exist is %d\n",priv->ieee80211->current_network.unknown_cap_exist,priv->ieee80211->current_network.broadcom_cap_exist);
39220 + if((priv->ieee80211->current_network.atheros_cap_exist ) && (priv->ieee80211->mode == IEEE_G)){
39221 + txhipower_threshhold = TX_POWER_ATHEROAP_THRESH_HIGH;
39222 + txlowpower_threshold = TX_POWER_ATHEROAP_THRESH_LOW;
39223 + }
39224 + else
39225 + {
39226 + txhipower_threshhold = TX_POWER_NEAR_FIELD_THRESH_HIGH;
39227 + txlowpower_threshold = TX_POWER_NEAR_FIELD_THRESH_LOW;
39228 + }
39229 +
39230 +// printk("=======>%s(): txhipower_threshhold is %d,txlowpower_threshold is %d\n",__FUNCTION__,txhipower_threshhold,txlowpower_threshold);
39231 +
39232 + RT_TRACE(COMP_TXAGC,"priv->undecorated_smoothed_pwdb = %ld \n" , priv->undecorated_smoothed_pwdb);
39233 +
39234 + if(priv->ieee80211->state == IEEE80211_LINKED)
39235 + {
39236 + if(priv->undecorated_smoothed_pwdb >= txhipower_threshhold)
39237 + {
39238 + priv->bDynamicTxHighPower = true;
39239 + priv->bDynamicTxLowPower = false;
39240 + }
39241 + else
39242 + {
39243 + // high power state check
39244 + if(priv->undecorated_smoothed_pwdb < txlowpower_threshold && priv->bDynamicTxHighPower == true)
39245 + {
39246 + priv->bDynamicTxHighPower = false;
39247 + }
39248 + // low power state check
39249 + if(priv->undecorated_smoothed_pwdb < 35)
39250 + {
39251 + priv->bDynamicTxLowPower = true;
39252 + }
39253 + else if(priv->undecorated_smoothed_pwdb >= 40)
39254 + {
39255 + priv->bDynamicTxLowPower = false;
39256 + }
39257 + }
39258 + }
39259 + else
39260 + {
39261 + //pHalData->bTXPowerCtrlforNearFarRange = !pHalData->bTXPowerCtrlforNearFarRange;
39262 + priv->bDynamicTxHighPower = false;
39263 + priv->bDynamicTxLowPower = false;
39264 + }
39265 +
39266 + if( (priv->bDynamicTxHighPower != priv->bLastDTPFlag_High ) ||
39267 + (priv->bDynamicTxLowPower != priv->bLastDTPFlag_Low ) )
39268 + {
39269 + RT_TRACE(COMP_TXAGC,"SetTxPowerLevel8190() channel = %d \n" , priv->ieee80211->current_network.channel);
39270 +
39271 +
39272 + rtl8192_phy_setTxPower(dev,priv->ieee80211->current_network.channel);
39273 +
39274 + }
39275 + priv->bLastDTPFlag_High = priv->bDynamicTxHighPower;
39276 + priv->bLastDTPFlag_Low = priv->bDynamicTxLowPower;
39277 +
39278 +} /* dm_dynamic_txpower */
39279 +
39280 +//added by vivi, for read tx rate and retrycount
39281 +static void dm_check_txrateandretrycount(struct net_device * dev)
39282 +{
39283 + struct r8192_priv *priv = ieee80211_priv(dev);
39284 + struct ieee80211_device* ieee = priv->ieee80211;
39285 + //for 11n tx rate
39286 +// priv->stats.CurrentShowTxate = read_nic_byte(dev, Current_Tx_Rate_Reg);
39287 + ieee->softmac_stats.CurrentShowTxate = read_nic_byte(dev, Current_Tx_Rate_Reg);
39288 + //printk("=============>tx_rate_reg:%x\n", ieee->softmac_stats.CurrentShowTxate);
39289 + //for initial tx rate
39290 +// priv->stats.last_packet_rate = read_nic_byte(dev, Initial_Tx_Rate_Reg);
39291 + ieee->softmac_stats.last_packet_rate = read_nic_byte(dev ,Initial_Tx_Rate_Reg);
39292 + //for tx tx retry count
39293 +// priv->stats.txretrycount = read_nic_dword(dev, Tx_Retry_Count_Reg);
39294 + ieee->softmac_stats.txretrycount = read_nic_dword(dev, Tx_Retry_Count_Reg);
39295 +}
39296 +
39297 +static void dm_send_rssi_tofw(struct net_device *dev)
39298 +{
39299 + DCMD_TXCMD_T tx_cmd;
39300 + struct r8192_priv *priv = ieee80211_priv(dev);
39301 +
39302 + // If we test chariot, we should stop the TX command ?
39303 + // Because 92E will always silent reset when we send tx command. We use register
39304 + // 0x1e0(byte) to botify driver.
39305 + write_nic_byte(dev, DRIVER_RSSI, (u8)priv->undecorated_smoothed_pwdb);
39306 + return;
39307 +#if 1
39308 + tx_cmd.Op = TXCMD_SET_RX_RSSI;
39309 + tx_cmd.Length = 4;
39310 + tx_cmd.Value = priv->undecorated_smoothed_pwdb;
39311 +
39312 + cmpk_message_handle_tx(dev, (u8*)&tx_cmd,
39313 + DESC_PACKET_TYPE_INIT, sizeof(DCMD_TXCMD_T));
39314 +#endif
39315 +}
39316 +
39317 +/*---------------------------Define function prototype------------------------*/
39318 +
39319 --- /dev/null
39320 +++ b/drivers/staging/rtl8192e/r8192E_dm.h
39321 @@ -0,0 +1,320 @@
39322 +/*****************************************************************************
39323 + * Copyright(c) 2007, RealTEK Technology Inc. All Right Reserved.
39324 + *
39325 + * Module: Hal819xUsbDM.h (RTL8192 Header H File)
39326 + *
39327 + *
39328 + * Note: For dynamic control definition constant structure.
39329 + *
39330 + *
39331 + * Export:
39332 + *
39333 + * Abbrev:
39334 + *
39335 + * History:
39336 + * Data Who Remark
39337 + * 10/04/2007 MHC Create initial version.
39338 + *
39339 + *****************************************************************************/
39340 + /* Check to see if the file has been included already. */
39341 +#ifndef __R8192UDM_H__
39342 +#define __R8192UDM_H__
39343 +
39344 +
39345 +/*--------------------------Define Parameters-------------------------------*/
39346 +#define OFDM_Table_Length 19
39347 +#define CCK_Table_length 12
39348 +
39349 +#define DM_DIG_THRESH_HIGH 40
39350 +#define DM_DIG_THRESH_LOW 35
39351 +
39352 +#define DM_DIG_HIGH_PWR_THRESH_HIGH 75
39353 +#define DM_DIG_HIGH_PWR_THRESH_LOW 70
39354 +
39355 +#define BW_AUTO_SWITCH_HIGH_LOW 25
39356 +#define BW_AUTO_SWITCH_LOW_HIGH 30
39357 +
39358 +#define DM_check_fsync_time_interval 500
39359 +
39360 +
39361 +#define DM_DIG_BACKOFF 12
39362 +#define DM_DIG_MAX 0x36
39363 +#define DM_DIG_MIN 0x1c
39364 +#define DM_DIG_MIN_Netcore 0x12
39365 +
39366 +#define RxPathSelection_SS_TH_low 30
39367 +#define RxPathSelection_diff_TH 18
39368 +
39369 +#define RateAdaptiveTH_High 50
39370 +#define RateAdaptiveTH_Low_20M 30
39371 +#define RateAdaptiveTH_Low_40M 10
39372 +#define VeryLowRSSI 15
39373 +#define CTSToSelfTHVal 35
39374 +
39375 +//defined by vivi, for tx power track
39376 +#define E_FOR_TX_POWER_TRACK 300
39377 +//Dynamic Tx Power Control Threshold
39378 +#define TX_POWER_NEAR_FIELD_THRESH_HIGH 68
39379 +#define TX_POWER_NEAR_FIELD_THRESH_LOW 62
39380 +//added by amy for atheros AP
39381 +#define TX_POWER_ATHEROAP_THRESH_HIGH 78
39382 +#define TX_POWER_ATHEROAP_THRESH_LOW 72
39383 +
39384 +//defined by vivi, for showing on UI. Newer firmware has changed to 0x1e0
39385 +#define Current_Tx_Rate_Reg 0x1e0//0x1b8
39386 +#define Initial_Tx_Rate_Reg 0x1e1 //0x1b9
39387 +#define Tx_Retry_Count_Reg 0x1ac
39388 +#define RegC38_TH 20
39389 +#if 0
39390 +//----------------------------------------------------------------------------
39391 +// 8190 Rate Adaptive Table Register (offset 0x320, 4 byte)
39392 +//----------------------------------------------------------------------------
39393 +
39394 +//CCK
39395 +#define RATR_1M 0x00000001
39396 +#define RATR_2M 0x00000002
39397 +#define RATR_55M 0x00000004
39398 +#define RATR_11M 0x00000008
39399 +//OFDM
39400 +#define RATR_6M 0x00000010
39401 +#define RATR_9M 0x00000020
39402 +#define RATR_12M 0x00000040
39403 +#define RATR_18M 0x00000080
39404 +#define RATR_24M 0x00000100
39405 +#define RATR_36M 0x00000200
39406 +#define RATR_48M 0x00000400
39407 +#define RATR_54M 0x00000800
39408 +//MCS 1 Spatial Stream
39409 +#define RATR_MCS0 0x00001000
39410 +#define RATR_MCS1 0x00002000
39411 +#define RATR_MCS2 0x00004000
39412 +#define RATR_MCS3 0x00008000
39413 +#define RATR_MCS4 0x00010000
39414 +#define RATR_MCS5 0x00020000
39415 +#define RATR_MCS6 0x00040000
39416 +#define RATR_MCS7 0x00080000
39417 +//MCS 2 Spatial Stream
39418 +#define RATR_MCS8 0x00100000
39419 +#define RATR_MCS9 0x00200000
39420 +#define RATR_MCS10 0x00400000
39421 +#define RATR_MCS11 0x00800000
39422 +#define RATR_MCS12 0x01000000
39423 +#define RATR_MCS13 0x02000000
39424 +#define RATR_MCS14 0x04000000
39425 +#define RATR_MCS15 0x08000000
39426 +// ALL CCK Rate
39427 +#define RATE_ALL_CCK RATR_1M|RATR_2M|RATR_55M|RATR_11M
39428 +#define RATE_ALL_OFDM_AG RATR_6M|RATR_9M|RATR_12M|RATR_18M|RATR_24M\
39429 + |RATR_36M|RATR_48M|RATR_54M
39430 +#define RATE_ALL_OFDM_2SS RATR_MCS8|RATR_MCS9 |RATR_MCS10|RATR_MCS11| \
39431 + RATR_MCS12|RATR_MCS13|RATR_MCS14|RATR_MCS15
39432 +#endif
39433 +/*--------------------------Define Parameters-------------------------------*/
39434 +
39435 +
39436 +/*------------------------------Define structure----------------------------*/
39437 +/* 2007/10/04 MH Define upper and lower threshold of DIG enable or disable. */
39438 +typedef struct _dynamic_initial_gain_threshold_
39439 +{
39440 + u8 dig_enable_flag;
39441 + u8 dig_algorithm;
39442 + u8 dbg_mode;
39443 + u8 dig_algorithm_switch;
39444 +
39445 + long rssi_low_thresh;
39446 + long rssi_high_thresh;
39447 +
39448 + long rssi_high_power_lowthresh;
39449 + long rssi_high_power_highthresh;
39450 +
39451 + u8 dig_state;
39452 + u8 dig_highpwr_state;
39453 + u8 cur_connect_state;
39454 + u8 pre_connect_state;
39455 +
39456 + u8 curpd_thstate;
39457 + u8 prepd_thstate;
39458 + u8 curcs_ratio_state;
39459 + u8 precs_ratio_state;
39460 +
39461 + u32 pre_ig_value;
39462 + u32 cur_ig_value;
39463 +
39464 + u8 backoff_val;
39465 + u8 rx_gain_range_max;
39466 + u8 rx_gain_range_min;
39467 + bool initialgain_lowerbound_state;
39468 +
39469 + long rssi_val;
39470 +}dig_t;
39471 +
39472 +typedef enum tag_dynamic_init_gain_state_definition
39473 +{
39474 + DM_STA_DIG_OFF = 0,
39475 + DM_STA_DIG_ON,
39476 + DM_STA_DIG_MAX
39477 +}dm_dig_sta_e;
39478 +
39479 +
39480 +/* 2007/10/08 MH Define RATR state. */
39481 +typedef enum tag_dynamic_ratr_state_definition
39482 +{
39483 + DM_RATR_STA_HIGH = 0,
39484 + DM_RATR_STA_MIDDLE = 1,
39485 + DM_RATR_STA_LOW = 2,
39486 + DM_RATR_STA_MAX
39487 +}dm_ratr_sta_e;
39488 +
39489 +/* 2007/10/11 MH Define DIG operation type. */
39490 +typedef enum tag_dynamic_init_gain_operation_type_definition
39491 +{
39492 + DIG_TYPE_THRESH_HIGH = 0,
39493 + DIG_TYPE_THRESH_LOW = 1,
39494 + DIG_TYPE_THRESH_HIGHPWR_HIGH = 2,
39495 + DIG_TYPE_THRESH_HIGHPWR_LOW = 3,
39496 + DIG_TYPE_DBG_MODE = 4,
39497 + DIG_TYPE_RSSI = 5,
39498 + DIG_TYPE_ALGORITHM = 6,
39499 + DIG_TYPE_BACKOFF = 7,
39500 + DIG_TYPE_PWDB_FACTOR = 8,
39501 + DIG_TYPE_RX_GAIN_MIN = 9,
39502 + DIG_TYPE_RX_GAIN_MAX = 10,
39503 + DIG_TYPE_ENABLE = 20,
39504 + DIG_TYPE_DISABLE = 30,
39505 + DIG_OP_TYPE_MAX
39506 +}dm_dig_op_e;
39507 +
39508 +typedef enum tag_dig_algorithm_definition
39509 +{
39510 + DIG_ALGO_BY_FALSE_ALARM = 0,
39511 + DIG_ALGO_BY_RSSI = 1,
39512 + DIG_ALGO_MAX
39513 +}dm_dig_alg_e;
39514 +
39515 +typedef enum tag_dig_dbgmode_definition
39516 +{
39517 + DIG_DBG_OFF = 0,
39518 + DIG_DBG_ON = 1,
39519 + DIG_DBG_MAX
39520 +}dm_dig_dbg_e;
39521 +
39522 +typedef enum tag_dig_connect_definition
39523 +{
39524 + DIG_DISCONNECT = 0,
39525 + DIG_CONNECT = 1,
39526 + DIG_CONNECT_MAX
39527 +}dm_dig_connect_e;
39528 +
39529 +typedef enum tag_dig_packetdetection_threshold_definition
39530 +{
39531 + DIG_PD_AT_LOW_POWER = 0,
39532 + DIG_PD_AT_NORMAL_POWER = 1,
39533 + DIG_PD_AT_HIGH_POWER = 2,
39534 + DIG_PD_MAX
39535 +}dm_dig_pd_th_e;
39536 +
39537 +typedef enum tag_dig_cck_cs_ratio_state_definition
39538 +{
39539 + DIG_CS_RATIO_LOWER = 0,
39540 + DIG_CS_RATIO_HIGHER = 1,
39541 + DIG_CS_MAX
39542 +}dm_dig_cs_ratio_e;
39543 +typedef struct _Dynamic_Rx_Path_Selection_
39544 +{
39545 + u8 Enable;
39546 + u8 DbgMode;
39547 + u8 cck_method;
39548 + u8 cck_Rx_path;
39549 +
39550 + u8 SS_TH_low;
39551 + u8 diff_TH;
39552 + u8 disabledRF;
39553 + u8 reserved;
39554 +
39555 + u8 rf_rssi[4];
39556 + u8 rf_enable_rssi_th[4];
39557 + long cck_pwdb_sta[4];
39558 +}DRxPathSel;
39559 +
39560 +typedef enum tag_CCK_Rx_Path_Method_Definition
39561 +{
39562 + CCK_Rx_Version_1 = 0,
39563 + CCK_Rx_Version_2= 1,
39564 + CCK_Rx_Version_MAX
39565 +}DM_CCK_Rx_Path_Method;
39566 +
39567 +typedef enum tag_DM_DbgMode_Definition
39568 +{
39569 + DM_DBG_OFF = 0,
39570 + DM_DBG_ON = 1,
39571 + DM_DBG_MAX
39572 +}DM_DBG_E;
39573 +
39574 +typedef struct tag_Tx_Config_Cmd_Format
39575 +{
39576 + u32 Op; /* Command packet type. */
39577 + u32 Length; /* Command packet length. */
39578 + u32 Value;
39579 +}DCMD_TXCMD_T, *PDCMD_TXCMD_T;
39580 +/*------------------------------Define structure----------------------------*/
39581 +
39582 +
39583 +/*------------------------Export global variable----------------------------*/
39584 +extern dig_t dm_digtable;
39585 +extern u8 dm_shadow[16][256];
39586 +extern DRxPathSel DM_RxPathSelTable;
39587 +/*------------------------Export global variable----------------------------*/
39588 +
39589 +
39590 +/*------------------------Export Marco Definition---------------------------*/
39591 +
39592 +/*------------------------Export Marco Definition---------------------------*/
39593 +
39594 +
39595 +/*--------------------------Exported Function prototype---------------------*/
39596 +/*--------------------------Exported Function prototype---------------------*/
39597 +extern void init_hal_dm(struct net_device *dev);
39598 +extern void deinit_hal_dm(struct net_device *dev);
39599 +
39600 +extern void hal_dm_watchdog(struct net_device *dev);
39601 +
39602 +
39603 +extern void init_rate_adaptive(struct net_device *dev);
39604 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
39605 +extern void dm_txpower_trackingcallback(struct work_struct *work);
39606 +#else
39607 +extern void dm_txpower_trackingcallback(struct net_device *dev);
39608 +#endif
39609 +
39610 +extern void dm_cck_txpower_adjust(struct net_device *dev,bool binch14);
39611 +extern void dm_restore_dynamic_mechanism_state(struct net_device *dev);
39612 +extern void dm_backup_dynamic_mechanism_state(struct net_device *dev);
39613 +extern void dm_change_dynamic_initgain_thresh(struct net_device *dev,
39614 + u32 dm_type,
39615 + u32 dm_value);
39616 +extern void DM_ChangeFsyncSetting(struct net_device *dev,
39617 + s32 DM_Type,
39618 + s32 DM_Value);
39619 +extern void dm_force_tx_fw_info(struct net_device *dev,
39620 + u32 force_type,
39621 + u32 force_value);
39622 +extern void dm_init_edca_turbo(struct net_device *dev);
39623 +extern void dm_rf_operation_test_callback(unsigned long data);
39624 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
39625 +extern void dm_rf_pathcheck_workitemcallback(struct work_struct *work);
39626 +#else
39627 +extern void dm_rf_pathcheck_workitemcallback(struct net_device *dev);
39628 +#endif
39629 +extern void dm_fsync_timer_callback(unsigned long data);
39630 +#if 0
39631 +extern bool dm_check_lbus_status(struct net_device *dev);
39632 +#endif
39633 +extern void dm_check_fsync(struct net_device *dev);
39634 +extern void dm_shadow_init(struct net_device *dev);
39635 +extern void dm_initialize_txpower_tracking(struct net_device *dev);
39636 +
39637 +
39638 +#endif /*__R8192UDM_H__ */
39639 +
39640 +
39641 +/* End of r8192U_dm.h */
39642 --- /dev/null
39643 +++ b/drivers/staging/rtl8192e/r8192E_hw.h
39644 @@ -0,0 +1,811 @@
39645 +/*
39646 + This is part of rtl8187 OpenSource driver.
39647 + Copyright (C) Andrea Merello 2004-2005 <andreamrl@tiscali.it>
39648 + Released under the terms of GPL (General Public Licence)
39649 +
39650 + Parts of this driver are based on the GPL part of the
39651 + official Realtek driver.
39652 + Parts of this driver are based on the rtl8180 driver skeleton
39653 + from Patric Schenke & Andres Salomon.
39654 + Parts of this driver are based on the Intel Pro Wireless
39655 + 2100 GPL driver.
39656 +
39657 + We want to tanks the Authors of those projects
39658 + and the Ndiswrapper project Authors.
39659 +*/
39660 +
39661 +/* Mariusz Matuszek added full registers definition with Realtek's name */
39662 +
39663 +/* this file contains register definitions for the rtl8187 MAC controller */
39664 +#ifndef R8180_HW
39665 +#define R8180_HW
39666 +
39667 +typedef enum _VERSION_8190{
39668 + // RTL8190
39669 + VERSION_8190_BD=0x3,
39670 + VERSION_8190_BE
39671 +}VERSION_8190,*PVERSION_8190;
39672 +//added for different RF type
39673 +typedef enum _RT_RF_TYPE_DEF
39674 +{
39675 + RF_1T2R = 0,
39676 + RF_2T4R,
39677 +
39678 + RF_819X_MAX_TYPE
39679 +}RT_RF_TYPE_DEF;
39680 +
39681 +typedef enum _BaseBand_Config_Type{
39682 + BaseBand_Config_PHY_REG = 0, //Radio Path A
39683 + BaseBand_Config_AGC_TAB = 1, //Radio Path B
39684 +}BaseBand_Config_Type, *PBaseBand_Config_Type;
39685 +#if 0
39686 +typedef enum _RT_RF_TYPE_819xU{
39687 + RF_TYPE_MIN = 0,
39688 + RF_8225,
39689 + RF_8256,
39690 + RF_8258,
39691 + RF_PSEUDO_11N = 4,
39692 +}RT_RF_TYPE_819xU, *PRT_RF_TYPE_819xU;
39693 +#endif
39694 +#define RTL8187_REQT_READ 0xc0
39695 +#define RTL8187_REQT_WRITE 0x40
39696 +#define RTL8187_REQ_GET_REGS 0x05
39697 +#define RTL8187_REQ_SET_REGS 0x05
39698 +
39699 +#define R8180_MAX_RETRY 255
39700 +#define MAX_TX_URB 5
39701 +#define MAX_RX_URB 16
39702 +//#define MAX_RX_NORMAL_URB 3
39703 +//#define MAX_RX_COMMAND_URB 2
39704 +#define RX_URB_SIZE 9100
39705 +
39706 +#define BB_ANTATTEN_CHAN14 0x0c
39707 +#define BB_ANTENNA_B 0x40
39708 +
39709 +#define BB_HOST_BANG (1<<30)
39710 +#define BB_HOST_BANG_EN (1<<2)
39711 +#define BB_HOST_BANG_CLK (1<<1)
39712 +#define BB_HOST_BANG_RW (1<<3)
39713 +#define BB_HOST_BANG_DATA 1
39714 +
39715 +//#if (RTL819X_FPGA_VER & RTL819X_FPGA_VIVI_070920)
39716 +#define RTL8190_EEPROM_ID 0x8129
39717 +#define EEPROM_VID 0x02
39718 +#define EEPROM_DID 0x04
39719 +#define EEPROM_NODE_ADDRESS_BYTE_0 0x0C
39720 +
39721 +#define EEPROM_TxPowerDiff 0x1F
39722 +
39723 +
39724 +#define EEPROM_PwDiff 0x21 //0x21
39725 +#define EEPROM_CrystalCap 0x22 //0x22
39726 +
39727 +
39728 +
39729 +#define EEPROM_TxPwIndex_CCK_V1 0x29 //0x29~0x2B
39730 +#define EEPROM_TxPwIndex_OFDM_24G_V1 0x2C //0x2C~0x2E
39731 +#define EEPROM_TxPwIndex_Ver 0x27 //0x27
39732 +
39733 +#define EEPROM_Default_TxPowerDiff 0x0
39734 +#define EEPROM_Default_ThermalMeter 0x77
39735 +#define EEPROM_Default_AntTxPowerDiff 0x0
39736 +#define EEPROM_Default_TxPwDiff_CrystalCap 0x5
39737 +#define EEPROM_Default_PwDiff 0x4
39738 +#define EEPROM_Default_CrystalCap 0x5
39739 +#define EEPROM_Default_TxPower 0x1010
39740 +#define EEPROM_ICVersion_ChannelPlan 0x7C //0x7C:ChannelPlan, 0x7D:IC_Version
39741 +#define EEPROM_Customer_ID 0x7B //0x7B:CustomerID
39742 +#ifdef RTL8190P
39743 +#define EEPROM_RFInd_PowerDiff 0x14
39744 +#define EEPROM_ThermalMeter 0x15
39745 +#define EEPROM_TxPwDiff_CrystalCap 0x16
39746 +#define EEPROM_TxPwIndex_CCK 0x18 //0x18~0x25
39747 +#define EEPROM_TxPwIndex_OFDM_24G 0x26 //0x26~0x33
39748 +#define EEPROM_TxPwIndex_OFDM_5G 0x34 //0x34~0x7B
39749 +#define EEPROM_C56_CrystalCap 0x17 //0x17
39750 +#define EEPROM_C56_RfA_CCK_Chnl1_TxPwIndex 0x80 //0x80
39751 +#define EEPROM_C56_RfA_HT_OFDM_TxPwIndex 0x81 //0x81~0x83
39752 +#define EEPROM_C56_RfC_CCK_Chnl1_TxPwIndex 0xbc //0xb8
39753 +#define EEPROM_C56_RfC_HT_OFDM_TxPwIndex 0xb9 //0xb9~0xbb
39754 +#else
39755 +#ifdef RTL8192E
39756 +#define EEPROM_RFInd_PowerDiff 0x28
39757 +#define EEPROM_ThermalMeter 0x29
39758 +#define EEPROM_TxPwDiff_CrystalCap 0x2A //0x2A~0x2B
39759 +#define EEPROM_TxPwIndex_CCK 0x2C //0x23
39760 +#define EEPROM_TxPwIndex_OFDM_24G 0x3A //0x24~0x26
39761 +#endif
39762 +#endif
39763 +#define EEPROM_Default_TxPowerLevel 0x10
39764 +//#define EEPROM_ChannelPlan 0x7c //0x7C
39765 +#define EEPROM_IC_VER 0x7d //0x7D
39766 +#define EEPROM_CRC 0x7e //0x7E~0x7F
39767 +
39768 +#define EEPROM_CID_DEFAULT 0x0
39769 +#define EEPROM_CID_CAMEO 0x1
39770 +#define EEPROM_CID_RUNTOP 0x2
39771 +#define EEPROM_CID_Senao 0x3
39772 +#define EEPROM_CID_TOSHIBA 0x4 // Toshiba setting, Merge by Jacken, 2008/01/31
39773 +#define EEPROM_CID_NetCore 0x5
39774 +#define EEPROM_CID_Nettronix 0x6
39775 +#define EEPROM_CID_Pronet 0x7
39776 +#define EEPROM_CID_DLINK 0x8
39777 +#define EEPROM_CID_WHQL 0xFE //added by sherry for dtm, 20080728
39778 +//#endif
39779 +enum _RTL8192Pci_HW {
39780 + MAC0 = 0x000,
39781 + MAC1 = 0x001,
39782 + MAC2 = 0x002,
39783 + MAC3 = 0x003,
39784 + MAC4 = 0x004,
39785 + MAC5 = 0x005,
39786 + PCIF = 0x009, // PCI Function Register 0x0009h~0x000bh
39787 +//----------------------------------------------------------------------------
39788 +// 8190 PCIF bits (Offset 0x009-000b, 24bit)
39789 +//----------------------------------------------------------------------------
39790 +#define MXDMA2_16bytes 0x000
39791 +#define MXDMA2_32bytes 0x001
39792 +#define MXDMA2_64bytes 0x010
39793 +#define MXDMA2_128bytes 0x011
39794 +#define MXDMA2_256bytes 0x100
39795 +#define MXDMA2_512bytes 0x101
39796 +#define MXDMA2_1024bytes 0x110
39797 +#define MXDMA2_NoLimit 0x7
39798 +
39799 +#define MULRW_SHIFT 3
39800 +#define MXDMA2_RX_SHIFT 4
39801 +#define MXDMA2_TX_SHIFT 0
39802 + PMR = 0x00c, // Power management register
39803 + EPROM_CMD = 0x00e,
39804 +#define EPROM_CMD_RESERVED_MASK BIT5
39805 +#define EPROM_CMD_9356SEL BIT4
39806 +#define EPROM_CMD_OPERATING_MODE_SHIFT 6
39807 +#define EPROM_CMD_OPERATING_MODE_MASK ((1<<7)|(1<<6))
39808 +#define EPROM_CMD_CONFIG 0x3
39809 +#define EPROM_CMD_NORMAL 0
39810 +#define EPROM_CMD_LOAD 1
39811 +#define EPROM_CMD_PROGRAM 2
39812 +#define EPROM_CS_SHIFT 3
39813 +#define EPROM_CK_SHIFT 2
39814 +#define EPROM_W_SHIFT 1
39815 +#define EPROM_R_SHIFT 0
39816 +
39817 + AFR = 0x010,
39818 +#define AFR_CardBEn (1<<0)
39819 +#define AFR_CLKRUN_SEL (1<<1)
39820 +#define AFR_FuncRegEn (1<<2)
39821 +
39822 + ANAPAR = 0x17,
39823 +#define BB_GLOBAL_RESET_BIT 0x1
39824 + BB_GLOBAL_RESET = 0x020, // BasebandGlobal Reset Register
39825 + BSSIDR = 0x02E, // BSSID Register
39826 + CMDR = 0x037, // Command register
39827 +#define CR_RST 0x10
39828 +#define CR_RE 0x08
39829 +#define CR_TE 0x04
39830 +#define CR_MulRW 0x01
39831 + SIFS = 0x03E, // SIFS register
39832 + TCR = 0x040, // Transmit Configuration Register
39833 + RCR = 0x044, // Receive Configuration Register
39834 +//----------------------------------------------------------------------------
39835 +//// 8190 (RCR) Receive Configuration Register (Offset 0x44~47, 32 bit)
39836 +////----------------------------------------------------------------------------
39837 +#define RCR_FILTER_MASK (BIT0|BIT1|BIT2|BIT3|BIT5|BIT12|BIT18|BIT19|BIT20|BIT21|BIT22|BIT23)
39838 +#define RCR_ONLYERLPKT BIT31 // Early Receiving based on Packet Size.
39839 +#define RCR_ENCS2 BIT30 // Enable Carrier Sense Detection Method 2
39840 +#define RCR_ENCS1 BIT29 // Enable Carrier Sense Detection Method 1
39841 +#define RCR_ENMBID BIT27 // Enable Multiple BssId.
39842 +#define RCR_ACKTXBW (BIT24|BIT25) // TXBW Setting of ACK frames
39843 +#define RCR_CBSSID BIT23 // Accept BSSID match packet
39844 +#define RCR_APWRMGT BIT22 // Accept power management packet
39845 +#define RCR_ADD3 BIT21 // Accept address 3 match packet
39846 +#define RCR_AMF BIT20 // Accept management type frame
39847 +#define RCR_ACF BIT19 // Accept control type frame
39848 +#define RCR_ADF BIT18 // Accept data type frame
39849 +#define RCR_RXFTH BIT13 // Rx FIFO Threshold
39850 +#define RCR_AICV BIT12 // Accept ICV error packet
39851 +#define RCR_ACRC32 BIT5 // Accept CRC32 error packet
39852 +#define RCR_AB BIT3 // Accept broadcast packet
39853 +#define RCR_AM BIT2 // Accept multicast packet
39854 +#define RCR_APM BIT1 // Accept physical match packet
39855 +#define RCR_AAP BIT0 // Accept all unicast packet
39856 +#define RCR_MXDMA_OFFSET 8
39857 +#define RCR_FIFO_OFFSET 13
39858 + SLOT_TIME = 0x049, // Slot Time Register
39859 + ACK_TIMEOUT = 0x04c, // Ack Timeout Register
39860 + PIFS_TIME = 0x04d, // PIFS time
39861 + USTIME = 0x04e, // Microsecond Tuning Register, Sets the microsecond time unit used by MAC clock.
39862 + EDCAPARA_BE = 0x050, // EDCA Parameter of AC BE
39863 + EDCAPARA_BK = 0x054, // EDCA Parameter of AC BK
39864 + EDCAPARA_VO = 0x058, // EDCA Parameter of AC VO
39865 + EDCAPARA_VI = 0x05C, // EDCA Parameter of AC VI
39866 +#define AC_PARAM_TXOP_LIMIT_OFFSET 16
39867 +#define AC_PARAM_ECW_MAX_OFFSET 12
39868 +#define AC_PARAM_ECW_MIN_OFFSET 8
39869 +#define AC_PARAM_AIFS_OFFSET 0
39870 + RFPC = 0x05F, // Rx FIFO Packet Count
39871 + CWRR = 0x060, // Contention Window Report Register
39872 + BCN_TCFG = 0x062, // Beacon Time Configuration
39873 +#define BCN_TCFG_CW_SHIFT 8
39874 +#define BCN_TCFG_IFS 0
39875 + BCN_INTERVAL = 0x070, // Beacon Interval (TU)
39876 + ATIMWND = 0x072, // ATIM Window Size (TU)
39877 + BCN_DRV_EARLY_INT = 0x074, // Driver Early Interrupt Time (TU). Time to send interrupt to notify to change beacon content before TBTT
39878 +#define BCN_DRV_EARLY_INT_SWBCN_SHIFT 8
39879 +#define BCN_DRV_EARLY_INT_TIME_SHIFT 0
39880 + BCN_DMATIME = 0x076, // Beacon DMA and ATIM interrupt time (US). Indicates the time before TBTT to perform beacon queue DMA
39881 + BCN_ERR_THRESH = 0x078, // Beacon Error Threshold
39882 + RWCAM = 0x0A0, //IN 8190 Data Sheet is called CAMcmd
39883 + //----------------------------------------------------------------------------
39884 + //// 8190 CAM Command Register (offset 0xA0, 4 byte)
39885 + ////----------------------------------------------------------------------------
39886 +#define CAM_CM_SecCAMPolling BIT31 //Security CAM Polling
39887 +#define CAM_CM_SecCAMClr BIT30 //Clear all bits in CAM
39888 +#define CAM_CM_SecCAMWE BIT16 //Security CAM enable
39889 +#define CAM_VALID BIT15
39890 +#define CAM_NOTVALID 0x0000
39891 +#define CAM_USEDK BIT5
39892 +
39893 +#define CAM_NONE 0x0
39894 +#define CAM_WEP40 0x01
39895 +#define CAM_TKIP 0x02
39896 +#define CAM_AES 0x04
39897 +#define CAM_WEP104 0x05
39898 +
39899 +#define TOTAL_CAM_ENTRY 32
39900 +
39901 +#define CAM_CONFIG_USEDK true
39902 +#define CAM_CONFIG_NO_USEDK false
39903 +#define CAM_WRITE BIT16
39904 +#define CAM_READ 0x00000000
39905 +#define CAM_POLLINIG BIT31
39906 +#define SCR_UseDK 0x01
39907 + WCAMI = 0x0A4, // Software write CAM input content
39908 + RCAMO = 0x0A8, // Software read/write CAM config
39909 + SECR = 0x0B0, //Security Configuration Register
39910 +#define SCR_TxUseDK BIT0 //Force Tx Use Default Key
39911 +#define SCR_RxUseDK BIT1 //Force Rx Use Default Key
39912 +#define SCR_TxEncEnable BIT2 //Enable Tx Encryption
39913 +#define SCR_RxDecEnable BIT3 //Enable Rx Decryption
39914 +#define SCR_SKByA2 BIT4 //Search kEY BY A2
39915 +#define SCR_NoSKMC BIT5 //No Key Search for Multicast
39916 + SWREGULATOR = 0x0BD, // Switching Regulator
39917 + INTA_MASK = 0x0f4,
39918 +//----------------------------------------------------------------------------
39919 +// 8190 IMR/ISR bits (offset 0xfd, 8bits)
39920 +//----------------------------------------------------------------------------
39921 +#define IMR8190_DISABLED 0x0
39922 +#define IMR_ATIMEND BIT28 // ATIM Window End Interrupt
39923 +#define IMR_TBDOK BIT27 // Transmit Beacon OK Interrupt
39924 +#define IMR_TBDER BIT26 // Transmit Beacon Error Interrupt
39925 +#define IMR_TXFOVW BIT15 // Transmit FIFO Overflow
39926 +#define IMR_TIMEOUT0 BIT14 // TimeOut0
39927 +#define IMR_BcnInt BIT13 // Beacon DMA Interrupt 0
39928 +#define IMR_RXFOVW BIT12 // Receive FIFO Overflow
39929 +#define IMR_RDU BIT11 // Receive Descriptor Unavailable
39930 +#define IMR_RXCMDOK BIT10 // Receive Command Packet OK
39931 +#define IMR_BDOK BIT9 // Beacon Queue DMA OK Interrup
39932 +#define IMR_HIGHDOK BIT8 // High Queue DMA OK Interrupt
39933 +#define IMR_COMDOK BIT7 // Command Queue DMA OK Interrupt
39934 +#define IMR_MGNTDOK BIT6 // Management Queue DMA OK Interrupt
39935 +#define IMR_HCCADOK BIT5 // HCCA Queue DMA OK Interrupt
39936 +#define IMR_BKDOK BIT4 // AC_BK DMA OK Interrupt
39937 +#define IMR_BEDOK BIT3 // AC_BE DMA OK Interrupt
39938 +#define IMR_VIDOK BIT2 // AC_VI DMA OK Interrupt
39939 +#define IMR_VODOK BIT1 // AC_VO DMA Interrupt
39940 +#define IMR_ROK BIT0 // Receive DMA OK Interrupt
39941 + ISR = 0x0f8, // Interrupt Status Register
39942 + TPPoll = 0x0fd, // Transmit priority polling register
39943 +#define TPPoll_BKQ BIT0 // BK queue polling
39944 +#define TPPoll_BEQ BIT1 // BE queue polling
39945 +#define TPPoll_VIQ BIT2 // VI queue polling
39946 +#define TPPoll_VOQ BIT3 // VO queue polling
39947 +#define TPPoll_BQ BIT4 // Beacon queue polling
39948 +#define TPPoll_CQ BIT5 // Command queue polling
39949 +#define TPPoll_MQ BIT6 // Management queue polling
39950 +#define TPPoll_HQ BIT7 // High queue polling
39951 +#define TPPoll_HCCAQ BIT8 // HCCA queue polling
39952 +#define TPPoll_StopBK BIT9 // Stop BK queue
39953 +#define TPPoll_StopBE BIT10 // Stop BE queue
39954 +#define TPPoll_StopVI BIT11 // Stop VI queue
39955 +#define TPPoll_StopVO BIT12 // Stop VO queue
39956 +#define TPPoll_StopMgt BIT13 // Stop Mgnt queue
39957 +#define TPPoll_StopHigh BIT14 // Stop High queue
39958 +#define TPPoll_StopHCCA BIT15 // Stop HCCA queue
39959 +#define TPPoll_SHIFT 8 // Queue ID mapping
39960 +
39961 + PSR = 0x0ff, // Page Select Register
39962 +#define PSR_GEN 0x0 // Page 0 register general MAC Control
39963 +#define PSR_CPU 0x1 // Page 1 register for CPU
39964 + CPU_GEN = 0x100, // CPU Reset Register
39965 + BB_RESET = 0x101, // Baseband Reset
39966 +//----------------------------------------------------------------------------
39967 +// 8190 CPU General Register (offset 0x100, 4 byte)
39968 +//----------------------------------------------------------------------------
39969 +#define CPU_CCK_LOOPBACK 0x00030000
39970 +#define CPU_GEN_SYSTEM_RESET 0x00000001
39971 +#define CPU_GEN_FIRMWARE_RESET 0x00000008
39972 +#define CPU_GEN_BOOT_RDY 0x00000010
39973 +#define CPU_GEN_FIRM_RDY 0x00000020
39974 +#define CPU_GEN_PUT_CODE_OK 0x00000080
39975 +#define CPU_GEN_BB_RST 0x00000100
39976 +#define CPU_GEN_PWR_STB_CPU 0x00000004
39977 +#define CPU_GEN_NO_LOOPBACK_MSK 0xFFF8FFFF // Set bit18,17,16 to 0. Set bit19
39978 +#define CPU_GEN_NO_LOOPBACK_SET 0x00080000 // Set BIT19 to 1
39979 +#define CPU_GEN_GPIO_UART 0x00007000
39980 +
39981 + LED1Cfg = 0x154,// LED1 Configuration Register
39982 + LED0Cfg = 0x155,// LED0 Configuration Register
39983 +
39984 + AcmAvg = 0x170, // ACM Average Period Register
39985 + AcmHwCtrl = 0x171, // ACM Hardware Control Register
39986 +//----------------------------------------------------------------------------
39987 +//
39988 +// 8190 AcmHwCtrl bits (offset 0x171, 1 byte)
39989 +//----------------------------------------------------------------------------
39990 +#define AcmHw_HwEn BIT0
39991 +#define AcmHw_BeqEn BIT1
39992 +#define AcmHw_ViqEn BIT2
39993 +#define AcmHw_VoqEn BIT3
39994 +#define AcmHw_BeqStatus BIT4
39995 +#define AcmHw_ViqStatus BIT5
39996 +#define AcmHw_VoqStatus BIT6
39997 + AcmFwCtrl = 0x172, // ACM Firmware Control Register
39998 +#define AcmFw_BeqStatus BIT0
39999 +#define AcmFw_ViqStatus BIT1
40000 +#define AcmFw_VoqStatus BIT2
40001 + VOAdmTime = 0x174, // VO Queue Admitted Time Register
40002 + VIAdmTime = 0x178, // VI Queue Admitted Time Register
40003 + BEAdmTime = 0x17C, // BE Queue Admitted Time Register
40004 + RQPN1 = 0x180, // Reserved Queue Page Number , Vo Vi, Be, Bk
40005 + RQPN2 = 0x184, // Reserved Queue Page Number, HCCA, Cmd, Mgnt, High
40006 + RQPN3 = 0x188, // Reserved Queue Page Number, Bcn, Public,
40007 + QPRR = 0x1E0, // Queue Page Report per TID
40008 + QPNR = 0x1F0, // Queue Packet Number report per TID
40009 +/* there's 9 tx descriptor base address available */
40010 + BQDA = 0x200, // Beacon Queue Descriptor Address
40011 + HQDA = 0x204, // High Priority Queue Descriptor Address
40012 + CQDA = 0x208, // Command Queue Descriptor Address
40013 + MQDA = 0x20C, // Management Queue Descriptor Address
40014 + HCCAQDA = 0x210, // HCCA Queue Descriptor Address
40015 + VOQDA = 0x214, // VO Queue Descriptor Address
40016 + VIQDA = 0x218, // VI Queue Descriptor Address
40017 + BEQDA = 0x21C, // BE Queue Descriptor Address
40018 + BKQDA = 0x220, // BK Queue Descriptor Address
40019 +/* there's 2 rx descriptor base address availalbe */
40020 + RCQDA = 0x224, // Receive command Queue Descriptor Address
40021 + RDQDA = 0x228, // Receive Queue Descriptor Start Address
40022 +
40023 + MAR0 = 0x240, // Multicast filter.
40024 + MAR4 = 0x244,
40025 +
40026 + CCX_PERIOD = 0x250, // CCX Measurement Period Register, in unit of TU.
40027 + CLM_RESULT = 0x251, // CCA Busy fraction register.
40028 + NHM_PERIOD = 0x252, // NHM Measurement Period register, in unit of TU.
40029 +
40030 + NHM_THRESHOLD0 = 0x253, // Noise Histogram Meashorement0.
40031 + NHM_THRESHOLD1 = 0x254, // Noise Histogram Meashorement1.
40032 + NHM_THRESHOLD2 = 0x255, // Noise Histogram Meashorement2.
40033 + NHM_THRESHOLD3 = 0x256, // Noise Histogram Meashorement3.
40034 + NHM_THRESHOLD4 = 0x257, // Noise Histogram Meashorement4.
40035 + NHM_THRESHOLD5 = 0x258, // Noise Histogram Meashorement5.
40036 + NHM_THRESHOLD6 = 0x259, // Noise Histogram Meashorement6
40037 +
40038 + MCTRL = 0x25A, // Measurement Control
40039 +
40040 + NHM_RPI_COUNTER0 = 0x264, // Noise Histogram RPI counter0, the fraction of signal strength < NHM_THRESHOLD0.
40041 + NHM_RPI_COUNTER1 = 0x265, // Noise Histogram RPI counter1, the fraction of signal strength in (NHM_THRESHOLD0, NHM_THRESHOLD1].
40042 + NHM_RPI_COUNTER2 = 0x266, // Noise Histogram RPI counter2, the fraction of signal strength in (NHM_THRESHOLD1, NHM_THRESHOLD2].
40043 + NHM_RPI_COUNTER3 = 0x267, // Noise Histogram RPI counter3, the fraction of signal strength in (NHM_THRESHOLD2, NHM_THRESHOLD3].
40044 + NHM_RPI_COUNTER4 = 0x268, // Noise Histogram RPI counter4, the fraction of signal strength in (NHM_THRESHOLD3, NHM_THRESHOLD4].
40045 + NHM_RPI_COUNTER5 = 0x269, // Noise Histogram RPI counter5, the fraction of signal strength in (NHM_THRESHOLD4, NHM_THRESHOLD5].
40046 + NHM_RPI_COUNTER6 = 0x26A, // Noise Histogram RPI counter6, the fraction of signal strength in (NHM_THRESHOLD5, NHM_THRESHOLD6].
40047 + NHM_RPI_COUNTER7 = 0x26B, // Noise Histogram RPI counter7, the fraction of signal strength in (NHM_THRESHOLD6, NHM_THRESHOLD7].
40048 + WFCRC0 = 0x2f0,
40049 + WFCRC1 = 0x2f4,
40050 + WFCRC2 = 0x2f8,
40051 +
40052 + BW_OPMODE = 0x300, // Bandwidth operation mode
40053 +#define BW_OPMODE_11J BIT0
40054 +#define BW_OPMODE_5G BIT1
40055 +#define BW_OPMODE_20MHZ BIT2
40056 + IC_VERRSION = 0x301, //IC_VERSION
40057 + MSR = 0x303, // Media Status register
40058 +#define MSR_LINK_MASK ((1<<0)|(1<<1))
40059 +#define MSR_LINK_MANAGED 2
40060 +#define MSR_LINK_NONE 0
40061 +#define MSR_LINK_SHIFT 0
40062 +#define MSR_LINK_ADHOC 1
40063 +#define MSR_LINK_MASTER 3
40064 +#define MSR_LINK_ENEDCA (1<<4)
40065 + RETRY_LIMIT = 0x304, // Retry Limit [15:8]-short, [7:0]-long
40066 +#define RETRY_LIMIT_SHORT_SHIFT 8
40067 +#define RETRY_LIMIT_LONG_SHIFT 0
40068 + TSFR = 0x308,
40069 + RRSR = 0x310, // Response Rate Set
40070 +#define RRSR_RSC_OFFSET 21
40071 +#define RRSR_SHORT_OFFSET 23
40072 +#define RRSR_RSC_DUPLICATE 0x600000
40073 +#define RRSR_RSC_UPSUBCHNL 0x400000
40074 +#define RRSR_RSC_LOWSUBCHNL 0x200000
40075 +#define RRSR_SHORT 0x800000
40076 +#define RRSR_1M BIT0
40077 +#define RRSR_2M BIT1
40078 +#define RRSR_5_5M BIT2
40079 +#define RRSR_11M BIT3
40080 +#define RRSR_6M BIT4
40081 +#define RRSR_9M BIT5
40082 +#define RRSR_12M BIT6
40083 +#define RRSR_18M BIT7
40084 +#define RRSR_24M BIT8
40085 +#define RRSR_36M BIT9
40086 +#define RRSR_48M BIT10
40087 +#define RRSR_54M BIT11
40088 +#define RRSR_MCS0 BIT12
40089 +#define RRSR_MCS1 BIT13
40090 +#define RRSR_MCS2 BIT14
40091 +#define RRSR_MCS3 BIT15
40092 +#define RRSR_MCS4 BIT16
40093 +#define RRSR_MCS5 BIT17
40094 +#define RRSR_MCS6 BIT18
40095 +#define RRSR_MCS7 BIT19
40096 +#define BRSR_AckShortPmb BIT23 // CCK ACK: use Short Preamble or not
40097 + UFWP = 0x318,
40098 + RATR0 = 0x320, // Rate Adaptive Table register1
40099 +//----------------------------------------------------------------------------
40100 +// 8190 Rate Adaptive Table Register (offset 0x320, 4 byte)
40101 +//----------------------------------------------------------------------------
40102 +//CCK
40103 +#define RATR_1M 0x00000001
40104 +#define RATR_2M 0x00000002
40105 +#define RATR_55M 0x00000004
40106 +#define RATR_11M 0x00000008
40107 +//OFDM
40108 +#define RATR_6M 0x00000010
40109 +#define RATR_9M 0x00000020
40110 +#define RATR_12M 0x00000040
40111 +#define RATR_18M 0x00000080
40112 +#define RATR_24M 0x00000100
40113 +#define RATR_36M 0x00000200
40114 +#define RATR_48M 0x00000400
40115 +#define RATR_54M 0x00000800
40116 +//MCS 1 Spatial Stream
40117 +#define RATR_MCS0 0x00001000
40118 +#define RATR_MCS1 0x00002000
40119 +#define RATR_MCS2 0x00004000
40120 +#define RATR_MCS3 0x00008000
40121 +#define RATR_MCS4 0x00010000
40122 +#define RATR_MCS5 0x00020000
40123 +#define RATR_MCS6 0x00040000
40124 +#define RATR_MCS7 0x00080000
40125 +//MCS 2 Spatial Stream
40126 +#define RATR_MCS8 0x00100000
40127 +#define RATR_MCS9 0x00200000
40128 +#define RATR_MCS10 0x00400000
40129 +#define RATR_MCS11 0x00800000
40130 +#define RATR_MCS12 0x01000000
40131 +#define RATR_MCS13 0x02000000
40132 +#define RATR_MCS14 0x04000000
40133 +#define RATR_MCS15 0x08000000
40134 +// ALL CCK Rate
40135 +#define RATE_ALL_CCK RATR_1M|RATR_2M|RATR_55M|RATR_11M
40136 +#define RATE_ALL_OFDM_AG RATR_6M|RATR_9M|RATR_12M|RATR_18M|RATR_24M|RATR_36M|RATR_48M|RATR_54M
40137 +#define RATE_ALL_OFDM_1SS RATR_MCS0|RATR_MCS1|RATR_MCS2|RATR_MCS3 | \
40138 + RATR_MCS4|RATR_MCS5|RATR_MCS6 |RATR_MCS7
40139 +#define RATE_ALL_OFDM_2SS RATR_MCS8|RATR_MCS9 |RATR_MCS10|RATR_MCS11| \
40140 + RATR_MCS12|RATR_MCS13|RATR_MCS14|RATR_MCS15
40141 +
40142 +
40143 + DRIVER_RSSI = 0x32c, // Driver tell Firmware current RSSI
40144 + MCS_TXAGC = 0x340, // MCS AGC
40145 + CCK_TXAGC = 0x348, // CCK AGC
40146 +// IMR = 0x354, // Interrupt Mask Register
40147 +// IMR_POLL = 0x360,
40148 + MacBlkCtrl = 0x403, // Mac block on/off control register
40149 +
40150 + //Cmd9346CR = 0x00e,
40151 +//#define Cmd9346CR_9356SEL (1<<4)
40152 +#if 0
40153 +/* 0x0006 - 0x0007 - reserved */
40154 + RXFIFOCOUNT = 0x010,
40155 + TXFIFOCOUNT = 0x012,
40156 + BQREQ = 0x013,
40157 +/* 0x0010 - 0x0017 - reserved */
40158 + TSFTR = 0x018,
40159 + TLPDA = 0x020,
40160 + TNPDA = 0x024,
40161 + THPDA = 0x028,
40162 + BSSID = 0x02E,
40163 + RESP_RATE = 0x034,
40164 + CMD = 0x037,
40165 +#define CMD_RST_SHIFT 4
40166 +#define CMD_RESERVED_MASK ((1<<1) | (1<<5) | (1<<6) | (1<<7))
40167 +#define CMD_RX_ENABLE_SHIFT 3
40168 +#define CMD_TX_ENABLE_SHIFT 2
40169 +#define CR_RST ((1<< 4))
40170 +#define CR_RE ((1<< 3))
40171 +#define CR_TE ((1<< 2))
40172 +#define CR_MulRW ((1<< 0))
40173 +
40174 + INTA = 0x03e,
40175 +#endif
40176 +
40177 +///////////////////
40178 +//////////////////
40179 +#if 0
40180 + TX_CONF = 0x040,
40181 +#define TX_CONF_HEADER_AUTOICREMENT_SHIFT 30
40182 +#define TX_LOOPBACK_SHIFT 17
40183 +#define TX_LOOPBACK_MAC 1
40184 +#define TX_LOOPBACK_BASEBAND 2
40185 +#define TX_LOOPBACK_NONE 0
40186 +#define TX_LOOPBACK_CONTINUE 3
40187 +#define TX_LOOPBACK_MASK ((1<<17)|(1<<18))
40188 +#define TX_LRLRETRY_SHIFT 0
40189 +#define TX_SRLRETRY_SHIFT 8
40190 +#define TX_NOICV_SHIFT 19
40191 +#define TX_NOCRC_SHIFT 16
40192 +#define TCR_DurProcMode ((1<<30))
40193 +#define TCR_DISReqQsize ((1<<28))
40194 +#define TCR_HWVERID_MASK ((1<<27)|(1<<26)|(1<<25))
40195 +#define TCR_HWVERID_SHIFT 25
40196 +#define TCR_SWPLCPLEN ((1<<24))
40197 +#define TCR_PLCP_LEN TCR_SAT // rtl8180
40198 +#define TCR_MXDMA_MASK ((1<<23)|(1<<22)|(1<<21))
40199 +#define TCR_MXDMA_1024 6
40200 +#define TCR_MXDMA_2048 7
40201 +#define TCR_MXDMA_SHIFT 21
40202 +#define TCR_DISCW ((1<<20))
40203 +#define TCR_ICV ((1<<19))
40204 +#define TCR_LBK ((1<<18)|(1<<17))
40205 +#define TCR_LBK1 ((1<<18))
40206 +#define TCR_LBK0 ((1<<17))
40207 +#define TCR_CRC ((1<<16))
40208 +#define TCR_SRL_MASK ((1<<15)|(1<<14)|(1<<13)|(1<<12)|(1<<11)|(1<<10)|(1<<9)|(1<<8))
40209 +#define TCR_LRL_MASK ((1<<0)|(1<<1)|(1<<2)|(1<<3)|(1<<4)|(1<<5)|(1<<6)|(1<<7))
40210 +#define TCR_PROBE_NOTIMESTAMP_SHIFT 29 //rtl8185
40211 +
40212 + RX_CONF = 0x044,
40213 +#define MAC_FILTER_MASK ((1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<5) | \
40214 +(1<<12) | (1<<18) | (1<<19) | (1<<20) | (1<<21) | (1<<22) | (1<<23))
40215 +#define RX_CHECK_BSSID_SHIFT 23
40216 +#define ACCEPT_PWR_FRAME_SHIFT 22
40217 +#define ACCEPT_MNG_FRAME_SHIFT 20
40218 +#define ACCEPT_CTL_FRAME_SHIFT 19
40219 +#define ACCEPT_DATA_FRAME_SHIFT 18
40220 +#define ACCEPT_ICVERR_FRAME_SHIFT 12
40221 +#define ACCEPT_CRCERR_FRAME_SHIFT 5
40222 +#define ACCEPT_BCAST_FRAME_SHIFT 3
40223 +#define ACCEPT_MCAST_FRAME_SHIFT 2
40224 +#define ACCEPT_ALLMAC_FRAME_SHIFT 0
40225 +#define ACCEPT_NICMAC_FRAME_SHIFT 1
40226 +#define RX_FIFO_THRESHOLD_MASK ((1<<13) | (1<<14) | (1<<15))
40227 +#define RX_FIFO_THRESHOLD_SHIFT 13
40228 +#define RX_FIFO_THRESHOLD_128 3
40229 +#define RX_FIFO_THRESHOLD_256 4
40230 +#define RX_FIFO_THRESHOLD_512 5
40231 +#define RX_FIFO_THRESHOLD_1024 6
40232 +#define RX_FIFO_THRESHOLD_NONE 7
40233 +#define RX_AUTORESETPHY_SHIFT 28
40234 +#define MAX_RX_DMA_MASK ((1<<8) | (1<<9) | (1<<10))
40235 +#define MAX_RX_DMA_2048 7
40236 +#define MAX_RX_DMA_1024 6
40237 +#define MAX_RX_DMA_SHIFT 10
40238 +#define RCR_ONLYERLPKT ((1<<31))
40239 +#define RCR_CS_SHIFT 29
40240 +#define RCR_CS_MASK ((1<<30) | (1<<29))
40241 +#define RCR_ENMARP ((1<<28))
40242 +#define RCR_CBSSID ((1<<23))
40243 +#define RCR_APWRMGT ((1<<22))
40244 +#define RCR_ADD3 ((1<<21))
40245 +#define RCR_AMF ((1<<20))
40246 +#define RCR_ACF ((1<<19))
40247 +#define RCR_ADF ((1<<18))
40248 +#define RCR_RXFTH ((1<<15)|(1<<14)|(1<<13))
40249 +#define RCR_RXFTH2 ((1<<15))
40250 +#define RCR_RXFTH1 ((1<<14))
40251 +#define RCR_RXFTH0 ((1<<13))
40252 +#define RCR_AICV ((1<<12))
40253 +#define RCR_MXDMA ((1<<10)|(1<< 9)|(1<< 8))
40254 +#define RCR_MXDMA2 ((1<<10))
40255 +#define RCR_MXDMA1 ((1<< 9))
40256 +#define RCR_MXDMA0 ((1<< 8))
40257 +#define RCR_9356SEL ((1<< 6))
40258 +#define RCR_ACRC32 ((1<< 5))
40259 +#define RCR_AB ((1<< 3))
40260 +#define RCR_AM ((1<< 2))
40261 +#define RCR_APM ((1<< 1))
40262 +#define RCR_AAP ((1<< 0))
40263 +
40264 + INT_TIMEOUT = 0x048,
40265 +
40266 + TX_BEACON_RING_ADDR = 0x04c,
40267 +
40268 +#endif
40269 +#if 0
40270 + CONFIG0 = 0x051,
40271 +#define CONFIG0_WEP104 ((1<<6))
40272 +#define CONFIG0_LEDGPO_En ((1<<4))
40273 +#define CONFIG0_Aux_Status ((1<<3))
40274 +#define CONFIG0_GL ((1<<1)|(1<<0))
40275 +#define CONFIG0_GL1 ((1<<1))
40276 +#define CONFIG0_GL0 ((1<<0))
40277 + CONFIG1 = 0x052,
40278 +#define CONFIG1_LEDS ((1<<7)|(1<<6))
40279 +#define CONFIG1_LEDS1 ((1<<7))
40280 +#define CONFIG1_LEDS0 ((1<<6))
40281 +#define CONFIG1_LWACT ((1<<4))
40282 +#define CONFIG1_MEMMAP ((1<<3))
40283 +#define CONFIG1_IOMAP ((1<<2))
40284 +#define CONFIG1_VPD ((1<<1))
40285 +#define CONFIG1_PMEn ((1<<0))
40286 + CONFIG2 = 0x053,
40287 +#define CONFIG2_LCK ((1<<7))
40288 +#define CONFIG2_ANT ((1<<6))
40289 +#define CONFIG2_DPS ((1<<3))
40290 +#define CONFIG2_PAPE_sign ((1<<2))
40291 +#define CONFIG2_PAPE_time ((1<<1)|(1<<0))
40292 +#define CONFIG2_PAPE_time1 ((1<<1))
40293 +#define CONFIG2_PAPE_time0 ((1<<0))
40294 + ANA_PARAM = 0x054,
40295 + CONFIG3 = 0x059,
40296 +#define CONFIG3_GNTSel ((1<<7))
40297 +#define CONFIG3_PARM_En ((1<<6))
40298 +#define CONFIG3_Magic ((1<<5))
40299 +#define CONFIG3_CardB_En ((1<<3))
40300 +#define CONFIG3_CLKRUN_En ((1<<2))
40301 +#define CONFIG3_FuncRegEn ((1<<1))
40302 +#define CONFIG3_FBtbEn ((1<<0))
40303 +#define CONFIG3_CLKRUN_SHIFT 2
40304 +#define CONFIG3_ANAPARAM_W_SHIFT 6
40305 + CONFIG4 = 0x05a,
40306 +#define CONFIG4_VCOPDN ((1<<7))
40307 +#define CONFIG4_PWROFF ((1<<6))
40308 +#define CONFIG4_PWRMGT ((1<<5))
40309 +#define CONFIG4_LWPME ((1<<4))
40310 +#define CONFIG4_LWPTN ((1<<2))
40311 +#define CONFIG4_RFTYPE ((1<<1)|(1<<0))
40312 +#define CONFIG4_RFTYPE1 ((1<<1))
40313 +#define CONFIG4_RFTYPE0 ((1<<0))
40314 + TESTR = 0x05b,
40315 +#define TFPC_AC 0x05C
40316 +
40317 +#define SCR 0x05F
40318 + PGSELECT = 0x05e,
40319 +#define PGSELECT_PG_SHIFT 0
40320 + SECURITY = 0x05f,
40321 +#define SECURITY_WEP_TX_ENABLE_SHIFT 1
40322 +#define SECURITY_WEP_RX_ENABLE_SHIFT 0
40323 +#define SECURITY_ENCRYP_104 1
40324 +#define SECURITY_ENCRYP_SHIFT 4
40325 +#define SECURITY_ENCRYP_MASK ((1<<4)|(1<<5))
40326 +
40327 + ANA_PARAM2 = 0x060,
40328 + BEACON_INTERVAL = 0x070,
40329 +#define BEACON_INTERVAL_MASK ((1<<0)|(1<<1)|(1<<2)|(1<<3)|(1<<4)|(1<<5)| \
40330 +(1<<6)|(1<<7)|(1<<8)|(1<<9))
40331 +
40332 + ATIM_WND = 0x072,
40333 +#define ATIM_WND_MASK (0x01FF)
40334 +
40335 + BCN_INTR_ITV = 0x074,
40336 +#define BCN_INTR_ITV_MASK (0x01FF)
40337 +
40338 + ATIM_INTR_ITV = 0x076,
40339 +#define ATIM_INTR_ITV_MASK (0x01FF)
40340 +
40341 + AckTimeOutReg = 0x079, //ACK timeout register, in unit of 4 us.
40342 + PHY_ADR = 0x07c,
40343 + PHY_READ = 0x07e,
40344 + RFPinsOutput = 0x080,
40345 + RFPinsEnable = 0x082,
40346 +//Page 0
40347 + RFPinsSelect = 0x084,
40348 +#define SW_CONTROL_GPIO 0x400
40349 + RFPinsInput = 0x086,
40350 + RF_PARA = 0x088,
40351 + RF_TIMING = 0x08c,
40352 + GP_ENABLE = 0x090,
40353 + GPIO = 0x091,
40354 + TX_AGC_CTL = 0x09c,
40355 +#define TX_AGC_CTL_PER_PACKET_TXAGC 0x01
40356 +#define TX_AGC_CTL_PERPACKET_GAIN_SHIFT 0
40357 +#define TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT 1
40358 +#define TX_AGC_CTL_FEEDBACK_ANT 2
40359 +#define TXAGC_CTL_PER_PACKET_ANT_SEL 0x02
40360 + OFDM_TXAGC = 0x09e,
40361 + ANTSEL = 0x09f,
40362 +
40363 +
40364 +
40365 + SIFS = 0x0b4,
40366 + DIFS = 0x0b5,
40367 + SLOT = 0x0b6,
40368 + CW_CONF = 0x0bc,
40369 +#define CW_CONF_PERPACKET_RETRY_LIMIT 0x02
40370 +#define CW_CONF_PERPACKET_CW 0x01
40371 +#define CW_CONF_PERPACKET_RETRY_SHIFT 1
40372 +#define CW_CONF_PERPACKET_CW_SHIFT 0
40373 + CW_VAL = 0x0bd,
40374 + RATE_FALLBACK = 0x0be,
40375 +#define MAX_RESP_RATE_SHIFT 4
40376 +#define MIN_RESP_RATE_SHIFT 0
40377 +#define RATE_FALLBACK_CTL_ENABLE 0x80
40378 +#define RATE_FALLBACK_CTL_AUTO_STEP0 0x00
40379 + ACM_CONTROL = 0x0BF, // ACM Control Registe
40380 +//----------------------------------------------------------------------------
40381 +// 8187B ACM_CONTROL bits (Offset 0xBF, 1 Byte)
40382 +//----------------------------------------------------------------------------
40383 +#define VOQ_ACM_EN (0x01 << 7) //BIT7
40384 +#define VIQ_ACM_EN (0x01 << 6) //BIT6
40385 +#define BEQ_ACM_EN (0x01 << 5) //BIT5
40386 +#define ACM_HW_EN (0x01 << 4) //BIT4
40387 +#define TXOPSEL (0x01 << 3) //BIT3
40388 +#define VOQ_ACM_CTL (0x01 << 2) //BIT2 // Set to 1 when AC_VO used time reaches or exceeds the admitted time
40389 +#define VIQ_ACM_CTL (0x01 << 1) //BIT1 // Set to 1 when AC_VI used time reaches or exceeds the admitted time
40390 +#define BEQ_ACM_CTL (0x01 << 0) //BIT0 // Set to 1 when AC_BE used time reaches or exceeds the admitted time
40391 + CONFIG5 = 0x0D8,
40392 +#define CONFIG5_TX_FIFO_OK ((1<<7))
40393 +#define CONFIG5_RX_FIFO_OK ((1<<6))
40394 +#define CONFIG5_CALON ((1<<5))
40395 +#define CONFIG5_EACPI ((1<<2))
40396 +#define CONFIG5_LANWake ((1<<1))
40397 +#define CONFIG5_PME_STS ((1<<0))
40398 + TX_DMA_POLLING = 0x0fd,
40399 +#define TX_DMA_POLLING_BEACON_SHIFT 7
40400 +#define TX_DMA_POLLING_HIPRIORITY_SHIFT 6
40401 +#define TX_DMA_POLLING_NORMPRIORITY_SHIFT 5
40402 +#define TX_DMA_POLLING_LOWPRIORITY_SHIFT 4
40403 +#define TX_DMA_STOP_BEACON_SHIFT 3
40404 +#define TX_DMA_STOP_HIPRIORITY_SHIFT 2
40405 +#define TX_DMA_STOP_NORMPRIORITY_SHIFT 1
40406 +#define TX_DMA_STOP_LOWPRIORITY_SHIFT 0
40407 + CWR = 0x0DC,
40408 + RetryCTR = 0x0DE,
40409 + INT_MIG = 0x0E2, // Interrupt Migration (0xE2 ~ 0xE3)
40410 + TID_AC_MAP = 0x0E8, // TID to AC Mapping Register
40411 + ANA_PARAM3 = 0x0EE,
40412 +
40413 +
40414 +//page 1
40415 + Wakeup0 = 0x084,
40416 + Wakeup1 = 0x08C,
40417 + Wakeup2LD = 0x094,
40418 + Wakeup2HD = 0x09C,
40419 + Wakeup3LD = 0x0A4,
40420 + Wakeup3HD = 0x0AC,
40421 + Wakeup4LD = 0x0B4,
40422 + Wakeup4HD = 0x0BC,
40423 + CRC0 = 0x0C4,
40424 + CRC1 = 0x0C6,
40425 + CRC2 = 0x0C8,
40426 + CRC3 = 0x0CA,
40427 + CRC4 = 0x0CC,
40428 +/* 0x00CE - 0x00D3 - reserved */
40429 +
40430 + RFSW_CTRL = 0x272, // 0x272-0x273.
40431 +
40432 +/**************************************************************************/
40433 + FER = 0x0F0,
40434 + FEMR = 0x0F4,
40435 + FPSR = 0x0F8,
40436 + FFER = 0x0FC,
40437 +
40438 + AC_VO_PARAM = 0x0F0, // AC_VO Parameters Record
40439 + AC_VI_PARAM = 0x0F4, // AC_VI Parameters Record
40440 + AC_BE_PARAM = 0x0F8, // AC_BE Parameters Record
40441 + AC_BK_PARAM = 0x0FC, // AC_BK Parameters Record
40442 + TALLY_SEL = 0x0fc,
40443 +#endif
40444 +}
40445 +;
40446 +//----------------------------------------------------------------------------
40447 +// 818xB AnaParm & AnaParm2 Register
40448 +//----------------------------------------------------------------------------
40449 +//#define ANAPARM_ASIC_ON 0x45090658
40450 +//#define ANAPARM2_ASIC_ON 0x727f3f52
40451 +
40452 +#define GPI 0x108
40453 +#define GPO 0x109
40454 +#define GPE 0x10a
40455 +#endif
40456 --- /dev/null
40457 +++ b/drivers/staging/rtl8192e/r8192E_wx.c
40458 @@ -0,0 +1,1409 @@
40459 +/*
40460 + This file contains wireless extension handlers.
40461 +
40462 + This is part of rtl8180 OpenSource driver.
40463 + Copyright (C) Andrea Merello 2004-2005 <andreamrl@tiscali.it>
40464 + Released under the terms of GPL (General Public Licence)
40465 +
40466 + Parts of this driver are based on the GPL part
40467 + of the official realtek driver.
40468 +
40469 + Parts of this driver are based on the rtl8180 driver skeleton
40470 + from Patric Schenke & Andres Salomon.
40471 +
40472 + Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver.
40473 +
40474 + We want to tanks the Authors of those projects and the Ndiswrapper
40475 + project Authors.
40476 +*/
40477 +
40478 +#include <linux/string.h>
40479 +#include "r8192E.h"
40480 +#include "r8192E_hw.h"
40481 +#include "r8192E_wx.h"
40482 +#ifdef ENABLE_DOT11D
40483 +#include "dot11d.h"
40484 +#endif
40485 +
40486 +#define RATE_COUNT 12
40487 +static u32 rtl8180_rates[] = {1000000,2000000,5500000,11000000,
40488 + 6000000,9000000,12000000,18000000,24000000,36000000,48000000,54000000};
40489 +
40490 +
40491 +#ifndef ENETDOWN
40492 +#define ENETDOWN 1
40493 +#endif
40494 +static int r8192_wx_get_freq(struct net_device *dev,
40495 + struct iw_request_info *a,
40496 + union iwreq_data *wrqu, char *b)
40497 +{
40498 + struct r8192_priv *priv = ieee80211_priv(dev);
40499 +
40500 + return ieee80211_wx_get_freq(priv->ieee80211,a,wrqu,b);
40501 +}
40502 +
40503 +
40504 +#if 0
40505 +
40506 +static int r8192_wx_set_beaconinterval(struct net_device *dev, struct iw_request_info *aa,
40507 + union iwreq_data *wrqu, char *b)
40508 +{
40509 + int *parms = (int *)b;
40510 + int bi = parms[0];
40511 +
40512 + struct r8192_priv *priv = ieee80211_priv(dev);
40513 +
40514 + down(&priv->wx_sem);
40515 + DMESG("setting beacon interval to %x",bi);
40516 +
40517 + priv->ieee80211->beacon_interval=bi;
40518 + rtl8180_commit(dev);
40519 + up(&priv->wx_sem);
40520 +
40521 + return 0;
40522 +}
40523 +
40524 +
40525 +static int r8192_wx_set_forceassociate(struct net_device *dev, struct iw_request_info *aa,
40526 + union iwreq_data *wrqu, char *extra)
40527 +{
40528 + struct r8192_priv *priv=ieee80211_priv(dev);
40529 + int *parms = (int *)extra;
40530 +
40531 + priv->ieee80211->force_associate = (parms[0] > 0);
40532 +
40533 +
40534 + return 0;
40535 +}
40536 +
40537 +#endif
40538 +static int r8192_wx_get_mode(struct net_device *dev, struct iw_request_info *a,
40539 + union iwreq_data *wrqu, char *b)
40540 +{
40541 + struct r8192_priv *priv=ieee80211_priv(dev);
40542 +
40543 + return ieee80211_wx_get_mode(priv->ieee80211,a,wrqu,b);
40544 +}
40545 +
40546 +
40547 +
40548 +static int r8192_wx_get_rate(struct net_device *dev,
40549 + struct iw_request_info *info,
40550 + union iwreq_data *wrqu, char *extra)
40551 +{
40552 + struct r8192_priv *priv = ieee80211_priv(dev);
40553 + return ieee80211_wx_get_rate(priv->ieee80211,info,wrqu,extra);
40554 +}
40555 +
40556 +
40557 +
40558 +static int r8192_wx_set_rate(struct net_device *dev,
40559 + struct iw_request_info *info,
40560 + union iwreq_data *wrqu, char *extra)
40561 +{
40562 + int ret;
40563 + struct r8192_priv *priv = ieee80211_priv(dev);
40564 +
40565 + down(&priv->wx_sem);
40566 +
40567 + ret = ieee80211_wx_set_rate(priv->ieee80211,info,wrqu,extra);
40568 +
40569 + up(&priv->wx_sem);
40570 +
40571 + return ret;
40572 +}
40573 +
40574 +
40575 +static int r8192_wx_set_rts(struct net_device *dev,
40576 + struct iw_request_info *info,
40577 + union iwreq_data *wrqu, char *extra)
40578 +{
40579 + int ret;
40580 + struct r8192_priv *priv = ieee80211_priv(dev);
40581 +
40582 + down(&priv->wx_sem);
40583 +
40584 + ret = ieee80211_wx_set_rts(priv->ieee80211,info,wrqu,extra);
40585 +
40586 + up(&priv->wx_sem);
40587 +
40588 + return ret;
40589 +}
40590 +
40591 +static int r8192_wx_get_rts(struct net_device *dev,
40592 + struct iw_request_info *info,
40593 + union iwreq_data *wrqu, char *extra)
40594 +{
40595 + struct r8192_priv *priv = ieee80211_priv(dev);
40596 + return ieee80211_wx_get_rts(priv->ieee80211,info,wrqu,extra);
40597 +}
40598 +
40599 +static int r8192_wx_set_power(struct net_device *dev,
40600 + struct iw_request_info *info,
40601 + union iwreq_data *wrqu, char *extra)
40602 +{
40603 + int ret;
40604 + struct r8192_priv *priv = ieee80211_priv(dev);
40605 +
40606 + down(&priv->wx_sem);
40607 +
40608 + ret = ieee80211_wx_set_power(priv->ieee80211,info,wrqu,extra);
40609 +
40610 + up(&priv->wx_sem);
40611 +
40612 + return ret;
40613 +}
40614 +
40615 +static int r8192_wx_get_power(struct net_device *dev,
40616 + struct iw_request_info *info,
40617 + union iwreq_data *wrqu, char *extra)
40618 +{
40619 + struct r8192_priv *priv = ieee80211_priv(dev);
40620 + return ieee80211_wx_get_power(priv->ieee80211,info,wrqu,extra);
40621 +}
40622 +
40623 +#ifdef JOHN_IOCTL
40624 +u16 read_rtl8225(struct net_device *dev, u8 addr);
40625 +void write_rtl8225(struct net_device *dev, u8 adr, u16 data);
40626 +u32 john_read_rtl8225(struct net_device *dev, u8 adr);
40627 +void _write_rtl8225(struct net_device *dev, u8 adr, u16 data);
40628 +
40629 +static int r8192_wx_read_regs(struct net_device *dev,
40630 + struct iw_request_info *info,
40631 + union iwreq_data *wrqu, char *extra)
40632 +{
40633 + struct r8192_priv *priv = ieee80211_priv(dev);
40634 + u8 addr;
40635 + u16 data1;
40636 +
40637 + down(&priv->wx_sem);
40638 +
40639 +
40640 + get_user(addr,(u8*)wrqu->data.pointer);
40641 + data1 = read_rtl8225(dev, addr);
40642 + wrqu->data.length = data1;
40643 +
40644 + up(&priv->wx_sem);
40645 + return 0;
40646 +
40647 +}
40648 +
40649 +static int r8192_wx_write_regs(struct net_device *dev,
40650 + struct iw_request_info *info,
40651 + union iwreq_data *wrqu, char *extra)
40652 +{
40653 + struct r8192_priv *priv = ieee80211_priv(dev);
40654 + u8 addr;
40655 +
40656 + down(&priv->wx_sem);
40657 +
40658 + get_user(addr, (u8*)wrqu->data.pointer);
40659 + write_rtl8225(dev, addr, wrqu->data.length);
40660 +
40661 + up(&priv->wx_sem);
40662 + return 0;
40663 +
40664 +}
40665 +
40666 +void rtl8187_write_phy(struct net_device *dev, u8 adr, u32 data);
40667 +u8 rtl8187_read_phy(struct net_device *dev,u8 adr, u32 data);
40668 +
40669 +static int r8192_wx_read_bb(struct net_device *dev,
40670 + struct iw_request_info *info,
40671 + union iwreq_data *wrqu, char *extra)
40672 +{
40673 + struct r8192_priv *priv = ieee80211_priv(dev);
40674 + u8 databb;
40675 +#if 0
40676 + int i;
40677 + for(i=0;i<12;i++) printk("%8x\n", read_cam(dev, i) );
40678 +#endif
40679 +
40680 + down(&priv->wx_sem);
40681 +
40682 + databb = rtl8187_read_phy(dev, (u8)wrqu->data.length, 0x00000000);
40683 + wrqu->data.length = databb;
40684 +
40685 + up(&priv->wx_sem);
40686 + return 0;
40687 +}
40688 +
40689 +void rtl8187_write_phy(struct net_device *dev, u8 adr, u32 data);
40690 +static int r8192_wx_write_bb(struct net_device *dev,
40691 + struct iw_request_info *info,
40692 + union iwreq_data *wrqu, char *extra)
40693 +{
40694 + struct r8192_priv *priv = ieee80211_priv(dev);
40695 + u8 databb;
40696 +
40697 + down(&priv->wx_sem);
40698 +
40699 + get_user(databb, (u8*)wrqu->data.pointer);
40700 + rtl8187_write_phy(dev, wrqu->data.length, databb);
40701 +
40702 + up(&priv->wx_sem);
40703 + return 0;
40704 +
40705 +}
40706 +
40707 +
40708 +static int r8192_wx_write_nicb(struct net_device *dev,
40709 + struct iw_request_info *info,
40710 + union iwreq_data *wrqu, char *extra)
40711 +{
40712 + struct r8192_priv *priv = ieee80211_priv(dev);
40713 + u32 addr;
40714 +
40715 + down(&priv->wx_sem);
40716 +
40717 + get_user(addr, (u32*)wrqu->data.pointer);
40718 + write_nic_byte(dev, addr, wrqu->data.length);
40719 +
40720 + up(&priv->wx_sem);
40721 + return 0;
40722 +
40723 +}
40724 +static int r8192_wx_read_nicb(struct net_device *dev,
40725 + struct iw_request_info *info,
40726 + union iwreq_data *wrqu, char *extra)
40727 +{
40728 + struct r8192_priv *priv = ieee80211_priv(dev);
40729 + u32 addr;
40730 + u16 data1;
40731 +
40732 + down(&priv->wx_sem);
40733 +
40734 + get_user(addr,(u32*)wrqu->data.pointer);
40735 + data1 = read_nic_byte(dev, addr);
40736 + wrqu->data.length = data1;
40737 +
40738 + up(&priv->wx_sem);
40739 + return 0;
40740 +}
40741 +
40742 +static int r8192_wx_get_ap_status(struct net_device *dev,
40743 + struct iw_request_info *info,
40744 + union iwreq_data *wrqu, char *extra)
40745 +{
40746 + struct r8192_priv *priv = ieee80211_priv(dev);
40747 + struct ieee80211_device *ieee = priv->ieee80211;
40748 + struct ieee80211_network *target;
40749 + int name_len;
40750 +
40751 + down(&priv->wx_sem);
40752 +
40753 + //count the length of input ssid
40754 + for(name_len=0 ; ((char*)wrqu->data.pointer)[name_len]!='\0' ; name_len++);
40755 +
40756 + //search for the correspoding info which is received
40757 + list_for_each_entry(target, &ieee->network_list, list) {
40758 + if ( (target->ssid_len == name_len) &&
40759 + (strncmp(target->ssid, (char*)wrqu->data.pointer, name_len)==0)){
40760 + if(target->wpa_ie_len>0 || target->rsn_ie_len>0 )
40761 + //set flags=1 to indicate this ap is WPA
40762 + wrqu->data.flags = 1;
40763 + else wrqu->data.flags = 0;
40764 +
40765 +
40766 + break;
40767 + }
40768 + }
40769 +
40770 + up(&priv->wx_sem);
40771 + return 0;
40772 +}
40773 +
40774 +
40775 +
40776 +#endif
40777 +
40778 +static int r8192_wx_set_rawtx(struct net_device *dev,
40779 + struct iw_request_info *info,
40780 + union iwreq_data *wrqu, char *extra)
40781 +{
40782 + struct r8192_priv *priv = ieee80211_priv(dev);
40783 + int ret;
40784 +
40785 + down(&priv->wx_sem);
40786 +
40787 + ret = ieee80211_wx_set_rawtx(priv->ieee80211, info, wrqu, extra);
40788 +
40789 + up(&priv->wx_sem);
40790 +
40791 + return ret;
40792 +
40793 +}
40794 +
40795 +static int r8192_wx_force_reset(struct net_device *dev,
40796 + struct iw_request_info *info,
40797 + union iwreq_data *wrqu, char *extra)
40798 +{
40799 + struct r8192_priv *priv = ieee80211_priv(dev);
40800 +
40801 + down(&priv->wx_sem);
40802 +
40803 + printk("%s(): force reset ! extra is %d\n",__FUNCTION__, *extra);
40804 + priv->force_reset = *extra;
40805 + up(&priv->wx_sem);
40806 + return 0;
40807 +
40808 +}
40809 +
40810 +
40811 +static int r8192_wx_set_crcmon(struct net_device *dev,
40812 + struct iw_request_info *info,
40813 + union iwreq_data *wrqu, char *extra)
40814 +{
40815 + struct r8192_priv *priv = ieee80211_priv(dev);
40816 + int *parms = (int *)extra;
40817 + int enable = (parms[0] > 0);
40818 + short prev = priv->crcmon;
40819 +
40820 + down(&priv->wx_sem);
40821 +
40822 + if(enable)
40823 + priv->crcmon=1;
40824 + else
40825 + priv->crcmon=0;
40826 +
40827 + DMESG("bad CRC in monitor mode are %s",
40828 + priv->crcmon ? "accepted" : "rejected");
40829 +
40830 + if(prev != priv->crcmon && priv->up){
40831 + //rtl8180_down(dev);
40832 + //rtl8180_up(dev);
40833 + }
40834 +
40835 + up(&priv->wx_sem);
40836 +
40837 + return 0;
40838 +}
40839 +
40840 +static int r8192_wx_set_mode(struct net_device *dev, struct iw_request_info *a,
40841 + union iwreq_data *wrqu, char *b)
40842 +{
40843 + struct r8192_priv *priv = ieee80211_priv(dev);
40844 + RT_RF_POWER_STATE rtState;
40845 + int ret;
40846 +
40847 + rtState = priv->ieee80211->eRFPowerState;
40848 + down(&priv->wx_sem);
40849 +#ifdef ENABLE_IPS
40850 + if(wrqu->mode == IW_MODE_ADHOC){
40851 +
40852 + if(priv->ieee80211->PowerSaveControl.bInactivePs){
40853 + if(rtState == eRfOff){
40854 + if(priv->ieee80211->RfOffReason > RF_CHANGE_BY_IPS)
40855 + {
40856 + RT_TRACE(COMP_ERR, "%s(): RF is OFF.\n",__FUNCTION__);
40857 + up(&priv->wx_sem);
40858 + return -1;
40859 + }
40860 + else{
40861 + printk("=========>%s(): IPSLeave\n",__FUNCTION__);
40862 + IPSLeave(dev);
40863 + }
40864 + }
40865 + }
40866 + }
40867 +#endif
40868 + ret = ieee80211_wx_set_mode(priv->ieee80211,a,wrqu,b);
40869 +
40870 + //rtl8187_set_rxconf(dev);
40871 +
40872 + up(&priv->wx_sem);
40873 + return ret;
40874 +}
40875 +
40876 +struct iw_range_with_scan_capa
40877 +{
40878 + /* Informative stuff (to choose between different interface) */
40879 + __u32 throughput; /* To give an idea... */
40880 + /* In theory this value should be the maximum benchmarked
40881 + * TCP/IP throughput, because with most of these devices the
40882 + * bit rate is meaningless (overhead an co) to estimate how
40883 + * fast the connection will go and pick the fastest one.
40884 + * I suggest people to play with Netperf or any benchmark...
40885 + */
40886 +
40887 + /* NWID (or domain id) */
40888 + __u32 min_nwid; /* Minimal NWID we are able to set */
40889 + __u32 max_nwid; /* Maximal NWID we are able to set */
40890 +
40891 + /* Old Frequency (backward compat - moved lower ) */
40892 + __u16 old_num_channels;
40893 + __u8 old_num_frequency;
40894 +
40895 + /* Scan capabilities */
40896 + __u8 scan_capa;
40897 +};
40898 +static int rtl8180_wx_get_range(struct net_device *dev,
40899 + struct iw_request_info *info,
40900 + union iwreq_data *wrqu, char *extra)
40901 +{
40902 + struct iw_range *range = (struct iw_range *)extra;
40903 + struct iw_range_with_scan_capa* tmp = (struct iw_range_with_scan_capa*)range;
40904 + struct r8192_priv *priv = ieee80211_priv(dev);
40905 + u16 val;
40906 + int i;
40907 +
40908 + wrqu->data.length = sizeof(*range);
40909 + memset(range, 0, sizeof(*range));
40910 +
40911 + /* Let's try to keep this struct in the same order as in
40912 + * linux/include/wireless.h
40913 + */
40914 +
40915 + /* TODO: See what values we can set, and remove the ones we can't
40916 + * set, or fill them with some default data.
40917 + */
40918 +
40919 + /* ~5 Mb/s real (802.11b) */
40920 + range->throughput = 5 * 1000 * 1000;
40921 +
40922 + // TODO: Not used in 802.11b?
40923 +// range->min_nwid; /* Minimal NWID we are able to set */
40924 + // TODO: Not used in 802.11b?
40925 +// range->max_nwid; /* Maximal NWID we are able to set */
40926 +
40927 + /* Old Frequency (backward compat - moved lower ) */
40928 +// range->old_num_channels;
40929 +// range->old_num_frequency;
40930 +// range->old_freq[6]; /* Filler to keep "version" at the same offset */
40931 + if(priv->rf_set_sens != NULL)
40932 + range->sensitivity = priv->max_sens; /* signal level threshold range */
40933 +
40934 + range->max_qual.qual = 100;
40935 + /* TODO: Find real max RSSI and stick here */
40936 + range->max_qual.level = 0;
40937 + range->max_qual.noise = -98;
40938 + range->max_qual.updated = 7; /* Updated all three */
40939 +
40940 + range->avg_qual.qual = 92; /* > 8% missed beacons is 'bad' */
40941 + /* TODO: Find real 'good' to 'bad' threshol value for RSSI */
40942 + range->avg_qual.level = 20 + -98;
40943 + range->avg_qual.noise = 0;
40944 + range->avg_qual.updated = 7; /* Updated all three */
40945 +
40946 + range->num_bitrates = RATE_COUNT;
40947 +
40948 + for (i = 0; i < RATE_COUNT && i < IW_MAX_BITRATES; i++) {
40949 + range->bitrate[i] = rtl8180_rates[i];
40950 + }
40951 +
40952 + range->min_frag = MIN_FRAG_THRESHOLD;
40953 + range->max_frag = MAX_FRAG_THRESHOLD;
40954 +
40955 + range->min_pmp=0;
40956 + range->max_pmp = 5000000;
40957 + range->min_pmt = 0;
40958 + range->max_pmt = 65535*1000;
40959 + range->pmp_flags = IW_POWER_PERIOD;
40960 + range->pmt_flags = IW_POWER_TIMEOUT;
40961 + range->pm_capa = IW_POWER_PERIOD | IW_POWER_TIMEOUT | IW_POWER_ALL_R;
40962 + range->we_version_compiled = WIRELESS_EXT;
40963 + range->we_version_source = 16;
40964 +
40965 +// range->retry_capa; /* What retry options are supported */
40966 +// range->retry_flags; /* How to decode max/min retry limit */
40967 +// range->r_time_flags; /* How to decode max/min retry life */
40968 +// range->min_retry; /* Minimal number of retries */
40969 +// range->max_retry; /* Maximal number of retries */
40970 +// range->min_r_time; /* Minimal retry lifetime */
40971 +// range->max_r_time; /* Maximal retry lifetime */
40972 +
40973 +
40974 + for (i = 0, val = 0; i < 14; i++) {
40975 +
40976 + // Include only legal frequencies for some countries
40977 +#ifdef ENABLE_DOT11D
40978 + if ((GET_DOT11D_INFO(priv->ieee80211)->channel_map)[i+1]) {
40979 +#else
40980 + if ((priv->ieee80211->channel_map)[i+1]) {
40981 +#endif
40982 + range->freq[val].i = i + 1;
40983 + range->freq[val].m = ieee80211_wlan_frequencies[i] * 100000;
40984 + range->freq[val].e = 1;
40985 + val++;
40986 + } else {
40987 + // FIXME: do we need to set anything for channels
40988 + // we don't use ?
40989 + }
40990 +
40991 + if (val == IW_MAX_FREQUENCIES)
40992 + break;
40993 + }
40994 + range->num_frequency = val;
40995 + range->num_channels = val;
40996 +#if WIRELESS_EXT > 17
40997 + range->enc_capa = IW_ENC_CAPA_WPA|IW_ENC_CAPA_WPA2|
40998 + IW_ENC_CAPA_CIPHER_TKIP|IW_ENC_CAPA_CIPHER_CCMP;
40999 +#endif
41000 + tmp->scan_capa = 0x01;
41001 + return 0;
41002 +}
41003 +
41004 +
41005 +static int r8192_wx_set_scan(struct net_device *dev, struct iw_request_info *a,
41006 + union iwreq_data *wrqu, char *b)
41007 +{
41008 + struct r8192_priv *priv = ieee80211_priv(dev);
41009 + struct ieee80211_device* ieee = priv->ieee80211;
41010 + RT_RF_POWER_STATE rtState;
41011 + int ret;
41012 + rtState = priv->ieee80211->eRFPowerState;
41013 + if(!priv->up) return -ENETDOWN;
41014 + if (priv->ieee80211->LinkDetectInfo.bBusyTraffic == true)
41015 + return -EAGAIN;
41016 +
41017 + if (wrqu->data.flags & IW_SCAN_THIS_ESSID)
41018 + {
41019 + struct iw_scan_req* req = (struct iw_scan_req*)b;
41020 + if (req->essid_len)
41021 + {
41022 + //printk("==**&*&*&**===>scan set ssid:%s\n", req->essid);
41023 + ieee->current_network.ssid_len = req->essid_len;
41024 + memcpy(ieee->current_network.ssid, req->essid, req->essid_len);
41025 + //printk("=====>network ssid:%s\n", ieee->current_network.ssid);
41026 + }
41027 + }
41028 +
41029 + down(&priv->wx_sem);
41030 +#ifdef ENABLE_IPS
41031 + priv->ieee80211->actscanning = true;
41032 + if(priv->ieee80211->state != IEEE80211_LINKED){
41033 + if(priv->ieee80211->PowerSaveControl.bInactivePs){
41034 + if(rtState == eRfOff){
41035 + if(priv->ieee80211->RfOffReason > RF_CHANGE_BY_IPS)
41036 + {
41037 + RT_TRACE(COMP_ERR, "%s(): RF is OFF.\n",__FUNCTION__);
41038 + up(&priv->wx_sem);
41039 + return -1;
41040 + }
41041 + else{
41042 + printk("=========>%s(): IPSLeave\n",__FUNCTION__);
41043 + IPSLeave(dev);
41044 + }
41045 + }
41046 + }
41047 + priv->ieee80211->scanning = 0;
41048 + ieee80211_softmac_scan_syncro(priv->ieee80211);
41049 + ret = 0;
41050 + }
41051 + else
41052 +#else
41053 +
41054 + if(priv->ieee80211->state != IEEE80211_LINKED){
41055 + priv->ieee80211->scanning = 0;
41056 + ieee80211_softmac_scan_syncro(priv->ieee80211);
41057 + ret = 0;
41058 + }
41059 + else
41060 +#endif
41061 + ret = ieee80211_wx_set_scan(priv->ieee80211,a,wrqu,b);
41062 +
41063 + up(&priv->wx_sem);
41064 + return ret;
41065 +}
41066 +
41067 +
41068 +static int r8192_wx_get_scan(struct net_device *dev, struct iw_request_info *a,
41069 + union iwreq_data *wrqu, char *b)
41070 +{
41071 +
41072 + int ret;
41073 + struct r8192_priv *priv = ieee80211_priv(dev);
41074 +
41075 + if(!priv->up) return -ENETDOWN;
41076 +
41077 + down(&priv->wx_sem);
41078 +
41079 + ret = ieee80211_wx_get_scan(priv->ieee80211,a,wrqu,b);
41080 +
41081 + up(&priv->wx_sem);
41082 +
41083 + return ret;
41084 +}
41085 +
41086 +static int r8192_wx_set_essid(struct net_device *dev,
41087 + struct iw_request_info *a,
41088 + union iwreq_data *wrqu, char *b)
41089 +{
41090 + struct r8192_priv *priv = ieee80211_priv(dev);
41091 + RT_RF_POWER_STATE rtState;
41092 + int ret;
41093 +
41094 + rtState = priv->ieee80211->eRFPowerState;
41095 + down(&priv->wx_sem);
41096 +#ifdef ENABLE_IPS
41097 + if(priv->ieee80211->PowerSaveControl.bInactivePs){
41098 + if(rtState == eRfOff){
41099 + if(priv->ieee80211->RfOffReason > RF_CHANGE_BY_IPS)
41100 + {
41101 + RT_TRACE(COMP_ERR, "%s(): RF is OFF.\n",__FUNCTION__);
41102 + up(&priv->wx_sem);
41103 + return -1;
41104 + }
41105 + else{
41106 + printk("=========>%s(): IPSLeave\n",__FUNCTION__);
41107 + IPSLeave(dev);
41108 + }
41109 + }
41110 + }
41111 +#endif
41112 + ret = ieee80211_wx_set_essid(priv->ieee80211,a,wrqu,b);
41113 +
41114 + up(&priv->wx_sem);
41115 +
41116 + return ret;
41117 +}
41118 +
41119 +
41120 +
41121 +
41122 +static int r8192_wx_get_essid(struct net_device *dev,
41123 + struct iw_request_info *a,
41124 + union iwreq_data *wrqu, char *b)
41125 +{
41126 + int ret;
41127 + struct r8192_priv *priv = ieee80211_priv(dev);
41128 +
41129 + down(&priv->wx_sem);
41130 +
41131 + ret = ieee80211_wx_get_essid(priv->ieee80211, a, wrqu, b);
41132 +
41133 + up(&priv->wx_sem);
41134 +
41135 + return ret;
41136 +}
41137 +
41138 +
41139 +static int r8192_wx_set_freq(struct net_device *dev, struct iw_request_info *a,
41140 + union iwreq_data *wrqu, char *b)
41141 +{
41142 + int ret;
41143 + struct r8192_priv *priv = ieee80211_priv(dev);
41144 +
41145 + down(&priv->wx_sem);
41146 +
41147 + ret = ieee80211_wx_set_freq(priv->ieee80211, a, wrqu, b);
41148 +
41149 + up(&priv->wx_sem);
41150 + return ret;
41151 +}
41152 +
41153 +static int r8192_wx_get_name(struct net_device *dev,
41154 + struct iw_request_info *info,
41155 + union iwreq_data *wrqu, char *extra)
41156 +{
41157 + struct r8192_priv *priv = ieee80211_priv(dev);
41158 + return ieee80211_wx_get_name(priv->ieee80211, info, wrqu, extra);
41159 +}
41160 +
41161 +
41162 +static int r8192_wx_set_frag(struct net_device *dev,
41163 + struct iw_request_info *info,
41164 + union iwreq_data *wrqu, char *extra)
41165 +{
41166 + struct r8192_priv *priv = ieee80211_priv(dev);
41167 +
41168 + if (wrqu->frag.disabled)
41169 + priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
41170 + else {
41171 + if (wrqu->frag.value < MIN_FRAG_THRESHOLD ||
41172 + wrqu->frag.value > MAX_FRAG_THRESHOLD)
41173 + return -EINVAL;
41174 +
41175 + priv->ieee80211->fts = wrqu->frag.value & ~0x1;
41176 + }
41177 +
41178 + return 0;
41179 +}
41180 +
41181 +
41182 +static int r8192_wx_get_frag(struct net_device *dev,
41183 + struct iw_request_info *info,
41184 + union iwreq_data *wrqu, char *extra)
41185 +{
41186 + struct r8192_priv *priv = ieee80211_priv(dev);
41187 +
41188 + wrqu->frag.value = priv->ieee80211->fts;
41189 + wrqu->frag.fixed = 0; /* no auto select */
41190 + wrqu->frag.disabled = (wrqu->frag.value == DEFAULT_FRAG_THRESHOLD);
41191 +
41192 + return 0;
41193 +}
41194 +
41195 +
41196 +static int r8192_wx_set_wap(struct net_device *dev,
41197 + struct iw_request_info *info,
41198 + union iwreq_data *awrq,
41199 + char *extra)
41200 +{
41201 +
41202 + int ret;
41203 + struct r8192_priv *priv = ieee80211_priv(dev);
41204 +// struct sockaddr *temp = (struct sockaddr *)awrq;
41205 +
41206 + down(&priv->wx_sem);
41207 +
41208 + ret = ieee80211_wx_set_wap(priv->ieee80211,info,awrq,extra);
41209 +
41210 + up(&priv->wx_sem);
41211 +
41212 + return ret;
41213 +
41214 +}
41215 +
41216 +
41217 +static int r8192_wx_get_wap(struct net_device *dev,
41218 + struct iw_request_info *info,
41219 + union iwreq_data *wrqu, char *extra)
41220 +{
41221 + struct r8192_priv *priv = ieee80211_priv(dev);
41222 +
41223 + return ieee80211_wx_get_wap(priv->ieee80211,info,wrqu,extra);
41224 +}
41225 +
41226 +
41227 +static int r8192_wx_get_enc(struct net_device *dev,
41228 + struct iw_request_info *info,
41229 + union iwreq_data *wrqu, char *key)
41230 +{
41231 + struct r8192_priv *priv = ieee80211_priv(dev);
41232 +
41233 + return ieee80211_wx_get_encode(priv->ieee80211, info, wrqu, key);
41234 +}
41235 +
41236 +static int r8192_wx_set_enc(struct net_device *dev,
41237 + struct iw_request_info *info,
41238 + union iwreq_data *wrqu, char *key)
41239 +{
41240 + struct r8192_priv *priv = ieee80211_priv(dev);
41241 + int ret;
41242 +
41243 + struct ieee80211_device *ieee = priv->ieee80211;
41244 + //u32 TargetContent;
41245 + u32 hwkey[4]={0,0,0,0};
41246 + u8 mask=0xff;
41247 + u32 key_idx=0;
41248 + u8 zero_addr[4][6] ={ {0x00,0x00,0x00,0x00,0x00,0x00},
41249 + {0x00,0x00,0x00,0x00,0x00,0x01},
41250 + {0x00,0x00,0x00,0x00,0x00,0x02},
41251 + {0x00,0x00,0x00,0x00,0x00,0x03} };
41252 + int i;
41253 +
41254 + if(!priv->up) return -ENETDOWN;
41255 +
41256 + down(&priv->wx_sem);
41257 +
41258 + RT_TRACE(COMP_SEC, "Setting SW wep key");
41259 + ret = ieee80211_wx_set_encode(priv->ieee80211,info,wrqu,key);
41260 +
41261 + up(&priv->wx_sem);
41262 +
41263 +
41264 + //sometimes, the length is zero while we do not type key value
41265 + if(wrqu->encoding.length!=0){
41266 +
41267 + for(i=0 ; i<4 ; i++){
41268 + hwkey[i] |= key[4*i+0]&mask;
41269 + if(i==1&&(4*i+1)==wrqu->encoding.length) mask=0x00;
41270 + if(i==3&&(4*i+1)==wrqu->encoding.length) mask=0x00;
41271 + hwkey[i] |= (key[4*i+1]&mask)<<8;
41272 + hwkey[i] |= (key[4*i+2]&mask)<<16;
41273 + hwkey[i] |= (key[4*i+3]&mask)<<24;
41274 + }
41275 +
41276 + #define CONF_WEP40 0x4
41277 + #define CONF_WEP104 0x14
41278 +
41279 + switch(wrqu->encoding.flags & IW_ENCODE_INDEX){
41280 + case 0: key_idx = ieee->tx_keyidx; break;
41281 + case 1: key_idx = 0; break;
41282 + case 2: key_idx = 1; break;
41283 + case 3: key_idx = 2; break;
41284 + case 4: key_idx = 3; break;
41285 + default: break;
41286 + }
41287 +
41288 + //printk("-------====>length:%d, key_idx:%d, flag:%x\n", wrqu->encoding.length, key_idx, wrqu->encoding.flags);
41289 + if(wrqu->encoding.length==0x5){
41290 + ieee->pairwise_key_type = KEY_TYPE_WEP40;
41291 + EnableHWSecurityConfig8192(dev);
41292 + setKey( dev,
41293 + key_idx, //EntryNo
41294 + key_idx, //KeyIndex
41295 + KEY_TYPE_WEP40, //KeyType
41296 + zero_addr[key_idx],
41297 + 0, //DefaultKey
41298 + hwkey); //KeyContent
41299 +
41300 +#if 0
41301 + if(key_idx == 0){
41302 +
41303 + //write_nic_byte(dev, SECR, 7);
41304 + setKey( dev,
41305 + 4, //EntryNo
41306 + key_idx, //KeyIndex
41307 + KEY_TYPE_WEP40, //KeyType
41308 + broadcast_addr, //addr
41309 + 0, //DefaultKey
41310 + hwkey); //KeyContent
41311 + }
41312 +#endif
41313 + }
41314 +
41315 + else if(wrqu->encoding.length==0xd){
41316 + ieee->pairwise_key_type = KEY_TYPE_WEP104;
41317 + EnableHWSecurityConfig8192(dev);
41318 + setKey( dev,
41319 + key_idx, //EntryNo
41320 + key_idx, //KeyIndex
41321 + KEY_TYPE_WEP104, //KeyType
41322 + zero_addr[key_idx],
41323 + 0, //DefaultKey
41324 + hwkey); //KeyContent
41325 +#if 0
41326 + if(key_idx == 0){
41327 +
41328 + //write_nic_byte(dev, SECR, 7);
41329 + setKey( dev,
41330 + 4, //EntryNo
41331 + key_idx, //KeyIndex
41332 + KEY_TYPE_WEP104, //KeyType
41333 + broadcast_addr, //addr
41334 + 0, //DefaultKey
41335 + hwkey); //KeyContent
41336 + }
41337 +#endif
41338 + }
41339 + else printk("wrong type in WEP, not WEP40 and WEP104\n");
41340 +
41341 +
41342 + }
41343 +
41344 +#if 0
41345 + //consider the setting different key index situation
41346 + //wrqu->encoding.flags = 801 means that we set key with index "1"
41347 + if(wrqu->encoding.length==0 && (wrqu->encoding.flags >>8) == 0x8 ){
41348 + printk("===>1\n");
41349 + //write_nic_byte(dev, SECR, 7);
41350 + EnableHWSecurityConfig8192(dev);
41351 + //copy wpa config from default key(key0~key3) to broadcast key(key5)
41352 + //
41353 + key_idx = (wrqu->encoding.flags & 0xf)-1 ;
41354 + write_cam(dev, (4*6), 0xffff0000|read_cam(dev, key_idx*6) );
41355 + write_cam(dev, (4*6)+1, 0xffffffff);
41356 + write_cam(dev, (4*6)+2, read_cam(dev, (key_idx*6)+2) );
41357 + write_cam(dev, (4*6)+3, read_cam(dev, (key_idx*6)+3) );
41358 + write_cam(dev, (4*6)+4, read_cam(dev, (key_idx*6)+4) );
41359 + write_cam(dev, (4*6)+5, read_cam(dev, (key_idx*6)+5) );
41360 + }
41361 +#endif
41362 +
41363 + return ret;
41364 +}
41365 +
41366 +
41367 +static int r8192_wx_set_scan_type(struct net_device *dev, struct iw_request_info *aa, union
41368 + iwreq_data *wrqu, char *p){
41369 +
41370 + struct r8192_priv *priv = ieee80211_priv(dev);
41371 + int *parms=(int*)p;
41372 + int mode=parms[0];
41373 +
41374 + priv->ieee80211->active_scan = mode;
41375 +
41376 + return 1;
41377 +}
41378 +
41379 +
41380 +
41381 +static int r8192_wx_set_retry(struct net_device *dev,
41382 + struct iw_request_info *info,
41383 + union iwreq_data *wrqu, char *extra)
41384 +{
41385 + struct r8192_priv *priv = ieee80211_priv(dev);
41386 + int err = 0;
41387 +
41388 + down(&priv->wx_sem);
41389 +
41390 + if (wrqu->retry.flags & IW_RETRY_LIFETIME ||
41391 + wrqu->retry.disabled){
41392 + err = -EINVAL;
41393 + goto exit;
41394 + }
41395 + if (!(wrqu->retry.flags & IW_RETRY_LIMIT)){
41396 + err = -EINVAL;
41397 + goto exit;
41398 + }
41399 +
41400 + if(wrqu->retry.value > R8180_MAX_RETRY){
41401 + err= -EINVAL;
41402 + goto exit;
41403 + }
41404 + if (wrqu->retry.flags & IW_RETRY_MAX) {
41405 + priv->retry_rts = wrqu->retry.value;
41406 + DMESG("Setting retry for RTS/CTS data to %d", wrqu->retry.value);
41407 +
41408 + }else {
41409 + priv->retry_data = wrqu->retry.value;
41410 + DMESG("Setting retry for non RTS/CTS data to %d", wrqu->retry.value);
41411 + }
41412 +
41413 + /* FIXME !
41414 + * We might try to write directly the TX config register
41415 + * or to restart just the (R)TX process.
41416 + * I'm unsure if whole reset is really needed
41417 + */
41418 +
41419 + rtl8192_commit(dev);
41420 + /*
41421 + if(priv->up){
41422 + rtl8180_rtx_disable(dev);
41423 + rtl8180_rx_enable(dev);
41424 + rtl8180_tx_enable(dev);
41425 +
41426 + }
41427 + */
41428 +exit:
41429 + up(&priv->wx_sem);
41430 +
41431 + return err;
41432 +}
41433 +
41434 +static int r8192_wx_get_retry(struct net_device *dev,
41435 + struct iw_request_info *info,
41436 + union iwreq_data *wrqu, char *extra)
41437 +{
41438 + struct r8192_priv *priv = ieee80211_priv(dev);
41439 +
41440 +
41441 + wrqu->retry.disabled = 0; /* can't be disabled */
41442 +
41443 + if ((wrqu->retry.flags & IW_RETRY_TYPE) ==
41444 + IW_RETRY_LIFETIME)
41445 + return -EINVAL;
41446 +
41447 + if (wrqu->retry.flags & IW_RETRY_MAX) {
41448 + wrqu->retry.flags = IW_RETRY_LIMIT & IW_RETRY_MAX;
41449 + wrqu->retry.value = priv->retry_rts;
41450 + } else {
41451 + wrqu->retry.flags = IW_RETRY_LIMIT & IW_RETRY_MIN;
41452 + wrqu->retry.value = priv->retry_data;
41453 + }
41454 + //DMESG("returning %d",wrqu->retry.value);
41455 +
41456 +
41457 + return 0;
41458 +}
41459 +
41460 +static int r8192_wx_get_sens(struct net_device *dev,
41461 + struct iw_request_info *info,
41462 + union iwreq_data *wrqu, char *extra)
41463 +{
41464 + struct r8192_priv *priv = ieee80211_priv(dev);
41465 + if(priv->rf_set_sens == NULL)
41466 + return -1; /* we have not this support for this radio */
41467 + wrqu->sens.value = priv->sens;
41468 + return 0;
41469 +}
41470 +
41471 +
41472 +static int r8192_wx_set_sens(struct net_device *dev,
41473 + struct iw_request_info *info,
41474 + union iwreq_data *wrqu, char *extra)
41475 +{
41476 +
41477 + struct r8192_priv *priv = ieee80211_priv(dev);
41478 +
41479 + short err = 0;
41480 + down(&priv->wx_sem);
41481 + //DMESG("attempt to set sensivity to %ddb",wrqu->sens.value);
41482 + if(priv->rf_set_sens == NULL) {
41483 + err= -1; /* we have not this support for this radio */
41484 + goto exit;
41485 + }
41486 + if(priv->rf_set_sens(dev, wrqu->sens.value) == 0)
41487 + priv->sens = wrqu->sens.value;
41488 + else
41489 + err= -EINVAL;
41490 +
41491 +exit:
41492 + up(&priv->wx_sem);
41493 +
41494 + return err;
41495 +}
41496 +
41497 +#if (WIRELESS_EXT >= 18)
41498 +#if 0
41499 +static int r8192_wx_get_enc_ext(struct net_device *dev,
41500 + struct iw_request_info *info,
41501 + union iwreq_data *wrqu, char *extra)
41502 +{
41503 + struct r8192_priv *priv = ieee80211_priv(dev);
41504 + int ret = 0;
41505 + ret = ieee80211_wx_get_encode_ext(priv->ieee80211, info, wrqu, extra);
41506 + return ret;
41507 +}
41508 +#endif
41509 +static int r8192_wx_set_enc_ext(struct net_device *dev,
41510 + struct iw_request_info *info,
41511 + union iwreq_data *wrqu, char *extra)
41512 +{
41513 + int ret=0;
41514 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
41515 + struct r8192_priv *priv = ieee80211_priv(dev);
41516 + struct ieee80211_device* ieee = priv->ieee80211;
41517 +
41518 + down(&priv->wx_sem);
41519 + ret = ieee80211_wx_set_encode_ext(ieee, info, wrqu, extra);
41520 +
41521 + {
41522 + u8 broadcast_addr[6] = {0xff,0xff,0xff,0xff,0xff,0xff};
41523 + u8 zero[6] = {0};
41524 + u32 key[4] = {0};
41525 + struct iw_encode_ext *ext = (struct iw_encode_ext *)extra;
41526 + struct iw_point *encoding = &wrqu->encoding;
41527 +#if 0
41528 + static u8 CAM_CONST_ADDR[4][6] = {
41529 + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
41530 + {0x00, 0x00, 0x00, 0x00, 0x00, 0x01},
41531 + {0x00, 0x00, 0x00, 0x00, 0x00, 0x02},
41532 + {0x00, 0x00, 0x00, 0x00, 0x00, 0x03}};
41533 +#endif
41534 + u8 idx = 0, alg = 0, group = 0;
41535 + if ((encoding->flags & IW_ENCODE_DISABLED) ||
41536 + ext->alg == IW_ENCODE_ALG_NONE) //none is not allowed to use hwsec WB 2008.07.01
41537 + {
41538 + ieee->pairwise_key_type = ieee->group_key_type = KEY_TYPE_NA;
41539 + CamResetAllEntry(dev);
41540 + goto end_hw_sec;
41541 + }
41542 + alg = (ext->alg == IW_ENCODE_ALG_CCMP)?KEY_TYPE_CCMP:ext->alg; // as IW_ENCODE_ALG_CCMP is defined to be 3 and KEY_TYPE_CCMP is defined to 4;
41543 + idx = encoding->flags & IW_ENCODE_INDEX;
41544 + if (idx)
41545 + idx --;
41546 + group = ext->ext_flags & IW_ENCODE_EXT_GROUP_KEY;
41547 +
41548 + if ((!group) || (IW_MODE_ADHOC == ieee->iw_mode) || (alg == KEY_TYPE_WEP40))
41549 + {
41550 + if ((ext->key_len == 13) && (alg == KEY_TYPE_WEP40) )
41551 + alg = KEY_TYPE_WEP104;
41552 + ieee->pairwise_key_type = alg;
41553 + EnableHWSecurityConfig8192(dev);
41554 + }
41555 + memcpy((u8*)key, ext->key, 16); //we only get 16 bytes key.why? WB 2008.7.1
41556 +
41557 + if ((alg & KEY_TYPE_WEP40) && (ieee->auth_mode !=2) )
41558 + {
41559 + if (ext->key_len == 13)
41560 + ieee->pairwise_key_type = alg = KEY_TYPE_WEP104;
41561 + setKey( dev,
41562 + idx,//EntryNo
41563 + idx, //KeyIndex
41564 + alg, //KeyType
41565 + zero, //MacAddr
41566 + 0, //DefaultKey
41567 + key); //KeyContent
41568 + }
41569 + else if (group)
41570 + {
41571 + ieee->group_key_type = alg;
41572 + setKey( dev,
41573 + idx,//EntryNo
41574 + idx, //KeyIndex
41575 + alg, //KeyType
41576 + broadcast_addr, //MacAddr
41577 + 0, //DefaultKey
41578 + key); //KeyContent
41579 + }
41580 + else //pairwise key
41581 + {
41582 + if ((ieee->pairwise_key_type == KEY_TYPE_CCMP) && ieee->pHTInfo->bCurrentHTSupport){
41583 + write_nic_byte(dev, 0x173, 1); //fix aes bug
41584 + }
41585 + setKey( dev,
41586 + 4,//EntryNo
41587 + idx, //KeyIndex
41588 + alg, //KeyType
41589 + (u8*)ieee->ap_mac_addr, //MacAddr
41590 + 0, //DefaultKey
41591 + key); //KeyContent
41592 + }
41593 +
41594 +
41595 + }
41596 +
41597 +end_hw_sec:
41598 + up(&priv->wx_sem);
41599 +#endif
41600 + return ret;
41601 +
41602 +}
41603 +static int r8192_wx_set_auth(struct net_device *dev,
41604 + struct iw_request_info *info,
41605 + union iwreq_data *data, char *extra)
41606 +{
41607 + int ret=0;
41608 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
41609 + //printk("====>%s()\n", __FUNCTION__);
41610 + struct r8192_priv *priv = ieee80211_priv(dev);
41611 + down(&priv->wx_sem);
41612 + ret = ieee80211_wx_set_auth(priv->ieee80211, info, &(data->param), extra);
41613 + up(&priv->wx_sem);
41614 +#endif
41615 + return ret;
41616 +}
41617 +
41618 +static int r8192_wx_set_mlme(struct net_device *dev,
41619 + struct iw_request_info *info,
41620 + union iwreq_data *wrqu, char *extra)
41621 +{
41622 + //printk("====>%s()\n", __FUNCTION__);
41623 +
41624 + int ret=0;
41625 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
41626 + struct r8192_priv *priv = ieee80211_priv(dev);
41627 + down(&priv->wx_sem);
41628 + ret = ieee80211_wx_set_mlme(priv->ieee80211, info, wrqu, extra);
41629 + up(&priv->wx_sem);
41630 +#endif
41631 + return ret;
41632 +}
41633 +#endif
41634 +static int r8192_wx_set_gen_ie(struct net_device *dev,
41635 + struct iw_request_info *info,
41636 + union iwreq_data *data, char *extra)
41637 +{
41638 + //printk("====>%s(), len:%d\n", __FUNCTION__, data->length);
41639 + int ret=0;
41640 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
41641 + struct r8192_priv *priv = ieee80211_priv(dev);
41642 + down(&priv->wx_sem);
41643 +#if 1
41644 + ret = ieee80211_wx_set_gen_ie(priv->ieee80211, extra, data->data.length);
41645 +#endif
41646 + up(&priv->wx_sem);
41647 + //printk("<======%s(), ret:%d\n", __FUNCTION__, ret);
41648 +#endif
41649 + return ret;
41650 +
41651 +
41652 +}
41653 +
41654 +static int dummy(struct net_device *dev, struct iw_request_info *a,
41655 + union iwreq_data *wrqu,char *b)
41656 +{
41657 + return -1;
41658 +}
41659 +
41660 +
41661 +static iw_handler r8192_wx_handlers[] =
41662 +{
41663 + NULL, /* SIOCSIWCOMMIT */
41664 + r8192_wx_get_name, /* SIOCGIWNAME */
41665 + dummy, /* SIOCSIWNWID */
41666 + dummy, /* SIOCGIWNWID */
41667 + r8192_wx_set_freq, /* SIOCSIWFREQ */
41668 + r8192_wx_get_freq, /* SIOCGIWFREQ */
41669 + r8192_wx_set_mode, /* SIOCSIWMODE */
41670 + r8192_wx_get_mode, /* SIOCGIWMODE */
41671 + r8192_wx_set_sens, /* SIOCSIWSENS */
41672 + r8192_wx_get_sens, /* SIOCGIWSENS */
41673 + NULL, /* SIOCSIWRANGE */
41674 + rtl8180_wx_get_range, /* SIOCGIWRANGE */
41675 + NULL, /* SIOCSIWPRIV */
41676 + NULL, /* SIOCGIWPRIV */
41677 + NULL, /* SIOCSIWSTATS */
41678 + NULL, /* SIOCGIWSTATS */
41679 + dummy, /* SIOCSIWSPY */
41680 + dummy, /* SIOCGIWSPY */
41681 + NULL, /* SIOCGIWTHRSPY */
41682 + NULL, /* SIOCWIWTHRSPY */
41683 + r8192_wx_set_wap, /* SIOCSIWAP */
41684 + r8192_wx_get_wap, /* SIOCGIWAP */
41685 +#if (WIRELESS_EXT >= 18)
41686 + r8192_wx_set_mlme, /* MLME-- */
41687 +#else
41688 + NULL,
41689 +#endif
41690 + dummy, /* SIOCGIWAPLIST -- depricated */
41691 + r8192_wx_set_scan, /* SIOCSIWSCAN */
41692 + r8192_wx_get_scan, /* SIOCGIWSCAN */
41693 + r8192_wx_set_essid, /* SIOCSIWESSID */
41694 + r8192_wx_get_essid, /* SIOCGIWESSID */
41695 + dummy, /* SIOCSIWNICKN */
41696 + dummy, /* SIOCGIWNICKN */
41697 + NULL, /* -- hole -- */
41698 + NULL, /* -- hole -- */
41699 + r8192_wx_set_rate, /* SIOCSIWRATE */
41700 + r8192_wx_get_rate, /* SIOCGIWRATE */
41701 + r8192_wx_set_rts, /* SIOCSIWRTS */
41702 + r8192_wx_get_rts, /* SIOCGIWRTS */
41703 + r8192_wx_set_frag, /* SIOCSIWFRAG */
41704 + r8192_wx_get_frag, /* SIOCGIWFRAG */
41705 + dummy, /* SIOCSIWTXPOW */
41706 + dummy, /* SIOCGIWTXPOW */
41707 + r8192_wx_set_retry, /* SIOCSIWRETRY */
41708 + r8192_wx_get_retry, /* SIOCGIWRETRY */
41709 + r8192_wx_set_enc, /* SIOCSIWENCODE */
41710 + r8192_wx_get_enc, /* SIOCGIWENCODE */
41711 + r8192_wx_set_power, /* SIOCSIWPOWER */
41712 + r8192_wx_get_power, /* SIOCGIWPOWER */
41713 + NULL, /*---hole---*/
41714 + NULL, /*---hole---*/
41715 + r8192_wx_set_gen_ie,//NULL, /* SIOCSIWGENIE */
41716 + NULL, /* SIOCSIWGENIE */
41717 +#if (WIRELESS_EXT >= 18)
41718 + r8192_wx_set_auth,//NULL, /* SIOCSIWAUTH */
41719 + NULL,//r8192_wx_get_auth,//NULL, /* SIOCSIWAUTH */
41720 + r8192_wx_set_enc_ext, /* SIOCSIWENCODEEXT */
41721 +#else
41722 + NULL,
41723 + NULL,
41724 + NULL,
41725 +#endif
41726 + NULL,//r8192_wx_get_enc_ext,//NULL, /* SIOCSIWENCODEEXT */
41727 + NULL, /* SIOCSIWPMKSA */
41728 + NULL, /*---hole---*/
41729 +
41730 +};
41731 +
41732 +
41733 +static const struct iw_priv_args r8192_private_args[] = {
41734 +
41735 + {
41736 + SIOCIWFIRSTPRIV + 0x0,
41737 + IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "badcrc"
41738 + },
41739 +
41740 + {
41741 + SIOCIWFIRSTPRIV + 0x1,
41742 + IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "activescan"
41743 +
41744 + },
41745 + {
41746 + SIOCIWFIRSTPRIV + 0x2,
41747 + IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "rawtx"
41748 + }
41749 +#ifdef JOHN_IOCTL
41750 + ,
41751 + {
41752 + SIOCIWFIRSTPRIV + 0x3,
41753 + IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "readRF"
41754 + }
41755 + ,
41756 + {
41757 + SIOCIWFIRSTPRIV + 0x4,
41758 + IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "writeRF"
41759 + }
41760 + ,
41761 + {
41762 + SIOCIWFIRSTPRIV + 0x5,
41763 + IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "readBB"
41764 + }
41765 + ,
41766 + {
41767 + SIOCIWFIRSTPRIV + 0x6,
41768 + IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "writeBB"
41769 + }
41770 + ,
41771 + {
41772 + SIOCIWFIRSTPRIV + 0x7,
41773 + IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "readnicb"
41774 + }
41775 + ,
41776 + {
41777 + SIOCIWFIRSTPRIV + 0x8,
41778 + IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "writenicb"
41779 + }
41780 + ,
41781 + {
41782 + SIOCIWFIRSTPRIV + 0x9,
41783 + IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "apinfo"
41784 + }
41785 +
41786 +#endif
41787 + ,
41788 + {
41789 + SIOCIWFIRSTPRIV + 0x3,
41790 + IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "forcereset"
41791 +
41792 + }
41793 +
41794 +};
41795 +
41796 +
41797 +static iw_handler r8192_private_handler[] = {
41798 +// r8192_wx_set_monitor, /* SIOCIWFIRSTPRIV */
41799 + r8192_wx_set_crcmon, /*SIOCIWSECONDPRIV*/
41800 +// r8192_wx_set_forceassociate,
41801 +// r8192_wx_set_beaconinterval,
41802 +// r8192_wx_set_monitor_type,
41803 + r8192_wx_set_scan_type,
41804 + r8192_wx_set_rawtx,
41805 +#ifdef JOHN_IOCTL
41806 + r8192_wx_read_regs,
41807 + r8192_wx_write_regs,
41808 + r8192_wx_read_bb,
41809 + r8192_wx_write_bb,
41810 + r8192_wx_read_nicb,
41811 + r8192_wx_write_nicb,
41812 + r8192_wx_get_ap_status
41813 +#endif
41814 + r8192_wx_force_reset,
41815 +};
41816 +
41817 +//#if WIRELESS_EXT >= 17
41818 +struct iw_statistics *r8192_get_wireless_stats(struct net_device *dev)
41819 +{
41820 + struct r8192_priv *priv = ieee80211_priv(dev);
41821 + struct ieee80211_device* ieee = priv->ieee80211;
41822 + struct iw_statistics* wstats = &priv->wstats;
41823 + int tmp_level = 0;
41824 + int tmp_qual = 0;
41825 + int tmp_noise = 0;
41826 + if(ieee->state < IEEE80211_LINKED)
41827 + {
41828 + wstats->qual.qual = 0;
41829 + wstats->qual.level = 0;
41830 + wstats->qual.noise = 0;
41831 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,14))
41832 + wstats->qual.updated = IW_QUAL_ALL_UPDATED | IW_QUAL_DBM;
41833 +#else
41834 + wstats->qual.updated = 0x0f;
41835 +#endif
41836 + return wstats;
41837 + }
41838 +
41839 + tmp_level = (&ieee->current_network)->stats.rssi;
41840 + tmp_qual = (&ieee->current_network)->stats.signal;
41841 + tmp_noise = (&ieee->current_network)->stats.noise;
41842 + //printk("level:%d, qual:%d, noise:%d\n", tmp_level, tmp_qual, tmp_noise);
41843 +
41844 + wstats->qual.level = tmp_level;
41845 + wstats->qual.qual = tmp_qual;
41846 + wstats->qual.noise = tmp_noise;
41847 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,14))
41848 + wstats->qual.updated = IW_QUAL_ALL_UPDATED | IW_QUAL_DBM;
41849 +#else
41850 + wstats->qual.updated = 0x0f;
41851 +#endif
41852 + return wstats;
41853 +}
41854 +//#endif
41855 +
41856 +
41857 +struct iw_handler_def r8192_wx_handlers_def={
41858 + .standard = r8192_wx_handlers,
41859 + .num_standard = sizeof(r8192_wx_handlers) / sizeof(iw_handler),
41860 + .private = r8192_private_handler,
41861 + .num_private = sizeof(r8192_private_handler) / sizeof(iw_handler),
41862 + .num_private_args = sizeof(r8192_private_args) / sizeof(struct iw_priv_args),
41863 +#if WIRELESS_EXT >= 17
41864 + .get_wireless_stats = r8192_get_wireless_stats,
41865 +#endif
41866 + .private_args = (struct iw_priv_args *)r8192_private_args,
41867 +};
41868 --- /dev/null
41869 +++ b/drivers/staging/rtl8192e/r8192E_wx.h
41870 @@ -0,0 +1,22 @@
41871 +/*
41872 + This is part of rtl8180 OpenSource driver - v 0.3
41873 + Copyright (C) Andrea Merello 2004 <andreamrl@tiscali.it>
41874 + Released under the terms of GPL (General Public Licence)
41875 +
41876 + Parts of this driver are based on the GPL part of the official realtek driver
41877 + Parts of this driver are based on the rtl8180 driver skeleton from Patric Schenke & Andres Salomon
41878 + Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver
41879 +
41880 + We want to tanks the Authors of such projects and the Ndiswrapper project Authors.
41881 +*/
41882 +
41883 +/* this file (will) contains wireless extension handlers*/
41884 +
41885 +#ifndef R8180_WX_H
41886 +#define R8180_WX_H
41887 +//#include <linux/wireless.h>
41888 +//#include "ieee80211.h"
41889 +extern struct iw_handler_def r8192_wx_handlers_def;
41890 +/* Enable the rtl819x_core.c to share this function, david 2008.9.22 */
41891 +extern struct iw_statistics *r8192_get_wireless_stats(struct net_device *dev);
41892 +#endif
41893 --- /dev/null
41894 +++ b/drivers/staging/rtl8192e/r8192_pm.c
41895 @@ -0,0 +1,181 @@
41896 +/*
41897 + Power management interface routines.
41898 + Written by Mariusz Matuszek.
41899 + This code is currently just a placeholder for later work and
41900 + does not do anything useful.
41901 +
41902 + This is part of rtl8180 OpenSource driver.
41903 + Copyright (C) Andrea Merello 2004 <andreamrl@tiscali.it>
41904 + Released under the terms of GPL (General Public Licence)
41905 +*/
41906 +
41907 +#ifdef CONFIG_PM_RTL
41908 +
41909 +#include "r8192E.h"
41910 +#include "r8192E_hw.h"
41911 +#include "r8192_pm.h"
41912 +#include "r8190_rtl8256.h"
41913 +
41914 +int rtl8192E_save_state (struct pci_dev *dev, pm_message_t state)
41915 +{
41916 + printk(KERN_NOTICE "r8192E save state call (state %u).\n", state.event);
41917 + return(-EAGAIN);
41918 +}
41919 +
41920 +
41921 +int rtl8192E_suspend (struct pci_dev *pdev, pm_message_t state)
41922 +{
41923 + struct net_device *dev = pci_get_drvdata(pdev);
41924 + struct r8192_priv *priv = ieee80211_priv(dev);
41925 + u8 ucRegRead;
41926 + u32 ulRegRead;
41927 +
41928 + RT_TRACE(COMP_POWER, "============> r8192E suspend call.\n");
41929 + if (!netif_running(dev))
41930 + goto out_pci_suspend;
41931 +
41932 + dev->stop(dev);
41933 +#if 0
41934 +
41935 + netif_carrier_off(dev);
41936 +
41937 + ieee80211_softmac_stop_protocol(priv->ieee80211);
41938 +
41939 + write_nic_byte(dev,MSR,(read_nic_byte(dev,MSR)&0xfc)|MSR_LINK_NONE);
41940 + if(!priv->ieee80211->bSupportRemoteWakeUp) {
41941 + /* disable tx/rx. In 8185 we write 0x10 (Reset bit),
41942 + * but here we make reference to WMAC and wirte 0x0.
41943 + * 2006.11.21 Emily
41944 + */
41945 + write_nic_byte(dev, CMDR, 0);
41946 + }
41947 + //disable interrupt
41948 + write_nic_dword(dev,INTA_MASK,0);
41949 + priv->irq_enabled = 0;
41950 + write_nic_dword(dev,ISR,read_nic_dword(dev, ISR));
41951 +
41952 + /* need to free DM related functions */
41953 +#if LINUX_VERSION_CODE >=KERNEL_VERSION(2,6,20)
41954 + cancel_work_sync(&priv->reset_wq);
41955 +#else
41956 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
41957 + cancel_delayed_work(&priv->reset_wq);
41958 +#endif
41959 +#endif
41960 + del_timer_sync(&priv->fsync_timer);
41961 + del_timer_sync(&priv->watch_dog_timer);
41962 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
41963 + cancel_delayed_work(&priv->watch_dog_wq);
41964 + cancel_delayed_work(&priv->update_beacon_wq);
41965 +#endif
41966 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
41967 + cancel_work_sync(&priv->qos_activate);
41968 +#else
41969 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
41970 + cancel_delayed_work(&priv->qos_activate);
41971 +#endif
41972 +#endif
41973 +
41974 + /* TODO
41975 +#if ((DEV_BUS_TYPE == PCI_INTERFACE) && (HAL_CODE_BASE == RTL8192))
41976 +pHalData->bHwRfOffAction = 2;
41977 +#endif
41978 +*/
41979 +#endif
41980 + // Call MgntActSet_RF_State instead to prevent RF config race condition.
41981 + // By Bruce, 2008-01-17.
41982 + //
41983 + if(!priv->ieee80211->bSupportRemoteWakeUp) {
41984 + MgntActSet_RF_State(dev, eRfOff, RF_CHANGE_BY_INIT);
41985 + // 2006.11.30. System reset bit
41986 + ulRegRead = read_nic_dword(dev, CPU_GEN);
41987 + ulRegRead|=CPU_GEN_SYSTEM_RESET;
41988 + write_nic_dword(dev, CPU_GEN, ulRegRead);
41989 + } else {
41990 + //2008.06.03 for WOL
41991 + write_nic_dword(dev, WFCRC0, 0xffffffff);
41992 + write_nic_dword(dev, WFCRC1, 0xffffffff);
41993 + write_nic_dword(dev, WFCRC2, 0xffffffff);
41994 +#ifdef RTL8190P
41995 + //GPIO 0 = TRUE
41996 + ucRegRead = read_nic_byte(dev, GPO);
41997 + ucRegRead |= BIT0;
41998 + write_nic_byte(dev, GPO, ucRegRead);
41999 +#endif
42000 + //Write PMR register
42001 + write_nic_byte(dev, PMR, 0x5);
42002 + //Disable tx, enanble rx
42003 + write_nic_byte(dev, MacBlkCtrl, 0xa);
42004 + }
42005 +
42006 +out_pci_suspend:
42007 + RT_TRACE(COMP_POWER, "r8192E support WOL call??????????????????????\n");
42008 + if(priv->ieee80211->bSupportRemoteWakeUp) {
42009 + RT_TRACE(COMP_POWER, "r8192E support WOL call!!!!!!!!!!!!!!!!!!.\n");
42010 + }
42011 + netif_device_detach(dev);
42012 + pci_save_state(pdev);
42013 + pci_disable_device(pdev);
42014 + pci_enable_wake(pdev, pci_choose_state(pdev,state),\
42015 + priv->ieee80211->bSupportRemoteWakeUp?1:0);
42016 + pci_set_power_state(pdev,pci_choose_state(pdev,state));
42017 +
42018 + return 0;
42019 +}
42020 +
42021 +int rtl8192E_resume (struct pci_dev *pdev)
42022 +{
42023 + struct net_device *dev = pci_get_drvdata(pdev);
42024 + //struct r8192_priv *priv = ieee80211_priv(dev);
42025 + //union iwreq_data wrqu;
42026 + int err;
42027 + u32 val;
42028 +
42029 + RT_TRACE(COMP_POWER, "================>r8192E resume call.");
42030 +
42031 + pci_set_power_state(pdev, PCI_D0);
42032 +
42033 + err = pci_enable_device(pdev);
42034 + if(err) {
42035 + printk(KERN_ERR "%s: pci_enable_device failed on resume\n",
42036 + dev->name);
42037 + return err;
42038 + }
42039 +
42040 + pci_restore_state(pdev);
42041 +
42042 + /*
42043 + * Suspend/Resume resets the PCI configuration space, so we have to
42044 + * re-disable the RETRY_TIMEOUT register (0x41) to keep PCI Tx retries
42045 + * from interfering with C3 CPU state. pci_restore_state won't help
42046 + * here since it only restores the first 64 bytes pci config header.
42047 + */
42048 + pci_read_config_dword(pdev, 0x40, &val);
42049 + if ((val & 0x0000ff00) != 0) {
42050 + pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
42051 + }
42052 +
42053 +
42054 +
42055 + pci_enable_wake(pdev, PCI_D0, 0);
42056 +
42057 + if(!netif_running(dev))
42058 + goto out;
42059 +
42060 + netif_device_attach(dev);
42061 +
42062 + dev->open(dev);
42063 +out:
42064 + RT_TRACE(COMP_POWER, "<================r8192E resume call.\n");
42065 + return 0;
42066 +}
42067 +
42068 +
42069 +int rtl8192E_enable_wake (struct pci_dev *dev, pm_message_t state, int enable)
42070 +{
42071 + printk(KERN_NOTICE "r8192E enable wake call (state %u, enable %d).\n",
42072 + state.event, enable);
42073 + return(-EAGAIN);
42074 +}
42075 +
42076 +#endif //CONFIG_PM_RTL
42077 --- /dev/null
42078 +++ b/drivers/staging/rtl8192e/r8192_pm.h
42079 @@ -0,0 +1,28 @@
42080 +/*
42081 + Power management interface routines.
42082 + Written by Mariusz Matuszek.
42083 + This code is currently just a placeholder for later work and
42084 + does not do anything useful.
42085 +
42086 + This is part of rtl8180 OpenSource driver.
42087 + Copyright (C) Andrea Merello 2004 <andreamrl@tiscali.it>
42088 + Released under the terms of GPL (General Public Licence)
42089 +
42090 +*/
42091 +
42092 +#ifdef CONFIG_PM_RTL
42093 +
42094 +#ifndef R8192E_PM_H
42095 +#define R8192E_PM_H
42096 +
42097 +#include <linux/types.h>
42098 +#include <linux/pci.h>
42099 +
42100 +int rtl8192E_save_state (struct pci_dev *dev, pm_message_t state);
42101 +int rtl8192E_suspend (struct pci_dev *dev, pm_message_t state);
42102 +int rtl8192E_resume (struct pci_dev *dev);
42103 +int rtl8192E_enable_wake (struct pci_dev *dev, pm_message_t state, int enable);
42104 +
42105 +#endif //R8192E_PM_H
42106 +
42107 +#endif // CONFIG_PM_RTL
42108 --- /dev/null
42109 +++ b/drivers/staging/rtl8192e/r819xE_cmdpkt.c
42110 @@ -0,0 +1,820 @@
42111 +/******************************************************************************
42112 +
42113 + (c) Copyright 2008, RealTEK Technologies Inc. All Rights Reserved.
42114 +
42115 + Module: r819xusb_cmdpkt.c (RTL8190 TX/RX command packet handler Source C File)
42116 +
42117 + Note: The module is responsible for handling TX and RX command packet.
42118 + 1. TX : Send set and query configuration command packet.
42119 + 2. RX : Receive tx feedback, beacon state, query configuration
42120 + command packet.
42121 +
42122 + Function:
42123 +
42124 + Export:
42125 +
42126 + Abbrev:
42127 +
42128 + History:
42129 + Data Who Remark
42130 +
42131 + 05/06/2008 amy Create initial version porting from windows driver.
42132 +
42133 +******************************************************************************/
42134 +#include "r8192E.h"
42135 +#include "r8192E_hw.h"
42136 +#include "r819xE_cmdpkt.h"
42137 +/*---------------------------Define Local Constant---------------------------*/
42138 +/* Debug constant*/
42139 +#define CMPK_DEBOUNCE_CNT 1
42140 +/* 2007/10/24 MH Add for printing a range of data. */
42141 +#define CMPK_PRINT(Address)\
42142 +{\
42143 + unsigned char i;\
42144 + u32 temp[10];\
42145 + \
42146 + memcpy(temp, Address, 40);\
42147 + for (i = 0; i <40; i+=4)\
42148 + printk("\r\n %08x", temp[i]);\
42149 +}\
42150 +
42151 +/*---------------------------Define functions---------------------------------*/
42152 +/*-----------------------------------------------------------------------------
42153 + * Function: cmpk_message_handle_tx()
42154 + *
42155 + * Overview: Driver internal module can call the API to send message to
42156 + * firmware side. For example, you can send a debug command packet.
42157 + * Or you can send a request for FW to modify RLX4181 LBUS HW bank.
42158 + * Otherwise, you can change MAC/PHT/RF register by firmware at
42159 + * run time. We do not support message more than one segment now.
42160 + *
42161 + * Input: NONE
42162 + *
42163 + * Output: NONE
42164 + *
42165 + * Return: NONE
42166 + *
42167 + * Revised History:
42168 + * When Who Remark
42169 + * 05/06/2008 amy porting from windows code.
42170 + *
42171 + *---------------------------------------------------------------------------*/
42172 +RT_STATUS cmpk_message_handle_tx(
42173 + struct net_device *dev,
42174 + u8* code_virtual_address,
42175 + u32 packettype,
42176 + u32 buffer_len)
42177 +{
42178 +
42179 + RT_STATUS rt_status = RT_STATUS_SUCCESS;
42180 +#ifdef RTL8192U
42181 + return rt_status;
42182 +#else
42183 + struct r8192_priv *priv = ieee80211_priv(dev);
42184 + u16 frag_threshold;
42185 + u16 frag_length = 0, frag_offset = 0;
42186 + rt_firmware *pfirmware = priv->pFirmware;
42187 + struct sk_buff *skb;
42188 + unsigned char *seg_ptr;
42189 + cb_desc *tcb_desc;
42190 + u8 bLastIniPkt;
42191 +
42192 + PTX_FWINFO_8190PCI pTxFwInfo = NULL;
42193 + int i;
42194 +
42195 + //spin_lock_irqsave(&priv->tx_lock,flags);
42196 + RT_TRACE(COMP_CMDPKT,"%s(),buffer_len is %d\n",__FUNCTION__,buffer_len);
42197 + firmware_init_param(dev);
42198 + //Fragmentation might be required
42199 + frag_threshold = pfirmware->cmdpacket_frag_thresold;
42200 + do {
42201 + if((buffer_len - frag_offset) > frag_threshold) {
42202 + frag_length = frag_threshold ;
42203 + bLastIniPkt = 0;
42204 +
42205 + } else {
42206 + frag_length =(u16)(buffer_len - frag_offset);
42207 + bLastIniPkt = 1;
42208 +
42209 + }
42210 +
42211 + /* Allocate skb buffer to contain firmware info and tx descriptor info
42212 + * add 4 to avoid packet appending overflow.
42213 + * */
42214 +#ifdef RTL8192U
42215 + skb = dev_alloc_skb(USB_HWDESC_HEADER_LEN + frag_length + 4);
42216 +#else
42217 + skb = dev_alloc_skb(frag_length + priv->ieee80211->tx_headroom + 4);
42218 +#endif
42219 + if(skb == NULL) {
42220 + rt_status = RT_STATUS_FAILURE;
42221 + goto Failed;
42222 + }
42223 +
42224 + memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev));
42225 + tcb_desc = (cb_desc*)(skb->cb + MAX_DEV_ADDR_SIZE);
42226 + tcb_desc->queue_index = TXCMD_QUEUE;
42227 + tcb_desc->bCmdOrInit = packettype;
42228 + tcb_desc->bLastIniPkt = bLastIniPkt;
42229 + tcb_desc->pkt_size = frag_length;
42230 +
42231 +#ifdef RTL8192U
42232 + skb_reserve(skb, USB_HWDESC_HEADER_LEN);
42233 +#endif
42234 +
42235 + //seg_ptr = skb_put(skb, frag_length + priv->ieee80211->tx_headroom);
42236 + seg_ptr = skb_put(skb, priv->ieee80211->tx_headroom);
42237 +
42238 + pTxFwInfo = (PTX_FWINFO_8190PCI)seg_ptr;
42239 + memset(pTxFwInfo,0,sizeof(TX_FWINFO_8190PCI));
42240 + memset(pTxFwInfo,0x12,8);
42241 +
42242 + seg_ptr +=sizeof(TX_FWINFO_8190PCI);
42243 +
42244 + /*
42245 + * Transform from little endian to big endian
42246 + * and pending zero
42247 + */
42248 + seg_ptr = skb->tail;
42249 + for(i=0 ; i < frag_length; i+=4) {
42250 + *seg_ptr++ = ((i+0)<frag_length)?code_virtual_address[i+3]:0;
42251 + *seg_ptr++ = ((i+1)<frag_length)?code_virtual_address[i+2]:0;
42252 + *seg_ptr++ = ((i+2)<frag_length)?code_virtual_address[i+1]:0;
42253 + *seg_ptr++ = ((i+3)<frag_length)?code_virtual_address[i+0]:0;
42254 + }
42255 + skb_put(skb, i);
42256 + priv->ieee80211->softmac_hard_start_xmit(skb,dev);
42257 +
42258 + code_virtual_address += frag_length;
42259 + frag_offset += frag_length;
42260 +
42261 +#if 0
42262 + {
42263 + int k;
42264 + printk("------------tx cmd------------\n");
42265 + for(k = 0; k<i; k++)
42266 + printk(" 0x%x",((u8*)buf)[k]);
42267 + printk("\n");
42268 + }
42269 + {
42270 + int m;
42271 + printk("-------------cmd desc----------\n");
42272 + for(m=0;m<32;m++)
42273 + printk(" 0x%x",((u8*)pdesc)[m]);
42274 + printk("\n");
42275 + }
42276 +#endif
42277 + }while(frag_offset < buffer_len);
42278 +
42279 +Failed:
42280 + //spin_unlock_irqrestore(&priv->tx_lock,flags);
42281 + return rt_status;
42282 +
42283 +
42284 +#endif
42285 +} /* CMPK_Message_Handle_Tx */
42286 +
42287 +/*-----------------------------------------------------------------------------
42288 + * Function: cmpk_counttxstatistic()
42289 + *
42290 + * Overview:
42291 + *
42292 + * Input: PADAPTER pAdapter - .
42293 + * CMPK_TXFB_T *psTx_FB - .
42294 + *
42295 + * Output: NONE
42296 + *
42297 + * Return: NONE
42298 + *
42299 + * Revised History:
42300 + * When Who Remark
42301 + * 05/12/2008 amy Create Version 0 porting from windows code.
42302 + *
42303 + *---------------------------------------------------------------------------*/
42304 +static void
42305 +cmpk_count_txstatistic(
42306 + struct net_device *dev,
42307 + cmpk_txfb_t *pstx_fb)
42308 +{
42309 + struct r8192_priv *priv = ieee80211_priv(dev);
42310 +#ifdef ENABLE_PS
42311 + RT_RF_POWER_STATE rtState;
42312 +
42313 + pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState));
42314 +
42315 + // When RF is off, we should not count the packet for hw/sw synchronize
42316 + // reason, ie. there may be a duration while sw switch is changed and hw
42317 + // switch is being changed. 2006.12.04, by shien chang.
42318 + if (rtState == eRfOff)
42319 + {
42320 + return;
42321 + }
42322 +#endif
42323 +
42324 +#ifdef TODO
42325 + if(pAdapter->bInHctTest)
42326 + return;
42327 +#endif
42328 + /* We can not know the packet length and transmit type: broadcast or uni
42329 + or multicast. So the relative statistics must be collected in tx
42330 + feedback info. */
42331 + if (pstx_fb->tok)
42332 + {
42333 + priv->stats.txfeedbackok++;
42334 + priv->stats.txoktotal++;
42335 + priv->stats.txokbytestotal += pstx_fb->pkt_length;
42336 + priv->stats.txokinperiod++;
42337 +
42338 + /* We can not make sure broadcast/multicast or unicast mode. */
42339 + if (pstx_fb->pkt_type == PACKET_MULTICAST)
42340 + {
42341 + priv->stats.txmulticast++;
42342 + priv->stats.txbytesmulticast += pstx_fb->pkt_length;
42343 + }
42344 + else if (pstx_fb->pkt_type == PACKET_BROADCAST)
42345 + {
42346 + priv->stats.txbroadcast++;
42347 + priv->stats.txbytesbroadcast += pstx_fb->pkt_length;
42348 + }
42349 + else
42350 + {
42351 + priv->stats.txunicast++;
42352 + priv->stats.txbytesunicast += pstx_fb->pkt_length;
42353 + }
42354 + }
42355 + else
42356 + {
42357 + priv->stats.txfeedbackfail++;
42358 + priv->stats.txerrtotal++;
42359 + priv->stats.txerrbytestotal += pstx_fb->pkt_length;
42360 +
42361 + /* We can not make sure broadcast/multicast or unicast mode. */
42362 + if (pstx_fb->pkt_type == PACKET_MULTICAST)
42363 + {
42364 + priv->stats.txerrmulticast++;
42365 + }
42366 + else if (pstx_fb->pkt_type == PACKET_BROADCAST)
42367 + {
42368 + priv->stats.txerrbroadcast++;
42369 + }
42370 + else
42371 + {
42372 + priv->stats.txerrunicast++;
42373 + }
42374 + }
42375 +
42376 + priv->stats.txretrycount += pstx_fb->retry_cnt;
42377 + priv->stats.txfeedbackretry += pstx_fb->retry_cnt;
42378 +
42379 +} /* cmpk_CountTxStatistic */
42380 +
42381 +
42382 +
42383 +/*-----------------------------------------------------------------------------
42384 + * Function: cmpk_handle_tx_feedback()
42385 + *
42386 + * Overview: The function is responsible for extract the message inside TX
42387 + * feedbck message from firmware. It will contain dedicated info in
42388 + * ws-06-0063-rtl8190-command-packet-specification. Please
42389 + * refer to chapter "TX Feedback Element". We have to read 20 bytes
42390 + * in the command packet.
42391 + *
42392 + * Input: struct net_device * dev
42393 + * u8 * pmsg - Msg Ptr of the command packet.
42394 + *
42395 + * Output: NONE
42396 + *
42397 + * Return: NONE
42398 + *
42399 + * Revised History:
42400 + * When Who Remark
42401 + * 05/08/2008 amy Create Version 0 porting from windows code.
42402 + *
42403 + *---------------------------------------------------------------------------*/
42404 +static void
42405 +cmpk_handle_tx_feedback(
42406 + struct net_device *dev,
42407 + u8 * pmsg)
42408 +{
42409 + struct r8192_priv *priv = ieee80211_priv(dev);
42410 + cmpk_txfb_t rx_tx_fb; /* */
42411 +
42412 + priv->stats.txfeedback++;
42413 +
42414 + /* 0. Display received message. */
42415 + //cmpk_Display_Message(CMPK_RX_TX_FB_SIZE, pMsg);
42416 +
42417 + /* 1. Extract TX feedback info from RFD to temp structure buffer. */
42418 + /* It seems that FW use big endian(MIPS) and DRV use little endian in
42419 + windows OS. So we have to read the content byte by byte or transfer
42420 + endian type before copy the message copy. */
42421 +#if 0 // The TX FEEDBACK packet element address
42422 + //rx_tx_fb.Element_ID = pMsg[0];
42423 + //rx_tx_fb.Length = pMsg[1];
42424 + rx_tx_fb.TOK = pMsg[2]>>7;
42425 + rx_tx_fb.Fail_Reason = (pMsg[2] & 0x70) >> 4;
42426 + rx_tx_fb.TID = (pMsg[2] & 0x0F);
42427 + rx_tx_fb.Qos_Pkt = pMsg[3] >> 7;
42428 + rx_tx_fb.Bandwidth = (pMsg[3] & 0x40) >> 6;
42429 + rx_tx_fb.Retry_Cnt = pMsg[5];
42430 + rx_tx_fb.Pkt_ID = (pMsg[6] << 8) | pMsg[7];
42431 + rx_tx_fb.Seq_Num = (pMsg[8] << 8) | pMsg[9];
42432 + rx_tx_fb.S_Rate = pMsg[10];
42433 + rx_tx_fb.F_Rate = pMsg[11];
42434 + rx_tx_fb.S_RTS_Rate = pMsg[12];
42435 + rx_tx_fb.F_RTS_Rate = pMsg[13];
42436 + rx_tx_fb.pkt_length = (pMsg[14] << 8) | pMsg[15];
42437 +#endif
42438 + /* 2007/07/05 MH Use pointer to transfer structure memory. */
42439 + //memcpy((UINT8 *)&rx_tx_fb, pMsg, sizeof(CMPK_TXFB_T));
42440 + memcpy((u8*)&rx_tx_fb, pmsg, sizeof(cmpk_txfb_t));
42441 + /* 2. Use tx feedback info to count TX statistics. */
42442 + cmpk_count_txstatistic(dev, &rx_tx_fb);
42443 +#if 0
42444 + /* 2007/07/11 MH Assign current operate rate. */
42445 + if (pAdapter->RegWirelessMode == WIRELESS_MODE_A ||
42446 + pAdapter->RegWirelessMode == WIRELESS_MODE_B ||
42447 + pAdapter->RegWirelessMode == WIRELESS_MODE_G)
42448 + {
42449 + pMgntInfo->CurrentOperaRate = (rx_tx_fb.F_Rate & 0x7F);
42450 + }
42451 + else if (pAdapter->RegWirelessMode == WIRELESS_MODE_N_24G ||
42452 + pAdapter->RegWirelessMode == WIRELESS_MODE_N_5G)
42453 + {
42454 + pMgntInfo->HTCurrentOperaRate = (rx_tx_fb.F_Rate & 0x8F);
42455 + }
42456 +#endif
42457 + /* 2007/01/17 MH Comment previous method for TX statistic function. */
42458 + /* Collect info TX feedback packet to fill TCB. */
42459 + /* We can not know the packet length and transmit type: broadcast or uni
42460 + or multicast. */
42461 + //CountTxStatistics( pAdapter, &tcb );
42462 +
42463 +} /* cmpk_Handle_Tx_Feedback */
42464 +
42465 +static void cmdpkt_beacontimerinterrupt_819xusb(struct net_device *dev)
42466 +{
42467 + struct r8192_priv *priv = ieee80211_priv(dev);
42468 + u16 tx_rate;
42469 + {
42470 + //
42471 + // 070117, rcnjko: 87B have to S/W beacon for DTM encryption_cmn.
42472 + //
42473 + if((priv->ieee80211->current_network.mode == IEEE_A) ||
42474 + (priv->ieee80211->current_network.mode == IEEE_N_5G) ||
42475 + ((priv->ieee80211->current_network.mode == IEEE_N_24G) && (!priv->ieee80211->pHTInfo->bCurSuppCCK)))
42476 + {
42477 + tx_rate = 60;
42478 + DMESG("send beacon frame tx rate is 6Mbpm\n");
42479 + }
42480 + else
42481 + {
42482 + tx_rate =10;
42483 + DMESG("send beacon frame tx rate is 1Mbpm\n");
42484 + }
42485 +
42486 + //rtl819xusb_beacon_tx(dev,tx_rate); // HW Beacon
42487 +
42488 + }
42489 +
42490 +}
42491 +
42492 +
42493 +
42494 +
42495 +/*-----------------------------------------------------------------------------
42496 + * Function: cmpk_handle_interrupt_status()
42497 + *
42498 + * Overview: The function is responsible for extract the message from
42499 + * firmware. It will contain dedicated info in
42500 + * ws-07-0063-v06-rtl819x-command-packet-specification-070315.doc.
42501 + * Please refer to chapter "Interrupt Status Element".
42502 + *
42503 + * Input: struct net_device *dev,
42504 + * u8* pmsg - Message Pointer of the command packet.
42505 + *
42506 + * Output: NONE
42507 + *
42508 + * Return: NONE
42509 + *
42510 + * Revised History:
42511 + * When Who Remark
42512 + * 05/12/2008 amy Add this for rtl8192 porting from windows code.
42513 + *
42514 + *---------------------------------------------------------------------------*/
42515 +static void
42516 +cmpk_handle_interrupt_status(
42517 + struct net_device *dev,
42518 + u8* pmsg)
42519 +{
42520 + cmpk_intr_sta_t rx_intr_status; /* */
42521 + struct r8192_priv *priv = ieee80211_priv(dev);
42522 +
42523 + DMESG("---> cmpk_Handle_Interrupt_Status()\n");
42524 +
42525 + /* 0. Display received message. */
42526 + //cmpk_Display_Message(CMPK_RX_BEACON_STATE_SIZE, pMsg);
42527 +
42528 + /* 1. Extract TX feedback info from RFD to temp structure buffer. */
42529 + /* It seems that FW use big endian(MIPS) and DRV use little endian in
42530 + windows OS. So we have to read the content byte by byte or transfer
42531 + endian type before copy the message copy. */
42532 + //rx_bcn_state.Element_ID = pMsg[0];
42533 + //rx_bcn_state.Length = pMsg[1];
42534 + rx_intr_status.length = pmsg[1];
42535 + if (rx_intr_status.length != (sizeof(cmpk_intr_sta_t) - 2))
42536 + {
42537 + DMESG("cmpk_Handle_Interrupt_Status: wrong length!\n");
42538 + return;
42539 + }
42540 +
42541 +
42542 + // Statistics of beacon for ad-hoc mode.
42543 + if( priv->ieee80211->iw_mode == IW_MODE_ADHOC)
42544 + {
42545 + //2 maybe need endian transform?
42546 + rx_intr_status.interrupt_status = *((u32 *)(pmsg + 4));
42547 + //rx_intr_status.InterruptStatus = N2H4BYTE(*((UINT32 *)(pMsg + 4)));
42548 +
42549 + DMESG("interrupt status = 0x%x\n", rx_intr_status.interrupt_status);
42550 +
42551 + if (rx_intr_status.interrupt_status & ISR_TxBcnOk)
42552 + {
42553 + priv->ieee80211->bibsscoordinator = true;
42554 + priv->stats.txbeaconokint++;
42555 + }
42556 + else if (rx_intr_status.interrupt_status & ISR_TxBcnErr)
42557 + {
42558 + priv->ieee80211->bibsscoordinator = false;
42559 + priv->stats.txbeaconerr++;
42560 + }
42561 +
42562 + if (rx_intr_status.interrupt_status & ISR_BcnTimerIntr)
42563 + {
42564 + cmdpkt_beacontimerinterrupt_819xusb(dev);
42565 + }
42566 +
42567 + }
42568 +
42569 + // Other informations in interrupt status we need?
42570 +
42571 +
42572 + DMESG("<---- cmpk_handle_interrupt_status()\n");
42573 +
42574 +} /* cmpk_handle_interrupt_status */
42575 +
42576 +
42577 +/*-----------------------------------------------------------------------------
42578 + * Function: cmpk_handle_query_config_rx()
42579 + *
42580 + * Overview: The function is responsible for extract the message from
42581 + * firmware. It will contain dedicated info in
42582 + * ws-06-0063-rtl8190-command-packet-specification. Please
42583 + * refer to chapter "Beacon State Element".
42584 + *
42585 + * Input: u8 * pmsg - Message Pointer of the command packet.
42586 + *
42587 + * Output: NONE
42588 + *
42589 + * Return: NONE
42590 + *
42591 + * Revised History:
42592 + * When Who Remark
42593 + * 05/12/2008 amy Create Version 0 porting from windows code.
42594 + *
42595 + *---------------------------------------------------------------------------*/
42596 +static void
42597 +cmpk_handle_query_config_rx(
42598 + struct net_device *dev,
42599 + u8* pmsg)
42600 +{
42601 + cmpk_query_cfg_t rx_query_cfg; /* */
42602 +
42603 + /* 0. Display received message. */
42604 + //cmpk_Display_Message(CMPK_RX_BEACON_STATE_SIZE, pMsg);
42605 +
42606 + /* 1. Extract TX feedback info from RFD to temp structure buffer. */
42607 + /* It seems that FW use big endian(MIPS) and DRV use little endian in
42608 + windows OS. So we have to read the content byte by byte or transfer
42609 + endian type before copy the message copy. */
42610 + //rx_query_cfg.Element_ID = pMsg[0];
42611 + //rx_query_cfg.Length = pMsg[1];
42612 + rx_query_cfg.cfg_action = (pmsg[4] & 0x80000000)>>31;
42613 + rx_query_cfg.cfg_type = (pmsg[4] & 0x60) >> 5;
42614 + rx_query_cfg.cfg_size = (pmsg[4] & 0x18) >> 3;
42615 + rx_query_cfg.cfg_page = (pmsg[6] & 0x0F) >> 0;
42616 + rx_query_cfg.cfg_offset = pmsg[7];
42617 + rx_query_cfg.value = (pmsg[8] << 24) | (pmsg[9] << 16) |
42618 + (pmsg[10] << 8) | (pmsg[11] << 0);
42619 + rx_query_cfg.mask = (pmsg[12] << 24) | (pmsg[13] << 16) |
42620 + (pmsg[14] << 8) | (pmsg[15] << 0);
42621 +
42622 +} /* cmpk_Handle_Query_Config_Rx */
42623 +
42624 +
42625 +/*-----------------------------------------------------------------------------
42626 + * Function: cmpk_count_tx_status()
42627 + *
42628 + * Overview: Count aggregated tx status from firmwar of one type rx command
42629 + * packet element id = RX_TX_STATUS.
42630 + *
42631 + * Input: NONE
42632 + *
42633 + * Output: NONE
42634 + *
42635 + * Return: NONE
42636 + *
42637 + * Revised History:
42638 + * When Who Remark
42639 + * 05/12/2008 amy Create Version 0 porting from windows code.
42640 + *
42641 + *---------------------------------------------------------------------------*/
42642 +static void cmpk_count_tx_status( struct net_device *dev,
42643 + cmpk_tx_status_t *pstx_status)
42644 +{
42645 + struct r8192_priv *priv = ieee80211_priv(dev);
42646 +
42647 +#ifdef ENABLE_PS
42648 +
42649 + RT_RF_POWER_STATE rtstate;
42650 +
42651 + pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState));
42652 +
42653 + // When RF is off, we should not count the packet for hw/sw synchronize
42654 + // reason, ie. there may be a duration while sw switch is changed and hw
42655 + // switch is being changed. 2006.12.04, by shien chang.
42656 + if (rtState == eRfOff)
42657 + {
42658 + return;
42659 + }
42660 +#endif
42661 +
42662 + priv->stats.txfeedbackok += pstx_status->txok;
42663 + priv->stats.txoktotal += pstx_status->txok;
42664 +
42665 + priv->stats.txfeedbackfail += pstx_status->txfail;
42666 + priv->stats.txerrtotal += pstx_status->txfail;
42667 +
42668 + priv->stats.txretrycount += pstx_status->txretry;
42669 + priv->stats.txfeedbackretry += pstx_status->txretry;
42670 +
42671 + //pAdapter->TxStats.NumTxOkBytesTotal += psTx_FB->pkt_length;
42672 + //pAdapter->TxStats.NumTxErrBytesTotal += psTx_FB->pkt_length;
42673 + //pAdapter->MgntInfo.LinkDetectInfo.NumTxOkInPeriod++;
42674 +
42675 + priv->stats.txmulticast += pstx_status->txmcok;
42676 + priv->stats.txbroadcast += pstx_status->txbcok;
42677 + priv->stats.txunicast += pstx_status->txucok;
42678 +
42679 + priv->stats.txerrmulticast += pstx_status->txmcfail;
42680 + priv->stats.txerrbroadcast += pstx_status->txbcfail;
42681 + priv->stats.txerrunicast += pstx_status->txucfail;
42682 +
42683 + priv->stats.txbytesmulticast += pstx_status->txmclength;
42684 + priv->stats.txbytesbroadcast += pstx_status->txbclength;
42685 + priv->stats.txbytesunicast += pstx_status->txuclength;
42686 +
42687 + priv->stats.last_packet_rate = pstx_status->rate;
42688 +} /* cmpk_CountTxStatus */
42689 +
42690 +
42691 +
42692 +/*-----------------------------------------------------------------------------
42693 + * Function: cmpk_handle_tx_status()
42694 + *
42695 + * Overview: Firmware add a new tx feedback status to reduce rx command
42696 + * packet buffer operation load.
42697 + *
42698 + * Input: NONE
42699 + *
42700 + * Output: NONE
42701 + *
42702 + * Return: NONE
42703 + *
42704 + * Revised History:
42705 + * When Who Remark
42706 + * 05/12/2008 amy Create Version 0 porting from windows code.
42707 + *
42708 + *---------------------------------------------------------------------------*/
42709 +static void
42710 +cmpk_handle_tx_status(
42711 + struct net_device *dev,
42712 + u8* pmsg)
42713 +{
42714 + cmpk_tx_status_t rx_tx_sts; /* */
42715 +
42716 + memcpy((void*)&rx_tx_sts, (void*)pmsg, sizeof(cmpk_tx_status_t));
42717 + /* 2. Use tx feedback info to count TX statistics. */
42718 + cmpk_count_tx_status(dev, &rx_tx_sts);
42719 +
42720 +} /* cmpk_Handle_Tx_Status */
42721 +
42722 +
42723 +/*-----------------------------------------------------------------------------
42724 + * Function: cmpk_handle_tx_rate_history()
42725 + *
42726 + * Overview: Firmware add a new tx rate history
42727 + *
42728 + * Input: NONE
42729 + *
42730 + * Output: NONE
42731 + *
42732 + * Return: NONE
42733 + *
42734 + * Revised History:
42735 + * When Who Remark
42736 + * 05/12/2008 amy Create Version 0 porting from windows code.
42737 + *
42738 + *---------------------------------------------------------------------------*/
42739 +static void
42740 +cmpk_handle_tx_rate_history(
42741 + struct net_device *dev,
42742 + u8* pmsg)
42743 +{
42744 + cmpk_tx_rahis_t *ptxrate;
42745 +// RT_RF_POWER_STATE rtState;
42746 + u8 i, j;
42747 + u16 length = sizeof(cmpk_tx_rahis_t);
42748 + u32 *ptemp;
42749 + struct r8192_priv *priv = ieee80211_priv(dev);
42750 +
42751 +
42752 +#ifdef ENABLE_PS
42753 + pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState));
42754 +
42755 + // When RF is off, we should not count the packet for hw/sw synchronize
42756 + // reason, ie. there may be a duration while sw switch is changed and hw
42757 + // switch is being changed. 2006.12.04, by shien chang.
42758 + if (rtState == eRfOff)
42759 + {
42760 + return;
42761 + }
42762 +#endif
42763 +
42764 + ptemp = (u32 *)pmsg;
42765 +
42766 + //
42767 + // Do endian transfer to word alignment(16 bits) for windows system.
42768 + // You must do different endian transfer for linux and MAC OS
42769 + //
42770 + for (i = 0; i < (length/4); i++)
42771 + {
42772 + u16 temp1, temp2;
42773 +
42774 + temp1 = ptemp[i]&0x0000FFFF;
42775 + temp2 = ptemp[i]>>16;
42776 + ptemp[i] = (temp1<<16)|temp2;
42777 + }
42778 +
42779 + ptxrate = (cmpk_tx_rahis_t *)pmsg;
42780 +
42781 + if (ptxrate == NULL )
42782 + {
42783 + return;
42784 + }
42785 +
42786 + for (i = 0; i < 16; i++)
42787 + {
42788 + // Collect CCK rate packet num
42789 + if (i < 4)
42790 + priv->stats.txrate.cck[i] += ptxrate->cck[i];
42791 +
42792 + // Collect OFDM rate packet num
42793 + if (i< 8)
42794 + priv->stats.txrate.ofdm[i] += ptxrate->ofdm[i];
42795 +
42796 + for (j = 0; j < 4; j++)
42797 + priv->stats.txrate.ht_mcs[j][i] += ptxrate->ht_mcs[j][i];
42798 + }
42799 +
42800 +} /* cmpk_Handle_Tx_Rate_History */
42801 +
42802 +
42803 +/*-----------------------------------------------------------------------------
42804 + * Function: cmpk_message_handle_rx()
42805 + *
42806 + * Overview: In the function, we will capture different RX command packet
42807 + * info. Every RX command packet element has different message
42808 + * length and meaning in content. We only support three type of RX
42809 + * command packet now. Please refer to document
42810 + * ws-06-0063-rtl8190-command-packet-specification.
42811 + *
42812 + * Input: NONE
42813 + *
42814 + * Output: NONE
42815 + *
42816 + * Return: NONE
42817 + *
42818 + * Revised History:
42819 + * When Who Remark
42820 + * 05/06/2008 amy Create Version 0 porting from windows code.
42821 + *
42822 + *---------------------------------------------------------------------------*/
42823 +u32 cmpk_message_handle_rx(struct net_device *dev, struct ieee80211_rx_stats *pstats)
42824 +{
42825 +// u32 debug_level = DBG_LOUD;
42826 + struct r8192_priv *priv = ieee80211_priv(dev);
42827 + int total_length;
42828 + u8 cmd_length, exe_cnt = 0;
42829 + u8 element_id;
42830 + u8 *pcmd_buff;
42831 +
42832 + RT_TRACE(COMP_EVENTS, "---->cmpk_message_handle_rx()\n");
42833 +
42834 + /* 0. Check inpt arguments. If is is a command queue message or pointer is
42835 + null. */
42836 + if (/*(prfd->queue_id != CMPK_RX_QUEUE_ID) || */(pstats== NULL))
42837 + {
42838 + /* Print error message. */
42839 + /*RT_TRACE(COMP_SEND, DebugLevel,
42840 + ("\n\r[CMPK]-->Err queue id or pointer"));*/
42841 + return 0; /* This is not a command packet. */
42842 + }
42843 +
42844 + /* 1. Read received command packet message length from RFD. */
42845 + total_length = pstats->Length;
42846 +
42847 + /* 2. Read virtual address from RFD. */
42848 + pcmd_buff = pstats->virtual_address;
42849 +
42850 + /* 3. Read command pakcet element id and length. */
42851 + element_id = pcmd_buff[0];
42852 + /*RT_TRACE(COMP_SEND, DebugLevel,
42853 + ("\n\r[CMPK]-->element ID=%d Len=%d", element_id, total_length));*/
42854 +
42855 + /* 4. Check every received command packet conent according to different
42856 + element type. Because FW may aggregate RX command packet to minimize
42857 + transmit time between DRV and FW.*/
42858 + // Add a counter to prevent to locked in the loop too long
42859 + while (total_length > 0 || exe_cnt++ >100)
42860 + {
42861 + /* 2007/01/17 MH We support aggregation of different cmd in the same packet. */
42862 + element_id = pcmd_buff[0];
42863 +
42864 + switch(element_id)
42865 + {
42866 + case RX_TX_FEEDBACK:
42867 +
42868 + RT_TRACE(COMP_EVENTS, "---->cmpk_message_handle_rx():RX_TX_FEEDBACK\n");
42869 + cmpk_handle_tx_feedback (dev, pcmd_buff);
42870 + cmd_length = CMPK_RX_TX_FB_SIZE;
42871 + break;
42872 +
42873 + case RX_INTERRUPT_STATUS:
42874 +
42875 + RT_TRACE(COMP_EVENTS, "---->cmpk_message_handle_rx():RX_INTERRUPT_STATUS\n");
42876 + cmpk_handle_interrupt_status(dev, pcmd_buff);
42877 + cmd_length = sizeof(cmpk_intr_sta_t);
42878 + break;
42879 +
42880 + case BOTH_QUERY_CONFIG:
42881 +
42882 + RT_TRACE(COMP_EVENTS, "---->cmpk_message_handle_rx():BOTH_QUERY_CONFIG\n");
42883 + cmpk_handle_query_config_rx(dev, pcmd_buff);
42884 + cmd_length = CMPK_BOTH_QUERY_CONFIG_SIZE;
42885 + break;
42886 +
42887 + case RX_TX_STATUS:
42888 +
42889 + RT_TRACE(COMP_EVENTS, "---->cmpk_message_handle_rx():RX_TX_STATUS\n");
42890 + cmpk_handle_tx_status(dev, pcmd_buff);
42891 + cmd_length = CMPK_RX_TX_STS_SIZE;
42892 + break;
42893 +
42894 + case RX_TX_PER_PKT_FEEDBACK:
42895 + // You must at lease add a switch case element here,
42896 + // Otherwise, we will jump to default case.
42897 + //DbgPrint("CCX Test\r\n");
42898 + RT_TRACE(COMP_EVENTS, "---->cmpk_message_handle_rx():RX_TX_PER_PKT_FEEDBACK\n");
42899 + cmd_length = CMPK_RX_TX_FB_SIZE;
42900 + break;
42901 +
42902 + case RX_TX_RATE_HISTORY:
42903 + //DbgPrint(" rx tx rate history\r\n");
42904 +
42905 + RT_TRACE(COMP_EVENTS, "---->cmpk_message_handle_rx():RX_TX_HISTORY\n");
42906 + cmpk_handle_tx_rate_history(dev, pcmd_buff);
42907 + cmd_length = CMPK_TX_RAHIS_SIZE;
42908 + break;
42909 +
42910 + default:
42911 +
42912 + RT_TRACE(COMP_EVENTS, "---->cmpk_message_handle_rx():unknow CMD Element\n");
42913 + return 1; /* This is a command packet. */
42914 + }
42915 + // 2007/01/22 MH Display received rx command packet info.
42916 + //cmpk_Display_Message(cmd_length, pcmd_buff);
42917 +
42918 + // 2007/01/22 MH Add to display tx statistic.
42919 + //cmpk_DisplayTxStatistic(pAdapter);
42920 +
42921 + /* 2007/03/09 MH Collect sidderent cmd element pkt num. */
42922 + priv->stats.rxcmdpkt[element_id]++;
42923 +
42924 + total_length -= cmd_length;
42925 + pcmd_buff += cmd_length;
42926 + } /* while (total_length > 0) */
42927 + return 1; /* This is a command packet. */
42928 +
42929 + RT_TRACE(COMP_EVENTS, "<----cmpk_message_handle_rx()\n");
42930 +} /* CMPK_Message_Handle_Rx */
42931 --- /dev/null
42932 +++ b/drivers/staging/rtl8192e/r819xE_cmdpkt.h
42933 @@ -0,0 +1,207 @@
42934 +#ifndef R819XUSB_CMDPKT_H
42935 +#define R819XUSB_CMDPKT_H
42936 +/* Different command packet have dedicated message length and definition. */
42937 +#define CMPK_RX_TX_FB_SIZE sizeof(cmpk_txfb_t) //20
42938 +#define CMPK_TX_SET_CONFIG_SIZE sizeof(cmpk_set_cfg_t) //16
42939 +#define CMPK_BOTH_QUERY_CONFIG_SIZE sizeof(cmpk_set_cfg_t) //16
42940 +#define CMPK_RX_TX_STS_SIZE sizeof(cmpk_tx_status_t)//
42941 +#define CMPK_RX_DBG_MSG_SIZE sizeof(cmpk_rx_dbginfo_t)//
42942 +#define CMPK_TX_RAHIS_SIZE sizeof(cmpk_tx_rahis_t)
42943 +
42944 +/* 2008/05/08 amy For USB constant. */
42945 +#define ISR_TxBcnOk BIT27 // Transmit Beacon OK
42946 +#define ISR_TxBcnErr BIT26 // Transmit Beacon Error
42947 +#define ISR_BcnTimerIntr BIT13 // Beacon Timer Interrupt
42948 +
42949 +#if 0
42950 +/* Define packet type. */
42951 +typedef enum tag_packet_type
42952 +{
42953 + PACKET_BROADCAST,
42954 + PACKET_MULTICAST,
42955 + PACKET_UNICAST,
42956 + PACKET_TYPE_MAX
42957 +}cmpk_pkt_type_e;
42958 +#endif
42959 +
42960 +/* Define element ID of command packet. */
42961 +
42962 +/*------------------------------Define structure----------------------------*/
42963 +/* Define different command packet structure. */
42964 +/* 1. RX side: TX feedback packet. */
42965 +typedef struct tag_cmd_pkt_tx_feedback
42966 +{
42967 + // DWORD 0
42968 + u8 element_id; /* Command packet type. */
42969 + u8 length; /* Command packet length. */
42970 + /* 2007/07/05 MH Change tx feedback info field. */
42971 + /*------TX Feedback Info Field */
42972 + u8 TID:4; /* */
42973 + u8 fail_reason:3; /* */
42974 + u8 tok:1; /* Transmit ok. */
42975 + u8 reserve1:4; /* */
42976 + u8 pkt_type:2; /* */
42977 + u8 bandwidth:1; /* */
42978 + u8 qos_pkt:1; /* */
42979 +
42980 + // DWORD 1
42981 + u8 reserve2; /* */
42982 + /*------TX Feedback Info Field */
42983 + u8 retry_cnt; /* */
42984 + u16 pkt_id; /* */
42985 +
42986 + // DWORD 3
42987 + u16 seq_num; /* */
42988 + u8 s_rate; /* Start rate. */
42989 + u8 f_rate; /* Final rate. */
42990 +
42991 + // DWORD 4
42992 + u8 s_rts_rate; /* */
42993 + u8 f_rts_rate; /* */
42994 + u16 pkt_length; /* */
42995 +
42996 + // DWORD 5
42997 + u16 reserve3; /* */
42998 + u16 duration; /* */
42999 +}cmpk_txfb_t;
43000 +
43001 +/* 2. RX side: Interrupt status packet. It includes Beacon State,
43002 + Beacon Timer Interrupt and other useful informations in MAC ISR Reg. */
43003 +typedef struct tag_cmd_pkt_interrupt_status
43004 +{
43005 + u8 element_id; /* Command packet type. */
43006 + u8 length; /* Command packet length. */
43007 + u16 reserve;
43008 + u32 interrupt_status; /* Interrupt Status. */
43009 +}cmpk_intr_sta_t;
43010 +
43011 +
43012 +/* 3. TX side: Set configuration packet. */
43013 +typedef struct tag_cmd_pkt_set_configuration
43014 +{
43015 + u8 element_id; /* Command packet type. */
43016 + u8 length; /* Command packet length. */
43017 + u16 reserve1; /* */
43018 + u8 cfg_reserve1:3;
43019 + u8 cfg_size:2; /* Configuration info. */
43020 + u8 cfg_type:2; /* Configuration info. */
43021 + u8 cfg_action:1; /* Configuration info. */
43022 + u8 cfg_reserve2; /* Configuration info. */
43023 + u8 cfg_page:4; /* Configuration info. */
43024 + u8 cfg_reserve3:4; /* Configuration info. */
43025 + u8 cfg_offset; /* Configuration info. */
43026 + u32 value; /* */
43027 + u32 mask; /* */
43028 +}cmpk_set_cfg_t;
43029 +
43030 +/* 4. Both side : TX/RX query configuraton packet. The query structure is the
43031 + same as set configuration. */
43032 +#define cmpk_query_cfg_t cmpk_set_cfg_t
43033 +
43034 +/* 5. Multi packet feedback status. */
43035 +typedef struct tag_tx_stats_feedback // PJ quick rxcmd 09042007
43036 +{
43037 + // For endian transfer --> Driver will not the same as firmware structure.
43038 + // DW 0
43039 + u16 reserve1;
43040 + u8 length; // Command packet length
43041 + u8 element_id; // Command packet type
43042 +
43043 + // DW 1
43044 + u16 txfail; // Tx Fail count
43045 + u16 txok; // Tx ok count
43046 +
43047 + // DW 2
43048 + u16 txmcok; // tx multicast
43049 + u16 txretry; // Tx Retry count
43050 +
43051 + // DW 3
43052 + u16 txucok; // tx unicast
43053 + u16 txbcok; // tx broadcast
43054 +
43055 + // DW 4
43056 + u16 txbcfail; //
43057 + u16 txmcfail; //
43058 +
43059 + // DW 5
43060 + u16 reserve2; //
43061 + u16 txucfail; //
43062 +
43063 + // DW 6-8
43064 + u32 txmclength;
43065 + u32 txbclength;
43066 + u32 txuclength;
43067 +
43068 + // DW 9
43069 + u16 reserve3_23;
43070 + u8 reserve3_1;
43071 + u8 rate;
43072 +}__attribute__((packed)) cmpk_tx_status_t;
43073 +
43074 +/* 6. Debug feedback message. */
43075 +/* 2007/10/23 MH Define RX debug message */
43076 +typedef struct tag_rx_debug_message_feedback
43077 +{
43078 + // For endian transfer --> for driver
43079 + // DW 0
43080 + u16 reserve1;
43081 + u8 length; // Command packet length
43082 + u8 element_id; // Command packet type
43083 +
43084 + // DW 1-??
43085 + // Variable debug message.
43086 +
43087 +}cmpk_rx_dbginfo_t;
43088 +
43089 +/* 2008/03/20 MH Define transmit rate history. For big endian format. */
43090 +typedef struct tag_tx_rate_history
43091 +{
43092 + // For endian transfer --> for driver
43093 + // DW 0
43094 + u8 element_id; // Command packet type
43095 + u8 length; // Command packet length
43096 + u16 reserved1;
43097 +
43098 + // DW 1-2 CCK rate counter
43099 + u16 cck[4];
43100 +
43101 + // DW 3-6
43102 + u16 ofdm[8];
43103 +
43104 + // DW 7-14
43105 + //UINT16 MCS_BW0_SG0[16];
43106 +
43107 + // DW 15-22
43108 + //UINT16 MCS_BW1_SG0[16];
43109 +
43110 + // DW 23-30
43111 + //UINT16 MCS_BW0_SG1[16];
43112 +
43113 + // DW 31-38
43114 + //UINT16 MCS_BW1_SG1[16];
43115 +
43116 + // DW 7-14 BW=0 SG=0
43117 + // DW 15-22 BW=1 SG=0
43118 + // DW 23-30 BW=0 SG=1
43119 + // DW 31-38 BW=1 SG=1
43120 + u16 ht_mcs[4][16];
43121 +
43122 +}__attribute__((packed)) cmpk_tx_rahis_t;
43123 +
43124 +typedef enum tag_command_packet_directories
43125 +{
43126 + RX_TX_FEEDBACK = 0,
43127 + RX_INTERRUPT_STATUS = 1,
43128 + TX_SET_CONFIG = 2,
43129 + BOTH_QUERY_CONFIG = 3,
43130 + RX_TX_STATUS = 4,
43131 + RX_DBGINFO_FEEDBACK = 5,
43132 + RX_TX_PER_PKT_FEEDBACK = 6,
43133 + RX_TX_RATE_HISTORY = 7,
43134 + RX_CMD_ELE_MAX
43135 +}cmpk_element_e;
43136 +
43137 +extern u32 cmpk_message_handle_rx(struct net_device *dev, struct ieee80211_rx_stats * pstats);
43138 +
43139 +
43140 +#endif
43141 --- /dev/null
43142 +++ b/drivers/staging/rtl8192e/r819xE_firmware.c
43143 @@ -0,0 +1,620 @@
43144 +/**************************************************************************************************
43145 + * Procedure: Init boot code/firmware code/data session
43146 + *
43147 + * Description: This routine will intialize firmware. If any error occurs during the initialization
43148 + * process, the routine shall terminate immediately and return fail.
43149 + * NIC driver should call NdisOpenFile only from MiniportInitialize.
43150 + *
43151 + * Arguments: The pointer of the adapter
43152 +
43153 + * Returns:
43154 + * NDIS_STATUS_FAILURE - the following initialization process should be terminated
43155 + * NDIS_STATUS_SUCCESS - if firmware initialization process success
43156 +**************************************************************************************************/
43157 +//#include "ieee80211.h"
43158 +#include "r8192E.h"
43159 +#include "r8192E_hw.h"
43160 +#ifdef RTL8190P
43161 +#include "r819xP_firmware_img.h"
43162 +#else
43163 +#include "r819xE_firmware_img.h"
43164 +#endif
43165 +#include "r819xE_firmware.h"
43166 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
43167 +#include <linux/firmware.h>
43168 +#endif
43169 +
43170 +void firmware_init_param(struct net_device *dev)
43171 +{
43172 + struct r8192_priv *priv = ieee80211_priv(dev);
43173 + rt_firmware *pfirmware = priv->pFirmware;
43174 +
43175 + pfirmware->cmdpacket_frag_thresold = GET_COMMAND_PACKET_FRAG_THRESHOLD(MAX_TRANSMIT_BUFFER_SIZE);
43176 +}
43177 +
43178 +/*
43179 + * segment the img and use the ptr and length to remember info on each segment
43180 + *
43181 + */
43182 +static bool fw_download_code(struct net_device *dev, u8 *code_virtual_address, u32 buffer_len)
43183 +{
43184 + struct r8192_priv *priv = ieee80211_priv(dev);
43185 + bool rt_status = true;
43186 + u16 frag_threshold;
43187 + u16 frag_length, frag_offset = 0;
43188 + //u16 total_size;
43189 + int i;
43190 +
43191 + rt_firmware *pfirmware = priv->pFirmware;
43192 + struct sk_buff *skb;
43193 + unsigned char *seg_ptr;
43194 + cb_desc *tcb_desc;
43195 + u8 bLastIniPkt;
43196 +
43197 + firmware_init_param(dev);
43198 + //Fragmentation might be required
43199 + frag_threshold = pfirmware->cmdpacket_frag_thresold;
43200 + do {
43201 + if((buffer_len - frag_offset) > frag_threshold) {
43202 + frag_length = frag_threshold ;
43203 + bLastIniPkt = 0;
43204 +
43205 + } else {
43206 + frag_length = buffer_len - frag_offset;
43207 + bLastIniPkt = 1;
43208 +
43209 + }
43210 +
43211 + /* Allocate skb buffer to contain firmware info and tx descriptor info
43212 + * add 4 to avoid packet appending overflow.
43213 + * */
43214 + //skb = dev_alloc_skb(USB_HWDESC_HEADER_LEN + frag_length + 4);
43215 + skb = dev_alloc_skb(frag_length + 4);
43216 + memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev));
43217 + tcb_desc = (cb_desc*)(skb->cb + MAX_DEV_ADDR_SIZE);
43218 + tcb_desc->queue_index = TXCMD_QUEUE;
43219 + tcb_desc->bCmdOrInit = DESC_PACKET_TYPE_INIT;
43220 + tcb_desc->bLastIniPkt = bLastIniPkt;
43221 +
43222 + //skb_reserve(skb, USB_HWDESC_HEADER_LEN);
43223 + seg_ptr = skb->data;
43224 + /*
43225 + * Transform from little endian to big endian
43226 + * and pending zero
43227 + */
43228 + for(i=0 ; i < frag_length; i+=4) {
43229 + *seg_ptr++ = ((i+0)<frag_length)?code_virtual_address[i+3]:0;
43230 + *seg_ptr++ = ((i+1)<frag_length)?code_virtual_address[i+2]:0;
43231 + *seg_ptr++ = ((i+2)<frag_length)?code_virtual_address[i+1]:0;
43232 + *seg_ptr++ = ((i+3)<frag_length)?code_virtual_address[i+0]:0;
43233 + }
43234 + tcb_desc->txbuf_size= (u16)i;
43235 + skb_put(skb, i);
43236 + priv->ieee80211->softmac_hard_start_xmit(skb,dev);
43237 +
43238 + code_virtual_address += frag_length;
43239 + frag_offset += frag_length;
43240 +
43241 + }while(frag_offset < buffer_len);
43242 +
43243 + return rt_status;
43244 +
43245 +#if 0
43246 +cmdsend_downloadcode_fail:
43247 + rt_status = false;
43248 + RT_TRACE(COMP_ERR, "CmdSendDownloadCode fail !!\n");
43249 + return rt_status;
43250 +#endif
43251 +}
43252 +
43253 +//-----------------------------------------------------------------------------
43254 +// Procedure: Check whether main code is download OK. If OK, turn on CPU
43255 +//
43256 +// Description: CPU register locates in different page against general register.
43257 +// Switch to CPU register in the begin and switch back before return
43258 +//
43259 +//
43260 +// Arguments: The pointer of the adapter
43261 +//
43262 +// Returns:
43263 +// NDIS_STATUS_FAILURE - the following initialization process should be terminated
43264 +// NDIS_STATUS_SUCCESS - if firmware initialization process success
43265 +//-----------------------------------------------------------------------------
43266 +static bool CPUcheck_maincodeok_turnonCPU(struct net_device *dev)
43267 +{
43268 + bool rt_status = true;
43269 + int check_putcodeOK_time = 200000, check_bootOk_time = 200000;
43270 + u32 CPU_status = 0;
43271 +
43272 + /* Check whether put code OK */
43273 + do {
43274 + CPU_status = read_nic_dword(dev, CPU_GEN);
43275 +
43276 + if(CPU_status&CPU_GEN_PUT_CODE_OK)
43277 + break;
43278 +
43279 + }while(check_putcodeOK_time--);
43280 +
43281 + if(!(CPU_status&CPU_GEN_PUT_CODE_OK)) {
43282 + RT_TRACE(COMP_ERR, "Download Firmware: Put code fail!\n");
43283 + goto CPUCheckMainCodeOKAndTurnOnCPU_Fail;
43284 + } else {
43285 + RT_TRACE(COMP_FIRMWARE, "Download Firmware: Put code ok!\n");
43286 + }
43287 +
43288 + /* Turn On CPU */
43289 + CPU_status = read_nic_dword(dev, CPU_GEN);
43290 + write_nic_byte(dev, CPU_GEN, (u8)((CPU_status|CPU_GEN_PWR_STB_CPU)&0xff));
43291 + mdelay(1);
43292 +
43293 + /* Check whether CPU boot OK */
43294 + do {
43295 + CPU_status = read_nic_dword(dev, CPU_GEN);
43296 +
43297 + if(CPU_status&CPU_GEN_BOOT_RDY)
43298 + break;
43299 + }while(check_bootOk_time--);
43300 +
43301 + if(!(CPU_status&CPU_GEN_BOOT_RDY)) {
43302 + goto CPUCheckMainCodeOKAndTurnOnCPU_Fail;
43303 + } else {
43304 + RT_TRACE(COMP_FIRMWARE, "Download Firmware: Boot ready!\n");
43305 + }
43306 +
43307 + return rt_status;
43308 +
43309 +CPUCheckMainCodeOKAndTurnOnCPU_Fail:
43310 + RT_TRACE(COMP_ERR, "ERR in %s()\n", __FUNCTION__);
43311 + rt_status = FALSE;
43312 + return rt_status;
43313 +}
43314 +
43315 +static bool CPUcheck_firmware_ready(struct net_device *dev)
43316 +{
43317 +
43318 + bool rt_status = true;
43319 + int check_time = 200000;
43320 + u32 CPU_status = 0;
43321 +
43322 + /* Check Firmware Ready */
43323 + do {
43324 + CPU_status = read_nic_dword(dev, CPU_GEN);
43325 +
43326 + if(CPU_status&CPU_GEN_FIRM_RDY)
43327 + break;
43328 +
43329 + }while(check_time--);
43330 +
43331 + if(!(CPU_status&CPU_GEN_FIRM_RDY))
43332 + goto CPUCheckFirmwareReady_Fail;
43333 + else
43334 + RT_TRACE(COMP_FIRMWARE, "Download Firmware: Firmware ready!\n");
43335 +
43336 + return rt_status;
43337 +
43338 +CPUCheckFirmwareReady_Fail:
43339 + RT_TRACE(COMP_ERR, "ERR in %s()\n", __FUNCTION__);
43340 + rt_status = false;
43341 + return rt_status;
43342 +
43343 +}
43344 +
43345 +bool init_firmware(struct net_device *dev)
43346 +{
43347 + struct r8192_priv *priv = ieee80211_priv(dev);
43348 + bool rt_status = TRUE;
43349 +
43350 +#ifdef RTL8190P
43351 + u8 *firmware_img_buf[3] = { &rtl8190_fwboot_array[0],
43352 + &rtl8190_fwmain_array[0],
43353 + &rtl8190_fwdata_array[0]};
43354 +
43355 + u32 firmware_img_len[3] = { sizeof(rtl8190_fwboot_array),
43356 + sizeof(rtl8190_fwmain_array),
43357 + sizeof(rtl8190_fwdata_array)};
43358 +#else
43359 + u8 *firmware_img_buf[3] = { &rtl8192e_fwboot_array[0],
43360 + &rtl8192e_fwmain_array[0],
43361 + &rtl8192e_fwdata_array[0]};
43362 +
43363 + u32 firmware_img_len[3] = { sizeof(rtl8192e_fwboot_array),
43364 + sizeof(rtl8192e_fwmain_array),
43365 + sizeof(rtl8192e_fwdata_array)};
43366 +#endif
43367 + u32 file_length = 0;
43368 + u8 *mapped_file = NULL;
43369 + u32 init_step = 0;
43370 + opt_rst_type_e rst_opt = OPT_SYSTEM_RESET;
43371 + firmware_init_step_e starting_state = FW_INIT_STEP0_BOOT;
43372 +
43373 + rt_firmware *pfirmware = priv->pFirmware;
43374 + const struct firmware *fw_entry;
43375 +#ifdef RTL8190P
43376 + const char *fw_name[3] = { "RTL8190P/boot.img",
43377 + "RTL8190P/main.img",
43378 + "RTL8190P/data.img"};
43379 +#endif
43380 +#ifdef RTL8192E
43381 + const char *fw_name[3] = { "RTL8192E/boot.img",
43382 + "RTL8192E/main.img",
43383 + "RTL8192E/data.img"};
43384 +#endif
43385 + int rc;
43386 +
43387 + RT_TRACE(COMP_FIRMWARE, " PlatformInitFirmware()==>\n");
43388 +
43389 + if (pfirmware->firmware_status == FW_STATUS_0_INIT ) {
43390 + /* it is called by reset */
43391 + rst_opt = OPT_SYSTEM_RESET;
43392 + starting_state = FW_INIT_STEP0_BOOT;
43393 + // TODO: system reset
43394 +
43395 + }else if(pfirmware->firmware_status == FW_STATUS_5_READY) {
43396 + /* it is called by Initialize */
43397 + rst_opt = OPT_FIRMWARE_RESET;
43398 + starting_state = FW_INIT_STEP2_DATA;
43399 + }else {
43400 + RT_TRACE(COMP_FIRMWARE, "PlatformInitFirmware: undefined firmware state\n");
43401 + }
43402 +
43403 + /*
43404 + * Download boot, main, and data image for System reset.
43405 + * Download data image for firmware reseta
43406 + */
43407 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
43408 + priv->firmware_source = FW_SOURCE_HEADER_FILE;
43409 +#else
43410 + priv->firmware_source = FW_SOURCE_IMG_FILE;
43411 +#endif
43412 + for(init_step = starting_state; init_step <= FW_INIT_STEP2_DATA; init_step++) {
43413 + /*
43414 + * Open Image file, and map file to contineous memory if open file success.
43415 + * or read image file from array. Default load from IMG file
43416 + */
43417 + if(rst_opt == OPT_SYSTEM_RESET) {
43418 + switch(priv->firmware_source) {
43419 + case FW_SOURCE_IMG_FILE:
43420 + {
43421 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
43422 + if(pfirmware->firmware_buf_size[init_step] == 0) {
43423 + rc = request_firmware(&fw_entry, fw_name[init_step],&priv->pdev->dev);
43424 + if(rc < 0 ) {
43425 + RT_TRACE(COMP_FIRMWARE, "request firmware fail!\n");
43426 + goto download_firmware_fail;
43427 + }
43428 +
43429 + if(fw_entry->size > sizeof(pfirmware->firmware_buf[init_step])) {
43430 + RT_TRACE(COMP_FIRMWARE, "img file size exceed the container buffer fail!\n");
43431 + goto download_firmware_fail;
43432 + }
43433 +
43434 + if(init_step != FW_INIT_STEP1_MAIN) {
43435 + memcpy(pfirmware->firmware_buf[init_step],fw_entry->data,fw_entry->size);
43436 + pfirmware->firmware_buf_size[init_step] = fw_entry->size;
43437 +
43438 + } else {
43439 +#ifdef RTL8190P
43440 + memcpy(pfirmware->firmware_buf[init_step],fw_entry->data,fw_entry->size);
43441 + pfirmware->firmware_buf_size[init_step] = fw_entry->size;
43442 +
43443 +#else
43444 + memset(pfirmware->firmware_buf[init_step],0,128);
43445 + memcpy(&pfirmware->firmware_buf[init_step][128],fw_entry->data,fw_entry->size);
43446 + //mapped_file = pfirmware->firmware_buf[init_step];
43447 + pfirmware->firmware_buf_size[init_step] = fw_entry->size+128;
43448 + //file_length = fw_entry->size + 128;
43449 +#endif
43450 + }
43451 + //pfirmware->firmware_buf_size = file_length;
43452 +
43453 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
43454 + if(rst_opt == OPT_SYSTEM_RESET) {
43455 + release_firmware(fw_entry);
43456 + }
43457 +#endif
43458 + }
43459 + mapped_file = pfirmware->firmware_buf[init_step];
43460 + file_length = pfirmware->firmware_buf_size[init_step];
43461 +#endif
43462 + break;
43463 + }
43464 + case FW_SOURCE_HEADER_FILE:
43465 + mapped_file = firmware_img_buf[init_step];
43466 + file_length = firmware_img_len[init_step];
43467 + if(init_step == FW_INIT_STEP2_DATA) {
43468 + memcpy(pfirmware->firmware_buf[init_step], mapped_file, file_length);
43469 + pfirmware->firmware_buf_size[init_step] = file_length;
43470 + }
43471 + break;
43472 +
43473 + default:
43474 + break;
43475 + }
43476 +
43477 +
43478 + }else if(rst_opt == OPT_FIRMWARE_RESET ) {
43479 + /* we only need to download data.img here */
43480 + mapped_file = pfirmware->firmware_buf[init_step];
43481 + file_length = pfirmware->firmware_buf_size[init_step];
43482 + }
43483 +
43484 + /* Download image file */
43485 + /* The firmware download process is just as following,
43486 + * 1. that is each packet will be segmented and inserted to the wait queue.
43487 + * 2. each packet segment will be put in the skb_buff packet.
43488 + * 3. each skb_buff packet data content will already include the firmware info
43489 + * and Tx descriptor info
43490 + * */
43491 + rt_status = fw_download_code(dev,mapped_file,file_length);
43492 + if(rt_status != TRUE) {
43493 + goto download_firmware_fail;
43494 + }
43495 +
43496 + switch(init_step) {
43497 + case FW_INIT_STEP0_BOOT:
43498 + /* Download boot
43499 + * initialize command descriptor.
43500 + * will set polling bit when firmware code is also configured
43501 + */
43502 + pfirmware->firmware_status = FW_STATUS_1_MOVE_BOOT_CODE;
43503 + //mdelay(1000);
43504 + /*
43505 + * To initialize IMEM, CPU move code from 0x80000080,
43506 + * hence, we send 0x80 byte packet
43507 + */
43508 + break;
43509 +
43510 + case FW_INIT_STEP1_MAIN:
43511 + /* Download firmware code. Wait until Boot Ready and Turn on CPU */
43512 + pfirmware->firmware_status = FW_STATUS_2_MOVE_MAIN_CODE;
43513 +
43514 + /* Check Put Code OK and Turn On CPU */
43515 + rt_status = CPUcheck_maincodeok_turnonCPU(dev);
43516 + if(rt_status != TRUE) {
43517 + RT_TRACE(COMP_FIRMWARE, "CPUcheck_maincodeok_turnonCPU fail!\n");
43518 + goto download_firmware_fail;
43519 + }
43520 +
43521 + pfirmware->firmware_status = FW_STATUS_3_TURNON_CPU;
43522 + break;
43523 +
43524 + case FW_INIT_STEP2_DATA:
43525 + /* download initial data code */
43526 + pfirmware->firmware_status = FW_STATUS_4_MOVE_DATA_CODE;
43527 + mdelay(1);
43528 +
43529 + rt_status = CPUcheck_firmware_ready(dev);
43530 + if(rt_status != TRUE) {
43531 + RT_TRACE(COMP_FIRMWARE, "CPUcheck_firmware_ready fail(%d)!\n",rt_status);
43532 + goto download_firmware_fail;
43533 + }
43534 +
43535 + /* wait until data code is initialized ready.*/
43536 + pfirmware->firmware_status = FW_STATUS_5_READY;
43537 + break;
43538 + }
43539 + }
43540 +
43541 + RT_TRACE(COMP_FIRMWARE, "Firmware Download Success\n");
43542 + //assert(pfirmware->firmware_status == FW_STATUS_5_READY, ("Firmware Download Fail\n"));
43543 +
43544 + return rt_status;
43545 +
43546 +download_firmware_fail:
43547 + RT_TRACE(COMP_ERR, "ERR in %s()\n", __FUNCTION__);
43548 + rt_status = FALSE;
43549 + return rt_status;
43550 +
43551 +}
43552 +
43553 +#if 0
43554 +/*
43555 + * Procedure: (1) Transform firmware code from little endian to big endian if required.
43556 + * (2) Number of bytes in Firmware downloading should be multiple
43557 + * of 4 bytes. If length is not multiple of 4 bytes, appending of zeros is required
43558 + *
43559 + */
43560 +void CmdAppendZeroAndEndianTransform(
43561 + u1Byte *pDst,
43562 + u1Byte *pSrc,
43563 + u2Byte *pLength)
43564 +{
43565 +
43566 + u2Byte ulAppendBytes = 0, i;
43567 + u2Byte ulLength = *pLength;
43568 +
43569 +//test only
43570 + //memset(pDst, 0xcc, 12);
43571 +
43572 +
43573 + /* Transform from little endian to big endian */
43574 +//#if DEV_BUS_TYPE==PCI_INTERFACE
43575 +#if 0
43576 + for( i=0 ; i<(*pLength) ; i+=4)
43577 + {
43578 + if((i+3) < (*pLength)) pDst[i+0] = pSrc[i+3];
43579 + if((i+2) < (*pLength)) pDst[i+1] = pSrc[i+2];
43580 + if((i+1) < (*pLength)) pDst[i+2] = pSrc[i+1];
43581 + if((i+0) < (*pLength)) pDst[i+3] = pSrc[i+0];
43582 + }
43583 +#else
43584 + pDst += USB_HWDESC_HEADER_LEN;
43585 + ulLength -= USB_HWDESC_HEADER_LEN;
43586 +
43587 + for( i=0 ; i<ulLength ; i+=4) {
43588 + if((i+3) < ulLength) pDst[i+0] = pSrc[i+3];
43589 + if((i+2) < ulLength) pDst[i+1] = pSrc[i+2];
43590 + if((i+1) < ulLength) pDst[i+2] = pSrc[i+1];
43591 + if((i+0) < ulLength) pDst[i+3] = pSrc[i+0];
43592 +
43593 + }
43594 +#endif
43595 +
43596 + //1(2) Append Zero
43597 + if( ((*pLength) % 4) >0)
43598 + {
43599 + ulAppendBytes = 4-((*pLength) % 4);
43600 +
43601 + for(i=0 ; i<ulAppendBytes; i++)
43602 + pDst[ 4*((*pLength)/4) + i ] = 0x0;
43603 +
43604 + *pLength += ulAppendBytes;
43605 + }
43606 +}
43607 +#endif
43608 +
43609 +#if 0
43610 +RT_STATUS
43611 +CmdSendPacket(
43612 + PADAPTER Adapter,
43613 + PRT_TCB pTcb,
43614 + PRT_TX_LOCAL_BUFFER pBuf,
43615 + u4Byte BufferLen,
43616 + u4Byte PacketType,
43617 + BOOLEAN bLastInitPacket
43618 + )
43619 +{
43620 + s2Byte i;
43621 + u1Byte QueueID;
43622 + u2Byte firstDesc,curDesc = 0;
43623 + u2Byte FragIndex=0, FragBufferIndex=0;
43624 +
43625 + RT_STATUS rtStatus = RT_STATUS_SUCCESS;
43626 +
43627 + CmdInitTCB(Adapter, pTcb, pBuf, BufferLen);
43628 +
43629 +
43630 + if(CmdCheckFragment(Adapter, pTcb, pBuf))
43631 + CmdFragmentTCB(Adapter, pTcb);
43632 + else
43633 + pTcb->FragLength[0] = (u2Byte)pTcb->BufferList[0].Length;
43634 +
43635 + QueueID=pTcb->SpecifiedQueueID;
43636 +#if DEV_BUS_TYPE!=USB_INTERFACE
43637 + firstDesc=curDesc=Adapter->NextTxDescToFill[QueueID];
43638 +#endif
43639 +
43640 +#if DEV_BUS_TYPE!=USB_INTERFACE
43641 + if(VacancyTxDescNum(Adapter, QueueID) > pTcb->BufferCount)
43642 +#else
43643 + if(PlatformIsTxQueueAvailable(Adapter, QueueID, pTcb->BufferCount) &&
43644 + RTIsListEmpty(&Adapter->TcbWaitQueue[QueueID]))
43645 +#endif
43646 + {
43647 + pTcb->nDescUsed=0;
43648 +
43649 + for(i=0 ; i<pTcb->BufferCount ; i++)
43650 + {
43651 + Adapter->HalFunc.TxFillCmdDescHandler(
43652 + Adapter,
43653 + pTcb,
43654 + QueueID, //QueueIndex
43655 + curDesc, //index
43656 + FragBufferIndex==0, //bFirstSeg
43657 + FragBufferIndex==(pTcb->FragBufCount[FragIndex]-1), //bLastSeg
43658 + pTcb->BufferList[i].VirtualAddress, //VirtualAddress
43659 + pTcb->BufferList[i].PhysicalAddressLow, //PhyAddressLow
43660 + pTcb->BufferList[i].Length, //BufferLen
43661 + i!=0, //bSetOwnBit
43662 + (i==(pTcb->BufferCount-1)) && bLastInitPacket, //bLastInitPacket
43663 + PacketType, //DescPacketType
43664 + pTcb->FragLength[FragIndex] //PktLen
43665 + );
43666 +
43667 + if(FragBufferIndex==(pTcb->FragBufCount[FragIndex]-1))
43668 + { // Last segment of the fragment.
43669 + pTcb->nFragSent++;
43670 + }
43671 +
43672 + FragBufferIndex++;
43673 + if(FragBufferIndex==pTcb->FragBufCount[FragIndex])
43674 + {
43675 + FragIndex++;
43676 + FragBufferIndex=0;
43677 + }
43678 +
43679 +#if DEV_BUS_TYPE!=USB_INTERFACE
43680 + curDesc=(curDesc+1)%Adapter->NumTxDesc[QueueID];
43681 +#endif
43682 + pTcb->nDescUsed++;
43683 + }
43684 +
43685 +#if DEV_BUS_TYPE!=USB_INTERFACE
43686 + RTInsertTailList(&Adapter->TcbBusyQueue[QueueID], &pTcb->List);
43687 + IncrementTxDescToFill(Adapter, QueueID, pTcb->nDescUsed);
43688 + Adapter->HalFunc.SetTxDescOWNHandler(Adapter, QueueID, firstDesc);
43689 + // TODO: should call poll use QueueID
43690 + Adapter->HalFunc.TxPollingHandler(Adapter, TXCMD_QUEUE);
43691 +#endif
43692 + }
43693 + else
43694 +#if DEV_BUS_TYPE!=USB_INTERFACE
43695 + goto CmdSendPacket_Fail;
43696 +#else
43697 + {
43698 + pTcb->bLastInitPacket = bLastInitPacket;
43699 + RTInsertTailList(&Adapter->TcbWaitQueue[pTcb->SpecifiedQueueID], &pTcb->List);
43700 + }
43701 +#endif
43702 +
43703 + return rtStatus;
43704 +
43705 +#if DEV_BUS_TYPE!=USB_INTERFACE
43706 +CmdSendPacket_Fail:
43707 + rtStatus = RT_STATUS_FAILURE;
43708 + return rtStatus;
43709 +#endif
43710 +
43711 +}
43712 +#endif
43713 +
43714 +
43715 +
43716 +
43717 +#if 0
43718 +RT_STATUS
43719 +FWSendNullPacket(
43720 + IN PADAPTER Adapter,
43721 + IN u4Byte Length
43722 +)
43723 +{
43724 + RT_STATUS rtStatus = RT_STATUS_SUCCESS;
43725 +
43726 +
43727 + PRT_TCB pTcb;
43728 + PRT_TX_LOCAL_BUFFER pBuf;
43729 + BOOLEAN bLastInitPacket = FALSE;
43730 +
43731 + PlatformAcquireSpinLock(Adapter, RT_TX_SPINLOCK);
43732 +
43733 +#if DEV_BUS_TYPE==USB_INTERFACE
43734 + Length += USB_HWDESC_HEADER_LEN;
43735 +#endif
43736 +
43737 + //Get TCB and local buffer from common pool. (It is shared by CmdQ, MgntQ, and USB coalesce DataQ)
43738 + if(MgntGetBuffer(Adapter, &pTcb, &pBuf))
43739 + {
43740 + PlatformZeroMemory(pBuf->Buffer.VirtualAddress, Length);
43741 + rtStatus = CmdSendPacket(Adapter, pTcb, pBuf, Length, DESC_PACKET_TYPE_INIT, bLastInitPacket); //0 : always set LastInitPacket to zero
43742 +//#if HAL_CODE_BASE != RTL8190HW
43743 +// // TODO: for test only
43744 +// ReturnTCB(Adapter, pTcb, RT_STATUS_SUCCESS);
43745 +//#endif
43746 + if(rtStatus == RT_STATUS_FAILURE)
43747 + goto CmdSendNullPacket_Fail;
43748 + }else
43749 + goto CmdSendNullPacket_Fail;
43750 +
43751 + PlatformReleaseSpinLock(Adapter, RT_TX_SPINLOCK);
43752 + return rtStatus;
43753 +
43754 +
43755 +CmdSendNullPacket_Fail:
43756 + PlatformReleaseSpinLock(Adapter, RT_TX_SPINLOCK);
43757 + rtStatus = RT_STATUS_FAILURE;
43758 + RT_ASSERT(rtStatus == RT_STATUS_SUCCESS, ("CmdSendDownloadCode fail !!\n"));
43759 + return rtStatus;
43760 +}
43761 +#endif
43762 +
43763 +
43764 --- /dev/null
43765 +++ b/drivers/staging/rtl8192e/r819xE_firmware.h
43766 @@ -0,0 +1,68 @@
43767 +#ifndef __INC_FIRMWARE_H
43768 +#define __INC_FIRMWARE_H
43769 +
43770 +#define RTL8190_CPU_START_OFFSET 0x80
43771 +/* TODO: this definition is TBD */
43772 +//#define USB_HWDESC_HEADER_LEN 0
43773 +
43774 +/* It should be double word alignment */
43775 +//#if DEV_BUS_TYPE==PCI_INTERFACE
43776 +//#define GET_COMMAND_PACKET_FRAG_THRESHOLD(v) 4*(v/4) - 8
43777 +//#else
43778 +#define GET_COMMAND_PACKET_FRAG_THRESHOLD(v) (4*(v/4) - 8 )
43779 +//#endif
43780 +
43781 +typedef enum _firmware_init_step{
43782 + FW_INIT_STEP0_BOOT = 0,
43783 + FW_INIT_STEP1_MAIN = 1,
43784 + FW_INIT_STEP2_DATA = 2,
43785 +}firmware_init_step_e;
43786 +
43787 +typedef enum _opt_rst_type{
43788 + OPT_SYSTEM_RESET = 0,
43789 + OPT_FIRMWARE_RESET = 1,
43790 +}opt_rst_type_e;
43791 +
43792 +#if 0
43793 +/* CPU related */
43794 +RT_STATUS
43795 +CPUCheckMainCodeOKAndTurnOnCPU(
43796 + IN PADAPTER Adapter
43797 + );
43798 +
43799 +RT_STATUS
43800 +CPUCheckFirmwareReady(
43801 + IN PADAPTER Adapter
43802 + );
43803 +
43804 +/* Firmware related */
43805 +VOID
43806 +FWInitializeParameters(
43807 + IN PADAPTER Adapter
43808 + );
43809 +
43810 +RT_STATUS
43811 +FWSendDownloadCode(
43812 + IN PADAPTER Adapter,
43813 + IN pu1Byte CodeVirtualAddrress,
43814 + IN u4Byte BufferLen
43815 + );
43816 +
43817 +RT_STATUS
43818 +FWSendNullPacket(
43819 + IN PADAPTER Adapter,
43820 + IN u4Byte Length
43821 + );
43822 +
43823 +RT_STATUS
43824 +CmdSendPacket(
43825 + PADAPTER Adapter,
43826 + PRT_TCB pTcb,
43827 + PRT_TX_LOCAL_BUFFER pBuf,
43828 + u4Byte BufferLen,
43829 + u4Byte PacketType,
43830 + BOOLEAN bLastInitPacket
43831 + );
43832 +#endif
43833 +#endif
43834 +
43835 --- /dev/null
43836 +++ b/drivers/staging/rtl8192e/r819xE_firmware_img.h
43837 @@ -0,0 +1,2778 @@
43838 +#ifndef __INC_R819XE_FIRMWARE_IMG_H
43839 +#define __INC_R819XE_FIRMWARE_IMG_H
43840 +
43841 +/*Created on 2008/ 8/28, 11:46*/
43842 +#include <linux/types.h>
43843 +
43844 +static u8 rtl8192e_fwboot_array[] = {
43845 +0x10,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x3c,0x08,0xbf,0xc0,0x25,0x08,0x00,0x08,
43846 +0x3c,0x09,0xb0,0x03,0xad,0x28,0x00,0x20,0x40,0x80,0x68,0x00,0x00,0x00,0x00,0x00,
43847 +0x3c,0x0a,0xd0,0x00,0x40,0x8a,0x60,0x00,0x00,0x00,0x00,0x00,0x3c,0x08,0x80,0x01,
43848 +0x25,0x08,0xa8,0x04,0x24,0x09,0x00,0x01,0x3c,0x01,0x7f,0xff,0x34,0x21,0xff,0xff,
43849 +0x01,0x01,0x50,0x24,0x00,0x09,0x48,0x40,0x35,0x29,0x00,0x01,0x01,0x2a,0x10,0x2b,
43850 +0x14,0x40,0xff,0xfc,0x00,0x00,0x00,0x00,0x3c,0x0a,0x00,0x00,0x25,0x4a,0x00,0x00,
43851 +0x4c,0x8a,0x00,0x00,0x4c,0x89,0x08,0x00,0x00,0x00,0x00,0x00,0x3c,0x08,0x80,0x01,
43852 +0x25,0x08,0xa8,0x04,0x3c,0x01,0x80,0x00,0x01,0x21,0x48,0x25,0x3c,0x0a,0xbf,0xc0,
43853 +0x25,0x4a,0x00,0x7c,0x3c,0x0b,0xb0,0x03,0xad,0x6a,0x00,0x20,0xad,0x00,0x00,0x00,
43854 +0x21,0x08,0x00,0x04,0x01,0x09,0x10,0x2b,0x14,0x40,0xff,0xf8,0x00,0x00,0x00,0x00,
43855 +0x3c,0x08,0x80,0x01,0x25,0x08,0x7f,0xff,0x24,0x09,0x00,0x01,0x3c,0x01,0x7f,0xff,
43856 +0x34,0x21,0xff,0xff,0x01,0x01,0x50,0x24,0x00,0x09,0x48,0x40,0x35,0x29,0x00,0x01,
43857 +0x01,0x2a,0x10,0x2b,0x14,0x40,0xff,0xfc,0x00,0x00,0x00,0x00,0x3c,0x0a,0x80,0x01,
43858 +0x25,0x4a,0x00,0x00,0x3c,0x01,0x7f,0xff,0x34,0x21,0xff,0xff,0x01,0x41,0x50,0x24,
43859 +0x3c,0x09,0x00,0x01,0x35,0x29,0x7f,0xff,0x4c,0x8a,0x20,0x00,0x4c,0x89,0x28,0x00,
43860 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x24,0x08,0x04,0x10,
43861 +0x00,0x00,0x00,0x00,0x40,0x88,0xa0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
43862 +0x3c,0x08,0xbf,0xc0,0x00,0x00,0x00,0x00,0x8d,0x09,0x00,0x00,0x00,0x00,0x00,0x00,
43863 +0x3c,0x0a,0xbf,0xc0,0x25,0x4a,0x01,0x20,0x3c,0x0b,0xb0,0x03,0xad,0x6a,0x00,0x20,
43864 +0x3c,0x08,0xb0,0x03,0x8d,0x09,0x00,0x00,0x00,0x00,0x00,0x00,0x35,0x29,0x00,0x10,
43865 +0xad,0x09,0x00,0x00,0x00,0x00,0x00,0x00,0x3c,0x08,0x80,0x00,0x25,0x08,0x4b,0x94,
43866 +0x01,0x00,0x00,0x08,0x00,0x00,0x00,0x00,};
43867 +
43868 +static u8 rtl8192e_fwmain_array[] = {
43869 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
43870 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
43871 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
43872 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
43873 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
43874 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
43875 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
43876 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
43877 +0x40,0x04,0x68,0x00,0x40,0x05,0x70,0x00,0x40,0x06,0x40,0x00,0x0c,0x00,0x12,0x98,
43878 +0x00,0x00,0x00,0x00,0x40,0x1a,0x68,0x00,0x33,0x5b,0x00,0x3c,0x17,0x60,0x00,0x09,
43879 +0x00,0x00,0x00,0x00,0x40,0x1b,0x60,0x00,0x00,0x00,0x00,0x00,0x03,0x5b,0xd0,0x24,
43880 +0x40,0x1a,0x70,0x00,0x03,0x40,0x00,0x08,0x42,0x00,0x00,0x10,0x00,0x00,0x00,0x00,
43881 +0x00,0x00,0x00,0x00,0x3c,0x02,0xff,0xff,0x34,0x42,0xff,0xff,0x8c,0x43,0x00,0x00,
43882 +0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x34,0x63,0x00,0x20,0x24,0x42,0x00,0xd0,
43883 +0xac,0x62,0x00,0x00,0x00,0x00,0x20,0x21,0x27,0x85,0x8b,0x70,0x00,0x85,0x18,0x21,
43884 +0x24,0x84,0x00,0x01,0x28,0x82,0x00,0x0a,0x14,0x40,0xff,0xfc,0xa0,0x60,0x00,0x00,
43885 +0x27,0x82,0x8b,0x7a,0x24,0x04,0x00,0x06,0x24,0x84,0xff,0xff,0xa4,0x40,0x00,0x00,
43886 +0x04,0x81,0xff,0xfd,0x24,0x42,0x00,0x02,0x24,0x02,0x00,0x03,0xa3,0x82,0x8b,0x70,
43887 +0x24,0x02,0x00,0x0a,0x24,0x03,0x09,0xc4,0xa3,0x82,0x8b,0x72,0x24,0x02,0x00,0x04,
43888 +0x24,0x04,0x00,0x01,0x24,0x05,0x00,0x02,0xa7,0x83,0x8b,0x86,0xa3,0x82,0x8b,0x78,
43889 +0x24,0x03,0x04,0x00,0x24,0x02,0x02,0x00,0xaf,0x83,0x8b,0x8c,0xa3,0x85,0x8b,0x79,
43890 +0xa7,0x82,0x8b,0x7a,0xa7,0x84,0x8b,0x7c,0xaf,0x84,0x8b,0x88,0xa3,0x84,0x8b,0x71,
43891 +0xa3,0x80,0x8b,0x73,0xa3,0x80,0x8b,0x74,0xa3,0x80,0x8b,0x75,0xa3,0x84,0x8b,0x76,
43892 +0xa3,0x85,0x8b,0x77,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,
43893 +0x3c,0x02,0x80,0x00,0x24,0x42,0x01,0x7c,0x34,0x63,0x00,0x20,0xac,0x62,0x00,0x00,
43894 +0x27,0x84,0x8b,0x98,0x00,0x00,0x10,0x21,0x24,0x42,0x00,0x01,0x00,0x02,0x16,0x00,
43895 +0x00,0x02,0x16,0x03,0x28,0x43,0x00,0x03,0xac,0x80,0xff,0xfc,0xa0,0x80,0x00,0x00,
43896 +0x14,0x60,0xff,0xf9,0x24,0x84,0x00,0x0c,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
43897 +0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x34,0x63,0x00,0x20,0x24,0x42,0x01,0xc0,
43898 +0x3c,0x08,0xb0,0x03,0xac,0x62,0x00,0x00,0x35,0x08,0x00,0x70,0x8d,0x02,0x00,0x00,
43899 +0x00,0xa0,0x48,0x21,0x00,0x04,0x26,0x00,0x00,0x02,0x2a,0x43,0x00,0x06,0x36,0x00,
43900 +0x00,0x07,0x3e,0x00,0x00,0x02,0x12,0x03,0x29,0x23,0x00,0x03,0x00,0x04,0x56,0x03,
43901 +0x00,0x06,0x36,0x03,0x00,0x07,0x3e,0x03,0x30,0x48,0x00,0x01,0x10,0x60,0x00,0x11,
43902 +0x30,0xa5,0x00,0x07,0x24,0x02,0x00,0x02,0x00,0x49,0x10,0x23,0x00,0x45,0x10,0x07,
43903 +0x30,0x42,0x00,0x01,0x10,0x40,0x00,0x66,0x00,0x00,0x00,0x00,0x8f,0xa2,0x00,0x10,
43904 +0x00,0x00,0x00,0x00,0x00,0x02,0x21,0x43,0x11,0x00,0x00,0x10,0x00,0x07,0x20,0x0b,
43905 +0x15,0x20,0x00,0x06,0x24,0x02,0x00,0x01,0x3c,0x02,0xb0,0x05,0x34,0x42,0x01,0x20,
43906 +0xa4,0x44,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x11,0x22,0x00,0x04,
43907 +0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x05,0x08,0x00,0x00,0x94,0x34,0x42,0x01,0x24,
43908 +0x3c,0x02,0xb0,0x05,0x08,0x00,0x00,0x94,0x34,0x42,0x01,0x22,0x15,0x20,0x00,0x54,
43909 +0x24,0x02,0x00,0x01,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x74,0x90,0x43,0x00,0x00,
43910 +0x00,0x00,0x00,0x00,0xaf,0x83,0x8b,0x94,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x70,
43911 +0x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x6b,0x00,0x08,0x11,0x60,0x00,0x18,
43912 +0x00,0x09,0x28,0x40,0x00,0x00,0x40,0x21,0x27,0x85,0x8b,0x90,0x8c,0xa3,0x00,0x00,
43913 +0x8c,0xa2,0x00,0x04,0x00,0x00,0x00,0x00,0x00,0x62,0x38,0x23,0x00,0x43,0x10,0x2a,
43914 +0x10,0x40,0x00,0x3d,0x00,0x00,0x00,0x00,0xac,0xa7,0x00,0x00,0x25,0x02,0x00,0x01,
43915 +0x00,0x02,0x16,0x00,0x00,0x02,0x46,0x03,0x29,0x03,0x00,0x03,0x14,0x60,0xff,0xf3,
43916 +0x24,0xa5,0x00,0x0c,0x3c,0x03,0xb0,0x03,0x34,0x63,0x00,0x70,0x90,0x62,0x00,0x00,
43917 +0x00,0x00,0x00,0x00,0x00,0x4b,0x10,0x23,0xa0,0x62,0x00,0x00,0x00,0x09,0x28,0x40,
43918 +0x00,0xa9,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x83,0x8b,0x98,0x00,0x0a,0x20,0x0b,
43919 +0x00,0x43,0x18,0x21,0x10,0xc0,0x00,0x05,0x00,0x00,0x38,0x21,0x80,0x62,0x00,0x01,
43920 +0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x05,0x00,0x00,0x00,0x00,0x80,0x62,0x00,0x00,
43921 +0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x03,0x00,0xa9,0x10,0x21,0x24,0x07,0x00,0x01,
43922 +0x00,0xa9,0x10,0x21,0x00,0x02,0x30,0x80,0x27,0x82,0x8b,0x98,0xa0,0x67,0x00,0x01,
43923 +0x00,0xc2,0x38,0x21,0x80,0xe3,0x00,0x01,0x00,0x00,0x00,0x00,0x10,0x60,0x00,0x07,
43924 +0x00,0x00,0x00,0x00,0x27,0x83,0x8b,0x90,0x00,0xc3,0x18,0x21,0x8c,0x62,0x00,0x00,
43925 +0x00,0x00,0x00,0x00,0x00,0x44,0x10,0x21,0xac,0x62,0x00,0x00,0x27,0x85,0x8b,0x94,
43926 +0x27,0x82,0x8b,0x90,0x00,0xc5,0x28,0x21,0x00,0xc2,0x10,0x21,0x8c,0x43,0x00,0x00,
43927 +0x8c,0xa4,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x64,0x18,0x2a,0x14,0x60,0x00,0x03,
43928 +0x24,0x02,0x00,0x01,0x03,0xe0,0x00,0x08,0xa0,0xe2,0x00,0x00,0xa0,0xe0,0x00,0x00,
43929 +0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x08,0x00,0x00,0xb7,0xac,0xa0,0x00,0x00,
43930 +0x11,0x22,0x00,0x08,0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x7c,
43931 +0x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0xaf,0x83,0x8b,0xac,0x08,0x00,0x00,0xa7,
43932 +0x3c,0x02,0xb0,0x03,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x78,0x90,0x43,0x00,0x00,
43933 +0x00,0x00,0x00,0x00,0xaf,0x83,0x8b,0xa0,0x08,0x00,0x00,0xa7,0x3c,0x02,0xb0,0x03,
43934 +0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x34,0x63,0x00,0x20,0x24,0x42,0x04,0x10,
43935 +0x3c,0x05,0xb0,0x03,0xac,0x62,0x00,0x00,0x34,0xa5,0x00,0x70,0x8c,0xa2,0x00,0x00,
43936 +0x90,0x84,0x00,0x08,0x3c,0x06,0xb0,0x03,0x00,0x02,0x16,0x00,0x2c,0x83,0x00,0x03,
43937 +0x34,0xc6,0x00,0x72,0x24,0x07,0x00,0x01,0x10,0x60,0x00,0x11,0x00,0x02,0x2f,0xc2,
43938 +0x90,0xc2,0x00,0x00,0x00,0x00,0x18,0x21,0x00,0x02,0x16,0x00,0x10,0xa7,0x00,0x09,
43939 +0x00,0x02,0x16,0x03,0x14,0x80,0x00,0x0c,0x30,0x43,0x00,0x03,0x83,0x82,0x8b,0x98,
43940 +0x00,0x00,0x00,0x00,0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x00,0x02,0x16,0x00,
43941 +0x00,0x02,0x1e,0x03,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x72,0xa0,0x43,0x00,0x00,
43942 +0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x30,0x45,0x00,0x05,0x10,0x87,0x00,0x04,
43943 +0x30,0x43,0x00,0x06,0x93,0x82,0x8b,0xb0,0x08,0x00,0x01,0x1f,0x00,0x43,0x10,0x21,
43944 +0x83,0x82,0x8b,0xa4,0x00,0x00,0x00,0x00,0x00,0x02,0x10,0x40,0x08,0x00,0x01,0x1f,
43945 +0x00,0x45,0x10,0x21,0x10,0x80,0x00,0x05,0x00,0x00,0x18,0x21,0x24,0x63,0x00,0x01,
43946 +0x00,0x64,0x10,0x2b,0x14,0x40,0xff,0xfd,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,
43947 +0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x24,0x42,0x04,0xe4,
43948 +0x3c,0x04,0xb0,0x02,0x34,0x63,0x00,0x20,0xac,0x62,0x00,0x00,0x34,0x84,0x00,0x08,
43949 +0x24,0x02,0x00,0x01,0xaf,0x84,0x8b,0xc0,0xa3,0x82,0x8b,0xd0,0xa7,0x80,0x8b,0xc4,
43950 +0xa7,0x80,0x8b,0xc6,0xaf,0x80,0x8b,0xc8,0xaf,0x80,0x8b,0xcc,0x03,0xe0,0x00,0x08,
43951 +0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x34,0x63,0x00,0x20,
43952 +0x24,0x42,0x05,0x24,0x3c,0x04,0xb0,0x03,0xac,0x62,0x00,0x00,0x34,0x84,0x00,0xac,
43953 +0x80,0xa2,0x00,0x15,0x8c,0x83,0x00,0x00,0x27,0xbd,0xff,0xf0,0x00,0x43,0x10,0x21,
43954 +0xac,0x82,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x10,0x3c,0x02,0xb0,0x03,
43955 +0x3c,0x03,0x80,0x00,0x34,0x42,0x00,0x20,0x24,0x63,0x05,0x5c,0x27,0xbd,0xff,0xe0,
43956 +0xac,0x43,0x00,0x00,0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x18,
43957 +0x8f,0x90,0x8b,0xc0,0x0c,0x00,0x02,0x98,0x00,0x80,0x88,0x21,0x14,0x40,0x00,0x2a,
43958 +0x3c,0x02,0x00,0x80,0x16,0x20,0x00,0x02,0x34,0x42,0x02,0x01,0x24,0x02,0x02,0x01,
43959 +0xae,0x02,0x00,0x00,0x97,0x84,0x8b,0xc4,0x97,0x82,0x8b,0xc6,0x3c,0x03,0xb0,0x02,
43960 +0x00,0x83,0x20,0x21,0x24,0x42,0x00,0x04,0xa7,0x82,0x8b,0xc6,0xa4,0x82,0x00,0x00,
43961 +0x8f,0x84,0x8b,0xc8,0x8f,0x82,0x8b,0xc0,0x93,0x85,0x8b,0x72,0x24,0x84,0x00,0x01,
43962 +0x24,0x42,0x00,0x04,0x24,0x03,0x8f,0xff,0x3c,0x07,0xb0,0x06,0x3c,0x06,0xb0,0x03,
43963 +0x00,0x43,0x10,0x24,0x00,0x85,0x28,0x2a,0x34,0xe7,0x80,0x18,0xaf,0x82,0x8b,0xc0,
43964 +0xaf,0x84,0x8b,0xc8,0x10,0xa0,0x00,0x08,0x34,0xc6,0x01,0x08,0x8f,0x83,0x8b,0xcc,
43965 +0x8f,0x84,0x8b,0x8c,0x8c,0xc2,0x00,0x00,0x00,0x64,0x18,0x21,0x00,0x43,0x10,0x2b,
43966 +0x14,0x40,0x00,0x09,0x00,0x00,0x00,0x00,0x8c,0xe2,0x00,0x00,0x3c,0x03,0x0f,0x00,
43967 +0x3c,0x04,0x04,0x00,0x00,0x43,0x10,0x24,0x10,0x44,0x00,0x03,0x00,0x00,0x00,0x00,
43968 +0x0c,0x00,0x04,0x96,0x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x18,0x7b,0xb0,0x00,0xbc,
43969 +0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x27,0xbd,0xff,0xd8,0x3c,0x02,0xb0,0x03,
43970 +0x3c,0x03,0x80,0x00,0x24,0x63,0x06,0x48,0xaf,0xb0,0x00,0x10,0x34,0x42,0x00,0x20,
43971 +0x8f,0x90,0x8b,0xc0,0xac,0x43,0x00,0x00,0xaf,0xb3,0x00,0x1c,0xaf,0xb2,0x00,0x18,
43972 +0xaf,0xb1,0x00,0x14,0xaf,0xbf,0x00,0x20,0x00,0x80,0x88,0x21,0x00,0xa0,0x90,0x21,
43973 +0x0c,0x00,0x02,0x98,0x00,0xc0,0x98,0x21,0x24,0x07,0x8f,0xff,0x14,0x40,0x00,0x19,
43974 +0x26,0x03,0x00,0x04,0x24,0x02,0x0e,0x03,0xae,0x02,0x00,0x00,0x00,0x67,0x80,0x24,
43975 +0x26,0x02,0x00,0x04,0xae,0x11,0x00,0x00,0x00,0x47,0x80,0x24,0x97,0x86,0x8b,0xc4,
43976 +0x26,0x03,0x00,0x04,0xae,0x12,0x00,0x00,0x00,0x67,0x80,0x24,0xae,0x13,0x00,0x00,
43977 +0x8f,0x84,0x8b,0xc0,0x3c,0x02,0xb0,0x02,0x97,0x85,0x8b,0xc6,0x00,0xc2,0x30,0x21,
43978 +0x8f,0x82,0x8b,0xc8,0x24,0x84,0x00,0x10,0x24,0xa5,0x00,0x10,0x00,0x87,0x20,0x24,
43979 +0x24,0x42,0x00,0x01,0xa7,0x85,0x8b,0xc6,0xaf,0x84,0x8b,0xc0,0xaf,0x82,0x8b,0xc8,
43980 +0xa4,0xc5,0x00,0x00,0x8f,0xbf,0x00,0x20,0x7b,0xb2,0x00,0xfc,0x7b,0xb0,0x00,0xbc,
43981 +0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x28,0x27,0xbd,0xff,0xe8,0xaf,0xbf,0x00,0x10,
43982 +0x94,0x82,0x00,0x04,0x00,0x00,0x00,0x00,0x30,0x42,0xe0,0x00,0x14,0x40,0x00,0x14,
43983 +0x00,0x00,0x00,0x00,0x90,0x82,0x00,0x02,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xfc,
43984 +0x00,0x82,0x28,0x21,0x8c,0xa4,0x00,0x00,0x3c,0x02,0x00,0x70,0x8c,0xa6,0x00,0x08,
43985 +0x00,0x82,0x10,0x21,0x2c,0x43,0x00,0x06,0x10,0x60,0x00,0x09,0x3c,0x03,0x80,0x01,
43986 +0x00,0x02,0x10,0x80,0x24,0x63,0x01,0xe8,0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x00,
43987 +0x00,0x00,0x00,0x00,0x00,0x80,0x00,0x08,0x00,0x00,0x00,0x00,0xaf,0x86,0x80,0x14,
43988 +0x8f,0xbf,0x00,0x10,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,
43989 +0x8c,0xa4,0x00,0x00,0x0c,0x00,0x17,0x84,0x00,0x00,0x00,0x00,0x08,0x00,0x01,0xdc,
43990 +0x00,0x00,0x00,0x00,0x0c,0x00,0x24,0x49,0x00,0xc0,0x20,0x21,0x08,0x00,0x01,0xdc,
43991 +0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,0x34,0x42,0x01,0x08,0x8c,0x44,0x00,0x00,
43992 +0x8f,0x82,0x80,0x18,0x3c,0x03,0x00,0x0f,0x34,0x63,0x42,0x40,0x00,0x43,0x10,0x21,
43993 +0x00,0x82,0x20,0x2b,0x10,0x80,0x00,0x09,0x24,0x03,0x00,0x05,0x8f,0x82,0x83,0x60,
43994 +0x00,0x00,0x00,0x00,0x24,0x42,0x00,0x01,0xaf,0x82,0x83,0x60,0x10,0x43,0x00,0x03,
43995 +0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,
43996 +0x8c,0x63,0x01,0x08,0x24,0x02,0x00,0x01,0xa3,0x82,0x80,0x11,0xaf,0x80,0x83,0x60,
43997 +0xaf,0x83,0x80,0x18,0x08,0x00,0x01,0xf9,0x00,0x00,0x00,0x00,0x30,0x84,0x00,0xff,
43998 +0x14,0x80,0x00,0x2f,0x00,0x00,0x00,0x00,0x8f,0x82,0x80,0x14,0xa3,0x85,0x83,0x93,
43999 +0x10,0x40,0x00,0x2b,0x2c,0xa2,0x00,0x04,0x14,0x40,0x00,0x06,0x00,0x05,0x10,0x40,
44000 +0x24,0xa2,0xff,0xfc,0x2c,0x42,0x00,0x08,0x10,0x40,0x00,0x09,0x24,0xa2,0xff,0xf0,
44001 +0x00,0x05,0x10,0x40,0x27,0x84,0x83,0x9c,0x00,0x44,0x10,0x21,0x94,0x43,0x00,0x00,
44002 +0x00,0x00,0x00,0x00,0x24,0x63,0x00,0x01,0x03,0xe0,0x00,0x08,0xa4,0x43,0x00,0x00,
44003 +0x2c,0x42,0x00,0x10,0x14,0x40,0x00,0x0a,0x00,0x05,0x10,0x40,0x24,0xa2,0xff,0xe0,
44004 +0x2c,0x42,0x00,0x10,0x14,0x40,0x00,0x06,0x00,0x05,0x10,0x40,0x24,0xa2,0xff,0xd0,
44005 +0x2c,0x42,0x00,0x10,0x10,0x40,0x00,0x09,0x24,0xa2,0xff,0xc0,0x00,0x05,0x10,0x40,
44006 +0x27,0x84,0x83,0x9c,0x00,0x44,0x10,0x21,0x94,0x43,0xff,0xf8,0x00,0x00,0x00,0x00,
44007 +0x24,0x63,0x00,0x01,0x03,0xe0,0x00,0x08,0xa4,0x43,0xff,0xf8,0x2c,0x42,0x00,0x10,
44008 +0x10,0x40,0x00,0x07,0x00,0x05,0x10,0x40,0x27,0x84,0x83,0x9c,0x00,0x44,0x10,0x21,
44009 +0x94,0x43,0xff,0xf8,0x00,0x00,0x00,0x00,0x24,0x63,0x00,0x01,0xa4,0x43,0xff,0xf8,
44010 +0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x8f,0x86,0x8b,0xc0,0x8f,0x82,0x80,0x14,
44011 +0x27,0xbd,0xff,0xe8,0xaf,0xbf,0x00,0x10,0x10,0x40,0x00,0x2a,0x00,0xc0,0x38,0x21,
44012 +0x24,0x02,0x00,0x07,0x24,0x03,0xff,0x9c,0xa3,0x82,0x83,0x9b,0xa3,0x83,0x83,0x9a,
44013 +0x27,0x8a,0x83,0x98,0x00,0x00,0x20,0x21,0x24,0x09,0x8f,0xff,0x00,0x04,0x10,0x80,
44014 +0x00,0x4a,0x28,0x21,0x8c,0xa2,0x00,0x00,0x24,0xe3,0x00,0x04,0x24,0x88,0x00,0x01,
44015 +0xac,0xe2,0x00,0x00,0x10,0x80,0x00,0x02,0x00,0x69,0x38,0x24,0xac,0xa0,0x00,0x00,
44016 +0x31,0x04,0x00,0xff,0x2c,0x82,0x00,0x27,0x14,0x40,0xff,0xf5,0x00,0x04,0x10,0x80,
44017 +0x97,0x83,0x8b,0xc6,0x97,0x85,0x8b,0xc4,0x3c,0x02,0xb0,0x02,0x24,0x63,0x00,0x9c,
44018 +0x00,0xa2,0x28,0x21,0x3c,0x04,0xb0,0x06,0xa7,0x83,0x8b,0xc6,0x34,0x84,0x80,0x18,
44019 +0xa4,0xa3,0x00,0x00,0x8c,0x85,0x00,0x00,0x24,0x02,0x8f,0xff,0x24,0xc6,0x00,0x9c,
44020 +0x3c,0x03,0x0f,0x00,0x00,0xc2,0x30,0x24,0x00,0xa3,0x28,0x24,0x3c,0x02,0x04,0x00,
44021 +0xaf,0x86,0x8b,0xc0,0x10,0xa2,0x00,0x03,0x00,0x00,0x00,0x00,0x0c,0x00,0x04,0x96,
44022 +0x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x10,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,
44023 +0x27,0xbd,0x00,0x18,0x8f,0x86,0x8b,0xc0,0x27,0xbd,0xff,0xc8,0x24,0x02,0x00,0x08,
44024 +0x24,0x03,0x00,0x20,0xaf,0xbf,0x00,0x30,0xa3,0xa2,0x00,0x13,0xa3,0xa3,0x00,0x12,
44025 +0xa7,0xa4,0x00,0x10,0x00,0xc0,0x28,0x21,0x27,0xa9,0x00,0x10,0x00,0x00,0x38,0x21,
44026 +0x24,0x08,0x8f,0xff,0x00,0x07,0x10,0x80,0x00,0x49,0x10,0x21,0x8c,0x44,0x00,0x00,
44027 +0x24,0xe3,0x00,0x01,0x30,0x67,0x00,0xff,0x24,0xa2,0x00,0x04,0x2c,0xe3,0x00,0x08,
44028 +0xac,0xa4,0x00,0x00,0x14,0x60,0xff,0xf7,0x00,0x48,0x28,0x24,0x97,0x83,0x8b,0xc6,
44029 +0x97,0x85,0x8b,0xc4,0x3c,0x02,0xb0,0x02,0x24,0x63,0x00,0x20,0x00,0xa2,0x28,0x21,
44030 +0x3c,0x04,0xb0,0x06,0xa7,0x83,0x8b,0xc6,0x34,0x84,0x80,0x18,0xa4,0xa3,0x00,0x00,
44031 +0x8c,0x85,0x00,0x00,0x24,0x02,0x8f,0xff,0x24,0xc6,0x00,0x20,0x3c,0x03,0x0f,0x00,
44032 +0x00,0xc2,0x30,0x24,0x00,0xa3,0x28,0x24,0x3c,0x02,0x04,0x00,0xaf,0x86,0x8b,0xc0,
44033 +0x10,0xa2,0x00,0x03,0x00,0x00,0x00,0x00,0x0c,0x00,0x04,0x96,0x00,0x00,0x00,0x00,
44034 +0x8f,0xbf,0x00,0x30,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x38,
44035 +0x93,0x82,0x8b,0xd0,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x11,0x24,0x06,0x00,0x01,
44036 +0x8f,0x82,0x8b,0xc8,0x3c,0x05,0xb0,0x06,0x3c,0x04,0xb0,0x03,0x34,0xa5,0x80,0x18,
44037 +0x34,0x84,0x01,0x08,0x14,0x40,0x00,0x09,0x00,0x00,0x30,0x21,0x97,0x82,0x8b,0xc4,
44038 +0x8c,0x84,0x00,0x00,0x3c,0x03,0xb0,0x02,0x00,0x43,0x10,0x21,0xaf,0x84,0x8b,0xcc,
44039 +0xa7,0x80,0x8b,0xc6,0xac,0x40,0x00,0x00,0xac,0x40,0x00,0x04,0x8c,0xa2,0x00,0x00,
44040 +0x03,0xe0,0x00,0x08,0x00,0xc0,0x10,0x21,0x8f,0x86,0x8b,0xc0,0x8f,0x82,0x8b,0xc8,
44041 +0x27,0xbd,0xff,0xe8,0xaf,0xbf,0x00,0x10,0x00,0xc0,0x40,0x21,0x14,0x40,0x00,0x0a,
44042 +0x00,0x40,0x50,0x21,0x00,0x00,0x38,0x21,0x27,0x89,0x83,0x68,0x24,0xe2,0x00,0x01,
44043 +0x00,0x07,0x18,0x80,0x30,0x47,0x00,0xff,0x00,0x69,0x18,0x21,0x2c,0xe2,0x00,0x0a,
44044 +0x14,0x40,0xff,0xfa,0xac,0x60,0x00,0x00,0x3c,0x02,0x00,0x80,0x10,0x82,0x00,0x6f,
44045 +0x00,0x00,0x00,0x00,0x97,0x82,0x83,0x6e,0x00,0x00,0x00,0x00,0x24,0x42,0x00,0x01,
44046 +0xa7,0x82,0x83,0x6e,0x90,0xa3,0x00,0x15,0x97,0x82,0x83,0x70,0x00,0x03,0x1e,0x00,
44047 +0x00,0x03,0x1e,0x03,0x00,0x43,0x10,0x21,0xa7,0x82,0x83,0x70,0x8c,0xa4,0x00,0x20,
44048 +0x3c,0x02,0x00,0x60,0x3c,0x03,0x00,0x20,0x00,0x82,0x20,0x24,0x10,0x83,0x00,0x54,
44049 +0x00,0x00,0x00,0x00,0x14,0x80,0x00,0x47,0x00,0x00,0x00,0x00,0x97,0x82,0x83,0x74,
44050 +0x00,0x00,0x00,0x00,0x24,0x42,0x00,0x01,0xa7,0x82,0x83,0x74,0x84,0xa3,0x00,0x06,
44051 +0x8f,0x82,0x83,0x84,0x00,0x00,0x00,0x00,0x00,0x43,0x10,0x21,0xaf,0x82,0x83,0x84,
44052 +0x25,0x42,0x00,0x01,0x28,0x43,0x27,0x10,0xaf,0x82,0x8b,0xc8,0x10,0x60,0x00,0x09,
44053 +0x24,0x02,0x00,0x04,0x93,0x83,0x80,0x11,0x24,0x02,0x00,0x01,0x10,0x62,0x00,0x05,
44054 +0x24,0x02,0x00,0x04,0x8f,0xbf,0x00,0x10,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,
44055 +0x27,0xbd,0x00,0x18,0x24,0x03,0x00,0x28,0xa3,0x83,0x83,0x6a,0xa3,0x82,0x83,0x6b,
44056 +0x90,0xa2,0x00,0x18,0x93,0x83,0x83,0x93,0x00,0x00,0x38,0x21,0x00,0x02,0x16,0x00,
44057 +0x00,0x02,0x16,0x03,0xa7,0x82,0x83,0x7e,0xa3,0x83,0x83,0x8c,0x27,0x89,0x83,0x68,
44058 +0x24,0x05,0x8f,0xff,0x00,0x07,0x10,0x80,0x00,0x49,0x10,0x21,0x8c,0x44,0x00,0x00,
44059 +0x24,0xe3,0x00,0x01,0x30,0x67,0x00,0xff,0x25,0x02,0x00,0x04,0x2c,0xe3,0x00,0x0a,
44060 +0xad,0x04,0x00,0x00,0x14,0x60,0xff,0xf7,0x00,0x45,0x40,0x24,0x97,0x83,0x8b,0xc6,
44061 +0x97,0x85,0x8b,0xc4,0x3c,0x02,0xb0,0x02,0x24,0x63,0x00,0x28,0x00,0xa2,0x28,0x21,
44062 +0x3c,0x04,0xb0,0x06,0xa7,0x83,0x8b,0xc6,0x34,0x84,0x80,0x18,0xa4,0xa3,0x00,0x00,
44063 +0x8c,0x85,0x00,0x00,0x24,0x02,0x8f,0xff,0x24,0xc6,0x00,0x28,0x3c,0x03,0x0f,0x00,
44064 +0x00,0xc2,0x30,0x24,0x00,0xa3,0x28,0x24,0x3c,0x02,0x04,0x00,0xaf,0x86,0x8b,0xc0,
44065 +0x10,0xa2,0x00,0x03,0x00,0x00,0x00,0x00,0x0c,0x00,0x04,0x96,0x00,0x00,0x00,0x00,
44066 +0x0c,0x00,0x02,0x36,0x00,0x00,0x00,0x00,0xa3,0x80,0x80,0x11,0x08,0x00,0x02,0xe5,
44067 +0x00,0x00,0x00,0x00,0x97,0x82,0x83,0x76,0x00,0x00,0x00,0x00,0x24,0x42,0x00,0x01,
44068 +0xa7,0x82,0x83,0x76,0x84,0xa3,0x00,0x06,0x8f,0x82,0x83,0x88,0x00,0x00,0x00,0x00,
44069 +0x00,0x43,0x10,0x21,0xaf,0x82,0x83,0x88,0x08,0x00,0x02,0xdd,0x25,0x42,0x00,0x01,
44070 +0x97,0x82,0x83,0x72,0x00,0x00,0x00,0x00,0x24,0x42,0x00,0x01,0xa7,0x82,0x83,0x72,
44071 +0x84,0xa3,0x00,0x06,0x8f,0x82,0x83,0x80,0x00,0x00,0x00,0x00,0x00,0x43,0x10,0x21,
44072 +0xaf,0x82,0x83,0x80,0x08,0x00,0x02,0xdd,0x25,0x42,0x00,0x01,0x97,0x82,0x83,0x6c,
44073 +0x00,0x00,0x00,0x00,0x24,0x42,0x00,0x01,0xa7,0x82,0x83,0x6c,0x08,0x00,0x02,0xc5,
44074 +0x00,0x00,0x00,0x00,0x27,0xbd,0xff,0xd0,0xaf,0xbf,0x00,0x28,0x8c,0xa3,0x00,0x20,
44075 +0x8f,0x8a,0x8b,0xc0,0x3c,0x02,0x00,0x10,0x00,0x62,0x10,0x24,0x00,0xa0,0x38,0x21,
44076 +0x01,0x40,0x48,0x21,0x10,0x40,0x00,0x3d,0x00,0x80,0x28,0x21,0x8c,0xe4,0x00,0x1c,
44077 +0x34,0xa5,0x12,0x06,0xaf,0xa5,0x00,0x10,0x8c,0x82,0x00,0x08,0x00,0x03,0x1c,0x42,
44078 +0x30,0x63,0x00,0x30,0x00,0x02,0x13,0x02,0x30,0x42,0x00,0x40,0x00,0x43,0x10,0x25,
44079 +0x90,0xe6,0x00,0x10,0x90,0xe4,0x00,0x13,0x94,0xe8,0x00,0x0c,0x94,0xe3,0x00,0x1a,
44080 +0x00,0x02,0x16,0x00,0x90,0xe7,0x00,0x12,0x00,0xa2,0x28,0x25,0x24,0x02,0x12,0x34,
44081 +0xa7,0xa2,0x00,0x1c,0x24,0x02,0x56,0x78,0xaf,0xa5,0x00,0x10,0xa3,0xa6,0x00,0x18,
44082 +0xa3,0xa7,0x00,0x1f,0xa7,0xa3,0x00,0x1a,0xa3,0xa4,0x00,0x19,0xa7,0xa8,0x00,0x20,
44083 +0xa7,0xa2,0x00,0x22,0x00,0x00,0x28,0x21,0x27,0xa7,0x00,0x10,0x24,0x06,0x8f,0xff,
44084 +0x00,0x05,0x10,0x80,0x00,0x47,0x10,0x21,0x8c,0x44,0x00,0x00,0x24,0xa3,0x00,0x01,
44085 +0x30,0x65,0x00,0xff,0x25,0x22,0x00,0x04,0x2c,0xa3,0x00,0x05,0xad,0x24,0x00,0x00,
44086 +0x14,0x60,0xff,0xf7,0x00,0x46,0x48,0x24,0x97,0x83,0x8b,0xc6,0x97,0x85,0x8b,0xc4,
44087 +0x3c,0x02,0xb0,0x02,0x24,0x63,0x00,0x14,0x00,0xa2,0x28,0x21,0x3c,0x04,0xb0,0x06,
44088 +0xa7,0x83,0x8b,0xc6,0x34,0x84,0x80,0x18,0xa4,0xa3,0x00,0x00,0x8c,0x85,0x00,0x00,
44089 +0x24,0x02,0x8f,0xff,0x25,0x46,0x00,0x14,0x3c,0x03,0x0f,0x00,0x00,0xc2,0x50,0x24,
44090 +0x00,0xa3,0x28,0x24,0x3c,0x02,0x04,0x00,0xaf,0x8a,0x8b,0xc0,0x10,0xa2,0x00,0x03,
44091 +0x00,0x00,0x00,0x00,0x0c,0x00,0x04,0x96,0x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x28,
44092 +0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x30,0x3c,0x05,0xb0,0x03,
44093 +0x3c,0x02,0x80,0x00,0x27,0xbd,0xff,0xc8,0x00,0x04,0x22,0x00,0x34,0xa5,0x00,0x20,
44094 +0x24,0x42,0x0d,0xfc,0x3c,0x03,0xb0,0x00,0xaf,0xb5,0x00,0x24,0xaf,0xb4,0x00,0x20,
44095 +0xaf,0xb2,0x00,0x18,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x30,0x00,0x83,0x80,0x21,
44096 +0xaf,0xb7,0x00,0x2c,0xaf,0xb6,0x00,0x28,0xaf,0xb3,0x00,0x1c,0xaf,0xb1,0x00,0x14,
44097 +0xac,0xa2,0x00,0x00,0x8e,0x09,0x00,0x00,0x00,0x00,0x90,0x21,0x26,0x10,0x00,0x08,
44098 +0x00,0x09,0xa6,0x02,0x12,0x80,0x00,0x13,0x00,0x00,0xa8,0x21,0x24,0x13,0x00,0x02,
44099 +0x3c,0x16,0x00,0xff,0x3c,0x17,0xff,0x00,0x8e,0x09,0x00,0x00,0x00,0x00,0x00,0x00,
44100 +0x00,0x09,0x12,0x02,0x24,0x42,0x00,0x02,0x31,0x25,0x00,0xff,0x10,0xb3,0x00,0x76,
44101 +0x30,0x51,0x00,0xff,0x24,0x02,0x00,0x03,0x10,0xa2,0x00,0x18,0x00,0x00,0x00,0x00,
44102 +0x02,0x51,0x10,0x21,0x30,0x52,0xff,0xff,0x02,0x54,0x18,0x2b,0x14,0x60,0xff,0xf2,
44103 +0x02,0x11,0x80,0x21,0x12,0xa0,0x00,0x0a,0x3c,0x02,0xb0,0x06,0x34,0x42,0x80,0x18,
44104 +0x8c,0x43,0x00,0x00,0x3c,0x04,0x0f,0x00,0x3c,0x02,0x04,0x00,0x00,0x64,0x18,0x24,
44105 +0x10,0x62,0x00,0x03,0x00,0x00,0x00,0x00,0x0c,0x00,0x04,0x96,0x00,0x00,0x00,0x00,
44106 +0x8f,0xbf,0x00,0x30,0x7b,0xb6,0x01,0x7c,0x7b,0xb4,0x01,0x3c,0x7b,0xb2,0x00,0xfc,
44107 +0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x38,0x8e,0x09,0x00,0x04,
44108 +0x24,0x15,0x00,0x01,0x8e,0x06,0x00,0x0c,0x00,0x09,0x11,0x42,0x00,0x09,0x18,0xc2,
44109 +0x30,0x48,0x00,0x03,0x00,0x09,0x14,0x02,0x30,0x6c,0x00,0x03,0x00,0x09,0x26,0x02,
44110 +0x11,0x15,0x00,0x45,0x30,0x43,0x00,0x0f,0x29,0x02,0x00,0x02,0x14,0x40,0x00,0x26,
44111 +0x00,0x00,0x00,0x00,0x11,0x13,0x00,0x0f,0x00,0x00,0x38,0x21,0x00,0x07,0x22,0x02,
44112 +0x30,0x84,0xff,0x00,0x3c,0x03,0x00,0xff,0x00,0x07,0x2e,0x02,0x00,0x07,0x12,0x00,
44113 +0x00,0x43,0x10,0x24,0x00,0xa4,0x28,0x25,0x00,0xa2,0x28,0x25,0x00,0x07,0x1e,0x00,
44114 +0x00,0xa3,0x28,0x25,0x0c,0x00,0x01,0x92,0x01,0x20,0x20,0x21,0x08,0x00,0x03,0xa5,
44115 +0x02,0x51,0x10,0x21,0x11,0x95,0x00,0x0f,0x00,0x00,0x00,0x00,0x11,0x88,0x00,0x07,
44116 +0x00,0x00,0x00,0x00,0x00,0x04,0x10,0x80,0x27,0x83,0x8b,0x70,0x00,0x43,0x10,0x21,
44117 +0x8c,0x47,0x00,0x18,0x08,0x00,0x03,0xcc,0x00,0x07,0x22,0x02,0x00,0x04,0x10,0x40,
44118 +0x27,0x83,0x8b,0x78,0x00,0x43,0x10,0x21,0x94,0x47,0x00,0x02,0x08,0x00,0x03,0xcc,
44119 +0x00,0x07,0x22,0x02,0x27,0x82,0x8b,0x70,0x00,0x82,0x10,0x21,0x90,0x47,0x00,0x00,
44120 +0x08,0x00,0x03,0xcc,0x00,0x07,0x22,0x02,0x15,0x00,0xff,0xdc,0x00,0x00,0x38,0x21,
44121 +0x10,0x75,0x00,0x05,0x00,0x80,0x38,0x21,0x00,0x65,0x18,0x26,0x24,0x82,0x01,0x00,
44122 +0x00,0x00,0x38,0x21,0x00,0x43,0x38,0x0a,0x24,0x02,0x00,0x01,0x11,0x82,0x00,0x0e,
44123 +0x3c,0x02,0xb0,0x03,0x24,0x02,0x00,0x02,0x11,0x82,0x00,0x06,0x00,0x00,0x00,0x00,
44124 +0x3c,0x02,0xb0,0x03,0x00,0xe2,0x10,0x21,0x8c,0x47,0x00,0x00,0x08,0x00,0x03,0xcc,
44125 +0x00,0x07,0x22,0x02,0x3c,0x02,0xb0,0x03,0x00,0xe2,0x10,0x21,0x94,0x43,0x00,0x00,
44126 +0x08,0x00,0x03,0xcb,0x30,0x67,0xff,0xff,0x00,0xe2,0x10,0x21,0x90,0x43,0x00,0x00,
44127 +0x08,0x00,0x03,0xcb,0x30,0x67,0x00,0xff,0x30,0x62,0x00,0x03,0x00,0x02,0x12,0x00,
44128 +0x11,0x95,0x00,0x07,0x00,0x44,0x38,0x21,0x11,0x93,0x00,0x03,0x00,0x00,0x00,0x00,
44129 +0x08,0x00,0x03,0xfd,0x3c,0x02,0xb0,0x0a,0x08,0x00,0x04,0x02,0x3c,0x02,0xb0,0x0a,
44130 +0x08,0x00,0x04,0x06,0x3c,0x02,0xb0,0x0a,0x8e,0x09,0x00,0x04,0x8e,0x02,0x00,0x08,
44131 +0x8e,0x03,0x00,0x0c,0x00,0x09,0x41,0x42,0x00,0x02,0x22,0x02,0x00,0x03,0x3a,0x02,
44132 +0x30,0x84,0xff,0x00,0x30,0xe7,0xff,0x00,0x00,0x02,0x5e,0x02,0x00,0x02,0x32,0x00,
44133 +0x00,0x03,0x56,0x02,0x00,0x03,0x2a,0x00,0x01,0x64,0x58,0x25,0x00,0xd6,0x30,0x24,
44134 +0x01,0x47,0x50,0x25,0x00,0x02,0x16,0x00,0x00,0xb6,0x28,0x24,0x00,0x03,0x1e,0x00,
44135 +0x01,0x66,0x58,0x25,0x01,0x45,0x50,0x25,0x00,0x57,0x10,0x24,0x00,0x77,0x18,0x24,
44136 +0x01,0x62,0x38,0x25,0x01,0x43,0x30,0x25,0x00,0x09,0x10,0xc2,0x00,0x09,0x1c,0x02,
44137 +0x31,0x08,0x00,0x03,0x30,0x4c,0x00,0x03,0x30,0x63,0x00,0x0f,0x00,0x09,0x26,0x02,
44138 +0x00,0xe0,0x58,0x21,0x15,0x00,0x00,0x28,0x00,0xc0,0x50,0x21,0x24,0x02,0x00,0x01,
44139 +0x10,0x62,0x00,0x06,0x00,0x80,0x28,0x21,0x24,0x02,0x00,0x03,0x14,0x62,0xff,0x69,
44140 +0x02,0x51,0x10,0x21,0x24,0x85,0x01,0x00,0x24,0x02,0x00,0x01,0x11,0x82,0x00,0x15,
44141 +0x24,0x02,0x00,0x02,0x11,0x82,0x00,0x0a,0x3c,0x03,0xb0,0x03,0x00,0xa3,0x18,0x21,
44142 +0x8c,0x62,0x00,0x00,0x00,0x0a,0x20,0x27,0x01,0x6a,0x28,0x24,0x00,0x44,0x10,0x24,
44143 +0x00,0x45,0x10,0x25,0xac,0x62,0x00,0x00,0x08,0x00,0x03,0xa5,0x02,0x51,0x10,0x21,
44144 +0x00,0xa3,0x18,0x21,0x94,0x62,0x00,0x00,0x00,0x0a,0x20,0x27,0x01,0x6a,0x28,0x24,
44145 +0x00,0x44,0x10,0x24,0x00,0x45,0x10,0x25,0xa4,0x62,0x00,0x00,0x08,0x00,0x03,0xa5,
44146 +0x02,0x51,0x10,0x21,0x3c,0x03,0xb0,0x03,0x00,0xa3,0x18,0x21,0x90,0x62,0x00,0x00,
44147 +0x00,0x0a,0x20,0x27,0x01,0x6a,0x28,0x24,0x00,0x44,0x10,0x24,0x00,0x45,0x10,0x25,
44148 +0x08,0x00,0x03,0xa4,0xa0,0x62,0x00,0x00,0x24,0x02,0x00,0x01,0x11,0x02,0x00,0x21,
44149 +0x00,0x00,0x00,0x00,0x15,0x13,0xff,0x42,0x00,0x00,0x00,0x00,0x11,0x82,0x00,0x17,
44150 +0x00,0x00,0x00,0x00,0x11,0x88,0x00,0x0b,0x00,0x00,0x00,0x00,0x27,0x83,0x8b,0x70,
44151 +0x00,0x04,0x20,0x80,0x00,0x83,0x20,0x21,0x8c,0x82,0x00,0x18,0x00,0x06,0x18,0x27,
44152 +0x00,0xe6,0x28,0x24,0x00,0x43,0x10,0x24,0x00,0x45,0x10,0x25,0x08,0x00,0x03,0xa4,
44153 +0xac,0x82,0x00,0x18,0x27,0x83,0x8b,0x78,0x00,0x04,0x20,0x40,0x00,0x83,0x20,0x21,
44154 +0x94,0x82,0x00,0x02,0x00,0x06,0x18,0x27,0x00,0xe6,0x28,0x24,0x00,0x43,0x10,0x24,
44155 +0x00,0x45,0x10,0x25,0x08,0x00,0x03,0xa4,0xa4,0x82,0x00,0x02,0x27,0x83,0x8b,0x70,
44156 +0x00,0x83,0x18,0x21,0x90,0x62,0x00,0x00,0x00,0x06,0x20,0x27,0x08,0x00,0x04,0x5a,
44157 +0x00,0xe6,0x28,0x24,0x30,0x62,0x00,0x07,0x00,0x02,0x12,0x00,0x11,0x88,0x00,0x0f,
44158 +0x00,0x44,0x10,0x21,0x11,0x93,0x00,0x07,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x0a,
44159 +0x00,0x43,0x18,0x21,0x8c,0x62,0x00,0x00,0x00,0x06,0x20,0x27,0x08,0x00,0x04,0x47,
44160 +0x00,0xe6,0x28,0x24,0x3c,0x03,0xb0,0x0a,0x00,0x43,0x18,0x21,0x94,0x62,0x00,0x00,
44161 +0x00,0x06,0x20,0x27,0x08,0x00,0x04,0x50,0x00,0xe6,0x28,0x24,0x3c,0x03,0xb0,0x0a,
44162 +0x08,0x00,0x04,0x7d,0x00,0x43,0x18,0x21,0x97,0x85,0x8b,0xc4,0x3c,0x07,0xb0,0x02,
44163 +0x3c,0x04,0xb0,0x03,0x3c,0x02,0x80,0x00,0x00,0xa7,0x28,0x21,0x34,0x84,0x00,0x20,
44164 +0x24,0x42,0x12,0x58,0x24,0x03,0xff,0x80,0xac,0x82,0x00,0x00,0xa0,0xa3,0x00,0x07,
44165 +0x97,0x82,0x8b,0xc6,0x97,0x85,0x8b,0xc4,0x3c,0x06,0xb0,0x06,0x30,0x42,0xff,0xf8,
44166 +0x24,0x42,0x00,0x10,0x00,0xa2,0x10,0x21,0x30,0x42,0x0f,0xff,0x24,0x44,0x00,0x08,
44167 +0x30,0x84,0x0f,0xff,0x00,0x05,0x28,0xc2,0x3c,0x03,0x00,0x40,0x00,0xa3,0x28,0x25,
44168 +0x00,0x87,0x20,0x21,0x34,0xc6,0x80,0x18,0xac,0xc5,0x00,0x00,0xaf,0x84,0x8b,0xc0,
44169 +0xa7,0x82,0x8b,0xc4,0xa7,0x80,0x8b,0xc6,0xaf,0x80,0x8b,0xc8,0x03,0xe0,0x00,0x08,
44170 +0x00,0x00,0x00,0x00,0x30,0xa5,0x00,0xff,0x30,0x84,0x00,0xff,0x24,0x02,0x00,0x01,
44171 +0x00,0xe0,0x48,0x21,0x30,0xc6,0x00,0xff,0x8f,0xa7,0x00,0x10,0x10,0x82,0x00,0x07,
44172 +0x00,0xa0,0x40,0x21,0x24,0x02,0x00,0x03,0x10,0x82,0x00,0x03,0x00,0x00,0x00,0x00,
44173 +0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x24,0xa8,0x01,0x00,0x3c,0x03,0xb0,0x03,
44174 +0x24,0x02,0x00,0x01,0x00,0x07,0x20,0x27,0x01,0x27,0x28,0x24,0x10,0xc2,0x00,0x14,
44175 +0x01,0x03,0x18,0x21,0x24,0x02,0x00,0x02,0x10,0xc2,0x00,0x09,0x00,0x07,0x50,0x27,
44176 +0x3c,0x03,0xb0,0x03,0x01,0x03,0x18,0x21,0x8c,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
44177 +0x00,0x4a,0x10,0x24,0x00,0x45,0x10,0x25,0x08,0x00,0x04,0xe1,0xac,0x62,0x00,0x00,
44178 +0x3c,0x03,0xb0,0x03,0x01,0x03,0x18,0x21,0x94,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
44179 +0x00,0x4a,0x10,0x24,0x00,0x45,0x10,0x25,0x03,0xe0,0x00,0x08,0xa4,0x62,0x00,0x00,
44180 +0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x44,0x10,0x24,0x00,0x45,0x10,0x25,
44181 +0xa0,0x62,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x30,0x84,0x00,0x07,
44182 +0x00,0x04,0x22,0x00,0x30,0xa5,0x00,0xff,0x00,0x85,0x28,0x21,0x3c,0x02,0xb0,0x0a,
44183 +0x00,0xa2,0x40,0x21,0x30,0xc6,0x00,0xff,0x24,0x02,0x00,0x01,0x8f,0xa4,0x00,0x10,
44184 +0x10,0xc2,0x00,0x14,0x24,0x02,0x00,0x02,0x00,0x04,0x50,0x27,0x10,0xc2,0x00,0x09,
44185 +0x00,0xe4,0x48,0x24,0x3c,0x03,0xb0,0x0a,0x00,0xa3,0x18,0x21,0x8c,0x62,0x00,0x00,
44186 +0x00,0x00,0x00,0x00,0x00,0x4a,0x10,0x24,0x00,0x49,0x10,0x25,0x03,0xe0,0x00,0x08,
44187 +0xac,0x62,0x00,0x00,0x3c,0x03,0xb0,0x0a,0x00,0xa3,0x18,0x21,0x94,0x62,0x00,0x00,
44188 +0x00,0x00,0x00,0x00,0x00,0x4a,0x10,0x24,0x00,0x49,0x10,0x25,0x03,0xe0,0x00,0x08,
44189 +0xa4,0x62,0x00,0x00,0x91,0x02,0x00,0x00,0x00,0x04,0x18,0x27,0x00,0xe4,0x20,0x24,
44190 +0x00,0x43,0x10,0x24,0x00,0x44,0x10,0x25,0x03,0xe0,0x00,0x08,0xa1,0x02,0x00,0x00,
44191 +0x30,0xa9,0x00,0xff,0x27,0x83,0x8b,0x70,0x30,0x85,0x00,0xff,0x24,0x02,0x00,0x01,
44192 +0x00,0x07,0x50,0x27,0x00,0xc7,0x40,0x24,0x11,0x22,0x00,0x17,0x00,0xa3,0x18,0x21,
44193 +0x00,0x05,0x20,0x40,0x27,0x82,0x8b,0x70,0x00,0x05,0x28,0x80,0x27,0x83,0x8b,0x78,
44194 +0x00,0x83,0x50,0x21,0x00,0xa2,0x20,0x21,0x24,0x02,0x00,0x02,0x00,0x07,0x40,0x27,
44195 +0x11,0x22,0x00,0x07,0x00,0xc7,0x28,0x24,0x8c,0x82,0x00,0x18,0x00,0x00,0x00,0x00,
44196 +0x00,0x48,0x10,0x24,0x00,0x45,0x10,0x25,0x03,0xe0,0x00,0x08,0xac,0x82,0x00,0x18,
44197 +0x95,0x42,0x00,0x02,0x00,0x00,0x00,0x00,0x00,0x48,0x10,0x24,0x00,0x45,0x10,0x25,
44198 +0x03,0xe0,0x00,0x08,0xa5,0x42,0x00,0x02,0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
44199 +0x00,0x4a,0x10,0x24,0x00,0x48,0x10,0x25,0x03,0xe0,0x00,0x08,0xa0,0x62,0x00,0x00,
44200 +0x00,0x04,0x32,0x02,0x30,0xc6,0xff,0x00,0x00,0x04,0x16,0x02,0x00,0x04,0x1a,0x00,
44201 +0x3c,0x05,0x00,0xff,0x00,0x65,0x18,0x24,0x00,0x46,0x10,0x25,0x00,0x43,0x10,0x25,
44202 +0x00,0x04,0x26,0x00,0x03,0xe0,0x00,0x08,0x00,0x44,0x10,0x25,0x3c,0x03,0xb0,0x03,
44203 +0x3c,0x02,0x80,0x00,0x27,0xbd,0xff,0xe8,0x34,0x63,0x00,0x20,0x24,0x42,0x14,0xdc,
44204 +0x3c,0x04,0xb0,0x03,0xaf,0xbf,0x00,0x14,0xac,0x62,0x00,0x00,0xaf,0xb0,0x00,0x10,
44205 +0x34,0x84,0x00,0x2c,0x8c,0x83,0x00,0x00,0xa7,0x80,0xbc,0x00,0x00,0x03,0x12,0x02,
44206 +0x00,0x03,0x2d,0x02,0x30,0x42,0x0f,0xff,0xa3,0x83,0xbc,0x08,0xa7,0x85,0xbc,0x0c,
44207 +0xa7,0x82,0xbc,0x0a,0xa7,0x80,0xbc,0x02,0xa7,0x80,0xbc,0x04,0xa7,0x80,0xbc,0x06,
44208 +0x0c,0x00,0x06,0xd1,0x24,0x04,0x05,0x00,0x3c,0x05,0x08,0x00,0x00,0x45,0x28,0x25,
44209 +0x24,0x04,0x05,0x00,0x0c,0x00,0x06,0xbf,0x00,0x40,0x80,0x21,0x3c,0x02,0xf7,0xff,
44210 +0x34,0x42,0xff,0xff,0x02,0x02,0x80,0x24,0x02,0x00,0x28,0x21,0x0c,0x00,0x06,0xbf,
44211 +0x24,0x04,0x05,0x00,0x3c,0x02,0xb0,0x03,0x3c,0x03,0xb0,0x03,0x34,0x42,0x01,0x08,
44212 +0x34,0x63,0x01,0x18,0x8c,0x45,0x00,0x00,0x8c,0x64,0x00,0x00,0x3c,0x02,0x00,0x0f,
44213 +0x3c,0x03,0x00,0x4c,0x30,0x84,0x02,0x00,0x34,0x63,0x4b,0x40,0xaf,0x85,0xbc,0x10,
44214 +0x10,0x80,0x00,0x06,0x34,0x42,0x42,0x40,0xaf,0x83,0xbc,0x14,0x8f,0xbf,0x00,0x14,
44215 +0x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0xaf,0x82,0xbc,0x14,
44216 +0x08,0x00,0x05,0x67,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,
44217 +0x27,0xbd,0xff,0xc8,0x34,0x63,0x00,0x20,0x24,0x42,0x15,0xb8,0x30,0x84,0x00,0xff,
44218 +0xaf,0xbf,0x00,0x30,0xaf,0xb7,0x00,0x2c,0xaf,0xb6,0x00,0x28,0xaf,0xb5,0x00,0x24,
44219 +0xaf,0xb4,0x00,0x20,0xaf,0xb3,0x00,0x1c,0xaf,0xb2,0x00,0x18,0xaf,0xb1,0x00,0x14,
44220 +0xaf,0xb0,0x00,0x10,0xac,0x62,0x00,0x00,0x10,0x80,0x00,0x1c,0x24,0x02,0x00,0x02,
44221 +0x10,0x82,0x00,0x08,0x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x30,0x7b,0xb6,0x01,0x7c,
44222 +0x7b,0xb4,0x01,0x3c,0x7b,0xb2,0x00,0xfc,0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,
44223 +0x27,0xbd,0x00,0x38,0xa7,0x80,0xbc,0x00,0xa7,0x80,0xbc,0x02,0xa7,0x80,0xbc,0x04,
44224 +0xa7,0x80,0xbc,0x06,0x0c,0x00,0x06,0xd1,0x24,0x04,0x05,0x00,0x3c,0x05,0x08,0x00,
44225 +0x00,0x45,0x28,0x25,0x24,0x04,0x05,0x00,0x0c,0x00,0x06,0xbf,0x00,0x40,0x80,0x21,
44226 +0x3c,0x05,0xf7,0xff,0x34,0xa5,0xff,0xff,0x02,0x05,0x28,0x24,0x0c,0x00,0x06,0xbf,
44227 +0x24,0x04,0x05,0x00,0x08,0x00,0x05,0x82,0x00,0x00,0x00,0x00,0x0c,0x00,0x06,0xd1,
44228 +0x24,0x04,0x05,0xa0,0x24,0x04,0x05,0xa4,0x0c,0x00,0x06,0xd1,0x00,0x02,0xbc,0x02,
44229 +0x24,0x04,0x05,0xa8,0x00,0x02,0xb4,0x02,0x0c,0x00,0x06,0xd1,0x30,0x55,0xff,0xff,
44230 +0x00,0x40,0x80,0x21,0x97,0x84,0xbc,0x00,0x97,0x82,0xbc,0x02,0x97,0x83,0xbc,0x06,
44231 +0x02,0xe4,0x20,0x23,0x02,0xa2,0x10,0x23,0x00,0x82,0x20,0x21,0x97,0x82,0xbc,0x04,
44232 +0x32,0x14,0xff,0xff,0x02,0x83,0x18,0x23,0x02,0xc2,0x10,0x23,0x00,0x82,0x20,0x21,
44233 +0x93,0x82,0xbc,0x08,0x00,0x83,0x20,0x21,0x30,0x84,0xff,0xff,0x00,0x82,0x10,0x2b,
44234 +0x14,0x40,0x00,0xaa,0x00,0x00,0x00,0x00,0x97,0x82,0xbc,0x0c,0x00,0x00,0x00,0x00,
44235 +0x00,0x44,0x10,0x2b,0x14,0x40,0x00,0x7f,0x00,0x00,0x00,0x00,0x97,0x82,0xbc,0x0a,
44236 +0x00,0x00,0x00,0x00,0x00,0x44,0x10,0x2b,0x10,0x40,0x00,0x3a,0x00,0x00,0x00,0x00,
44237 +0x0c,0x00,0x06,0xd1,0x24,0x04,0x04,0x50,0x30,0x51,0x00,0x7f,0x00,0x40,0x80,0x21,
44238 +0x2e,0x22,0x00,0x32,0x10,0x40,0x00,0x13,0x24,0x02,0x00,0x20,0x12,0x22,0x00,0x17,
44239 +0x24,0x02,0xff,0x80,0x02,0x02,0x10,0x24,0x26,0x31,0x00,0x01,0x00,0x51,0x80,0x25,
44240 +0x02,0x00,0x28,0x21,0x0c,0x00,0x06,0xbf,0x24,0x04,0x04,0x50,0x02,0x00,0x28,0x21,
44241 +0x0c,0x00,0x06,0xbf,0x24,0x04,0x04,0x58,0x02,0x00,0x28,0x21,0x0c,0x00,0x06,0xbf,
44242 +0x24,0x04,0x04,0x60,0x02,0x00,0x28,0x21,0x24,0x04,0x04,0x68,0x0c,0x00,0x06,0xbf,
44243 +0x00,0x00,0x00,0x00,0xa7,0x97,0xbc,0x00,0xa7,0x95,0xbc,0x02,0xa7,0x96,0xbc,0x04,
44244 +0xa7,0x94,0xbc,0x06,0x08,0x00,0x05,0x82,0x00,0x00,0x00,0x00,0x0c,0x00,0x06,0xd1,
44245 +0x24,0x04,0x02,0x08,0x3c,0x04,0x00,0xc0,0x00,0x40,0x28,0x21,0x00,0x44,0x10,0x24,
44246 +0x00,0x02,0x15,0x82,0x24,0x03,0x00,0x03,0x10,0x43,0x00,0x07,0x00,0x00,0x00,0x00,
44247 +0x3c,0x02,0xff,0x3f,0x34,0x42,0xff,0xff,0x00,0xa2,0x10,0x24,0x00,0x44,0x28,0x25,
44248 +0x0c,0x00,0x06,0xbf,0x24,0x04,0x02,0x08,0x0c,0x00,0x06,0xd1,0x24,0x04,0x02,0x2c,
44249 +0x00,0x40,0x90,0x21,0x3c,0x02,0xff,0xff,0x34,0x42,0x3f,0xff,0x02,0x42,0x90,0x24,
44250 +0x02,0x40,0x28,0x21,0x0c,0x00,0x06,0xbf,0x24,0x04,0x02,0x2c,0x08,0x00,0x05,0xc9,
44251 +0x24,0x02,0xff,0x80,0x0c,0x00,0x06,0xd1,0x24,0x04,0x04,0x50,0x30,0x51,0x00,0x7f,
44252 +0x24,0x02,0x00,0x20,0x16,0x22,0xff,0xdb,0x00,0x00,0x00,0x00,0x0c,0x00,0x06,0xd1,
44253 +0x24,0x04,0x02,0x2c,0x34,0x52,0x40,0x00,0x02,0x40,0x28,0x21,0x0c,0x00,0x06,0xbf,
44254 +0x24,0x04,0x02,0x2c,0x0c,0x00,0x06,0xd1,0x24,0x04,0x02,0x58,0x24,0x04,0x02,0x5c,
44255 +0x0c,0x00,0x06,0xd1,0x00,0x02,0x9e,0x02,0x30,0x43,0x00,0xff,0x00,0x13,0x12,0x00,
44256 +0x00,0x43,0x10,0x25,0x2c,0x43,0x00,0x04,0x14,0x60,0x00,0x1d,0x2c,0x42,0x00,0x11,
44257 +0x10,0x40,0x00,0x0b,0x00,0x00,0x00,0x00,0x3c,0x02,0xff,0xff,0x34,0x42,0x3f,0xff,
44258 +0x02,0x42,0x90,0x24,0x02,0x40,0x28,0x21,0x24,0x04,0x02,0x2c,0x0c,0x00,0x06,0xbf,
44259 +0x36,0x52,0x80,0x00,0x02,0x40,0x28,0x21,0x08,0x00,0x05,0xd7,0x24,0x04,0x02,0x2c,
44260 +0x0c,0x00,0x06,0xd1,0x24,0x04,0x02,0x08,0x3c,0x04,0x00,0xc0,0x00,0x40,0x28,0x21,
44261 +0x00,0x44,0x10,0x24,0x00,0x02,0x15,0x82,0x24,0x03,0x00,0x02,0x14,0x43,0xff,0xee,
44262 +0x3c,0x02,0xff,0x3f,0x34,0x42,0xff,0xff,0x00,0xa2,0x10,0x24,0x00,0x44,0x28,0x25,
44263 +0x0c,0x00,0x06,0xbf,0x24,0x04,0x02,0x08,0x08,0x00,0x06,0x13,0x3c,0x02,0xff,0xff,
44264 +0x0c,0x00,0x06,0xd1,0x24,0x04,0x02,0x08,0x00,0x40,0x28,0x21,0x00,0x02,0x15,0x82,
44265 +0x30,0x42,0x00,0x03,0x24,0x03,0x00,0x03,0x14,0x43,0xff,0xdf,0x3c,0x02,0xff,0x3f,
44266 +0x34,0x42,0xff,0xff,0x00,0xa2,0x10,0x24,0x3c,0x03,0x00,0x80,0x08,0x00,0x06,0x28,
44267 +0x00,0x43,0x28,0x25,0x0c,0x00,0x06,0xd1,0x24,0x04,0x04,0x50,0x30,0x51,0x00,0x7f,
44268 +0x00,0x40,0x80,0x21,0x2e,0x22,0x00,0x32,0x10,0x40,0xff,0x9a,0x24,0x02,0x00,0x20,
44269 +0x12,0x22,0x00,0x04,0x24,0x02,0xff,0x80,0x02,0x02,0x10,0x24,0x08,0x00,0x05,0xcb,
44270 +0x26,0x31,0x00,0x02,0x0c,0x00,0x06,0xd1,0x24,0x04,0x02,0x08,0x3c,0x04,0x00,0xc0,
44271 +0x00,0x40,0x28,0x21,0x00,0x44,0x10,0x24,0x00,0x02,0x15,0x82,0x24,0x03,0x00,0x03,
44272 +0x10,0x43,0x00,0x07,0x00,0x00,0x00,0x00,0x3c,0x02,0xff,0x3f,0x34,0x42,0xff,0xff,
44273 +0x00,0xa2,0x10,0x24,0x00,0x44,0x28,0x25,0x0c,0x00,0x06,0xbf,0x24,0x04,0x02,0x08,
44274 +0x0c,0x00,0x06,0xd1,0x24,0x04,0x02,0x2c,0x00,0x40,0x90,0x21,0x3c,0x02,0xff,0xff,
44275 +0x34,0x42,0x3f,0xff,0x02,0x42,0x90,0x24,0x02,0x40,0x28,0x21,0x0c,0x00,0x06,0xbf,
44276 +0x24,0x04,0x02,0x2c,0x08,0x00,0x06,0x42,0x24,0x02,0xff,0x80,0x0c,0x00,0x06,0xd1,
44277 +0x24,0x04,0x04,0x50,0x00,0x40,0x80,0x21,0x30,0x51,0x00,0x7f,0x24,0x02,0x00,0x20,
44278 +0x12,0x22,0x00,0x1d,0x2e,0x22,0x00,0x21,0x14,0x40,0xff,0x72,0x24,0x02,0xff,0x80,
44279 +0x02,0x02,0x10,0x24,0x26,0x31,0xff,0xff,0x00,0x51,0x80,0x25,0x24,0x04,0x04,0x50,
44280 +0x0c,0x00,0x06,0xbf,0x02,0x00,0x28,0x21,0x24,0x04,0x04,0x58,0x0c,0x00,0x06,0xbf,
44281 +0x02,0x00,0x28,0x21,0x24,0x04,0x04,0x60,0x0c,0x00,0x06,0xbf,0x02,0x00,0x28,0x21,
44282 +0x02,0x00,0x28,0x21,0x0c,0x00,0x06,0xbf,0x24,0x04,0x04,0x68,0x24,0x02,0x00,0x20,
44283 +0x16,0x22,0xff,0x60,0x00,0x00,0x00,0x00,0x0c,0x00,0x06,0xd1,0x24,0x04,0x02,0x2c,
44284 +0x00,0x40,0x90,0x21,0x3c,0x02,0xff,0xff,0x34,0x42,0x3f,0xff,0x02,0x42,0x10,0x24,
44285 +0x08,0x00,0x06,0x19,0x34,0x52,0x80,0x00,0x0c,0x00,0x06,0xd1,0x24,0x04,0x02,0x2c,
44286 +0x34,0x52,0x40,0x00,0x02,0x40,0x28,0x21,0x0c,0x00,0x06,0xbf,0x24,0x04,0x02,0x2c,
44287 +0x0c,0x00,0x06,0xd1,0x24,0x04,0x02,0x58,0x24,0x04,0x02,0x5c,0x0c,0x00,0x06,0xd1,
44288 +0x00,0x02,0x9e,0x02,0x30,0x43,0x00,0xff,0x00,0x13,0x12,0x00,0x00,0x43,0x10,0x25,
44289 +0x2c,0x43,0x00,0x04,0x14,0x60,0x00,0x20,0x2c,0x42,0x00,0x11,0x10,0x40,0x00,0x0d,
44290 +0x00,0x00,0x00,0x00,0x3c,0x02,0xff,0xff,0x34,0x42,0x3f,0xff,0x02,0x42,0x90,0x24,
44291 +0x02,0x40,0x28,0x21,0x24,0x04,0x02,0x2c,0x0c,0x00,0x06,0xbf,0x36,0x52,0x80,0x00,
44292 +0x02,0x40,0x28,0x21,0x0c,0x00,0x06,0xbf,0x24,0x04,0x02,0x2c,0x08,0x00,0x06,0x66,
44293 +0x2e,0x22,0x00,0x21,0x0c,0x00,0x06,0xd1,0x24,0x04,0x02,0x08,0x3c,0x04,0x00,0xc0,
44294 +0x00,0x40,0x28,0x21,0x00,0x44,0x10,0x24,0x00,0x02,0x15,0x82,0x24,0x03,0x00,0x02,
44295 +0x14,0x43,0xff,0xec,0x00,0x00,0x00,0x00,0x3c,0x02,0xff,0x3f,0x34,0x42,0xff,0xff,
44296 +0x00,0xa2,0x10,0x24,0x00,0x44,0x28,0x25,0x0c,0x00,0x06,0xbf,0x24,0x04,0x02,0x08,
44297 +0x08,0x00,0x06,0x96,0x3c,0x02,0xff,0xff,0x0c,0x00,0x06,0xd1,0x24,0x04,0x02,0x08,
44298 +0x00,0x40,0x28,0x21,0x00,0x02,0x15,0x82,0x30,0x42,0x00,0x03,0x24,0x03,0x00,0x03,
44299 +0x14,0x43,0xff,0xdc,0x3c,0x03,0x00,0x80,0x3c,0x02,0xff,0x3f,0x34,0x42,0xff,0xff,
44300 +0x00,0xa2,0x10,0x24,0x08,0x00,0x06,0xae,0x00,0x43,0x28,0x25,0x30,0x83,0x00,0x03,
44301 +0x00,0x04,0x20,0x40,0x00,0x83,0x20,0x23,0x3c,0x02,0xb0,0x0a,0x00,0x82,0x20,0x21,
44302 +0x3c,0x06,0x00,0x01,0xac,0x85,0x00,0x00,0x24,0x07,0x00,0x01,0x00,0x00,0x28,0x21,
44303 +0x34,0xc6,0x86,0x9f,0x8c,0x82,0x10,0x00,0x24,0xa5,0x00,0x01,0x10,0x47,0x00,0x03,
44304 +0x00,0xc5,0x18,0x2b,0x10,0x60,0xff,0xfb,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,
44305 +0x00,0x00,0x00,0x00,0x30,0x83,0x00,0x03,0x00,0x04,0x20,0x40,0x3c,0x02,0xb0,0x0a,
44306 +0x00,0x83,0x20,0x23,0x00,0x82,0x20,0x21,0x3c,0x06,0x00,0x01,0x24,0x02,0xff,0xff,
44307 +0xac,0x82,0x10,0x00,0x00,0x00,0x28,0x21,0x24,0x07,0x00,0x01,0x34,0xc6,0x86,0x9f,
44308 +0x8c,0x82,0x10,0x00,0x24,0xa5,0x00,0x01,0x10,0x47,0x00,0x03,0x00,0xc5,0x18,0x2b,
44309 +0x10,0x60,0xff,0xfb,0x00,0x00,0x00,0x00,0x8c,0x82,0x00,0x00,0x03,0xe0,0x00,0x08,
44310 +0x00,0x00,0x00,0x00,0x3c,0x05,0xb0,0x03,0x3c,0x02,0x80,0x00,0x24,0x42,0x1b,0x94,
44311 +0x24,0x03,0x00,0x01,0x34,0xa5,0x00,0x20,0x3c,0x06,0xb0,0x03,0xac,0xa2,0x00,0x00,
44312 +0x34,0xc6,0x01,0x04,0xa0,0x83,0x00,0x48,0xa0,0x80,0x00,0x04,0xa0,0x80,0x00,0x05,
44313 +0xa0,0x80,0x00,0x06,0xa0,0x80,0x00,0x07,0xa0,0x80,0x00,0x08,0xa0,0x80,0x00,0x09,
44314 +0xa0,0x80,0x00,0x0a,0xa0,0x80,0x00,0x11,0xa0,0x80,0x00,0x13,0xa0,0x80,0x00,0x49,
44315 +0x94,0xc2,0x00,0x00,0xac,0x80,0x00,0x00,0xa0,0x80,0x00,0x4e,0x00,0x02,0x14,0x00,
44316 +0x00,0x02,0x14,0x03,0x30,0x43,0x00,0xff,0x30,0x42,0xff,0x00,0xa4,0x82,0x00,0x44,
44317 +0xa4,0x83,0x00,0x46,0xac,0x80,0x00,0x24,0xac,0x80,0x00,0x28,0xac,0x80,0x00,0x2c,
44318 +0xac,0x80,0x00,0x30,0xac,0x80,0x00,0x34,0xac,0x80,0x00,0x38,0xac,0x80,0x00,0x3c,
44319 +0x03,0xe0,0x00,0x08,0xac,0x80,0x00,0x40,0x84,0x83,0x00,0x0c,0x3c,0x07,0xb0,0x03,
44320 +0x34,0xe7,0x00,0x20,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,
44321 +0x27,0x83,0x90,0x04,0x00,0x43,0x10,0x21,0x8c,0x48,0x00,0x18,0x3c,0x02,0x80,0x00,
44322 +0x24,0x42,0x1c,0x28,0xac,0xe2,0x00,0x00,0x8d,0x03,0x00,0x08,0x80,0x82,0x00,0x13,
44323 +0x00,0x05,0x2c,0x00,0x00,0x03,0x1e,0x02,0x00,0x02,0x12,0x00,0x30,0x63,0x00,0x7e,
44324 +0x00,0x62,0x18,0x21,0x00,0x65,0x18,0x21,0x3c,0x02,0xc0,0x00,0x3c,0x05,0xb0,0x05,
44325 +0x34,0x42,0x04,0x00,0x24,0x63,0x00,0x01,0x3c,0x07,0xb0,0x05,0x3c,0x08,0xb0,0x05,
44326 +0x34,0xa5,0x04,0x20,0xac,0xa3,0x00,0x00,0x00,0xc2,0x30,0x21,0x34,0xe7,0x04,0x24,
44327 +0x35,0x08,0x02,0x28,0x24,0x02,0x00,0x01,0x24,0x03,0x00,0x20,0xac,0xe6,0x00,0x00,
44328 +0xac,0x82,0x00,0x3c,0x03,0xe0,0x00,0x08,0xa1,0x03,0x00,0x00,0x27,0xbd,0xff,0xa8,
44329 +0x00,0x07,0x60,0x80,0x27,0x82,0xb4,0x00,0xaf,0xbe,0x00,0x50,0xaf,0xb7,0x00,0x4c,
44330 +0xaf,0xb5,0x00,0x44,0xaf,0xb4,0x00,0x40,0xaf,0xbf,0x00,0x54,0xaf,0xb6,0x00,0x48,
44331 +0xaf,0xb3,0x00,0x3c,0xaf,0xb2,0x00,0x38,0xaf,0xb1,0x00,0x34,0xaf,0xb0,0x00,0x30,
44332 +0x01,0x82,0x10,0x21,0x8c,0x43,0x00,0x00,0x00,0xe0,0x70,0x21,0x3c,0x02,0x80,0x00,
44333 +0x94,0x73,0x00,0x14,0x3c,0x07,0xb0,0x03,0x34,0xe7,0x00,0x20,0x24,0x42,0x1c,0xbc,
44334 +0x3c,0x03,0xb0,0x05,0xac,0xe2,0x00,0x00,0x34,0x63,0x01,0x28,0x90,0x67,0x00,0x00,
44335 +0x00,0x13,0xa8,0xc0,0x02,0xb3,0x18,0x21,0x27,0x82,0x90,0x04,0x00,0x03,0x18,0x80,
44336 +0x00,0x62,0x18,0x21,0x00,0x05,0x2c,0x00,0x00,0x07,0x3e,0x00,0x28,0xc2,0x00,0x03,
44337 +0x00,0xc0,0xa0,0x21,0x00,0x80,0x78,0x21,0x00,0x05,0xbc,0x03,0x8c,0x68,0x00,0x18,
44338 +0x02,0xa0,0x58,0x21,0x10,0x40,0x01,0x81,0x00,0x07,0xf6,0x03,0x00,0xde,0x10,0x07,
44339 +0x30,0x5e,0x00,0x01,0x01,0x73,0x10,0x21,0x27,0x83,0x90,0x08,0x00,0x02,0x10,0x80,
44340 +0x00,0x43,0x10,0x21,0x80,0x4d,0x00,0x06,0x8d,0x03,0x00,0x00,0x8d,0x02,0x00,0x04,
44341 +0x8d,0x0a,0x00,0x08,0x8d,0x03,0x00,0x0c,0xaf,0xa2,0x00,0x20,0x11,0xa0,0x01,0x71,
44342 +0xaf,0xa3,0x00,0x18,0x27,0x82,0xb4,0x00,0x01,0x82,0x10,0x21,0x8c,0x44,0x00,0x00,
44343 +0x00,0x00,0x00,0x00,0x90,0x83,0x00,0x16,0x00,0x00,0x00,0x00,0x30,0x63,0x00,0x04,
44344 +0x14,0x60,0x00,0x12,0x00,0x00,0xb0,0x21,0x3c,0x02,0xb0,0x09,0x34,0x42,0x01,0x46,
44345 +0x90,0x43,0x00,0x00,0x2a,0x84,0x00,0x04,0x10,0x80,0x01,0x56,0x30,0x65,0x00,0x01,
44346 +0x91,0xe2,0x00,0x09,0x00,0x00,0x00,0x00,0x12,0x82,0x00,0x02,0x00,0x00,0x00,0x00,
44347 +0x00,0x00,0x28,0x21,0x14,0xa0,0x00,0x03,0x00,0x00,0x38,0x21,0x13,0xc0,0x00,0x03,
44348 +0x38,0xf6,0x00,0x01,0x24,0x07,0x00,0x01,0x38,0xf6,0x00,0x01,0x01,0x73,0x10,0x21,
44349 +0x00,0x02,0x30,0x80,0x27,0x83,0x90,0x10,0x00,0xc3,0x48,0x21,0x91,0x25,0x00,0x00,
44350 +0x8f,0xa4,0x00,0x20,0x2c,0xa3,0x00,0x04,0x00,0x04,0x11,0xc3,0x30,0x42,0x00,0x01,
44351 +0x00,0x03,0xb0,0x0b,0x12,0xc0,0x00,0xd8,0xaf,0xa2,0x00,0x24,0x93,0x90,0xbb,0xea,
44352 +0x00,0x0a,0x16,0x42,0x30,0x52,0x00,0x3f,0x2e,0x06,0x00,0x0c,0x10,0xc0,0x00,0xc0,
44353 +0x00,0xa0,0x20,0x21,0x2c,0xa2,0x00,0x10,0x14,0x40,0x00,0x04,0x00,0x90,0x10,0x2b,
44354 +0x30,0xa2,0x00,0x07,0x24,0x44,0x00,0x04,0x00,0x90,0x10,0x2b,0x10,0x40,0x00,0x0b,
44355 +0x01,0x73,0x10,0x21,0x27,0x85,0xbb,0x1c,0x00,0x10,0x10,0x40,0x00,0x50,0x10,0x21,
44356 +0x00,0x45,0x10,0x21,0x90,0x50,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x90,0x18,0x2b,
44357 +0x14,0x60,0xff,0xfa,0x00,0x10,0x10,0x40,0x01,0x73,0x10,0x21,0x00,0x02,0x10,0x80,
44358 +0x27,0x83,0x90,0x08,0x00,0x43,0x10,0x21,0x31,0xa4,0x00,0x01,0x10,0x80,0x00,0xa5,
44359 +0xa0,0x50,0x00,0x07,0x3c,0x04,0xb0,0x05,0x34,0x84,0x00,0x08,0x24,0x02,0x00,0x01,
44360 +0x3c,0x03,0x80,0x00,0xa1,0xe2,0x00,0x4e,0xac,0x83,0x00,0x00,0x8c,0x85,0x00,0x00,
44361 +0x3c,0x02,0x00,0xf0,0x3c,0x03,0x40,0xf0,0x34,0x42,0xf0,0x00,0x34,0x63,0xf0,0x00,
44362 +0x24,0x17,0x00,0x0e,0x24,0x13,0x01,0x06,0xac,0x82,0x00,0x00,0xac,0x83,0x00,0x00,
44363 +0x27,0x82,0xb4,0x00,0x01,0x82,0x10,0x21,0x8c,0x43,0x00,0x00,0x24,0x05,0x00,0x01,
44364 +0xaf,0xa5,0x00,0x1c,0x90,0x62,0x00,0x16,0x00,0x13,0xa8,0xc0,0x32,0x51,0x00,0x02,
44365 +0x34,0x42,0x00,0x04,0xa0,0x62,0x00,0x16,0x8f,0xa3,0x00,0x20,0x8f,0xa4,0x00,0x18,
44366 +0x00,0x03,0x13,0x43,0x00,0x04,0x1a,0x02,0x30,0x47,0x00,0x01,0x12,0x20,0x00,0x04,
44367 +0x30,0x64,0x07,0xff,0x2e,0x03,0x00,0x04,0x32,0x42,0x00,0x33,0x00,0x43,0x90,0x0b,
44368 +0x8f,0xa5,0x00,0x24,0x8f,0xa6,0x00,0x1c,0x00,0x12,0x10,0x40,0x00,0x05,0x19,0xc0,
44369 +0x00,0x47,0x10,0x21,0x00,0x06,0x2a,0x80,0x00,0x43,0x10,0x21,0x00,0x10,0x32,0x00,
44370 +0x00,0x04,0x24,0x80,0x02,0x65,0x28,0x21,0x00,0xa4,0x28,0x21,0x00,0x46,0x10,0x21,
44371 +0x00,0x17,0x1c,0x00,0x3c,0x04,0xc0,0x00,0x00,0x43,0x30,0x21,0x16,0x80,0x00,0x29,
44372 +0x00,0xa4,0x28,0x21,0x3c,0x02,0xb0,0x05,0x34,0x42,0x04,0x00,0x3c,0x03,0xb0,0x05,
44373 +0x3c,0x04,0xb0,0x05,0xac,0x46,0x00,0x00,0x34,0x63,0x04,0x04,0x34,0x84,0x02,0x28,
44374 +0x24,0x02,0x00,0x01,0xac,0x65,0x00,0x00,0xa0,0x82,0x00,0x00,0x3c,0x02,0xb0,0x09,
44375 +0x34,0x42,0x01,0x46,0x90,0x44,0x00,0x00,0x91,0xe3,0x00,0x09,0x30,0x86,0x00,0x01,
44376 +0x02,0x83,0x18,0x26,0x00,0x03,0x30,0x0b,0x14,0xc0,0x00,0x03,0x00,0x00,0x28,0x21,
44377 +0x13,0xc0,0x00,0x03,0x02,0xb3,0x10,0x21,0x24,0x05,0x00,0x01,0x02,0xb3,0x10,0x21,
44378 +0x27,0x83,0x90,0x08,0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x84,0x48,0x00,0x04,
44379 +0x00,0xa0,0x30,0x21,0x00,0xe0,0x20,0x21,0x02,0x80,0x28,0x21,0x02,0xc0,0x38,0x21,
44380 +0x0c,0x00,0x00,0x70,0xaf,0xa8,0x00,0x10,0x7b,0xbe,0x02,0xbc,0x7b,0xb6,0x02,0x7c,
44381 +0x7b,0xb4,0x02,0x3c,0x7b,0xb2,0x01,0xfc,0x7b,0xb0,0x01,0xbc,0x03,0xe0,0x00,0x08,
44382 +0x27,0xbd,0x00,0x58,0x24,0x02,0x00,0x01,0x12,0x82,0x00,0x3d,0x3c,0x02,0xb0,0x05,
44383 +0x24,0x02,0x00,0x02,0x12,0x82,0x00,0x31,0x3c,0x02,0xb0,0x05,0x24,0x02,0x00,0x03,
44384 +0x12,0x82,0x00,0x25,0x3c,0x02,0xb0,0x05,0x24,0x02,0x00,0x10,0x12,0x82,0x00,0x19,
44385 +0x3c,0x02,0xb0,0x05,0x24,0x02,0x00,0x11,0x12,0x82,0x00,0x0d,0x3c,0x02,0xb0,0x05,
44386 +0x24,0x02,0x00,0x12,0x16,0x82,0xff,0xd1,0x3c,0x02,0xb0,0x05,0x3c,0x03,0xb0,0x05,
44387 +0x34,0x42,0x04,0x20,0x3c,0x04,0xb0,0x05,0x34,0x63,0x04,0x24,0xac,0x46,0x00,0x00,
44388 +0x34,0x84,0x02,0x28,0xac,0x65,0x00,0x00,0x08,0x00,0x07,0xe6,0x24,0x02,0x00,0x20,
44389 +0x34,0x42,0x04,0x40,0x3c,0x03,0xb0,0x05,0x3c,0x04,0xb0,0x05,0xac,0x46,0x00,0x00,
44390 +0x34,0x63,0x04,0x44,0x34,0x84,0x02,0x28,0x24,0x02,0x00,0x40,0x08,0x00,0x07,0xe6,
44391 +0xac,0x65,0x00,0x00,0x34,0x42,0x04,0x28,0x3c,0x03,0xb0,0x05,0x3c,0x04,0xb0,0x05,
44392 +0xac,0x46,0x00,0x00,0x34,0x63,0x04,0x2c,0x34,0x84,0x02,0x28,0x24,0x02,0xff,0x80,
44393 +0x08,0x00,0x07,0xe6,0xac,0x65,0x00,0x00,0x34,0x42,0x04,0x18,0x3c,0x03,0xb0,0x05,
44394 +0x3c,0x04,0xb0,0x05,0xac,0x46,0x00,0x00,0x34,0x63,0x04,0x1c,0x34,0x84,0x02,0x28,
44395 +0x24,0x02,0x00,0x08,0x08,0x00,0x07,0xe6,0xac,0x65,0x00,0x00,0x34,0x42,0x04,0x10,
44396 +0x3c,0x03,0xb0,0x05,0x3c,0x04,0xb0,0x05,0xac,0x46,0x00,0x00,0x34,0x63,0x04,0x14,
44397 +0x34,0x84,0x02,0x28,0x24,0x02,0x00,0x04,0x08,0x00,0x07,0xe6,0xac,0x65,0x00,0x00,
44398 +0x34,0x42,0x04,0x08,0x3c,0x03,0xb0,0x05,0x3c,0x04,0xb0,0x05,0xac,0x46,0x00,0x00,
44399 +0x34,0x63,0x04,0x0c,0x34,0x84,0x02,0x28,0x24,0x02,0x00,0x02,0x08,0x00,0x07,0xe6,
44400 +0xac,0x65,0x00,0x00,0x24,0x17,0x00,0x14,0x08,0x00,0x07,0xb8,0x24,0x13,0x01,0x02,
44401 +0x30,0xa2,0x00,0x07,0x24,0x44,0x00,0x0c,0x00,0x90,0x18,0x2b,0x10,0x60,0x00,0x0c,
44402 +0x26,0x02,0x00,0x04,0x27,0x85,0xbb,0x1c,0x00,0x10,0x10,0x40,0x00,0x50,0x10,0x21,
44403 +0x00,0x45,0x10,0x21,0x90,0x50,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x90,0x18,0x2b,
44404 +0x14,0x60,0xff,0xfa,0x00,0x10,0x10,0x40,0x2e,0x06,0x00,0x0c,0x26,0x02,0x00,0x04,
44405 +0x08,0x00,0x07,0xa2,0x00,0x46,0x80,0x0a,0x27,0x82,0xb4,0x00,0x01,0x82,0x20,0x21,
44406 +0x8c,0x87,0x00,0x00,0x00,0x00,0x00,0x00,0x90,0xe2,0x00,0x19,0x00,0x00,0x00,0x00,
44407 +0x14,0x40,0x00,0x07,0x00,0x00,0x00,0x00,0x27,0x82,0x90,0x20,0x00,0xc2,0x10,0x21,
44408 +0x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x60,0x00,0x14,0x00,0x00,0x00,0x00,
44409 +0x90,0xe3,0x00,0x16,0x27,0x82,0x90,0x08,0x00,0xc2,0x10,0x21,0x34,0x63,0x00,0x20,
44410 +0x90,0x50,0x00,0x07,0xa0,0xe3,0x00,0x16,0x8c,0x84,0x00,0x00,0x00,0x0a,0x1e,0x42,
44411 +0x24,0x06,0x00,0x01,0x90,0x82,0x00,0x16,0x30,0x71,0x00,0x02,0x30,0x72,0x00,0x3f,
44412 +0x30,0x42,0x00,0xfb,0x24,0x17,0x00,0x18,0x24,0x13,0x01,0x03,0x24,0x15,0x08,0x18,
44413 +0xaf,0xa6,0x00,0x1c,0x08,0x00,0x07,0xc2,0xa0,0x82,0x00,0x16,0x8d,0x02,0x00,0x04,
44414 +0x00,0x0a,0x1c,0x42,0x30,0x42,0x00,0x10,0x14,0x40,0x00,0x15,0x30,0x72,0x00,0x3f,
44415 +0x81,0x22,0x00,0x05,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x11,0x30,0x72,0x00,0x3e,
44416 +0x27,0x83,0x90,0x18,0x00,0xc3,0x18,0x21,0x80,0x64,0x00,0x00,0x27,0x83,0xb5,0x78,
44417 +0x00,0x04,0x11,0x00,0x00,0x44,0x10,0x23,0x00,0x02,0x10,0x80,0x00,0x44,0x10,0x23,
44418 +0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x90,0x44,0x00,0x05,0x90,0x43,0x00,0x04,
44419 +0x00,0x00,0x00,0x00,0x00,0x64,0x18,0x24,0x30,0x63,0x00,0x01,0x02,0x43,0x90,0x25,
44420 +0x27,0x85,0xb4,0x00,0x01,0x85,0x28,0x21,0x8c,0xa6,0x00,0x00,0x01,0x73,0x10,0x21,
44421 +0x27,0x83,0x90,0x10,0x90,0xc4,0x00,0x16,0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,
44422 +0x30,0x84,0x00,0xdf,0x90,0x50,0x00,0x00,0xa0,0xc4,0x00,0x16,0x80,0xc6,0x00,0x12,
44423 +0x8c,0xa3,0x00,0x00,0x2d,0xc4,0x00,0x02,0xaf,0xa6,0x00,0x1c,0x90,0x62,0x00,0x16,
44424 +0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xfb,0x14,0x80,0x00,0x06,0xa0,0x62,0x00,0x16,
44425 +0x24,0x02,0x00,0x06,0x11,0xc2,0x00,0x03,0x24,0x02,0x00,0x04,0x15,0xc2,0xff,0x0e,
44426 +0x32,0x51,0x00,0x02,0x32,0x51,0x00,0x02,0x2e,0x02,0x00,0x0c,0x14,0x40,0x00,0x0f,
44427 +0x00,0x11,0x18,0x2b,0x32,0x02,0x00,0x0f,0x34,0x42,0x00,0x10,0x00,0x03,0x19,0x00,
44428 +0x00,0x43,0x18,0x21,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0xe0,0xa0,0x43,0x00,0x00,
44429 +0x00,0x00,0x20,0x21,0x02,0x00,0x28,0x21,0x0c,0x00,0x02,0x03,0xaf,0xaf,0x00,0x28,
44430 +0x8f,0xaf,0x00,0x28,0x08,0x00,0x07,0xc2,0x00,0x00,0x00,0x00,0x08,0x00,0x08,0xbd,
44431 +0x32,0x03,0x00,0xff,0x3c,0x03,0xb0,0x05,0x34,0x63,0x02,0x42,0x90,0x62,0x00,0x00,
44432 +0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x0f,0x14,0x40,0xfe,0xaa,0x00,0x00,0x00,0x00,
44433 +0x91,0xe2,0x00,0x09,0x00,0x00,0x00,0x00,0x02,0x82,0x10,0x26,0x08,0x00,0x07,0x79,
44434 +0x00,0x02,0x28,0x0b,0x08,0x00,0x07,0x7f,0x00,0x00,0xb0,0x21,0x24,0x02,0x00,0x10,
44435 +0x10,0xc2,0x00,0x08,0x24,0x02,0x00,0x11,0x10,0xc2,0xfe,0x7d,0x00,0x07,0x17,0x83,
44436 +0x24,0x02,0x00,0x12,0x14,0xc2,0xfe,0x7b,0x00,0x07,0x17,0x43,0x08,0x00,0x07,0x59,
44437 +0x30,0x5e,0x00,0x01,0x08,0x00,0x07,0x59,0x00,0x07,0xf7,0xc2,0x00,0x04,0x10,0x40,
44438 +0x27,0x83,0x80,0x1c,0x00,0x43,0x10,0x21,0x00,0x80,0x40,0x21,0x94,0x44,0x00,0x00,
44439 +0x2d,0x07,0x00,0x04,0x24,0xc2,0x00,0x03,0x00,0x47,0x30,0x0a,0x00,0x86,0x00,0x18,
44440 +0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x34,0x63,0x00,0x20,0x24,0x42,0x23,0x8c,
44441 +0xac,0x62,0x00,0x00,0x2d,0x06,0x00,0x10,0x00,0x00,0x20,0x12,0x00,0x04,0x22,0x42,
44442 +0x24,0x84,0x00,0x01,0x24,0x83,0x00,0xc0,0x10,0xe0,0x00,0x0b,0x24,0x82,0x00,0x60,
44443 +0x00,0x40,0x20,0x21,0x00,0x65,0x20,0x0a,0x3c,0x03,0xb0,0x03,0x34,0x63,0x01,0x00,
44444 +0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x01,0x00,0x44,0x20,0x04,
44445 +0x03,0xe0,0x00,0x08,0x00,0x80,0x10,0x21,0x24,0x85,0x00,0x28,0x24,0x83,0x00,0x24,
44446 +0x31,0x02,0x00,0x08,0x14,0xc0,0xff,0xf4,0x24,0x84,0x00,0x14,0x00,0x60,0x20,0x21,
44447 +0x08,0x00,0x08,0xfa,0x00,0xa2,0x20,0x0b,0x27,0xbd,0xff,0xe0,0x3c,0x03,0xb0,0x03,
44448 +0x3c,0x02,0x80,0x00,0xaf,0xb0,0x00,0x10,0x24,0x42,0x24,0x28,0x00,0x80,0x80,0x21,
44449 +0x34,0x63,0x00,0x20,0x3c,0x04,0xb0,0x03,0xaf,0xb2,0x00,0x18,0xaf,0xb1,0x00,0x14,
44450 +0xaf,0xbf,0x00,0x1c,0x83,0xb1,0x00,0x33,0x83,0xa8,0x00,0x37,0x34,0x84,0x01,0x10,
44451 +0xac,0x62,0x00,0x00,0x2e,0x02,0x00,0x10,0x00,0xe0,0x90,0x21,0x8c,0x87,0x00,0x00,
44452 +0x14,0x40,0x00,0x0c,0x2e,0x02,0x00,0x0c,0x3c,0x02,0x00,0x0f,0x34,0x42,0xf0,0x00,
44453 +0x00,0xe2,0x10,0x24,0x14,0x40,0x00,0x37,0x32,0x02,0x00,0x08,0x32,0x02,0x00,0x07,
44454 +0x27,0x83,0x80,0xcc,0x00,0x43,0x10,0x21,0x90,0x50,0x00,0x00,0x00,0x00,0x00,0x00,
44455 +0x2e,0x02,0x00,0x0c,0x14,0x40,0x00,0x03,0x02,0x00,0x20,0x21,0x32,0x02,0x00,0x0f,
44456 +0x24,0x44,0x00,0x0c,0x00,0x87,0x10,0x06,0x30,0x42,0x00,0x01,0x14,0x40,0x00,0x07,
44457 +0x2c,0x82,0x00,0x0c,0x00,0x04,0x10,0x80,0x27,0x83,0xb4,0x50,0x00,0x43,0x10,0x21,
44458 +0x8c,0x44,0x00,0x00,0x00,0x00,0x00,0x00,0x2c,0x82,0x00,0x0c,0x14,0x40,0x00,0x05,
44459 +0x00,0x05,0x10,0x40,0x00,0x46,0x10,0x21,0x00,0x02,0x11,0x00,0x00,0x82,0x10,0x21,
44460 +0x24,0x44,0x00,0x04,0x15,0x00,0x00,0x02,0x24,0x06,0x00,0x20,0x24,0x06,0x00,0x0e,
44461 +0x0c,0x00,0x08,0xe3,0x00,0x00,0x00,0x00,0x00,0x40,0x30,0x21,0x3c,0x02,0xb0,0x03,
44462 +0x34,0x42,0x01,0x00,0x90,0x43,0x00,0x00,0x2e,0x04,0x00,0x04,0x24,0x02,0x00,0x10,
44463 +0x24,0x05,0x00,0x0a,0x00,0x44,0x28,0x0a,0x30,0x63,0x00,0x01,0x14,0x60,0x00,0x02,
44464 +0x00,0x05,0x10,0x40,0x00,0xa0,0x10,0x21,0x30,0x45,0x00,0xff,0x00,0xc5,0x10,0x21,
44465 +0x24,0x46,0x00,0x46,0x02,0x26,0x18,0x04,0xa6,0x43,0x00,0x00,0x8f,0xbf,0x00,0x1c,
44466 +0x8f,0xb2,0x00,0x18,0x7b,0xb0,0x00,0xbc,0x00,0xc0,0x10,0x21,0x03,0xe0,0x00,0x08,
44467 +0x27,0xbd,0x00,0x20,0x10,0x40,0xff,0xcf,0x2e,0x02,0x00,0x0c,0x32,0x02,0x00,0x07,
44468 +0x27,0x83,0x80,0xc4,0x00,0x43,0x10,0x21,0x90,0x44,0x00,0x00,0x08,0x00,0x09,0x28,
44469 +0x02,0x04,0x80,0x23,0x27,0xbd,0xff,0xb8,0x00,0x05,0x38,0x80,0x27,0x82,0xb4,0x00,
44470 +0xaf,0xbe,0x00,0x40,0xaf,0xb6,0x00,0x38,0xaf,0xb3,0x00,0x2c,0xaf,0xbf,0x00,0x44,
44471 +0xaf,0xb7,0x00,0x3c,0xaf,0xb5,0x00,0x34,0xaf,0xb4,0x00,0x30,0xaf,0xb2,0x00,0x28,
44472 +0xaf,0xb1,0x00,0x24,0xaf,0xb0,0x00,0x20,0x00,0xe2,0x38,0x21,0x8c,0xe6,0x00,0x00,
44473 +0xaf,0xa5,0x00,0x4c,0x3c,0x02,0x80,0x00,0x3c,0x05,0xb0,0x03,0x34,0xa5,0x00,0x20,
44474 +0x24,0x42,0x25,0x84,0x24,0x03,0x00,0x01,0xac,0xa2,0x00,0x00,0xa0,0xc3,0x00,0x12,
44475 +0x8c,0xe5,0x00,0x00,0x94,0xc3,0x00,0x06,0x90,0xa2,0x00,0x16,0xa4,0xc3,0x00,0x14,
44476 +0x27,0x83,0x90,0x00,0x34,0x42,0x00,0x08,0xa0,0xa2,0x00,0x16,0x8c,0xe8,0x00,0x00,
44477 +0xaf,0xa4,0x00,0x48,0x27,0x82,0x90,0x04,0x95,0x11,0x00,0x14,0x00,0x00,0x00,0x00,
44478 +0x00,0x11,0x98,0xc0,0x02,0x71,0x20,0x21,0x00,0x04,0x20,0x80,0x00,0x82,0x10,0x21,
44479 +0x8c,0x52,0x00,0x18,0x00,0x83,0x18,0x21,0x84,0x75,0x00,0x06,0x8e,0x45,0x00,0x08,
44480 +0x8e,0x46,0x00,0x04,0x8e,0x47,0x00,0x04,0x00,0x05,0x1c,0x82,0x00,0x06,0x31,0x42,
44481 +0x27,0x82,0x90,0x10,0x30,0x63,0x00,0x01,0x30,0xc6,0x00,0x01,0x00,0x82,0x20,0x21,
44482 +0xa5,0x15,0x00,0x1a,0x00,0x05,0x14,0x42,0xaf,0xa3,0x00,0x18,0xaf,0xa6,0x00,0x1c,
44483 +0x30,0xe7,0x00,0x10,0x30,0x56,0x00,0x01,0x80,0x97,0x00,0x06,0x14,0xe0,0x00,0x47,
44484 +0x00,0x05,0xf7,0xc2,0x80,0x82,0x00,0x05,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x44,
44485 +0x02,0x71,0x10,0x21,0x93,0x90,0xbb,0xe9,0x00,0x00,0x00,0x00,0x2e,0x02,0x00,0x0c,
44486 +0x14,0x40,0x00,0x06,0x02,0x00,0x20,0x21,0x00,0x16,0x10,0x40,0x00,0x43,0x10,0x21,
44487 +0x00,0x02,0x11,0x00,0x02,0x02,0x10,0x21,0x24,0x44,0x00,0x04,0x02,0x71,0x10,0x21,
44488 +0x00,0x02,0x10,0x80,0x27,0x83,0x90,0x10,0x00,0x43,0x10,0x21,0x00,0x80,0x80,0x21,
44489 +0xa0,0x44,0x00,0x03,0xa0,0x44,0x00,0x00,0x02,0x00,0x20,0x21,0x02,0xc0,0x28,0x21,
44490 +0x0c,0x00,0x08,0xe3,0x02,0xa0,0x30,0x21,0x02,0x71,0x18,0x21,0x00,0x03,0x88,0x80,
44491 +0x00,0x40,0xa0,0x21,0x27,0x82,0x90,0x20,0x02,0x22,0x10,0x21,0x8c,0x44,0x00,0x00,
44492 +0x26,0xe3,0x00,0x02,0x00,0x03,0x17,0xc2,0x00,0x62,0x18,0x21,0x00,0x04,0x25,0xc2,
44493 +0x00,0x03,0x18,0x43,0x30,0x84,0x00,0x01,0x00,0x03,0x18,0x40,0x03,0xc4,0x20,0x24,
44494 +0x14,0x80,0x00,0x15,0x02,0x43,0x38,0x21,0x3c,0x08,0xb0,0x03,0x35,0x08,0x00,0x28,
44495 +0x8d,0x03,0x00,0x00,0x8f,0xa6,0x00,0x4c,0x8f,0xa4,0x00,0x48,0x27,0x82,0x90,0x08,
44496 +0x02,0x22,0x10,0x21,0x24,0x63,0x00,0x01,0x02,0xa0,0x28,0x21,0xa4,0x54,0x00,0x04,
44497 +0x00,0xc0,0x38,0x21,0x0c,0x00,0x07,0x2f,0xad,0x03,0x00,0x00,0x7b,0xbe,0x02,0x3c,
44498 +0x7b,0xb6,0x01,0xfc,0x7b,0xb4,0x01,0xbc,0x7b,0xb2,0x01,0x7c,0x7b,0xb0,0x01,0x3c,
44499 +0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x48,0x8f,0xa2,0x00,0x1c,0x8f,0xa6,0x00,0x18,
44500 +0x02,0x00,0x20,0x21,0x02,0xc0,0x28,0x21,0xaf,0xa2,0x00,0x10,0x0c,0x00,0x09,0x0a,
44501 +0xaf,0xa0,0x00,0x14,0x08,0x00,0x09,0xc6,0x02,0x82,0xa0,0x21,0x02,0x71,0x10,0x21,
44502 +0x00,0x02,0x10,0x80,0x27,0x83,0x90,0x10,0x00,0x43,0x10,0x21,0x90,0x50,0x00,0x00,
44503 +0x08,0x00,0x09,0xb2,0xa0,0x50,0x00,0x03,0x27,0xbd,0xff,0xb8,0xaf,0xb1,0x00,0x24,
44504 +0x8f,0xb1,0x00,0x5c,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x34,0x63,0x00,0x20,
44505 +0x24,0x42,0x27,0xa8,0xaf,0xbe,0x00,0x40,0xaf,0xb7,0x00,0x3c,0xaf,0xb6,0x00,0x38,
44506 +0xaf,0xb5,0x00,0x34,0xaf,0xb4,0x00,0x30,0xaf,0xa5,0x00,0x4c,0x8f,0xb5,0x00,0x58,
44507 +0xaf,0xbf,0x00,0x44,0xaf,0xb3,0x00,0x2c,0xaf,0xb2,0x00,0x28,0xaf,0xb0,0x00,0x20,
44508 +0x00,0xe0,0xb0,0x21,0xac,0x62,0x00,0x00,0x00,0x80,0xf0,0x21,0x00,0x00,0xb8,0x21,
44509 +0x16,0x20,0x00,0x2b,0x00,0x00,0xa0,0x21,0x27,0x85,0xb4,0x00,0x00,0x07,0x10,0x80,
44510 +0x00,0x45,0x10,0x21,0x8c,0x53,0x00,0x00,0x00,0x15,0x18,0x80,0x00,0x65,0x18,0x21,
44511 +0x92,0x62,0x00,0x16,0x8c,0x72,0x00,0x00,0x30,0x42,0x00,0x03,0x14,0x40,0x00,0x2d,
44512 +0x00,0x00,0x00,0x00,0x92,0x42,0x00,0x16,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x03,
44513 +0x14,0x40,0x00,0x28,0x00,0x00,0x00,0x00,0x8c,0x82,0x00,0x34,0x00,0x00,0x00,0x00,
44514 +0x14,0x40,0x00,0x18,0x02,0x20,0x10,0x21,0x8c,0x82,0x00,0x38,0x00,0x00,0x00,0x00,
44515 +0x14,0x40,0x00,0x14,0x02,0x20,0x10,0x21,0x8c,0x82,0x00,0x3c,0x00,0x00,0x00,0x00,
44516 +0x14,0x40,0x00,0x0f,0x3c,0x03,0xb0,0x09,0x3c,0x05,0xb0,0x05,0x34,0x63,0x01,0x44,
44517 +0x34,0xa5,0x02,0x52,0x94,0x66,0x00,0x00,0x90,0xa2,0x00,0x00,0x8f,0xa3,0x00,0x4c,
44518 +0x00,0x00,0x00,0x00,0x00,0x62,0x10,0x06,0x30,0x42,0x00,0x01,0x10,0x40,0x00,0x04,
44519 +0x30,0xc6,0xff,0xff,0x2c,0xc2,0x00,0x41,0x10,0x40,0x00,0x09,0x24,0x05,0x00,0x14,
44520 +0x02,0x20,0x10,0x21,0x7b,0xbe,0x02,0x3c,0x7b,0xb6,0x01,0xfc,0x7b,0xb4,0x01,0xbc,
44521 +0x7b,0xb2,0x01,0x7c,0x7b,0xb0,0x01,0x3c,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x48,
44522 +0x0c,0x00,0x07,0x0a,0x24,0x06,0x01,0x07,0x24,0x02,0x00,0x01,0x08,0x00,0x0a,0x2c,
44523 +0xa3,0xc2,0x00,0x11,0x10,0xc0,0x00,0x1c,0x24,0x02,0x00,0x01,0x10,0xc2,0x00,0x17,
44524 +0x00,0xc0,0x88,0x21,0x96,0x54,0x00,0x1a,0x02,0xa0,0xb8,0x21,0x12,0x20,0xff,0xed,
44525 +0x02,0x20,0x10,0x21,0x27,0x83,0xb4,0x00,0x00,0x17,0x10,0x80,0x00,0x43,0x10,0x21,
44526 +0x8c,0x44,0x00,0x00,0x3c,0x03,0xb0,0x03,0x34,0x63,0x00,0x28,0x80,0x86,0x00,0x12,
44527 +0x8c,0x62,0x00,0x00,0x00,0x14,0x2c,0x00,0x00,0x05,0x2c,0x03,0x00,0x46,0x10,0x21,
44528 +0x8f,0xa6,0x00,0x4c,0x02,0xe0,0x38,0x21,0x03,0xc0,0x20,0x21,0x0c,0x00,0x07,0x2f,
44529 +0xac,0x62,0x00,0x00,0x08,0x00,0x0a,0x2c,0xaf,0xd1,0x00,0x40,0x96,0x74,0x00,0x1a,
44530 +0x08,0x00,0x0a,0x3f,0x02,0xc0,0xb8,0x21,0x3c,0x02,0xb0,0x03,0x34,0x42,0x01,0x08,
44531 +0x8c,0x50,0x00,0x00,0x02,0x60,0x20,0x21,0x0c,0x00,0x1e,0xf3,0x02,0x00,0x28,0x21,
44532 +0x30,0x42,0x00,0xff,0x02,0x00,0x28,0x21,0x02,0x40,0x20,0x21,0x0c,0x00,0x1e,0xf3,
44533 +0xaf,0xa2,0x00,0x18,0x8f,0xa4,0x00,0x18,0x00,0x00,0x00,0x00,0x10,0x80,0x00,0xed,
44534 +0x30,0x50,0x00,0xff,0x12,0x00,0x00,0x18,0x24,0x11,0x00,0x01,0x96,0x63,0x00,0x14,
44535 +0x96,0x44,0x00,0x14,0x27,0x85,0x90,0x00,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,
44536 +0x00,0x02,0x10,0x80,0x00,0x45,0x10,0x21,0x00,0x04,0x18,0xc0,0x8c,0x46,0x00,0x08,
44537 +0x00,0x64,0x18,0x21,0x00,0x03,0x18,0x80,0x00,0x65,0x18,0x21,0x00,0x06,0x17,0x02,
44538 +0x24,0x04,0x00,0xff,0x8c,0x63,0x00,0x08,0x10,0x44,0x00,0xd6,0x00,0x03,0x17,0x02,
44539 +0x10,0x44,0x00,0xd5,0x3c,0x02,0x80,0x00,0x00,0x66,0x18,0x2b,0x24,0x11,0x00,0x02,
44540 +0x24,0x02,0x00,0x01,0x00,0x43,0x88,0x0a,0x24,0x02,0x00,0x01,0x12,0x22,0x00,0x5a,
44541 +0x24,0x02,0x00,0x02,0x16,0x22,0xff,0xbd,0x00,0x00,0x00,0x00,0x96,0x49,0x00,0x14,
44542 +0x27,0x82,0x90,0x04,0x02,0xa0,0xb8,0x21,0x00,0x09,0x50,0xc0,0x01,0x49,0x18,0x21,
44543 +0x00,0x03,0x40,0x80,0x01,0x02,0x10,0x21,0x8c,0x43,0x00,0x18,0x00,0x00,0x00,0x00,
44544 +0x8c,0x65,0x00,0x08,0x8c,0x62,0x00,0x0c,0x8c,0x62,0x00,0x04,0x00,0x05,0x24,0x42,
44545 +0x00,0x05,0x1c,0x82,0x30,0x42,0x00,0x10,0x30,0x66,0x00,0x01,0x14,0x40,0x00,0x41,
44546 +0x30,0x87,0x00,0x01,0x27,0x82,0x90,0x18,0x01,0x02,0x10,0x21,0x80,0x44,0x00,0x00,
44547 +0x27,0x82,0xb5,0x78,0x00,0x04,0x19,0x00,0x00,0x64,0x18,0x23,0x00,0x03,0x18,0x80,
44548 +0x00,0x64,0x18,0x23,0x00,0x03,0x18,0x80,0x00,0x62,0x10,0x21,0x90,0x45,0x00,0x05,
44549 +0x27,0x84,0xb4,0xa0,0x00,0x64,0x18,0x21,0x90,0x63,0x00,0x00,0x10,0xa0,0x00,0x2b,
44550 +0x2c,0x64,0x00,0x0c,0x14,0x80,0x00,0x04,0x00,0x60,0x10,0x21,0x00,0x06,0x11,0x00,
44551 +0x00,0x62,0x10,0x21,0x24,0x42,0x00,0x24,0x3c,0x01,0xb0,0x03,0xa0,0x22,0x00,0xe1,
44552 +0x14,0x80,0x00,0x06,0x00,0x60,0x28,0x21,0x00,0x07,0x10,0x40,0x00,0x46,0x10,0x21,
44553 +0x00,0x02,0x11,0x00,0x00,0x62,0x10,0x21,0x24,0x45,0x00,0x04,0x01,0x49,0x10,0x21,
44554 +0x27,0x83,0x90,0x10,0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x00,0xa0,0x18,0x21,
44555 +0xa0,0x45,0x00,0x03,0xa0,0x45,0x00,0x00,0x24,0x02,0x00,0x08,0x12,0x02,0x00,0x0b,
44556 +0x24,0x02,0x00,0x01,0x00,0x60,0x28,0x21,0x02,0x40,0x20,0x21,0x0c,0x00,0x1f,0x6f,
44557 +0xaf,0xa2,0x00,0x10,0x30,0x54,0xff,0xff,0x92,0x42,0x00,0x16,0x00,0x00,0x00,0x00,
44558 +0x02,0x02,0x10,0x25,0x08,0x00,0x0a,0x3f,0xa2,0x42,0x00,0x16,0x00,0x60,0x28,0x21,
44559 +0x02,0x40,0x20,0x21,0x0c,0x00,0x1f,0x20,0xaf,0xa0,0x00,0x10,0x08,0x00,0x0a,0xc2,
44560 +0x30,0x54,0xff,0xff,0x08,0x00,0x0a,0xaa,0x00,0x60,0x10,0x21,0x14,0x80,0xff,0xfd,
44561 +0x00,0x00,0x00,0x00,0x00,0x06,0x11,0x00,0x00,0x62,0x10,0x21,0x08,0x00,0x0a,0xaa,
44562 +0x24,0x42,0x00,0x04,0x27,0x82,0x90,0x10,0x01,0x02,0x10,0x21,0x90,0x43,0x00,0x00,
44563 +0x08,0x00,0x0a,0xba,0xa0,0x43,0x00,0x03,0x96,0x69,0x00,0x14,0x02,0xc0,0xb8,0x21,
44564 +0x24,0x0b,0x00,0x01,0x00,0x09,0x10,0xc0,0x00,0x49,0x18,0x21,0x00,0x03,0x40,0x80,
44565 +0x00,0x40,0x50,0x21,0x27,0x82,0x90,0x04,0x01,0x02,0x10,0x21,0x8c,0x43,0x00,0x18,
44566 +0x00,0x00,0x00,0x00,0x8c,0x65,0x00,0x08,0x8c,0x62,0x00,0x0c,0x8c,0x62,0x00,0x04,
44567 +0x00,0x05,0x24,0x42,0x00,0x05,0x1c,0x82,0x30,0x42,0x00,0x10,0x30,0x66,0x00,0x01,
44568 +0x10,0x40,0x00,0x0d,0x30,0x87,0x00,0x01,0x27,0x82,0x90,0x18,0x01,0x02,0x10,0x21,
44569 +0x80,0x43,0x00,0x00,0x00,0x00,0x58,0x21,0x00,0x03,0x11,0x00,0x00,0x43,0x10,0x23,
44570 +0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x23,0x00,0x02,0x10,0x80,0x27,0x83,0xb5,0x70,
44571 +0x00,0x43,0x10,0x21,0xa0,0x40,0x00,0x04,0x11,0x60,0x00,0x4f,0x00,0x00,0x00,0x00,
44572 +0x01,0x49,0x10,0x21,0x00,0x02,0x20,0x80,0x27,0x85,0x90,0x10,0x00,0x85,0x10,0x21,
44573 +0x80,0x43,0x00,0x05,0x00,0x00,0x00,0x00,0x14,0x60,0x00,0x42,0x01,0x49,0x10,0x21,
44574 +0x27,0x82,0x90,0x18,0x00,0x82,0x10,0x21,0x80,0x44,0x00,0x00,0x27,0x82,0xb5,0x78,
44575 +0x00,0x04,0x19,0x00,0x00,0x64,0x18,0x23,0x00,0x03,0x18,0x80,0x00,0x64,0x18,0x23,
44576 +0x00,0x03,0x18,0x80,0x00,0x62,0x10,0x21,0x90,0x45,0x00,0x05,0x27,0x84,0xb4,0xa0,
44577 +0x00,0x64,0x18,0x21,0x90,0x63,0x00,0x00,0x10,0xa0,0x00,0x2c,0x2c,0x64,0x00,0x0c,
44578 +0x14,0x80,0x00,0x04,0x00,0x60,0x10,0x21,0x00,0x06,0x11,0x00,0x00,0x62,0x10,0x21,
44579 +0x24,0x42,0x00,0x24,0x3c,0x01,0xb0,0x03,0xa0,0x22,0x00,0xe1,0x14,0x80,0x00,0x06,
44580 +0x00,0x60,0x28,0x21,0x00,0x07,0x10,0x40,0x00,0x46,0x10,0x21,0x00,0x02,0x11,0x00,
44581 +0x00,0x62,0x10,0x21,0x24,0x45,0x00,0x04,0x01,0x49,0x10,0x21,0x27,0x83,0x90,0x10,
44582 +0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x00,0xa0,0x18,0x21,0xa0,0x45,0x00,0x03,
44583 +0xa0,0x45,0x00,0x00,0x8f,0xa4,0x00,0x18,0x24,0x02,0x00,0x08,0x10,0x82,0x00,0x0c,
44584 +0x00,0x60,0x28,0x21,0x24,0x02,0x00,0x01,0x02,0x60,0x20,0x21,0x0c,0x00,0x1f,0x6f,
44585 +0xaf,0xa2,0x00,0x10,0x8f,0xa3,0x00,0x18,0x30,0x54,0xff,0xff,0x92,0x62,0x00,0x16,
44586 +0x00,0x00,0x00,0x00,0x00,0x62,0x10,0x25,0x08,0x00,0x0a,0x3f,0xa2,0x62,0x00,0x16,
44587 +0x02,0x60,0x20,0x21,0x0c,0x00,0x1f,0x20,0xaf,0xa0,0x00,0x10,0x08,0x00,0x0b,0x31,
44588 +0x00,0x00,0x00,0x00,0x08,0x00,0x0b,0x19,0x00,0x60,0x10,0x21,0x14,0x80,0xff,0xfd,
44589 +0x00,0x00,0x00,0x00,0x00,0x06,0x11,0x00,0x00,0x62,0x10,0x21,0x08,0x00,0x0b,0x19,
44590 +0x24,0x42,0x00,0x04,0x00,0x02,0x10,0x80,0x00,0x45,0x10,0x21,0x90,0x43,0x00,0x00,
44591 +0x08,0x00,0x0b,0x29,0xa0,0x43,0x00,0x03,0x27,0x85,0x90,0x10,0x08,0x00,0x0b,0x45,
44592 +0x01,0x49,0x10,0x21,0x3c,0x02,0x80,0x00,0x00,0x62,0x18,0x26,0x08,0x00,0x0a,0x7a,
44593 +0x00,0xc2,0x30,0x26,0x12,0x00,0xff,0x2d,0x24,0x02,0x00,0x01,0x08,0x00,0x0a,0x7f,
44594 +0x24,0x11,0x00,0x02,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x27,0xbd,0xff,0xd0,
44595 +0x24,0x42,0x2d,0x54,0x34,0x63,0x00,0x20,0x3c,0x05,0xb0,0x05,0xaf,0xb3,0x00,0x24,
44596 +0xaf,0xb2,0x00,0x20,0xaf,0xb1,0x00,0x1c,0xaf,0xbf,0x00,0x28,0xaf,0xb0,0x00,0x18,
44597 +0xac,0x62,0x00,0x00,0x34,0xa5,0x02,0x42,0x90,0xa2,0x00,0x00,0x00,0x80,0x90,0x21,
44598 +0x24,0x11,0x00,0x10,0x30,0x53,0x00,0xff,0x24,0x02,0x00,0x10,0x12,0x22,0x00,0xcf,
44599 +0x00,0x00,0x18,0x21,0x24,0x02,0x00,0x11,0x12,0x22,0x00,0xc1,0x24,0x02,0x00,0x12,
44600 +0x12,0x22,0x00,0xb4,0x00,0x00,0x00,0x00,0x14,0x60,0x00,0xad,0xae,0x43,0x00,0x40,
44601 +0x3c,0x02,0xb0,0x05,0x34,0x42,0x02,0x2c,0x8c,0x44,0x00,0x00,0x3c,0x03,0x00,0x02,
44602 +0x34,0x63,0x00,0xff,0x00,0x83,0x80,0x24,0x00,0x10,0x14,0x43,0x10,0x40,0x00,0x05,
44603 +0x00,0x00,0x00,0x00,0x8e,0x42,0x00,0x34,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x92,
44604 +0x00,0x00,0x00,0x00,0x93,0x83,0x8b,0x71,0x00,0x00,0x00,0x00,0x30,0x62,0x00,0x02,
44605 +0x10,0x40,0x00,0x04,0x32,0x10,0x00,0xff,0x00,0x10,0x11,0xc3,0x14,0x40,0x00,0x86,
44606 +0x00,0x00,0x00,0x00,0x16,0x00,0x00,0x15,0x02,0x00,0x10,0x21,0x26,0x22,0x00,0x01,
44607 +0x30,0x51,0x00,0xff,0x2e,0x23,0x00,0x13,0x14,0x60,0xff,0xdb,0x24,0x03,0x00,0x02,
44608 +0x12,0x63,0x00,0x73,0x24,0x02,0x00,0x05,0x2a,0x62,0x00,0x03,0x10,0x40,0x00,0x58,
44609 +0x24,0x02,0x00,0x04,0x24,0x02,0x00,0x01,0x12,0x62,0x00,0x4b,0x02,0x40,0x20,0x21,
44610 +0x3c,0x02,0xb0,0x05,0x34,0x42,0x02,0x2c,0x8c,0x43,0x00,0x00,0x00,0x00,0x00,0x00,
44611 +0x30,0x70,0x00,0xff,0x12,0x00,0x00,0x06,0x02,0x00,0x10,0x21,0x8f,0xbf,0x00,0x28,
44612 +0x7b,0xb2,0x01,0x3c,0x7b,0xb0,0x00,0xfc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x30,
44613 +0x92,0x46,0x00,0x04,0x8e,0x43,0x00,0x24,0x24,0x02,0x00,0x07,0x02,0x40,0x20,0x21,
44614 +0x00,0x00,0x28,0x21,0x24,0x07,0x00,0x06,0xaf,0xa2,0x00,0x10,0x0c,0x00,0x09,0xea,
44615 +0xaf,0xa3,0x00,0x14,0xae,0x42,0x00,0x24,0x3c,0x02,0xb0,0x05,0x8c,0x42,0x02,0x2c,
44616 +0x00,0x00,0x00,0x00,0x30,0x50,0x00,0xff,0x16,0x00,0xff,0xec,0x02,0x00,0x10,0x21,
44617 +0x92,0x46,0x00,0x05,0x8e,0x43,0x00,0x28,0x24,0x02,0x00,0x05,0x02,0x40,0x20,0x21,
44618 +0x24,0x05,0x00,0x01,0x24,0x07,0x00,0x04,0xaf,0xa2,0x00,0x10,0x0c,0x00,0x09,0xea,
44619 +0xaf,0xa3,0x00,0x14,0xae,0x42,0x00,0x28,0x3c,0x02,0xb0,0x05,0x8c,0x42,0x02,0x2c,
44620 +0x00,0x00,0x00,0x00,0x30,0x50,0x00,0xff,0x16,0x00,0xff,0xdc,0x02,0x00,0x10,0x21,
44621 +0x92,0x46,0x00,0x06,0x8e,0x43,0x00,0x2c,0x24,0x02,0x00,0x03,0x02,0x40,0x20,0x21,
44622 +0x24,0x05,0x00,0x02,0x00,0x00,0x38,0x21,0xaf,0xa2,0x00,0x10,0x0c,0x00,0x09,0xea,
44623 +0xaf,0xa3,0x00,0x14,0xae,0x42,0x00,0x2c,0x3c,0x02,0xb0,0x05,0x8c,0x42,0x02,0x2c,
44624 +0x00,0x00,0x00,0x00,0x30,0x50,0x00,0xff,0x16,0x00,0xff,0xcc,0x02,0x00,0x10,0x21,
44625 +0x92,0x46,0x00,0x07,0x8e,0x43,0x00,0x30,0x24,0x02,0x00,0x02,0x02,0x40,0x20,0x21,
44626 +0x24,0x05,0x00,0x03,0x24,0x07,0x00,0x01,0xaf,0xa2,0x00,0x10,0x0c,0x00,0x09,0xea,
44627 +0xaf,0xa3,0x00,0x14,0xae,0x42,0x00,0x30,0x3c,0x02,0xb0,0x05,0x8c,0x42,0x02,0x2c,
44628 +0x08,0x00,0x0b,0x9b,0x30,0x42,0x00,0xff,0x92,0x46,0x00,0x04,0x8e,0x43,0x00,0x24,
44629 +0x24,0x02,0x00,0x07,0x00,0x00,0x28,0x21,0x24,0x07,0x00,0x06,0xaf,0xa2,0x00,0x10,
44630 +0x0c,0x00,0x09,0xea,0xaf,0xa3,0x00,0x14,0x08,0x00,0x0b,0x94,0xae,0x42,0x00,0x24,
44631 +0x12,0x62,0x00,0x0d,0x24,0x02,0x00,0x03,0x24,0x02,0x00,0x08,0x16,0x62,0xff,0xa8,
44632 +0x02,0x40,0x20,0x21,0x92,0x46,0x00,0x07,0x8e,0x42,0x00,0x30,0x24,0x05,0x00,0x03,
44633 +0x24,0x07,0x00,0x01,0xaf,0xa3,0x00,0x10,0x0c,0x00,0x09,0xea,0xaf,0xa2,0x00,0x14,
44634 +0x08,0x00,0x0b,0x94,0xae,0x42,0x00,0x30,0x92,0x46,0x00,0x06,0x8e,0x43,0x00,0x2c,
44635 +0x02,0x40,0x20,0x21,0x24,0x05,0x00,0x02,0x00,0x00,0x38,0x21,0xaf,0xa2,0x00,0x10,
44636 +0x0c,0x00,0x09,0xea,0xaf,0xa3,0x00,0x14,0x08,0x00,0x0b,0x94,0xae,0x42,0x00,0x2c,
44637 +0x92,0x46,0x00,0x05,0x8e,0x43,0x00,0x28,0x02,0x40,0x20,0x21,0x24,0x05,0x00,0x01,
44638 +0x24,0x07,0x00,0x04,0xaf,0xa2,0x00,0x10,0x0c,0x00,0x09,0xea,0xaf,0xa3,0x00,0x14,
44639 +0x08,0x00,0x0b,0x94,0xae,0x42,0x00,0x28,0x0c,0x00,0x01,0x57,0x24,0x04,0x00,0x01,
44640 +0x08,0x00,0x0b,0x85,0x00,0x00,0x00,0x00,0x8f,0x84,0xb4,0x40,0xae,0x40,0x00,0x34,
44641 +0x94,0x85,0x00,0x14,0x0c,0x00,0x1b,0x66,0x00,0x00,0x00,0x00,0x93,0x83,0x8b,0x71,
44642 +0x00,0x00,0x00,0x00,0x30,0x62,0x00,0x02,0x10,0x40,0xff,0x69,0x00,0x00,0x00,0x00,
44643 +0x0c,0x00,0x01,0x57,0x00,0x00,0x20,0x21,0x08,0x00,0x0b,0x7d,0x00,0x00,0x00,0x00,
44644 +0x02,0x40,0x20,0x21,0x0c,0x00,0x09,0x61,0x02,0x20,0x28,0x21,0x08,0x00,0x0b,0x71,
44645 +0x3c,0x02,0xb0,0x05,0x8e,0x42,0x00,0x3c,0x00,0x00,0x00,0x00,0x14,0x40,0xff,0x4a,
44646 +0x00,0x00,0x00,0x00,0x8f,0x82,0xb4,0x48,0x00,0x00,0x00,0x00,0x90,0x42,0x00,0x0a,
44647 +0x00,0x00,0x00,0x00,0x00,0x02,0x18,0x2b,0x08,0x00,0x0b,0x6e,0xae,0x43,0x00,0x3c,
44648 +0x8e,0x42,0x00,0x38,0x00,0x00,0x00,0x00,0x14,0x40,0xff,0x3d,0x24,0x02,0x00,0x12,
44649 +0x8f,0x82,0xb4,0x44,0x00,0x00,0x00,0x00,0x90,0x42,0x00,0x0a,0x00,0x00,0x00,0x00,
44650 +0x00,0x02,0x18,0x2b,0x08,0x00,0x0b,0x6e,0xae,0x43,0x00,0x38,0x8e,0x42,0x00,0x34,
44651 +0x00,0x00,0x00,0x00,0x14,0x40,0xff,0x30,0x24,0x02,0x00,0x11,0x8f,0x82,0xb4,0x40,
44652 +0x00,0x00,0x00,0x00,0x90,0x42,0x00,0x0a,0x00,0x00,0x00,0x00,0x00,0x02,0x18,0x2b,
44653 +0x08,0x00,0x0b,0x6e,0xae,0x43,0x00,0x34,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,
44654 +0x27,0xbd,0xff,0xe0,0x34,0x63,0x00,0x20,0x24,0x42,0x31,0x08,0x3c,0x08,0xb0,0x03,
44655 +0xaf,0xb1,0x00,0x14,0xac,0x62,0x00,0x00,0x35,0x08,0x01,0x00,0xaf,0xbf,0x00,0x18,
44656 +0xaf,0xb0,0x00,0x10,0x91,0x03,0x00,0x00,0x00,0xa0,0x48,0x21,0x24,0x11,0x00,0x0a,
44657 +0x2c,0xa5,0x00,0x04,0x24,0x02,0x00,0x10,0x00,0x45,0x88,0x0a,0x30,0x63,0x00,0x01,
44658 +0x00,0xc0,0x28,0x21,0x14,0x60,0x00,0x02,0x00,0x11,0x40,0x40,0x02,0x20,0x40,0x21,
44659 +0x84,0x83,0x00,0x0c,0x31,0x11,0x00,0xff,0x01,0x20,0x20,0x21,0x00,0x03,0x10,0xc0,
44660 +0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x83,0x90,0x08,0x00,0x43,0x10,0x21,
44661 +0x84,0x43,0x00,0x04,0x24,0x06,0x00,0x0e,0x10,0xe0,0x00,0x06,0x02,0x23,0x80,0x21,
44662 +0x02,0x00,0x10,0x21,0x8f,0xbf,0x00,0x18,0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,
44663 +0x27,0xbd,0x00,0x20,0x0c,0x00,0x08,0xe3,0x00,0x00,0x00,0x00,0x02,0x11,0x18,0x21,
44664 +0x08,0x00,0x0c,0x64,0x00,0x62,0x80,0x21,0x27,0xbd,0xff,0xd0,0xaf,0xbf,0x00,0x28,
44665 +0xaf,0xb4,0x00,0x20,0xaf,0xb3,0x00,0x1c,0xaf,0xb2,0x00,0x18,0xaf,0xb5,0x00,0x24,
44666 +0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,0x84,0x82,0x00,0x0c,0x3c,0x06,0xb0,0x03,
44667 +0x34,0xc6,0x00,0x20,0x00,0x02,0x18,0xc0,0x00,0x62,0x18,0x21,0x00,0x03,0x18,0x80,
44668 +0x27,0x82,0x90,0x04,0x00,0x62,0x10,0x21,0x8c,0x55,0x00,0x18,0x3c,0x02,0x80,0x00,
44669 +0x24,0x42,0x31,0xb8,0xac,0xc2,0x00,0x00,0x8e,0xb0,0x00,0x08,0x27,0x82,0x90,0x08,
44670 +0x00,0x62,0x18,0x21,0x90,0x71,0x00,0x07,0x00,0x10,0x86,0x43,0x32,0x10,0x00,0x01,
44671 +0x00,0xa0,0x38,0x21,0x02,0x00,0x30,0x21,0x00,0xa0,0x98,0x21,0x02,0x20,0x28,0x21,
44672 +0x0c,0x00,0x0c,0x42,0x00,0x80,0x90,0x21,0x02,0x20,0x20,0x21,0x02,0x00,0x28,0x21,
44673 +0x24,0x06,0x00,0x14,0x0c,0x00,0x08,0xe3,0x00,0x40,0xa0,0x21,0x86,0x43,0x00,0x0c,
44674 +0x3c,0x09,0xb0,0x09,0x3c,0x08,0xb0,0x09,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,
44675 +0x00,0x02,0x10,0x80,0x27,0x83,0x90,0x10,0x00,0x43,0x10,0x21,0x80,0x43,0x00,0x06,
44676 +0x3c,0x07,0xb0,0x09,0x3c,0x05,0xb0,0x09,0x28,0x62,0x00,0x00,0x24,0x64,0x00,0x03,
44677 +0x00,0x82,0x18,0x0b,0x00,0x03,0x18,0x83,0x3c,0x02,0xb0,0x09,0x00,0x03,0x18,0x80,
44678 +0x34,0x42,0x01,0x02,0x35,0x29,0x01,0x10,0x35,0x08,0x01,0x14,0x34,0xe7,0x01,0x20,
44679 +0x34,0xa5,0x01,0x24,0xa4,0x54,0x00,0x00,0x12,0x60,0x00,0x11,0x02,0xa3,0xa8,0x21,
44680 +0x8e,0xa2,0x00,0x0c,0x8e,0xa3,0x00,0x08,0x00,0x02,0x14,0x00,0x00,0x03,0x1c,0x02,
44681 +0x00,0x43,0x10,0x21,0xad,0x22,0x00,0x00,0x8e,0xa3,0x00,0x0c,0x00,0x00,0x00,0x00,
44682 +0x00,0x03,0x1c,0x02,0xa5,0x03,0x00,0x00,0x8f,0xbf,0x00,0x28,0x7b,0xb4,0x01,0x3c,
44683 +0x7b,0xb2,0x00,0xfc,0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x30,
44684 +0x8e,0xa2,0x00,0x04,0x00,0x00,0x00,0x00,0xad,0x22,0x00,0x00,0x8e,0xa4,0x00,0x08,
44685 +0x00,0x00,0x00,0x00,0xa5,0x04,0x00,0x00,0x7a,0xa2,0x00,0x7c,0x00,0x00,0x00,0x00,
44686 +0x00,0x03,0x1c,0x00,0x00,0x02,0x14,0x02,0x00,0x62,0x18,0x21,0xac,0xe3,0x00,0x00,
44687 +0x8e,0xa2,0x00,0x0c,0x00,0x00,0x00,0x00,0x00,0x02,0x14,0x02,0x08,0x00,0x0c,0xb6,
44688 +0xa4,0xa2,0x00,0x00,0x27,0xbd,0xff,0xe0,0xaf,0xb2,0x00,0x18,0xaf,0xb0,0x00,0x10,
44689 +0xaf,0xbf,0x00,0x1c,0xaf,0xb1,0x00,0x14,0x84,0x82,0x00,0x0c,0x00,0x80,0x90,0x21,
44690 +0x3c,0x05,0xb0,0x03,0x00,0x02,0x20,0xc0,0x00,0x82,0x20,0x21,0x00,0x04,0x20,0x80,
44691 +0x27,0x82,0x90,0x04,0x00,0x82,0x10,0x21,0x8c,0x51,0x00,0x18,0x3c,0x02,0x80,0x00,
44692 +0x34,0xa5,0x00,0x20,0x24,0x42,0x33,0x34,0x27,0x83,0x90,0x08,0xac,0xa2,0x00,0x00,
44693 +0x00,0x83,0x20,0x21,0x3c,0x02,0xb0,0x03,0x90,0x86,0x00,0x07,0x34,0x42,0x01,0x00,
44694 +0x8e,0x23,0x00,0x08,0x90,0x44,0x00,0x00,0x2c,0xc5,0x00,0x04,0x24,0x02,0x00,0x10,
44695 +0x24,0x10,0x00,0x0a,0x00,0x45,0x80,0x0a,0x00,0x03,0x1e,0x43,0x30,0x84,0x00,0x01,
44696 +0x30,0x65,0x00,0x01,0x14,0x80,0x00,0x02,0x00,0x10,0x10,0x40,0x02,0x00,0x10,0x21,
44697 +0x00,0xc0,0x20,0x21,0x24,0x06,0x00,0x20,0x0c,0x00,0x08,0xe3,0x30,0x50,0x00,0xff,
44698 +0x86,0x44,0x00,0x0c,0x27,0x85,0x90,0x10,0x3c,0x06,0xb0,0x09,0x00,0x04,0x18,0xc0,
44699 +0x00,0x64,0x18,0x21,0x00,0x03,0x18,0x80,0x00,0x65,0x18,0x21,0x80,0x64,0x00,0x06,
44700 +0x00,0x50,0x10,0x21,0x34,0xc6,0x01,0x02,0x24,0x85,0x00,0x03,0x28,0x83,0x00,0x00,
44701 +0x00,0xa3,0x20,0x0b,0x00,0x04,0x20,0x83,0x00,0x04,0x20,0x80,0xa4,0xc2,0x00,0x00,
44702 +0x02,0x24,0x20,0x21,0x8c,0x83,0x00,0x04,0x3c,0x02,0xb0,0x09,0x34,0x42,0x01,0x10,
44703 +0xac,0x43,0x00,0x00,0x8c,0x86,0x00,0x08,0x3c,0x02,0xb0,0x09,0x34,0x42,0x01,0x14,
44704 +0xa4,0x46,0x00,0x00,0x8c,0x85,0x00,0x0c,0x8c,0x82,0x00,0x08,0x3c,0x06,0xb0,0x09,
44705 +0x00,0x05,0x2c,0x00,0x00,0x02,0x14,0x02,0x00,0xa2,0x28,0x21,0x34,0xc6,0x01,0x20,
44706 +0xac,0xc5,0x00,0x00,0x8c,0x83,0x00,0x0c,0x3c,0x05,0xb0,0x09,0x34,0xa5,0x01,0x24,
44707 +0x00,0x03,0x1c,0x02,0xa4,0xa3,0x00,0x00,0x92,0x42,0x00,0x0a,0x3c,0x03,0xb0,0x09,
44708 +0x34,0x63,0x01,0x30,0x00,0x02,0x13,0x00,0x24,0x42,0x00,0x04,0x30,0x42,0xff,0xff,
44709 +0xa4,0x62,0x00,0x00,0x86,0x44,0x00,0x0c,0x27,0x83,0x90,0x18,0x8f,0xbf,0x00,0x1c,
44710 +0x00,0x04,0x10,0xc0,0x00,0x44,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,
44711 +0x94,0x44,0x00,0x02,0x8f,0xb2,0x00,0x18,0x7b,0xb0,0x00,0xbc,0x3c,0x05,0xb0,0x09,
44712 +0x34,0xa5,0x01,0x32,0xa4,0xa4,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,
44713 +0x27,0xbd,0xff,0xe0,0x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x00,0xaf,0xb0,0x00,0x10,
44714 +0x34,0x42,0x00,0x20,0x00,0xa0,0x80,0x21,0x24,0x63,0x34,0xc0,0x00,0x05,0x2c,0x43,
44715 +0xaf,0xb1,0x00,0x14,0xaf,0xbf,0x00,0x18,0xac,0x43,0x00,0x00,0x10,0xa0,0x00,0x05,
44716 +0x00,0x80,0x88,0x21,0x8c,0x82,0x00,0x34,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0xb6,
44717 +0x00,0x00,0x00,0x00,0x32,0x10,0x00,0xff,0x12,0x00,0x00,0x4c,0x00,0x00,0x10,0x21,
44718 +0x24,0x02,0x00,0x08,0x12,0x02,0x00,0xa3,0x2a,0x02,0x00,0x09,0x10,0x40,0x00,0x89,
44719 +0x24,0x02,0x00,0x40,0x24,0x04,0x00,0x02,0x12,0x04,0x00,0x79,0x2a,0x02,0x00,0x03,
44720 +0x10,0x40,0x00,0x69,0x24,0x02,0x00,0x04,0x24,0x02,0x00,0x01,0x12,0x02,0x00,0x5a,
44721 +0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x05,0x34,0x42,0x00,0x08,0x3c,0x03,0x80,0x00,
44722 +0xa2,0x20,0x00,0x4e,0xac,0x43,0x00,0x00,0x82,0x24,0x00,0x11,0x92,0x27,0x00,0x11,
44723 +0x10,0x80,0x00,0x4e,0x00,0x00,0x00,0x00,0x92,0x26,0x00,0x0a,0x24,0x02,0x00,0x12,
44724 +0x10,0x46,0x00,0x09,0x30,0xc2,0x00,0xff,0x27,0x83,0xb4,0x00,0x00,0x02,0x10,0x80,
44725 +0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x00,0x00,0x00,0x00,0x00,0x94,0x83,0x00,0x14,
44726 +0x00,0x00,0x00,0x00,0xa6,0x23,0x00,0x0c,0x3c,0x02,0xb0,0x09,0x34,0x42,0x00,0x40,
44727 +0x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x63,0x00,0x03,0xa2,0x23,0x00,0x10,
44728 +0x14,0x60,0x00,0x2b,0x30,0x65,0x00,0x01,0x30,0xc2,0x00,0xff,0x27,0x83,0xb4,0x00,
44729 +0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x00,0x82,0x23,0x00,0x12,
44730 +0x90,0x82,0x00,0x16,0x00,0x00,0x00,0x00,0x00,0x02,0x11,0x42,0x30,0x42,0x00,0x01,
44731 +0x00,0x62,0x18,0x21,0x00,0x03,0x26,0x00,0x14,0x80,0x00,0x18,0xa2,0x23,0x00,0x12,
44732 +0x00,0x07,0x16,0x00,0x14,0x40,0x00,0x11,0x24,0x02,0x00,0x01,0x96,0x23,0x00,0x0c,
44733 +0x27,0x84,0x90,0x10,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,
44734 +0x00,0x44,0x10,0x21,0x80,0x45,0x00,0x06,0x00,0x03,0x1a,0x00,0x3c,0x02,0xb0,0x00,
44735 +0x00,0x65,0x18,0x21,0x00,0x62,0x18,0x21,0x90,0x64,0x00,0x00,0x90,0x62,0x00,0x04,
44736 +0xa2,0x20,0x00,0x15,0xa3,0x80,0x8b,0xd4,0x24,0x02,0x00,0x01,0x8f,0xbf,0x00,0x18,
44737 +0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x0c,0x00,0x0c,0xcd,
44738 +0x02,0x20,0x20,0x21,0x92,0x27,0x00,0x11,0x08,0x00,0x0d,0x7d,0x00,0x07,0x16,0x00,
44739 +0x0c,0x00,0x0c,0x6e,0x02,0x20,0x20,0x21,0x86,0x23,0x00,0x0c,0x27,0x84,0x90,0x08,
44740 +0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x44,0x20,0x21,
44741 +0x90,0x85,0x00,0x07,0x27,0x83,0x90,0x10,0x00,0x43,0x10,0x21,0xa2,0x25,0x00,0x13,
44742 +0x90,0x83,0x00,0x07,0x08,0x00,0x0d,0x95,0xa0,0x43,0x00,0x02,0x92,0x26,0x00,0x0a,
44743 +0x08,0x00,0x0d,0x5e,0x30,0xc2,0x00,0xff,0x8e,0x22,0x00,0x24,0x00,0x00,0x00,0x00,
44744 +0x10,0x50,0x00,0x07,0xa2,0x20,0x00,0x08,0x24,0x02,0x00,0x07,0xa2,0x22,0x00,0x0a,
44745 +0x92,0x22,0x00,0x27,0xae,0x20,0x00,0x24,0x08,0x00,0x0d,0x51,0xa2,0x22,0x00,0x04,
44746 +0x08,0x00,0x0d,0xaf,0x24,0x02,0x00,0x06,0x16,0x02,0xff,0x9b,0x3c,0x02,0xb0,0x05,
44747 +0x8e,0x23,0x00,0x2c,0x24,0x02,0x00,0x01,0x10,0x62,0x00,0x07,0xa2,0x24,0x00,0x08,
44748 +0x24,0x02,0x00,0x03,0xa2,0x22,0x00,0x0a,0x92,0x22,0x00,0x2f,0xae,0x20,0x00,0x2c,
44749 +0x08,0x00,0x0d,0x51,0xa2,0x22,0x00,0x06,0x08,0x00,0x0d,0xbe,0xa2,0x20,0x00,0x0a,
44750 +0x8e,0x22,0x00,0x28,0x24,0x03,0x00,0x01,0x24,0x04,0x00,0x01,0x10,0x44,0x00,0x07,
44751 +0xa2,0x23,0x00,0x08,0x24,0x02,0x00,0x05,0xa2,0x22,0x00,0x0a,0x92,0x22,0x00,0x2b,
44752 +0xae,0x20,0x00,0x28,0x08,0x00,0x0d,0x51,0xa2,0x22,0x00,0x05,0x08,0x00,0x0d,0xca,
44753 +0x24,0x02,0x00,0x04,0x12,0x02,0x00,0x12,0x2a,0x02,0x00,0x41,0x10,0x40,0x00,0x09,
44754 +0x24,0x02,0x00,0x80,0x24,0x02,0x00,0x20,0x16,0x02,0xff,0x7b,0x3c,0x02,0xb0,0x05,
44755 +0x24,0x02,0x00,0x12,0xa2,0x22,0x00,0x0a,0xa2,0x22,0x00,0x08,0x08,0x00,0x0d,0x51,
44756 +0xae,0x20,0x00,0x3c,0x16,0x02,0xff,0x74,0x3c,0x02,0xb0,0x05,0x24,0x02,0x00,0x10,
44757 +0xa2,0x22,0x00,0x0a,0xa2,0x22,0x00,0x08,0x08,0x00,0x0d,0x51,0xae,0x20,0x00,0x34,
44758 +0x24,0x02,0x00,0x11,0xa2,0x22,0x00,0x0a,0xa2,0x22,0x00,0x08,0x08,0x00,0x0d,0x51,
44759 +0xae,0x20,0x00,0x38,0x8e,0x24,0x00,0x30,0x24,0x02,0x00,0x03,0x24,0x03,0x00,0x01,
44760 +0x10,0x83,0x00,0x07,0xa2,0x22,0x00,0x08,0x24,0x02,0x00,0x02,0xa2,0x22,0x00,0x0a,
44761 +0x92,0x22,0x00,0x33,0xae,0x20,0x00,0x30,0x08,0x00,0x0d,0x51,0xa2,0x22,0x00,0x07,
44762 +0x08,0x00,0x0d,0xf0,0xa2,0x24,0x00,0x0a,0x8f,0x84,0xb4,0x40,0xae,0x20,0x00,0x34,
44763 +0x94,0x85,0x00,0x14,0x0c,0x00,0x1b,0x66,0x32,0x10,0x00,0xff,0x08,0x00,0x0d,0x42,
44764 +0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x24,0x42,0x37,0xf4,
44765 +0x34,0x63,0x00,0x20,0xac,0x62,0x00,0x00,0x80,0xa2,0x00,0x15,0x3c,0x06,0xb0,0x05,
44766 +0x10,0x40,0x00,0x0a,0x34,0xc6,0x02,0x54,0x83,0x83,0x8b,0xd4,0x00,0x00,0x00,0x00,
44767 +0xac,0x83,0x00,0x24,0x8c,0xc2,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x17,0x42,
44768 +0x30,0x42,0x00,0x01,0x03,0xe0,0x00,0x08,0xac,0x82,0x00,0x28,0x8c,0x82,0x00,0x2c,
44769 +0x3c,0x06,0xb0,0x05,0x34,0xc6,0x04,0x50,0x00,0x02,0x18,0x43,0x30,0x63,0x00,0x01,
44770 +0x10,0x40,0x00,0x04,0x30,0x45,0x00,0x01,0xac,0x83,0x00,0x28,0x03,0xe0,0x00,0x08,
44771 +0xac,0x85,0x00,0x24,0x90,0xc2,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xff,
44772 +0x30,0x43,0x00,0x02,0x30,0x42,0x00,0x01,0xac,0x83,0x00,0x28,0x03,0xe0,0x00,0x08,
44773 +0xac,0x82,0x00,0x24,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x27,0xbd,0xff,0xd8,
44774 +0x34,0x63,0x00,0x20,0x24,0x42,0x38,0x84,0xac,0x62,0x00,0x00,0xaf,0xb1,0x00,0x1c,
44775 +0xaf,0xbf,0x00,0x20,0xaf,0xb0,0x00,0x18,0x90,0xa6,0x00,0x0a,0x27,0x83,0xb4,0x00,
44776 +0x00,0xa0,0x88,0x21,0x00,0x06,0x10,0x80,0x00,0x43,0x10,0x21,0x8c,0x50,0x00,0x00,
44777 +0x80,0xa5,0x00,0x11,0x92,0x03,0x00,0x12,0x10,0xa0,0x00,0x04,0xa2,0x20,0x00,0x15,
44778 +0x24,0x02,0x00,0x12,0x10,0xc2,0x00,0xda,0x00,0x00,0x00,0x00,0x82,0x22,0x00,0x12,
44779 +0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x67,0x00,0x00,0x00,0x00,0xa2,0x20,0x00,0x12,
44780 +0xa2,0x00,0x00,0x19,0x86,0x23,0x00,0x0c,0x00,0x00,0x00,0x00,0x00,0x03,0x10,0xc0,
44781 +0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x83,0x90,0x20,0x00,0x43,0x10,0x21,
44782 +0xa0,0x40,0x00,0x00,0x92,0x03,0x00,0x16,0x00,0x00,0x00,0x00,0x30,0x63,0x00,0xdf,
44783 +0xa2,0x03,0x00,0x16,0x82,0x02,0x00,0x12,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x20,
44784 +0x00,0x00,0x00,0x00,0x92,0x23,0x00,0x08,0x00,0x00,0x00,0x00,0x14,0x60,0x00,0x45,
44785 +0x24,0x02,0x00,0x01,0xa2,0x20,0x00,0x04,0x92,0x08,0x00,0x04,0x00,0x00,0x00,0x00,
44786 +0x15,0x00,0x00,0x1e,0x24,0x02,0x00,0x01,0x92,0x07,0x00,0x0a,0xa2,0x02,0x00,0x17,
44787 +0x92,0x02,0x00,0x16,0x30,0xe3,0x00,0xff,0x30,0x42,0x00,0xe4,0x10,0x60,0x00,0x03,
44788 +0xa2,0x02,0x00,0x16,0x34,0x42,0x00,0x01,0xa2,0x02,0x00,0x16,0x11,0x00,0x00,0x05,
44789 +0x00,0x00,0x00,0x00,0x92,0x02,0x00,0x16,0x00,0x00,0x00,0x00,0x34,0x42,0x00,0x02,
44790 +0xa2,0x02,0x00,0x16,0x92,0x02,0x00,0x17,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x08,
44791 +0x00,0x00,0x00,0x00,0x96,0x02,0x00,0x06,0x00,0x00,0x00,0x00,0xa6,0x02,0x00,0x14,
44792 +0x8f,0xbf,0x00,0x20,0x7b,0xb0,0x00,0xfc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x28,
44793 +0x96,0x02,0x00,0x00,0x08,0x00,0x0e,0x6c,0xa6,0x02,0x00,0x14,0x92,0x07,0x00,0x0a,
44794 +0x00,0x00,0x00,0x00,0x14,0xe0,0x00,0x03,0x00,0x00,0x00,0x00,0x08,0x00,0x0e,0x58,
44795 +0xa2,0x00,0x00,0x17,0x96,0x04,0x00,0x00,0x96,0x05,0x00,0x06,0x27,0x86,0x90,0x00,
44796 +0x00,0x04,0x18,0xc0,0x00,0x64,0x18,0x21,0x00,0x05,0x10,0xc0,0x00,0x45,0x10,0x21,
44797 +0x00,0x03,0x18,0x80,0x00,0x66,0x18,0x21,0x00,0x02,0x10,0x80,0x00,0x46,0x10,0x21,
44798 +0x8c,0x66,0x00,0x08,0x8c,0x45,0x00,0x08,0x3c,0x03,0x80,0x00,0x00,0xc3,0x20,0x24,
44799 +0x10,0x80,0x00,0x08,0x00,0xa3,0x10,0x24,0x10,0x40,0x00,0x04,0x00,0x00,0x18,0x21,
44800 +0x10,0x80,0x00,0x02,0x24,0x03,0x00,0x01,0x00,0xa6,0x18,0x2b,0x08,0x00,0x0e,0x58,
44801 +0xa2,0x03,0x00,0x17,0x10,0x40,0xff,0xfd,0x00,0xa6,0x18,0x2b,0x08,0x00,0x0e,0x8c,
44802 +0x00,0x00,0x00,0x00,0x10,0x62,0x00,0x09,0x24,0x02,0x00,0x02,0x10,0x62,0x00,0x05,
44803 +0x24,0x02,0x00,0x03,0x14,0x62,0xff,0xb8,0x00,0x00,0x00,0x00,0x08,0x00,0x0e,0x52,
44804 +0xa2,0x20,0x00,0x07,0x08,0x00,0x0e,0x52,0xa2,0x20,0x00,0x06,0x08,0x00,0x0e,0x52,
44805 +0xa2,0x20,0x00,0x05,0x82,0x22,0x00,0x10,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x69,
44806 +0x2c,0x62,0x00,0x02,0x10,0x40,0x00,0x49,0x3c,0x02,0xb0,0x09,0x92,0x25,0x00,0x08,
44807 +0x00,0x00,0x00,0x00,0x30,0xa6,0x00,0xff,0x2c,0xc2,0x00,0x04,0x10,0x40,0x00,0x3b,
44808 +0x2c,0xc2,0x00,0x10,0x3c,0x04,0xb0,0x05,0x34,0x84,0x02,0x29,0x90,0x83,0x00,0x00,
44809 +0x24,0x02,0x00,0x01,0x00,0xc2,0x10,0x04,0x00,0x02,0x10,0x27,0x00,0x62,0x18,0x24,
44810 +0xa0,0x83,0x00,0x00,0x86,0x23,0x00,0x0c,0x96,0x26,0x00,0x0c,0x00,0x03,0x10,0xc0,
44811 +0x00,0x43,0x10,0x21,0x00,0x02,0x28,0x80,0x27,0x83,0x90,0x04,0x00,0xa3,0x18,0x21,
44812 +0x8c,0x64,0x00,0x18,0x00,0x00,0x00,0x00,0x8c,0x82,0x00,0x04,0x00,0x00,0x00,0x00,
44813 +0x30,0x42,0x00,0x10,0x10,0x40,0x00,0x18,0x24,0x07,0x00,0x01,0x93,0x82,0x8b,0x71,
44814 +0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x01,0x14,0x40,0x00,0x0a,0x24,0x05,0x00,0x24,
44815 +0x00,0x06,0x2c,0x00,0x00,0x05,0x2c,0x03,0x0c,0x00,0x1b,0x66,0x02,0x00,0x20,0x21,
44816 +0x92,0x02,0x00,0x16,0xa2,0x00,0x00,0x12,0x30,0x42,0x00,0xe7,0x08,0x00,0x0e,0x49,
44817 +0xa2,0x02,0x00,0x16,0xf0,0xc5,0x00,0x06,0x00,0x00,0x28,0x12,0x27,0x82,0x90,0x00,
44818 +0x00,0xa2,0x28,0x21,0x0c,0x00,0x01,0x49,0x3c,0x04,0x00,0x80,0x96,0x26,0x00,0x0c,
44819 +0x08,0x00,0x0e,0xc9,0x00,0x06,0x2c,0x00,0x27,0x83,0x90,0x10,0x27,0x82,0x90,0x18,
44820 +0x00,0xa2,0x10,0x21,0x00,0xa3,0x18,0x21,0x90,0x44,0x00,0x00,0x90,0x65,0x00,0x05,
44821 +0x93,0x82,0x80,0x10,0x00,0x00,0x30,0x21,0x0c,0x00,0x21,0x9a,0xaf,0xa2,0x00,0x10,
44822 +0x96,0x26,0x00,0x0c,0x08,0x00,0x0e,0xc3,0x00,0x00,0x00,0x00,0x14,0x40,0xff,0xcd,
44823 +0x3c,0x04,0xb0,0x05,0x34,0x84,0x02,0x29,0x90,0x83,0x00,0x00,0x30,0xa5,0x00,0x0f,
44824 +0x24,0x02,0x00,0x80,0x08,0x00,0x0e,0xb2,0x00,0xa2,0x10,0x07,0x86,0x26,0x00,0x0c,
44825 +0x3c,0x03,0xb0,0x09,0x34,0x42,0x01,0x72,0x34,0x63,0x01,0x78,0x94,0x47,0x00,0x00,
44826 +0x8c,0x65,0x00,0x00,0x00,0x06,0x10,0xc0,0x00,0x46,0x10,0x21,0x3c,0x04,0xb0,0x09,
44827 +0xae,0x25,0x00,0x1c,0x34,0x84,0x01,0x7c,0x27,0x83,0x90,0x04,0x00,0x02,0x10,0x80,
44828 +0x8c,0x85,0x00,0x00,0x00,0x43,0x10,0x21,0x8c,0x43,0x00,0x18,0xae,0x25,0x00,0x20,
44829 +0xa6,0x27,0x00,0x18,0x8c,0x66,0x00,0x08,0x02,0x20,0x20,0x21,0x0c,0x00,0x0f,0x19,
44830 +0x00,0x00,0x28,0x21,0x86,0x25,0x00,0x18,0x8e,0x26,0x00,0x1c,0x8e,0x27,0x00,0x20,
44831 +0x02,0x20,0x20,0x21,0x0c,0x00,0x1c,0x68,0xaf,0xa2,0x00,0x10,0x08,0x00,0x0e,0x49,
44832 +0xa2,0x02,0x00,0x12,0x92,0x22,0x00,0x08,0x08,0x00,0x0e,0x49,0xa2,0x22,0x00,0x09,
44833 +0xa2,0x20,0x00,0x11,0x80,0x82,0x00,0x50,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x03,
44834 +0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0xd0,0xac,0x40,0x00,0x00,0x08,0x00,0x0e,0x49,
44835 +0xa0,0x80,0x00,0x50,0x94,0x8a,0x00,0x0c,0x24,0x03,0x00,0x24,0x00,0x80,0x70,0x21,
44836 +0x3c,0x02,0x80,0x00,0x3c,0x04,0xb0,0x03,0x24,0x42,0x3c,0x64,0xf1,0x43,0x00,0x06,
44837 +0x34,0x84,0x00,0x20,0x00,0x00,0x18,0x12,0x00,0xa0,0x68,0x21,0xac,0x82,0x00,0x00,
44838 +0x27,0x85,0x90,0x10,0x27,0x82,0x90,0x0f,0x27,0xbd,0xff,0xf8,0x00,0x62,0x60,0x21,
44839 +0x00,0x65,0x58,0x21,0x00,0x00,0xc0,0x21,0x11,0xa0,0x00,0xcc,0x00,0x00,0x78,0x21,
44840 +0x00,0x0a,0x1c,0x00,0x00,0x03,0x1c,0x03,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,
44841 +0x00,0x02,0x10,0x80,0x00,0x45,0x10,0x21,0x91,0x87,0x00,0x00,0x80,0x48,0x00,0x04,
44842 +0x03,0xa0,0x60,0x21,0x00,0x0a,0x1c,0x00,0x00,0x03,0x1c,0x03,0x00,0x03,0x10,0xc0,
44843 +0x00,0x43,0x10,0x21,0x00,0x02,0x48,0x80,0x27,0x83,0x90,0x04,0xa3,0xa7,0x00,0x00,
44844 +0x01,0x23,0x18,0x21,0x8c,0x64,0x00,0x18,0x25,0x02,0xff,0xff,0x00,0x48,0x40,0x0b,
44845 +0x8c,0x83,0x00,0x04,0x2d,0x05,0x00,0x07,0x24,0x02,0x00,0x06,0x30,0x63,0x00,0x08,
44846 +0x14,0x60,0x00,0x35,0x00,0x45,0x40,0x0a,0x93,0xa7,0x00,0x00,0x27,0x82,0x90,0x18,
44847 +0x01,0x22,0x10,0x21,0x30,0xe3,0x00,0xf0,0x38,0x63,0x00,0x50,0x30,0xe5,0x00,0xff,
44848 +0x00,0x05,0x20,0x2b,0x00,0x03,0x18,0x2b,0x00,0x64,0x18,0x24,0x90,0x49,0x00,0x00,
44849 +0x10,0x60,0x00,0x16,0x30,0xe4,0x00,0x0f,0x24,0x02,0x00,0x04,0x10,0xa2,0x00,0x9d,
44850 +0x00,0x00,0x00,0x00,0x11,0xa0,0x00,0x3a,0x2c,0xa2,0x00,0x0c,0x10,0x40,0x00,0x02,
44851 +0x24,0x84,0x00,0x0c,0x00,0xe0,0x20,0x21,0x30,0x84,0x00,0xff,0x00,0x04,0x10,0x40,
44852 +0x27,0x83,0xbb,0x1c,0x00,0x44,0x10,0x21,0x00,0x43,0x10,0x21,0x90,0x47,0x00,0x00,
44853 +0x00,0x00,0x00,0x00,0x2c,0xe3,0x00,0x0c,0xa3,0xa7,0x00,0x00,0x10,0x60,0x00,0x02,
44854 +0x24,0xe2,0x00,0x04,0x00,0xe0,0x10,0x21,0xa3,0xa2,0x00,0x00,0x91,0x65,0x00,0x00,
44855 +0x91,0x82,0x00,0x00,0x30,0xa3,0x00,0xff,0x00,0x62,0x10,0x2b,0x10,0x40,0x00,0x0e,
44856 +0x2c,0x62,0x00,0x0c,0x14,0x40,0x00,0x03,0x00,0x60,0x20,0x21,0x30,0xa2,0x00,0x0f,
44857 +0x24,0x44,0x00,0x0c,0x00,0x04,0x10,0x40,0x00,0x44,0x20,0x21,0x27,0x83,0xbb,0x1c,
44858 +0x00,0x83,0x18,0x21,0x90,0x62,0x00,0x02,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x05,
44859 +0x00,0x09,0x11,0x00,0xa1,0x85,0x00,0x00,0x93,0xa2,0x00,0x00,0x03,0xe0,0x00,0x08,
44860 +0x27,0xbd,0x00,0x08,0x00,0x49,0x10,0x23,0x00,0x02,0x10,0x80,0x00,0x49,0x10,0x23,
44861 +0x00,0x02,0x10,0x80,0x00,0x44,0x10,0x21,0x27,0x83,0xb4,0xa8,0x00,0x43,0x10,0x21,
44862 +0x90,0x44,0x00,0x00,0x00,0x00,0x00,0x00,0x2c,0x83,0x00,0x0c,0x14,0x60,0x00,0x06,
44863 +0x00,0x80,0x10,0x21,0x00,0x18,0x10,0x40,0x00,0x4f,0x10,0x21,0x00,0x02,0x11,0x00,
44864 +0x00,0x82,0x10,0x21,0x24,0x42,0x00,0x04,0x08,0x00,0x0f,0x7a,0xa1,0x82,0x00,0x00,
44865 +0x8f,0x8d,0x81,0x5c,0x00,0x00,0x00,0x00,0x01,0xa8,0x10,0x21,0x90,0x43,0x00,0x00,
44866 +0x00,0x00,0x00,0x00,0x10,0x60,0xff,0xd1,0x00,0x00,0x28,0x21,0x00,0x06,0x74,0x82,
44867 +0x30,0xe2,0x00,0xff,0x2c,0x42,0x00,0x0c,0x14,0x40,0x00,0x03,0x00,0xe0,0x10,0x21,
44868 +0x30,0xe2,0x00,0x0f,0x24,0x42,0x00,0x0c,0x30,0x44,0x00,0xff,0xa3,0xa2,0x00,0x00,
44869 +0x24,0x02,0x00,0x0c,0x10,0x82,0x00,0x0d,0x00,0x09,0x11,0x00,0x00,0x49,0x10,0x23,
44870 +0x00,0x02,0x10,0x80,0x00,0x04,0x18,0x40,0x00,0x49,0x10,0x23,0x00,0x64,0x18,0x21,
44871 +0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x27,0x84,0xb4,0xa8,0x00,0x44,0x10,0x21,
44872 +0x90,0x47,0x00,0x00,0x00,0x00,0x00,0x00,0xa3,0xa7,0x00,0x00,0x00,0x0a,0x1c,0x00,
44873 +0x00,0x03,0x1c,0x03,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,
44874 +0x27,0x83,0x90,0x04,0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x18,0x00,0x00,0x00,0x00,
44875 +0x8c,0x83,0x00,0x04,0x00,0x00,0x00,0x00,0x30,0x63,0x00,0x10,0x14,0x60,0x00,0x33,
44876 +0x00,0x06,0x14,0x42,0x00,0x09,0x11,0x00,0x00,0x49,0x10,0x23,0x00,0x02,0x10,0x80,
44877 +0x00,0x49,0x10,0x23,0x27,0x83,0xb5,0x78,0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,
44878 +0x90,0x44,0x00,0x04,0x90,0x43,0x00,0x05,0x00,0x00,0x00,0x00,0x00,0x64,0xc0,0x24,
44879 +0x93,0xa7,0x00,0x00,0x00,0x00,0x00,0x00,0x2c,0xe2,0x00,0x0f,0x10,0x40,0x00,0x0f,
44880 +0x31,0xcf,0x00,0x01,0x00,0x0a,0x1c,0x00,0x00,0x03,0x1c,0x03,0x00,0x03,0x10,0xc0,
44881 +0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x84,0x90,0x00,0x00,0x44,0x10,0x21,
44882 +0x84,0x43,0x00,0x06,0x00,0x00,0x00,0x00,0x28,0x63,0x06,0x41,0x14,0x60,0x00,0x04,
44883 +0x30,0xe2,0x00,0xff,0x24,0x07,0x00,0x0f,0xa3,0xa7,0x00,0x00,0x30,0xe2,0x00,0xff,
44884 +0x2c,0x42,0x00,0x0c,0x14,0x40,0x00,0x06,0x00,0xe0,0x10,0x21,0x00,0x18,0x10,0x40,
44885 +0x00,0x4f,0x10,0x21,0x00,0x02,0x11,0x00,0x00,0x47,0x10,0x21,0x24,0x42,0x00,0x04,
44886 +0xa3,0xa2,0x00,0x00,0x00,0x40,0x38,0x21,0x01,0xa8,0x10,0x21,0x90,0x43,0x00,0x00,
44887 +0x24,0xa4,0x00,0x01,0x30,0x85,0xff,0xff,0x00,0xa3,0x18,0x2b,0x14,0x60,0xff,0xad,
44888 +0x30,0xe2,0x00,0xff,0x08,0x00,0x0f,0x67,0x00,0x00,0x00,0x00,0x08,0x00,0x0f,0xc8,
44889 +0x30,0x58,0x00,0x01,0x81,0xc2,0x00,0x48,0x00,0x00,0x00,0x00,0x10,0x40,0xff,0x73,
44890 +0x00,0x00,0x00,0x00,0x08,0x00,0x0f,0x55,0x00,0x00,0x00,0x00,0x00,0x0a,0x1c,0x00,
44891 +0x00,0x03,0x1c,0x03,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,
44892 +0x00,0x45,0x10,0x21,0x80,0x48,0x00,0x05,0x91,0x67,0x00,0x00,0x08,0x00,0x0f,0x35,
44893 +0x03,0xa0,0x58,0x21,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x34,0x63,0x00,0x20,
44894 +0x24,0x42,0x40,0x04,0x03,0xe0,0x00,0x08,0xac,0x62,0x00,0x00,0x27,0xbd,0xff,0xc0,
44895 +0xaf,0xb7,0x00,0x34,0xaf,0xb6,0x00,0x30,0xaf,0xb5,0x00,0x2c,0xaf,0xb4,0x00,0x28,
44896 +0xaf,0xb3,0x00,0x24,0xaf,0xb2,0x00,0x20,0xaf,0xbf,0x00,0x3c,0xaf,0xbe,0x00,0x38,
44897 +0xaf,0xb1,0x00,0x1c,0xaf,0xb0,0x00,0x18,0x84,0x82,0x00,0x0c,0x27,0x93,0x90,0x04,
44898 +0x3c,0x05,0xb0,0x03,0x00,0x02,0x18,0xc0,0x00,0x62,0x18,0x21,0x00,0x03,0x18,0x80,
44899 +0x00,0x73,0x10,0x21,0x8c,0x5e,0x00,0x18,0x3c,0x02,0x80,0x00,0x34,0xa5,0x00,0x20,
44900 +0x24,0x42,0x40,0x1c,0xac,0xa2,0x00,0x00,0x8f,0xd0,0x00,0x08,0x27,0x95,0x90,0x10,
44901 +0x00,0x75,0x18,0x21,0x00,0x00,0x28,0x21,0x02,0x00,0x30,0x21,0x90,0x71,0x00,0x00,
44902 +0x0c,0x00,0x0f,0x19,0x00,0x80,0xb0,0x21,0x00,0x40,0x90,0x21,0x00,0x10,0x14,0x42,
44903 +0x30,0x54,0x00,0x01,0x02,0x40,0x20,0x21,0x00,0x10,0x14,0x82,0x02,0x80,0x28,0x21,
44904 +0x12,0x51,0x00,0x23,0x00,0x10,0xbf,0xc2,0x86,0xc3,0x00,0x0c,0x30,0x50,0x00,0x01,
44905 +0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x55,0x10,0x21,
44906 +0xa0,0x52,0x00,0x00,0x86,0xc3,0x00,0x0c,0x00,0x00,0x00,0x00,0x00,0x03,0x10,0xc0,
44907 +0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x53,0x30,0x21,0x8c,0xc7,0x00,0x18,
44908 +0x27,0x83,0x90,0x00,0x00,0x43,0x10,0x21,0x8c,0xe3,0x00,0x04,0x84,0x46,0x00,0x06,
44909 +0x00,0x03,0x19,0x42,0x0c,0x00,0x08,0xe3,0x30,0x73,0x00,0x01,0x00,0x40,0x88,0x21,
44910 +0x02,0x40,0x20,0x21,0x02,0x80,0x28,0x21,0x16,0xe0,0x00,0x10,0x02,0x00,0x30,0x21,
44911 +0x86,0xc2,0x00,0x0c,0x00,0x00,0x00,0x00,0x00,0x02,0x18,0xc0,0x00,0x62,0x18,0x21,
44912 +0x00,0x03,0x18,0x80,0x27,0x82,0x90,0x08,0x00,0x62,0x18,0x21,0xa4,0x71,0x00,0x04,
44913 +0x7b,0xbe,0x01,0xfc,0x7b,0xb6,0x01,0xbc,0x7b,0xb4,0x01,0x7c,0x7b,0xb2,0x01,0x3c,
44914 +0x7b,0xb0,0x00,0xfc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x40,0x86,0xc3,0x00,0x0c,
44915 +0xaf,0xb3,0x00,0x10,0xaf,0xa0,0x00,0x14,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,
44916 +0x00,0x02,0x10,0x80,0x00,0x55,0x10,0x21,0x80,0x47,0x00,0x06,0x00,0x00,0x00,0x00,
44917 +0x24,0xe7,0x00,0x02,0x00,0x07,0x17,0xc2,0x00,0xe2,0x38,0x21,0x00,0x07,0x38,0x43,
44918 +0x00,0x07,0x38,0x40,0x0c,0x00,0x09,0x0a,0x03,0xc7,0x38,0x21,0x08,0x00,0x10,0x48,
44919 +0x02,0x22,0x88,0x21,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x27,0xbd,0xff,0xd0,
44920 +0x34,0x63,0x00,0x20,0x24,0x42,0x41,0xa4,0xaf,0xb2,0x00,0x20,0xac,0x62,0x00,0x00,
44921 +0xaf,0xbf,0x00,0x28,0xaf,0xb3,0x00,0x24,0xaf,0xb1,0x00,0x1c,0xaf,0xb0,0x00,0x18,
44922 +0x3c,0x02,0xb0,0x03,0x90,0x83,0x00,0x0a,0x34,0x42,0x01,0x04,0x94,0x45,0x00,0x00,
44923 +0x00,0x03,0x18,0x80,0x27,0x82,0xb4,0x00,0x00,0x62,0x18,0x21,0x30,0xa6,0xff,0xff,
44924 +0x8c,0x71,0x00,0x00,0x80,0x85,0x00,0x12,0x30,0xc9,0x00,0xff,0x00,0x06,0x32,0x02,
44925 +0xa4,0x86,0x00,0x44,0xa4,0x89,0x00,0x46,0x82,0x22,0x00,0x12,0x00,0x80,0x90,0x21,
44926 +0x10,0xa0,0x00,0x1b,0xa0,0x80,0x00,0x15,0x00,0xc5,0x10,0x2a,0x10,0x40,0x00,0x14,
44927 +0x00,0x00,0x00,0x00,0xa2,0x20,0x00,0x19,0x84,0x83,0x00,0x0c,0x00,0x00,0x00,0x00,
44928 +0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x83,0x90,0x20,
44929 +0x00,0x43,0x10,0x21,0xa0,0x40,0x00,0x00,0xa0,0x80,0x00,0x12,0x92,0x22,0x00,0x16,
44930 +0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xdf,0xa2,0x22,0x00,0x16,0x8f,0xbf,0x00,0x28,
44931 +0x7b,0xb2,0x01,0x3c,0x7b,0xb0,0x00,0xfc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x30,
44932 +0x0c,0x00,0x10,0x01,0x00,0x00,0x00,0x00,0x08,0x00,0x10,0x97,0x00,0x00,0x00,0x00,
44933 +0x28,0x42,0x00,0x02,0x10,0x40,0x01,0x76,0x00,0x00,0x28,0x21,0x94,0x87,0x00,0x0c,
44934 +0x00,0x00,0x00,0x00,0x00,0xe0,0x10,0x21,0x00,0x02,0x14,0x00,0x00,0x02,0x14,0x03,
44935 +0x00,0x07,0x24,0x00,0x00,0x04,0x24,0x03,0x00,0x02,0x18,0xc0,0x00,0x62,0x18,0x21,
44936 +0x00,0x04,0x28,0xc0,0x00,0xa4,0x28,0x21,0x27,0x82,0x90,0x20,0x00,0x03,0x18,0x80,
44937 +0x00,0x62,0x18,0x21,0x00,0x05,0x28,0x80,0x27,0x82,0x90,0x08,0x00,0xa2,0x10,0x21,
44938 +0x8c,0x68,0x00,0x00,0x80,0x44,0x00,0x06,0x27,0x82,0x90,0x10,0x00,0x08,0x1d,0x02,
44939 +0x00,0xa2,0x28,0x21,0x38,0x84,0x00,0x00,0x30,0x63,0x00,0x01,0x01,0x24,0x30,0x0b,
44940 +0x80,0xaa,0x00,0x04,0x80,0xa9,0x00,0x05,0x10,0x60,0x00,0x02,0x00,0x08,0x14,0x02,
44941 +0x30,0x46,0x00,0x0f,0x15,0x20,0x00,0x28,0x01,0x49,0x10,0x21,0x15,0x40,0x00,0x11,
44942 +0x30,0xe3,0xff,0xff,0x92,0x45,0x00,0x08,0x00,0x00,0x00,0x00,0x30,0xa8,0x00,0xff,
44943 +0x2d,0x02,0x00,0x04,0x10,0x40,0x01,0x46,0x2d,0x02,0x00,0x10,0x3c,0x04,0xb0,0x05,
44944 +0x34,0x84,0x02,0x29,0x90,0x83,0x00,0x00,0x24,0x02,0x00,0x01,0x01,0x02,0x10,0x04,
44945 +0x00,0x62,0x18,0x25,0xa0,0x83,0x00,0x00,0x96,0x47,0x00,0x0c,0x00,0x00,0x00,0x00,
44946 +0x30,0xe3,0xff,0xff,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x27,0x84,0x90,0x10,
44947 +0x00,0x02,0x10,0x80,0x00,0x44,0x10,0x21,0x80,0x45,0x00,0x06,0x00,0x03,0x1a,0x00,
44948 +0x3c,0x04,0xb0,0x00,0x00,0x65,0x18,0x21,0x00,0x64,0x20,0x21,0x94,0x82,0x00,0x00,
44949 +0x82,0x43,0x00,0x10,0x00,0x02,0x14,0x00,0x14,0x60,0x00,0x06,0x00,0x02,0x3c,0x03,
44950 +0x30,0xe2,0x00,0x04,0x14,0x40,0x00,0x04,0x01,0x49,0x10,0x21,0x34,0xe2,0x08,0x00,
44951 +0xa4,0x82,0x00,0x00,0x01,0x49,0x10,0x21,0x00,0x02,0x16,0x00,0x00,0x02,0x16,0x03,
44952 +0x00,0x46,0x10,0x2a,0x10,0x40,0x00,0x7c,0x00,0x00,0x00,0x00,0x82,0x42,0x00,0x10,
44953 +0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x0e,0x00,0x00,0x00,0x00,0x86,0x43,0x00,0x0c,
44954 +0x25,0x44,0x00,0x01,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,
44955 +0x27,0x83,0x90,0x10,0x00,0x43,0x10,0x21,0xa0,0x44,0x00,0x04,0x92,0x23,0x00,0x16,
44956 +0x02,0x40,0x20,0x21,0x30,0x63,0x00,0xfb,0x08,0x00,0x10,0x9c,0xa2,0x23,0x00,0x16,
44957 +0x86,0x43,0x00,0x0c,0x25,0x24,0x00,0x01,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,
44958 +0x00,0x02,0x10,0x80,0x27,0x83,0x90,0x10,0x00,0x43,0x10,0x21,0xa0,0x44,0x00,0x05,
44959 +0x86,0x45,0x00,0x0c,0x0c,0x00,0x1e,0xea,0x02,0x20,0x20,0x21,0x10,0x40,0x00,0x5a,
44960 +0x00,0x00,0x00,0x00,0x92,0x45,0x00,0x08,0x00,0x00,0x00,0x00,0x30,0xa6,0x00,0xff,
44961 +0x2c,0xc2,0x00,0x04,0x10,0x40,0x00,0x4c,0x2c,0xc2,0x00,0x10,0x3c,0x04,0xb0,0x05,
44962 +0x34,0x84,0x02,0x29,0x90,0x83,0x00,0x00,0x24,0x02,0x00,0x01,0x00,0xc2,0x10,0x04,
44963 +0x00,0x02,0x10,0x27,0x00,0x62,0x18,0x24,0xa0,0x83,0x00,0x00,0x92,0x45,0x00,0x08,
44964 +0x00,0x00,0x00,0x00,0x30,0xa5,0x00,0xff,0x14,0xa0,0x00,0x33,0x24,0x02,0x00,0x01,
44965 +0xa2,0x40,0x00,0x04,0x92,0x22,0x00,0x04,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x0c,
44966 +0x24,0x02,0x00,0x01,0xa2,0x22,0x00,0x17,0x92,0x22,0x00,0x17,0x00,0x00,0x00,0x00,
44967 +0x10,0x40,0x00,0x04,0x00,0x00,0x00,0x00,0x96,0x22,0x00,0x06,0x08,0x00,0x10,0x97,
44968 +0xa6,0x22,0x00,0x14,0x96,0x22,0x00,0x00,0x08,0x00,0x10,0x97,0xa6,0x22,0x00,0x14,
44969 +0x92,0x22,0x00,0x0a,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x03,0x00,0x00,0x00,0x00,
44970 +0x08,0x00,0x11,0x26,0xa2,0x20,0x00,0x17,0x96,0x24,0x00,0x00,0x96,0x25,0x00,0x06,
44971 +0x27,0x86,0x90,0x00,0x00,0x04,0x18,0xc0,0x00,0x64,0x18,0x21,0x00,0x05,0x10,0xc0,
44972 +0x00,0x45,0x10,0x21,0x00,0x03,0x18,0x80,0x00,0x66,0x18,0x21,0x00,0x02,0x10,0x80,
44973 +0x00,0x46,0x10,0x21,0x8c,0x65,0x00,0x08,0x8c,0x44,0x00,0x08,0x3c,0x03,0x80,0x00,
44974 +0x00,0xa3,0x30,0x24,0x10,0xc0,0x00,0x08,0x00,0x83,0x10,0x24,0x10,0x40,0x00,0x04,
44975 +0x00,0x00,0x18,0x21,0x10,0xc0,0x00,0x02,0x24,0x03,0x00,0x01,0x00,0x85,0x18,0x2b,
44976 +0x08,0x00,0x11,0x26,0xa2,0x23,0x00,0x17,0x10,0x40,0xff,0xfd,0x00,0x85,0x18,0x2b,
44977 +0x08,0x00,0x11,0x49,0x00,0x00,0x00,0x00,0x10,0xa2,0x00,0x09,0x24,0x02,0x00,0x02,
44978 +0x10,0xa2,0x00,0x05,0x24,0x02,0x00,0x03,0x14,0xa2,0xff,0xca,0x00,0x00,0x00,0x00,
44979 +0x08,0x00,0x11,0x21,0xa2,0x40,0x00,0x07,0x08,0x00,0x11,0x21,0xa2,0x40,0x00,0x06,
44980 +0x08,0x00,0x11,0x21,0xa2,0x40,0x00,0x05,0x14,0x40,0xff,0xbe,0x3c,0x04,0xb0,0x05,
44981 +0x34,0x84,0x02,0x29,0x90,0x83,0x00,0x00,0x30,0xa5,0x00,0x0f,0x24,0x02,0x00,0x80,
44982 +0x08,0x00,0x11,0x18,0x00,0xa2,0x10,0x07,0x0c,0x00,0x10,0x07,0x02,0x40,0x20,0x21,
44983 +0x08,0x00,0x10,0x97,0x00,0x00,0x00,0x00,0x92,0x45,0x00,0x08,0x00,0x00,0x00,0x00,
44984 +0x30,0xa6,0x00,0xff,0x2c,0xc2,0x00,0x04,0x10,0x40,0x00,0x99,0x2c,0xc2,0x00,0x10,
44985 +0x3c,0x04,0xb0,0x05,0x34,0x84,0x02,0x29,0x90,0x83,0x00,0x00,0x24,0x02,0x00,0x01,
44986 +0x00,0xc2,0x10,0x04,0x00,0x02,0x10,0x27,0x00,0x62,0x18,0x24,0xa0,0x83,0x00,0x00,
44987 +0x92,0x45,0x00,0x08,0x00,0x00,0x00,0x00,0x30,0xa5,0x00,0xff,0x14,0xa0,0x00,0x80,
44988 +0x24,0x02,0x00,0x01,0xa2,0x40,0x00,0x04,0x86,0x43,0x00,0x0c,0x27,0x93,0x90,0x04,
44989 +0x96,0x47,0x00,0x0c,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x28,0x80,
44990 +0x00,0xb3,0x18,0x21,0x8c,0x64,0x00,0x18,0x00,0x00,0x00,0x00,0x8c,0x82,0x00,0x04,
44991 +0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x10,0x10,0x40,0x00,0x64,0x00,0x00,0x30,0x21,
44992 +0x00,0x07,0x1c,0x00,0x00,0x03,0x1c,0x03,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,
44993 +0x00,0x02,0x10,0x80,0x00,0x53,0x10,0x21,0x8c,0x43,0x00,0x18,0x93,0x82,0x8b,0x71,
44994 +0x8c,0x64,0x00,0x04,0x30,0x42,0x00,0x01,0x00,0x04,0x21,0x42,0x14,0x40,0x00,0x4d,
44995 +0x30,0x90,0x00,0x01,0x00,0x07,0x2c,0x00,0x00,0x05,0x2c,0x03,0x0c,0x00,0x1b,0x66,
44996 +0x02,0x20,0x20,0x21,0x96,0x26,0x00,0x06,0x12,0x00,0x00,0x14,0x30,0xc5,0xff,0xff,
44997 +0x02,0x60,0x90,0x21,0x00,0x05,0x10,0xc0,0x00,0x45,0x10,0x21,0x00,0x02,0x10,0x80,
44998 +0x00,0x52,0x18,0x21,0x92,0x22,0x00,0x0a,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x0b,
44999 +0x02,0x20,0x20,0x21,0x8c,0x63,0x00,0x18,0x00,0x00,0x00,0x00,0x8c,0x62,0x00,0x04,
45000 +0x00,0x00,0x00,0x00,0x00,0x02,0x11,0x42,0x0c,0x00,0x1b,0x66,0x30,0x50,0x00,0x01,
45001 +0x96,0x26,0x00,0x06,0x16,0x00,0xff,0xef,0x30,0xc5,0xff,0xff,0x92,0x22,0x00,0x04,
45002 +0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x0d,0x24,0x02,0x00,0x01,0xa2,0x22,0x00,0x17,
45003 +0x92,0x22,0x00,0x17,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x05,0x00,0x00,0x00,0x00,
45004 +0xa6,0x26,0x00,0x14,0x92,0x22,0x00,0x16,0x08,0x00,0x10,0x96,0x30,0x42,0x00,0xc3,
45005 +0x96,0x22,0x00,0x00,0x08,0x00,0x11,0xbd,0xa6,0x22,0x00,0x14,0x92,0x22,0x00,0x0a,
45006 +0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x03,0x00,0x00,0x00,0x00,0x08,0x00,0x11,0xb8,
45007 +0xa2,0x20,0x00,0x17,0x96,0x24,0x00,0x00,0x30,0xc5,0xff,0xff,0x00,0x05,0x18,0xc0,
45008 +0x00,0x04,0x10,0xc0,0x00,0x44,0x10,0x21,0x00,0x65,0x18,0x21,0x27,0x84,0x90,0x00,
45009 +0x00,0x02,0x10,0x80,0x00,0x44,0x10,0x21,0x00,0x03,0x18,0x80,0x8c,0x45,0x00,0x08,
45010 +0x00,0x64,0x18,0x21,0x8c,0x64,0x00,0x08,0x3c,0x02,0x80,0x00,0x00,0xa2,0x38,0x24,
45011 +0x10,0xe0,0x00,0x08,0x00,0x82,0x10,0x24,0x10,0x40,0x00,0x04,0x00,0x00,0x18,0x21,
45012 +0x10,0xe0,0x00,0x02,0x24,0x03,0x00,0x01,0x00,0x85,0x18,0x2b,0x08,0x00,0x11,0xb8,
45013 +0xa2,0x23,0x00,0x17,0x10,0x40,0xff,0xfd,0x00,0x85,0x18,0x2b,0x08,0x00,0x11,0xdc,
45014 +0x00,0x00,0x00,0x00,0x24,0x05,0x00,0x24,0xf0,0xe5,0x00,0x06,0x00,0x00,0x28,0x12,
45015 +0x27,0x82,0x90,0x00,0x00,0xa2,0x28,0x21,0x0c,0x00,0x01,0x49,0x00,0x00,0x20,0x21,
45016 +0x96,0x47,0x00,0x0c,0x08,0x00,0x11,0x9a,0x00,0x07,0x2c,0x00,0x27,0x83,0x90,0x10,
45017 +0x27,0x82,0x90,0x18,0x00,0xa2,0x10,0x21,0x00,0xa3,0x18,0x21,0x90,0x44,0x00,0x00,
45018 +0x90,0x65,0x00,0x05,0x93,0x82,0x80,0x10,0x24,0x07,0x00,0x01,0x0c,0x00,0x21,0x9a,
45019 +0xaf,0xa2,0x00,0x10,0x96,0x47,0x00,0x0c,0x08,0x00,0x11,0x8d,0x00,0x07,0x1c,0x00,
45020 +0x10,0xa2,0x00,0x09,0x24,0x02,0x00,0x02,0x10,0xa2,0x00,0x05,0x24,0x02,0x00,0x03,
45021 +0x14,0xa2,0xff,0x7d,0x00,0x00,0x00,0x00,0x08,0x00,0x11,0x7e,0xa2,0x40,0x00,0x07,
45022 +0x08,0x00,0x11,0x7e,0xa2,0x40,0x00,0x06,0x08,0x00,0x11,0x7e,0xa2,0x40,0x00,0x05,
45023 +0x14,0x40,0xff,0x71,0x3c,0x04,0xb0,0x05,0x34,0x84,0x02,0x29,0x90,0x83,0x00,0x00,
45024 +0x30,0xa5,0x00,0x0f,0x24,0x02,0x00,0x80,0x08,0x00,0x11,0x75,0x00,0xa2,0x10,0x07,
45025 +0x14,0x40,0xfe,0xc3,0x3c,0x04,0xb0,0x05,0x34,0x84,0x02,0x29,0x90,0x83,0x00,0x00,
45026 +0x30,0xa5,0x00,0x0f,0x24,0x02,0x00,0x80,0x08,0x00,0x10,0xd0,0x00,0xa2,0x10,0x07,
45027 +0x84,0x83,0x00,0x0c,0x00,0x00,0x00,0x00,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,
45028 +0x00,0x02,0x10,0x80,0x27,0x83,0x90,0x04,0x00,0x43,0x10,0x21,0x8c,0x47,0x00,0x18,
45029 +0x00,0x00,0x00,0x00,0x8c,0xe6,0x00,0x08,0x0c,0x00,0x0f,0x19,0x00,0x00,0x00,0x00,
45030 +0x02,0x40,0x20,0x21,0x00,0x00,0x28,0x21,0x00,0x00,0x30,0x21,0x00,0x00,0x38,0x21,
45031 +0x0c,0x00,0x1c,0x68,0xaf,0xa2,0x00,0x10,0x00,0x02,0x1e,0x00,0x14,0x60,0xfe,0x6b,
45032 +0xa2,0x22,0x00,0x12,0x92,0x43,0x00,0x08,0x00,0x00,0x00,0x00,0x14,0x60,0x00,0x40,
45033 +0x24,0x02,0x00,0x01,0xa2,0x40,0x00,0x04,0x92,0x28,0x00,0x04,0x00,0x00,0x00,0x00,
45034 +0x15,0x00,0x00,0x19,0x24,0x02,0x00,0x01,0x92,0x27,0x00,0x0a,0xa2,0x22,0x00,0x17,
45035 +0x92,0x22,0x00,0x17,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x10,0x00,0x00,0x00,0x00,
45036 +0x96,0x22,0x00,0x06,0x00,0x00,0x00,0x00,0xa6,0x22,0x00,0x14,0x92,0x22,0x00,0x16,
45037 +0x30,0xe3,0x00,0xff,0x30,0x42,0x00,0xc0,0x10,0x60,0x00,0x03,0xa2,0x22,0x00,0x16,
45038 +0x34,0x42,0x00,0x01,0xa2,0x22,0x00,0x16,0x11,0x00,0xfe,0x50,0x00,0x00,0x00,0x00,
45039 +0x92,0x22,0x00,0x16,0x08,0x00,0x10,0x96,0x34,0x42,0x00,0x02,0x96,0x22,0x00,0x00,
45040 +0x08,0x00,0x12,0x3f,0xa6,0x22,0x00,0x14,0x92,0x27,0x00,0x0a,0x00,0x00,0x00,0x00,
45041 +0x14,0xe0,0x00,0x03,0x00,0x00,0x00,0x00,0x08,0x00,0x12,0x38,0xa2,0x20,0x00,0x17,
45042 +0x96,0x24,0x00,0x00,0x96,0x25,0x00,0x06,0x27,0x86,0x90,0x00,0x00,0x04,0x18,0xc0,
45043 +0x00,0x64,0x18,0x21,0x00,0x05,0x10,0xc0,0x00,0x45,0x10,0x21,0x00,0x03,0x18,0x80,
45044 +0x00,0x66,0x18,0x21,0x00,0x02,0x10,0x80,0x00,0x46,0x10,0x21,0x8c,0x65,0x00,0x08,
45045 +0x8c,0x44,0x00,0x08,0x3c,0x03,0x80,0x00,0x00,0xa3,0x30,0x24,0x10,0xc0,0x00,0x08,
45046 +0x00,0x83,0x10,0x24,0x10,0x40,0x00,0x04,0x00,0x00,0x18,0x21,0x10,0xc0,0x00,0x02,
45047 +0x24,0x03,0x00,0x01,0x00,0x85,0x18,0x2b,0x08,0x00,0x12,0x38,0xa2,0x23,0x00,0x17,
45048 +0x10,0x40,0xff,0xfd,0x00,0x85,0x18,0x2b,0x08,0x00,0x12,0x67,0x00,0x00,0x00,0x00,
45049 +0x10,0x62,0x00,0x09,0x24,0x02,0x00,0x02,0x10,0x62,0x00,0x05,0x24,0x02,0x00,0x03,
45050 +0x14,0x62,0xff,0xbd,0x00,0x00,0x00,0x00,0x08,0x00,0x12,0x32,0xa2,0x40,0x00,0x07,
45051 +0x08,0x00,0x12,0x32,0xa2,0x40,0x00,0x06,0x08,0x00,0x12,0x32,0xa2,0x40,0x00,0x05,
45052 +0x3c,0x02,0x80,0x00,0x00,0x82,0x30,0x24,0x10,0xc0,0x00,0x08,0x00,0xa2,0x18,0x24,
45053 +0x10,0x60,0x00,0x04,0x00,0x00,0x10,0x21,0x10,0xc0,0x00,0x02,0x24,0x02,0x00,0x01,
45054 +0x00,0xa4,0x10,0x2b,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x10,0x60,0xff,0xfd,
45055 +0x00,0xa4,0x10,0x2b,0x08,0x00,0x12,0x82,0x00,0x00,0x00,0x00,0x30,0x82,0xff,0xff,
45056 +0x00,0x02,0x18,0xc0,0x00,0x62,0x18,0x21,0x27,0x84,0x90,0x10,0x00,0x03,0x18,0x80,
45057 +0x00,0x64,0x18,0x21,0x80,0x66,0x00,0x06,0x00,0x02,0x12,0x00,0x3c,0x03,0xb0,0x00,
45058 +0x00,0x46,0x10,0x21,0x00,0x45,0x10,0x21,0x03,0xe0,0x00,0x08,0x00,0x43,0x10,0x21,
45059 +0x27,0xbd,0xff,0xe0,0x30,0x82,0x00,0x7c,0x30,0x84,0xff,0x00,0xaf,0xbf,0x00,0x1c,
45060 +0xaf,0xb2,0x00,0x18,0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,0x14,0x40,0x00,0x41,
45061 +0x00,0x04,0x22,0x03,0x24,0x02,0x00,0x04,0x3c,0x10,0xb0,0x03,0x8e,0x10,0x00,0x00,
45062 +0x10,0x82,0x00,0x32,0x24,0x02,0x00,0x08,0x10,0x82,0x00,0x03,0x32,0x02,0x00,0x20,
45063 +0x08,0x00,0x12,0xa8,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x17,0x3c,0x02,0xb0,0x06,
45064 +0x34,0x42,0x80,0x24,0x8c,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x67,0x00,0xff,
45065 +0x10,0xe0,0x00,0x23,0x00,0x00,0x88,0x21,0x8f,0x85,0x8f,0xe0,0x00,0x40,0x30,0x21,
45066 +0x94,0xa2,0x00,0x08,0x8c,0xc3,0x00,0x00,0x26,0x31,0x00,0x01,0x24,0x42,0x00,0x02,
45067 +0x30,0x42,0x01,0xff,0x34,0x63,0x01,0x00,0x02,0x27,0x20,0x2a,0xa4,0xa2,0x00,0x08,
45068 +0x14,0x80,0xff,0xf7,0xac,0xc3,0x00,0x00,0x84,0xa3,0x00,0x08,0x3c,0x02,0xb0,0x03,
45069 +0x34,0x42,0x00,0x30,0xac,0x43,0x00,0x00,0x27,0x92,0xb4,0x00,0x24,0x11,0x00,0x12,
45070 +0x8e,0x44,0x00,0x00,0x26,0x31,0xff,0xff,0x90,0x82,0x00,0x10,0x00,0x00,0x00,0x00,
45071 +0x10,0x40,0x00,0x03,0x26,0x52,0x00,0x04,0x0c,0x00,0x18,0xd0,0x00,0x00,0x00,0x00,
45072 +0x06,0x21,0xff,0xf7,0x24,0x02,0xff,0xdf,0x02,0x02,0x80,0x24,0x3c,0x01,0xb0,0x03,
45073 +0x0c,0x00,0x13,0x1c,0xac,0x30,0x00,0x00,0x08,0x00,0x12,0xa8,0x00,0x00,0x00,0x00,
45074 +0x8f,0x85,0x8f,0xe0,0x08,0x00,0x12,0xbe,0x00,0x00,0x00,0x00,0x24,0x02,0xff,0x95,
45075 +0x3c,0x03,0xb0,0x03,0x02,0x02,0x80,0x24,0x34,0x63,0x00,0x30,0x3c,0x01,0xb0,0x03,
45076 +0xac,0x30,0x00,0x00,0x0c,0x00,0x12,0xe5,0xac,0x60,0x00,0x00,0x08,0x00,0x12,0xa8,
45077 +0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x50,0x08,0x00,0x12,0xa8,
45078 +0xac,0x46,0x00,0x00,0x3c,0x0a,0x80,0x00,0x25,0x4a,0x4b,0x94,0x3c,0x0b,0xb0,0x03,
45079 +0xad,0x6a,0x00,0x20,0x3c,0x08,0x80,0x01,0x25,0x08,0x00,0x00,0x3c,0x09,0x80,0x01,
45080 +0x25,0x29,0x03,0x50,0x11,0x09,0x00,0x10,0x00,0x00,0x00,0x00,0x3c,0x0a,0x80,0x00,
45081 +0x25,0x4a,0x4b,0xbc,0x3c,0x0b,0xb0,0x03,0xad,0x6a,0x00,0x20,0x3c,0x08,0xb0,0x06,
45082 +0x35,0x08,0x80,0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x8d,0x09,0x00,0x00,
45083 +0x00,0x00,0x00,0x00,0x31,0x29,0x00,0x01,0x00,0x00,0x00,0x00,0x24,0x01,0x00,0x01,
45084 +0x15,0x21,0xff,0xf2,0x00,0x00,0x00,0x00,0x3c,0x0a,0x80,0x00,0x25,0x4a,0x4b,0xf8,
45085 +0x3c,0x0b,0xb0,0x03,0xad,0x6a,0x00,0x20,0x3c,0x02,0xb0,0x03,0x8c,0x43,0x00,0x00,
45086 +0x00,0x00,0x00,0x00,0x34,0x63,0x00,0x40,0x00,0x00,0x00,0x00,0xac,0x43,0x00,0x00,
45087 +0x00,0x00,0x00,0x00,0x3c,0x0a,0x80,0x00,0x25,0x4a,0x4c,0x24,0x3c,0x0b,0xb0,0x03,
45088 +0xad,0x6a,0x00,0x20,0x3c,0x02,0x80,0x01,0x24,0x42,0x00,0x00,0x3c,0x03,0x80,0x01,
45089 +0x24,0x63,0x03,0x50,0x3c,0x04,0xb0,0x00,0x8c,0x85,0x00,0x00,0x00,0x00,0x00,0x00,
45090 +0xac,0x45,0x00,0x00,0x24,0x42,0x00,0x04,0x24,0x84,0x00,0x04,0x00,0x43,0x08,0x2a,
45091 +0x14,0x20,0xff,0xf9,0x00,0x00,0x00,0x00,0x0c,0x00,0x13,0x1c,0x00,0x00,0x00,0x00,
45092 +0x3c,0x0a,0x80,0x00,0x25,0x4a,0x4c,0x70,0x3c,0x0b,0xb0,0x03,0xad,0x6a,0x00,0x20,
45093 +0x3c,0x02,0x80,0x01,0x24,0x42,0x03,0x50,0x3c,0x03,0x80,0x01,0x24,0x63,0x3f,0x24,
45094 +0xac,0x40,0x00,0x00,0xac,0x40,0x00,0x04,0xac,0x40,0x00,0x08,0xac,0x40,0x00,0x0c,
45095 +0x24,0x42,0x00,0x10,0x00,0x43,0x08,0x2a,0x14,0x20,0xff,0xf9,0x00,0x00,0x00,0x00,
45096 +0x3c,0x0a,0x80,0x00,0x25,0x4a,0x4c,0xb0,0x3c,0x0b,0xb0,0x03,0xad,0x6a,0x00,0x20,
45097 +0x3c,0x1c,0x80,0x01,0x27,0x9c,0x7f,0xf0,0x27,0x9d,0x8b,0xe0,0x00,0x00,0x00,0x00,
45098 +0x27,0x9d,0x8f,0xc8,0x3c,0x0a,0x80,0x00,0x25,0x4a,0x4c,0xd4,0x3c,0x0b,0xb0,0x03,
45099 +0xad,0x6a,0x00,0x20,0x40,0x80,0x68,0x00,0x40,0x08,0x60,0x00,0x00,0x00,0x00,0x00,
45100 +0x35,0x08,0xff,0x01,0x40,0x88,0x60,0x00,0x00,0x00,0x00,0x00,0x0c,0x00,0x15,0x62,
45101 +0x00,0x00,0x00,0x00,0x24,0x84,0xf8,0x00,0x30,0x87,0x00,0x03,0x00,0x04,0x30,0x40,
45102 +0x00,0xc7,0x20,0x23,0x3c,0x02,0xb0,0x0a,0x27,0xbd,0xff,0xe0,0x24,0x03,0xff,0xff,
45103 +0x00,0x82,0x20,0x21,0xaf,0xb1,0x00,0x14,0xac,0x83,0x10,0x00,0xaf,0xbf,0x00,0x18,
45104 +0xaf,0xb0,0x00,0x10,0x00,0xa0,0x88,0x21,0x24,0x03,0x00,0x01,0x8c,0x82,0x10,0x00,
45105 +0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x00,0xc7,0x10,0x23,0x3c,0x03,0xb0,0x0a,
45106 +0x00,0x43,0x10,0x21,0x8c,0x50,0x00,0x00,0x0c,0x00,0x13,0x99,0x02,0x20,0x20,0x21,
45107 +0x02,0x11,0x80,0x24,0x00,0x50,0x80,0x06,0x02,0x00,0x10,0x21,0x8f,0xbf,0x00,0x18,
45108 +0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x27,0xbd,0xff,0xd8,
45109 +0xaf,0xb2,0x00,0x18,0x00,0xa0,0x90,0x21,0x24,0x05,0xff,0xff,0xaf,0xb3,0x00,0x1c,
45110 +0xaf,0xbf,0x00,0x20,0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,0x00,0xc0,0x98,0x21,
45111 +0x12,0x45,0x00,0x23,0x24,0x84,0xf8,0x00,0x30,0x83,0x00,0x03,0x00,0x04,0x10,0x40,
45112 +0x00,0x40,0x88,0x21,0x00,0x60,0x20,0x21,0x00,0x43,0x10,0x23,0x3c,0x03,0xb0,0x0a,
45113 +0x00,0x43,0x10,0x21,0xac,0x45,0x10,0x00,0x00,0x40,0x18,0x21,0x24,0x05,0x00,0x01,
45114 +0x8c,0x62,0x10,0x00,0x00,0x00,0x00,0x00,0x14,0x45,0xff,0xfd,0x3c,0x02,0xb0,0x0a,
45115 +0x02,0x24,0x88,0x23,0x02,0x22,0x88,0x21,0x8e,0x30,0x00,0x00,0x0c,0x00,0x13,0x99,
45116 +0x02,0x40,0x20,0x21,0x00,0x12,0x18,0x27,0x02,0x03,0x80,0x24,0x00,0x53,0x10,0x04,
45117 +0x02,0x02,0x80,0x25,0xae,0x30,0x00,0x00,0x24,0x03,0x00,0x01,0x8e,0x22,0x10,0x00,
45118 +0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x20,
45119 +0x7b,0xb2,0x00,0xfc,0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x28,
45120 +0x30,0x82,0x00,0x03,0x00,0x04,0x18,0x40,0x00,0x62,0x18,0x23,0x3c,0x04,0xb0,0x0a,
45121 +0x00,0x64,0x18,0x21,0xac,0x66,0x00,0x00,0x24,0x04,0x00,0x01,0x8c,0x62,0x10,0x00,
45122 +0x00,0x00,0x00,0x00,0x14,0x44,0xff,0xfd,0x00,0x00,0x00,0x00,0x08,0x00,0x13,0x87,
45123 +0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x21,0x00,0x64,0x10,0x06,0x30,0x42,0x00,0x01,
45124 +0x14,0x40,0x00,0x05,0x00,0x00,0x00,0x00,0x24,0x63,0x00,0x01,0x2c,0x62,0x00,0x20,
45125 +0x14,0x40,0xff,0xf9,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x60,0x10,0x21,
45126 +0x27,0xbd,0xff,0xe0,0x3c,0x03,0xb0,0x05,0xaf,0xb2,0x00,0x18,0xaf,0xb1,0x00,0x14,
45127 +0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x1c,0x00,0x80,0x90,0x21,0x00,0xa0,0x80,0x21,
45128 +0x00,0xc0,0x88,0x21,0x34,0x63,0x02,0x2e,0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
45129 +0x30,0x42,0x00,0x01,0x14,0x40,0xff,0xfc,0x24,0x04,0x08,0x24,0x3c,0x05,0x00,0xc0,
45130 +0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x03,0x24,0x04,0x08,0x34,0x3c,0x05,0x00,0xc0,
45131 +0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x03,0x3c,0x02,0xc0,0x00,0x00,0x10,0x1c,0x00,
45132 +0x34,0x42,0x04,0x00,0x3c,0x04,0xb0,0x05,0x3c,0x05,0xb0,0x05,0x24,0x63,0x16,0x09,
45133 +0x02,0x22,0x10,0x21,0x34,0x84,0x04,0x20,0x34,0xa5,0x04,0x24,0x3c,0x06,0xb0,0x05,
45134 +0xac,0x83,0x00,0x00,0x24,0x07,0x00,0x01,0xac,0xa2,0x00,0x00,0x34,0xc6,0x02,0x28,
45135 +0x24,0x02,0x00,0x20,0xae,0x47,0x00,0x3c,0x24,0x04,0x08,0x24,0xa0,0xc2,0x00,0x00,
45136 +0x3c,0x05,0x00,0xc0,0xa2,0x47,0x00,0x11,0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x01,
45137 +0x24,0x04,0x08,0x34,0x3c,0x05,0x00,0xc0,0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x01,
45138 +0x8f,0xbf,0x00,0x1c,0x8f,0xb2,0x00,0x18,0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,
45139 +0x27,0xbd,0x00,0x20,0x24,0x02,0x00,0x06,0xac,0x82,0x00,0x0c,0xa0,0x80,0x00,0x50,
45140 +0xac,0x80,0x00,0x00,0xac,0x80,0x00,0x04,0xac,0x80,0x00,0x08,0xac,0x80,0x00,0x14,
45141 +0xac,0x80,0x00,0x18,0xac,0x80,0x00,0x1c,0xa4,0x80,0x00,0x20,0xac,0x80,0x00,0x24,
45142 +0xac,0x80,0x00,0x28,0xac,0x80,0x00,0x2c,0xa0,0x80,0x00,0x30,0xa0,0x80,0x00,0x31,
45143 +0xac,0x80,0x00,0x34,0xac,0x80,0x00,0x38,0xa0,0x80,0x00,0x3c,0xac,0x82,0x00,0x10,
45144 +0xa0,0x80,0x00,0x44,0xac,0x80,0x00,0x48,0x03,0xe0,0x00,0x08,0xac,0x80,0x00,0x4c,
45145 +0x3c,0x04,0xb0,0x06,0x34,0x84,0x80,0x00,0x8c,0x83,0x00,0x00,0x3c,0x02,0x12,0x00,
45146 +0x3c,0x05,0xb0,0x03,0x00,0x62,0x18,0x25,0x34,0xa5,0x00,0x8b,0x24,0x02,0xff,0x80,
45147 +0xac,0x83,0x00,0x00,0x03,0xe0,0x00,0x08,0xa0,0xa2,0x00,0x00,0x3c,0x04,0xb0,0x03,
45148 +0x34,0x84,0x00,0x0b,0x24,0x02,0x00,0x22,0x3c,0x05,0xb0,0x01,0x3c,0x06,0x45,0x67,
45149 +0x3c,0x0a,0xb0,0x09,0xa0,0x82,0x00,0x00,0x34,0xa5,0x00,0x04,0x34,0xc6,0x89,0xaa,
45150 +0x35,0x4a,0x00,0x04,0x24,0x02,0x01,0x23,0x3c,0x0b,0xb0,0x09,0x3c,0x07,0x01,0x23,
45151 +0x3c,0x0c,0xb0,0x09,0x3c,0x01,0xb0,0x01,0xac,0x20,0x00,0x00,0x27,0xbd,0xff,0xe0,
45152 +0xac,0xa0,0x00,0x00,0x35,0x6b,0x00,0x08,0x3c,0x01,0xb0,0x09,0xac,0x26,0x00,0x00,
45153 +0x34,0xe7,0x45,0x66,0xa5,0x42,0x00,0x00,0x35,0x8c,0x00,0x0c,0x24,0x02,0xcd,0xef,
45154 +0x3c,0x0d,0xb0,0x09,0x3c,0x08,0xcd,0xef,0x3c,0x0e,0xb0,0x09,0xad,0x67,0x00,0x00,
45155 +0xaf,0xb7,0x00,0x1c,0xa5,0x82,0x00,0x00,0xaf,0xb6,0x00,0x18,0xaf,0xb5,0x00,0x14,
45156 +0xaf,0xb4,0x00,0x10,0xaf,0xb3,0x00,0x0c,0xaf,0xb2,0x00,0x08,0xaf,0xb1,0x00,0x04,
45157 +0xaf,0xb0,0x00,0x00,0x35,0xad,0x00,0x10,0x35,0x08,0x01,0x22,0x35,0xce,0x00,0x14,
45158 +0x24,0x02,0x89,0xab,0x3c,0x0f,0xb0,0x09,0x3c,0x09,0x89,0xab,0x3c,0x10,0xb0,0x09,
45159 +0x3c,0x11,0xb0,0x09,0x3c,0x12,0xb0,0x09,0x3c,0x13,0xb0,0x09,0x3c,0x14,0xb0,0x09,
45160 +0x3c,0x15,0xb0,0x09,0x3c,0x16,0xb0,0x09,0x3c,0x17,0xb0,0x09,0xad,0xa8,0x00,0x00,
45161 +0x24,0x03,0xff,0xff,0xa5,0xc2,0x00,0x00,0x35,0xef,0x00,0x18,0x35,0x29,0xcd,0xee,
45162 +0x36,0x10,0x00,0x1c,0x36,0x31,0x00,0x20,0x36,0x52,0x00,0x24,0x36,0x73,0x00,0x28,
45163 +0x36,0x94,0x00,0x2c,0x36,0xb5,0x00,0x30,0x36,0xd6,0x00,0x34,0x36,0xf7,0x00,0x38,
45164 +0x24,0x02,0x45,0x67,0xad,0xe9,0x00,0x00,0xa6,0x02,0x00,0x00,0xae,0x23,0x00,0x00,
45165 +0x8f,0xb0,0x00,0x00,0xa6,0x43,0x00,0x00,0x8f,0xb1,0x00,0x04,0xae,0x63,0x00,0x00,
45166 +0x8f,0xb2,0x00,0x08,0xa6,0x83,0x00,0x00,0x8f,0xb3,0x00,0x0c,0xae,0xa3,0x00,0x00,
45167 +0x8f,0xb4,0x00,0x10,0xa6,0xc3,0x00,0x00,0x8f,0xb5,0x00,0x14,0xae,0xe3,0x00,0x00,
45168 +0x7b,0xb6,0x00,0xfc,0x3c,0x18,0xb0,0x09,0x37,0x18,0x00,0x3c,0xa7,0x03,0x00,0x00,
45169 +0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,
45170 +0x34,0x63,0x00,0x20,0x24,0x42,0x51,0x48,0xac,0x62,0x00,0x00,0x8c,0x83,0x00,0x34,
45171 +0x34,0x02,0xff,0xff,0x00,0x43,0x10,0x2a,0x14,0x40,0x01,0x04,0x00,0x80,0x28,0x21,
45172 +0x8c,0x86,0x00,0x08,0x24,0x02,0x00,0x03,0x10,0xc2,0x00,0xf7,0x00,0x00,0x00,0x00,
45173 +0x8c,0xa2,0x00,0x2c,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x4f,0x24,0x02,0x00,0x06,
45174 +0x3c,0x03,0xb0,0x05,0x34,0x63,0x04,0x50,0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
45175 +0x30,0x42,0x00,0xff,0x14,0x40,0x00,0xdd,0xac,0xa2,0x00,0x2c,0x24,0x02,0x00,0x01,
45176 +0x10,0xc2,0x00,0xdc,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xc2,0x00,0xca,
45177 +0x00,0x00,0x00,0x00,0x8c,0xa7,0x00,0x04,0x24,0x02,0x00,0x02,0x10,0xe2,0x00,0xc0,
45178 +0x00,0x00,0x00,0x00,0x8c,0xa2,0x00,0x14,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x09,
45179 +0x24,0x02,0x00,0x01,0x3c,0x03,0xb0,0x09,0x34,0x63,0x01,0x60,0x90,0x62,0x00,0x00,
45180 +0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xff,0x10,0x40,0x00,0x05,0xac,0xa2,0x00,0x14,
45181 +0x24,0x02,0x00,0x01,0xac,0xa2,0x00,0x00,0x03,0xe0,0x00,0x08,0xac,0xa0,0x00,0x14,
45182 +0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0xd0,0x8c,0x43,0x00,0x00,0x00,0x00,0x00,0x00,
45183 +0x04,0x61,0x00,0x19,0x3c,0x02,0xb0,0x03,0x3c,0x03,0xb0,0x05,0x34,0x63,0x02,0x2e,
45184 +0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x01,0x14,0x40,0x00,0x12,
45185 +0x3c,0x02,0xb0,0x03,0x3c,0x02,0xb0,0x05,0x34,0x42,0x02,0x42,0x90,0x43,0x00,0x00,
45186 +0x00,0x00,0x00,0x00,0x14,0x60,0x00,0x0c,0x3c,0x02,0xb0,0x03,0x80,0xa2,0x00,0x50,
45187 +0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x08,0x3c,0x02,0xb0,0x03,0x14,0xc0,0x00,0x07,
45188 +0x34,0x42,0x00,0x3f,0x24,0x02,0x00,0x0e,0x24,0x03,0x00,0x01,0xac,0xa2,0x00,0x00,
45189 +0x03,0xe0,0x00,0x08,0xa0,0xa3,0x00,0x50,0x34,0x42,0x00,0x3f,0x90,0x44,0x00,0x00,
45190 +0x24,0x03,0x00,0x01,0x10,0x64,0x00,0x7f,0x3c,0x03,0xb0,0x05,0x80,0xa2,0x00,0x31,
45191 +0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x0a,0x3c,0x02,0xb0,0x06,0x34,0x42,0x80,0x18,
45192 +0x8c,0x43,0x00,0x00,0x3c,0x04,0xf0,0x00,0x3c,0x02,0x80,0x00,0x00,0x64,0x18,0x24,
45193 +0x10,0x62,0x00,0x03,0x24,0x02,0x00,0x09,0x03,0xe0,0x00,0x08,0xac,0xa2,0x00,0x00,
45194 +0x8c,0xa2,0x00,0x40,0x00,0x00,0x00,0x00,0x8c,0x43,0x00,0x00,0x00,0x00,0x00,0x00,
45195 +0x10,0x60,0x00,0x09,0x3c,0x03,0xb0,0x03,0x3c,0x02,0xb0,0x05,0x34,0x42,0x02,0x2c,
45196 +0x8c,0x43,0x00,0x00,0x3c,0x04,0x00,0x02,0x00,0x64,0x18,0x24,0x14,0x60,0xff,0xf2,
45197 +0x24,0x02,0x00,0x10,0x3c,0x03,0xb0,0x03,0x34,0x63,0x02,0x01,0x90,0x62,0x00,0x00,
45198 +0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x80,0x10,0x40,0x00,0x0e,0x00,0x00,0x00,0x00,
45199 +0x8c,0xa3,0x00,0x0c,0x00,0x00,0x00,0x00,0xac,0xa3,0x00,0x10,0x3c,0x02,0xb0,0x03,
45200 +0x90,0x42,0x02,0x01,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x0f,0xac,0xa2,0x00,0x0c,
45201 +0x90,0xa3,0x00,0x0f,0x24,0x02,0x00,0x0d,0x3c,0x01,0xb0,0x03,0x08,0x00,0x14,0xb2,
45202 +0xa0,0x23,0x02,0x01,0x3c,0x02,0xb0,0x09,0x34,0x42,0x01,0x80,0x90,0x44,0x00,0x00,
45203 +0x00,0x00,0x00,0x00,0x00,0x04,0x1e,0x00,0x00,0x03,0x1e,0x03,0x10,0x60,0x00,0x15,
45204 +0xa0,0xa4,0x00,0x44,0x24,0x02,0x00,0x01,0x10,0x62,0x00,0x0b,0x24,0x02,0x00,0x02,
45205 +0x10,0x62,0x00,0x03,0x24,0x03,0x00,0x0d,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
45206 +0x8c,0xa2,0x00,0x0c,0xac,0xa3,0x00,0x00,0x24,0x03,0x00,0x04,0xac,0xa2,0x00,0x10,
45207 +0x03,0xe0,0x00,0x08,0xac,0xa3,0x00,0x0c,0x24,0x02,0x00,0x0d,0xac,0xa2,0x00,0x00,
45208 +0x24,0x03,0x00,0x04,0x24,0x02,0x00,0x06,0xac,0xa3,0x00,0x10,0x03,0xe0,0x00,0x08,
45209 +0xac,0xa2,0x00,0x0c,0x8c,0xa3,0x00,0x38,0x24,0x04,0x00,0x01,0x10,0x64,0x00,0x2d,
45210 +0x24,0x02,0x00,0x02,0x10,0x60,0x00,0x19,0x00,0x00,0x00,0x00,0x10,0x62,0x00,0x10,
45211 +0x24,0x02,0x00,0x04,0x10,0x62,0x00,0x04,0x00,0x00,0x00,0x00,0xac,0xa0,0x00,0x38,
45212 +0x03,0xe0,0x00,0x08,0xac,0xa0,0x00,0x00,0x10,0xe4,0x00,0x07,0x24,0x02,0x00,0x03,
45213 +0x80,0xa2,0x00,0x30,0x00,0x00,0x00,0x00,0x00,0x02,0x18,0x0b,0xac,0xa3,0x00,0x00,
45214 +0x03,0xe0,0x00,0x08,0xac,0xa0,0x00,0x38,0x08,0x00,0x15,0x04,0xac,0xa2,0x00,0x00,
45215 +0x10,0xe4,0x00,0x02,0x24,0x02,0x00,0x03,0x24,0x02,0x00,0x0c,0xac,0xa2,0x00,0x00,
45216 +0x24,0x02,0x00,0x04,0x03,0xe0,0x00,0x08,0xac,0xa2,0x00,0x38,0x10,0xe4,0x00,0x0e,
45217 +0x3c,0x03,0xb0,0x06,0x34,0x63,0x80,0x24,0x8c,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
45218 +0x30,0x42,0x00,0xff,0x10,0x40,0x00,0x06,0xac,0xa2,0x00,0x18,0x24,0x02,0x00,0x02,
45219 +0xac,0xa2,0x00,0x00,0xac,0xa0,0x00,0x18,0x08,0x00,0x15,0x0d,0x24,0x02,0x00,0x01,
45220 +0x08,0x00,0x15,0x1a,0xac,0xa0,0x00,0x00,0x24,0x02,0x00,0x03,0x08,0x00,0x15,0x1a,
45221 +0xac,0xa2,0x00,0x00,0x24,0x03,0x00,0x0b,0xac,0xa2,0x00,0x38,0x03,0xe0,0x00,0x08,
45222 +0xac,0xa3,0x00,0x00,0x34,0x63,0x02,0x2e,0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
45223 +0x30,0x42,0x00,0x01,0x14,0x40,0xff,0x7d,0x3c,0x02,0xb0,0x05,0x34,0x42,0x02,0x42,
45224 +0x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x60,0xff,0x78,0x00,0x00,0x00,0x00,
45225 +0x10,0xc0,0xff,0x81,0x24,0x02,0x00,0x0e,0x08,0x00,0x14,0xa7,0x00,0x00,0x00,0x00,
45226 +0x80,0xa2,0x00,0x30,0x00,0x00,0x00,0x00,0x14,0x40,0xff,0x3e,0x24,0x02,0x00,0x04,
45227 +0x08,0x00,0x14,0xb2,0x00,0x00,0x00,0x00,0x84,0xa2,0x00,0x20,0x00,0x00,0x00,0x00,
45228 +0x10,0x40,0xff,0x75,0x24,0x02,0x00,0x06,0x3c,0x02,0xb0,0x05,0x34,0x42,0x02,0x2e,
45229 +0x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x63,0x00,0x01,0x30,0x63,0x00,0xff,
45230 +0x00,0x60,0x10,0x21,0x14,0x40,0xff,0x2b,0xa4,0xa3,0x00,0x20,0x08,0x00,0x14,0xb2,
45231 +0x24,0x02,0x00,0x06,0x8c,0xa2,0x00,0x1c,0x00,0x00,0x00,0x00,0x14,0x40,0xff,0x66,
45232 +0x24,0x02,0x00,0x05,0x3c,0x03,0xb0,0x05,0x34,0x63,0x02,0x2c,0x8c,0x62,0x00,0x00,
45233 +0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xff,0x10,0x40,0xff,0x1b,0xac,0xa2,0x00,0x1c,
45234 +0x08,0x00,0x14,0xb2,0x24,0x02,0x00,0x05,0x3c,0x02,0xb0,0x05,0x8c,0x42,0x00,0x00,
45235 +0x00,0x00,0x00,0x00,0x00,0x02,0x17,0x42,0x30,0x42,0x00,0x01,0x14,0x40,0xff,0x56,
45236 +0x24,0x02,0x00,0x06,0x08,0x00,0x14,0x60,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x0a,
45237 +0x03,0xe0,0x00,0x08,0xac,0x82,0x00,0x00,0x27,0xbd,0xff,0xd8,0xaf,0xb0,0x00,0x10,
45238 +0x27,0x90,0x86,0x58,0xaf,0xbf,0x00,0x20,0xaf,0xb3,0x00,0x1c,0xaf,0xb2,0x00,0x18,
45239 +0x0c,0x00,0x29,0xd5,0xaf,0xb1,0x00,0x14,0xaf,0x90,0x8f,0xe0,0x48,0x02,0x00,0x00,
45240 +0x0c,0x00,0x13,0xf0,0x00,0x00,0x00,0x00,0x0c,0x00,0x18,0x1f,0x02,0x00,0x20,0x21,
45241 +0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x3a,0x94,0x43,0x00,0x00,0x00,0x00,0x00,0x00,
45242 +0xa3,0x83,0x8f,0xe4,0x0c,0x00,0x00,0x34,0x00,0x00,0x00,0x00,0x0c,0x00,0x13,0xfb,
45243 +0x00,0x00,0x00,0x00,0x27,0x84,0x84,0x98,0x0c,0x00,0x27,0x59,0x00,0x00,0x00,0x00,
45244 +0x93,0x84,0x80,0x10,0x0c,0x00,0x21,0x3f,0x00,0x00,0x00,0x00,0x27,0x84,0x89,0x18,
45245 +0x0c,0x00,0x06,0xe5,0x00,0x00,0x00,0x00,0x0c,0x00,0x01,0x39,0x00,0x00,0x00,0x00,
45246 +0x27,0x84,0x84,0x40,0x0c,0x00,0x13,0xd9,0x00,0x00,0x00,0x00,0x27,0x82,0x89,0x4c,
45247 +0xaf,0x82,0x84,0x80,0x0c,0x00,0x00,0x5f,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,
45248 +0x34,0x63,0x01,0x08,0x3c,0x04,0xb0,0x09,0x3c,0x05,0xb0,0x09,0x8c,0x66,0x00,0x00,
45249 +0x34,0x84,0x01,0x68,0x34,0xa5,0x01,0x40,0x24,0x02,0xc8,0x80,0x24,0x03,0x00,0x0a,
45250 +0xa4,0x82,0x00,0x00,0xa4,0xa3,0x00,0x00,0x3c,0x04,0xb0,0x03,0x8c,0x82,0x00,0x00,
45251 +0x8f,0x85,0x84,0x40,0xaf,0x86,0x84,0x38,0x34,0x42,0x00,0x20,0xac,0x82,0x00,0x00,
45252 +0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x58,0x8c,0x43,0x00,0x00,0x2c,0xa4,0x00,0x11,
45253 +0x34,0x63,0x01,0x00,0xac,0x43,0x00,0x00,0x10,0x80,0xff,0xfa,0x3c,0x02,0xb0,0x03,
45254 +0x3c,0x03,0x80,0x01,0x00,0x05,0x10,0x80,0x24,0x63,0x02,0x00,0x00,0x43,0x10,0x21,
45255 +0x8c,0x44,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x00,0x08,0x00,0x00,0x00,0x00,
45256 +0x27,0x84,0x84,0x98,0x0c,0x00,0x26,0x8e,0x00,0x00,0x00,0x00,0x27,0x84,0x84,0x40,
45257 +0x0c,0x00,0x14,0x52,0x00,0x00,0x00,0x00,0x93,0x83,0x81,0xf1,0x24,0x02,0x00,0x01,
45258 +0x10,0x62,0x00,0x08,0x00,0x00,0x00,0x00,0x8f,0x85,0x84,0x40,0x8f,0x82,0x84,0x74,
45259 +0x00,0x00,0x00,0x00,0x24,0x42,0x00,0x01,0xaf,0x82,0x84,0x74,0x08,0x00,0x15,0x9d,
45260 +0x3c,0x02,0xb0,0x03,0x27,0x84,0x84,0x98,0x0c,0x00,0x27,0x0d,0x00,0x00,0x00,0x00,
45261 +0x08,0x00,0x15,0xb6,0x00,0x00,0x00,0x00,0x27,0x84,0x84,0x98,0x0c,0x00,0x28,0xdd,
45262 +0x00,0x00,0x00,0x00,0xa3,0x82,0x84,0x71,0x8f,0x82,0x84,0x74,0xaf,0x80,0x84,0x40,
45263 +0x24,0x42,0x00,0x01,0xaf,0x82,0x84,0x74,0x08,0x00,0x15,0x9c,0x00,0x00,0x28,0x21,
45264 +0x27,0x84,0x86,0x58,0x0c,0x00,0x19,0x5b,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xff,
45265 +0x14,0x40,0x00,0x05,0x3c,0x03,0xb0,0x05,0xaf,0x80,0x84,0x40,0xaf,0x80,0x84,0x44,
45266 +0x08,0x00,0x15,0xb6,0x00,0x00,0x00,0x00,0x34,0x63,0x04,0x50,0x90,0x62,0x00,0x00,
45267 +0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xff,0xaf,0x82,0x84,0x6c,0x14,0x40,0x00,0x20,
45268 +0x24,0x02,0x00,0x01,0x8f,0x84,0x84,0x48,0x00,0x00,0x00,0x00,0x10,0x82,0x00,0x20,
45269 +0x3c,0x03,0xb0,0x09,0x34,0x63,0x01,0x60,0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
45270 +0x30,0x42,0x00,0xff,0xaf,0x82,0x84,0x54,0x14,0x40,0x00,0x15,0x24,0x02,0x00,0x01,
45271 +0x24,0x02,0x00,0x02,0x10,0x82,0x00,0x07,0x00,0x00,0x00,0x00,0x24,0x05,0x00,0x03,
45272 +0x24,0x02,0x00,0x01,0xaf,0x82,0x84,0x44,0xaf,0x85,0x84,0x40,0x08,0x00,0x15,0xb6,
45273 +0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x05,0x34,0x42,0x02,0x2e,0x90,0x43,0x00,0x00,
45274 +0x00,0x00,0x00,0x00,0x30,0x63,0x00,0x01,0x30,0x63,0x00,0xff,0x00,0x60,0x10,0x21,
45275 +0xa7,0x83,0x84,0x60,0x14,0x40,0xff,0xf1,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
45276 +0xaf,0x82,0x84,0x44,0xaf,0x80,0x84,0x40,0x08,0x00,0x15,0xb6,0x00,0x00,0x00,0x00,
45277 +0x3c,0x03,0xb0,0x05,0x34,0x63,0x02,0x2c,0x8c,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
45278 +0x30,0x42,0x00,0xff,0xaf,0x82,0x84,0x5c,0x14,0x40,0xff,0xf5,0x24,0x02,0x00,0x01,
45279 +0x08,0x00,0x15,0xe1,0x3c,0x03,0xb0,0x09,0x27,0x84,0x86,0x58,0x0c,0x00,0x1a,0xd1,
45280 +0x00,0x00,0x00,0x00,0x83,0x82,0x84,0x70,0x00,0x00,0x00,0x00,0x14,0x40,0xff,0xec,
45281 +0x24,0x02,0x00,0x02,0x3c,0x03,0xb0,0x05,0x34,0x63,0x04,0x50,0x90,0x62,0x00,0x00,
45282 +0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xff,0xaf,0x82,0x84,0x6c,0x14,0x40,0xff,0xe4,
45283 +0x24,0x02,0x00,0x02,0x8f,0x84,0x84,0x48,0x24,0x02,0x00,0x01,0x10,0x82,0x00,0x12,
45284 +0x24,0x02,0x00,0x02,0x10,0x82,0x00,0x04,0x00,0x00,0x00,0x00,0x24,0x05,0x00,0x04,
45285 +0x08,0x00,0x15,0xed,0x24,0x02,0x00,0x02,0x3c,0x02,0xb0,0x05,0x34,0x42,0x02,0x2e,
45286 +0x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x63,0x00,0x01,0x30,0x63,0x00,0xff,
45287 +0x00,0x60,0x10,0x21,0xa7,0x83,0x84,0x60,0x14,0x40,0xff,0xf4,0x00,0x00,0x00,0x00,
45288 +0x08,0x00,0x15,0xfc,0x24,0x02,0x00,0x02,0x3c,0x03,0xb0,0x05,0x34,0x63,0x02,0x2c,
45289 +0x8c,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xff,0xaf,0x82,0x84,0x5c,
45290 +0x14,0x40,0xff,0xf7,0x00,0x00,0x00,0x00,0x08,0x00,0x16,0x1d,0x24,0x02,0x00,0x02,
45291 +0x27,0x84,0x89,0x18,0x0c,0x00,0x0b,0x55,0x00,0x00,0x00,0x00,0x8f,0x83,0x84,0x44,
45292 +0xaf,0x82,0x84,0x5c,0x38,0x64,0x00,0x02,0x00,0x04,0x18,0x0a,0xaf,0x83,0x84,0x44,
45293 +0x14,0x40,0xff,0xad,0x24,0x05,0x00,0x05,0x8f,0x82,0x89,0x58,0xaf,0x80,0x84,0x40,
45294 +0x10,0x40,0x00,0x02,0x24,0x04,0x00,0x01,0xaf,0x84,0x84,0x48,0x93,0x82,0x89,0x66,
45295 +0x00,0x00,0x00,0x00,0x10,0x40,0xff,0x6c,0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x05,
45296 +0x34,0x42,0x00,0x08,0x8c,0x43,0x00,0x00,0x3c,0x04,0x20,0x00,0x00,0x64,0x18,0x24,
45297 +0x10,0x60,0xff,0x65,0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0xa0,
45298 +0x8c,0x43,0x00,0x00,0x3c,0x04,0x80,0x00,0xaf,0x80,0x89,0x40,0x24,0x63,0x00,0x01,
45299 +0xac,0x43,0x00,0x00,0x3c,0x01,0xb0,0x05,0xac,0x24,0x00,0x08,0xaf,0x80,0x89,0x3c,
45300 +0xaf,0x80,0x89,0x44,0xaf,0x80,0x89,0x48,0xaf,0x80,0x89,0x54,0xaf,0x80,0x89,0x4c,
45301 +0x08,0x00,0x15,0xb6,0x00,0x00,0x00,0x00,0x83,0x82,0x84,0x90,0x00,0x00,0x00,0x00,
45302 +0x10,0x40,0x00,0x02,0x24,0x02,0x00,0x20,0xaf,0x82,0x84,0x5c,0x8f,0x85,0x84,0x5c,
45303 +0x27,0x84,0x89,0x18,0x0c,0x00,0x0d,0x30,0x00,0x00,0x00,0x00,0x00,0x02,0x1e,0x00,
45304 +0xa3,0x82,0x84,0x70,0xaf,0x80,0x84,0x5c,0x10,0x60,0xff,0x8e,0x00,0x00,0x00,0x00,
45305 +0x3c,0x02,0xb0,0x05,0x34,0x42,0x02,0x2e,0x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,
45306 +0x30,0x63,0x00,0x01,0x30,0x63,0x00,0xff,0x00,0x60,0x10,0x21,0xa7,0x83,0x84,0x60,
45307 +0x10,0x40,0x00,0x04,0x24,0x04,0x00,0x02,0xaf,0x84,0x84,0x48,0x08,0x00,0x15,0xfd,
45308 +0x00,0x00,0x00,0x00,0x08,0x00,0x15,0xee,0x24,0x05,0x00,0x06,0x27,0x84,0x84,0x40,
45309 +0x27,0x85,0x89,0x18,0x0c,0x00,0x0d,0xfd,0x00,0x00,0x00,0x00,0x8f,0x82,0x84,0x64,
45310 +0xaf,0x80,0x84,0x6c,0x14,0x40,0x00,0x19,0x00,0x40,0x18,0x21,0x8f,0x82,0x84,0x68,
45311 +0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x15,0x24,0x02,0x00,0x02,0x8f,0x83,0x84,0x48,
45312 +0x00,0x00,0x00,0x00,0x10,0x62,0x00,0x0b,0x3c,0x02,0x40,0x00,0x8f,0x83,0x84,0x44,
45313 +0x24,0x02,0x00,0x01,0x10,0x62,0x00,0x02,0x24,0x05,0x00,0x03,0x24,0x05,0x00,0x06,
45314 +0xaf,0x85,0x84,0x40,0x24,0x04,0x00,0x03,0xaf,0x84,0x84,0x48,0x08,0x00,0x15,0xb6,
45315 +0x00,0x00,0x00,0x00,0x34,0x42,0x00,0x14,0x3c,0x01,0xb0,0x05,0xac,0x22,0x00,0x00,
45316 +0xaf,0x80,0x84,0x40,0x08,0x00,0x16,0x96,0x24,0x04,0x00,0x03,0x10,0x60,0x00,0x10,
45317 +0x00,0x00,0x00,0x00,0x27,0x85,0x89,0x18,0x27,0x84,0x84,0x40,0x0c,0x00,0x0e,0x21,
45318 +0x00,0x00,0x00,0x00,0x8f,0x83,0x84,0x44,0x24,0x02,0x00,0x01,0xa3,0x80,0x84,0x70,
45319 +0xaf,0x80,0x84,0x48,0x10,0x62,0x00,0x02,0x24,0x05,0x00,0x03,0x24,0x05,0x00,0x04,
45320 +0xaf,0x85,0x84,0x40,0xaf,0x80,0x84,0x64,0x08,0x00,0x15,0xb6,0x00,0x00,0x00,0x00,
45321 +0x83,0x82,0x84,0x90,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x04,0x00,0x00,0x00,0x00,
45322 +0x27,0x84,0x89,0x18,0x0c,0x00,0x10,0x69,0x00,0x00,0x00,0x00,0x8f,0x82,0x84,0x44,
45323 +0xa3,0x80,0x84,0x70,0xaf,0x80,0x84,0x40,0xaf,0x80,0x84,0x48,0x14,0x40,0x00,0x03,
45324 +0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0xaf,0x82,0x84,0x44,0xaf,0x80,0x84,0x68,
45325 +0x08,0x00,0x15,0xb6,0x00,0x00,0x00,0x00,0x27,0x84,0x84,0x40,0x27,0x85,0x89,0x18,
45326 +0x0c,0x00,0x0e,0x21,0x00,0x00,0x00,0x00,0x8f,0x82,0x84,0x44,0xa3,0x80,0x84,0x70,
45327 +0xaf,0x80,0x84,0x40,0xaf,0x80,0x84,0x48,0x14,0x40,0xfe,0xeb,0x00,0x00,0x00,0x00,
45328 +0x24,0x02,0x00,0x02,0xaf,0x82,0x84,0x44,0x08,0x00,0x15,0xb6,0x00,0x00,0x00,0x00,
45329 +0x27,0x84,0x89,0x18,0x0c,0x00,0x10,0x69,0x00,0x00,0x00,0x00,0x08,0x00,0x16,0xc6,
45330 +0x00,0x00,0x00,0x00,0x27,0x84,0x84,0x98,0x0c,0x00,0x29,0x73,0x00,0x00,0x00,0x00,
45331 +0x08,0x00,0x15,0xc5,0x00,0x00,0x00,0x00,0x0c,0x00,0x24,0x05,0x00,0x00,0x00,0x00,
45332 +0x0c,0x00,0x26,0xff,0x00,0x00,0x00,0x00,0x0c,0x00,0x18,0x11,0x00,0x00,0x00,0x00,
45333 +0x93,0x83,0xbc,0x18,0x00,0x00,0x00,0x00,0x14,0x60,0x00,0x2b,0x3c,0x02,0xb0,0x03,
45334 +0x34,0x42,0x01,0x08,0x8c,0x44,0x00,0x00,0x8f,0x83,0xbc,0x10,0x8f,0x82,0xbc,0x14,
45335 +0x00,0x83,0x18,0x23,0x00,0x43,0x10,0x2b,0x10,0x40,0x00,0x23,0x3c,0x02,0xb0,0x03,
45336 +0x24,0x04,0x05,0xa0,0x34,0x42,0x01,0x18,0x8c,0x42,0x00,0x00,0x0c,0x00,0x06,0xd1,
45337 +0x00,0x00,0x00,0x00,0x24,0x04,0x05,0xa4,0x0c,0x00,0x06,0xd1,0x00,0x02,0x84,0x02,
45338 +0x30,0x51,0xff,0xff,0x24,0x04,0x05,0xa8,0x00,0x02,0x94,0x02,0x0c,0x00,0x06,0xd1,
45339 +0x3a,0x10,0xff,0xff,0x3a,0x31,0xff,0xff,0x30,0x42,0xff,0xff,0x2e,0x10,0x00,0x01,
45340 +0x2e,0x31,0x00,0x01,0x3a,0x52,0xff,0xff,0x02,0x11,0x80,0x25,0x2e,0x52,0x00,0x01,
45341 +0x38,0x42,0xff,0xff,0x02,0x12,0x80,0x25,0x2c,0x42,0x00,0x01,0x02,0x02,0x80,0x25,
45342 +0x16,0x00,0x00,0x02,0x24,0x04,0x00,0x02,0x00,0x00,0x20,0x21,0x0c,0x00,0x05,0x6e,
45343 +0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,0x34,0x42,0x01,0x08,0x8c,0x43,0x00,0x00,
45344 +0x00,0x00,0x00,0x00,0xaf,0x83,0xbc,0x10,0x0c,0x00,0x01,0xe9,0x00,0x00,0x00,0x00,
45345 +0xaf,0x80,0x84,0x40,0xaf,0x80,0x84,0x74,0x08,0x00,0x15,0x9c,0x00,0x00,0x28,0x21,
45346 +0x27,0x90,0xb4,0x00,0x24,0x11,0x00,0x12,0x8e,0x04,0x00,0x00,0x00,0x00,0x00,0x00,
45347 +0x90,0x82,0x00,0x10,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x03,0x00,0x00,0x00,0x00,
45348 +0x0c,0x00,0x18,0xd0,0x00,0x00,0x00,0x00,0x26,0x31,0xff,0xff,0x06,0x21,0xff,0xf6,
45349 +0x26,0x10,0x00,0x04,0xaf,0x80,0x84,0x40,0x08,0x00,0x15,0xb7,0x00,0x00,0x28,0x21,
45350 +0x3c,0x02,0xb0,0x03,0x34,0x42,0x01,0x08,0x8c,0x44,0x00,0x00,0x8f,0x82,0x84,0x38,
45351 +0x00,0x04,0x19,0xc2,0x00,0x02,0x11,0xc2,0x10,0x62,0xff,0xf6,0x00,0x00,0x00,0x00,
45352 +0x3c,0x02,0xb0,0x03,0x34,0x42,0x01,0x02,0x90,0x43,0x00,0x00,0x3c,0x12,0xb0,0x05,
45353 +0xaf,0x84,0x84,0x38,0x30,0x63,0x00,0xff,0x00,0x03,0x11,0x40,0x00,0x43,0x10,0x23,
45354 +0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x00,0x02,0x99,0x00,0x00,0x00,0x88,0x21,
45355 +0x36,0x52,0x02,0x2c,0x27,0x90,0xb4,0x00,0x8e,0x04,0x00,0x00,0x00,0x00,0x00,0x00,
45356 +0x90,0x83,0x00,0x16,0x00,0x00,0x00,0x00,0x30,0x62,0x00,0x03,0x10,0x40,0x00,0x06,
45357 +0x30,0x62,0x00,0x1c,0x14,0x40,0x00,0x04,0x00,0x00,0x00,0x00,0x8f,0x85,0x84,0x38,
45358 +0x0c,0x00,0x1e,0x94,0x02,0x60,0x30,0x21,0x8e,0x42,0x00,0x00,0x00,0x00,0x00,0x00,
45359 +0x30,0x42,0x00,0xff,0x14,0x40,0xff,0xd7,0x00,0x00,0x00,0x00,0x26,0x31,0x00,0x01,
45360 +0x2a,0x22,0x00,0x13,0x14,0x40,0xff,0xec,0x26,0x10,0x00,0x04,0x08,0x00,0x17,0x21,
45361 +0x00,0x00,0x00,0x00,0x8f,0x84,0x84,0x4c,0x27,0x85,0x89,0x18,0x0c,0x00,0x17,0xa4,
45362 +0x00,0x00,0x00,0x00,0x8f,0x83,0x84,0x4c,0x24,0x02,0x00,0x04,0x14,0x62,0xfe,0xa5,
45363 +0x00,0x00,0x00,0x00,0x08,0x00,0x15,0xee,0x24,0x05,0x00,0x05,0x3c,0x02,0xb0,0x03,
45364 +0x34,0x42,0x00,0x3f,0x90,0x44,0x00,0x00,0x24,0x03,0x00,0x01,0x10,0x64,0x00,0x08,
45365 +0x00,0x00,0x00,0x00,0x27,0x84,0x89,0x18,0x0c,0x00,0x24,0x2c,0x00,0x00,0x00,0x00,
45366 +0x24,0x05,0x00,0x05,0xaf,0x85,0x84,0x40,0x08,0x00,0x15,0xb7,0x00,0x00,0x00,0x00,
45367 +0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x14,0x8c,0x44,0x00,0x00,0x0c,0x00,0x24,0x49,
45368 +0x00,0x00,0x00,0x00,0x08,0x00,0x17,0x65,0x24,0x05,0x00,0x05,0x8f,0x82,0x89,0x4c,
45369 +0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x0d,0x00,0x00,0x00,0x00,0x8f,0x84,0xb4,0x40,
45370 +0xaf,0x80,0x89,0x4c,0x94,0x85,0x00,0x14,0x0c,0x00,0x1b,0x66,0x00,0x00,0x00,0x00,
45371 +0x93,0x82,0x8b,0x71,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x02,0x10,0x40,0x00,0x03,
45372 +0x00,0x00,0x00,0x00,0x0c,0x00,0x01,0x57,0x00,0x00,0x20,0x21,0x8f,0x84,0xb4,0x40,
45373 +0x0c,0x00,0x18,0xd0,0x00,0x00,0x00,0x00,0x08,0x00,0x17,0x21,0x00,0x00,0x00,0x00,
45374 +0x3c,0x02,0xff,0x90,0x27,0xbd,0xff,0xe8,0x00,0x80,0x18,0x21,0x34,0x42,0x00,0x01,
45375 +0x27,0x84,0x89,0x18,0x10,0x62,0x00,0x05,0xaf,0xbf,0x00,0x10,0x8f,0xbf,0x00,0x10,
45376 +0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x0c,0x00,0x06,0xe5,
45377 +0x00,0x00,0x00,0x00,0x27,0x84,0x86,0x58,0x0c,0x00,0x18,0x1f,0x00,0x00,0x00,0x00,
45378 +0x27,0x84,0x84,0x40,0x0c,0x00,0x13,0xd9,0x00,0x00,0x00,0x00,0x08,0x00,0x17,0x8b,
45379 +0x00,0x00,0x00,0x00,0x8f,0x82,0x89,0x58,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x05,
45380 +0x00,0x00,0x18,0x21,0x8f,0x82,0x84,0x48,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x02,
45381 +0x00,0x00,0x00,0x00,0x24,0x03,0x00,0x01,0x03,0xe0,0x00,0x08,0x00,0x60,0x10,0x21,
45382 +0x27,0xbd,0xff,0xe0,0x3c,0x06,0xb0,0x03,0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,
45383 +0x34,0xc6,0x00,0x5f,0xaf,0xbf,0x00,0x18,0x90,0xc3,0x00,0x00,0x3c,0x07,0xb0,0x03,
45384 +0x34,0xe7,0x00,0x5d,0x34,0x63,0x00,0x01,0x3c,0x09,0xb0,0x03,0x24,0x02,0x00,0x01,
45385 +0xa0,0xc3,0x00,0x00,0x00,0x80,0x80,0x21,0xa0,0xe2,0x00,0x00,0x00,0xa0,0x88,0x21,
45386 +0x35,0x29,0x00,0x5e,0x00,0xe0,0x40,0x21,0x24,0x04,0x00,0x01,0x91,0x22,0x00,0x00,
45387 +0x91,0x03,0x00,0x00,0x30,0x42,0x00,0x01,0x14,0x83,0x00,0x03,0x30,0x42,0x00,0x01,
45388 +0x14,0x40,0xff,0xfa,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x04,0x12,0x02,0x00,0x2c,
45389 +0x24,0x05,0x0f,0x00,0x24,0x02,0x00,0x06,0x12,0x02,0x00,0x08,0x24,0x05,0x00,0x0f,
45390 +0x3c,0x02,0xb0,0x03,0x34,0x42,0x02,0x00,0xa0,0x50,0x00,0x00,0x8f,0xbf,0x00,0x18,
45391 +0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x24,0x04,0x0c,0x04,
45392 +0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x0f,0x24,0x04,0x0d,0x04,0x24,0x05,0x00,0x0f,
45393 +0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x0f,0x24,0x04,0x08,0x80,0x24,0x05,0x1e,0x00,
45394 +0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x0f,0x24,0x04,0x08,0x8c,0x24,0x05,0x0f,0x00,
45395 +0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x0f,0x24,0x04,0x08,0x24,0x3c,0x05,0x00,0x30,
45396 +0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x02,0x24,0x04,0x08,0x2c,0x3c,0x05,0x00,0x30,
45397 +0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x02,0x24,0x04,0x08,0x34,0x3c,0x05,0x00,0x30,
45398 +0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x02,0x24,0x04,0x08,0x3c,0x3c,0x05,0x00,0x30,
45399 +0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x02,0x08,0x00,0x17,0xc5,0x3c,0x02,0xb0,0x03,
45400 +0x24,0x04,0x08,0x8c,0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x04,0x24,0x04,0x08,0x80,
45401 +0x24,0x05,0x1e,0x00,0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x04,0x24,0x04,0x0c,0x04,
45402 +0x24,0x05,0x00,0x0f,0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x04,0x24,0x04,0x0d,0x04,
45403 +0x24,0x05,0x00,0x0f,0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x04,0x24,0x04,0x08,0x24,
45404 +0x3c,0x05,0x00,0x30,0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x03,0x24,0x04,0x08,0x2c,
45405 +0x3c,0x05,0x00,0x30,0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x03,0x24,0x04,0x08,0x34,
45406 +0x3c,0x05,0x00,0x30,0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x02,0x3c,0x05,0x00,0x30,
45407 +0x24,0x06,0x00,0x03,0x0c,0x00,0x13,0x5f,0x24,0x04,0x08,0x3c,0x02,0x20,0x20,0x21,
45408 +0x24,0x05,0x00,0x14,0x0c,0x00,0x13,0xa4,0x24,0x06,0x01,0x07,0x08,0x00,0x17,0xc5,
45409 +0x3c,0x02,0xb0,0x03,0x3c,0x03,0xb0,0x03,0x34,0x63,0x00,0x73,0x90,0x62,0x00,0x00,
45410 +0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x02,0x14,0x40,0x00,0x04,0x00,0x00,0x00,0x00,
45411 +0xa3,0x80,0x81,0x58,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
45412 +0xa3,0x82,0x81,0x58,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,
45413 +0x3c,0x02,0x80,0x00,0x00,0x80,0x70,0x21,0x34,0x63,0x00,0x20,0x24,0x42,0x60,0x7c,
45414 +0x3c,0x04,0xb0,0x03,0xac,0x62,0x00,0x00,0x34,0x84,0x00,0x30,0xad,0xc0,0x02,0xb8,
45415 +0x8c,0x83,0x00,0x00,0x24,0x02,0x00,0xff,0xa5,0xc0,0x00,0x0a,0x00,0x00,0x30,0x21,
45416 +0xa7,0x82,0x8f,0xf0,0x27,0x88,0x90,0x00,0xa5,0xc3,0x00,0x08,0x3c,0x07,0xb0,0x08,
45417 +0x30,0xc2,0xff,0xff,0x00,0x02,0x20,0xc0,0x24,0xc3,0x00,0x01,0x00,0x82,0x10,0x21,
45418 +0x00,0x60,0x30,0x21,0x00,0x02,0x10,0x80,0x30,0x63,0xff,0xff,0x00,0x48,0x10,0x21,
45419 +0x00,0x87,0x20,0x21,0x28,0xc5,0x00,0xff,0xac,0x83,0x00,0x00,0x14,0xa0,0xff,0xf4,
45420 +0xa4,0x43,0x00,0x00,0x3c,0x02,0xb0,0x08,0x34,0x03,0xff,0xff,0x25,0xc4,0x00,0x0c,
45421 +0x24,0x0a,0x00,0x02,0x34,0x42,0x07,0xf8,0x3c,0x06,0xb0,0x03,0xa7,0x83,0xb3,0xdc,
45422 +0xac,0x43,0x00,0x00,0xaf,0x84,0xb4,0x00,0x34,0xc6,0x00,0x64,0xa0,0x8a,0x00,0x18,
45423 +0x94,0xc5,0x00,0x00,0x8f,0x82,0xb4,0x00,0x25,0xc4,0x00,0x30,0x24,0x08,0x00,0x03,
45424 +0x3c,0x03,0xb0,0x03,0xa0,0x45,0x00,0x21,0x34,0x63,0x00,0x66,0xaf,0x84,0xb4,0x04,
45425 +0xa0,0x88,0x00,0x18,0x94,0x65,0x00,0x00,0x8f,0x82,0xb4,0x04,0x25,0xc4,0x00,0x54,
45426 +0x25,0xc7,0x00,0x78,0xa0,0x45,0x00,0x21,0xaf,0x84,0xb4,0x08,0xa0,0x88,0x00,0x18,
45427 +0x94,0x65,0x00,0x00,0x8f,0x82,0xb4,0x08,0x25,0xc8,0x00,0x9c,0x24,0x09,0x00,0x01,
45428 +0xa0,0x45,0x00,0x21,0xaf,0x87,0xb4,0x0c,0xa0,0xea,0x00,0x18,0x94,0xc4,0x00,0x00,
45429 +0x8f,0x82,0xb4,0x0c,0x3c,0x03,0xb0,0x03,0x34,0x63,0x00,0x62,0xa0,0x44,0x00,0x21,
45430 +0xaf,0x88,0xb4,0x10,0xa1,0x09,0x00,0x18,0x94,0x65,0x00,0x00,0x8f,0x82,0xb4,0x10,
45431 +0x25,0xc4,0x00,0xc0,0x3c,0x06,0xb0,0x03,0xa0,0x45,0x00,0x21,0xaf,0x84,0xb4,0x14,
45432 +0xa0,0x89,0x00,0x18,0x94,0x65,0x00,0x00,0x8f,0x82,0xb4,0x14,0x25,0xc4,0x00,0xe4,
45433 +0x34,0xc6,0x00,0x60,0xa0,0x45,0x00,0x21,0xaf,0x84,0xb4,0x18,0xa0,0x80,0x00,0x18,
45434 +0x94,0xc5,0x00,0x00,0x8f,0x82,0xb4,0x18,0x25,0xc3,0x01,0x08,0x25,0xc7,0x01,0x2c,
45435 +0xa0,0x45,0x00,0x21,0xaf,0x83,0xb4,0x1c,0xa0,0x60,0x00,0x18,0x94,0xc8,0x00,0x00,
45436 +0x8f,0x82,0xb4,0x1c,0x25,0xc4,0x01,0x50,0x25,0xc5,0x01,0x74,0xa0,0x48,0x00,0x21,
45437 +0x25,0xc6,0x01,0x98,0x25,0xc9,0x01,0xbc,0x25,0xca,0x01,0xe0,0x25,0xcb,0x02,0x04,
45438 +0x25,0xcc,0x02,0x28,0x25,0xcd,0x02,0x4c,0x24,0x02,0x00,0x10,0x3c,0x03,0xb0,0x03,
45439 +0xaf,0x87,0xb4,0x20,0x34,0x63,0x00,0x38,0xa0,0xe0,0x00,0x18,0xaf,0x84,0xb4,0x24,
45440 +0xa0,0x80,0x00,0x18,0xaf,0x85,0xb4,0x28,0xa0,0xa0,0x00,0x18,0xaf,0x86,0xb4,0x2c,
45441 +0xa0,0xc0,0x00,0x18,0xaf,0x89,0xb4,0x30,0xa1,0x20,0x00,0x18,0xaf,0x8a,0xb4,0x34,
45442 +0xa1,0x40,0x00,0x18,0xaf,0x8b,0xb4,0x38,0xa1,0x60,0x00,0x18,0xaf,0x8c,0xb4,0x3c,
45443 +0xa1,0x80,0x00,0x18,0xaf,0x8d,0xb4,0x40,0xa1,0xa2,0x00,0x18,0x94,0x64,0x00,0x00,
45444 +0x8f,0x82,0xb4,0x40,0x25,0xc5,0x02,0x70,0x3c,0x03,0xb0,0x03,0xa0,0x44,0x00,0x21,
45445 +0x24,0x02,0x00,0x11,0xaf,0x85,0xb4,0x44,0x34,0x63,0x00,0x6e,0xa0,0xa2,0x00,0x18,
45446 +0x94,0x64,0x00,0x00,0x8f,0x82,0xb4,0x44,0x25,0xc5,0x02,0x94,0x3c,0x03,0xb0,0x03,
45447 +0xa0,0x44,0x00,0x21,0x24,0x02,0x00,0x12,0xaf,0x85,0xb4,0x48,0x34,0x63,0x00,0x6c,
45448 +0xa0,0xa2,0x00,0x18,0x94,0x64,0x00,0x00,0x8f,0x82,0xb4,0x48,0x24,0x05,0xff,0xff,
45449 +0x24,0x07,0x00,0x01,0xa0,0x44,0x00,0x21,0x24,0x06,0x00,0x12,0x27,0x84,0xb4,0x00,
45450 +0x8c,0x82,0x00,0x00,0x24,0xc6,0xff,0xff,0xa0,0x40,0x00,0x04,0x8c,0x83,0x00,0x00,
45451 +0xa4,0x45,0x00,0x00,0xa4,0x45,0x00,0x02,0xa0,0x60,0x00,0x0a,0x8c,0x82,0x00,0x00,
45452 +0xa4,0x65,0x00,0x06,0xa4,0x65,0x00,0x08,0xa0,0x40,0x00,0x10,0x8c,0x83,0x00,0x00,
45453 +0xa4,0x45,0x00,0x0c,0xa4,0x45,0x00,0x0e,0xa0,0x60,0x00,0x12,0x8c,0x82,0x00,0x00,
45454 +0x00,0x00,0x00,0x00,0xa0,0x40,0x00,0x16,0x8c,0x83,0x00,0x00,0xa4,0x45,0x00,0x14,
45455 +0xa0,0x67,0x00,0x17,0x8c,0x82,0x00,0x00,0x24,0x84,0x00,0x04,0xa0,0x40,0x00,0x20,
45456 +0x04,0xc1,0xff,0xe7,0xac,0x40,0x00,0x1c,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
45457 +0x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x00,0x34,0x42,0x00,0x20,0x24,0x63,0x63,0x40,
45458 +0xac,0x43,0x00,0x00,0x90,0x82,0x00,0x10,0x00,0x80,0x60,0x21,0x10,0x40,0x00,0x56,
45459 +0x00,0x00,0x70,0x21,0x97,0x82,0x8f,0xf0,0x94,0x8a,0x00,0x0c,0x27,0x87,0x90,0x00,
45460 +0x00,0x02,0x40,0xc0,0x01,0x02,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x47,0x10,0x21,
45461 +0x90,0x8b,0x00,0x18,0xa4,0x4a,0x00,0x00,0x94,0x83,0x00,0x0e,0x39,0x64,0x00,0x10,
45462 +0x2c,0x84,0x00,0x01,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x34,0x85,0x00,0x02,
45463 +0x39,0x63,0x00,0x11,0x00,0x83,0x28,0x0b,0x34,0xa3,0x00,0x08,0x39,0x64,0x00,0x12,
45464 +0x00,0x02,0x10,0x80,0x00,0xa4,0x18,0x0b,0x00,0x47,0x10,0x21,0x94,0x49,0x00,0x04,
45465 +0x34,0x64,0x00,0x20,0x00,0x6b,0x20,0x0b,0x34,0x83,0x00,0x40,0x39,0x62,0x00,0x01,
45466 +0x00,0x82,0x18,0x0b,0x00,0x09,0x30,0xc0,0x34,0x64,0x00,0x80,0x00,0xc9,0x28,0x21,
45467 +0x39,0x62,0x00,0x02,0x00,0x60,0x68,0x21,0x00,0x82,0x68,0x0a,0x00,0x05,0x28,0x80,
45468 +0x3c,0x02,0xb0,0x08,0x00,0xa7,0x28,0x21,0x00,0xc2,0x30,0x21,0x01,0x02,0x40,0x21,
45469 +0x34,0x03,0xff,0xff,0x35,0xa4,0x01,0x00,0x39,0x62,0x00,0x03,0x2d,0x67,0x00,0x13,
45470 +0xad,0x0a,0x00,0x00,0xa4,0xa3,0x00,0x00,0xac,0xc3,0x00,0x00,0xa7,0x89,0x8f,0xf0,
45471 +0x10,0xe0,0x00,0x0f,0x00,0x82,0x68,0x0a,0x3c,0x03,0x80,0x01,0x00,0x0b,0x10,0x80,
45472 +0x24,0x63,0x02,0x44,0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x00,0x00,0x00,0x00,0x00,
45473 +0x00,0x80,0x00,0x08,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,0x34,0x63,0x00,0x60,
45474 +0x94,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x14,0x00,0x00,0x02,0x74,0x03,
45475 +0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x3a,0x94,0x44,0x00,0x00,0x93,0x83,0x8f,0xe4,
45476 +0x91,0x82,0x00,0x21,0x01,0xc4,0x20,0x21,0x91,0x85,0x00,0x10,0x00,0x04,0x24,0x00,
45477 +0x00,0x62,0x18,0x21,0x00,0x04,0x74,0x03,0x00,0x6e,0x18,0x23,0x00,0x65,0x10,0x2a,
45478 +0x00,0xa2,0x18,0x0a,0x00,0x0d,0x24,0x00,0x3c,0x02,0xb0,0x06,0x24,0x05,0xff,0xff,
45479 +0x00,0x64,0x18,0x25,0x34,0x42,0x80,0x20,0xac,0x43,0x00,0x00,0xa5,0x85,0x00,0x0e,
45480 +0xa1,0x80,0x00,0x10,0xa5,0x85,0x00,0x0c,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
45481 +0x3c,0x03,0xb0,0x03,0x08,0x00,0x19,0x14,0x34,0x63,0x00,0x62,0x3c,0x03,0xb0,0x03,
45482 +0x08,0x00,0x19,0x14,0x34,0x63,0x00,0x64,0x3c,0x03,0xb0,0x03,0x08,0x00,0x19,0x14,
45483 +0x34,0x63,0x00,0x66,0x3c,0x03,0xb0,0x03,0x08,0x00,0x19,0x14,0x34,0x63,0x00,0x38,
45484 +0x3c,0x03,0xb0,0x03,0x08,0x00,0x19,0x14,0x34,0x63,0x00,0x6e,0x3c,0x03,0xb0,0x03,
45485 +0x08,0x00,0x19,0x14,0x34,0x63,0x00,0x6c,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,
45486 +0x34,0x63,0x00,0x20,0x24,0x42,0x65,0x08,0x00,0x05,0x28,0x40,0xac,0x62,0x00,0x00,
45487 +0x00,0xa6,0x28,0x21,0x2c,0xe2,0x00,0x10,0x14,0x80,0x00,0x06,0x00,0x00,0x18,0x21,
45488 +0x10,0x40,0x00,0x02,0x00,0x00,0x00,0x00,0x00,0xe0,0x18,0x21,0x03,0xe0,0x00,0x08,
45489 +0x00,0x60,0x10,0x21,0x24,0x02,0x00,0x20,0x10,0xe2,0x00,0x06,0x2c,0xe4,0x00,0x10,
45490 +0x24,0xa2,0x00,0x01,0x10,0x80,0xff,0xf9,0x00,0x02,0x11,0x00,0x08,0x00,0x19,0x4f,
45491 +0x00,0x47,0x18,0x21,0x08,0x00,0x19,0x4f,0x24,0xa3,0x00,0x50,0x27,0xbd,0xff,0xc8,
45492 +0xaf,0xb3,0x00,0x1c,0xaf,0xb2,0x00,0x18,0xaf,0xb1,0x00,0x14,0xaf,0xbf,0x00,0x30,
45493 +0xaf,0xb7,0x00,0x2c,0xaf,0xb6,0x00,0x28,0xaf,0xb5,0x00,0x24,0xaf,0xb4,0x00,0x20,
45494 +0xaf,0xb0,0x00,0x10,0x00,0x80,0x88,0x21,0x84,0x84,0x00,0x08,0x3c,0x05,0xb0,0x03,
45495 +0x3c,0x02,0x80,0x00,0x34,0xa5,0x00,0x20,0x24,0x42,0x65,0x6c,0x3c,0x03,0xb0,0x06,
45496 +0x00,0x04,0x20,0x80,0xac,0xa2,0x00,0x00,0x00,0x83,0x20,0x21,0x3c,0x06,0xb0,0x06,
45497 +0x8c,0x82,0x00,0x00,0x34,0xc6,0x80,0x24,0x8c,0x88,0x00,0x00,0x8c,0xc4,0x00,0x00,
45498 +0x96,0x25,0x00,0x08,0x30,0x52,0xff,0xff,0x00,0x08,0x44,0x02,0x34,0x84,0x01,0x00,
45499 +0x3c,0x02,0xb0,0x00,0x00,0x08,0x18,0xc0,0x00,0x12,0x3a,0x00,0xac,0xc4,0x00,0x00,
45500 +0x00,0xe2,0x38,0x21,0xae,0x32,0x02,0xb8,0x00,0x68,0x18,0x21,0x24,0xa5,0x00,0x02,
45501 +0x8c,0xf6,0x00,0x00,0x30,0xa5,0x01,0xff,0x8c,0xf4,0x00,0x04,0x27,0x86,0x90,0x00,
45502 +0x00,0x03,0x18,0x80,0x00,0x12,0x98,0xc0,0xa6,0x25,0x00,0x08,0x00,0x66,0x18,0x21,
45503 +0x02,0x72,0x10,0x21,0x94,0x65,0x00,0x00,0x00,0x02,0x48,0x80,0x01,0x26,0x30,0x21,
45504 +0x24,0x02,0xff,0xff,0x00,0x14,0x1a,0x02,0x27,0x84,0x90,0x10,0xa4,0xc2,0x00,0x02,
45505 +0x30,0x63,0x00,0x1f,0x24,0x02,0x00,0x10,0x01,0x24,0x20,0x21,0xa4,0xc8,0x00,0x04,
45506 +0x8c,0xf0,0x00,0x08,0xa6,0x23,0x00,0x06,0xa6,0x25,0x00,0x0a,0xa0,0x82,0x00,0x06,
45507 +0x86,0x25,0x00,0x06,0x27,0x82,0x90,0x04,0x01,0x22,0x10,0x21,0x24,0x03,0x00,0x13,
45508 +0x10,0xa3,0x00,0xee,0xac,0x47,0x00,0x18,0x3c,0x03,0xb0,0x03,0x34,0x63,0x01,0x00,
45509 +0xa6,0x20,0x00,0x02,0x3c,0x02,0xb0,0x03,0x90,0x64,0x00,0x00,0x34,0x42,0x01,0x08,
45510 +0x8c,0x45,0x00,0x00,0x00,0x10,0x1b,0xc2,0x00,0x04,0x20,0x82,0x30,0x63,0x00,0x01,
45511 +0xac,0xc5,0x00,0x08,0x10,0x60,0x00,0xc7,0x30,0x97,0x00,0x01,0x00,0x10,0x16,0x82,
45512 +0x30,0x46,0x00,0x01,0x00,0x10,0x12,0x02,0x00,0x10,0x19,0xc2,0x00,0x10,0x26,0x02,
45513 +0x00,0x10,0x2e,0x42,0x30,0x48,0x00,0x7f,0x24,0x02,0x00,0x01,0x30,0x75,0x00,0x01,
45514 +0x30,0x84,0x00,0x01,0x10,0xc2,0x00,0xb3,0x30,0xa3,0x00,0x01,0x00,0x60,0x28,0x21,
45515 +0x0c,0x00,0x19,0x42,0x01,0x00,0x38,0x21,0x02,0x72,0x18,0x21,0x00,0x03,0x18,0x80,
45516 +0x2c,0x46,0x00,0x54,0x27,0x85,0x90,0x10,0x27,0x84,0x90,0x08,0x00,0x06,0x10,0x0a,
45517 +0x00,0x65,0x28,0x21,0x26,0xa6,0x00,0x02,0x00,0x64,0x18,0x21,0xa0,0xa2,0x00,0x02,
45518 +0xa0,0x66,0x00,0x06,0xa0,0x62,0x00,0x07,0xa0,0xa2,0x00,0x01,0x02,0x72,0x28,0x21,
45519 +0x00,0x05,0x28,0x80,0x27,0x82,0x90,0x04,0x00,0xa2,0x58,0x21,0x8d,0x64,0x00,0x18,
45520 +0x00,0x10,0x15,0xc2,0x30,0x42,0x00,0x01,0x8c,0x83,0x00,0x0c,0x27,0x84,0x90,0x20,
45521 +0x00,0xa4,0x48,0x21,0xa6,0x22,0x00,0x00,0xa6,0x36,0x00,0x04,0x8d,0x26,0x00,0x00,
45522 +0x00,0x03,0x19,0x42,0x3c,0x02,0xff,0xef,0x34,0x42,0xff,0xff,0x30,0x63,0x00,0x01,
45523 +0x00,0xc2,0x40,0x24,0x00,0x03,0x1d,0x00,0x01,0x03,0x40,0x25,0x00,0x08,0x15,0x02,
45524 +0x00,0x14,0x19,0x82,0x00,0x14,0x25,0x82,0x00,0x10,0x34,0x42,0x00,0x10,0x3c,0x82,
45525 +0x00,0x10,0x2c,0x02,0x30,0x42,0x00,0x01,0x30,0xcd,0x00,0x01,0x30,0x6c,0x00,0x01,
45526 +0x30,0xe6,0x00,0x01,0x30,0x8a,0x00,0x03,0x32,0x94,0x00,0x07,0x30,0xa5,0x00,0x01,
45527 +0xad,0x28,0x00,0x00,0x10,0x40,0x00,0x0b,0x32,0x07,0x00,0x7f,0x8d,0x64,0x00,0x18,
45528 +0x3c,0x03,0xff,0xf0,0x34,0x63,0xff,0xff,0x8c,0x82,0x00,0x0c,0x01,0x03,0x18,0x24,
45529 +0x00,0x02,0x13,0x82,0x30,0x42,0x00,0x0f,0x00,0x02,0x14,0x00,0x00,0x62,0x18,0x25,
45530 +0xad,0x23,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xc2,0x00,0x6a,0x00,0x00,0x00,0x00,
45531 +0x15,0x80,0x00,0x03,0x00,0x00,0x00,0x00,0x15,0x40,0x00,0x5b,0x24,0x02,0x00,0x01,
45532 +0x96,0x22,0x00,0x04,0x00,0x00,0x00,0x00,0x24,0x42,0x00,0x04,0xa6,0x22,0x00,0x04,
45533 +0x00,0xa0,0x20,0x21,0x0c,0x00,0x19,0x42,0x01,0xa0,0x28,0x21,0x02,0x72,0x18,0x21,
45534 +0x00,0x03,0x40,0x80,0x2c,0x45,0x00,0x54,0x27,0x84,0x90,0x10,0x01,0x04,0x20,0x21,
45535 +0x00,0x05,0x10,0x0a,0xa0,0x82,0x00,0x00,0xa0,0x80,0x00,0x04,0xa0,0x80,0x00,0x05,
45536 +0x96,0x23,0x00,0x04,0x27,0x82,0x90,0x00,0x01,0x02,0x10,0x21,0xa4,0x43,0x00,0x06,
45537 +0x27,0x82,0x90,0x04,0x92,0x26,0x00,0x01,0x01,0x02,0x10,0x21,0x8c,0x45,0x00,0x18,
45538 +0x27,0x83,0x90,0x20,0x01,0x03,0x18,0x21,0xa0,0x60,0x00,0x00,0xa0,0x86,0x00,0x07,
45539 +0x94,0xa2,0x00,0x10,0x24,0x03,0x00,0x04,0x30,0x42,0x00,0x0f,0x10,0x43,0x00,0x36,
45540 +0x24,0xa5,0x00,0x10,0x94,0xa3,0x00,0x16,0x27,0x87,0x90,0x18,0x01,0x07,0x10,0x21,
45541 +0xa4,0x43,0x00,0x02,0x94,0xa2,0x00,0x04,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x01,
45542 +0x14,0x40,0x00,0x24,0x02,0x72,0x20,0x21,0x94,0xa2,0x00,0x00,0x24,0x03,0x00,0xa4,
45543 +0x30,0x42,0x00,0xff,0x10,0x43,0x00,0x1f,0x00,0x00,0x00,0x00,0x94,0xa2,0x00,0x00,
45544 +0x24,0x03,0x00,0x88,0x30,0x42,0x00,0x88,0x10,0x43,0x00,0x14,0x02,0x72,0x18,0x21,
45545 +0x27,0x84,0x90,0x20,0x00,0x03,0x18,0x80,0x00,0x64,0x18,0x21,0x8c,0x62,0x00,0x00,
45546 +0x3c,0x04,0x00,0x80,0x00,0x44,0x10,0x25,0xac,0x62,0x00,0x00,0x02,0x72,0x10,0x21,
45547 +0x00,0x02,0x10,0x80,0x00,0x47,0x10,0x21,0xa0,0x54,0x00,0x00,0x8f,0xbf,0x00,0x30,
45548 +0x7b,0xb6,0x01,0x7c,0x7b,0xb4,0x01,0x3c,0x7b,0xb2,0x00,0xfc,0x7b,0xb0,0x00,0xbc,
45549 +0x24,0x02,0x00,0x01,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x38,0x94,0xa2,0x00,0x18,
45550 +0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x60,0x10,0x40,0xff,0xe9,0x02,0x72,0x18,0x21,
45551 +0x02,0x72,0x20,0x21,0x27,0x82,0x90,0x20,0x00,0x04,0x20,0x80,0x00,0x82,0x20,0x21,
45552 +0x8c,0x83,0x00,0x00,0x3c,0x02,0xff,0x7f,0x34,0x42,0xff,0xff,0x00,0x62,0x18,0x24,
45553 +0x08,0x00,0x1a,0x37,0xac,0x83,0x00,0x00,0x27,0x87,0x90,0x18,0x01,0x07,0x10,0x21,
45554 +0x08,0x00,0x1a,0x21,0xa4,0x40,0x00,0x02,0x11,0x42,0x00,0x07,0x00,0x00,0x00,0x00,
45555 +0x2d,0x42,0x00,0x02,0x14,0x40,0xff,0xa7,0x00,0xa0,0x20,0x21,0x96,0x22,0x00,0x04,
45556 +0x08,0x00,0x19,0xff,0x24,0x42,0x00,0x0c,0x96,0x22,0x00,0x04,0x08,0x00,0x19,0xff,
45557 +0x24,0x42,0x00,0x08,0x16,0xe6,0xff,0x96,0x3c,0x02,0xff,0xfb,0x8d,0x63,0x00,0x18,
45558 +0x34,0x42,0xff,0xff,0x02,0x02,0x10,0x24,0xac,0x62,0x00,0x08,0x08,0x00,0x19,0xf8,
45559 +0x00,0x00,0x30,0x21,0x16,0xe6,0xff,0x4e,0x00,0x60,0x28,0x21,0x3c,0x02,0xfb,0xff,
45560 +0x34,0x42,0xff,0xff,0x02,0x02,0x10,0x24,0xac,0xe2,0x00,0x08,0x08,0x00,0x19,0xb7,
45561 +0x00,0x00,0x30,0x21,0x93,0x87,0xbb,0x14,0x00,0x10,0x1e,0x42,0x00,0x10,0x26,0x82,
45562 +0x27,0x82,0x90,0x08,0x2c,0xe5,0x00,0x0c,0x01,0x22,0x48,0x21,0x30,0x63,0x00,0x01,
45563 +0x30,0x86,0x00,0x01,0x14,0xa0,0x00,0x06,0x00,0xe0,0x40,0x21,0x00,0x03,0x10,0x40,
45564 +0x00,0x46,0x10,0x21,0x00,0x02,0x11,0x00,0x00,0xe2,0x10,0x21,0x24,0x48,0x00,0x04,
45565 +0x02,0x72,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x84,0x90,0x10,0x27,0x83,0x90,0x08,
45566 +0x00,0x44,0x20,0x21,0x00,0x43,0x10,0x21,0xa1,0x28,0x00,0x07,0xa0,0x40,0x00,0x06,
45567 +0xa0,0x80,0x00,0x02,0x08,0x00,0x19,0xc7,0xa0,0x80,0x00,0x01,0x24,0x02,0x00,0x01,
45568 +0xa6,0x22,0x00,0x02,0x0c,0x00,0x01,0xc2,0x00,0xe0,0x20,0x21,0x08,0x00,0x1a,0x3b,
45569 +0x00,0x00,0x00,0x00,0x30,0xa7,0xff,0xff,0x00,0x07,0x18,0xc0,0x00,0x67,0x18,0x21,
45570 +0x3c,0x06,0xb0,0x03,0x3c,0x02,0x80,0x00,0x24,0x42,0x6a,0x44,0x27,0x85,0x90,0x10,
45571 +0x00,0x03,0x18,0x80,0x34,0xc6,0x00,0x20,0x00,0x65,0x18,0x21,0xac,0xc2,0x00,0x00,
45572 +0x80,0x62,0x00,0x07,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x29,0x00,0x80,0x28,0x21,
45573 +0x90,0x82,0x00,0x16,0x00,0x00,0x00,0x00,0x34,0x42,0x00,0x02,0x30,0x43,0x00,0x01,
45574 +0x14,0x60,0x00,0x02,0xa0,0x82,0x00,0x16,0xa0,0x80,0x00,0x17,0x90,0xa2,0x00,0x04,
45575 +0x3c,0x03,0xb0,0x03,0x27,0x86,0x90,0x00,0x14,0x40,0x00,0x06,0x34,0x63,0x00,0x20,
45576 +0x24,0x02,0x00,0x01,0xa0,0xa2,0x00,0x04,0xa4,0xa7,0x00,0x02,0x03,0xe0,0x00,0x08,
45577 +0xa4,0xa7,0x00,0x00,0x94,0xa4,0x00,0x02,0x3c,0x02,0x80,0x01,0x24,0x42,0x82,0x6c,
45578 +0xac,0x62,0x00,0x00,0x00,0x04,0x18,0xc0,0x00,0x64,0x18,0x21,0x00,0x03,0x18,0x80,
45579 +0x00,0x66,0x18,0x21,0x94,0x62,0x00,0x04,0xa4,0x67,0x00,0x02,0x3c,0x03,0xb0,0x08,
45580 +0x00,0x02,0x20,0xc0,0x00,0x82,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x46,0x10,0x21,
45581 +0x00,0x83,0x20,0x21,0xa4,0x47,0x00,0x00,0xac,0x87,0x00,0x00,0x90,0xa2,0x00,0x04,
45582 +0xa4,0xa7,0x00,0x02,0x24,0x42,0x00,0x01,0x03,0xe0,0x00,0x08,0xa0,0xa2,0x00,0x04,
45583 +0x90,0x82,0x00,0x16,0x24,0x85,0x00,0x06,0x34,0x42,0x00,0x01,0x30,0x43,0x00,0x02,
45584 +0x14,0x60,0xff,0xda,0xa0,0x82,0x00,0x16,0x24,0x02,0x00,0x01,0x08,0x00,0x1a,0xa7,
45585 +0xa0,0x82,0x00,0x17,0x27,0xbd,0xff,0xe8,0xaf,0xbf,0x00,0x10,0x00,0x80,0x38,0x21,
45586 +0x84,0x84,0x00,0x02,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x3c,0x0a,0xb0,0x06,
45587 +0x34,0x63,0x00,0x20,0x24,0x42,0x6b,0x44,0x3c,0x0b,0xb0,0x08,0x27,0x89,0x90,0x00,
45588 +0x34,0x0c,0xff,0xff,0x35,0x4a,0x80,0x20,0x10,0x80,0x00,0x30,0xac,0x62,0x00,0x00,
45589 +0x97,0x82,0x8f,0xf0,0x94,0xe6,0x02,0xba,0x00,0x02,0x18,0xc0,0x00,0x6b,0x28,0x21,
45590 +0xac,0xa6,0x00,0x00,0x8c,0xe4,0x02,0xb8,0x00,0x62,0x18,0x21,0x00,0x03,0x18,0x80,
45591 +0x00,0x04,0x10,0xc0,0x00,0x44,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x49,0x10,0x21,
45592 +0x94,0x48,0x00,0x04,0x00,0x69,0x18,0x21,0xa4,0x66,0x00,0x00,0x00,0x08,0x28,0xc0,
45593 +0x00,0xab,0x10,0x21,0xac,0x4c,0x00,0x00,0x8c,0xe4,0x02,0xb8,0x27,0x82,0x90,0x04,
45594 +0x00,0xa8,0x28,0x21,0x00,0x04,0x18,0xc0,0x00,0x64,0x18,0x21,0x00,0x03,0x18,0x80,
45595 +0x00,0x62,0x10,0x21,0x8c,0x46,0x00,0x18,0x27,0x84,0x90,0x10,0x00,0x64,0x18,0x21,
45596 +0x8c,0xc2,0x00,0x00,0x80,0x67,0x00,0x06,0x00,0x05,0x28,0x80,0x30,0x42,0xff,0xff,
45597 +0x00,0x47,0x10,0x21,0x30,0x43,0x00,0xff,0x00,0x03,0x18,0x2b,0x00,0x02,0x12,0x02,
45598 +0x00,0x43,0x10,0x21,0x3c,0x04,0x00,0x04,0x00,0xa9,0x28,0x21,0x00,0x44,0x10,0x25,
45599 +0xa4,0xac,0x00,0x00,0xad,0x42,0x00,0x00,0xa7,0x88,0x8f,0xf0,0x8f,0xbf,0x00,0x10,
45600 +0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x84,0xe3,0x00,0x06,
45601 +0x27,0x82,0xb4,0x00,0x94,0xe5,0x02,0xba,0x00,0x03,0x18,0x80,0x00,0x62,0x18,0x21,
45602 +0x8c,0x64,0x00,0x00,0x0c,0x00,0x1a,0x91,0x00,0x00,0x00,0x00,0x08,0x00,0x1b,0x0b,
45603 +0x00,0x00,0x00,0x00,0x94,0x88,0x00,0x00,0x00,0x80,0x58,0x21,0x27,0x8a,0x90,0x00,
45604 +0x00,0x08,0x18,0xc0,0x00,0x68,0x18,0x21,0x3c,0x04,0xb0,0x03,0x00,0x03,0x18,0x80,
45605 +0x3c,0x02,0x80,0x00,0x00,0x6a,0x18,0x21,0x34,0x84,0x00,0x20,0x24,0x42,0x6c,0x64,
45606 +0x30,0xa5,0xff,0xff,0xac,0x82,0x00,0x00,0x94,0x67,0x00,0x02,0x11,0x05,0x00,0x35,
45607 +0x24,0x04,0x00,0x01,0x91,0x66,0x00,0x04,0x00,0x00,0x00,0x00,0x00,0x86,0x10,0x2a,
45608 +0x10,0x40,0x00,0x10,0x00,0xc0,0x48,0x21,0x3c,0x0d,0xb0,0x03,0x01,0x40,0x60,0x21,
45609 +0x35,0xad,0x00,0x20,0x10,0xe5,0x00,0x0d,0x24,0x84,0x00,0x01,0x00,0x07,0x10,0xc0,
45610 +0x00,0x47,0x10,0x21,0x00,0x02,0x10,0x80,0x01,0x20,0x30,0x21,0x00,0x4a,0x10,0x21,
45611 +0x00,0x86,0x18,0x2a,0x00,0xe0,0x40,0x21,0x94,0x47,0x00,0x02,0x14,0x60,0xff,0xf5,
45612 +0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x00,0x10,0x21,0x00,0x08,0x20,0xc0,
45613 +0x00,0x88,0x20,0x21,0x24,0xc2,0xff,0xff,0x00,0x04,0x20,0x80,0xa1,0x62,0x00,0x04,
45614 +0x00,0x8c,0x20,0x21,0x94,0x83,0x00,0x04,0x00,0x07,0x10,0xc0,0x00,0x47,0x10,0x21,
45615 +0x00,0x02,0x10,0x80,0x00,0x4c,0x10,0x21,0x00,0x03,0x28,0xc0,0x94,0x46,0x00,0x02,
45616 +0x00,0xa3,0x18,0x21,0x00,0x03,0x18,0x80,0x00,0x6c,0x18,0x21,0xa4,0x66,0x00,0x00,
45617 +0xa4,0x86,0x00,0x02,0x95,0x64,0x00,0x02,0x3c,0x03,0xb0,0x08,0x3c,0x02,0x80,0x01,
45618 +0x00,0xa3,0x28,0x21,0x24,0x42,0x82,0x6c,0xad,0xa2,0x00,0x00,0x10,0x87,0x00,0x03,
45619 +0xac,0xa6,0x00,0x00,0x03,0xe0,0x00,0x08,0x24,0x02,0x00,0x01,0x08,0x00,0x1b,0x59,
45620 +0xa5,0x68,0x00,0x02,0x91,0x62,0x00,0x04,0xa5,0x67,0x00,0x00,0x24,0x42,0xff,0xff,
45621 +0x30,0x43,0x00,0xff,0x14,0x60,0xff,0xf7,0xa1,0x62,0x00,0x04,0x24,0x02,0xff,0xff,
45622 +0x08,0x00,0x1b,0x59,0xa5,0x62,0x00,0x02,0x00,0x05,0x40,0xc0,0x01,0x05,0x30,0x21,
45623 +0x27,0xbd,0xff,0xd8,0x00,0x06,0x30,0x80,0x27,0x82,0x90,0x04,0xaf,0xb2,0x00,0x18,
45624 +0xaf,0xb1,0x00,0x14,0xaf,0xbf,0x00,0x20,0xaf,0xb3,0x00,0x1c,0xaf,0xb0,0x00,0x10,
45625 +0x00,0xc2,0x10,0x21,0x8c,0x47,0x00,0x18,0x00,0xa0,0x90,0x21,0x3c,0x02,0x80,0x00,
45626 +0x3c,0x05,0xb0,0x03,0x34,0xa5,0x00,0x20,0x24,0x42,0x6d,0x98,0xac,0xa2,0x00,0x00,
45627 +0x27,0x83,0x90,0x10,0x00,0xc3,0x30,0x21,0x8c,0xe2,0x00,0x00,0x80,0xc5,0x00,0x06,
45628 +0x00,0x80,0x88,0x21,0x30,0x42,0xff,0xff,0x00,0x45,0x10,0x21,0x30,0x43,0x00,0xff,
45629 +0x10,0x60,0x00,0x02,0x00,0x02,0x12,0x02,0x24,0x42,0x00,0x01,0x30,0x53,0x00,0xff,
45630 +0x01,0x12,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x83,0x90,0x10,0x00,0x43,0x10,0x21,
45631 +0x80,0x44,0x00,0x07,0x00,0x00,0x00,0x00,0x10,0x80,0x00,0x4b,0x26,0x24,0x00,0x06,
45632 +0x32,0x50,0xff,0xff,0x02,0x20,0x20,0x21,0x0c,0x00,0x1b,0x19,0x02,0x00,0x28,0x21,
45633 +0x92,0x22,0x00,0x10,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x2e,0x3c,0x03,0xb0,0x08,
45634 +0x3c,0x09,0x80,0x01,0x27,0x88,0x90,0x00,0xa6,0x32,0x00,0x0c,0x00,0x10,0x20,0xc0,
45635 +0x00,0x90,0x20,0x21,0x00,0x04,0x20,0x80,0x00,0x88,0x20,0x21,0x94,0x82,0x00,0x04,
45636 +0x3c,0x03,0xb0,0x08,0x3c,0x07,0xb0,0x03,0x00,0x02,0x28,0xc0,0x00,0xa2,0x10,0x21,
45637 +0x00,0x02,0x10,0x80,0x00,0x48,0x10,0x21,0x00,0xa3,0x28,0x21,0x25,0x26,0x82,0x6c,
45638 +0x34,0x03,0xff,0xff,0x34,0xe7,0x00,0x20,0xac,0xe6,0x00,0x00,0xa4,0x83,0x00,0x02,
45639 +0xa4,0x43,0x00,0x00,0xac,0xa3,0x00,0x00,0x92,0x22,0x00,0x10,0x92,0x23,0x00,0x0a,
45640 +0xa6,0x32,0x00,0x0e,0x02,0x62,0x10,0x21,0x14,0x60,0x00,0x05,0xa2,0x22,0x00,0x10,
45641 +0x92,0x22,0x00,0x16,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xfe,0xa2,0x22,0x00,0x16,
45642 +0x92,0x22,0x00,0x04,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x05,0x00,0x00,0x00,0x00,
45643 +0x92,0x22,0x00,0x16,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xfd,0xa2,0x22,0x00,0x16,
45644 +0x8f,0xbf,0x00,0x20,0x7b,0xb2,0x00,0xfc,0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,
45645 +0x27,0xbd,0x00,0x28,0x96,0x22,0x00,0x0e,0x27,0x88,0x90,0x00,0x00,0x02,0x20,0xc0,
45646 +0x00,0x82,0x20,0x21,0x00,0x04,0x20,0x80,0x00,0x88,0x20,0x21,0x94,0x82,0x00,0x04,
45647 +0x3c,0x06,0xb0,0x03,0x3c,0x09,0x80,0x01,0x00,0x02,0x28,0xc0,0x00,0xa2,0x10,0x21,
45648 +0x00,0x02,0x10,0x80,0x00,0xa3,0x28,0x21,0x00,0x48,0x10,0x21,0x34,0xc6,0x00,0x20,
45649 +0x25,0x23,0x82,0x6c,0xac,0xc3,0x00,0x00,0xa4,0x50,0x00,0x00,0xac,0xb0,0x00,0x00,
45650 +0x08,0x00,0x1b,0x97,0xa4,0x90,0x00,0x02,0x08,0x00,0x1b,0x8e,0x32,0x50,0xff,0xff,
45651 +0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x24,0x42,0x6f,0x60,0x34,0x63,0x00,0x20,
45652 +0xac,0x62,0x00,0x00,0x90,0x82,0x00,0x04,0x97,0xaa,0x00,0x12,0x00,0x80,0x60,0x21,
45653 +0x30,0xa8,0xff,0xff,0x00,0x4a,0x20,0x23,0x34,0x09,0xff,0xff,0x30,0xcf,0xff,0xff,
45654 +0x30,0xee,0xff,0xff,0x11,0x09,0x00,0x73,0xa1,0x84,0x00,0x04,0x00,0x0e,0xc0,0xc0,
45655 +0x00,0x08,0x10,0xc0,0x00,0x48,0x10,0x21,0x03,0x0e,0x20,0x21,0x27,0x8d,0x90,0x00,
45656 +0x00,0x04,0x20,0x80,0x00,0x02,0x10,0x80,0x00,0x4d,0x10,0x21,0x00,0x8d,0x20,0x21,
45657 +0x94,0x86,0x00,0x02,0x94,0x43,0x00,0x04,0x3c,0x19,0x80,0x01,0xa4,0x46,0x00,0x02,
45658 +0x00,0x03,0x28,0xc0,0x00,0xa3,0x18,0x21,0x94,0x87,0x00,0x02,0x3c,0x02,0xb0,0x08,
45659 +0x00,0x03,0x18,0x80,0x00,0xa2,0x28,0x21,0x00,0x6d,0x18,0x21,0x27,0x22,0x82,0x6c,
45660 +0x3c,0x01,0xb0,0x03,0xac,0x22,0x00,0x20,0xa4,0x66,0x00,0x00,0x10,0xe9,0x00,0x57,
45661 +0xac,0xa6,0x00,0x00,0x01,0xe0,0x30,0x21,0x11,0x40,0x00,0x1d,0x00,0x00,0x48,0x21,
45662 +0x01,0x40,0x38,0x21,0x27,0x8b,0x90,0x04,0x27,0x8a,0x90,0x10,0x00,0x06,0x40,0xc0,
45663 +0x01,0x06,0x18,0x21,0x00,0x03,0x18,0x80,0x00,0x6b,0x10,0x21,0x8c,0x44,0x00,0x18,
45664 +0x00,0x6a,0x18,0x21,0x80,0x65,0x00,0x06,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,
45665 +0x30,0x42,0xff,0xff,0x00,0x45,0x10,0x21,0x30,0x44,0x00,0xff,0x00,0x02,0x12,0x02,
45666 +0x01,0x22,0x18,0x21,0x24,0x62,0x00,0x01,0x14,0x80,0x00,0x02,0x30,0x49,0x00,0xff,
45667 +0x30,0x69,0x00,0xff,0x01,0x06,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x4d,0x10,0x21,
45668 +0x24,0xe7,0xff,0xff,0x94,0x46,0x00,0x02,0x14,0xe0,0xff,0xe9,0x00,0x06,0x40,0xc0,
45669 +0x91,0x82,0x00,0x10,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x20,0x3c,0x06,0xb0,0x03,
45670 +0xa5,0x8f,0x00,0x0c,0x03,0x0e,0x20,0x21,0x00,0x04,0x20,0x80,0x00,0x8d,0x20,0x21,
45671 +0x94,0x82,0x00,0x04,0x3c,0x03,0xb0,0x08,0x3c,0x07,0xb0,0x03,0x00,0x02,0x28,0xc0,
45672 +0x00,0xa2,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x4d,0x10,0x21,0x00,0xa3,0x28,0x21,
45673 +0x27,0x26,0x82,0x6c,0x34,0x03,0xff,0xff,0x34,0xe7,0x00,0x20,0xac,0xe6,0x00,0x00,
45674 +0xa4,0x83,0x00,0x02,0xa4,0x43,0x00,0x00,0xac,0xa3,0x00,0x00,0x91,0x82,0x00,0x10,
45675 +0x91,0x83,0x00,0x04,0xa5,0x8e,0x00,0x0e,0x01,0x22,0x10,0x21,0x14,0x60,0x00,0x05,
45676 +0xa1,0x82,0x00,0x10,0x91,0x82,0x00,0x16,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xfd,
45677 +0xa1,0x82,0x00,0x16,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x95,0x82,0x00,0x0e,
45678 +0x3c,0x03,0xb0,0x08,0x00,0x02,0x20,0xc0,0x00,0x82,0x20,0x21,0x00,0x04,0x20,0x80,
45679 +0x00,0x8d,0x20,0x21,0x94,0x82,0x00,0x04,0x34,0xc6,0x00,0x20,0x27,0x27,0x82,0x6c,
45680 +0x00,0x02,0x28,0xc0,0x00,0xa2,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0xa3,0x28,0x21,
45681 +0x00,0x4d,0x10,0x21,0xac,0xc7,0x00,0x00,0xa4,0x8f,0x00,0x02,0xa4,0x4f,0x00,0x00,
45682 +0xac,0xaf,0x00,0x00,0x08,0x00,0x1c,0x26,0x03,0x0e,0x20,0x21,0x08,0x00,0x1c,0x01,
45683 +0xa5,0x88,0x00,0x02,0x00,0x0e,0xc0,0xc0,0x03,0x0e,0x10,0x21,0x00,0x02,0x10,0x80,
45684 +0x27,0x8d,0x90,0x00,0x00,0x4d,0x10,0x21,0x94,0x43,0x00,0x02,0x30,0x84,0x00,0xff,
45685 +0x14,0x80,0x00,0x05,0xa5,0x83,0x00,0x00,0x24,0x02,0xff,0xff,0x3c,0x19,0x80,0x01,
45686 +0x08,0x00,0x1c,0x01,0xa5,0x82,0x00,0x02,0x08,0x00,0x1c,0x01,0x3c,0x19,0x80,0x01,
45687 +0x3c,0x08,0xb0,0x03,0x3c,0x02,0x80,0x00,0x27,0xbd,0xff,0x78,0x35,0x08,0x00,0x20,
45688 +0x24,0x42,0x71,0xa0,0xaf,0xb2,0x00,0x68,0xaf,0xb1,0x00,0x64,0xaf,0xb0,0x00,0x60,
45689 +0xad,0x02,0x00,0x00,0xaf,0xbf,0x00,0x84,0xaf,0xbe,0x00,0x80,0xaf,0xb7,0x00,0x7c,
45690 +0xaf,0xb6,0x00,0x78,0xaf,0xb5,0x00,0x74,0xaf,0xb4,0x00,0x70,0xaf,0xb3,0x00,0x6c,
45691 +0xaf,0xa4,0x00,0x88,0x90,0x83,0x00,0x0a,0x27,0x82,0xb4,0x00,0xaf,0xa6,0x00,0x90,
45692 +0x00,0x03,0x18,0x80,0x00,0x62,0x18,0x21,0x8c,0x63,0x00,0x00,0xaf,0xa7,0x00,0x94,
45693 +0x27,0x86,0x90,0x04,0xaf,0xa3,0x00,0x1c,0x94,0x63,0x00,0x14,0x30,0xb1,0xff,0xff,
45694 +0x24,0x08,0x00,0x01,0x00,0x03,0x20,0xc0,0xaf,0xa3,0x00,0x18,0x00,0x83,0x18,0x21,
45695 +0xaf,0xa4,0x00,0x54,0x00,0x03,0x18,0x80,0x27,0x84,0x90,0x10,0x00,0x64,0x20,0x21,
45696 +0x80,0x82,0x00,0x06,0x00,0x66,0x18,0x21,0x8c,0x66,0x00,0x18,0x24,0x42,0x00,0x02,
45697 +0x00,0x02,0x1f,0xc2,0x8c,0xc4,0x00,0x08,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x43,
45698 +0x00,0x02,0x10,0x40,0x00,0x04,0x2f,0xc2,0x00,0x04,0x1c,0x82,0x00,0xc2,0x38,0x21,
45699 +0x00,0x04,0x24,0x42,0x8f,0xa2,0x00,0x1c,0x30,0x63,0x00,0x01,0x30,0x84,0x00,0x01,
45700 +0xaf,0xa5,0x00,0x3c,0xaf,0xa3,0x00,0x34,0xaf,0xa4,0x00,0x38,0xaf,0xa0,0x00,0x40,
45701 +0xaf,0xa0,0x00,0x44,0xaf,0xa0,0x00,0x50,0xaf,0xa8,0x00,0x20,0x80,0x42,0x00,0x12,
45702 +0x8f,0xb2,0x00,0x18,0xaf,0xa2,0x00,0x28,0x8c,0xd0,0x00,0x0c,0x14,0xa0,0x01,0xe4,
45703 +0x00,0x60,0x30,0x21,0x00,0x10,0x10,0x82,0x30,0x45,0x00,0x07,0x10,0xa0,0x00,0x11,
45704 +0xaf,0xa0,0x00,0x30,0x8f,0xa4,0x00,0x98,0x27,0x82,0x80,0x1c,0x00,0x04,0x18,0x40,
45705 +0x00,0x62,0x18,0x21,0x24,0xa2,0x00,0x06,0x8f,0xa5,0x00,0x20,0x94,0x64,0x00,0x00,
45706 +0x00,0x45,0x10,0x04,0x00,0x44,0x00,0x1a,0x14,0x80,0x00,0x02,0x00,0x00,0x00,0x00,
45707 +0x00,0x07,0x00,0x0d,0x00,0x00,0x10,0x12,0x24,0x42,0x00,0x20,0x30,0x42,0xff,0xfc,
45708 +0xaf,0xa2,0x00,0x30,0x8f,0xa3,0x00,0x18,0x8f,0xa4,0x00,0x28,0x34,0x02,0xff,0xff,
45709 +0xaf,0xa0,0x00,0x2c,0xaf,0xa2,0x00,0x48,0xaf,0xa3,0x00,0x4c,0x00,0x60,0xf0,0x21,
45710 +0x00,0x00,0xb8,0x21,0x18,0x80,0x00,0x48,0xaf,0xa0,0x00,0x24,0x00,0x11,0x89,0x02,
45711 +0xaf,0xb1,0x00,0x58,0x00,0x80,0xa8,0x21,0x00,0x12,0x10,0xc0,0x00,0x52,0x18,0x21,
45712 +0x00,0x03,0x80,0x80,0x27,0x85,0x90,0x00,0x02,0x40,0x20,0x21,0x00,0x40,0xa0,0x21,
45713 +0x02,0x05,0x10,0x21,0x94,0x56,0x00,0x02,0x0c,0x00,0x12,0x8b,0x00,0x00,0x28,0x21,
45714 +0x90,0x42,0x00,0x00,0x24,0x03,0x00,0x08,0x30,0x42,0x00,0x0c,0x10,0x43,0x01,0x9e,
45715 +0x24,0x04,0x00,0x01,0x24,0x02,0x00,0x01,0x10,0x82,0x01,0x7c,0x3c,0x02,0xb0,0x03,
45716 +0x8f,0xa6,0x00,0x88,0x34,0x42,0x01,0x04,0x84,0xc5,0x00,0x0c,0x02,0x92,0x18,0x21,
45717 +0x94,0x46,0x00,0x00,0x00,0x05,0x20,0xc0,0x00,0x85,0x20,0x21,0x00,0x03,0x18,0x80,
45718 +0x27,0x82,0x90,0x10,0x27,0x85,0x90,0x08,0x00,0x65,0x28,0x21,0x00,0x62,0x18,0x21,
45719 +0x80,0x71,0x00,0x05,0x80,0x73,0x00,0x04,0x8f,0xa3,0x00,0x88,0x30,0xd0,0xff,0xff,
45720 +0x00,0x10,0x3a,0x03,0x32,0x08,0x00,0xff,0x27,0x82,0x90,0x20,0x00,0x04,0x20,0x80,
45721 +0x80,0xa6,0x00,0x06,0x00,0x82,0x20,0x21,0xa4,0x67,0x00,0x44,0xa4,0x68,0x00,0x46,
45722 +0x8c,0x84,0x00,0x00,0x38,0xc6,0x00,0x00,0x01,0x00,0x80,0x21,0x00,0x04,0x15,0x02,
45723 +0x30,0x42,0x00,0x01,0x10,0x40,0x00,0x03,0x00,0xe6,0x80,0x0a,0x00,0x04,0x14,0x02,
45724 +0x30,0x50,0x00,0x0f,0x12,0x20,0x01,0x50,0x02,0x40,0x20,0x21,0x02,0x71,0x10,0x21,
45725 +0x00,0x50,0x10,0x2a,0x14,0x40,0x00,0xed,0x02,0x92,0x10,0x21,0x93,0x82,0x8b,0x71,
45726 +0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x01,0x14,0x40,0x00,0xe0,0x02,0x92,0x28,0x21,
45727 +0x26,0xe2,0x00,0x01,0x30,0x57,0xff,0xff,0x02,0x40,0xf0,0x21,0x26,0xb5,0xff,0xff,
45728 +0x16,0xa0,0xff,0xbd,0x02,0xc0,0x90,0x21,0x16,0xe0,0x00,0xd0,0x00,0x00,0x00,0x00,
45729 +0x8f,0xa3,0x00,0x98,0x00,0x00,0x00,0x00,0x2c,0x62,0x00,0x10,0x10,0x40,0x00,0x2e,
45730 +0x00,0x00,0x00,0x00,0x8f,0xa4,0x00,0x24,0x00,0x00,0x00,0x00,0x18,0x80,0x00,0x2a,
45731 +0x24,0x03,0x00,0x01,0x8f,0xa5,0x00,0x1c,0x27,0x84,0x90,0x04,0x94,0xb2,0x00,0x14,
45732 +0xa0,0xa3,0x00,0x12,0x8f,0xa6,0x00,0x3c,0x00,0x12,0x10,0xc0,0x00,0x52,0x10,0x21,
45733 +0x00,0x02,0x80,0x80,0x27,0x82,0x90,0x10,0x02,0x02,0x10,0x21,0x80,0x43,0x00,0x06,
45734 +0x02,0x04,0x20,0x21,0x8c,0x85,0x00,0x18,0x24,0x63,0x00,0x02,0x00,0x03,0x17,0xc2,
45735 +0x00,0x62,0x18,0x21,0x00,0x03,0x18,0x43,0x00,0x03,0x18,0x40,0x14,0xc0,0x00,0x0e,
45736 +0x00,0xa3,0x38,0x21,0x27,0x82,0x90,0x00,0x02,0x02,0x10,0x21,0x94,0x43,0x00,0x06,
45737 +0x8f,0xa8,0x00,0x1c,0x24,0x02,0x00,0x01,0xa5,0x03,0x00,0x1a,0x7b,0xbe,0x04,0x3c,
45738 +0x7b,0xb6,0x03,0xfc,0x7b,0xb4,0x03,0xbc,0x7b,0xb2,0x03,0x7c,0x7b,0xb0,0x03,0x3c,
45739 +0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x88,0x8f,0xa4,0x00,0x98,0x8f,0xa5,0x00,0x38,
45740 +0x8f,0xa6,0x00,0x34,0xaf,0xa0,0x00,0x10,0x0c,0x00,0x09,0x0a,0xaf,0xa0,0x00,0x14,
45741 +0x08,0x00,0x1d,0x2d,0x00,0x00,0x00,0x00,0x8f,0xa3,0x00,0x44,0x93,0x82,0x81,0x58,
45742 +0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x61,0x30,0x69,0x00,0x03,0x8f,0xa4,0x00,0x24,
45743 +0x8f,0xa5,0x00,0x28,0x00,0x00,0x00,0x00,0x00,0x85,0x10,0x2a,0x10,0x40,0x00,0x8f,
45744 +0x00,0x00,0x00,0x00,0x8f,0xa6,0x00,0x1c,0x00,0x00,0x00,0x00,0x90,0xc4,0x00,0x04,
45745 +0x00,0x00,0x00,0x00,0x30,0x83,0x00,0xff,0x00,0xa3,0x10,0x2a,0x10,0x40,0x00,0x87,
45746 +0x00,0x00,0x00,0x00,0x8f,0xa8,0x00,0x24,0x00,0x00,0x00,0x00,0x11,0x00,0x00,0x83,
45747 +0x00,0x65,0x10,0x23,0x00,0xa8,0x18,0x23,0x00,0x62,0x10,0x2a,0x14,0x40,0x00,0x7d,
45748 +0x30,0x63,0x00,0xff,0x00,0x85,0x10,0x23,0x30,0x42,0x00,0xff,0xaf,0xa2,0x00,0x50,
45749 +0x8f,0xa2,0x00,0x50,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x73,0x00,0x00,0xa8,0x21,
45750 +0x27,0x8c,0x90,0x00,0x3c,0x0b,0x80,0xff,0x24,0x10,0x00,0x04,0x27,0x91,0x90,0x04,
45751 +0x35,0x6b,0xff,0xff,0x3c,0x0d,0x7f,0x00,0x27,0x8e,0x90,0x10,0x01,0x80,0x78,0x21,
45752 +0x00,0x12,0x30,0xc0,0x00,0xd2,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x4c,0x10,0x21,
45753 +0x94,0x42,0x00,0x06,0x8f,0xa3,0x00,0x2c,0x8f,0xa4,0x00,0x30,0xaf,0xa2,0x00,0x44,
45754 +0x8f,0xa5,0x00,0x44,0x30,0x49,0x00,0x03,0x02,0x09,0x10,0x23,0x30,0x42,0x00,0x03,
45755 +0x00,0xa2,0x10,0x21,0x8f,0xa8,0x00,0x30,0x24,0x42,0x00,0x04,0x30,0x42,0xff,0xff,
45756 +0x00,0x64,0x38,0x21,0x01,0x02,0x28,0x23,0x00,0x62,0x18,0x21,0x00,0x48,0x10,0x2b,
45757 +0x10,0x40,0x00,0x52,0x00,0x00,0x20,0x21,0x30,0xe7,0xff,0xff,0x30,0xa4,0xff,0xff,
45758 +0xaf,0xa7,0x00,0x2c,0x00,0xd2,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x51,0x18,0x21,
45759 +0x8c,0x65,0x00,0x18,0x00,0x04,0x25,0x40,0x00,0x8d,0x20,0x24,0x8c,0xa8,0x00,0x04,
45760 +0x00,0x4e,0x18,0x21,0x00,0x4f,0x50,0x21,0x01,0x0b,0x40,0x24,0x01,0x04,0x40,0x25,
45761 +0xac,0xa8,0x00,0x04,0x8f,0xa4,0x00,0x98,0x8f,0xa2,0x00,0x50,0x26,0xb5,0x00,0x01,
45762 +0xa0,0x64,0x00,0x00,0x8c,0xa4,0x00,0x08,0x00,0x00,0x00,0x00,0x04,0x81,0x00,0x0c,
45763 +0x02,0xa2,0x30,0x2a,0x80,0x62,0x00,0x06,0x00,0x00,0x00,0x00,0x24,0x42,0x00,0x02,
45764 +0x00,0x02,0x1f,0xc2,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x43,0x00,0x02,0x10,0x40,
45765 +0x00,0xa2,0x38,0x21,0x8f,0xa5,0x00,0x40,0x00,0x00,0x00,0x00,0xa4,0xe5,0x00,0x00,
45766 +0x95,0x52,0x00,0x02,0x14,0xc0,0xff,0xc7,0x00,0x12,0x30,0xc0,0x8f,0xa4,0x00,0x24,
45767 +0x8f,0xa5,0x00,0x50,0x8f,0xa6,0x00,0x1c,0x8f,0xa3,0x00,0x2c,0x00,0x85,0x80,0x21,
45768 +0xa0,0xd0,0x00,0x12,0x00,0x09,0x10,0x23,0x30,0x42,0x00,0x03,0x8f,0xa8,0x00,0x88,
45769 +0x00,0x62,0x10,0x23,0xa4,0xc2,0x00,0x1a,0x85,0x03,0x00,0x0c,0x00,0x00,0x00,0x00,
45770 +0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x83,0x90,0x04,
45771 +0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x18,0x00,0x00,0x00,0x00,0x8c,0x83,0x00,0x04,
45772 +0x00,0x00,0x00,0x00,0x30,0x63,0x00,0x10,0x14,0x60,0xff,0x74,0x02,0x00,0x10,0x21,
45773 +0x8f,0xa3,0x00,0x54,0x8f,0xa4,0x00,0x18,0x8f,0xa5,0x00,0x24,0x00,0x64,0x10,0x21,
45774 +0x00,0x02,0x10,0x80,0x27,0x83,0x90,0x18,0x00,0x43,0x10,0x21,0x90,0x44,0x00,0x00,
45775 +0x10,0xa0,0x00,0x03,0x00,0x00,0x30,0x21,0x08,0x00,0x1d,0x33,0x02,0x00,0x10,0x21,
45776 +0x93,0x82,0x80,0x10,0x00,0x00,0x28,0x21,0x00,0x00,0x38,0x21,0x0c,0x00,0x21,0x9a,
45777 +0xaf,0xa2,0x00,0x10,0x08,0x00,0x1d,0x33,0x02,0x00,0x10,0x21,0x30,0x63,0xff,0xff,
45778 +0x08,0x00,0x1d,0x85,0xaf,0xa3,0x00,0x2c,0x8f,0xa8,0x00,0x44,0x08,0x00,0x1d,0xa7,
45779 +0x31,0x09,0x00,0x03,0x08,0x00,0x1d,0x60,0xaf,0xa3,0x00,0x50,0x8f,0xa6,0x00,0x44,
45780 +0xaf,0xa0,0x00,0x50,0x08,0x00,0x1d,0xa7,0x30,0xc9,0x00,0x03,0x8f,0xa5,0x00,0x48,
45781 +0x8f,0xa6,0x00,0x4c,0x8f,0xa4,0x00,0x1c,0x03,0xc0,0x38,0x21,0x0c,0x00,0x1b,0xd8,
45782 +0xaf,0xb7,0x00,0x10,0x08,0x00,0x1d,0x10,0x00,0x00,0x00,0x00,0x00,0x05,0x28,0x80,
45783 +0x27,0x82,0x90,0x00,0x00,0xa2,0x28,0x21,0x00,0x00,0x20,0x21,0x0c,0x00,0x01,0x49,
45784 +0x00,0x00,0x00,0x00,0x08,0x00,0x1d,0x09,0x26,0xe2,0x00,0x01,0x00,0x02,0x80,0x80,
45785 +0x27,0x83,0x90,0x10,0x8f,0xa4,0x00,0x1c,0x02,0x03,0x18,0x21,0x26,0x31,0x00,0x01,
45786 +0x02,0x40,0x28,0x21,0x0c,0x00,0x1e,0xea,0xa0,0x71,0x00,0x05,0x14,0x40,0xff,0x13,
45787 +0x00,0x00,0x00,0x00,0x16,0xe0,0x00,0x4d,0x03,0xc0,0x38,0x21,0x8f,0xa4,0x00,0x24,
45788 +0x8f,0xa5,0x00,0x20,0x24,0x02,0x00,0x01,0x24,0x84,0x00,0x01,0xaf,0xb2,0x00,0x48,
45789 +0xaf,0xb6,0x00,0x4c,0x02,0xc0,0xf0,0x21,0x10,0xa2,0x00,0x41,0xaf,0xa4,0x00,0x24,
45790 +0x27,0x82,0x90,0x00,0x02,0x02,0x10,0x21,0x94,0x42,0x00,0x06,0x8f,0xa4,0x00,0x30,
45791 +0xaf,0xa0,0x00,0x20,0xaf,0xa2,0x00,0x44,0x30,0x49,0x00,0x03,0x8f,0xa8,0x00,0x44,
45792 +0x00,0x09,0x10,0x23,0x30,0x42,0x00,0x03,0x01,0x02,0x10,0x21,0x24,0x42,0x00,0x04,
45793 +0x30,0x42,0xff,0xff,0x00,0x44,0x18,0x2b,0x10,0x60,0x00,0x2b,0x00,0x00,0x00,0x00,
45794 +0x8f,0xa5,0x00,0x2c,0x00,0x82,0x10,0x23,0x00,0xa4,0x18,0x21,0x30,0x63,0xff,0xff,
45795 +0x30,0x44,0xff,0xff,0xaf,0xa3,0x00,0x2c,0x02,0x92,0x28,0x21,0x00,0x05,0x28,0x80,
45796 +0x27,0x82,0x90,0x04,0x00,0xa2,0x10,0x21,0x8c,0x46,0x00,0x18,0x3c,0x03,0x80,0xff,
45797 +0x3c,0x02,0x7f,0x00,0x8c,0xc8,0x00,0x04,0x00,0x04,0x25,0x40,0x34,0x63,0xff,0xff,
45798 +0x00,0x82,0x20,0x24,0x01,0x03,0x40,0x24,0x01,0x04,0x40,0x25,0xac,0xc8,0x00,0x04,
45799 +0x8f,0xa8,0x00,0x98,0x27,0x82,0x90,0x10,0x00,0xa2,0x10,0x21,0xa0,0x48,0x00,0x00,
45800 +0x8c,0xc4,0x00,0x08,0x00,0x00,0x00,0x00,0x00,0x04,0x27,0xc2,0x10,0x80,0xfe,0xdb,
45801 +0xaf,0xa4,0x00,0x3c,0x80,0x42,0x00,0x06,0x00,0x00,0x00,0x00,0x24,0x42,0x00,0x02,
45802 +0x00,0x02,0x1f,0xc2,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x43,0x00,0x02,0x10,0x40,
45803 +0x00,0xc2,0x38,0x21,0x8f,0xa2,0x00,0x40,0x00,0x00,0x00,0x00,0xa4,0xe2,0x00,0x00,
45804 +0x08,0x00,0x1d,0x0c,0x26,0xb5,0xff,0xff,0x8f,0xa6,0x00,0x2c,0x00,0x00,0x20,0x21,
45805 +0x00,0xc2,0x10,0x21,0x30,0x42,0xff,0xff,0x08,0x00,0x1e,0x1a,0xaf,0xa2,0x00,0x2c,
45806 +0x8f,0xa6,0x00,0x1c,0x08,0x00,0x1e,0x04,0xa4,0xd2,0x00,0x14,0x8f,0xa5,0x00,0x48,
45807 +0x8f,0xa6,0x00,0x4c,0x8f,0xa4,0x00,0x1c,0x0c,0x00,0x1b,0xd8,0xaf,0xb7,0x00,0x10,
45808 +0x08,0x00,0x1d,0xfb,0x00,0x00,0xb8,0x21,0x0c,0x00,0x12,0x8b,0x00,0x00,0x28,0x21,
45809 +0x00,0x40,0x18,0x21,0x94,0x42,0x00,0x00,0x00,0x00,0x00,0x00,0x34,0x42,0x08,0x00,
45810 +0xa4,0x62,0x00,0x00,0x08,0x00,0x1d,0x00,0x02,0x71,0x10,0x21,0x02,0x92,0x18,0x21,
45811 +0x00,0x03,0x80,0x80,0x27,0x82,0x90,0x04,0x02,0x02,0x10,0x21,0x8c,0x44,0x00,0x18,
45812 +0x00,0x00,0x00,0x00,0x8c,0x83,0x00,0x04,0x00,0x00,0x00,0x00,0x30,0x63,0x00,0x10,
45813 +0x10,0x60,0x00,0x09,0x24,0x06,0x00,0x01,0x93,0x82,0x8b,0x71,0x00,0x00,0x00,0x00,
45814 +0x30,0x42,0x00,0x01,0x10,0x40,0xfe,0xa2,0x3c,0x04,0x00,0x80,0x27,0x85,0x90,0x00,
45815 +0x08,0x00,0x1d,0xeb,0x02,0x05,0x28,0x21,0x27,0x83,0x90,0x18,0x27,0x82,0x90,0x10,
45816 +0x02,0x03,0x18,0x21,0x02,0x02,0x10,0x21,0x90,0x64,0x00,0x00,0x90,0x45,0x00,0x05,
45817 +0x93,0x83,0x80,0x10,0x00,0x00,0x38,0x21,0x0c,0x00,0x21,0x9a,0xaf,0xa3,0x00,0x10,
45818 +0x08,0x00,0x1e,0x62,0x00,0x00,0x00,0x00,0x27,0x82,0x90,0x18,0x02,0x02,0x10,0x21,
45819 +0x94,0x43,0x00,0x02,0x8f,0xa6,0x00,0x58,0x00,0x03,0x19,0x02,0x00,0x66,0x18,0x23,
45820 +0x30,0x63,0x0f,0xff,0x28,0x62,0x00,0x20,0x10,0x40,0x00,0x06,0x28,0x62,0x00,0x40,
45821 +0x8f,0xa8,0x00,0x90,0x00,0x00,0x00,0x00,0x00,0x68,0x10,0x06,0x08,0x00,0x1c,0xd9,
45822 +0x30,0x44,0x00,0x01,0x10,0x40,0x00,0x04,0x00,0x00,0x00,0x00,0x8f,0xa4,0x00,0x94,
45823 +0x08,0x00,0x1e,0x83,0x00,0x64,0x10,0x06,0x08,0x00,0x1c,0xd9,0x00,0x00,0x20,0x21,
45824 +0x8f,0xa4,0x00,0x98,0x8f,0xa5,0x00,0x38,0xaf,0xa0,0x00,0x10,0x0c,0x00,0x09,0x0a,
45825 +0xaf,0xa8,0x00,0x14,0x30,0x42,0xff,0xff,0x08,0x00,0x1c,0xa9,0xaf,0xa2,0x00,0x40,
45826 +0x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x00,0x27,0xbd,0xff,0xe0,0x34,0x42,0x00,0x20,
45827 +0x24,0x63,0x7a,0x50,0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x18,
45828 +0xac,0x43,0x00,0x00,0x90,0x82,0x00,0x0a,0x00,0x80,0x80,0x21,0x14,0x40,0x00,0x45,
45829 +0x00,0x00,0x88,0x21,0x92,0x02,0x00,0x04,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x3c,
45830 +0x00,0x00,0x00,0x00,0x12,0x20,0x00,0x18,0x00,0x00,0x00,0x00,0x92,0x02,0x00,0x16,
45831 +0x92,0x05,0x00,0x0a,0x30,0x42,0x00,0xfc,0x10,0xa0,0x00,0x03,0xa2,0x02,0x00,0x16,
45832 +0x34,0x42,0x00,0x01,0xa2,0x02,0x00,0x16,0x92,0x04,0x00,0x04,0x00,0x00,0x00,0x00,
45833 +0x30,0x83,0x00,0xff,0x10,0x60,0x00,0x05,0x00,0x00,0x00,0x00,0x92,0x02,0x00,0x16,
45834 +0x00,0x00,0x00,0x00,0x34,0x42,0x00,0x02,0xa2,0x02,0x00,0x16,0x10,0x60,0x00,0x0a,
45835 +0x00,0x00,0x00,0x00,0x14,0xa0,0x00,0x08,0x00,0x00,0x00,0x00,0x96,0x02,0x00,0x00,
45836 +0xa2,0x00,0x00,0x17,0xa6,0x02,0x00,0x14,0x8f,0xbf,0x00,0x18,0x7b,0xb0,0x00,0xbc,
45837 +0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x14,0x80,0x00,0x05,0x24,0x02,0x00,0x01,
45838 +0x96,0x03,0x00,0x06,0xa2,0x02,0x00,0x17,0x08,0x00,0x1e,0xbe,0xa6,0x03,0x00,0x14,
45839 +0x96,0x04,0x00,0x00,0x96,0x05,0x00,0x06,0x27,0x86,0x90,0x00,0x00,0x04,0x10,0xc0,
45840 +0x00,0x05,0x18,0xc0,0x00,0x44,0x10,0x21,0x00,0x65,0x18,0x21,0x00,0x02,0x10,0x80,
45841 +0x00,0x03,0x18,0x80,0x00,0x66,0x18,0x21,0x00,0x46,0x10,0x21,0x8c,0x65,0x00,0x08,
45842 +0x8c,0x44,0x00,0x08,0x0c,0x00,0x12,0x7c,0x00,0x00,0x00,0x00,0x30,0x43,0x00,0xff,
45843 +0x10,0x60,0x00,0x04,0xa2,0x02,0x00,0x17,0x96,0x02,0x00,0x06,0x08,0x00,0x1e,0xbe,
45844 +0xa6,0x02,0x00,0x14,0x96,0x02,0x00,0x00,0x08,0x00,0x1e,0xbe,0xa6,0x02,0x00,0x14,
45845 +0x96,0x05,0x00,0x00,0x0c,0x00,0x1e,0xea,0x02,0x00,0x20,0x21,0x08,0x00,0x1e,0xa5,
45846 +0x02,0x22,0x88,0x21,0x94,0x85,0x00,0x06,0x0c,0x00,0x1e,0xea,0x00,0x00,0x00,0x00,
45847 +0x08,0x00,0x1e,0xa1,0x00,0x40,0x88,0x21,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,
45848 +0x34,0x63,0x00,0x20,0x24,0x42,0x7b,0xa8,0x27,0xbd,0xff,0xf0,0xac,0x62,0x00,0x00,
45849 +0x00,0x00,0x10,0x21,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x10,0x3c,0x03,0xb0,0x03,
45850 +0x3c,0x02,0x80,0x00,0x34,0x63,0x00,0x20,0x24,0x42,0x7b,0xcc,0xac,0x62,0x00,0x00,
45851 +0x90,0x89,0x00,0x0a,0x00,0x80,0x30,0x21,0x11,0x20,0x00,0x05,0x00,0xa0,0x50,0x21,
45852 +0x90,0x82,0x00,0x17,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x1b,0x00,0x00,0x00,0x00,
45853 +0x90,0xc7,0x00,0x04,0x00,0x00,0x00,0x00,0x10,0xe0,0x00,0x1b,0x00,0x00,0x00,0x00,
45854 +0x94,0xc8,0x00,0x00,0x27,0x83,0x90,0x00,0x93,0x85,0x8b,0x70,0x00,0x08,0x10,0xc0,
45855 +0x00,0x48,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x08,
45856 +0x00,0xe5,0x28,0x2b,0x10,0xa0,0x00,0x06,0x01,0x44,0x18,0x23,0x8f,0x82,0x8b,0x88,
45857 +0x00,0x00,0x00,0x00,0x00,0x43,0x10,0x2b,0x10,0x40,0x00,0x05,0x00,0x00,0x00,0x00,
45858 +0x24,0x03,0x00,0x10,0xa4,0xc8,0x00,0x14,0x03,0xe0,0x00,0x08,0x00,0x60,0x10,0x21,
45859 +0x11,0x20,0x00,0x05,0x00,0x00,0x00,0x00,0x94,0xc2,0x00,0x06,0x24,0x03,0x00,0x08,
45860 +0x08,0x00,0x1f,0x16,0xa4,0xc2,0x00,0x14,0x08,0x00,0x1f,0x16,0x00,0x00,0x18,0x21,
45861 +0x27,0xbd,0xff,0xc8,0xaf,0xb5,0x00,0x2c,0xaf,0xb4,0x00,0x28,0xaf,0xb3,0x00,0x24,
45862 +0xaf,0xb0,0x00,0x18,0xaf,0xbf,0x00,0x30,0xaf,0xb2,0x00,0x20,0xaf,0xb1,0x00,0x1c,
45863 +0x94,0x91,0x00,0x06,0x00,0x80,0xa0,0x21,0x3c,0x02,0x80,0x00,0x3c,0x04,0xb0,0x03,
45864 +0x00,0x11,0xa8,0xc0,0x34,0x84,0x00,0x20,0x24,0x42,0x7c,0x80,0x02,0xb1,0x48,0x21,
45865 +0xac,0x82,0x00,0x00,0x00,0x09,0x48,0x80,0x24,0x03,0x00,0x01,0x27,0x82,0x90,0x10,
45866 +0xa2,0x83,0x00,0x12,0x01,0x22,0x10,0x21,0x27,0x84,0x90,0x04,0x01,0x24,0x20,0x21,
45867 +0x80,0x48,0x00,0x06,0x8c,0x8a,0x00,0x18,0x27,0x83,0x90,0x20,0x01,0x23,0x48,0x21,
45868 +0x8d,0x24,0x00,0x00,0x25,0x08,0x00,0x02,0x8d,0x42,0x00,0x00,0x8d,0x49,0x00,0x04,
45869 +0x00,0x08,0x17,0xc2,0x8d,0x43,0x00,0x08,0x01,0x02,0x40,0x21,0x00,0x04,0x25,0xc2,
45870 +0x00,0x08,0x40,0x43,0x30,0x84,0x00,0x01,0x00,0x03,0x1f,0xc2,0x00,0x08,0x40,0x40,
45871 +0x00,0xe0,0x80,0x21,0x00,0x64,0x18,0x24,0x00,0x09,0x49,0x42,0x01,0x48,0x10,0x21,
45872 +0x00,0xa0,0x98,0x21,0x00,0xa0,0x20,0x21,0x00,0x40,0x38,0x21,0x02,0x00,0x28,0x21,
45873 +0x14,0x60,0x00,0x19,0x31,0x29,0x00,0x01,0x94,0x42,0x00,0x00,0x02,0xb1,0x88,0x21,
45874 +0x02,0x00,0x28,0x21,0x00,0x11,0x88,0x80,0x27,0x90,0x90,0x00,0x02,0x30,0x80,0x21,
45875 +0x96,0x03,0x00,0x06,0x30,0x52,0xff,0xff,0x02,0x60,0x20,0x21,0x00,0x60,0x30,0x21,
45876 +0xa6,0x83,0x00,0x1a,0x27,0x82,0x90,0x08,0x0c,0x00,0x08,0xe3,0x02,0x22,0x88,0x21,
45877 +0x00,0x52,0x10,0x21,0x96,0x03,0x00,0x06,0xa6,0x22,0x00,0x04,0x8f,0xbf,0x00,0x30,
45878 +0x7b,0xb4,0x01,0x7c,0x7b,0xb2,0x01,0x3c,0x7b,0xb0,0x00,0xfc,0x00,0x60,0x10,0x21,
45879 +0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x38,0xaf,0xa9,0x00,0x10,0x0c,0x00,0x09,0x0a,
45880 +0xaf,0xa0,0x00,0x14,0x08,0x00,0x1f,0x54,0x02,0xb1,0x88,0x21,0x27,0xbd,0xff,0xc0,
45881 +0xaf,0xbe,0x00,0x38,0xaf,0xb7,0x00,0x34,0xaf,0xb6,0x00,0x30,0xaf,0xb5,0x00,0x2c,
45882 +0xaf,0xb3,0x00,0x24,0xaf,0xb1,0x00,0x1c,0xaf,0xbf,0x00,0x3c,0xaf,0xb4,0x00,0x28,
45883 +0xaf,0xb2,0x00,0x20,0xaf,0xb0,0x00,0x18,0x94,0x90,0x00,0x00,0x3c,0x08,0xb0,0x03,
45884 +0x35,0x08,0x00,0x20,0x00,0x10,0x10,0xc0,0x00,0x50,0x18,0x21,0x00,0x40,0x88,0x21,
45885 +0x3c,0x02,0x80,0x00,0x00,0x03,0x48,0x80,0x24,0x42,0x7d,0xbc,0x00,0x80,0x98,0x21,
45886 +0x27,0x84,0x90,0x10,0x01,0x24,0x20,0x21,0x93,0xb7,0x00,0x53,0xad,0x02,0x00,0x00,
45887 +0x80,0x83,0x00,0x06,0x27,0x82,0x90,0x04,0x01,0x22,0x10,0x21,0x8c,0x44,0x00,0x18,
45888 +0x24,0x63,0x00,0x02,0x00,0x03,0x17,0xc2,0x8c,0x88,0x00,0x08,0x00,0x62,0x18,0x21,
45889 +0x00,0x03,0x18,0x43,0x00,0x03,0x18,0x40,0xaf,0xa7,0x00,0x4c,0x2c,0xa2,0x00,0x10,
45890 +0x00,0xa0,0xa8,0x21,0x00,0x83,0x50,0x21,0x00,0x08,0x47,0xc2,0x00,0xc0,0x58,0x21,
45891 +0x00,0x00,0xb0,0x21,0x8c,0x92,0x00,0x0c,0x14,0x40,0x00,0x13,0x00,0x00,0xf0,0x21,
45892 +0x92,0x67,0x00,0x04,0x24,0x14,0x00,0x01,0x12,0x87,0x00,0x10,0x02,0x30,0x10,0x21,
45893 +0x27,0x83,0x90,0x18,0x01,0x23,0x18,0x21,0x80,0x64,0x00,0x00,0x27,0x83,0xb5,0x70,
45894 +0x00,0x04,0x11,0x00,0x00,0x44,0x10,0x23,0x00,0x02,0x10,0x80,0x00,0x44,0x10,0x23,
45895 +0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x90,0x44,0x00,0x04,0x00,0x00,0x00,0x00,
45896 +0x10,0x80,0x00,0x23,0x00,0x00,0x00,0x00,0x02,0x30,0x10,0x21,0x00,0x02,0x80,0x80,
45897 +0x24,0x04,0x00,0x01,0x27,0x83,0x90,0x20,0xa2,0x64,0x00,0x12,0x02,0x03,0x18,0x21,
45898 +0x8c,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x15,0xc2,0x30,0x42,0x00,0x01,
45899 +0x01,0x02,0x10,0x24,0x14,0x40,0x00,0x0e,0x02,0xa0,0x20,0x21,0x27,0x82,0x90,0x00,
45900 +0x02,0x02,0x10,0x21,0x94,0x43,0x00,0x06,0x00,0x00,0x00,0x00,0xa6,0x63,0x00,0x1a,
45901 +0x94,0x42,0x00,0x06,0x7b,0xbe,0x01,0xfc,0x7b,0xb6,0x01,0xbc,0x7b,0xb4,0x01,0x7c,
45902 +0x7b,0xb2,0x01,0x3c,0x7b,0xb0,0x00,0xfc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x40,
45903 +0x8f,0xa5,0x00,0x4c,0x01,0x60,0x30,0x21,0x01,0x40,0x38,0x21,0xaf,0xa0,0x00,0x10,
45904 +0x0c,0x00,0x09,0x0a,0xaf,0xa0,0x00,0x14,0x08,0x00,0x1f,0xbb,0x00,0x00,0x00,0x00,
45905 +0x27,0x83,0x90,0x20,0x01,0x23,0x18,0x21,0x8c,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
45906 +0x00,0x02,0x15,0xc2,0x30,0x42,0x00,0x01,0x01,0x02,0x10,0x24,0x14,0x40,0x00,0xaf,
45907 +0x00,0xa0,0x20,0x21,0x32,0x4f,0x00,0x03,0x00,0x12,0x10,0x82,0x25,0xe3,0x00,0x0d,
45908 +0x30,0x45,0x00,0x07,0x00,0x74,0x78,0x04,0x10,0xa0,0x00,0x0e,0x00,0x00,0x90,0x21,
45909 +0x27,0x82,0x80,0x1c,0x00,0x15,0x18,0x40,0x00,0x62,0x18,0x21,0x94,0x64,0x00,0x00,
45910 +0x24,0xa2,0x00,0x06,0x00,0x54,0x10,0x04,0x00,0x44,0x00,0x1a,0x14,0x80,0x00,0x02,
45911 +0x00,0x00,0x00,0x00,0x00,0x07,0x00,0x0d,0x00,0x00,0x10,0x12,0x24,0x42,0x00,0x20,
45912 +0x30,0x52,0xff,0xfc,0x02,0x30,0x10,0x21,0x27,0x83,0x90,0x10,0x00,0x02,0x10,0x80,
45913 +0x00,0x43,0x10,0x21,0x90,0x44,0x00,0x03,0x00,0x00,0x00,0x00,0x30,0x83,0x00,0xff,
45914 +0x2c,0x62,0x00,0x0c,0x14,0x40,0x00,0x04,0x2c,0x62,0x00,0x19,0x30,0x82,0x00,0x0f,
45915 +0x24,0x43,0x00,0x0c,0x2c,0x62,0x00,0x19,0x10,0x40,0x00,0x19,0x24,0x0e,0x00,0x20,
45916 +0x24,0x62,0xff,0xe9,0x2c,0x42,0x00,0x02,0x14,0x40,0x00,0x15,0x24,0x0e,0x00,0x10,
45917 +0x24,0x62,0xff,0xeb,0x2c,0x42,0x00,0x02,0x14,0x40,0x00,0x11,0x24,0x0e,0x00,0x08,
45918 +0x24,0x02,0x00,0x14,0x10,0x62,0x00,0x0e,0x24,0x0e,0x00,0x02,0x24,0x62,0xff,0xef,
45919 +0x2c,0x42,0x00,0x03,0x14,0x40,0x00,0x0a,0x24,0x0e,0x00,0x10,0x24,0x62,0xff,0xf1,
45920 +0x2c,0x42,0x00,0x02,0x14,0x40,0x00,0x06,0x24,0x0e,0x00,0x08,0x24,0x62,0xff,0xf3,
45921 +0x2c,0x42,0x00,0x02,0x24,0x0e,0x00,0x04,0x24,0x03,0x00,0x02,0x00,0x62,0x70,0x0a,
45922 +0x30,0xe2,0x00,0xff,0x00,0x00,0x48,0x21,0x00,0x00,0x68,0x21,0x10,0x40,0x00,0x6d,
45923 +0x00,0x00,0x58,0x21,0x3c,0x14,0x80,0xff,0x27,0x99,0x90,0x00,0x01,0xf2,0xc0,0x23,
45924 +0x36,0x94,0xff,0xff,0x01,0xc9,0x10,0x2a,0x14,0x40,0x00,0x64,0x24,0x03,0x00,0x04,
45925 +0x00,0x10,0x28,0xc0,0x00,0xb0,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x59,0x10,0x21,
45926 +0x94,0x56,0x00,0x06,0x00,0x00,0x00,0x00,0x32,0xcc,0x00,0x03,0x00,0x6c,0x10,0x23,
45927 +0x30,0x42,0x00,0x03,0x02,0xc2,0x10,0x21,0x24,0x42,0x00,0x04,0x30,0x51,0xff,0xff,
45928 +0x02,0x32,0x18,0x2b,0x10,0x60,0x00,0x4d,0x01,0xf1,0x10,0x23,0x02,0x51,0x10,0x23,
45929 +0x01,0x78,0x18,0x2b,0x10,0x60,0x00,0x34,0x30,0x44,0xff,0xff,0x29,0x22,0x00,0x40,
45930 +0x10,0x40,0x00,0x31,0x01,0x72,0x18,0x21,0x25,0x22,0x00,0x01,0x00,0x02,0x16,0x00,
45931 +0x00,0x02,0x4e,0x03,0x00,0xb0,0x10,0x21,0x00,0x02,0x30,0x80,0x27,0x82,0x90,0x04,
45932 +0x30,0x6b,0xff,0xff,0x00,0xc2,0x18,0x21,0x8c,0x67,0x00,0x18,0x00,0x04,0x25,0x40,
45933 +0x3c,0x03,0x7f,0x00,0x8c,0xe2,0x00,0x04,0x00,0x83,0x20,0x24,0x27,0x83,0x90,0x10,
45934 +0x00,0x54,0x10,0x24,0x00,0xc3,0x28,0x21,0x00,0x44,0x10,0x25,0xac,0xe2,0x00,0x04,
45935 +0x16,0xe0,0x00,0x02,0xa0,0xb5,0x00,0x00,0xa0,0xb5,0x00,0x03,0x27,0x84,0x90,0x20,
45936 +0x00,0xc4,0x18,0x21,0x8c,0x62,0x00,0x00,0x8c,0xe8,0x00,0x08,0x00,0x02,0x15,0xc2,
45937 +0x00,0x08,0x47,0xc2,0x30,0x42,0x00,0x01,0x01,0x02,0x10,0x24,0x10,0x40,0x00,0x0a,
45938 +0x00,0x00,0x00,0x00,0x80,0xa2,0x00,0x06,0x00,0x00,0x00,0x00,0x24,0x42,0x00,0x02,
45939 +0x00,0x02,0x1f,0xc2,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x43,0x00,0x02,0x10,0x40,
45940 +0x00,0xe2,0x50,0x21,0xa5,0x5e,0x00,0x00,0x92,0x62,0x00,0x04,0x25,0xad,0x00,0x01,
45941 +0x27,0x84,0x90,0x00,0x00,0xc4,0x18,0x21,0x01,0xa2,0x10,0x2a,0x94,0x70,0x00,0x02,
45942 +0x14,0x40,0xff,0xb8,0x00,0x00,0x00,0x00,0x96,0x63,0x00,0x14,0x00,0x0c,0x10,0x23,
45943 +0xa2,0x69,0x00,0x12,0x30,0x42,0x00,0x03,0x01,0x62,0x10,0x23,0x00,0x03,0x80,0xc0,
45944 +0x8f,0xa5,0x00,0x4c,0x30,0x4b,0xff,0xff,0x02,0x03,0x80,0x21,0x27,0x82,0x90,0x08,
45945 +0x00,0x10,0x80,0x80,0xa6,0x6b,0x00,0x1a,0x02,0xa0,0x20,0x21,0x01,0x60,0x30,0x21,
45946 +0x01,0x60,0x88,0x21,0x0c,0x00,0x08,0xe3,0x02,0x02,0x80,0x21,0x00,0x5e,0x10,0x21,
45947 +0xa6,0x02,0x00,0x04,0x08,0x00,0x1f,0xc1,0x02,0x20,0x10,0x21,0x01,0x62,0x10,0x2b,
45948 +0x10,0x40,0xff,0xe9,0x00,0x00,0x20,0x21,0x29,0x22,0x00,0x40,0x10,0x40,0xff,0xe6,
45949 +0x01,0x71,0x18,0x21,0x08,0x00,0x20,0x37,0x25,0x22,0x00,0x01,0x08,0x00,0x20,0x66,
45950 +0x32,0xcc,0x00,0x03,0x08,0x00,0x20,0x66,0x00,0x00,0x60,0x21,0x8f,0xa5,0x00,0x4c,
45951 +0x01,0x40,0x38,0x21,0xaf,0xa0,0x00,0x10,0x0c,0x00,0x09,0x0a,0xaf,0xb4,0x00,0x14,
45952 +0x92,0x67,0x00,0x04,0x08,0x00,0x1f,0xd9,0x30,0x5e,0xff,0xff,0x30,0x84,0xff,0xff,
45953 +0x00,0x04,0x30,0xc0,0x00,0xc4,0x20,0x21,0x00,0x04,0x20,0x80,0x27,0x82,0x90,0x00,
45954 +0x3c,0x03,0xb0,0x08,0x30,0xa5,0xff,0xff,0x00,0x82,0x20,0x21,0x00,0xc3,0x30,0x21,
45955 +0xac,0xc5,0x00,0x00,0x03,0xe0,0x00,0x08,0xa4,0x85,0x00,0x00,0x30,0x84,0xff,0xff,
45956 +0x00,0x04,0x30,0xc0,0x00,0xc4,0x30,0x21,0x27,0x88,0x90,0x00,0x00,0x06,0x30,0x80,
45957 +0x00,0xc8,0x30,0x21,0x94,0xc3,0x00,0x04,0x3c,0x02,0xb0,0x08,0x3c,0x07,0xb0,0x03,
45958 +0x00,0x03,0x20,0xc0,0x00,0x83,0x18,0x21,0x00,0x03,0x18,0x80,0x00,0x82,0x20,0x21,
45959 +0x3c,0x02,0x80,0x01,0x30,0xa5,0xff,0xff,0x00,0x68,0x18,0x21,0x34,0xe7,0x00,0x20,
45960 +0x24,0x42,0x82,0x6c,0xac,0xe2,0x00,0x00,0xa4,0xc5,0x00,0x02,0xa4,0x65,0x00,0x00,
45961 +0x03,0xe0,0x00,0x08,0xac,0x85,0x00,0x00,0x30,0x84,0xff,0xff,0x00,0x04,0x10,0xc0,
45962 +0x00,0x44,0x10,0x21,0x27,0x89,0x90,0x00,0x00,0x02,0x10,0x80,0x00,0x49,0x10,0x21,
45963 +0x97,0x83,0x8f,0xf0,0x94,0x4a,0x00,0x04,0x3c,0x02,0xb0,0x08,0x00,0x03,0x38,0xc0,
45964 +0x00,0x0a,0x40,0xc0,0x00,0xe3,0x18,0x21,0x01,0x0a,0x28,0x21,0x00,0xe2,0x38,0x21,
45965 +0x01,0x02,0x40,0x21,0x00,0x03,0x18,0x80,0x00,0x05,0x28,0x80,0x3c,0x06,0xb0,0x03,
45966 +0x3c,0x02,0x80,0x01,0x00,0xa9,0x28,0x21,0x00,0x69,0x18,0x21,0x34,0xc6,0x00,0x20,
45967 +0x34,0x09,0xff,0xff,0x24,0x42,0x82,0xc8,0xac,0xc2,0x00,0x00,0xa4,0x64,0x00,0x00,
45968 +0xac,0xe4,0x00,0x00,0xa4,0xa9,0x00,0x00,0xad,0x09,0x00,0x00,0xa7,0x8a,0x8f,0xf0,
45969 +0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x01,
45970 +0x34,0x63,0x00,0x20,0x24,0x42,0x83,0x48,0x3c,0x04,0xb0,0x03,0xac,0x62,0x00,0x00,
45971 +0x34,0x84,0x01,0x10,0x8c,0x82,0x00,0x00,0x97,0x83,0x81,0x60,0x30,0x42,0xff,0xff,
45972 +0x10,0x62,0x00,0x16,0x24,0x0a,0x00,0x01,0xa7,0x82,0x81,0x60,0xaf,0x80,0xb4,0x50,
45973 +0x00,0x40,0x28,0x21,0x24,0x06,0x00,0x01,0x27,0x84,0xb4,0x54,0x25,0x43,0xff,0xff,
45974 +0x00,0x66,0x10,0x04,0x00,0xa2,0x10,0x24,0x14,0x40,0x00,0x07,0x00,0x00,0x00,0x00,
45975 +0x8c,0x83,0xff,0xfc,0x00,0x00,0x00,0x00,0x00,0x66,0x10,0x04,0x00,0xa2,0x10,0x24,
45976 +0x38,0x42,0x00,0x00,0x01,0x42,0x18,0x0a,0x25,0x4a,0x00,0x01,0x2d,0x42,0x00,0x14,
45977 +0xac,0x83,0x00,0x00,0x14,0x40,0xff,0xf1,0x24,0x84,0x00,0x04,0x3c,0x0b,0xb0,0x03,
45978 +0x00,0x00,0x50,0x21,0x3c,0x0c,0x80,0x00,0x27,0x89,0xb4,0xa0,0x35,0x6b,0x01,0x20,
45979 +0x8d,0x68,0x00,0x00,0x8d,0x23,0x00,0x04,0x01,0x0c,0x10,0x24,0x00,0x02,0x17,0xc2,
45980 +0x11,0x03,0x00,0x37,0xa1,0x22,0x00,0xdc,0xa1,0x20,0x00,0xd5,0xa1,0x20,0x00,0xd6,
45981 +0x01,0x20,0x30,0x21,0x00,0x00,0x38,0x21,0x00,0x00,0x28,0x21,0x01,0x20,0x20,0x21,
45982 +0x00,0xa8,0x10,0x06,0x30,0x42,0x00,0x01,0x10,0xe0,0x00,0x10,0xa0,0x82,0x00,0x0a,
45983 +0x90,0x82,0x00,0x07,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x31,0x24,0xa2,0xff,0xff,
45984 +0xa0,0x82,0x00,0x08,0x90,0x82,0x00,0x0a,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x09,
45985 +0x00,0x00,0x00,0x00,0x90,0x83,0x00,0x08,0x00,0x00,0x00,0x00,0x00,0x03,0x10,0x40,
45986 +0x00,0x43,0x10,0x21,0x00,0x46,0x10,0x21,0xa0,0x45,0x00,0x09,0x90,0x82,0x00,0x0a,
45987 +0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x07,0x00,0x00,0x00,0x00,0x14,0xe0,0x00,0x04,
45988 +0x00,0x00,0x00,0x00,0xa0,0xc5,0x00,0xd5,0x24,0x07,0x00,0x01,0xa0,0x85,0x00,0x08,
45989 +0xa0,0xc5,0x00,0xd6,0x24,0xa5,0x00,0x01,0x2c,0xa2,0x00,0x1c,0x14,0x40,0xff,0xe0,
45990 +0x24,0x84,0x00,0x03,0x90,0xc4,0x00,0xd5,0x00,0x00,0x28,0x21,0x00,0xa4,0x10,0x2b,
45991 +0x10,0x40,0x00,0x0b,0x00,0x00,0x00,0x00,0x00,0xc0,0x18,0x21,0xa0,0x64,0x00,0x08,
45992 +0x90,0xc2,0x00,0xd5,0x24,0xa5,0x00,0x01,0xa0,0x62,0x00,0x09,0x90,0xc4,0x00,0xd5,
45993 +0x00,0x00,0x00,0x00,0x00,0xa4,0x10,0x2b,0x14,0x40,0xff,0xf8,0x24,0x63,0x00,0x03,
45994 +0x25,0x4a,0x00,0x01,0x2d,0x42,0x00,0x08,0xad,0x28,0x00,0x04,0x25,0x6b,0x00,0x04,
45995 +0x14,0x40,0xff,0xbf,0x25,0x29,0x00,0xec,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
45996 +0x90,0x82,0x00,0x05,0x08,0x00,0x21,0x0d,0xa0,0x82,0x00,0x08,0x97,0x85,0x8b,0x7a,
45997 +0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x01,0x27,0xbd,0xff,0xe8,0x34,0x63,0x00,0x20,
45998 +0x24,0x42,0x84,0xfc,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x14,0xac,0x62,0x00,0x00,
45999 +0x30,0x90,0x00,0xff,0x00,0x05,0x28,0x42,0x00,0x00,0x48,0x21,0x27,0x8f,0xb4,0xa4,
46000 +0x00,0x00,0x50,0x21,0x00,0x00,0x58,0x21,0x27,0x98,0xb5,0x84,0x27,0x99,0xb5,0x80,
46001 +0x27,0x8e,0xb5,0x7e,0x27,0x8c,0xb4,0xa8,0x27,0x8d,0xb5,0x00,0x27,0x88,0xb5,0x78,
46002 +0x00,0x0a,0x18,0x80,0x01,0x6f,0x10,0x21,0xac,0x40,0x00,0x00,0xac,0x45,0x00,0x58,
46003 +0x00,0x6e,0x20,0x21,0x00,0x78,0x10,0x21,0xa1,0x00,0xff,0xfc,0xad,0x00,0x00,0x00,
46004 +0xa1,0x00,0x00,0x04,0xa1,0x00,0x00,0x05,0xad,0x00,0xff,0xf8,0x00,0x79,0x18,0x21,
46005 +0x24,0x06,0x00,0x01,0x24,0xc6,0xff,0xff,0xa0,0x80,0x00,0x00,0xa4,0x60,0x00,0x00,
46006 +0xac,0x40,0x00,0x00,0x24,0x63,0x00,0x02,0x24,0x42,0x00,0x04,0x04,0xc1,0xff,0xf9,
46007 +0x24,0x84,0x00,0x01,0x00,0x0a,0x10,0x80,0x00,0x4d,0x20,0x21,0x00,0x00,0x30,0x21,
46008 +0x00,0x4c,0x18,0x21,0x27,0x87,0x81,0x64,0x8c,0xe2,0x00,0x00,0x24,0xe7,0x00,0x04,
46009 +0xac,0x82,0x00,0x00,0xa0,0x66,0x00,0x00,0xa0,0x66,0x00,0x01,0x24,0xc6,0x00,0x01,
46010 +0x28,0xc2,0x00,0x1c,0xa0,0x60,0x00,0x02,0x24,0x84,0x00,0x04,0x14,0x40,0xff,0xf6,
46011 +0x24,0x63,0x00,0x03,0x25,0x29,0x00,0x01,0x29,0x22,0x00,0x08,0x25,0x4a,0x00,0x3b,
46012 +0x25,0x08,0x00,0xec,0x14,0x40,0xff,0xd6,0x25,0x6b,0x00,0xec,0xa7,0x80,0x81,0x60,
46013 +0x00,0x00,0x48,0x21,0x27,0x83,0xb4,0x50,0xac,0x69,0x00,0x00,0x25,0x29,0x00,0x01,
46014 +0x29,0x22,0x00,0x0c,0x14,0x40,0xff,0xfc,0x24,0x63,0x00,0x04,0x0c,0x00,0x20,0xd2,
46015 +0x00,0x00,0x00,0x00,0x2e,0x04,0x00,0x14,0x27,0x83,0xb4,0xa0,0x24,0x09,0x00,0x07,
46016 +0x10,0x80,0x00,0x0a,0x00,0x00,0x00,0x00,0x90,0x62,0x00,0xd5,0x25,0x29,0xff,0xff,
46017 +0xa0,0x62,0x00,0x00,0x05,0x21,0xff,0xfa,0x24,0x63,0x00,0xec,0x8f,0xbf,0x00,0x14,
46018 +0x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x90,0x62,0x00,0xd6,
46019 +0x08,0x00,0x21,0x90,0x25,0x29,0xff,0xff,0x30,0x84,0x00,0xff,0x00,0x04,0x11,0x00,
46020 +0x00,0x44,0x10,0x23,0x00,0x02,0x10,0x80,0x00,0x44,0x10,0x23,0x00,0x02,0x10,0x80,
46021 +0x27,0x83,0xb4,0xa0,0x00,0x43,0x60,0x21,0x3c,0x04,0xb0,0x03,0x3c,0x02,0x80,0x01,
46022 +0x34,0x84,0x00,0x20,0x24,0x42,0x86,0x68,0x30,0xc6,0x00,0xff,0x93,0xaa,0x00,0x13,
46023 +0x30,0xa5,0x00,0xff,0x30,0xe7,0x00,0xff,0xac,0x82,0x00,0x00,0x10,0xc0,0x00,0xe8,
46024 +0x25,0x8f,0x00,0xd0,0x91,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x24,0x42,0xff,0xfc,
46025 +0x2c,0x43,0x00,0x18,0x10,0x60,0x00,0xc7,0x3c,0x03,0x80,0x01,0x00,0x02,0x10,0x80,
46026 +0x24,0x63,0x02,0x90,0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x00,0x00,0x00,0x00,0x00,
46027 +0x00,0x80,0x00,0x08,0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x30,0x14,0x40,0x00,0x1c,
46028 +0x00,0x00,0x00,0x00,0x10,0xa0,0x00,0x17,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
46029 +0x10,0xa2,0x00,0x11,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0x00,0x0c,
46030 +0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x03,0x10,0xa2,0x00,0x06,0x00,0x00,0x00,0x00,
46031 +0x8d,0x82,0x00,0xd0,0x00,0x00,0x00,0x00,0x24,0x42,0xff,0xe0,0x03,0xe0,0x00,0x08,
46032 +0xad,0x82,0x00,0xd0,0x8d,0x82,0x00,0xd0,0x08,0x00,0x21,0xcb,0x24,0x42,0xff,0xe8,
46033 +0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x8d,0x82,0x00,0xd0,0x08,0x00,0x21,0xcb,
46034 +0x24,0x42,0x00,0x01,0x8d,0x82,0x00,0xd0,0x08,0x00,0x21,0xcb,0x24,0x42,0x00,0x02,
46035 +0x10,0xa0,0xff,0xf9,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0x00,0x0a,
46036 +0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0xe9,0x00,0x00,0x00,0x00,
46037 +0x24,0x02,0x00,0x03,0x10,0xa2,0xff,0xe6,0x00,0x00,0x00,0x00,0x8d,0x82,0x00,0xd0,
46038 +0x08,0x00,0x21,0xcb,0x24,0x42,0xff,0xd0,0x8d,0x82,0x00,0xd0,0x08,0x00,0x21,0xcb,
46039 +0x24,0x42,0xff,0xfc,0x10,0xa0,0xff,0xeb,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
46040 +0x10,0xa2,0xff,0xe5,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0xe0,
46041 +0x24,0x02,0x00,0x03,0x14,0xa2,0xff,0xdb,0x00,0x00,0x00,0x00,0x8d,0x82,0x00,0xd0,
46042 +0x08,0x00,0x21,0xcb,0x24,0x42,0xff,0xf8,0x2d,0x42,0x00,0x19,0x14,0x40,0xff,0xc5,
46043 +0x00,0x00,0x00,0x00,0x10,0xa0,0xff,0xdb,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
46044 +0x10,0xa2,0xff,0xd5,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0xd0,
46045 +0x24,0x02,0x00,0x03,0x10,0xa2,0xff,0xf1,0x00,0x00,0x00,0x00,0x8d,0x82,0x00,0xd0,
46046 +0x08,0x00,0x21,0xcb,0x24,0x42,0xff,0xf0,0x2d,0x42,0x00,0x1b,0x10,0x40,0xff,0xf1,
46047 +0x00,0x00,0x00,0x00,0x10,0xa0,0xff,0xcb,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
46048 +0x10,0xa2,0xff,0xc5,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x14,0xa2,0xff,0xb5,
46049 +0x00,0x00,0x00,0x00,0x8d,0x82,0x00,0xd0,0x08,0x00,0x21,0xcb,0x24,0x42,0xff,0xf4,
46050 +0x2d,0x42,0x00,0x1e,0x10,0x40,0xff,0xe3,0x00,0x00,0x00,0x00,0x10,0xa0,0xff,0xbd,
46051 +0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0xb5,0x24,0x02,0x00,0x02,
46052 +0x10,0xa2,0xff,0xd6,0x00,0x00,0x00,0x00,0x08,0x00,0x21,0xc6,0x24,0x02,0x00,0x03,
46053 +0x2d,0x42,0x00,0x23,0x10,0x40,0xff,0xd7,0x00,0x00,0x00,0x00,0x10,0xa0,0xff,0xae,
46054 +0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0xa9,0x24,0x02,0x00,0x02,
46055 +0x14,0xa2,0xff,0xb7,0x00,0x00,0x00,0x00,0x08,0x00,0x22,0x03,0x00,0x00,0x00,0x00,
46056 +0x2d,0x42,0x00,0x25,0x10,0x40,0xff,0xcb,0x00,0x00,0x00,0x00,0x08,0x00,0x21,0xd8,
46057 +0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x16,0x14,0x40,0x00,0x0e,0x00,0x00,0x00,0x00,
46058 +0x10,0xa0,0xff,0xa0,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0x9a,
46059 +0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0x95,0x24,0x02,0x00,0x03,
46060 +0x14,0xa2,0xff,0xb6,0x00,0x00,0x00,0x00,0x8d,0x82,0x00,0xd0,0x08,0x00,0x21,0xcb,
46061 +0x24,0x42,0xff,0xfa,0x10,0xa0,0xff,0x93,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
46062 +0x10,0xa2,0xff,0x8d,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0x88,
46063 +0x00,0x00,0x00,0x00,0x08,0x00,0x21,0xf3,0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x17,
46064 +0x14,0x40,0xff,0xac,0x00,0x00,0x00,0x00,0x08,0x00,0x22,0x34,0x00,0x00,0x00,0x00,
46065 +0x2d,0x42,0x00,0x19,0x10,0x40,0xff,0xe2,0x00,0x00,0x00,0x00,0x10,0xa0,0xff,0x81,
46066 +0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0x7b,0x00,0x00,0x00,0x00,
46067 +0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0x76,0x24,0x02,0x00,0x03,0x10,0xa2,0xff,0x97,
46068 +0x00,0x00,0x00,0x00,0x08,0x00,0x21,0xc8,0x00,0x00,0x00,0x00,0x08,0x00,0x22,0x51,
46069 +0x2d,0x42,0x00,0x1b,0x2d,0x42,0x00,0x1e,0x10,0x40,0xff,0xde,0x00,0x00,0x00,0x00,
46070 +0x10,0xa0,0xff,0x70,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0x6a,
46071 +0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0x65,0x24,0x02,0x00,0x03,
46072 +0x10,0xa2,0xff,0x96,0x00,0x00,0x00,0x00,0x08,0x00,0x21,0xc8,0x00,0x00,0x00,0x00,
46073 +0x2d,0x42,0x00,0x23,0x14,0x40,0xff,0xf2,0x00,0x00,0x00,0x00,0x08,0x00,0x21,0xf9,
46074 +0x00,0x00,0x00,0x00,0x08,0x00,0x21,0xf7,0x2d,0x42,0x00,0x25,0x08,0x00,0x22,0x2d,
46075 +0x2d,0x42,0x00,0x27,0x10,0xa0,0xff,0x5b,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
46076 +0x10,0xa2,0xff,0x55,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0x50,
46077 +0x24,0x02,0x00,0x03,0x14,0xa2,0xff,0x71,0x00,0x00,0x00,0x00,0x08,0x00,0x21,0xe6,
46078 +0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x27,0x14,0x40,0xff,0xad,0x00,0x00,0x00,0x00,
46079 +0x08,0x00,0x22,0x79,0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x2a,0x14,0x40,0xff,0xd8,
46080 +0x00,0x00,0x00,0x00,0x08,0x00,0x21,0xe9,0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x2c,
46081 +0x14,0x40,0xff,0x78,0x00,0x00,0x00,0x00,0x08,0x00,0x21,0xbd,0x00,0x00,0x00,0x00,
46082 +0x91,0x86,0x00,0x00,0x91,0x83,0x00,0xd4,0x25,0x8d,0x00,0x5c,0x30,0xc4,0x00,0xff,
46083 +0x00,0x04,0x10,0x40,0x00,0x44,0x10,0x21,0x00,0x04,0x48,0x80,0x01,0x82,0x58,0x21,
46084 +0x01,0x89,0x40,0x21,0x25,0x78,0x00,0x08,0x10,0x60,0x00,0x37,0x25,0x0e,0x00,0x60,
46085 +0x2c,0xa2,0x00,0x03,0x14,0x40,0x00,0x25,0x00,0x00,0x00,0x00,0x91,0x82,0x00,0xdd,
46086 +0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x1e,0x00,0x00,0x00,0x00,0x27,0x87,0x81,0x64,
46087 +0x01,0x27,0x10,0x21,0x8c,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0xad,0x03,0x00,0x60,
46088 +0x91,0x62,0x00,0x08,0x00,0x00,0x00,0x00,0x00,0x40,0x30,0x21,0xa1,0x82,0x00,0x00,
46089 +0x30,0xc2,0x00,0xff,0x00,0x02,0x10,0x80,0x00,0x47,0x10,0x21,0x8c,0x43,0x00,0x00,
46090 +0x00,0x00,0x00,0x00,0x00,0x03,0x18,0x42,0xad,0xa3,0x00,0x00,0x91,0x84,0x00,0x00,
46091 +0x8d,0xc5,0x00,0x00,0x00,0x04,0x20,0x80,0x00,0x87,0x10,0x21,0x8c,0x43,0x00,0x00,
46092 +0x00,0x05,0x28,0x40,0x00,0x8c,0x20,0x21,0x00,0x03,0x18,0x80,0x00,0xa3,0x10,0x2b,
46093 +0x00,0x62,0x28,0x0a,0xac,0x85,0x00,0x60,0x03,0xe0,0x00,0x08,0xa1,0x80,0x00,0xd4,
46094 +0x27,0x87,0x81,0x64,0x08,0x00,0x22,0xb0,0xa1,0x80,0x00,0xdd,0x27,0x82,0x81,0xd4,
46095 +0x8d,0x83,0x00,0xd8,0x00,0x82,0x10,0x21,0x90,0x44,0x00,0x00,0x24,0x63,0x00,0x01,
46096 +0x00,0x64,0x20,0x2b,0x14,0x80,0xff,0x02,0xad,0x83,0x00,0xd8,0x8d,0x02,0x00,0x60,
46097 +0xa1,0x80,0x00,0xd4,0x00,0x02,0x1f,0xc2,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x43,
46098 +0x03,0xe0,0x00,0x08,0xad,0x82,0x00,0x5c,0x10,0xe0,0x00,0x1d,0x24,0x83,0xff,0xfc,
46099 +0x2c,0x62,0x00,0x18,0x10,0x40,0x01,0x10,0x00,0x03,0x10,0x80,0x3c,0x03,0x80,0x01,
46100 +0x24,0x63,0x02,0xf0,0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x00,0x00,0x00,0x00,0x00,
46101 +0x00,0x80,0x00,0x08,0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x30,0x14,0x40,0x00,0x65,
46102 +0x00,0x00,0x00,0x00,0x10,0xa0,0x00,0x60,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
46103 +0x10,0xa2,0x00,0x5a,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0x00,0x08,
46104 +0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x03,0x10,0xa2,0x00,0x51,0x00,0x00,0x00,0x00,
46105 +0x8d,0x82,0x00,0xd0,0x00,0x00,0x00,0x00,0x24,0x42,0xff,0xe0,0xad,0x82,0x00,0xd0,
46106 +0x8d,0xe3,0x00,0x00,0x8d,0xa2,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x43,0x10,0x21,
46107 +0xad,0xa2,0x00,0x00,0xad,0xe0,0x00,0x00,0x8d,0xa3,0x00,0x00,0x8d,0xc4,0x00,0x00,
46108 +0x00,0x00,0x00,0x00,0x00,0x83,0x10,0x2a,0x10,0x40,0x00,0x22,0x00,0x00,0x00,0x00,
46109 +0x93,0x05,0x00,0x01,0x91,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x45,0x00,0x05,
46110 +0x24,0x02,0x00,0x01,0xa1,0x85,0x00,0x00,0xa1,0x82,0x00,0xd4,0x03,0xe0,0x00,0x08,
46111 +0xad,0x80,0x00,0xd8,0x91,0x82,0x00,0xdd,0x24,0x03,0x00,0x01,0x10,0x43,0x00,0x05,
46112 +0x00,0x00,0x00,0x00,0xa1,0x83,0x00,0xd4,0xad,0x80,0x00,0xd8,0x03,0xe0,0x00,0x08,
46113 +0xa1,0x83,0x00,0xdd,0x00,0x04,0x17,0xc2,0x00,0x82,0x10,0x21,0x00,0x02,0x10,0x43,
46114 +0xad,0xa2,0x00,0x00,0x91,0x83,0x00,0x00,0x27,0x82,0x81,0x64,0x8d,0xc5,0x00,0x00,
46115 +0x00,0x03,0x18,0x80,0x00,0x62,0x18,0x21,0x8c,0x64,0x00,0x00,0x00,0x05,0x28,0x40,
46116 +0x00,0x04,0x18,0x80,0x00,0xa3,0x10,0x2b,0x00,0x62,0x28,0x0a,0x08,0x00,0x22,0xc2,
46117 +0xad,0xc5,0x00,0x00,0x97,0x82,0x8b,0x7c,0x00,0x00,0x00,0x00,0x00,0x62,0x10,0x2a,
46118 +0x10,0x40,0xfe,0xab,0x00,0x00,0x00,0x00,0x91,0x82,0x00,0xdd,0x00,0x00,0x00,0x00,
46119 +0x14,0x40,0x00,0x15,0x00,0x00,0x00,0x00,0x91,0x83,0x00,0x00,0x27,0x82,0x81,0x64,
46120 +0x00,0x03,0x18,0x80,0x00,0x62,0x10,0x21,0x8c,0x44,0x00,0x00,0x00,0x6c,0x18,0x21,
46121 +0xac,0x64,0x00,0x60,0x93,0x05,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x10,0x80,
46122 +0x01,0x82,0x10,0x21,0x24,0x4e,0x00,0x60,0xa1,0x85,0x00,0x00,0x8d,0xc2,0x00,0x00,
46123 +0x00,0x00,0x00,0x00,0x00,0x02,0x1f,0xc2,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x43,
46124 +0x03,0xe0,0x00,0x08,0xad,0xa2,0x00,0x00,0x08,0x00,0x23,0x37,0xa1,0x80,0x00,0xdd,
46125 +0x8d,0x82,0x00,0xd0,0x08,0x00,0x22,0xf3,0x24,0x42,0xff,0xe8,0x8d,0x82,0x00,0xd0,
46126 +0x08,0x00,0x22,0xf3,0x24,0x42,0x00,0x01,0x8d,0x82,0x00,0xd0,0x08,0x00,0x22,0xf3,
46127 +0x24,0x42,0x00,0x02,0x10,0xa0,0xff,0xf9,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
46128 +0x10,0xa2,0x00,0x0a,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0xa0,
46129 +0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x03,0x10,0xa2,0xff,0x9d,0x00,0x00,0x00,0x00,
46130 +0x8d,0x82,0x00,0xd0,0x08,0x00,0x22,0xf3,0x24,0x42,0xff,0xd0,0x8d,0x82,0x00,0xd0,
46131 +0x08,0x00,0x22,0xf3,0x24,0x42,0xff,0xfc,0x10,0xa0,0xff,0xeb,0x00,0x00,0x00,0x00,
46132 +0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0xe5,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,
46133 +0x10,0xa2,0xff,0x93,0x24,0x02,0x00,0x03,0x14,0xa2,0xff,0xdd,0x00,0x00,0x00,0x00,
46134 +0x8d,0x82,0x00,0xd0,0x08,0x00,0x22,0xf3,0x24,0x42,0xff,0xf8,0x2d,0x42,0x00,0x19,
46135 +0x14,0x40,0xff,0x7c,0x00,0x00,0x00,0x00,0x10,0xa0,0xff,0xdb,0x00,0x00,0x00,0x00,
46136 +0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0xd5,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,
46137 +0x10,0xa2,0xff,0x83,0x24,0x02,0x00,0x03,0x10,0xa2,0xff,0xf1,0x00,0x00,0x00,0x00,
46138 +0x8d,0x82,0x00,0xd0,0x08,0x00,0x22,0xf3,0x24,0x42,0xff,0xf0,0x2d,0x42,0x00,0x1b,
46139 +0x10,0x40,0xff,0xf1,0x00,0x00,0x00,0x00,0x10,0xa0,0xff,0xcb,0x00,0x00,0x00,0x00,
46140 +0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0xc5,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,
46141 +0x14,0xa2,0xff,0x6c,0x00,0x00,0x00,0x00,0x8d,0x82,0x00,0xd0,0x08,0x00,0x22,0xf3,
46142 +0x24,0x42,0xff,0xf4,0x2d,0x42,0x00,0x1e,0x10,0x40,0xff,0xe3,0x00,0x00,0x00,0x00,
46143 +0x10,0xa0,0xff,0xbd,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0x68,
46144 +0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0xd6,0x00,0x00,0x00,0x00,0x08,0x00,0x22,0xee,
46145 +0x24,0x02,0x00,0x03,0x2d,0x42,0x00,0x23,0x10,0x40,0xff,0xd7,0x00,0x00,0x00,0x00,
46146 +0x10,0xa0,0xff,0xae,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0x5c,
46147 +0x24,0x02,0x00,0x02,0x14,0xa2,0xff,0xb7,0x00,0x00,0x00,0x00,0x08,0x00,0x23,0x74,
46148 +0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x25,0x10,0x40,0xff,0xcb,0x00,0x00,0x00,0x00,
46149 +0x08,0x00,0x23,0x49,0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x16,0x14,0x40,0x00,0x0e,
46150 +0x00,0x00,0x00,0x00,0x10,0xa0,0xff,0xa0,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
46151 +0x10,0xa2,0xff,0x9a,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0x48,
46152 +0x24,0x02,0x00,0x03,0x14,0xa2,0xff,0xb6,0x00,0x00,0x00,0x00,0x8d,0x82,0x00,0xd0,
46153 +0x08,0x00,0x22,0xf3,0x24,0x42,0xff,0xfa,0x10,0xa0,0xff,0x93,0x00,0x00,0x00,0x00,
46154 +0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0x8d,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,
46155 +0x10,0xa2,0xff,0x3b,0x00,0x00,0x00,0x00,0x08,0x00,0x23,0x64,0x00,0x00,0x00,0x00,
46156 +0x2d,0x42,0x00,0x17,0x14,0x40,0xff,0xac,0x00,0x00,0x00,0x00,0x08,0x00,0x23,0xa5,
46157 +0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x19,0x10,0x40,0xff,0xe2,0x00,0x00,0x00,0x00,
46158 +0x10,0xa0,0xff,0x81,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0x7b,
46159 +0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0x29,0x24,0x02,0x00,0x03,
46160 +0x10,0xa2,0xff,0x97,0x00,0x00,0x00,0x00,0x08,0x00,0x22,0xf0,0x00,0x00,0x00,0x00,
46161 +0x08,0x00,0x23,0xc2,0x2d,0x42,0x00,0x1b,0x2d,0x42,0x00,0x1e,0x10,0x40,0xff,0xde,
46162 +0x00,0x00,0x00,0x00,0x10,0xa0,0xff,0x70,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
46163 +0x10,0xa2,0xff,0x6a,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0x18,
46164 +0x24,0x02,0x00,0x03,0x10,0xa2,0xff,0x96,0x00,0x00,0x00,0x00,0x08,0x00,0x22,0xf0,
46165 +0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x23,0x14,0x40,0xff,0xf2,0x00,0x00,0x00,0x00,
46166 +0x08,0x00,0x23,0x6a,0x00,0x00,0x00,0x00,0x08,0x00,0x23,0x68,0x2d,0x42,0x00,0x25,
46167 +0x08,0x00,0x23,0x9e,0x2d,0x42,0x00,0x27,0x10,0xa0,0xff,0x5b,0x00,0x00,0x00,0x00,
46168 +0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0x55,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,
46169 +0x10,0xa2,0xff,0x03,0x24,0x02,0x00,0x03,0x14,0xa2,0xff,0x71,0x00,0x00,0x00,0x00,
46170 +0x08,0x00,0x23,0x57,0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x27,0x14,0x40,0xff,0xad,
46171 +0x00,0x00,0x00,0x00,0x08,0x00,0x23,0xea,0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x2a,
46172 +0x14,0x40,0xff,0xd8,0x00,0x00,0x00,0x00,0x08,0x00,0x23,0x5a,0x00,0x00,0x00,0x00,
46173 +0x2d,0x42,0x00,0x2c,0x14,0x40,0xff,0x78,0x00,0x00,0x00,0x00,0x08,0x00,0x22,0xe5,
46174 +0x00,0x00,0x00,0x00,0x27,0xbd,0xff,0xe8,0x3c,0x02,0xb0,0x03,0xaf,0xbf,0x00,0x14,
46175 +0xaf,0xb0,0x00,0x10,0x34,0x42,0x01,0x18,0x3c,0x03,0xb0,0x03,0x8c,0x50,0x00,0x00,
46176 +0x34,0x63,0x01,0x2c,0x90,0x62,0x00,0x00,0x32,0x05,0x00,0x01,0xa3,0x82,0x80,0x10,
46177 +0x14,0xa0,0x00,0x14,0x30,0x44,0x00,0xff,0x32,0x02,0x01,0x00,0x14,0x40,0x00,0x09,
46178 +0x00,0x00,0x00,0x00,0x32,0x02,0x08,0x00,0x10,0x40,0x00,0x02,0x24,0x02,0x00,0x01,
46179 +0xa3,0x82,0xbc,0x18,0x8f,0xbf,0x00,0x14,0x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,
46180 +0x27,0xbd,0x00,0x18,0x0c,0x00,0x05,0x37,0x00,0x00,0x00,0x00,0x26,0x02,0xff,0x00,
46181 +0xa3,0x80,0xbc,0x18,0x3c,0x01,0xb0,0x03,0xac,0x22,0x01,0x18,0x08,0x00,0x24,0x16,
46182 +0x32,0x02,0x08,0x00,0x0c,0x00,0x21,0x3f,0x00,0x00,0x00,0x00,0x26,0x02,0xff,0xff,
46183 +0x3c,0x01,0xb0,0x03,0xac,0x22,0x01,0x18,0x08,0x00,0x24,0x13,0x32,0x02,0x01,0x00,
46184 +0x27,0xbd,0xff,0xe0,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0xd0,0xaf,0xbf,0x00,0x18,
46185 +0x8c,0x43,0x00,0x00,0x3c,0x02,0x00,0x40,0x24,0x07,0x0f,0xff,0x00,0x03,0x33,0x02,
46186 +0x00,0x03,0x2d,0x02,0x00,0x03,0x43,0x02,0x30,0x69,0x0f,0xff,0x00,0x62,0x18,0x24,
46187 +0x30,0xa5,0x00,0x03,0x30,0xc6,0x00,0xff,0x10,0x60,0x00,0x08,0x31,0x08,0x00,0xff,
46188 +0x01,0x00,0x30,0x21,0x0c,0x00,0x24,0xdf,0xaf,0xa9,0x00,0x10,0x8f,0xbf,0x00,0x18,
46189 +0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x0c,0x00,0x25,0x31,
46190 +0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,0x34,0x63,0x00,0xd4,0x08,0x00,0x24,0x3f,
46191 +0xac,0x62,0x00,0x00,0x27,0xbd,0xff,0xc0,0x3c,0x02,0xb0,0x03,0xaf,0xbe,0x00,0x38,
46192 +0xaf,0xb5,0x00,0x2c,0xaf,0xb1,0x00,0x1c,0xaf,0xb0,0x00,0x18,0xaf,0xbf,0x00,0x3c,
46193 +0xaf,0xb7,0x00,0x34,0xaf,0xb6,0x00,0x30,0xaf,0xb4,0x00,0x28,0xaf,0xb3,0x00,0x24,
46194 +0xaf,0xb2,0x00,0x20,0x34,0x42,0x00,0x3f,0x90,0x43,0x00,0x00,0x00,0x80,0x80,0x21,
46195 +0x00,0x00,0xf0,0x21,0x00,0x00,0x88,0x21,0x10,0x60,0x00,0x76,0x00,0x00,0xa8,0x21,
46196 +0x3c,0x01,0xb0,0x03,0xa0,0x20,0x00,0x3f,0x00,0x10,0x12,0x02,0x24,0x04,0x06,0x14,
46197 +0x0c,0x00,0x06,0xd1,0x30,0x54,0x00,0x0f,0x24,0x04,0x06,0x14,0x0c,0x00,0x06,0xd1,
46198 +0xaf,0xa2,0x00,0x10,0x3c,0x03,0x00,0xff,0x34,0x63,0xff,0xff,0x32,0x10,0x00,0x7f,
46199 +0x00,0x43,0x10,0x24,0x00,0x10,0x86,0x00,0x02,0x02,0x80,0x25,0x02,0x00,0x28,0x21,
46200 +0x24,0x04,0x06,0x14,0x3c,0x13,0xbf,0xff,0x0c,0x00,0x06,0xbf,0x3c,0x16,0xb0,0x03,
46201 +0x00,0x00,0x90,0x21,0x3c,0x17,0x40,0x00,0x36,0x73,0xff,0xff,0x36,0xd6,0x00,0x3e,
46202 +0x0c,0x00,0x06,0xd1,0x24,0x04,0x04,0x00,0x00,0x57,0x10,0x25,0x00,0x40,0x28,0x21,
46203 +0x0c,0x00,0x06,0xbf,0x24,0x04,0x04,0x00,0x00,0x00,0x80,0x21,0x0c,0x00,0x25,0xf9,
46204 +0x00,0x00,0x00,0x00,0x26,0x03,0x00,0x01,0x10,0x40,0x00,0x46,0x30,0x70,0x00,0xff,
46205 +0x12,0x00,0xff,0xfa,0x00,0x00,0x00,0x00,0x0c,0x00,0x06,0xd1,0x24,0x04,0x04,0x00,
46206 +0x00,0x53,0x10,0x24,0x00,0x40,0x28,0x21,0x0c,0x00,0x06,0xbf,0x24,0x04,0x04,0x00,
46207 +0x24,0x02,0x00,0x01,0x12,0x82,0x00,0x37,0x00,0x00,0x00,0x00,0x12,0x80,0x00,0x35,
46208 +0x00,0x00,0x00,0x00,0x32,0x31,0x00,0x7f,0x12,0x20,0x00,0x04,0x24,0x03,0x00,0x04,
46209 +0x27,0xc2,0x00,0x01,0x30,0x5e,0x00,0xff,0x02,0xb1,0xa8,0x21,0x12,0x43,0x00,0x2a,
46210 +0x3c,0x03,0xb0,0x03,0x02,0x43,0x10,0x21,0xa0,0x51,0x00,0x34,0x26,0x42,0x00,0x01,
46211 +0x30,0x52,0x00,0xff,0x2e,0x43,0x00,0x05,0x14,0x60,0xff,0xd9,0x00,0x00,0x00,0x00,
46212 +0x8f,0xa5,0x00,0x10,0x0c,0x00,0x06,0xbf,0x24,0x04,0x06,0x14,0x12,0xa0,0x00,0x0e,
46213 +0x3c,0x02,0xb0,0x03,0x13,0xc0,0x00,0x0d,0x34,0x42,0x00,0x3c,0x00,0x15,0x10,0x40,
46214 +0x00,0x55,0x10,0x21,0x00,0x02,0x10,0xc0,0x00,0x55,0x10,0x21,0x00,0x02,0xa8,0x80,
46215 +0x02,0xbe,0x00,0x1b,0x17,0xc0,0x00,0x02,0x00,0x00,0x00,0x00,0x00,0x07,0x00,0x0d,
46216 +0x00,0x00,0xa8,0x12,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x3c,0x3c,0x03,0xb0,0x03,
46217 +0x3c,0x04,0xb0,0x03,0xa4,0x55,0x00,0x00,0x34,0x63,0x00,0x1c,0x34,0x84,0x00,0x1d,
46218 +0x24,0x02,0x00,0x01,0xa0,0x60,0x00,0x00,0xa0,0x82,0x00,0x00,0x7b,0xbe,0x01,0xfc,
46219 +0x7b,0xb6,0x01,0xbc,0x7b,0xb4,0x01,0x7c,0x7b,0xb2,0x01,0x3c,0x7b,0xb0,0x00,0xfc,
46220 +0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x40,0xa2,0xd1,0x00,0x00,0x08,0x00,0x24,0x98,
46221 +0x26,0x42,0x00,0x01,0x0c,0x00,0x06,0xd1,0x24,0x04,0x04,0xfc,0x08,0x00,0x24,0x8d,
46222 +0x00,0x40,0x88,0x21,0x3c,0x03,0xb0,0x03,0x34,0x63,0x00,0x3c,0x3c,0x04,0xb0,0x03,
46223 +0x3c,0x05,0xb0,0x03,0xa4,0x60,0x00,0x00,0x34,0x84,0x00,0x1c,0x34,0xa5,0x00,0x1d,
46224 +0x24,0x02,0x00,0x02,0x24,0x03,0x00,0x01,0xa0,0x82,0x00,0x00,0x08,0x00,0x24,0xb7,
46225 +0xa0,0xa3,0x00,0x00,0x0c,0x00,0x17,0x99,0x00,0x00,0x00,0x00,0x10,0x40,0xff,0x8b,
46226 +0x00,0x10,0x12,0x02,0x3c,0x02,0xb0,0x03,0x3c,0x04,0xb0,0x03,0x34,0x42,0x00,0x3c,
46227 +0x34,0x84,0x00,0x14,0x24,0x03,0x00,0x01,0xa4,0x40,0x00,0x00,0x3c,0x01,0xb0,0x03,
46228 +0xa0,0x23,0x00,0x3f,0x08,0x00,0x24,0xb7,0xac,0x90,0x00,0x00,0x27,0xbd,0xff,0xd8,
46229 +0xaf,0xb0,0x00,0x10,0x30,0xd0,0x00,0xff,0x2e,0x02,0x00,0x2e,0xaf,0xb2,0x00,0x18,
46230 +0xaf,0xb1,0x00,0x14,0xaf,0xbf,0x00,0x20,0xaf,0xb3,0x00,0x1c,0x30,0xb1,0x00,0xff,
46231 +0x14,0x40,0x00,0x06,0x00,0x80,0x90,0x21,0x8f,0xbf,0x00,0x20,0x7b,0xb2,0x00,0xfc,
46232 +0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x28,0x2e,0x13,0x00,0x10,
46233 +0x24,0x05,0x00,0x14,0x0c,0x00,0x13,0xa4,0x24,0x06,0x01,0x07,0x12,0x60,0x00,0x38,
46234 +0x02,0x00,0x30,0x21,0x8f,0xa2,0x00,0x38,0x30,0xc3,0x00,0x3f,0x3c,0x04,0xb0,0x09,
46235 +0x00,0x02,0x14,0x00,0x00,0x43,0x30,0x25,0x34,0x84,0x01,0x60,0x90,0x82,0x00,0x00,
46236 +0x00,0x00,0x00,0x00,0x14,0x40,0xff,0xfd,0x24,0x02,0x00,0x01,0x12,0x22,0x00,0x2a,
46237 +0x2a,0x22,0x00,0x02,0x14,0x40,0x00,0x24,0x24,0x02,0x00,0x02,0x12,0x22,0x00,0x20,
46238 +0x24,0x02,0x00,0x03,0x12,0x22,0x00,0x19,0x00,0x00,0x00,0x00,0x16,0x60,0xff,0xe2,
46239 +0x24,0x02,0x00,0x01,0x12,0x22,0x00,0x13,0x2a,0x22,0x00,0x02,0x14,0x40,0x00,0x0d,
46240 +0x24,0x02,0x00,0x02,0x12,0x22,0x00,0x09,0x24,0x02,0x00,0x03,0x16,0x22,0xff,0xda,
46241 +0x00,0x00,0x00,0x00,0x24,0x04,0x08,0x4c,0x24,0x05,0xff,0xff,0x0c,0x00,0x13,0x5f,
46242 +0x3c,0x06,0x0c,0xb8,0x08,0x00,0x24,0xea,0x00,0x00,0x00,0x00,0x08,0x00,0x25,0x12,
46243 +0x24,0x04,0x08,0x48,0x16,0x20,0xff,0xd0,0x00,0x00,0x00,0x00,0x08,0x00,0x25,0x12,
46244 +0x24,0x04,0x08,0x40,0x08,0x00,0x25,0x12,0x24,0x04,0x08,0x44,0x24,0x04,0x08,0x4c,
46245 +0x0c,0x00,0x13,0x5f,0x24,0x05,0xff,0xff,0x08,0x00,0x25,0x07,0x00,0x00,0x00,0x00,
46246 +0x08,0x00,0x25,0x20,0x24,0x04,0x08,0x48,0x16,0x20,0xff,0xe0,0x00,0x00,0x00,0x00,
46247 +0x08,0x00,0x25,0x20,0x24,0x04,0x08,0x40,0x08,0x00,0x25,0x20,0x24,0x04,0x08,0x44,
46248 +0x02,0x40,0x20,0x21,0x0c,0x00,0x25,0x71,0x02,0x20,0x28,0x21,0x08,0x00,0x24,0xf5,
46249 +0x00,0x40,0x30,0x21,0x27,0xbd,0xff,0xd8,0x2c,0xc2,0x00,0x2e,0xaf,0xb2,0x00,0x18,
46250 +0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x20,0xaf,0xb3,0x00,0x1c,
46251 +0x00,0xc0,0x80,0x21,0x30,0xb1,0x00,0xff,0x00,0x80,0x90,0x21,0x14,0x40,0x00,0x07,
46252 +0x00,0x00,0x18,0x21,0x8f,0xbf,0x00,0x20,0x7b,0xb2,0x00,0xfc,0x7b,0xb0,0x00,0xbc,
46253 +0x00,0x60,0x10,0x21,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x28,0x2e,0x13,0x00,0x10,
46254 +0x24,0x05,0x00,0x14,0x0c,0x00,0x13,0xa4,0x24,0x06,0x01,0x07,0x12,0x60,0x00,0x24,
46255 +0x02,0x00,0x30,0x21,0x3c,0x03,0xb0,0x09,0x34,0x63,0x01,0x60,0x90,0x62,0x00,0x00,
46256 +0x00,0x00,0x00,0x00,0x14,0x40,0xff,0xfd,0x30,0xc5,0x00,0x3f,0x0c,0x00,0x25,0xae,
46257 +0x02,0x20,0x20,0x21,0x16,0x60,0x00,0x0a,0x00,0x40,0x80,0x21,0x24,0x02,0x00,0x01,
46258 +0x12,0x22,0x00,0x15,0x2a,0x22,0x00,0x02,0x14,0x40,0x00,0x0f,0x24,0x02,0x00,0x02,
46259 +0x12,0x22,0x00,0x0b,0x24,0x02,0x00,0x03,0x12,0x22,0x00,0x03,0x00,0x00,0x00,0x00,
46260 +0x08,0x00,0x25,0x3d,0x02,0x00,0x18,0x21,0x24,0x04,0x08,0x4c,0x24,0x05,0xff,0xff,
46261 +0x0c,0x00,0x13,0x5f,0x3c,0x06,0x0c,0xb8,0x08,0x00,0x25,0x3d,0x02,0x00,0x18,0x21,
46262 +0x08,0x00,0x25,0x5f,0x24,0x04,0x08,0x48,0x16,0x20,0xff,0xf5,0x00,0x00,0x00,0x00,
46263 +0x08,0x00,0x25,0x5f,0x24,0x04,0x08,0x40,0x08,0x00,0x25,0x5f,0x24,0x04,0x08,0x44,
46264 +0x02,0x40,0x20,0x21,0x0c,0x00,0x25,0x71,0x02,0x20,0x28,0x21,0x08,0x00,0x25,0x49,
46265 +0x00,0x40,0x30,0x21,0x27,0xbd,0xff,0xe8,0x2c,0xc2,0x00,0x1f,0xaf,0xb0,0x00,0x10,
46266 +0xaf,0xbf,0x00,0x14,0x00,0xc0,0x80,0x21,0x14,0x40,0x00,0x1d,0x30,0xa5,0x00,0xff,
46267 +0x24,0x02,0x00,0x01,0x10,0xa2,0x00,0x18,0x28,0xa2,0x00,0x02,0x14,0x40,0x00,0x12,
46268 +0x24,0x02,0x00,0x02,0x10,0xa2,0x00,0x0e,0x24,0x02,0x00,0x03,0x10,0xa2,0x00,0x07,
46269 +0x24,0x04,0x08,0x4c,0x26,0x10,0xff,0xe2,0x02,0x00,0x10,0x21,0x8f,0xbf,0x00,0x14,
46270 +0x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x24,0x05,0xff,0xff,
46271 +0x0c,0x00,0x13,0x5f,0x3c,0x06,0x0d,0xf8,0x08,0x00,0x25,0x82,0x26,0x10,0xff,0xe2,
46272 +0x08,0x00,0x25,0x87,0x24,0x04,0x08,0x48,0x14,0xa0,0xff,0xf2,0x24,0x04,0x08,0x40,
46273 +0x08,0x00,0x25,0x88,0x24,0x05,0xff,0xff,0x08,0x00,0x25,0x87,0x24,0x04,0x08,0x44,
46274 +0x2c,0xc2,0x00,0x10,0x14,0x40,0xff,0xec,0x24,0x02,0x00,0x01,0x10,0xa2,0x00,0x14,
46275 +0x28,0xa2,0x00,0x02,0x14,0x40,0x00,0x0e,0x24,0x02,0x00,0x02,0x10,0xa2,0x00,0x0a,
46276 +0x24,0x02,0x00,0x03,0x10,0xa2,0x00,0x03,0x24,0x04,0x08,0x4c,0x08,0x00,0x25,0x82,
46277 +0x26,0x10,0xff,0xf1,0x24,0x05,0xff,0xff,0x0c,0x00,0x13,0x5f,0x3c,0x06,0x0d,0xb8,
46278 +0x08,0x00,0x25,0x82,0x26,0x10,0xff,0xf1,0x08,0x00,0x25,0xa1,0x24,0x04,0x08,0x48,
46279 +0x14,0xa0,0xff,0xf6,0x24,0x04,0x08,0x40,0x08,0x00,0x25,0xa2,0x24,0x05,0xff,0xff,
46280 +0x08,0x00,0x25,0xa1,0x24,0x04,0x08,0x44,0x27,0xbd,0xff,0xe8,0x30,0x84,0x00,0xff,
46281 +0x24,0x02,0x00,0x01,0x10,0x82,0x00,0x39,0xaf,0xbf,0x00,0x10,0x28,0x82,0x00,0x02,
46282 +0x14,0x40,0x00,0x27,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0x82,0x00,0x17,
46283 +0x00,0xa0,0x30,0x21,0x24,0x02,0x00,0x03,0x10,0x82,0x00,0x05,0x24,0x04,0x08,0x3c,
46284 +0x8f,0xbf,0x00,0x10,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,
46285 +0x0c,0x00,0x13,0x5f,0x3c,0x05,0x3f,0x00,0x24,0x04,0x08,0x3c,0x3c,0x05,0x80,0x00,
46286 +0x0c,0x00,0x13,0x5f,0x00,0x00,0x30,0x21,0x24,0x04,0x08,0x3c,0x3c,0x05,0x80,0x00,
46287 +0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x01,0x24,0x04,0x08,0xac,0x0c,0x00,0x13,0x41,
46288 +0x24,0x05,0x0f,0xff,0x08,0x00,0x25,0xbc,0x00,0x00,0x00,0x00,0x24,0x04,0x08,0x34,
46289 +0x0c,0x00,0x13,0x5f,0x3c,0x05,0x3f,0x00,0x24,0x04,0x08,0x34,0x3c,0x05,0x80,0x00,
46290 +0x0c,0x00,0x13,0x5f,0x00,0x00,0x30,0x21,0x24,0x04,0x08,0x34,0x3c,0x05,0x80,0x00,
46291 +0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x01,0x08,0x00,0x25,0xcb,0x24,0x04,0x08,0xa8,
46292 +0x14,0x80,0xff,0xdf,0x00,0xa0,0x30,0x21,0x24,0x04,0x08,0x24,0x0c,0x00,0x13,0x5f,
46293 +0x3c,0x05,0x3f,0x00,0x24,0x04,0x08,0x24,0x3c,0x05,0x80,0x00,0x0c,0x00,0x13,0x5f,
46294 +0x00,0x00,0x30,0x21,0x24,0x04,0x08,0x24,0x3c,0x05,0x80,0x00,0x0c,0x00,0x13,0x5f,
46295 +0x24,0x06,0x00,0x01,0x08,0x00,0x25,0xcb,0x24,0x04,0x08,0xa0,0x00,0xa0,0x30,0x21,
46296 +0x24,0x04,0x08,0x2c,0x0c,0x00,0x13,0x5f,0x3c,0x05,0x3f,0x00,0x24,0x04,0x08,0x2c,
46297 +0x3c,0x05,0x80,0x00,0x0c,0x00,0x13,0x5f,0x00,0x00,0x30,0x21,0x24,0x04,0x08,0x2c,
46298 +0x3c,0x05,0x80,0x00,0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x01,0x08,0x00,0x25,0xcb,
46299 +0x24,0x04,0x08,0xa4,0x3c,0x05,0x00,0x14,0x3c,0x02,0xb0,0x05,0x34,0x42,0x04,0x20,
46300 +0x3c,0x06,0xc0,0x00,0x3c,0x03,0xb0,0x05,0x3c,0x04,0xb0,0x05,0x34,0xa5,0x17,0x09,
46301 +0xac,0x45,0x00,0x00,0x34,0xc6,0x05,0x07,0x34,0x63,0x04,0x24,0x34,0x84,0x02,0x28,
46302 +0x3c,0x07,0xb0,0x05,0x24,0x02,0x00,0x20,0xac,0x66,0x00,0x00,0x34,0xe7,0x04,0x50,
46303 +0xa0,0x82,0x00,0x00,0x90,0xe2,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x03,
46304 +0x10,0x40,0xff,0xfc,0x24,0x02,0x00,0x01,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
46305 +0x93,0x85,0x81,0xf1,0x24,0x02,0x00,0x01,0x14,0xa2,0x00,0x53,0x00,0x80,0x40,0x21,
46306 +0x8c,0x89,0x00,0x04,0x3c,0x02,0xb0,0x01,0x01,0x22,0x30,0x21,0x8c,0xc3,0x00,0x04,
46307 +0x3c,0x02,0x01,0x00,0x00,0x62,0x10,0x24,0x10,0x40,0x00,0x4b,0x30,0x62,0x00,0x08,
46308 +0x10,0x45,0x00,0x59,0x00,0x00,0x00,0x00,0x94,0xc2,0x00,0x38,0x24,0x03,0x00,0xb4,
46309 +0x30,0x44,0x00,0xff,0x10,0x83,0x00,0x61,0x24,0x02,0x00,0xc4,0x10,0x82,0x00,0x54,
46310 +0x24,0x02,0x00,0x94,0x10,0x82,0x00,0x45,0x00,0x00,0x00,0x00,0x94,0xc2,0x00,0x38,
46311 +0x00,0x00,0x00,0x00,0x30,0x47,0xff,0xff,0x30,0xe3,0x40,0xff,0x24,0x02,0x40,0x88,
46312 +0x14,0x62,0x00,0x39,0x30,0xe3,0x03,0x00,0x24,0x02,0x03,0x00,0x10,0x62,0x00,0x38,
46313 +0x00,0x00,0x00,0x00,0x94,0xc2,0x00,0x56,0x00,0x00,0x00,0x00,0x30,0x47,0xff,0xff,
46314 +0x30,0xe2,0x00,0x80,0x14,0x40,0x00,0x30,0x3c,0x02,0xb0,0x01,0x01,0x22,0x30,0x21,
46315 +0x94,0xc3,0x00,0x60,0x24,0x02,0x00,0x08,0x14,0x43,0x00,0x3b,0x00,0x00,0x00,0x00,
46316 +0x90,0xc2,0x00,0x62,0x24,0x03,0x00,0x04,0x00,0x02,0x39,0x02,0x10,0xe3,0x00,0x15,
46317 +0x24,0x02,0x00,0x06,0x14,0xe2,0x00,0x34,0x00,0x00,0x00,0x00,0x8d,0x05,0x01,0xac,
46318 +0x94,0xc4,0x00,0x66,0x27,0x82,0x89,0x68,0x00,0x05,0x28,0x80,0x30,0x87,0xff,0xff,
46319 +0x00,0xa2,0x28,0x21,0x00,0x07,0x1a,0x00,0x8c,0xa4,0x00,0x00,0x00,0x07,0x12,0x02,
46320 +0x00,0x43,0x10,0x25,0x24,0x42,0x00,0x5e,0x24,0x03,0xc0,0x00,0x30,0x47,0xff,0xff,
46321 +0x00,0x83,0x20,0x24,0x00,0x87,0x20,0x25,0xac,0xa4,0x00,0x00,0x08,0x00,0x26,0x76,
46322 +0xad,0x07,0x00,0x10,0x8d,0x05,0x01,0xac,0x94,0xc4,0x00,0x64,0x27,0x82,0x89,0x68,
46323 +0x00,0x05,0x28,0x80,0x30,0x87,0xff,0xff,0x00,0xa2,0x28,0x21,0x00,0x07,0x1a,0x00,
46324 +0x8c,0xa4,0x00,0x00,0x00,0x07,0x12,0x02,0x00,0x43,0x10,0x25,0x24,0x42,0x00,0x36,
46325 +0x3c,0x03,0xff,0xff,0x30,0x47,0xff,0xff,0x00,0x83,0x20,0x24,0x00,0x87,0x20,0x25,
46326 +0xac,0xa4,0x00,0x00,0xad,0x07,0x00,0x10,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
46327 +0x94,0xc2,0x00,0x50,0x08,0x00,0x26,0x34,0x30,0x47,0xff,0xff,0x8d,0x04,0x01,0xac,
46328 +0x27,0x83,0x89,0x68,0x00,0x04,0x20,0x80,0x00,0x83,0x20,0x21,0x8c,0x82,0x00,0x00,
46329 +0x3c,0x03,0xff,0xff,0x00,0x43,0x10,0x24,0x34,0x42,0x00,0x2e,0xac,0x82,0x00,0x00,
46330 +0x24,0x03,0x00,0x2e,0xad,0x03,0x00,0x10,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
46331 +0x8d,0x04,0x01,0xac,0x27,0x83,0x89,0x68,0x00,0x04,0x20,0x80,0x00,0x83,0x20,0x21,
46332 +0x8c,0x82,0x00,0x00,0x3c,0x03,0xff,0xff,0x00,0x43,0x10,0x24,0x34,0x42,0x00,0x0e,
46333 +0x24,0x03,0x00,0x0e,0x08,0x00,0x26,0x75,0xac,0x82,0x00,0x00,0x8d,0x04,0x01,0xac,
46334 +0x27,0x83,0x89,0x68,0x00,0x04,0x20,0x80,0x00,0x83,0x20,0x21,0x8c,0x82,0x00,0x00,
46335 +0x3c,0x03,0xff,0xff,0x00,0x43,0x10,0x24,0x34,0x42,0x00,0x14,0x24,0x03,0x00,0x14,
46336 +0x08,0x00,0x26,0x75,0xac,0x82,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
46337 +0x30,0xc6,0x00,0xff,0x00,0x06,0x48,0x40,0x01,0x26,0x10,0x21,0x00,0x02,0x10,0x80,
46338 +0x27,0x8b,0xbc,0x30,0x27,0x83,0xbc,0x36,0x00,0x4b,0x40,0x21,0x00,0x43,0x10,0x21,
46339 +0x94,0x47,0x00,0x00,0x30,0xa2,0x3f,0xff,0x10,0xe2,0x00,0x29,0x30,0x8a,0xff,0xff,
46340 +0x95,0x02,0x00,0x02,0x24,0x03,0x00,0x01,0x00,0x02,0x11,0x82,0x30,0x42,0x00,0x01,
46341 +0x10,0x43,0x00,0x18,0x00,0x00,0x00,0x00,0x01,0x26,0x10,0x21,0x00,0x02,0x10,0x80,
46342 +0x00,0x4b,0x30,0x21,0x94,0xc4,0x00,0x02,0x27,0x83,0xbc,0x36,0x27,0x85,0xbc,0x34,
46343 +0x00,0x45,0x28,0x21,0x30,0x84,0xff,0xdf,0x00,0x43,0x10,0x21,0xa4,0xc4,0x00,0x02,
46344 +0xa4,0x40,0x00,0x00,0xa4,0xa0,0x00,0x00,0x94,0xc3,0x00,0x02,0x3c,0x04,0xb0,0x01,
46345 +0x01,0x44,0x20,0x21,0x30,0x63,0xff,0xbf,0xa4,0xc3,0x00,0x02,0xa0,0xc0,0x00,0x00,
46346 +0x8c,0x82,0x00,0x04,0x24,0x03,0xf0,0xff,0x00,0x43,0x10,0x24,0x03,0xe0,0x00,0x08,
46347 +0xac,0x82,0x00,0x04,0x24,0x02,0xc0,0x00,0x91,0x04,0x00,0x01,0x00,0xa2,0x10,0x24,
46348 +0x00,0x47,0x28,0x25,0x3c,0x03,0xb0,0x01,0x24,0x02,0x00,0x02,0x14,0x82,0xff,0xe2,
46349 +0x01,0x43,0x18,0x21,0xac,0x65,0x00,0x00,0x08,0x00,0x26,0xa3,0x01,0x26,0x10,0x21,
46350 +0x08,0x00,0x26,0xa3,0x01,0x26,0x10,0x21,0x93,0x83,0x81,0xf1,0x24,0x02,0x00,0x01,
46351 +0x14,0x62,0x00,0x0d,0x3c,0x02,0xb0,0x01,0x8c,0x84,0x00,0x04,0x3c,0x06,0xb0,0x09,
46352 +0x00,0x82,0x20,0x21,0x8c,0x85,0x00,0x08,0x8c,0x83,0x00,0x04,0x3c,0x02,0x01,0x00,
46353 +0x34,0xc6,0x01,0x00,0x00,0x62,0x18,0x24,0x14,0x60,0x00,0x05,0x30,0xa5,0x20,0x00,
46354 +0x24,0x02,0x00,0x06,0xa0,0xc2,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
46355 +0x3c,0x03,0xb0,0x09,0x10,0xa0,0xff,0xfc,0x34,0x63,0x01,0x00,0x24,0x02,0x00,0x0e,
46356 +0x08,0x00,0x26,0xd6,0xa0,0x62,0x00,0x00,0x3c,0x02,0xb0,0x01,0x30,0xa5,0xff,0xff,
46357 +0x00,0xa2,0x28,0x21,0x8c,0xa3,0x00,0x00,0x3c,0x02,0x10,0x00,0x00,0x80,0x30,0x21,
46358 +0x00,0x62,0x18,0x24,0x8c,0xa2,0x00,0x04,0x10,0x60,0x00,0x04,0x00,0x00,0x00,0x00,
46359 +0x30,0x42,0x80,0x00,0x10,0x40,0x00,0x13,0x00,0x00,0x00,0x00,0x8c,0xc2,0x01,0xa8,
46360 +0x00,0x00,0x00,0x00,0x24,0x44,0x00,0x01,0x28,0x83,0x00,0x00,0x24,0x42,0x00,0x40,
46361 +0x00,0x83,0x10,0x0a,0x93,0x83,0x81,0xf0,0x00,0x02,0x11,0x83,0x00,0x02,0x11,0x80,
46362 +0x00,0x82,0x20,0x23,0x24,0x63,0xff,0xff,0xac,0xc4,0x01,0xa8,0xa3,0x83,0x81,0xf0,
46363 +0x8c,0xc4,0x01,0xac,0x8c,0xc2,0x01,0xa8,0x00,0x00,0x00,0x00,0x00,0x44,0x10,0x26,
46364 +0x00,0x02,0x10,0x2b,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,
46365 +0x34,0x63,0x00,0x73,0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x01,
46366 +0x14,0x40,0x00,0x04,0x00,0x00,0x00,0x00,0xa3,0x80,0x81,0xf1,0x03,0xe0,0x00,0x08,
46367 +0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0xa3,0x82,0x81,0xf1,0x03,0xe0,0x00,0x08,
46368 +0x00,0x00,0x00,0x00,0x8c,0x82,0x00,0x04,0x3c,0x05,0xb0,0x01,0x00,0x80,0x50,0x21,
46369 +0x00,0x45,0x10,0x21,0x8c,0x43,0x00,0x04,0x24,0x02,0x00,0x05,0x00,0x03,0x1a,0x02,
46370 +0x30,0x69,0x00,0x0f,0x11,0x22,0x00,0x0b,0x24,0x02,0x00,0x07,0x11,0x22,0x00,0x09,
46371 +0x24,0x02,0x00,0x0a,0x11,0x22,0x00,0x07,0x24,0x02,0x00,0x0b,0x11,0x22,0x00,0x05,
46372 +0x24,0x02,0x00,0x01,0x93,0x83,0x81,0xf0,0x3c,0x04,0xb0,0x06,0x10,0x62,0x00,0x03,
46373 +0x34,0x84,0x80,0x18,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x8c,0x82,0x00,0x00,
46374 +0x00,0x00,0x00,0x00,0x00,0x02,0x17,0x02,0x14,0x40,0xff,0xfa,0x00,0x00,0x00,0x00,
46375 +0x8d,0x43,0x01,0xa8,0x27,0x82,0x89,0x68,0x00,0x03,0x18,0x80,0x00,0x6a,0x20,0x21,
46376 +0x8c,0x87,0x00,0xa8,0x00,0x62,0x18,0x21,0x8c,0x68,0x00,0x00,0x00,0xe5,0x28,0x21,
46377 +0x8c,0xa9,0x00,0x00,0x3c,0x02,0xff,0xff,0x27,0x83,0x8a,0x68,0x01,0x22,0x10,0x24,
46378 +0x00,0x48,0x10,0x25,0xac,0xa2,0x00,0x00,0x8d,0x44,0x01,0xa8,0x00,0x07,0x30,0xc2,
46379 +0x3c,0x02,0x00,0x80,0x00,0x04,0x20,0x80,0x00,0x83,0x20,0x21,0x00,0x06,0x32,0x00,
46380 +0x8c,0xa9,0x00,0x04,0x00,0xc2,0x30,0x25,0x8c,0x82,0x00,0x00,0x3c,0x03,0x80,0x00,
46381 +0x01,0x22,0x10,0x25,0x00,0x43,0x10,0x25,0xac,0xa2,0x00,0x04,0xaf,0x87,0xbc,0x20,
46382 +0x8c,0xa2,0x00,0x00,0x00,0x00,0x00,0x00,0xaf,0x82,0xbc,0x28,0x8c,0xa3,0x00,0x04,
46383 +0x3c,0x01,0xb0,0x07,0xac,0x26,0x80,0x18,0x8d,0x42,0x01,0xa8,0xaf,0x83,0xbc,0x24,
46384 +0x93,0x85,0x81,0xf0,0x24,0x44,0x00,0x01,0x28,0x83,0x00,0x00,0x24,0x42,0x00,0x40,
46385 +0x00,0x83,0x10,0x0a,0x00,0x02,0x11,0x83,0x00,0x02,0x11,0x80,0x24,0xa5,0xff,0xff,
46386 +0x00,0x82,0x20,0x23,0xad,0x44,0x01,0xa8,0xa3,0x85,0x81,0xf0,0x08,0x00,0x27,0x21,
46387 +0x00,0x00,0x00,0x00,0x3c,0x05,0xb0,0x03,0x3c,0x02,0x80,0x01,0x34,0xa5,0x00,0x20,
46388 +0x24,0x42,0x9d,0x64,0xac,0xa2,0x00,0x00,0x24,0x02,0x00,0x02,0x24,0x03,0x00,0x20,
46389 +0xac,0x82,0x00,0x64,0x3c,0x02,0x80,0x01,0xac,0x83,0x00,0x60,0xac,0x80,0x00,0x00,
46390 +0xac,0x80,0x00,0x04,0xac,0x80,0x00,0x08,0xac,0x80,0x00,0x4c,0xac,0x80,0x00,0x50,
46391 +0xac,0x80,0x00,0x54,0xac,0x80,0x00,0x0c,0xac,0x80,0x00,0x58,0xa0,0x80,0x00,0x5c,
46392 +0x24,0x42,0x9e,0x28,0x24,0x83,0x00,0x68,0x24,0x05,0x00,0x0f,0x24,0xa5,0xff,0xff,
46393 +0xac,0x62,0x00,0x00,0x04,0xa1,0xff,0xfd,0x24,0x63,0x00,0x04,0x3c,0x02,0x80,0x01,
46394 +0x24,0x42,0x9f,0x10,0xac,0x82,0x00,0x78,0x3c,0x03,0x80,0x01,0x3c,0x02,0x80,0x01,
46395 +0x24,0x63,0xa0,0x9c,0x24,0x42,0xa0,0x08,0xac,0x83,0x00,0x88,0xac,0x82,0x00,0x98,
46396 +0x3c,0x03,0x80,0x01,0x3c,0x02,0x80,0x01,0x24,0x63,0xa1,0x44,0x24,0x42,0xa2,0x5c,
46397 +0xac,0x83,0x00,0xa0,0xac,0x82,0x00,0xa4,0xa0,0x80,0x01,0xba,0xac,0x80,0x01,0xa8,
46398 +0xac,0x80,0x01,0xac,0xac,0x80,0x01,0xb0,0xac,0x80,0x01,0xb4,0xa0,0x80,0x01,0xb8,
46399 +0x03,0xe0,0x00,0x08,0xa0,0x80,0x01,0xb9,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x01,
46400 +0x34,0x63,0x00,0x20,0x24,0x42,0x9e,0x28,0x03,0xe0,0x00,0x08,0xac,0x62,0x00,0x00,
46401 +0x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x01,0x34,0x42,0x00,0x20,0x24,0x63,0x9e,0x40,
46402 +0xac,0x43,0x00,0x00,0x8c,0x82,0x00,0x10,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x11,
46403 +0x00,0x80,0x28,0x21,0x8c,0x82,0x00,0x14,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x0d,
46404 +0x00,0x00,0x00,0x00,0x8c,0x84,0x00,0x10,0x8c,0xa3,0x00,0x14,0x8c,0xa2,0x00,0x04,
46405 +0x00,0x83,0x20,0x21,0x00,0x44,0x10,0x21,0x30,0x43,0x00,0xff,0x00,0x03,0x18,0x2b,
46406 +0x00,0x02,0x12,0x02,0x00,0x43,0x10,0x21,0x00,0x02,0x12,0x00,0x30,0x42,0x3f,0xff,
46407 +0xac,0xa2,0x00,0x04,0xac,0xa0,0x00,0x00,0xac,0xa0,0x00,0x4c,0xac,0xa0,0x00,0x50,
46408 +0xac,0xa0,0x00,0x54,0x03,0xe0,0x00,0x08,0xac,0xa0,0x00,0x0c,0x3c,0x03,0xb0,0x03,
46409 +0x3c,0x02,0x80,0x01,0x34,0x63,0x00,0x20,0x24,0x42,0x9e,0xbc,0xac,0x62,0x00,0x00,
46410 +0x8c,0x86,0x00,0x04,0x3c,0x02,0xb0,0x01,0x24,0x03,0x00,0x01,0x00,0xc2,0x10,0x21,
46411 +0x8c,0x45,0x00,0x00,0xac,0x83,0x00,0x4c,0x00,0x05,0x14,0x02,0x30,0xa3,0x3f,0xff,
46412 +0x30,0x42,0x00,0xff,0xac,0x83,0x00,0x10,0xac,0x82,0x00,0x14,0x8c,0x83,0x00,0x14,
46413 +0xac,0x85,0x00,0x40,0x00,0xc3,0x30,0x21,0x03,0xe0,0x00,0x08,0xac,0x86,0x00,0x08,
46414 +0x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x01,0x27,0xbd,0xff,0xe8,0x34,0x42,0x00,0x20,
46415 +0x24,0x63,0x9f,0x10,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x14,0xac,0x43,0x00,0x00,
46416 +0x8c,0x82,0x00,0x4c,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x0a,0x00,0x80,0x80,0x21,
46417 +0xae,0x00,0x00,0x00,0xae,0x00,0x00,0x4c,0xae,0x00,0x00,0x50,0xae,0x00,0x00,0x54,
46418 +0xae,0x00,0x00,0x0c,0x8f,0xbf,0x00,0x14,0x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,
46419 +0x27,0xbd,0x00,0x18,0x0c,0x00,0x27,0xaf,0x00,0x00,0x00,0x00,0x08,0x00,0x27,0xd1,
46420 +0xae,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x01,0x27,0xbd,0xff,0xe8,
46421 +0x34,0x42,0x00,0x20,0x24,0x63,0x9f,0x74,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x14,
46422 +0xac,0x43,0x00,0x00,0x8c,0x82,0x00,0x4c,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x16,
46423 +0x00,0x80,0x80,0x21,0x8e,0x03,0x00,0x08,0x3c,0x02,0xb0,0x01,0x8e,0x04,0x00,0x44,
46424 +0x00,0x62,0x18,0x21,0x90,0x65,0x00,0x00,0x24,0x02,0x00,0x01,0xae,0x02,0x00,0x50,
46425 +0x30,0xa3,0x00,0xff,0x00,0x03,0x10,0x82,0x00,0x04,0x23,0x02,0x30,0x84,0x00,0x0f,
46426 +0x30,0x42,0x00,0x03,0x00,0x03,0x19,0x02,0xae,0x04,0x00,0x34,0xae,0x02,0x00,0x2c,
46427 +0xae,0x03,0x00,0x30,0xa2,0x05,0x00,0x48,0x8f,0xbf,0x00,0x14,0x8f,0xb0,0x00,0x10,
46428 +0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x0c,0x00,0x27,0xaf,0x00,0x00,0x00,0x00,
46429 +0x08,0x00,0x27,0xe9,0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x01,
46430 +0x27,0xbd,0xff,0xe8,0x34,0x42,0x00,0x20,0x24,0x63,0xa0,0x08,0xaf,0xb0,0x00,0x10,
46431 +0xaf,0xbf,0x00,0x14,0xac,0x43,0x00,0x00,0x8c,0x82,0x00,0x50,0x00,0x00,0x00,0x00,
46432 +0x10,0x40,0x00,0x16,0x00,0x80,0x80,0x21,0x92,0x03,0x00,0x44,0x8e,0x02,0x00,0x40,
46433 +0x83,0x85,0x8b,0xd4,0x92,0x04,0x00,0x41,0x30,0x63,0x00,0x01,0x00,0x02,0x16,0x02,
46434 +0xae,0x04,0x00,0x14,0x00,0x00,0x30,0x21,0xae,0x02,0x00,0x18,0x10,0xa0,0x00,0x04,
46435 +0xae,0x03,0x00,0x3c,0x10,0x60,0x00,0x03,0x24,0x02,0x00,0x01,0x24,0x06,0x00,0x01,
46436 +0x24,0x02,0x00,0x01,0xa3,0x86,0x8b,0xd4,0x8f,0xbf,0x00,0x14,0xae,0x02,0x00,0x54,
46437 +0x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x0c,0x00,0x27,0xdd,
46438 +0x00,0x00,0x00,0x00,0x08,0x00,0x28,0x0e,0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,
46439 +0x3c,0x03,0x80,0x01,0x27,0xbd,0xff,0xe8,0x34,0x42,0x00,0x20,0x24,0x63,0xa0,0x9c,
46440 +0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x14,0xac,0x43,0x00,0x00,0x8c,0x82,0x00,0x50,
46441 +0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x1b,0x00,0x80,0x80,0x21,0x3c,0x02,0xb0,0x03,
46442 +0x8c,0x42,0x00,0x00,0x92,0x04,0x00,0x44,0x8e,0x03,0x00,0x40,0x83,0x86,0x8b,0xd4,
46443 +0x92,0x05,0x00,0x41,0x30,0x42,0x08,0x00,0x30,0x84,0x00,0x01,0x00,0x02,0x12,0xc2,
46444 +0x00,0x03,0x1e,0x02,0x00,0x82,0x20,0x25,0xae,0x05,0x00,0x14,0x00,0x00,0x38,0x21,
46445 +0xae,0x03,0x00,0x18,0x10,0xc0,0x00,0x04,0xae,0x04,0x00,0x3c,0x10,0x80,0x00,0x03,
46446 +0x24,0x02,0x00,0x01,0x24,0x07,0x00,0x01,0x24,0x02,0x00,0x01,0xa3,0x87,0x8b,0xd4,
46447 +0x8f,0xbf,0x00,0x14,0xae,0x02,0x00,0x54,0x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,
46448 +0x27,0xbd,0x00,0x18,0x0c,0x00,0x27,0xdd,0x00,0x00,0x00,0x00,0x08,0x00,0x28,0x33,
46449 +0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x01,0x27,0xbd,0xff,0xe8,
46450 +0x34,0x42,0x00,0x20,0x24,0x63,0xa1,0x44,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x14,
46451 +0xac,0x43,0x00,0x00,0x8c,0x82,0x00,0x54,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x37,
46452 +0x00,0x80,0x80,0x21,0x8e,0x04,0x00,0x04,0x8e,0x03,0x00,0x44,0x3c,0x02,0x80,0x00,
46453 +0x3c,0x05,0xb0,0x01,0x34,0x42,0x00,0x10,0x00,0x85,0x20,0x21,0x00,0x62,0x18,0x25,
46454 +0xac,0x83,0x00,0x04,0x8e,0x02,0x00,0x04,0x8e,0x03,0x01,0xac,0x02,0x00,0x20,0x21,
46455 +0x00,0x45,0x10,0x21,0x8c,0x46,0x00,0x00,0x00,0x03,0x18,0x80,0x27,0x82,0x89,0x68,
46456 +0x00,0x62,0x18,0x21,0xac,0x66,0x00,0x00,0x8e,0x02,0x00,0x04,0x8e,0x03,0x01,0xac,
46457 +0x00,0x45,0x10,0x21,0x8c,0x46,0x00,0x04,0x00,0x03,0x18,0x80,0x27,0x82,0x8a,0x68,
46458 +0x00,0x62,0x18,0x21,0x0c,0x00,0x26,0x10,0xac,0x66,0x00,0x00,0x8e,0x03,0x01,0xac,
46459 +0x8e,0x07,0x00,0x04,0x3c,0x06,0xb0,0x03,0x24,0x65,0x00,0x01,0x28,0xa4,0x00,0x00,
46460 +0x24,0x62,0x00,0x40,0x00,0xa4,0x10,0x0a,0x00,0x02,0x11,0x83,0x00,0x02,0x11,0x80,
46461 +0x00,0x03,0x18,0x80,0x00,0xa2,0x28,0x23,0x00,0x70,0x18,0x21,0xae,0x05,0x01,0xac,
46462 +0xac,0x67,0x00,0xa8,0x34,0xc6,0x00,0x30,0x8c,0xc3,0x00,0x00,0x93,0x82,0x81,0xf0,
46463 +0x02,0x00,0x20,0x21,0x24,0x63,0x00,0x01,0x24,0x42,0x00,0x01,0xac,0xc3,0x00,0x00,
46464 +0xa3,0x82,0x81,0xf0,0x0c,0x00,0x27,0x90,0x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x14,
46465 +0x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x0c,0x00,0x28,0x27,
46466 +0x00,0x00,0x00,0x00,0x08,0x00,0x28,0x5d,0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,
46467 +0x3c,0x03,0x80,0x01,0x27,0xbd,0xff,0xe8,0x34,0x42,0x00,0x20,0x24,0x63,0xa2,0x5c,
46468 +0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x14,0xac,0x43,0x00,0x00,0x8c,0x82,0x00,0x54,
46469 +0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x37,0x00,0x80,0x80,0x21,0x8e,0x04,0x00,0x04,
46470 +0x8e,0x03,0x00,0x44,0x3c,0x02,0x80,0x00,0x3c,0x05,0xb0,0x01,0x34,0x42,0x00,0x10,
46471 +0x00,0x85,0x20,0x21,0x00,0x62,0x18,0x25,0xac,0x83,0x00,0x04,0x8e,0x02,0x00,0x04,
46472 +0x8e,0x03,0x01,0xac,0x02,0x00,0x20,0x21,0x00,0x45,0x10,0x21,0x8c,0x46,0x00,0x00,
46473 +0x00,0x03,0x18,0x80,0x27,0x82,0x89,0x68,0x00,0x62,0x18,0x21,0xac,0x66,0x00,0x00,
46474 +0x8e,0x02,0x00,0x04,0x8e,0x03,0x01,0xac,0x00,0x45,0x10,0x21,0x8c,0x46,0x00,0x04,
46475 +0x00,0x03,0x18,0x80,0x27,0x82,0x8a,0x68,0x00,0x62,0x18,0x21,0x0c,0x00,0x26,0x10,
46476 +0xac,0x66,0x00,0x00,0x8e,0x03,0x01,0xac,0x8e,0x07,0x00,0x04,0x3c,0x06,0xb0,0x03,
46477 +0x24,0x65,0x00,0x01,0x28,0xa4,0x00,0x00,0x24,0x62,0x00,0x40,0x00,0xa4,0x10,0x0a,
46478 +0x00,0x02,0x11,0x83,0x00,0x02,0x11,0x80,0x00,0x03,0x18,0x80,0x00,0xa2,0x28,0x23,
46479 +0x00,0x70,0x18,0x21,0xae,0x05,0x01,0xac,0xac,0x67,0x00,0xa8,0x34,0xc6,0x00,0x30,
46480 +0x8c,0xc3,0x00,0x00,0x93,0x82,0x81,0xf0,0x02,0x00,0x20,0x21,0x24,0x63,0x00,0x01,
46481 +0x24,0x42,0x00,0x01,0xac,0xc3,0x00,0x00,0xa3,0x82,0x81,0xf0,0x0c,0x00,0x27,0x90,
46482 +0x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x14,0x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,
46483 +0x27,0xbd,0x00,0x18,0x0c,0x00,0x28,0x27,0x00,0x00,0x00,0x00,0x08,0x00,0x28,0xa3,
46484 +0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x01,0x34,0x42,0x00,0x20,
46485 +0x24,0x63,0xa3,0x74,0x27,0xbd,0xff,0xe0,0xac,0x43,0x00,0x00,0x3c,0x02,0x80,0x01,
46486 +0xaf,0xb2,0x00,0x18,0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x1c,
46487 +0x00,0x80,0x80,0x21,0x24,0x52,0x9e,0x28,0x00,0x00,0x88,0x21,0x3c,0x03,0xb0,0x09,
46488 +0x34,0x63,0x00,0x06,0x8e,0x06,0x00,0x04,0x90,0x62,0x00,0x00,0x00,0x06,0x22,0x02,
46489 +0x00,0x44,0x10,0x23,0x24,0x44,0x00,0x40,0x28,0x83,0x00,0x00,0x24,0x42,0x00,0x7f,
46490 +0x00,0x83,0x10,0x0a,0x00,0x02,0x11,0x83,0x00,0x02,0x11,0x80,0x24,0x84,0xff,0xff,
46491 +0x10,0x44,0x00,0x68,0x00,0x00,0x28,0x21,0x3c,0x02,0xb0,0x01,0x00,0xc2,0x10,0x21,
46492 +0x8c,0x44,0x00,0x04,0x3c,0x03,0x7c,0x00,0x34,0x63,0x00,0xf0,0x00,0x83,0x18,0x24,
46493 +0xae,0x04,0x00,0x44,0x8c,0x44,0x00,0x00,0x10,0x60,0x00,0x69,0x00,0x00,0x38,0x21,
46494 +0x3c,0x09,0xb0,0x03,0x3c,0x06,0x7c,0x00,0x35,0x29,0x00,0x99,0x3c,0x0a,0xb0,0x01,
46495 +0x24,0x08,0x00,0x40,0x34,0xc6,0x00,0xf0,0x3c,0x0b,0xff,0xff,0x3c,0x0c,0x28,0x38,
46496 +0x16,0x20,0x00,0x06,0x24,0xa5,0x00,0x01,0x93,0x82,0x81,0xf6,0x24,0x11,0x00,0x01,
46497 +0x24,0x42,0x00,0x01,0xa1,0x22,0x00,0x00,0xa3,0x82,0x81,0xf6,0x8e,0x02,0x00,0x04,
46498 +0x24,0x07,0x00,0x01,0x24,0x42,0x01,0x00,0x30,0x42,0x3f,0xff,0xae,0x02,0x00,0x04,
46499 +0x00,0x4a,0x10,0x21,0x8c,0x43,0x00,0x04,0x00,0x00,0x00,0x00,0xae,0x03,0x00,0x44,
46500 +0x8c,0x44,0x00,0x00,0x10,0xa8,0x00,0x2d,0x00,0x66,0x18,0x24,0x14,0x60,0xff,0xec,
46501 +0x00,0x8b,0x10,0x24,0x14,0x4c,0xff,0xea,0x24,0x02,0x00,0x01,0x10,0xe2,0x00,0x2f,
46502 +0x3c,0x03,0xb0,0x09,0x8e,0x02,0x00,0x44,0x8e,0x04,0x00,0x60,0x00,0x02,0x1e,0x42,
46503 +0x00,0x02,0x12,0x02,0x30,0x42,0x00,0x0f,0x30,0x63,0x00,0x01,0xae,0x02,0x00,0x00,
46504 +0x10,0x44,0x00,0x1a,0xae,0x03,0x00,0x58,0x8e,0x02,0x00,0x64,0x8e,0x04,0x00,0x58,
46505 +0x00,0x00,0x00,0x00,0x10,0x82,0x00,0x05,0x00,0x00,0x00,0x00,0xae,0x00,0x00,0x4c,
46506 +0xae,0x00,0x00,0x50,0xae,0x00,0x00,0x54,0xae,0x00,0x00,0x0c,0x8e,0x03,0x00,0x00,
46507 +0x00,0x00,0x00,0x00,0x00,0x03,0x10,0x80,0x00,0x50,0x10,0x21,0x8c,0x42,0x00,0x68,
46508 +0x00,0x00,0x00,0x00,0x10,0x52,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x40,0xf8,0x09,
46509 +0x02,0x00,0x20,0x21,0x8e,0x04,0x00,0x58,0x8e,0x03,0x00,0x00,0x00,0x00,0x00,0x00,
46510 +0xae,0x03,0x00,0x60,0x08,0x00,0x28,0xeb,0xae,0x04,0x00,0x64,0x8e,0x02,0x00,0x64,
46511 +0x00,0x00,0x00,0x00,0x14,0x62,0xff,0xe5,0x00,0x00,0x00,0x00,0x7a,0x02,0x0d,0x7c,
46512 +0x8f,0xbf,0x00,0x1c,0x8f,0xb2,0x00,0x18,0x7b,0xb0,0x00,0xbc,0x00,0x43,0x10,0x26,
46513 +0x00,0x02,0x10,0x2b,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x34,0x63,0x00,0x06,
46514 +0x8e,0x04,0x00,0x04,0x90,0x62,0x00,0x00,0x00,0x04,0x22,0x02,0x00,0x44,0x10,0x23,
46515 +0x24,0x44,0x00,0x40,0x28,0x83,0x00,0x00,0x24,0x42,0x00,0x7f,0x00,0x83,0x10,0x0a,
46516 +0x00,0x02,0x11,0x83,0x00,0x02,0x11,0x80,0x00,0x82,0x20,0x23,0x14,0x87,0xff,0xc5,
46517 +0x00,0x00,0x00,0x00,0x8e,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x2c,0x62,0x00,0x03,
46518 +0x14,0x40,0x00,0x05,0x24,0x02,0x00,0x0d,0x10,0x62,0x00,0x03,0x24,0x02,0x00,0x01,
46519 +0x08,0x00,0x29,0x4b,0xa2,0x02,0x00,0x5c,0x08,0x00,0x29,0x4b,0xa2,0x00,0x00,0x5c,
46520 +0x3c,0x02,0xff,0xff,0x00,0x82,0x10,0x24,0x3c,0x03,0x28,0x38,0x14,0x43,0xff,0x94,
46521 +0x24,0x02,0x00,0x01,0x08,0x00,0x29,0x23,0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,
46522 +0x3c,0x03,0x80,0x01,0x34,0x42,0x00,0x20,0x24,0x63,0xa5,0xcc,0xac,0x43,0x00,0x00,
46523 +0x8c,0x83,0x01,0xa8,0x8c,0x82,0x01,0xac,0x00,0x80,0x40,0x21,0x10,0x62,0x00,0x20,
46524 +0x00,0x00,0x20,0x21,0x93,0x82,0x81,0xf1,0x00,0x03,0x28,0x80,0x3c,0x07,0xb0,0x06,
46525 +0x00,0xa8,0x18,0x21,0x24,0x04,0x00,0x01,0x8c,0x66,0x00,0xa8,0x10,0x44,0x00,0x1c,
46526 +0x34,0xe7,0x80,0x18,0x3c,0x05,0xb0,0x01,0xaf,0x86,0xbc,0x20,0x00,0xc5,0x28,0x21,
46527 +0x8c,0xa3,0x00,0x00,0x00,0x06,0x20,0xc2,0x3c,0x02,0x00,0x80,0x00,0x04,0x22,0x00,
46528 +0x00,0x82,0x20,0x25,0xaf,0x83,0xbc,0x28,0x8c,0xa2,0x00,0x04,0xac,0xe4,0x00,0x00,
46529 +0x8d,0x03,0x01,0xa8,0xaf,0x82,0xbc,0x24,0x24,0x64,0x00,0x01,0x04,0x80,0x00,0x0a,
46530 +0x00,0x80,0x10,0x21,0x00,0x02,0x11,0x83,0x8d,0x03,0x01,0xac,0x00,0x02,0x11,0x80,
46531 +0x00,0x82,0x10,0x23,0x00,0x43,0x18,0x26,0xad,0x02,0x01,0xa8,0x00,0x03,0x20,0x2b,
46532 +0x03,0xe0,0x00,0x08,0x00,0x80,0x10,0x21,0x08,0x00,0x29,0x95,0x24,0x62,0x00,0x40,
46533 +0x27,0x82,0x89,0x68,0x00,0x06,0x20,0xc2,0x00,0x04,0x22,0x00,0x00,0xa2,0x48,0x21,
46534 +0x3c,0x02,0x00,0x80,0x00,0x82,0x58,0x25,0x93,0x82,0x81,0xf0,0x3c,0x0a,0xb0,0x06,
46535 +0x3c,0x03,0xb0,0x01,0x2c,0x42,0x00,0x02,0x00,0xc3,0x38,0x21,0x35,0x4a,0x80,0x18,
46536 +0x14,0x40,0xff,0xef,0x00,0x00,0x20,0x21,0x8c,0xe5,0x00,0x00,0x8d,0x23,0x00,0x00,
46537 +0x24,0x02,0xc0,0x00,0x00,0xa2,0x10,0x24,0x00,0x43,0x10,0x25,0xac,0xe2,0x00,0x00,
46538 +0x8d,0x04,0x01,0xa8,0x27,0x83,0x8a,0x68,0x8c,0xe5,0x00,0x04,0x00,0x04,0x20,0x80,
46539 +0x00,0x83,0x20,0x21,0x8c,0x82,0x00,0x00,0x3c,0x03,0x80,0x00,0x00,0xa2,0x10,0x25,
46540 +0x00,0x43,0x10,0x25,0xac,0xe2,0x00,0x04,0xaf,0x86,0xbc,0x20,0x8c,0xe2,0x00,0x00,
46541 +0x93,0x85,0x81,0xf0,0xaf,0x82,0xbc,0x28,0x8c,0xe3,0x00,0x04,0xad,0x4b,0x00,0x00,
46542 +0x8d,0x02,0x01,0xa8,0xaf,0x83,0xbc,0x24,0x24,0xa5,0xff,0xff,0x24,0x44,0x00,0x01,
46543 +0x28,0x83,0x00,0x00,0x24,0x42,0x00,0x40,0x00,0x83,0x10,0x0a,0x00,0x02,0x11,0x83,
46544 +0x00,0x02,0x11,0x80,0x00,0x82,0x20,0x23,0xad,0x04,0x01,0xa8,0xa3,0x85,0x81,0xf0,
46545 +0x79,0x02,0x0d,0x7c,0x00,0x00,0x00,0x00,0x00,0x43,0x10,0x26,0x08,0x00,0x29,0x9c,
46546 +0x00,0x02,0x20,0x2b,0x3c,0x04,0xb0,0x03,0x3c,0x06,0xb0,0x07,0x3c,0x02,0x80,0x01,
46547 +0x34,0xc6,0x00,0x18,0x34,0x84,0x00,0x20,0x24,0x42,0xa7,0x54,0x24,0x03,0xff,0x83,
46548 +0xac,0x82,0x00,0x00,0xa0,0xc3,0x00,0x00,0x90,0xc4,0x00,0x00,0x27,0xbd,0xff,0xf8,
46549 +0x3c,0x03,0xb0,0x07,0x24,0x02,0xff,0x82,0xa3,0xa4,0x00,0x00,0xa0,0x62,0x00,0x00,
46550 +0x90,0x64,0x00,0x00,0x3c,0x02,0xb0,0x07,0x34,0x42,0x00,0x08,0xa3,0xa4,0x00,0x01,
46551 +0xa0,0x40,0x00,0x00,0x90,0x43,0x00,0x00,0x24,0x02,0x00,0x03,0x3c,0x05,0xb0,0x07,
46552 +0xa3,0xa3,0x00,0x00,0xa0,0xc2,0x00,0x00,0x90,0xc4,0x00,0x00,0x34,0xa5,0x00,0x10,
46553 +0x24,0x02,0x00,0x06,0x3c,0x03,0xb0,0x07,0xa3,0xa4,0x00,0x00,0x34,0x63,0x00,0x38,
46554 +0xa0,0xa2,0x00,0x00,0x90,0x64,0x00,0x00,0x3c,0x02,0xb0,0x07,0x34,0x42,0x00,0x20,
46555 +0xa3,0xa4,0x00,0x00,0xa0,0xa0,0x00,0x00,0x90,0xa3,0x00,0x00,0xaf,0x82,0xbf,0x30,
46556 +0xa3,0xa3,0x00,0x00,0xa0,0x40,0x00,0x00,0x90,0x43,0x00,0x00,0x03,0xe0,0x00,0x08,
46557 +0x27,0xbd,0x00,0x08,};
46558 +
46559 +static u8 rtl8192e_fwdata_array[] = {
46560 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x10,0x00,0x08,0x00,
46561 +0x02,0xe9,0x01,0x74,0x02,0xab,0x01,0xc7,0x01,0x55,0x00,0xe4,0x00,0xab,0x00,0x72,
46562 +0x00,0x55,0x00,0x4c,0x00,0x4c,0x00,0x4c,0x00,0x4c,0x00,0x4c,0x02,0x76,0x01,0x3b,
46563 +0x00,0xd2,0x00,0x9e,0x00,0x69,0x00,0x4f,0x00,0x46,0x00,0x3f,0x01,0x3b,0x00,0x9e,
46564 +0x00,0x69,0x00,0x4f,0x00,0x35,0x00,0x27,0x00,0x23,0x00,0x20,0x01,0x2f,0x00,0x98,
46565 +0x00,0x65,0x00,0x4c,0x00,0x33,0x00,0x26,0x00,0x22,0x00,0x1e,0x00,0x98,0x00,0x4c,
46566 +0x00,0x33,0x00,0x26,0x00,0x19,0x00,0x13,0x00,0x11,0x00,0x0f,0x02,0x39,0x01,0x1c,
46567 +0x00,0xbd,0x00,0x8e,0x00,0x5f,0x00,0x47,0x00,0x3f,0x00,0x39,0x01,0x1c,0x00,0x8e,
46568 +0x00,0x5f,0x00,0x47,0x00,0x2f,0x00,0x23,0x00,0x20,0x00,0x1c,0x01,0x11,0x00,0x89,
46569 +0x00,0x5b,0x00,0x44,0x00,0x2e,0x00,0x22,0x00,0x1e,0x00,0x1b,0x00,0x89,0x00,0x44,
46570 +0x00,0x2e,0x00,0x22,0x00,0x17,0x00,0x11,0x00,0x0f,0x00,0x0e,0x02,0xab,0x02,0xab,
46571 +0x02,0x66,0x02,0x66,0x07,0x06,0x06,0x06,0x05,0x06,0x07,0x08,0x04,0x06,0x07,0x08,
46572 +0x09,0x0a,0x0b,0x0b,0x49,0x6e,0x74,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x54,0x4c,
46573 +0x42,0x4d,0x4f,0x44,0x00,0x00,0x00,0x00,0x54,0x4c,0x42,0x4c,0x5f,0x64,0x61,0x74,
46574 +0x61,0x00,0x54,0x4c,0x42,0x53,0x00,0x00,0x00,0x00,0x00,0x00,0x41,0x64,0x45,0x4c,
46575 +0x5f,0x64,0x61,0x74,0x61,0x00,0x41,0x64,0x45,0x53,0x00,0x00,0x00,0x00,0x00,0x00,
46576 +0x45,0x78,0x63,0x43,0x6f,0x64,0x65,0x36,0x00,0x00,0x45,0x78,0x63,0x43,0x6f,0x64,
46577 +0x65,0x37,0x00,0x00,0x53,0x79,0x73,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x42,0x70,
46578 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x52,0x49,0x00,0x00,0x00,0x00,0x00,0x00,
46579 +0x00,0x00,0x43,0x70,0x55,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x4f,0x76,0x00,0x00,
46580 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x01,0x0b,0x63,
46581 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x00,0x00,0x00,0x10,0x00,0x00,0x00,0x2c,
46582 +0x00,0x00,0x00,0x58,0x00,0x00,0x00,0x30,0x00,0x00,0x00,0x48,0x00,0x00,0x00,0x60,
46583 +0x00,0x00,0x00,0x90,0x00,0x00,0x00,0xc0,0x00,0x00,0x01,0x20,0x00,0x00,0x01,0x80,
46584 +0x00,0x00,0x01,0xb0,0x00,0x00,0x00,0x34,0x00,0x00,0x00,0x68,0x00,0x00,0x00,0x9c,
46585 +0x00,0x00,0x00,0xd0,0x00,0x00,0x01,0x38,0x00,0x00,0x01,0xa0,0x00,0x00,0x01,0xd4,
46586 +0x00,0x00,0x02,0x08,0x00,0x00,0x00,0x68,0x00,0x00,0x00,0xd0,0x00,0x00,0x01,0x38,
46587 +0x00,0x00,0x01,0xa0,0x00,0x00,0x02,0x6f,0x00,0x00,0x03,0x40,0x00,0x00,0x03,0xa8,
46588 +0x00,0x00,0x04,0x10,0x01,0x01,0x01,0x02,0x01,0x01,0x02,0x02,0x03,0x03,0x04,0x04,
46589 +0x01,0x01,0x02,0x02,0x03,0x03,0x04,0x04,0x02,0x03,0x03,0x04,0x05,0x06,0x07,0x08,
46590 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x00,0x07,0x6c,0x80,0x00,0x07,0x80,
46591 +0x80,0x00,0x07,0x80,0x80,0x00,0x07,0x70,0x80,0x00,0x07,0x70,0x80,0x00,0x07,0x94,
46592 +0x80,0x00,0x56,0xb0,0x80,0x00,0x57,0x08,0x80,0x00,0x57,0x30,0x80,0x00,0x58,0x28,
46593 +0x80,0x00,0x58,0xe0,0x80,0x00,0x59,0x88,0x80,0x00,0x59,0xfc,0x80,0x00,0x5b,0x08,
46594 +0x80,0x00,0x5b,0x40,0x80,0x00,0x5b,0x54,0x80,0x00,0x5b,0x68,0x80,0x00,0x5c,0x50,
46595 +0x80,0x00,0x5c,0x90,0x80,0x00,0x5d,0x44,0x80,0x00,0x5d,0x6c,0x80,0x00,0x56,0x70,
46596 +0x80,0x00,0x5d,0xbc,0x80,0x00,0x64,0x48,0x80,0x00,0x64,0xc0,0x80,0x00,0x64,0xcc,
46597 +0x80,0x00,0x64,0xd8,0x80,0x00,0x64,0x60,0x80,0x00,0x64,0x60,0x80,0x00,0x64,0x60,
46598 +0x80,0x00,0x64,0x60,0x80,0x00,0x64,0x60,0x80,0x00,0x64,0x60,0x80,0x00,0x64,0x60,
46599 +0x80,0x00,0x64,0x60,0x80,0x00,0x64,0x60,0x80,0x00,0x64,0x60,0x80,0x00,0x64,0x60,
46600 +0x80,0x00,0x64,0x60,0x80,0x00,0x64,0xe4,0x80,0x00,0x64,0xf0,0x80,0x00,0x64,0xfc,
46601 +0x80,0x00,0x87,0xa4,0x80,0x00,0x87,0xa4,0x80,0x00,0x87,0xa4,0x80,0x00,0x87,0xd8,
46602 +0x80,0x00,0x88,0x18,0x80,0x00,0x88,0x50,0x80,0x00,0x88,0x80,0x80,0x00,0x88,0xb0,
46603 +0x80,0x00,0x88,0xc4,0x80,0x00,0x89,0x2c,0x80,0x00,0x89,0x40,0x80,0x00,0x89,0x7c,
46604 +0x80,0x00,0x89,0x84,0x80,0x00,0x89,0xc0,0x80,0x00,0x89,0xd4,0x80,0x00,0x89,0xdc,
46605 +0x80,0x00,0x89,0xe4,0x80,0x00,0x89,0xe4,0x80,0x00,0x89,0xe4,0x80,0x00,0x89,0xe4,
46606 +0x80,0x00,0x8a,0x14,0x80,0x00,0x8a,0x28,0x80,0x00,0x8a,0x3c,0x80,0x00,0x86,0xe8,
46607 +0x80,0x00,0x8d,0x68,0x80,0x00,0x8d,0x68,0x80,0x00,0x8d,0x68,0x80,0x00,0x8d,0x9c,
46608 +0x80,0x00,0x8d,0xdc,0x80,0x00,0x8e,0x14,0x80,0x00,0x8e,0x44,0x80,0x00,0x8e,0x74,
46609 +0x80,0x00,0x8e,0x88,0x80,0x00,0x8e,0xf0,0x80,0x00,0x8f,0x04,0x80,0x00,0x8f,0x40,
46610 +0x80,0x00,0x8f,0x48,0x80,0x00,0x8f,0x84,0x80,0x00,0x8f,0x98,0x80,0x00,0x8f,0xa0,
46611 +0x80,0x00,0x8f,0xa8,0x80,0x00,0x8f,0xa8,0x80,0x00,0x8f,0xa8,0x80,0x00,0x8f,0xa8,
46612 +0x80,0x00,0x8f,0xd8,0x80,0x00,0x8f,0xec,0x80,0x00,0x90,0x00,0x80,0x00,0x8b,0x88,
46613 +};
46614 +
46615 +#endif
46616 --- /dev/null
46617 +++ b/drivers/staging/rtl8192e/r819xE_phy.c
46618 @@ -0,0 +1,3352 @@
46619 +#include "r8192E.h"
46620 +#include "r8192E_hw.h"
46621 +#include "r819xE_phyreg.h"
46622 +#include "r8190_rtl8256.h"
46623 +#include "r819xE_phy.h"
46624 +#include "r8192E_dm.h"
46625 +#ifdef ENABLE_DOT11D
46626 +#include "dot11d.h"
46627 +#endif
46628 +static u32 RF_CHANNEL_TABLE_ZEBRA[] = {
46629 + 0,
46630 + 0x085c, //2412 1
46631 + 0x08dc, //2417 2
46632 + 0x095c, //2422 3
46633 + 0x09dc, //2427 4
46634 + 0x0a5c, //2432 5
46635 + 0x0adc, //2437 6
46636 + 0x0b5c, //2442 7
46637 + 0x0bdc, //2447 8
46638 + 0x0c5c, //2452 9
46639 + 0x0cdc, //2457 10
46640 + 0x0d5c, //2462 11
46641 + 0x0ddc, //2467 12
46642 + 0x0e5c, //2472 13
46643 + 0x0f72, //2484
46644 +};
46645 +#ifdef RTL8190P
46646 +u32 Rtl8190PciMACPHY_Array[] = {
46647 +0x03c,0xffff0000,0x00000f0f,
46648 +0x340,0xffffffff,0x161a1a1a,
46649 +0x344,0xffffffff,0x12121416,
46650 +0x348,0x0000ffff,0x00001818,
46651 +0x12c,0xffffffff,0x04000802,
46652 +0x318,0x00000fff,0x00000800,
46653 +};
46654 +u32 Rtl8190PciMACPHY_Array_PG[] = {
46655 +0x03c,0xffff0000,0x00000f0f,
46656 +0x340,0xffffffff,0x0a0c0d0f,
46657 +0x344,0xffffffff,0x06070809,
46658 +0x344,0xffffffff,0x06070809,
46659 +0x348,0x0000ffff,0x00000000,
46660 +0x12c,0xffffffff,0x04000802,
46661 +0x318,0x00000fff,0x00000800,
46662 +};
46663 +
46664 +u32 Rtl8190PciAGCTAB_Array[AGCTAB_ArrayLength] = {
46665 +0xc78,0x7d000001,
46666 +0xc78,0x7d010001,
46667 +0xc78,0x7d020001,
46668 +0xc78,0x7d030001,
46669 +0xc78,0x7c040001,
46670 +0xc78,0x7b050001,
46671 +0xc78,0x7a060001,
46672 +0xc78,0x79070001,
46673 +0xc78,0x78080001,
46674 +0xc78,0x77090001,
46675 +0xc78,0x760a0001,
46676 +0xc78,0x750b0001,
46677 +0xc78,0x740c0001,
46678 +0xc78,0x730d0001,
46679 +0xc78,0x720e0001,
46680 +0xc78,0x710f0001,
46681 +0xc78,0x70100001,
46682 +0xc78,0x6f110001,
46683 +0xc78,0x6e120001,
46684 +0xc78,0x6d130001,
46685 +0xc78,0x6c140001,
46686 +0xc78,0x6b150001,
46687 +0xc78,0x6a160001,
46688 +0xc78,0x69170001,
46689 +0xc78,0x68180001,
46690 +0xc78,0x67190001,
46691 +0xc78,0x661a0001,
46692 +0xc78,0x651b0001,
46693 +0xc78,0x641c0001,
46694 +0xc78,0x491d0001,
46695 +0xc78,0x481e0001,
46696 +0xc78,0x471f0001,
46697 +0xc78,0x46200001,
46698 +0xc78,0x45210001,
46699 +0xc78,0x44220001,
46700 +0xc78,0x43230001,
46701 +0xc78,0x28240001,
46702 +0xc78,0x27250001,
46703 +0xc78,0x26260001,
46704 +0xc78,0x25270001,
46705 +0xc78,0x24280001,
46706 +0xc78,0x23290001,
46707 +0xc78,0x222a0001,
46708 +0xc78,0x212b0001,
46709 +0xc78,0x202c0001,
46710 +0xc78,0x0a2d0001,
46711 +0xc78,0x082e0001,
46712 +0xc78,0x062f0001,
46713 +0xc78,0x05300001,
46714 +0xc78,0x04310001,
46715 +0xc78,0x03320001,
46716 +0xc78,0x02330001,
46717 +0xc78,0x01340001,
46718 +0xc78,0x00350001,
46719 +0xc78,0x00360001,
46720 +0xc78,0x00370001,
46721 +0xc78,0x00380001,
46722 +0xc78,0x00390001,
46723 +0xc78,0x003a0001,
46724 +0xc78,0x003b0001,
46725 +0xc78,0x003c0001,
46726 +0xc78,0x003d0001,
46727 +0xc78,0x003e0001,
46728 +0xc78,0x003f0001,
46729 +0xc78,0x7d400001,
46730 +0xc78,0x7d410001,
46731 +0xc78,0x7d420001,
46732 +0xc78,0x7d430001,
46733 +0xc78,0x7c440001,
46734 +0xc78,0x7b450001,
46735 +0xc78,0x7a460001,
46736 +0xc78,0x79470001,
46737 +0xc78,0x78480001,
46738 +0xc78,0x77490001,
46739 +0xc78,0x764a0001,
46740 +0xc78,0x754b0001,
46741 +0xc78,0x744c0001,
46742 +0xc78,0x734d0001,
46743 +0xc78,0x724e0001,
46744 +0xc78,0x714f0001,
46745 +0xc78,0x70500001,
46746 +0xc78,0x6f510001,
46747 +0xc78,0x6e520001,
46748 +0xc78,0x6d530001,
46749 +0xc78,0x6c540001,
46750 +0xc78,0x6b550001,
46751 +0xc78,0x6a560001,
46752 +0xc78,0x69570001,
46753 +0xc78,0x68580001,
46754 +0xc78,0x67590001,
46755 +0xc78,0x665a0001,
46756 +0xc78,0x655b0001,
46757 +0xc78,0x645c0001,
46758 +0xc78,0x495d0001,
46759 +0xc78,0x485e0001,
46760 +0xc78,0x475f0001,
46761 +0xc78,0x46600001,
46762 +0xc78,0x45610001,
46763 +0xc78,0x44620001,
46764 +0xc78,0x43630001,
46765 +0xc78,0x28640001,
46766 +0xc78,0x27650001,
46767 +0xc78,0x26660001,
46768 +0xc78,0x25670001,
46769 +0xc78,0x24680001,
46770 +0xc78,0x23690001,
46771 +0xc78,0x226a0001,
46772 +0xc78,0x216b0001,
46773 +0xc78,0x206c0001,
46774 +0xc78,0x0a6d0001,
46775 +0xc78,0x086e0001,
46776 +0xc78,0x066f0001,
46777 +0xc78,0x05700001,
46778 +0xc78,0x04710001,
46779 +0xc78,0x03720001,
46780 +0xc78,0x02730001,
46781 +0xc78,0x01740001,
46782 +0xc78,0x00750001,
46783 +0xc78,0x00760001,
46784 +0xc78,0x00770001,
46785 +0xc78,0x00780001,
46786 +0xc78,0x00790001,
46787 +0xc78,0x007a0001,
46788 +0xc78,0x007b0001,
46789 +0xc78,0x007c0001,
46790 +0xc78,0x007d0001,
46791 +0xc78,0x007e0001,
46792 +0xc78,0x007f0001,
46793 +0xc78,0x3600001e,
46794 +0xc78,0x3601001e,
46795 +0xc78,0x3602001e,
46796 +0xc78,0x3603001e,
46797 +0xc78,0x3604001e,
46798 +0xc78,0x3605001e,
46799 +0xc78,0x3a06001e,
46800 +0xc78,0x3c07001e,
46801 +0xc78,0x3e08001e,
46802 +0xc78,0x4209001e,
46803 +0xc78,0x430a001e,
46804 +0xc78,0x450b001e,
46805 +0xc78,0x470c001e,
46806 +0xc78,0x480d001e,
46807 +0xc78,0x490e001e,
46808 +0xc78,0x4b0f001e,
46809 +0xc78,0x4c10001e,
46810 +0xc78,0x4d11001e,
46811 +0xc78,0x4d12001e,
46812 +0xc78,0x4e13001e,
46813 +0xc78,0x4f14001e,
46814 +0xc78,0x5015001e,
46815 +0xc78,0x5116001e,
46816 +0xc78,0x5117001e,
46817 +0xc78,0x5218001e,
46818 +0xc78,0x5219001e,
46819 +0xc78,0x531a001e,
46820 +0xc78,0x541b001e,
46821 +0xc78,0x541c001e,
46822 +0xc78,0x551d001e,
46823 +0xc78,0x561e001e,
46824 +0xc78,0x561f001e,
46825 +0xc78,0x5720001e,
46826 +0xc78,0x5821001e,
46827 +0xc78,0x5822001e,
46828 +0xc78,0x5923001e,
46829 +0xc78,0x5924001e,
46830 +0xc78,0x5a25001e,
46831 +0xc78,0x5b26001e,
46832 +0xc78,0x5b27001e,
46833 +0xc78,0x5c28001e,
46834 +0xc78,0x5c29001e,
46835 +0xc78,0x5d2a001e,
46836 +0xc78,0x5d2b001e,
46837 +0xc78,0x5e2c001e,
46838 +0xc78,0x5e2d001e,
46839 +0xc78,0x5f2e001e,
46840 +0xc78,0x602f001e,
46841 +0xc78,0x6030001e,
46842 +0xc78,0x6131001e,
46843 +0xc78,0x6132001e,
46844 +0xc78,0x6233001e,
46845 +0xc78,0x6234001e,
46846 +0xc78,0x6335001e,
46847 +0xc78,0x6336001e,
46848 +0xc78,0x6437001e,
46849 +0xc78,0x6538001e,
46850 +0xc78,0x6639001e,
46851 +0xc78,0x663a001e,
46852 +0xc78,0x673b001e,
46853 +0xc78,0x683c001e,
46854 +0xc78,0x693d001e,
46855 +0xc78,0x6a3e001e,
46856 +0xc78,0x6b3f001e,
46857 +};
46858 +
46859 +u32 Rtl8190PciPHY_REGArray[PHY_REGArrayLength] = {
46860 +0x800,0x00050060,
46861 +0x804,0x00000005,
46862 +0x808,0x0000fc00,
46863 +0x80c,0x0000001c,
46864 +0x810,0x801010aa,
46865 +0x814,0x000908c0,
46866 +0x818,0x00000000,
46867 +0x81c,0x00000000,
46868 +0x820,0x00000004,
46869 +0x824,0x00690000,
46870 +0x828,0x00000004,
46871 +0x82c,0x00e90000,
46872 +0x830,0x00000004,
46873 +0x834,0x00690000,
46874 +0x838,0x00000004,
46875 +0x83c,0x00e90000,
46876 +0x840,0x00000000,
46877 +0x844,0x00000000,
46878 +0x848,0x00000000,
46879 +0x84c,0x00000000,
46880 +0x850,0x00000000,
46881 +0x854,0x00000000,
46882 +0x858,0x65a965a9,
46883 +0x85c,0x65a965a9,
46884 +0x860,0x001f0010,
46885 +0x864,0x007f0010,
46886 +0x868,0x001f0010,
46887 +0x86c,0x007f0010,
46888 +0x870,0x0f100f70,
46889 +0x874,0x0f100f70,
46890 +0x878,0x00000000,
46891 +0x87c,0x00000000,
46892 +0x880,0x5c385eb8,
46893 +0x884,0x6357060d,
46894 +0x888,0x0460c341,
46895 +0x88c,0x0000ff00,
46896 +0x890,0x00000000,
46897 +0x894,0xfffffffe,
46898 +0x898,0x4c42382f,
46899 +0x89c,0x00656056,
46900 +0x8b0,0x00000000,
46901 +0x8e0,0x00000000,
46902 +0x8e4,0x00000000,
46903 +0x900,0x00000000,
46904 +0x904,0x00000023,
46905 +0x908,0x00000000,
46906 +0x90c,0x35541545,
46907 +0xa00,0x00d0c7d8,
46908 +0xa04,0xab1f0008,
46909 +0xa08,0x80cd8300,
46910 +0xa0c,0x2e62740f,
46911 +0xa10,0x95009b78,
46912 +0xa14,0x11145008,
46913 +0xa18,0x00881117,
46914 +0xa1c,0x89140fa0,
46915 +0xa20,0x1a1b0000,
46916 +0xa24,0x090e1317,
46917 +0xa28,0x00000204,
46918 +0xa2c,0x00000000,
46919 +0xc00,0x00000040,
46920 +0xc04,0x0000500f,
46921 +0xc08,0x000000e4,
46922 +0xc0c,0x6c6c6c6c,
46923 +0xc10,0x08000000,
46924 +0xc14,0x40000100,
46925 +0xc18,0x08000000,
46926 +0xc1c,0x40000100,
46927 +0xc20,0x08000000,
46928 +0xc24,0x40000100,
46929 +0xc28,0x08000000,
46930 +0xc2c,0x40000100,
46931 +0xc30,0x6de9ac44,
46932 +0xc34,0x164052cd,
46933 +0xc38,0x00070a14,
46934 +0xc3c,0x0a969764,
46935 +0xc40,0x1f7c403f,
46936 +0xc44,0x000100b7,
46937 +0xc48,0xec020000,
46938 +0xc4c,0x00000300,
46939 +0xc50,0x69543420,
46940 +0xc54,0x433c0094,
46941 +0xc58,0x69543420,
46942 +0xc5c,0x433c0094,
46943 +0xc60,0x69543420,
46944 +0xc64,0x433c0094,
46945 +0xc68,0x69543420,
46946 +0xc6c,0x433c0094,
46947 +0xc70,0x2c7f000d,
46948 +0xc74,0x0186175b,
46949 +0xc78,0x0000001f,
46950 +0xc7c,0x00b91612,
46951 +0xc80,0x40000100,
46952 +0xc84,0x00000000,
46953 +0xc88,0x40000100,
46954 +0xc8c,0x08000000,
46955 +0xc90,0x40000100,
46956 +0xc94,0x00000000,
46957 +0xc98,0x40000100,
46958 +0xc9c,0x00000000,
46959 +0xca0,0x00492492,
46960 +0xca4,0x00000000,
46961 +0xca8,0x00000000,
46962 +0xcac,0x00000000,
46963 +0xcb0,0x00000000,
46964 +0xcb4,0x00000000,
46965 +0xcb8,0x00000000,
46966 +0xcbc,0x00492492,
46967 +0xcc0,0x00000000,
46968 +0xcc4,0x00000000,
46969 +0xcc8,0x00000000,
46970 +0xccc,0x00000000,
46971 +0xcd0,0x00000000,
46972 +0xcd4,0x00000000,
46973 +0xcd8,0x64b22427,
46974 +0xcdc,0x00766932,
46975 +0xce0,0x00222222,
46976 +0xd00,0x00000740,
46977 +0xd04,0x0000040f,
46978 +0xd08,0x0000803f,
46979 +0xd0c,0x00000001,
46980 +0xd10,0xa0633333,
46981 +0xd14,0x33333c63,
46982 +0xd18,0x6a8f5b6b,
46983 +0xd1c,0x00000000,
46984 +0xd20,0x00000000,
46985 +0xd24,0x00000000,
46986 +0xd28,0x00000000,
46987 +0xd2c,0xcc979975,
46988 +0xd30,0x00000000,
46989 +0xd34,0x00000000,
46990 +0xd38,0x00000000,
46991 +0xd3c,0x00027293,
46992 +0xd40,0x00000000,
46993 +0xd44,0x00000000,
46994 +0xd48,0x00000000,
46995 +0xd4c,0x00000000,
46996 +0xd50,0x6437140a,
46997 +0xd54,0x024dbd02,
46998 +0xd58,0x00000000,
46999 +0xd5c,0x14032064,
47000 +};
47001 +u32 Rtl8190PciPHY_REG_1T2RArray[PHY_REG_1T2RArrayLength] = {
47002 +0x800,0x00050060,
47003 +0x804,0x00000004,
47004 +0x808,0x0000fc00,
47005 +0x80c,0x0000001c,
47006 +0x810,0x801010aa,
47007 +0x814,0x000908c0,
47008 +0x818,0x00000000,
47009 +0x81c,0x00000000,
47010 +0x820,0x00000004,
47011 +0x824,0x00690000,
47012 +0x828,0x00000004,
47013 +0x82c,0x00e90000,
47014 +0x830,0x00000004,
47015 +0x834,0x00690000,
47016 +0x838,0x00000004,
47017 +0x83c,0x00e90000,
47018 +0x840,0x00000000,
47019 +0x844,0x00000000,
47020 +0x848,0x00000000,
47021 +0x84c,0x00000000,
47022 +0x850,0x00000000,
47023 +0x854,0x00000000,
47024 +0x858,0x65a965a9,
47025 +0x85c,0x65a965a9,
47026 +0x860,0x001f0000,
47027 +0x864,0x007f0000,
47028 +0x868,0x001f0010,
47029 +0x86c,0x007f0010,
47030 +0x870,0x0f100f70,
47031 +0x874,0x0f100f70,
47032 +0x878,0x00000000,
47033 +0x87c,0x00000000,
47034 +0x880,0x5c385898,
47035 +0x884,0x6357060d,
47036 +0x888,0x0460c341,
47037 +0x88c,0x0000fc00,
47038 +0x890,0x00000000,
47039 +0x894,0xfffffffe,
47040 +0x898,0x4c42382f,
47041 +0x89c,0x00656056,
47042 +0x8b0,0x00000000,
47043 +0x8e0,0x00000000,
47044 +0x8e4,0x00000000,
47045 +0x900,0x00000000,
47046 +0x904,0x00000023,
47047 +0x908,0x00000000,
47048 +0x90c,0x34441444,
47049 +0xa00,0x00d0c7d8,
47050 +0xa04,0x2b1f0008,
47051 +0xa08,0x80cd8300,
47052 +0xa0c,0x2e62740f,
47053 +0xa10,0x95009b78,
47054 +0xa14,0x11145008,
47055 +0xa18,0x00881117,
47056 +0xa1c,0x89140fa0,
47057 +0xa20,0x1a1b0000,
47058 +0xa24,0x090e1317,
47059 +0xa28,0x00000204,
47060 +0xa2c,0x00000000,
47061 +0xc00,0x00000040,
47062 +0xc04,0x0000500c,
47063 +0xc08,0x000000e4,
47064 +0xc0c,0x6c6c6c6c,
47065 +0xc10,0x08000000,
47066 +0xc14,0x40000100,
47067 +0xc18,0x08000000,
47068 +0xc1c,0x40000100,
47069 +0xc20,0x08000000,
47070 +0xc24,0x40000100,
47071 +0xc28,0x08000000,
47072 +0xc2c,0x40000100,
47073 +0xc30,0x6de9ac44,
47074 +0xc34,0x164052cd,
47075 +0xc38,0x00070a14,
47076 +0xc3c,0x0a969764,
47077 +0xc40,0x1f7c403f,
47078 +0xc44,0x000100b7,
47079 +0xc48,0xec020000,
47080 +0xc4c,0x00000300,
47081 +0xc50,0x69543420,
47082 +0xc54,0x433c0094,
47083 +0xc58,0x69543420,
47084 +0xc5c,0x433c0094,
47085 +0xc60,0x69543420,
47086 +0xc64,0x433c0094,
47087 +0xc68,0x69543420,
47088 +0xc6c,0x433c0094,
47089 +0xc70,0x2c7f000d,
47090 +0xc74,0x0186175b,
47091 +0xc78,0x0000001f,
47092 +0xc7c,0x00b91612,
47093 +0xc80,0x40000100,
47094 +0xc84,0x00000000,
47095 +0xc88,0x40000100,
47096 +0xc8c,0x08000000,
47097 +0xc90,0x40000100,
47098 +0xc94,0x00000000,
47099 +0xc98,0x40000100,
47100 +0xc9c,0x00000000,
47101 +0xca0,0x00492492,
47102 +0xca4,0x00000000,
47103 +0xca8,0x00000000,
47104 +0xcac,0x00000000,
47105 +0xcb0,0x00000000,
47106 +0xcb4,0x00000000,
47107 +0xcb8,0x00000000,
47108 +0xcbc,0x00492492,
47109 +0xcc0,0x00000000,
47110 +0xcc4,0x00000000,
47111 +0xcc8,0x00000000,
47112 +0xccc,0x00000000,
47113 +0xcd0,0x00000000,
47114 +0xcd4,0x00000000,
47115 +0xcd8,0x64b22427,
47116 +0xcdc,0x00766932,
47117 +0xce0,0x00222222,
47118 +0xd00,0x00000740,
47119 +0xd04,0x0000040c,
47120 +0xd08,0x0000803f,
47121 +0xd0c,0x00000001,
47122 +0xd10,0xa0633333,
47123 +0xd14,0x33333c63,
47124 +0xd18,0x6a8f5b6b,
47125 +0xd1c,0x00000000,
47126 +0xd20,0x00000000,
47127 +0xd24,0x00000000,
47128 +0xd28,0x00000000,
47129 +0xd2c,0xcc979975,
47130 +0xd30,0x00000000,
47131 +0xd34,0x00000000,
47132 +0xd38,0x00000000,
47133 +0xd3c,0x00027293,
47134 +0xd40,0x00000000,
47135 +0xd44,0x00000000,
47136 +0xd48,0x00000000,
47137 +0xd4c,0x00000000,
47138 +0xd50,0x6437140a,
47139 +0xd54,0x024dbd02,
47140 +0xd58,0x00000000,
47141 +0xd5c,0x14032064,
47142 +};
47143 +
47144 +u32 Rtl8190PciRadioA_Array[RadioA_ArrayLength] = {
47145 +0x019,0x00000003,
47146 +0x000,0x000000bf,
47147 +0x001,0x00000ee0,
47148 +0x002,0x0000004c,
47149 +0x003,0x000007f1,
47150 +0x004,0x00000975,
47151 +0x005,0x00000c58,
47152 +0x006,0x00000ae6,
47153 +0x007,0x000000ca,
47154 +0x008,0x00000e1c,
47155 +0x009,0x000007f0,
47156 +0x00a,0x000009d0,
47157 +0x00b,0x000001ba,
47158 +0x00c,0x00000240,
47159 +0x00e,0x00000020,
47160 +0x00f,0x00000990,
47161 +0x012,0x00000806,
47162 +0x014,0x000005ab,
47163 +0x015,0x00000f80,
47164 +0x016,0x00000020,
47165 +0x017,0x00000597,
47166 +0x018,0x0000050a,
47167 +0x01a,0x00000f80,
47168 +0x01b,0x00000f5e,
47169 +0x01c,0x00000008,
47170 +0x01d,0x00000607,
47171 +0x01e,0x000006cc,
47172 +0x01f,0x00000000,
47173 +0x020,0x000001a5,
47174 +0x01f,0x00000001,
47175 +0x020,0x00000165,
47176 +0x01f,0x00000002,
47177 +0x020,0x000000c6,
47178 +0x01f,0x00000003,
47179 +0x020,0x00000086,
47180 +0x01f,0x00000004,
47181 +0x020,0x00000046,
47182 +0x01f,0x00000005,
47183 +0x020,0x000001e6,
47184 +0x01f,0x00000006,
47185 +0x020,0x000001a6,
47186 +0x01f,0x00000007,
47187 +0x020,0x00000166,
47188 +0x01f,0x00000008,
47189 +0x020,0x000000c7,
47190 +0x01f,0x00000009,
47191 +0x020,0x00000087,
47192 +0x01f,0x0000000a,
47193 +0x020,0x000000f7,
47194 +0x01f,0x0000000b,
47195 +0x020,0x000000d7,
47196 +0x01f,0x0000000c,
47197 +0x020,0x000000b7,
47198 +0x01f,0x0000000d,
47199 +0x020,0x00000097,
47200 +0x01f,0x0000000e,
47201 +0x020,0x00000077,
47202 +0x01f,0x0000000f,
47203 +0x020,0x00000057,
47204 +0x01f,0x00000010,
47205 +0x020,0x00000037,
47206 +0x01f,0x00000011,
47207 +0x020,0x000000fb,
47208 +0x01f,0x00000012,
47209 +0x020,0x000000db,
47210 +0x01f,0x00000013,
47211 +0x020,0x000000bb,
47212 +0x01f,0x00000014,
47213 +0x020,0x000000ff,
47214 +0x01f,0x00000015,
47215 +0x020,0x000000e3,
47216 +0x01f,0x00000016,
47217 +0x020,0x000000c3,
47218 +0x01f,0x00000017,
47219 +0x020,0x000000a3,
47220 +0x01f,0x00000018,
47221 +0x020,0x00000083,
47222 +0x01f,0x00000019,
47223 +0x020,0x00000063,
47224 +0x01f,0x0000001a,
47225 +0x020,0x00000043,
47226 +0x01f,0x0000001b,
47227 +0x020,0x00000023,
47228 +0x01f,0x0000001c,
47229 +0x020,0x00000003,
47230 +0x01f,0x0000001d,
47231 +0x020,0x000001e3,
47232 +0x01f,0x0000001e,
47233 +0x020,0x000001c3,
47234 +0x01f,0x0000001f,
47235 +0x020,0x000001a3,
47236 +0x01f,0x00000020,
47237 +0x020,0x00000183,
47238 +0x01f,0x00000021,
47239 +0x020,0x00000163,
47240 +0x01f,0x00000022,
47241 +0x020,0x00000143,
47242 +0x01f,0x00000023,
47243 +0x020,0x00000123,
47244 +0x01f,0x00000024,
47245 +0x020,0x00000103,
47246 +0x023,0x00000203,
47247 +0x024,0x00000200,
47248 +0x00b,0x000001ba,
47249 +0x02c,0x000003d7,
47250 +0x02d,0x00000ff0,
47251 +0x000,0x00000037,
47252 +0x004,0x00000160,
47253 +0x007,0x00000080,
47254 +0x002,0x0000088d,
47255 +0x0fe,0x00000000,
47256 +0x0fe,0x00000000,
47257 +0x016,0x00000200,
47258 +0x016,0x00000380,
47259 +0x016,0x00000020,
47260 +0x016,0x000001a0,
47261 +0x000,0x000000bf,
47262 +0x00d,0x0000001f,
47263 +0x00d,0x00000c9f,
47264 +0x002,0x0000004d,
47265 +0x000,0x00000cbf,
47266 +0x004,0x00000975,
47267 +0x007,0x00000700,
47268 +};
47269 +u32 Rtl8190PciRadioB_Array[RadioB_ArrayLength] = {
47270 +0x019,0x00000003,
47271 +0x000,0x000000bf,
47272 +0x001,0x000006e0,
47273 +0x002,0x0000004c,
47274 +0x003,0x000007f1,
47275 +0x004,0x00000975,
47276 +0x005,0x00000c58,
47277 +0x006,0x00000ae6,
47278 +0x007,0x000000ca,
47279 +0x008,0x00000e1c,
47280 +0x000,0x000000b7,
47281 +0x00a,0x00000850,
47282 +0x000,0x000000bf,
47283 +0x00b,0x000001ba,
47284 +0x00c,0x00000240,
47285 +0x00e,0x00000020,
47286 +0x015,0x00000f80,
47287 +0x016,0x00000020,
47288 +0x017,0x00000597,
47289 +0x018,0x0000050a,
47290 +0x01a,0x00000e00,
47291 +0x01b,0x00000f5e,
47292 +0x01d,0x00000607,
47293 +0x01e,0x000006cc,
47294 +0x00b,0x000001ba,
47295 +0x023,0x00000203,
47296 +0x024,0x00000200,
47297 +0x000,0x00000037,
47298 +0x004,0x00000160,
47299 +0x016,0x00000200,
47300 +0x016,0x00000380,
47301 +0x016,0x00000020,
47302 +0x016,0x000001a0,
47303 +0x00d,0x00000ccc,
47304 +0x000,0x000000bf,
47305 +0x002,0x0000004d,
47306 +0x000,0x00000cbf,
47307 +0x004,0x00000975,
47308 +0x007,0x00000700,
47309 +};
47310 +u32 Rtl8190PciRadioC_Array[RadioC_ArrayLength] = {
47311 +0x019,0x00000003,
47312 +0x000,0x000000bf,
47313 +0x001,0x00000ee0,
47314 +0x002,0x0000004c,
47315 +0x003,0x000007f1,
47316 +0x004,0x00000975,
47317 +0x005,0x00000c58,
47318 +0x006,0x00000ae6,
47319 +0x007,0x000000ca,
47320 +0x008,0x00000e1c,
47321 +0x009,0x000007f0,
47322 +0x00a,0x000009d0,
47323 +0x00b,0x000001ba,
47324 +0x00c,0x00000240,
47325 +0x00e,0x00000020,
47326 +0x00f,0x00000990,
47327 +0x012,0x00000806,
47328 +0x014,0x000005ab,
47329 +0x015,0x00000f80,
47330 +0x016,0x00000020,
47331 +0x017,0x00000597,
47332 +0x018,0x0000050a,
47333 +0x01a,0x00000f80,
47334 +0x01b,0x00000f5e,
47335 +0x01c,0x00000008,
47336 +0x01d,0x00000607,
47337 +0x01e,0x000006cc,
47338 +0x01f,0x00000000,
47339 +0x020,0x000001a5,
47340 +0x01f,0x00000001,
47341 +0x020,0x00000165,
47342 +0x01f,0x00000002,
47343 +0x020,0x000000c6,
47344 +0x01f,0x00000003,
47345 +0x020,0x00000086,
47346 +0x01f,0x00000004,
47347 +0x020,0x00000046,
47348 +0x01f,0x00000005,
47349 +0x020,0x000001e6,
47350 +0x01f,0x00000006,
47351 +0x020,0x000001a6,
47352 +0x01f,0x00000007,
47353 +0x020,0x00000166,
47354 +0x01f,0x00000008,
47355 +0x020,0x000000c7,
47356 +0x01f,0x00000009,
47357 +0x020,0x00000087,
47358 +0x01f,0x0000000a,
47359 +0x020,0x000000f7,
47360 +0x01f,0x0000000b,
47361 +0x020,0x000000d7,
47362 +0x01f,0x0000000c,
47363 +0x020,0x000000b7,
47364 +0x01f,0x0000000d,
47365 +0x020,0x00000097,
47366 +0x01f,0x0000000e,
47367 +0x020,0x00000077,
47368 +0x01f,0x0000000f,
47369 +0x020,0x00000057,
47370 +0x01f,0x00000010,
47371 +0x020,0x00000037,
47372 +0x01f,0x00000011,
47373 +0x020,0x000000fb,
47374 +0x01f,0x00000012,
47375 +0x020,0x000000db,
47376 +0x01f,0x00000013,
47377 +0x020,0x000000bb,
47378 +0x01f,0x00000014,
47379 +0x020,0x000000ff,
47380 +0x01f,0x00000015,
47381 +0x020,0x000000e3,
47382 +0x01f,0x00000016,
47383 +0x020,0x000000c3,
47384 +0x01f,0x00000017,
47385 +0x020,0x000000a3,
47386 +0x01f,0x00000018,
47387 +0x020,0x00000083,
47388 +0x01f,0x00000019,
47389 +0x020,0x00000063,
47390 +0x01f,0x0000001a,
47391 +0x020,0x00000043,
47392 +0x01f,0x0000001b,
47393 +0x020,0x00000023,
47394 +0x01f,0x0000001c,
47395 +0x020,0x00000003,
47396 +0x01f,0x0000001d,
47397 +0x020,0x000001e3,
47398 +0x01f,0x0000001e,
47399 +0x020,0x000001c3,
47400 +0x01f,0x0000001f,
47401 +0x020,0x000001a3,
47402 +0x01f,0x00000020,
47403 +0x020,0x00000183,
47404 +0x01f,0x00000021,
47405 +0x020,0x00000163,
47406 +0x01f,0x00000022,
47407 +0x020,0x00000143,
47408 +0x01f,0x00000023,
47409 +0x020,0x00000123,
47410 +0x01f,0x00000024,
47411 +0x020,0x00000103,
47412 +0x023,0x00000203,
47413 +0x024,0x00000200,
47414 +0x00b,0x000001ba,
47415 +0x02c,0x000003d7,
47416 +0x02d,0x00000ff0,
47417 +0x000,0x00000037,
47418 +0x004,0x00000160,
47419 +0x007,0x00000080,
47420 +0x002,0x0000088d,
47421 +0x0fe,0x00000000,
47422 +0x0fe,0x00000000,
47423 +0x016,0x00000200,
47424 +0x016,0x00000380,
47425 +0x016,0x00000020,
47426 +0x016,0x000001a0,
47427 +0x000,0x000000bf,
47428 +0x00d,0x0000001f,
47429 +0x00d,0x00000c9f,
47430 +0x002,0x0000004d,
47431 +0x000,0x00000cbf,
47432 +0x004,0x00000975,
47433 +0x007,0x00000700,
47434 +};
47435 +u32 Rtl8190PciRadioD_Array[RadioD_ArrayLength] = {
47436 +0x019,0x00000003,
47437 +0x000,0x000000bf,
47438 +0x001,0x000006e0,
47439 +0x002,0x0000004c,
47440 +0x003,0x000007f1,
47441 +0x004,0x00000975,
47442 +0x005,0x00000c58,
47443 +0x006,0x00000ae6,
47444 +0x007,0x000000ca,
47445 +0x008,0x00000e1c,
47446 +0x000,0x000000b7,
47447 +0x00a,0x00000850,
47448 +0x000,0x000000bf,
47449 +0x00b,0x000001ba,
47450 +0x00c,0x00000240,
47451 +0x00e,0x00000020,
47452 +0x015,0x00000f80,
47453 +0x016,0x00000020,
47454 +0x017,0x00000597,
47455 +0x018,0x0000050a,
47456 +0x01a,0x00000e00,
47457 +0x01b,0x00000f5e,
47458 +0x01d,0x00000607,
47459 +0x01e,0x000006cc,
47460 +0x00b,0x000001ba,
47461 +0x023,0x00000203,
47462 +0x024,0x00000200,
47463 +0x000,0x00000037,
47464 +0x004,0x00000160,
47465 +0x016,0x00000200,
47466 +0x016,0x00000380,
47467 +0x016,0x00000020,
47468 +0x016,0x000001a0,
47469 +0x00d,0x00000ccc,
47470 +0x000,0x000000bf,
47471 +0x002,0x0000004d,
47472 +0x000,0x00000cbf,
47473 +0x004,0x00000975,
47474 +0x007,0x00000700,
47475 +};
47476 +#endif
47477 +#ifdef RTL8192E
47478 +static u32 Rtl8192PciEMACPHY_Array[] = {
47479 +0x03c,0xffff0000,0x00000f0f,
47480 +0x340,0xffffffff,0x161a1a1a,
47481 +0x344,0xffffffff,0x12121416,
47482 +0x348,0x0000ffff,0x00001818,
47483 +0x12c,0xffffffff,0x04000802,
47484 +0x318,0x00000fff,0x00000100,
47485 +};
47486 +static u32 Rtl8192PciEMACPHY_Array_PG[] = {
47487 +0x03c,0xffff0000,0x00000f0f,
47488 +0xe00,0xffffffff,0x06090909,
47489 +0xe04,0xffffffff,0x00030306,
47490 +0xe08,0x0000ff00,0x00000000,
47491 +0xe10,0xffffffff,0x0a0c0d0f,
47492 +0xe14,0xffffffff,0x06070809,
47493 +0xe18,0xffffffff,0x0a0c0d0f,
47494 +0xe1c,0xffffffff,0x06070809,
47495 +0x12c,0xffffffff,0x04000802,
47496 +0x318,0x00000fff,0x00000800,
47497 +};
47498 +static u32 Rtl8192PciEAGCTAB_Array[AGCTAB_ArrayLength] = {
47499 +0xc78,0x7d000001,
47500 +0xc78,0x7d010001,
47501 +0xc78,0x7d020001,
47502 +0xc78,0x7d030001,
47503 +0xc78,0x7d040001,
47504 +0xc78,0x7d050001,
47505 +0xc78,0x7c060001,
47506 +0xc78,0x7b070001,
47507 +0xc78,0x7a080001,
47508 +0xc78,0x79090001,
47509 +0xc78,0x780a0001,
47510 +0xc78,0x770b0001,
47511 +0xc78,0x760c0001,
47512 +0xc78,0x750d0001,
47513 +0xc78,0x740e0001,
47514 +0xc78,0x730f0001,
47515 +0xc78,0x72100001,
47516 +0xc78,0x71110001,
47517 +0xc78,0x70120001,
47518 +0xc78,0x6f130001,
47519 +0xc78,0x6e140001,
47520 +0xc78,0x6d150001,
47521 +0xc78,0x6c160001,
47522 +0xc78,0x6b170001,
47523 +0xc78,0x6a180001,
47524 +0xc78,0x69190001,
47525 +0xc78,0x681a0001,
47526 +0xc78,0x671b0001,
47527 +0xc78,0x661c0001,
47528 +0xc78,0x651d0001,
47529 +0xc78,0x641e0001,
47530 +0xc78,0x491f0001,
47531 +0xc78,0x48200001,
47532 +0xc78,0x47210001,
47533 +0xc78,0x46220001,
47534 +0xc78,0x45230001,
47535 +0xc78,0x44240001,
47536 +0xc78,0x43250001,
47537 +0xc78,0x28260001,
47538 +0xc78,0x27270001,
47539 +0xc78,0x26280001,
47540 +0xc78,0x25290001,
47541 +0xc78,0x242a0001,
47542 +0xc78,0x232b0001,
47543 +0xc78,0x222c0001,
47544 +0xc78,0x212d0001,
47545 +0xc78,0x202e0001,
47546 +0xc78,0x0a2f0001,
47547 +0xc78,0x08300001,
47548 +0xc78,0x06310001,
47549 +0xc78,0x05320001,
47550 +0xc78,0x04330001,
47551 +0xc78,0x03340001,
47552 +0xc78,0x02350001,
47553 +0xc78,0x01360001,
47554 +0xc78,0x00370001,
47555 +0xc78,0x00380001,
47556 +0xc78,0x00390001,
47557 +0xc78,0x003a0001,
47558 +0xc78,0x003b0001,
47559 +0xc78,0x003c0001,
47560 +0xc78,0x003d0001,
47561 +0xc78,0x003e0001,
47562 +0xc78,0x003f0001,
47563 +0xc78,0x7d400001,
47564 +0xc78,0x7d410001,
47565 +0xc78,0x7d420001,
47566 +0xc78,0x7d430001,
47567 +0xc78,0x7d440001,
47568 +0xc78,0x7d450001,
47569 +0xc78,0x7c460001,
47570 +0xc78,0x7b470001,
47571 +0xc78,0x7a480001,
47572 +0xc78,0x79490001,
47573 +0xc78,0x784a0001,
47574 +0xc78,0x774b0001,
47575 +0xc78,0x764c0001,
47576 +0xc78,0x754d0001,
47577 +0xc78,0x744e0001,
47578 +0xc78,0x734f0001,
47579 +0xc78,0x72500001,
47580 +0xc78,0x71510001,
47581 +0xc78,0x70520001,
47582 +0xc78,0x6f530001,
47583 +0xc78,0x6e540001,
47584 +0xc78,0x6d550001,
47585 +0xc78,0x6c560001,
47586 +0xc78,0x6b570001,
47587 +0xc78,0x6a580001,
47588 +0xc78,0x69590001,
47589 +0xc78,0x685a0001,
47590 +0xc78,0x675b0001,
47591 +0xc78,0x665c0001,
47592 +0xc78,0x655d0001,
47593 +0xc78,0x645e0001,
47594 +0xc78,0x495f0001,
47595 +0xc78,0x48600001,
47596 +0xc78,0x47610001,
47597 +0xc78,0x46620001,
47598 +0xc78,0x45630001,
47599 +0xc78,0x44640001,
47600 +0xc78,0x43650001,
47601 +0xc78,0x28660001,
47602 +0xc78,0x27670001,
47603 +0xc78,0x26680001,
47604 +0xc78,0x25690001,
47605 +0xc78,0x246a0001,
47606 +0xc78,0x236b0001,
47607 +0xc78,0x226c0001,
47608 +0xc78,0x216d0001,
47609 +0xc78,0x206e0001,
47610 +0xc78,0x0a6f0001,
47611 +0xc78,0x08700001,
47612 +0xc78,0x06710001,
47613 +0xc78,0x05720001,
47614 +0xc78,0x04730001,
47615 +0xc78,0x03740001,
47616 +0xc78,0x02750001,
47617 +0xc78,0x01760001,
47618 +0xc78,0x00770001,
47619 +0xc78,0x00780001,
47620 +0xc78,0x00790001,
47621 +0xc78,0x007a0001,
47622 +0xc78,0x007b0001,
47623 +0xc78,0x007c0001,
47624 +0xc78,0x007d0001,
47625 +0xc78,0x007e0001,
47626 +0xc78,0x007f0001,
47627 +0xc78,0x2e00001e,
47628 +0xc78,0x2e01001e,
47629 +0xc78,0x2e02001e,
47630 +0xc78,0x2e03001e,
47631 +0xc78,0x2e04001e,
47632 +0xc78,0x2e05001e,
47633 +0xc78,0x3006001e,
47634 +0xc78,0x3407001e,
47635 +0xc78,0x3908001e,
47636 +0xc78,0x3c09001e,
47637 +0xc78,0x3f0a001e,
47638 +0xc78,0x420b001e,
47639 +0xc78,0x440c001e,
47640 +0xc78,0x450d001e,
47641 +0xc78,0x460e001e,
47642 +0xc78,0x460f001e,
47643 +0xc78,0x4710001e,
47644 +0xc78,0x4811001e,
47645 +0xc78,0x4912001e,
47646 +0xc78,0x4a13001e,
47647 +0xc78,0x4b14001e,
47648 +0xc78,0x4b15001e,
47649 +0xc78,0x4c16001e,
47650 +0xc78,0x4d17001e,
47651 +0xc78,0x4e18001e,
47652 +0xc78,0x4f19001e,
47653 +0xc78,0x4f1a001e,
47654 +0xc78,0x501b001e,
47655 +0xc78,0x511c001e,
47656 +0xc78,0x521d001e,
47657 +0xc78,0x521e001e,
47658 +0xc78,0x531f001e,
47659 +0xc78,0x5320001e,
47660 +0xc78,0x5421001e,
47661 +0xc78,0x5522001e,
47662 +0xc78,0x5523001e,
47663 +0xc78,0x5624001e,
47664 +0xc78,0x5725001e,
47665 +0xc78,0x5726001e,
47666 +0xc78,0x5827001e,
47667 +0xc78,0x5828001e,
47668 +0xc78,0x5929001e,
47669 +0xc78,0x592a001e,
47670 +0xc78,0x5a2b001e,
47671 +0xc78,0x5b2c001e,
47672 +0xc78,0x5c2d001e,
47673 +0xc78,0x5c2e001e,
47674 +0xc78,0x5d2f001e,
47675 +0xc78,0x5e30001e,
47676 +0xc78,0x5f31001e,
47677 +0xc78,0x6032001e,
47678 +0xc78,0x6033001e,
47679 +0xc78,0x6134001e,
47680 +0xc78,0x6235001e,
47681 +0xc78,0x6336001e,
47682 +0xc78,0x6437001e,
47683 +0xc78,0x6438001e,
47684 +0xc78,0x6539001e,
47685 +0xc78,0x663a001e,
47686 +0xc78,0x673b001e,
47687 +0xc78,0x673c001e,
47688 +0xc78,0x683d001e,
47689 +0xc78,0x693e001e,
47690 +0xc78,0x6a3f001e,
47691 +};
47692 +static u32 Rtl8192PciEPHY_REGArray[PHY_REGArrayLength] = {
47693 +0x0, };
47694 +static u32 Rtl8192PciEPHY_REG_1T2RArray[PHY_REG_1T2RArrayLength] = {
47695 +0x800,0x00000000,
47696 +0x804,0x00000001,
47697 +0x808,0x0000fc00,
47698 +0x80c,0x0000001c,
47699 +0x810,0x801010aa,
47700 +0x814,0x008514d0,
47701 +0x818,0x00000040,
47702 +0x81c,0x00000000,
47703 +0x820,0x00000004,
47704 +0x824,0x00690000,
47705 +0x828,0x00000004,
47706 +0x82c,0x00e90000,
47707 +0x830,0x00000004,
47708 +0x834,0x00690000,
47709 +0x838,0x00000004,
47710 +0x83c,0x00e90000,
47711 +0x840,0x00000000,
47712 +0x844,0x00000000,
47713 +0x848,0x00000000,
47714 +0x84c,0x00000000,
47715 +0x850,0x00000000,
47716 +0x854,0x00000000,
47717 +0x858,0x65a965a9,
47718 +0x85c,0x65a965a9,
47719 +0x860,0x001f0010,
47720 +0x864,0x007f0010,
47721 +0x868,0x001f0010,
47722 +0x86c,0x007f0010,
47723 +0x870,0x0f100f70,
47724 +0x874,0x0f100f70,
47725 +0x878,0x00000000,
47726 +0x87c,0x00000000,
47727 +0x880,0x6870e36c,
47728 +0x884,0xe3573600,
47729 +0x888,0x4260c340,
47730 +0x88c,0x0000ff00,
47731 +0x890,0x00000000,
47732 +0x894,0xfffffffe,
47733 +0x898,0x4c42382f,
47734 +0x89c,0x00656056,
47735 +0x8b0,0x00000000,
47736 +0x8e0,0x00000000,
47737 +0x8e4,0x00000000,
47738 +0x900,0x00000000,
47739 +0x904,0x00000023,
47740 +0x908,0x00000000,
47741 +0x90c,0x31121311,
47742 +0xa00,0x00d0c7d8,
47743 +0xa04,0x811f0008,
47744 +0xa08,0x80cd8300,
47745 +0xa0c,0x2e62740f,
47746 +0xa10,0x95009b78,
47747 +0xa14,0x11145008,
47748 +0xa18,0x00881117,
47749 +0xa1c,0x89140fa0,
47750 +0xa20,0x1a1b0000,
47751 +0xa24,0x090e1317,
47752 +0xa28,0x00000204,
47753 +0xa2c,0x00000000,
47754 +0xc00,0x00000040,
47755 +0xc04,0x00005433,
47756 +0xc08,0x000000e4,
47757 +0xc0c,0x6c6c6c6c,
47758 +0xc10,0x08800000,
47759 +0xc14,0x40000100,
47760 +0xc18,0x08000000,
47761 +0xc1c,0x40000100,
47762 +0xc20,0x08000000,
47763 +0xc24,0x40000100,
47764 +0xc28,0x08000000,
47765 +0xc2c,0x40000100,
47766 +0xc30,0x6de9ac44,
47767 +0xc34,0x465c52cd,
47768 +0xc38,0x497f5994,
47769 +0xc3c,0x0a969764,
47770 +0xc40,0x1f7c403f,
47771 +0xc44,0x000100b7,
47772 +0xc48,0xec020000,
47773 +0xc4c,0x00000300,
47774 +0xc50,0x69543420,
47775 +0xc54,0x433c0094,
47776 +0xc58,0x69543420,
47777 +0xc5c,0x433c0094,
47778 +0xc60,0x69543420,
47779 +0xc64,0x433c0094,
47780 +0xc68,0x69543420,
47781 +0xc6c,0x433c0094,
47782 +0xc70,0x2c7f000d,
47783 +0xc74,0x0186175b,
47784 +0xc78,0x0000001f,
47785 +0xc7c,0x00b91612,
47786 +0xc80,0x40000100,
47787 +0xc84,0x20000000,
47788 +0xc88,0x40000100,
47789 +0xc8c,0x20200000,
47790 +0xc90,0x40000100,
47791 +0xc94,0x00000000,
47792 +0xc98,0x40000100,
47793 +0xc9c,0x00000000,
47794 +0xca0,0x00492492,
47795 +0xca4,0x00000000,
47796 +0xca8,0x00000000,
47797 +0xcac,0x00000000,
47798 +0xcb0,0x00000000,
47799 +0xcb4,0x00000000,
47800 +0xcb8,0x00000000,
47801 +0xcbc,0x00492492,
47802 +0xcc0,0x00000000,
47803 +0xcc4,0x00000000,
47804 +0xcc8,0x00000000,
47805 +0xccc,0x00000000,
47806 +0xcd0,0x00000000,
47807 +0xcd4,0x00000000,
47808 +0xcd8,0x64b22427,
47809 +0xcdc,0x00766932,
47810 +0xce0,0x00222222,
47811 +0xd00,0x00000750,
47812 +0xd04,0x00000403,
47813 +0xd08,0x0000907f,
47814 +0xd0c,0x00000001,
47815 +0xd10,0xa0633333,
47816 +0xd14,0x33333c63,
47817 +0xd18,0x6a8f5b6b,
47818 +0xd1c,0x00000000,
47819 +0xd20,0x00000000,
47820 +0xd24,0x00000000,
47821 +0xd28,0x00000000,
47822 +0xd2c,0xcc979975,
47823 +0xd30,0x00000000,
47824 +0xd34,0x00000000,
47825 +0xd38,0x00000000,
47826 +0xd3c,0x00027293,
47827 +0xd40,0x00000000,
47828 +0xd44,0x00000000,
47829 +0xd48,0x00000000,
47830 +0xd4c,0x00000000,
47831 +0xd50,0x6437140a,
47832 +0xd54,0x024dbd02,
47833 +0xd58,0x00000000,
47834 +0xd5c,0x04032064,
47835 +0xe00,0x161a1a1a,
47836 +0xe04,0x12121416,
47837 +0xe08,0x00001800,
47838 +0xe0c,0x00000000,
47839 +0xe10,0x161a1a1a,
47840 +0xe14,0x12121416,
47841 +0xe18,0x161a1a1a,
47842 +0xe1c,0x12121416,
47843 +};
47844 +static u32 Rtl8192PciERadioA_Array[RadioA_ArrayLength] = {
47845 +0x019,0x00000003,
47846 +0x000,0x000000bf,
47847 +0x001,0x00000ee0,
47848 +0x002,0x0000004c,
47849 +0x003,0x000007f1,
47850 +0x004,0x00000975,
47851 +0x005,0x00000c58,
47852 +0x006,0x00000ae6,
47853 +0x007,0x000000ca,
47854 +0x008,0x00000e1c,
47855 +0x009,0x000007f0,
47856 +0x00a,0x000009d0,
47857 +0x00b,0x000001ba,
47858 +0x00c,0x00000240,
47859 +0x00e,0x00000020,
47860 +0x00f,0x00000990,
47861 +0x012,0x00000806,
47862 +0x014,0x000005ab,
47863 +0x015,0x00000f80,
47864 +0x016,0x00000020,
47865 +0x017,0x00000597,
47866 +0x018,0x0000050a,
47867 +0x01a,0x00000f80,
47868 +0x01b,0x00000f5e,
47869 +0x01c,0x00000008,
47870 +0x01d,0x00000607,
47871 +0x01e,0x000006cc,
47872 +0x01f,0x00000000,
47873 +0x020,0x000001a5,
47874 +0x01f,0x00000001,
47875 +0x020,0x00000165,
47876 +0x01f,0x00000002,
47877 +0x020,0x000000c6,
47878 +0x01f,0x00000003,
47879 +0x020,0x00000086,
47880 +0x01f,0x00000004,
47881 +0x020,0x00000046,
47882 +0x01f,0x00000005,
47883 +0x020,0x000001e6,
47884 +0x01f,0x00000006,
47885 +0x020,0x000001a6,
47886 +0x01f,0x00000007,
47887 +0x020,0x00000166,
47888 +0x01f,0x00000008,
47889 +0x020,0x000000c7,
47890 +0x01f,0x00000009,
47891 +0x020,0x00000087,
47892 +0x01f,0x0000000a,
47893 +0x020,0x000000f7,
47894 +0x01f,0x0000000b,
47895 +0x020,0x000000d7,
47896 +0x01f,0x0000000c,
47897 +0x020,0x000000b7,
47898 +0x01f,0x0000000d,
47899 +0x020,0x00000097,
47900 +0x01f,0x0000000e,
47901 +0x020,0x00000077,
47902 +0x01f,0x0000000f,
47903 +0x020,0x00000057,
47904 +0x01f,0x00000010,
47905 +0x020,0x00000037,
47906 +0x01f,0x00000011,
47907 +0x020,0x000000fb,
47908 +0x01f,0x00000012,
47909 +0x020,0x000000db,
47910 +0x01f,0x00000013,
47911 +0x020,0x000000bb,
47912 +0x01f,0x00000014,
47913 +0x020,0x000000ff,
47914 +0x01f,0x00000015,
47915 +0x020,0x000000e3,
47916 +0x01f,0x00000016,
47917 +0x020,0x000000c3,
47918 +0x01f,0x00000017,
47919 +0x020,0x000000a3,
47920 +0x01f,0x00000018,
47921 +0x020,0x00000083,
47922 +0x01f,0x00000019,
47923 +0x020,0x00000063,
47924 +0x01f,0x0000001a,
47925 +0x020,0x00000043,
47926 +0x01f,0x0000001b,
47927 +0x020,0x00000023,
47928 +0x01f,0x0000001c,
47929 +0x020,0x00000003,
47930 +0x01f,0x0000001d,
47931 +0x020,0x000001e3,
47932 +0x01f,0x0000001e,
47933 +0x020,0x000001c3,
47934 +0x01f,0x0000001f,
47935 +0x020,0x000001a3,
47936 +0x01f,0x00000020,
47937 +0x020,0x00000183,
47938 +0x01f,0x00000021,
47939 +0x020,0x00000163,
47940 +0x01f,0x00000022,
47941 +0x020,0x00000143,
47942 +0x01f,0x00000023,
47943 +0x020,0x00000123,
47944 +0x01f,0x00000024,
47945 +0x020,0x00000103,
47946 +0x023,0x00000203,
47947 +0x024,0x00000100,
47948 +0x00b,0x000001ba,
47949 +0x02c,0x000003d7,
47950 +0x02d,0x00000ff0,
47951 +0x000,0x00000037,
47952 +0x004,0x00000160,
47953 +0x007,0x00000080,
47954 +0x002,0x0000088d,
47955 +0x0fe,0x00000000,
47956 +0x0fe,0x00000000,
47957 +0x016,0x00000200,
47958 +0x016,0x00000380,
47959 +0x016,0x00000020,
47960 +0x016,0x000001a0,
47961 +0x000,0x000000bf,
47962 +0x00d,0x0000001f,
47963 +0x00d,0x00000c9f,
47964 +0x002,0x0000004d,
47965 +0x000,0x00000cbf,
47966 +0x004,0x00000975,
47967 +0x007,0x00000700,
47968 +};
47969 +static u32 Rtl8192PciERadioB_Array[RadioB_ArrayLength] = {
47970 +0x019,0x00000003,
47971 +0x000,0x000000bf,
47972 +0x001,0x000006e0,
47973 +0x002,0x0000004c,
47974 +0x003,0x000007f1,
47975 +0x004,0x00000975,
47976 +0x005,0x00000c58,
47977 +0x006,0x00000ae6,
47978 +0x007,0x000000ca,
47979 +0x008,0x00000e1c,
47980 +0x000,0x000000b7,
47981 +0x00a,0x00000850,
47982 +0x000,0x000000bf,
47983 +0x00b,0x000001ba,
47984 +0x00c,0x00000240,
47985 +0x00e,0x00000020,
47986 +0x015,0x00000f80,
47987 +0x016,0x00000020,
47988 +0x017,0x00000597,
47989 +0x018,0x0000050a,
47990 +0x01a,0x00000e00,
47991 +0x01b,0x00000f5e,
47992 +0x01d,0x00000607,
47993 +0x01e,0x000006cc,
47994 +0x00b,0x000001ba,
47995 +0x023,0x00000203,
47996 +0x024,0x00000100,
47997 +0x000,0x00000037,
47998 +0x004,0x00000160,
47999 +0x016,0x00000200,
48000 +0x016,0x00000380,
48001 +0x016,0x00000020,
48002 +0x016,0x000001a0,
48003 +0x00d,0x00000ccc,
48004 +0x000,0x000000bf,
48005 +0x002,0x0000004d,
48006 +0x000,0x00000cbf,
48007 +0x004,0x00000975,
48008 +0x007,0x00000700,
48009 +};
48010 +static u32 Rtl8192PciERadioC_Array[RadioC_ArrayLength] = {
48011 +0x0, };
48012 +static u32 Rtl8192PciERadioD_Array[RadioD_ArrayLength] = {
48013 +0x0, };
48014 +#endif
48015 +
48016 +/*************************Define local function prototype**********************/
48017 +
48018 +static u32 phy_FwRFSerialRead(struct net_device* dev,RF90_RADIO_PATH_E eRFPath,u32 Offset);
48019 +static void phy_FwRFSerialWrite(struct net_device* dev,RF90_RADIO_PATH_E eRFPath,u32 Offset,u32 Data);
48020 +/*************************Define local function prototype**********************/
48021 +/******************************************************************************
48022 + *function: This function read BB parameters from Header file we gen,
48023 + * and do register read/write
48024 + * input: u32 dwBitMask //taget bit pos in the addr to be modified
48025 + * output: none
48026 + * return: u32 return the shift bit bit position of the mask
48027 + * ****************************************************************************/
48028 +static u32 rtl8192_CalculateBitShift(u32 dwBitMask)
48029 +{
48030 + u32 i;
48031 + for (i=0; i<=31; i++)
48032 + {
48033 + if (((dwBitMask>>i)&0x1) == 1)
48034 + break;
48035 + }
48036 + return i;
48037 +}
48038 +/******************************************************************************
48039 + *function: This function check different RF type to execute legal judgement. If RF Path is illegal, we will return false.
48040 + * input: none
48041 + * output: none
48042 + * return: 0(illegal, false), 1(legal,true)
48043 + * ***************************************************************************/
48044 +u8 rtl8192_phy_CheckIsLegalRFPath(struct net_device* dev, u32 eRFPath)
48045 +{
48046 + u8 ret = 1;
48047 + struct r8192_priv *priv = ieee80211_priv(dev);
48048 +#ifdef RTL8190P
48049 + if(priv->rf_type == RF_2T4R)
48050 + {
48051 + ret= 1;
48052 + }
48053 + else if (priv->rf_type == RF_1T2R)
48054 + {
48055 + if(eRFPath == RF90_PATH_A || eRFPath == RF90_PATH_B)
48056 + ret = 0;
48057 + else if(eRFPath == RF90_PATH_C || eRFPath == RF90_PATH_D)
48058 + ret = 1;
48059 + }
48060 +#else
48061 + #ifdef RTL8192E
48062 + if (priv->rf_type == RF_2T4R)
48063 + ret = 0;
48064 + else if (priv->rf_type == RF_1T2R)
48065 + {
48066 + if (eRFPath == RF90_PATH_A || eRFPath == RF90_PATH_B)
48067 + ret = 1;
48068 + else if (eRFPath == RF90_PATH_C || eRFPath == RF90_PATH_D)
48069 + ret = 0;
48070 + }
48071 + #endif
48072 +#endif
48073 + return ret;
48074 +}
48075 +/******************************************************************************
48076 + *function: This function set specific bits to BB register
48077 + * input: net_device dev
48078 + * u32 dwRegAddr //target addr to be modified
48079 + * u32 dwBitMask //taget bit pos in the addr to be modified
48080 + * u32 dwData //value to be write
48081 + * output: none
48082 + * return: none
48083 + * notice:
48084 + * ****************************************************************************/
48085 +void rtl8192_setBBreg(struct net_device* dev, u32 dwRegAddr, u32 dwBitMask, u32 dwData)
48086 +{
48087 +
48088 + u32 OriginalValue, BitShift, NewValue;
48089 +
48090 + if(dwBitMask!= bMaskDWord)
48091 + {//if not "double word" write
48092 + OriginalValue = read_nic_dword(dev, dwRegAddr);
48093 + BitShift = rtl8192_CalculateBitShift(dwBitMask);
48094 + NewValue = (((OriginalValue) & (~dwBitMask)) | (dwData << BitShift));
48095 + write_nic_dword(dev, dwRegAddr, NewValue);
48096 + }else
48097 + write_nic_dword(dev, dwRegAddr, dwData);
48098 + return;
48099 +}
48100 +/******************************************************************************
48101 + *function: This function reads specific bits from BB register
48102 + * input: net_device dev
48103 + * u32 dwRegAddr //target addr to be readback
48104 + * u32 dwBitMask //taget bit pos in the addr to be readback
48105 + * output: none
48106 + * return: u32 Data //the readback register value
48107 + * notice:
48108 + * ****************************************************************************/
48109 +u32 rtl8192_QueryBBReg(struct net_device* dev, u32 dwRegAddr, u32 dwBitMask)
48110 +{
48111 + u32 Ret = 0, OriginalValue, BitShift;
48112 +
48113 + OriginalValue = read_nic_dword(dev, dwRegAddr);
48114 + BitShift = rtl8192_CalculateBitShift(dwBitMask);
48115 + Ret = (OriginalValue & dwBitMask) >> BitShift;
48116 +
48117 + return (Ret);
48118 +}
48119 +/******************************************************************************
48120 + *function: This function read register from RF chip
48121 + * input: net_device dev
48122 + * RF90_RADIO_PATH_E eRFPath //radio path of A/B/C/D
48123 + * u32 Offset //target address to be read
48124 + * output: none
48125 + * return: u32 readback value
48126 + * notice: There are three types of serial operations:(1) Software serial write.(2)Hardware LSSI-Low Speed Serial Interface.(3)Hardware HSSI-High speed serial write. Driver here need to implement (1) and (2)---need more spec for this information.
48127 + * ****************************************************************************/
48128 +static u32 rtl8192_phy_RFSerialRead(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 Offset)
48129 +{
48130 + struct r8192_priv *priv = ieee80211_priv(dev);
48131 + u32 ret = 0;
48132 + u32 NewOffset = 0;
48133 + BB_REGISTER_DEFINITION_T* pPhyReg = &priv->PHYRegDef[eRFPath];
48134 + //rtl8192_setBBreg(dev, pPhyReg->rfLSSIReadBack, bLSSIReadBackData, 0);
48135 + //make sure RF register offset is correct
48136 + Offset &= 0x3f;
48137 +
48138 + //switch page for 8256 RF IC
48139 + if (priv->rf_chip == RF_8256)
48140 + {
48141 +#ifdef RTL8190P
48142 + //analog to digital off, for protection
48143 + rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf00, 0x0);// 0x88c[11:8]
48144 +#else
48145 + #ifdef RTL8192E
48146 + //analog to digital off, for protection
48147 + rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf00, 0x0);// 0x88c[11:8]
48148 + #endif
48149 +#endif
48150 + if (Offset >= 31)
48151 + {
48152 + priv->RfReg0Value[eRFPath] |= 0x140;
48153 + //Switch to Reg_Mode2 for Reg 31-45
48154 + rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath]<<16) );
48155 + //modify offset
48156 + NewOffset = Offset -30;
48157 + }
48158 + else if (Offset >= 16)
48159 + {
48160 + priv->RfReg0Value[eRFPath] |= 0x100;
48161 + priv->RfReg0Value[eRFPath] &= (~0x40);
48162 + //Switch to Reg_Mode 1 for Reg16-30
48163 + rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath]<<16) );
48164 +
48165 + NewOffset = Offset - 15;
48166 + }
48167 + else
48168 + NewOffset = Offset;
48169 + }
48170 + else
48171 + {
48172 + RT_TRACE((COMP_PHY|COMP_ERR), "check RF type here, need to be 8256\n");
48173 + NewOffset = Offset;
48174 + }
48175 + //put desired read addr to LSSI control Register
48176 + rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, bLSSIReadAddress, NewOffset);
48177 + //Issue a posedge trigger
48178 + //
48179 + rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, bLSSIReadEdge, 0x0);
48180 + rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, bLSSIReadEdge, 0x1);
48181 +
48182 +
48183 + // TODO: we should not delay such a long time. Ask help from SD3
48184 + msleep(1);
48185 +
48186 + ret = rtl8192_QueryBBReg(dev, pPhyReg->rfLSSIReadBack, bLSSIReadBackData);
48187 +
48188 +
48189 + // Switch back to Reg_Mode0;
48190 + if(priv->rf_chip == RF_8256)
48191 + {
48192 + priv->RfReg0Value[eRFPath] &= 0xebf;
48193 +
48194 + rtl8192_setBBreg(
48195 + dev,
48196 + pPhyReg->rf3wireOffset,
48197 + bMaskDWord,
48198 + (priv->RfReg0Value[eRFPath] << 16));
48199 +
48200 +#ifdef RTL8190P
48201 + if(priv->rf_type == RF_2T4R)
48202 + {
48203 + //analog to digital on
48204 + rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf00, 0xf);// 0x88c[11:8]
48205 + }
48206 + else if(priv->rf_type == RF_1T2R)
48207 + {
48208 + //analog to digital on
48209 + rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xc00, 0x3);// 0x88c[11:10]
48210 + }
48211 +#else
48212 + #ifdef RTL8192E
48213 + //analog to digital on
48214 + rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0x300, 0x3);// 0x88c[9:8]
48215 + #endif
48216 +#endif
48217 + }
48218 +
48219 +
48220 + return ret;
48221 +
48222 +}
48223 +
48224 +/******************************************************************************
48225 + *function: This function write data to RF register
48226 + * input: net_device dev
48227 + * RF90_RADIO_PATH_E eRFPath //radio path of A/B/C/D
48228 + * u32 Offset //target address to be written
48229 + * u32 Data //The new register data to be written
48230 + * output: none
48231 + * return: none
48232 + * notice: For RF8256 only.
48233 + ===========================================================
48234 + *Reg Mode RegCTL[1] RegCTL[0] Note
48235 + * (Reg00[12]) (Reg00[10])
48236 + *===========================================================
48237 + *Reg_Mode0 0 x Reg 0 ~15(0x0 ~ 0xf)
48238 + *------------------------------------------------------------------
48239 + *Reg_Mode1 1 0 Reg 16 ~30(0x1 ~ 0xf)
48240 + *------------------------------------------------------------------
48241 + * Reg_Mode2 1 1 Reg 31 ~ 45(0x1 ~ 0xf)
48242 + *------------------------------------------------------------------
48243 + * ****************************************************************************/
48244 +static void rtl8192_phy_RFSerialWrite(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 Offset, u32 Data)
48245 +{
48246 + struct r8192_priv *priv = ieee80211_priv(dev);
48247 + u32 DataAndAddr = 0, NewOffset = 0;
48248 + BB_REGISTER_DEFINITION_T *pPhyReg = &priv->PHYRegDef[eRFPath];
48249 +
48250 + Offset &= 0x3f;
48251 + if (priv->rf_chip == RF_8256)
48252 + {
48253 +
48254 +#ifdef RTL8190P
48255 + //analog to digital off, for protection
48256 + rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf00, 0x0);// 0x88c[11:8]
48257 +#else
48258 + #ifdef RTL8192E
48259 + //analog to digital off, for protection
48260 + rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf00, 0x0);// 0x88c[11:8]
48261 + #endif
48262 +#endif
48263 +
48264 + if (Offset >= 31)
48265 + {
48266 + priv->RfReg0Value[eRFPath] |= 0x140;
48267 + rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath] << 16));
48268 + NewOffset = Offset - 30;
48269 + }
48270 + else if (Offset >= 16)
48271 + {
48272 + priv->RfReg0Value[eRFPath] |= 0x100;
48273 + priv->RfReg0Value[eRFPath] &= (~0x40);
48274 + rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath]<<16));
48275 + NewOffset = Offset - 15;
48276 + }
48277 + else
48278 + NewOffset = Offset;
48279 + }
48280 + else
48281 + {
48282 + RT_TRACE((COMP_PHY|COMP_ERR), "check RF type here, need to be 8256\n");
48283 + NewOffset = Offset;
48284 + }
48285 +
48286 + // Put write addr in [5:0] and write data in [31:16]
48287 + DataAndAddr = (Data<<16) | (NewOffset&0x3f);
48288 +
48289 + // Write Operation
48290 + rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr);
48291 +
48292 +
48293 + if(Offset==0x0)
48294 + priv->RfReg0Value[eRFPath] = Data;
48295 +
48296 + // Switch back to Reg_Mode0;
48297 + if(priv->rf_chip == RF_8256)
48298 + {
48299 + if(Offset != 0)
48300 + {
48301 + priv->RfReg0Value[eRFPath] &= 0xebf;
48302 + rtl8192_setBBreg(
48303 + dev,
48304 + pPhyReg->rf3wireOffset,
48305 + bMaskDWord,
48306 + (priv->RfReg0Value[eRFPath] << 16));
48307 + }
48308 +#ifdef RTL8190P
48309 + if(priv->rf_type == RF_2T4R)
48310 + {
48311 + //analog to digital on
48312 + rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf00, 0xf);// 0x88c[11:8]
48313 + }
48314 + else if(priv->rf_type == RF_1T2R)
48315 + {
48316 + //analog to digital on
48317 + rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xc00, 0x3);// 0x88c[11:10]
48318 + }
48319 +#else
48320 + #ifdef RTL8192E
48321 + //analog to digital on
48322 + rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0x300, 0x3);// 0x88c[9:8]
48323 + #endif
48324 +#endif
48325 + }
48326 +
48327 + return;
48328 +}
48329 +
48330 +/******************************************************************************
48331 + *function: This function set specific bits to RF register
48332 + * input: net_device dev
48333 + * RF90_RADIO_PATH_E eRFPath //radio path of A/B/C/D
48334 + * u32 RegAddr //target addr to be modified
48335 + * u32 BitMask //taget bit pos in the addr to be modified
48336 + * u32 Data //value to be write
48337 + * output: none
48338 + * return: none
48339 + * notice:
48340 + * ****************************************************************************/
48341 +void rtl8192_phy_SetRFReg(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 RegAddr, u32 BitMask, u32 Data)
48342 +{
48343 + struct r8192_priv *priv = ieee80211_priv(dev);
48344 + u32 Original_Value, BitShift, New_Value;
48345 +// u8 time = 0;
48346 +
48347 + if (!rtl8192_phy_CheckIsLegalRFPath(dev, eRFPath))
48348 + return;
48349 +#ifdef RTL8192E
48350 + if(priv->ieee80211->eRFPowerState != eRfOn && !priv->being_init_adapter)
48351 + return;
48352 +#endif
48353 + //spin_lock_irqsave(&priv->rf_lock, flags);
48354 + //down(&priv->rf_sem);
48355 +
48356 + RT_TRACE(COMP_PHY, "FW RF CTRL is not ready now\n");
48357 + if (priv->Rf_Mode == RF_OP_By_FW)
48358 + {
48359 + if (BitMask != bMask12Bits) // RF data is 12 bits only
48360 + {
48361 + Original_Value = phy_FwRFSerialRead(dev, eRFPath, RegAddr);
48362 + BitShift = rtl8192_CalculateBitShift(BitMask);
48363 + New_Value = (((Original_Value) & (~BitMask)) | (Data<< BitShift));
48364 +
48365 + phy_FwRFSerialWrite(dev, eRFPath, RegAddr, New_Value);
48366 + }else
48367 + phy_FwRFSerialWrite(dev, eRFPath, RegAddr, Data);
48368 + udelay(200);
48369 +
48370 + }
48371 + else
48372 + {
48373 + if (BitMask != bMask12Bits) // RF data is 12 bits only
48374 + {
48375 + Original_Value = rtl8192_phy_RFSerialRead(dev, eRFPath, RegAddr);
48376 + BitShift = rtl8192_CalculateBitShift(BitMask);
48377 + New_Value = (((Original_Value) & (~BitMask)) | (Data<< BitShift));
48378 +
48379 + rtl8192_phy_RFSerialWrite(dev, eRFPath, RegAddr, New_Value);
48380 + }else
48381 + rtl8192_phy_RFSerialWrite(dev, eRFPath, RegAddr, Data);
48382 + }
48383 + //spin_unlock_irqrestore(&priv->rf_lock, flags);
48384 + //up(&priv->rf_sem);
48385 + return;
48386 +}
48387 +
48388 +/******************************************************************************
48389 + *function: This function reads specific bits from RF register
48390 + * input: net_device dev
48391 + * u32 RegAddr //target addr to be readback
48392 + * u32 BitMask //taget bit pos in the addr to be readback
48393 + * output: none
48394 + * return: u32 Data //the readback register value
48395 + * notice:
48396 + * ****************************************************************************/
48397 +u32 rtl8192_phy_QueryRFReg(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 RegAddr, u32 BitMask)
48398 +{
48399 + u32 Original_Value, Readback_Value, BitShift;
48400 + struct r8192_priv *priv = ieee80211_priv(dev);
48401 + if (!rtl8192_phy_CheckIsLegalRFPath(dev, eRFPath))
48402 + return 0;
48403 +#ifdef RTL8192E
48404 + if(priv->ieee80211->eRFPowerState != eRfOn && !priv->being_init_adapter)
48405 + return 0;
48406 +#endif
48407 + down(&priv->rf_sem);
48408 + if (priv->Rf_Mode == RF_OP_By_FW)
48409 + {
48410 + Original_Value = phy_FwRFSerialRead(dev, eRFPath, RegAddr);
48411 + udelay(200);
48412 + }
48413 + else
48414 + {
48415 + Original_Value = rtl8192_phy_RFSerialRead(dev, eRFPath, RegAddr);
48416 +
48417 + }
48418 + BitShift = rtl8192_CalculateBitShift(BitMask);
48419 + Readback_Value = (Original_Value & BitMask) >> BitShift;
48420 + up(&priv->rf_sem);
48421 +// udelay(200);
48422 + return (Readback_Value);
48423 +}
48424 +
48425 +/******************************************************************************
48426 + *function: We support firmware to execute RF-R/W.
48427 + * input: dev
48428 + * output: none
48429 + * return: none
48430 + * notice:
48431 + * ***************************************************************************/
48432 +static u32 phy_FwRFSerialRead(
48433 + struct net_device* dev,
48434 + RF90_RADIO_PATH_E eRFPath,
48435 + u32 Offset )
48436 +{
48437 + u32 retValue = 0;
48438 + u32 Data = 0;
48439 + u8 time = 0;
48440 + //DbgPrint("FW RF CTRL\n\r");
48441 + /* 2007/11/02 MH Firmware RF Write control. By Francis' suggestion, we can
48442 + not execute the scheme in the initial step. Otherwise, RF-R/W will waste
48443 + much time. This is only for site survey. */
48444 + // 1. Read operation need not insert data. bit 0-11
48445 + //Data &= bMask12Bits;
48446 + // 2. Write RF register address. Bit 12-19
48447 + Data |= ((Offset&0xFF)<<12);
48448 + // 3. Write RF path. bit 20-21
48449 + Data |= ((eRFPath&0x3)<<20);
48450 + // 4. Set RF read indicator. bit 22=0
48451 + //Data |= 0x00000;
48452 + // 5. Trigger Fw to operate the command. bit 31
48453 + Data |= 0x80000000;
48454 + // 6. We can not execute read operation if bit 31 is 1.
48455 + while (read_nic_dword(dev, QPNR)&0x80000000)
48456 + {
48457 + // If FW can not finish RF-R/W for more than ?? times. We must reset FW.
48458 + if (time++ < 100)
48459 + {
48460 + //DbgPrint("FW not finish RF-R Time=%d\n\r", time);
48461 + udelay(10);
48462 + }
48463 + else
48464 + break;
48465 + }
48466 + // 7. Execute read operation.
48467 + write_nic_dword(dev, QPNR, Data);
48468 + // 8. Check if firmawre send back RF content.
48469 + while (read_nic_dword(dev, QPNR)&0x80000000)
48470 + {
48471 + // If FW can not finish RF-R/W for more than ?? times. We must reset FW.
48472 + if (time++ < 100)
48473 + {
48474 + //DbgPrint("FW not finish RF-W Time=%d\n\r", time);
48475 + udelay(10);
48476 + }
48477 + else
48478 + return (0);
48479 + }
48480 + retValue = read_nic_dword(dev, RF_DATA);
48481 +
48482 + return (retValue);
48483 +
48484 +} /* phy_FwRFSerialRead */
48485 +
48486 +/******************************************************************************
48487 + *function: We support firmware to execute RF-R/W.
48488 + * input: dev
48489 + * output: none
48490 + * return: none
48491 + * notice:
48492 + * ***************************************************************************/
48493 +static void
48494 +phy_FwRFSerialWrite(
48495 + struct net_device* dev,
48496 + RF90_RADIO_PATH_E eRFPath,
48497 + u32 Offset,
48498 + u32 Data )
48499 +{
48500 + u8 time = 0;
48501 +
48502 + //DbgPrint("N FW RF CTRL RF-%d OF%02x DATA=%03x\n\r", eRFPath, Offset, Data);
48503 + /* 2007/11/02 MH Firmware RF Write control. By Francis' suggestion, we can
48504 + not execute the scheme in the initial step. Otherwise, RF-R/W will waste
48505 + much time. This is only for site survey. */
48506 +
48507 + // 1. Set driver write bit and 12 bit data. bit 0-11
48508 + //Data &= bMask12Bits; // Done by uper layer.
48509 + // 2. Write RF register address. bit 12-19
48510 + Data |= ((Offset&0xFF)<<12);
48511 + // 3. Write RF path. bit 20-21
48512 + Data |= ((eRFPath&0x3)<<20);
48513 + // 4. Set RF write indicator. bit 22=1
48514 + Data |= 0x400000;
48515 + // 5. Trigger Fw to operate the command. bit 31=1
48516 + Data |= 0x80000000;
48517 +
48518 + // 6. Write operation. We can not write if bit 31 is 1.
48519 + while (read_nic_dword(dev, QPNR)&0x80000000)
48520 + {
48521 + // If FW can not finish RF-R/W for more than ?? times. We must reset FW.
48522 + if (time++ < 100)
48523 + {
48524 + //DbgPrint("FW not finish RF-W Time=%d\n\r", time);
48525 + udelay(10);
48526 + }
48527 + else
48528 + break;
48529 + }
48530 + // 7. No matter check bit. We always force the write. Because FW will
48531 + // not accept the command.
48532 + write_nic_dword(dev, QPNR, Data);
48533 + /* 2007/11/02 MH Acoording to test, we must delay 20us to wait firmware
48534 + to finish RF write operation. */
48535 + /* 2008/01/17 MH We support delay in firmware side now. */
48536 + //delay_us(20);
48537 +
48538 +} /* phy_FwRFSerialWrite */
48539 +
48540 +
48541 +/******************************************************************************
48542 + *function: This function read BB parameters from Header file we gen,
48543 + * and do register read/write
48544 + * input: dev
48545 + * output: none
48546 + * return: none
48547 + * notice: BB parameters may change all the time, so please make
48548 + * sure it has been synced with the newest.
48549 + * ***************************************************************************/
48550 +void rtl8192_phy_configmac(struct net_device* dev)
48551 +{
48552 + u32 dwArrayLen = 0, i = 0;
48553 + u32* pdwArray = NULL;
48554 + struct r8192_priv *priv = ieee80211_priv(dev);
48555 +#ifdef TO_DO_LIST
48556 +if(Adapter->bInHctTest)
48557 + {
48558 + RT_TRACE(COMP_PHY, "Rtl819XMACPHY_ArrayDTM\n");
48559 + dwArrayLen = MACPHY_ArrayLengthDTM;
48560 + pdwArray = Rtl819XMACPHY_ArrayDTM;
48561 + }
48562 + else if(priv->bTXPowerDataReadFromEEPORM)
48563 +#endif
48564 + if(priv->bTXPowerDataReadFromEEPORM)
48565 + {
48566 + RT_TRACE(COMP_PHY, "Rtl819XMACPHY_Array_PG\n");
48567 + dwArrayLen = MACPHY_Array_PGLength;
48568 + pdwArray = Rtl819XMACPHY_Array_PG;
48569 +
48570 + }
48571 + else
48572 + {
48573 + RT_TRACE(COMP_PHY,"Read rtl819XMACPHY_Array\n");
48574 + dwArrayLen = MACPHY_ArrayLength;
48575 + pdwArray = Rtl819XMACPHY_Array;
48576 + }
48577 + for(i = 0; i<dwArrayLen; i=i+3){
48578 + RT_TRACE(COMP_DBG, "The Rtl8190MACPHY_Array[0] is %x Rtl8190MACPHY_Array[1] is %x Rtl8190MACPHY_Array[2] is %x\n",
48579 + pdwArray[i], pdwArray[i+1], pdwArray[i+2]);
48580 + if(pdwArray[i] == 0x318)
48581 + {
48582 + pdwArray[i+2] = 0x00000800;
48583 + //DbgPrint("ptrArray[i], ptrArray[i+1], ptrArray[i+2] = %x, %x, %x\n",
48584 + // ptrArray[i], ptrArray[i+1], ptrArray[i+2]);
48585 + }
48586 + rtl8192_setBBreg(dev, pdwArray[i], pdwArray[i+1], pdwArray[i+2]);
48587 + }
48588 + return;
48589 +
48590 +}
48591 +
48592 +/******************************************************************************
48593 + *function: This function do dirty work
48594 + * input: dev
48595 + * output: none
48596 + * return: none
48597 + * notice: BB parameters may change all the time, so please make
48598 + * sure it has been synced with the newest.
48599 + * ***************************************************************************/
48600 +
48601 +void rtl8192_phyConfigBB(struct net_device* dev, u8 ConfigType)
48602 +{
48603 + int i;
48604 + //u8 ArrayLength;
48605 + u32* Rtl819XPHY_REGArray_Table = NULL;
48606 + u32* Rtl819XAGCTAB_Array_Table = NULL;
48607 + u16 AGCTAB_ArrayLen, PHY_REGArrayLen = 0;
48608 + struct r8192_priv *priv = ieee80211_priv(dev);
48609 +#ifdef TO_DO_LIST
48610 + u32 *rtl8192PhyRegArrayTable = NULL, *rtl8192AgcTabArrayTable = NULL;
48611 + if(Adapter->bInHctTest)
48612 + {
48613 + AGCTAB_ArrayLen = AGCTAB_ArrayLengthDTM;
48614 + Rtl819XAGCTAB_Array_Table = Rtl819XAGCTAB_ArrayDTM;
48615 +
48616 + if(priv->RF_Type == RF_2T4R)
48617 + {
48618 + PHY_REGArrayLen = PHY_REGArrayLengthDTM;
48619 + Rtl819XPHY_REGArray_Table = Rtl819XPHY_REGArrayDTM;
48620 + }
48621 + else if (priv->RF_Type == RF_1T2R)
48622 + {
48623 + PHY_REGArrayLen = PHY_REG_1T2RArrayLengthDTM;
48624 + Rtl819XPHY_REGArray_Table = Rtl819XPHY_REG_1T2RArrayDTM;
48625 + }
48626 + }
48627 + else
48628 +#endif
48629 + {
48630 + AGCTAB_ArrayLen = AGCTAB_ArrayLength;
48631 + Rtl819XAGCTAB_Array_Table = Rtl819XAGCTAB_Array;
48632 + if(priv->rf_type == RF_2T4R)
48633 + {
48634 + PHY_REGArrayLen = PHY_REGArrayLength;
48635 + Rtl819XPHY_REGArray_Table = Rtl819XPHY_REGArray;
48636 + }
48637 + else if (priv->rf_type == RF_1T2R)
48638 + {
48639 + PHY_REGArrayLen = PHY_REG_1T2RArrayLength;
48640 + Rtl819XPHY_REGArray_Table = Rtl819XPHY_REG_1T2RArray;
48641 + }
48642 + }
48643 +
48644 + if (ConfigType == BaseBand_Config_PHY_REG)
48645 + {
48646 + for (i=0; i<PHY_REGArrayLen; i+=2)
48647 + {
48648 + rtl8192_setBBreg(dev, Rtl819XPHY_REGArray_Table[i], bMaskDWord, Rtl819XPHY_REGArray_Table[i+1]);
48649 + RT_TRACE(COMP_DBG, "i: %x, The Rtl819xUsbPHY_REGArray[0] is %x Rtl819xUsbPHY_REGArray[1] is %x \n",i, Rtl819XPHY_REGArray_Table[i], Rtl819XPHY_REGArray_Table[i+1]);
48650 + }
48651 + }
48652 + else if (ConfigType == BaseBand_Config_AGC_TAB)
48653 + {
48654 + for (i=0; i<AGCTAB_ArrayLen; i+=2)
48655 + {
48656 + rtl8192_setBBreg(dev, Rtl819XAGCTAB_Array_Table[i], bMaskDWord, Rtl819XAGCTAB_Array_Table[i+1]);
48657 + RT_TRACE(COMP_DBG, "i:%x, The rtl819XAGCTAB_Array[0] is %x rtl819XAGCTAB_Array[1] is %x \n",i, Rtl819XAGCTAB_Array_Table[i], Rtl819XAGCTAB_Array_Table[i+1]);
48658 + }
48659 + }
48660 + return;
48661 +
48662 +
48663 +}
48664 +/******************************************************************************
48665 + *function: This function initialize Register definition offset for Radio Path
48666 + * A/B/C/D
48667 + * input: net_device dev
48668 + * output: none
48669 + * return: none
48670 + * notice: Initialization value here is constant and it should never be changed
48671 + * ***************************************************************************/
48672 +static void rtl8192_InitBBRFRegDef(struct net_device* dev)
48673 +{
48674 + struct r8192_priv *priv = ieee80211_priv(dev);
48675 +// RF Interface Sowrtware Control
48676 + priv->PHYRegDef[RF90_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; // 16 LSBs if read 32-bit from 0x870
48677 + priv->PHYRegDef[RF90_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW; // 16 MSBs if read 32-bit from 0x870 (16-bit for 0x872)
48678 + priv->PHYRegDef[RF90_PATH_C].rfintfs = rFPGA0_XCD_RFInterfaceSW;// 16 LSBs if read 32-bit from 0x874
48679 + priv->PHYRegDef[RF90_PATH_D].rfintfs = rFPGA0_XCD_RFInterfaceSW;// 16 MSBs if read 32-bit from 0x874 (16-bit for 0x876)
48680 +
48681 + // RF Interface Readback Value
48682 + priv->PHYRegDef[RF90_PATH_A].rfintfi = rFPGA0_XAB_RFInterfaceRB; // 16 LSBs if read 32-bit from 0x8E0
48683 + priv->PHYRegDef[RF90_PATH_B].rfintfi = rFPGA0_XAB_RFInterfaceRB;// 16 MSBs if read 32-bit from 0x8E0 (16-bit for 0x8E2)
48684 + priv->PHYRegDef[RF90_PATH_C].rfintfi = rFPGA0_XCD_RFInterfaceRB;// 16 LSBs if read 32-bit from 0x8E4
48685 + priv->PHYRegDef[RF90_PATH_D].rfintfi = rFPGA0_XCD_RFInterfaceRB;// 16 MSBs if read 32-bit from 0x8E4 (16-bit for 0x8E6)
48686 +
48687 + // RF Interface Output (and Enable)
48688 + priv->PHYRegDef[RF90_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; // 16 LSBs if read 32-bit from 0x860
48689 + priv->PHYRegDef[RF90_PATH_B].rfintfo = rFPGA0_XB_RFInterfaceOE; // 16 LSBs if read 32-bit from 0x864
48690 + priv->PHYRegDef[RF90_PATH_C].rfintfo = rFPGA0_XC_RFInterfaceOE;// 16 LSBs if read 32-bit from 0x868
48691 + priv->PHYRegDef[RF90_PATH_D].rfintfo = rFPGA0_XD_RFInterfaceOE;// 16 LSBs if read 32-bit from 0x86C
48692 +
48693 + // RF Interface (Output and) Enable
48694 + priv->PHYRegDef[RF90_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; // 16 MSBs if read 32-bit from 0x860 (16-bit for 0x862)
48695 + priv->PHYRegDef[RF90_PATH_B].rfintfe = rFPGA0_XB_RFInterfaceOE; // 16 MSBs if read 32-bit from 0x864 (16-bit for 0x866)
48696 + priv->PHYRegDef[RF90_PATH_C].rfintfe = rFPGA0_XC_RFInterfaceOE;// 16 MSBs if read 32-bit from 0x86A (16-bit for 0x86A)
48697 + priv->PHYRegDef[RF90_PATH_D].rfintfe = rFPGA0_XD_RFInterfaceOE;// 16 MSBs if read 32-bit from 0x86C (16-bit for 0x86E)
48698 +
48699 + //Addr of LSSI. Wirte RF register by driver
48700 + priv->PHYRegDef[RF90_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter; //LSSI Parameter
48701 + priv->PHYRegDef[RF90_PATH_B].rf3wireOffset = rFPGA0_XB_LSSIParameter;
48702 + priv->PHYRegDef[RF90_PATH_C].rf3wireOffset = rFPGA0_XC_LSSIParameter;
48703 + priv->PHYRegDef[RF90_PATH_D].rf3wireOffset = rFPGA0_XD_LSSIParameter;
48704 +
48705 + // RF parameter
48706 + priv->PHYRegDef[RF90_PATH_A].rfLSSI_Select = rFPGA0_XAB_RFParameter; //BB Band Select
48707 + priv->PHYRegDef[RF90_PATH_B].rfLSSI_Select = rFPGA0_XAB_RFParameter;
48708 + priv->PHYRegDef[RF90_PATH_C].rfLSSI_Select = rFPGA0_XCD_RFParameter;
48709 + priv->PHYRegDef[RF90_PATH_D].rfLSSI_Select = rFPGA0_XCD_RFParameter;
48710 +
48711 + // Tx AGC Gain Stage (same for all path. Should we remove this?)
48712 + priv->PHYRegDef[RF90_PATH_A].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage
48713 + priv->PHYRegDef[RF90_PATH_B].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage
48714 + priv->PHYRegDef[RF90_PATH_C].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage
48715 + priv->PHYRegDef[RF90_PATH_D].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage
48716 +
48717 + // Tranceiver A~D HSSI Parameter-1
48718 + priv->PHYRegDef[RF90_PATH_A].rfHSSIPara1 = rFPGA0_XA_HSSIParameter1; //wire control parameter1
48719 + priv->PHYRegDef[RF90_PATH_B].rfHSSIPara1 = rFPGA0_XB_HSSIParameter1; //wire control parameter1
48720 + priv->PHYRegDef[RF90_PATH_C].rfHSSIPara1 = rFPGA0_XC_HSSIParameter1; //wire control parameter1
48721 + priv->PHYRegDef[RF90_PATH_D].rfHSSIPara1 = rFPGA0_XD_HSSIParameter1; //wire control parameter1
48722 +
48723 + // Tranceiver A~D HSSI Parameter-2
48724 + priv->PHYRegDef[RF90_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2; //wire control parameter2
48725 + priv->PHYRegDef[RF90_PATH_B].rfHSSIPara2 = rFPGA0_XB_HSSIParameter2; //wire control parameter2
48726 + priv->PHYRegDef[RF90_PATH_C].rfHSSIPara2 = rFPGA0_XC_HSSIParameter2; //wire control parameter2
48727 + priv->PHYRegDef[RF90_PATH_D].rfHSSIPara2 = rFPGA0_XD_HSSIParameter2; //wire control parameter1
48728 +
48729 + // RF switch Control
48730 + priv->PHYRegDef[RF90_PATH_A].rfSwitchControl = rFPGA0_XAB_SwitchControl; //TR/Ant switch control
48731 + priv->PHYRegDef[RF90_PATH_B].rfSwitchControl = rFPGA0_XAB_SwitchControl;
48732 + priv->PHYRegDef[RF90_PATH_C].rfSwitchControl = rFPGA0_XCD_SwitchControl;
48733 + priv->PHYRegDef[RF90_PATH_D].rfSwitchControl = rFPGA0_XCD_SwitchControl;
48734 +
48735 + // AGC control 1
48736 + priv->PHYRegDef[RF90_PATH_A].rfAGCControl1 = rOFDM0_XAAGCCore1;
48737 + priv->PHYRegDef[RF90_PATH_B].rfAGCControl1 = rOFDM0_XBAGCCore1;
48738 + priv->PHYRegDef[RF90_PATH_C].rfAGCControl1 = rOFDM0_XCAGCCore1;
48739 + priv->PHYRegDef[RF90_PATH_D].rfAGCControl1 = rOFDM0_XDAGCCore1;
48740 +
48741 + // AGC control 2
48742 + priv->PHYRegDef[RF90_PATH_A].rfAGCControl2 = rOFDM0_XAAGCCore2;
48743 + priv->PHYRegDef[RF90_PATH_B].rfAGCControl2 = rOFDM0_XBAGCCore2;
48744 + priv->PHYRegDef[RF90_PATH_C].rfAGCControl2 = rOFDM0_XCAGCCore2;
48745 + priv->PHYRegDef[RF90_PATH_D].rfAGCControl2 = rOFDM0_XDAGCCore2;
48746 +
48747 + // RX AFE control 1
48748 + priv->PHYRegDef[RF90_PATH_A].rfRxIQImbalance = rOFDM0_XARxIQImbalance;
48749 + priv->PHYRegDef[RF90_PATH_B].rfRxIQImbalance = rOFDM0_XBRxIQImbalance;
48750 + priv->PHYRegDef[RF90_PATH_C].rfRxIQImbalance = rOFDM0_XCRxIQImbalance;
48751 + priv->PHYRegDef[RF90_PATH_D].rfRxIQImbalance = rOFDM0_XDRxIQImbalance;
48752 +
48753 + // RX AFE control 1
48754 + priv->PHYRegDef[RF90_PATH_A].rfRxAFE = rOFDM0_XARxAFE;
48755 + priv->PHYRegDef[RF90_PATH_B].rfRxAFE = rOFDM0_XBRxAFE;
48756 + priv->PHYRegDef[RF90_PATH_C].rfRxAFE = rOFDM0_XCRxAFE;
48757 + priv->PHYRegDef[RF90_PATH_D].rfRxAFE = rOFDM0_XDRxAFE;
48758 +
48759 + // Tx AFE control 1
48760 + priv->PHYRegDef[RF90_PATH_A].rfTxIQImbalance = rOFDM0_XATxIQImbalance;
48761 + priv->PHYRegDef[RF90_PATH_B].rfTxIQImbalance = rOFDM0_XBTxIQImbalance;
48762 + priv->PHYRegDef[RF90_PATH_C].rfTxIQImbalance = rOFDM0_XCTxIQImbalance;
48763 + priv->PHYRegDef[RF90_PATH_D].rfTxIQImbalance = rOFDM0_XDTxIQImbalance;
48764 +
48765 + // Tx AFE control 2
48766 + priv->PHYRegDef[RF90_PATH_A].rfTxAFE = rOFDM0_XATxAFE;
48767 + priv->PHYRegDef[RF90_PATH_B].rfTxAFE = rOFDM0_XBTxAFE;
48768 + priv->PHYRegDef[RF90_PATH_C].rfTxAFE = rOFDM0_XCTxAFE;
48769 + priv->PHYRegDef[RF90_PATH_D].rfTxAFE = rOFDM0_XDTxAFE;
48770 +
48771 + // Tranceiver LSSI Readback
48772 + priv->PHYRegDef[RF90_PATH_A].rfLSSIReadBack = rFPGA0_XA_LSSIReadBack;
48773 + priv->PHYRegDef[RF90_PATH_B].rfLSSIReadBack = rFPGA0_XB_LSSIReadBack;
48774 + priv->PHYRegDef[RF90_PATH_C].rfLSSIReadBack = rFPGA0_XC_LSSIReadBack;
48775 + priv->PHYRegDef[RF90_PATH_D].rfLSSIReadBack = rFPGA0_XD_LSSIReadBack;
48776 +
48777 +}
48778 +/******************************************************************************
48779 + *function: This function is to write register and then readback to make sure whether BB and RF is OK
48780 + * input: net_device dev
48781 + * HW90_BLOCK_E CheckBlock
48782 + * RF90_RADIO_PATH_E eRFPath //only used when checkblock is HW90_BLOCK_RF
48783 + * output: none
48784 + * return: return whether BB and RF is ok(0:OK; 1:Fail)
48785 + * notice: This function may be removed in the ASIC
48786 + * ***************************************************************************/
48787 +RT_STATUS rtl8192_phy_checkBBAndRF(struct net_device* dev, HW90_BLOCK_E CheckBlock, RF90_RADIO_PATH_E eRFPath)
48788 +{
48789 + //struct r8192_priv *priv = ieee80211_priv(dev);
48790 +// BB_REGISTER_DEFINITION_T *pPhyReg = &priv->PHYRegDef[eRFPath];
48791 + RT_STATUS ret = RT_STATUS_SUCCESS;
48792 + u32 i, CheckTimes = 4, dwRegRead = 0;
48793 + u32 WriteAddr[4];
48794 + u32 WriteData[] = {0xfffff027, 0xaa55a02f, 0x00000027, 0x55aa502f};
48795 + // Initialize register address offset to be checked
48796 + WriteAddr[HW90_BLOCK_MAC] = 0x100;
48797 + WriteAddr[HW90_BLOCK_PHY0] = 0x900;
48798 + WriteAddr[HW90_BLOCK_PHY1] = 0x800;
48799 + WriteAddr[HW90_BLOCK_RF] = 0x3;
48800 + RT_TRACE(COMP_PHY, "=======>%s(), CheckBlock:%d\n", __FUNCTION__, CheckBlock);
48801 + for(i=0 ; i < CheckTimes ; i++)
48802 + {
48803 +
48804 + //
48805 + // Write Data to register and readback
48806 + //
48807 + switch(CheckBlock)
48808 + {
48809 + case HW90_BLOCK_MAC:
48810 + RT_TRACE(COMP_ERR, "PHY_CheckBBRFOK(): Never Write 0x100 here!");
48811 + break;
48812 +
48813 + case HW90_BLOCK_PHY0:
48814 + case HW90_BLOCK_PHY1:
48815 + write_nic_dword(dev, WriteAddr[CheckBlock], WriteData[i]);
48816 + dwRegRead = read_nic_dword(dev, WriteAddr[CheckBlock]);
48817 + break;
48818 +
48819 + case HW90_BLOCK_RF:
48820 + WriteData[i] &= 0xfff;
48821 + rtl8192_phy_SetRFReg(dev, eRFPath, WriteAddr[HW90_BLOCK_RF], bMask12Bits, WriteData[i]);
48822 + // TODO: we should not delay for such a long time. Ask SD3
48823 + mdelay(10);
48824 + dwRegRead = rtl8192_phy_QueryRFReg(dev, eRFPath, WriteAddr[HW90_BLOCK_RF], bMaskDWord);
48825 + mdelay(10);
48826 + break;
48827 +
48828 + default:
48829 + ret = RT_STATUS_FAILURE;
48830 + break;
48831 + }
48832 +
48833 +
48834 + //
48835 + // Check whether readback data is correct
48836 + //
48837 + if(dwRegRead != WriteData[i])
48838 + {
48839 + RT_TRACE(COMP_ERR, "====>error=====dwRegRead: %x, WriteData: %x \n", dwRegRead, WriteData[i]);
48840 + ret = RT_STATUS_FAILURE;
48841 + break;
48842 + }
48843 + }
48844 +
48845 + return ret;
48846 +}
48847 +
48848 +
48849 +/******************************************************************************
48850 + *function: This function initialize BB&RF
48851 + * input: net_device dev
48852 + * output: none
48853 + * return: none
48854 + * notice: Initialization value may change all the time, so please make
48855 + * sure it has been synced with the newest.
48856 + * ***************************************************************************/
48857 +static RT_STATUS rtl8192_BB_Config_ParaFile(struct net_device* dev)
48858 +{
48859 + struct r8192_priv *priv = ieee80211_priv(dev);
48860 + RT_STATUS rtStatus = RT_STATUS_SUCCESS;
48861 + u8 bRegValue = 0, eCheckItem = 0;
48862 + u32 dwRegValue = 0;
48863 + /**************************************
48864 + //<1>Initialize BaseBand
48865 + **************************************/
48866 +
48867 + /*--set BB Global Reset--*/
48868 + bRegValue = read_nic_byte(dev, BB_GLOBAL_RESET);
48869 + write_nic_byte(dev, BB_GLOBAL_RESET,(bRegValue|BB_GLOBAL_RESET_BIT));
48870 +
48871 + /*---set BB reset Active---*/
48872 + dwRegValue = read_nic_dword(dev, CPU_GEN);
48873 + write_nic_dword(dev, CPU_GEN, (dwRegValue&(~CPU_GEN_BB_RST)));
48874 +
48875 + /*----Ckeck FPGAPHY0 and PHY1 board is OK----*/
48876 + // TODO: this function should be removed on ASIC , Emily 2007.2.2
48877 + for(eCheckItem=(HW90_BLOCK_E)HW90_BLOCK_PHY0; eCheckItem<=HW90_BLOCK_PHY1; eCheckItem++)
48878 + {
48879 + rtStatus = rtl8192_phy_checkBBAndRF(dev, (HW90_BLOCK_E)eCheckItem, (RF90_RADIO_PATH_E)0); //don't care RF path
48880 + if(rtStatus != RT_STATUS_SUCCESS)
48881 + {
48882 + RT_TRACE((COMP_ERR | COMP_PHY), "PHY_RF8256_Config():Check PHY%d Fail!!\n", eCheckItem-1);
48883 + return rtStatus;
48884 + }
48885 + }
48886 + /*---- Set CCK and OFDM Block "OFF"----*/
48887 + rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn|bOFDMEn, 0x0);
48888 + /*----BB Register Initilazation----*/
48889 + //==m==>Set PHY REG From Header<==m==
48890 + rtl8192_phyConfigBB(dev, BaseBand_Config_PHY_REG);
48891 +
48892 + /*----Set BB reset de-Active----*/
48893 + dwRegValue = read_nic_dword(dev, CPU_GEN);
48894 + write_nic_dword(dev, CPU_GEN, (dwRegValue|CPU_GEN_BB_RST));
48895 +
48896 + /*----BB AGC table Initialization----*/
48897 + //==m==>Set PHY REG From Header<==m==
48898 + rtl8192_phyConfigBB(dev, BaseBand_Config_AGC_TAB);
48899 +
48900 + if (priv->card_8192_version > VERSION_8190_BD)
48901 + {
48902 + if(priv->rf_type == RF_2T4R)
48903 + {
48904 + // Antenna gain offset from B/C/D to A
48905 + dwRegValue = ( priv->AntennaTxPwDiff[2]<<8 |
48906 + priv->AntennaTxPwDiff[1]<<4 |
48907 + priv->AntennaTxPwDiff[0]);
48908 + }
48909 + else
48910 + dwRegValue = 0x0; //Antenna gain offset doesn't make sense in RF 1T2R.
48911 + rtl8192_setBBreg(dev, rFPGA0_TxGainStage,
48912 + (bXBTxAGC|bXCTxAGC|bXDTxAGC), dwRegValue);
48913 +
48914 +
48915 + //XSTALLCap
48916 +#ifdef RTL8190P
48917 + dwRegValue = priv->CrystalCap & 0x3; // bit0~1 of crystal cap
48918 + rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, bXtalCap01, dwRegValue);
48919 + dwRegValue = ((priv->CrystalCap & 0xc)>>2); // bit2~3 of crystal cap
48920 + rtl8192_setBBreg(dev, rFPGA0_AnalogParameter2, bXtalCap23, dwRegValue);
48921 +#else
48922 + #ifdef RTL8192E
48923 + dwRegValue = priv->CrystalCap;
48924 + rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, bXtalCap92x, dwRegValue);
48925 + #endif
48926 +#endif
48927 +
48928 + }
48929 +
48930 + // Check if the CCK HighPower is turned ON.
48931 + // This is used to calculate PWDB.
48932 +// priv->bCckHighPower = (u8)(rtl8192_QueryBBReg(dev, rFPGA0_XA_HSSIParameter2, 0x200));
48933 + return rtStatus;
48934 +}
48935 +/******************************************************************************
48936 + *function: This function initialize BB&RF
48937 + * input: net_device dev
48938 + * output: none
48939 + * return: none
48940 + * notice: Initialization value may change all the time, so please make
48941 + * sure it has been synced with the newest.
48942 + * ***************************************************************************/
48943 +RT_STATUS rtl8192_BBConfig(struct net_device* dev)
48944 +{
48945 + RT_STATUS rtStatus = RT_STATUS_SUCCESS;
48946 + rtl8192_InitBBRFRegDef(dev);
48947 + //config BB&RF. As hardCode based initialization has not been well
48948 + //implemented, so use file first.FIXME:should implement it for hardcode?
48949 + rtStatus = rtl8192_BB_Config_ParaFile(dev);
48950 + return rtStatus;
48951 +}
48952 +
48953 +/******************************************************************************
48954 + *function: This function obtains the initialization value of Tx power Level offset
48955 + * input: net_device dev
48956 + * output: none
48957 + * return: none
48958 + * ***************************************************************************/
48959 +void rtl8192_phy_getTxPower(struct net_device* dev)
48960 +{
48961 + struct r8192_priv *priv = ieee80211_priv(dev);
48962 +#ifdef RTL8190P
48963 + priv->MCSTxPowerLevelOriginalOffset[0] =
48964 + read_nic_dword(dev, MCS_TXAGC);
48965 + priv->MCSTxPowerLevelOriginalOffset[1] =
48966 + read_nic_dword(dev, (MCS_TXAGC+4));
48967 + priv->CCKTxPowerLevelOriginalOffset =
48968 + read_nic_dword(dev, CCK_TXAGC);
48969 +#else
48970 + #ifdef RTL8192E
48971 + priv->MCSTxPowerLevelOriginalOffset[0] =
48972 + read_nic_dword(dev, rTxAGC_Rate18_06);
48973 + priv->MCSTxPowerLevelOriginalOffset[1] =
48974 + read_nic_dword(dev, rTxAGC_Rate54_24);
48975 + priv->MCSTxPowerLevelOriginalOffset[2] =
48976 + read_nic_dword(dev, rTxAGC_Mcs03_Mcs00);
48977 + priv->MCSTxPowerLevelOriginalOffset[3] =
48978 + read_nic_dword(dev, rTxAGC_Mcs07_Mcs04);
48979 + priv->MCSTxPowerLevelOriginalOffset[4] =
48980 + read_nic_dword(dev, rTxAGC_Mcs11_Mcs08);
48981 + priv->MCSTxPowerLevelOriginalOffset[5] =
48982 + read_nic_dword(dev, rTxAGC_Mcs15_Mcs12);
48983 + #endif
48984 +#endif
48985 +
48986 + // read rx initial gain
48987 + priv->DefaultInitialGain[0] = read_nic_byte(dev, rOFDM0_XAAGCCore1);
48988 + priv->DefaultInitialGain[1] = read_nic_byte(dev, rOFDM0_XBAGCCore1);
48989 + priv->DefaultInitialGain[2] = read_nic_byte(dev, rOFDM0_XCAGCCore1);
48990 + priv->DefaultInitialGain[3] = read_nic_byte(dev, rOFDM0_XDAGCCore1);
48991 + RT_TRACE(COMP_INIT, "Default initial gain (c50=0x%x, c58=0x%x, c60=0x%x, c68=0x%x) \n",
48992 + priv->DefaultInitialGain[0], priv->DefaultInitialGain[1],
48993 + priv->DefaultInitialGain[2], priv->DefaultInitialGain[3]);
48994 +
48995 + // read framesync
48996 + priv->framesync = read_nic_byte(dev, rOFDM0_RxDetector3);
48997 + priv->framesyncC34 = read_nic_dword(dev, rOFDM0_RxDetector2);
48998 + RT_TRACE(COMP_INIT, "Default framesync (0x%x) = 0x%x \n",
48999 + rOFDM0_RxDetector3, priv->framesync);
49000 + // read SIFS (save the value read fome MACPHY_REG.txt)
49001 + priv->SifsTime = read_nic_word(dev, SIFS);
49002 + return;
49003 +}
49004 +
49005 +/******************************************************************************
49006 + *function: This function obtains the initialization value of Tx power Level offset
49007 + * input: net_device dev
49008 + * output: none
49009 + * return: none
49010 + * ***************************************************************************/
49011 +void rtl8192_phy_setTxPower(struct net_device* dev, u8 channel)
49012 +{
49013 + struct r8192_priv *priv = ieee80211_priv(dev);
49014 + u8 powerlevel = 0,powerlevelOFDM24G = 0;
49015 + char ant_pwr_diff;
49016 + u32 u4RegValue;
49017 +
49018 + if(priv->epromtype == EPROM_93c46)
49019 + {
49020 + powerlevel = priv->TxPowerLevelCCK[channel-1];
49021 + powerlevelOFDM24G = priv->TxPowerLevelOFDM24G[channel-1];
49022 + }
49023 + else if(priv->epromtype == EPROM_93c56)
49024 + {
49025 + if(priv->rf_type == RF_1T2R)
49026 + {
49027 + powerlevel = priv->TxPowerLevelCCK_C[channel-1];
49028 + powerlevelOFDM24G = priv->TxPowerLevelOFDM24G_C[channel-1];
49029 + }
49030 + else if(priv->rf_type == RF_2T4R)
49031 + {
49032 + // Mainly we use RF-A Tx Power to write the Tx Power registers, but the RF-C Tx
49033 + // Power must be calculated by the antenna diff.
49034 + // So we have to rewrite Antenna gain offset register here.
49035 + powerlevel = priv->TxPowerLevelCCK_A[channel-1];
49036 + powerlevelOFDM24G = priv->TxPowerLevelOFDM24G_A[channel-1];
49037 +
49038 + ant_pwr_diff = priv->TxPowerLevelOFDM24G_C[channel-1]
49039 + -priv->TxPowerLevelOFDM24G_A[channel-1];
49040 + ant_pwr_diff &= 0xf;
49041 + //DbgPrint(" ant_pwr_diff = 0x%x", (u8)(ant_pwr_diff));
49042 + priv->RF_C_TxPwDiff = ant_pwr_diff;
49043 +
49044 + priv->AntennaTxPwDiff[2] = 0;// RF-D, don't care
49045 + priv->AntennaTxPwDiff[1] = (u8)(ant_pwr_diff);// RF-C
49046 + priv->AntennaTxPwDiff[0] = 0;// RF-B, don't care
49047 +
49048 + // Antenna gain offset from B/C/D to A
49049 + u4RegValue = ( priv->AntennaTxPwDiff[2]<<8 |
49050 + priv->AntennaTxPwDiff[1]<<4 |
49051 + priv->AntennaTxPwDiff[0]);
49052 +
49053 + rtl8192_setBBreg(dev, rFPGA0_TxGainStage,
49054 + (bXBTxAGC|bXCTxAGC|bXDTxAGC), u4RegValue);
49055 + }
49056 + }
49057 +#ifdef TODO
49058 + //
49059 + // CCX 2 S31, AP control of client transmit power:
49060 + // 1. We shall not exceed Cell Power Limit as possible as we can.
49061 + // 2. Tolerance is +/- 5dB.
49062 + // 3. 802.11h Power Contraint takes higher precedence over CCX Cell Power Limit.
49063 + //
49064 + // TODO:
49065 + // 1. 802.11h power contraint
49066 + //
49067 + // 071011, by rcnjko.
49068 + //
49069 + if( pMgntInfo->OpMode == RT_OP_MODE_INFRASTRUCTURE &&
49070 + pMgntInfo->bWithCcxCellPwr &&
49071 + channel == pMgntInfo->dot11CurrentChannelNumber)
49072 + {
49073 + u8 CckCellPwrIdx = DbmToTxPwrIdx(Adapter, WIRELESS_MODE_B, pMgntInfo->CcxCellPwr);
49074 + u8 LegacyOfdmCellPwrIdx = DbmToTxPwrIdx(Adapter, WIRELESS_MODE_G, pMgntInfo->CcxCellPwr);
49075 + u8 OfdmCellPwrIdx = DbmToTxPwrIdx(Adapter, WIRELESS_MODE_N_24G, pMgntInfo->CcxCellPwr);
49076 +
49077 + RT_TRACE(COMP_TXAGC, DBG_LOUD,
49078 + ("CCX Cell Limit: %d dbm => CCK Tx power index : %d, Legacy OFDM Tx power index : %d, OFDM Tx power index: %d\n",
49079 + pMgntInfo->CcxCellPwr, CckCellPwrIdx, LegacyOfdmCellPwrIdx, OfdmCellPwrIdx));
49080 + RT_TRACE(COMP_TXAGC, DBG_LOUD,
49081 + ("EEPROM channel(%d) => CCK Tx power index: %d, Legacy OFDM Tx power index : %d, OFDM Tx power index: %d\n",
49082 + channel, powerlevel, powerlevelOFDM24G + pHalData->LegacyHTTxPowerDiff, powerlevelOFDM24G));
49083 +
49084 + // CCK
49085 + if(powerlevel > CckCellPwrIdx)
49086 + powerlevel = CckCellPwrIdx;
49087 + // Legacy OFDM, HT OFDM
49088 + if(powerlevelOFDM24G + pHalData->LegacyHTTxPowerDiff > OfdmCellPwrIdx)
49089 + {
49090 + if((OfdmCellPwrIdx - pHalData->LegacyHTTxPowerDiff) > 0)
49091 + {
49092 + powerlevelOFDM24G = OfdmCellPwrIdx - pHalData->LegacyHTTxPowerDiff;
49093 + }
49094 + else
49095 + {
49096 + LegacyOfdmCellPwrIdx = 0;
49097 + }
49098 + }
49099 +
49100 + RT_TRACE(COMP_TXAGC, DBG_LOUD,
49101 + ("Altered CCK Tx power index : %d, Legacy OFDM Tx power index: %d, OFDM Tx power index: %d\n",
49102 + powerlevel, powerlevelOFDM24G + pHalData->LegacyHTTxPowerDiff, powerlevelOFDM24G));
49103 + }
49104 +
49105 + pHalData->CurrentCckTxPwrIdx = powerlevel;
49106 + pHalData->CurrentOfdm24GTxPwrIdx = powerlevelOFDM24G;
49107 +#endif
49108 + switch(priv->rf_chip)
49109 + {
49110 + case RF_8225:
49111 + // PHY_SetRF8225CckTxPower(Adapter, powerlevel);
49112 + // PHY_SetRF8225OfdmTxPower(Adapter, powerlevelOFDM24G);
49113 + break;
49114 + case RF_8256:
49115 + PHY_SetRF8256CCKTxPower(dev, powerlevel); //need further implement
49116 + PHY_SetRF8256OFDMTxPower(dev, powerlevelOFDM24G);
49117 + break;
49118 + case RF_8258:
49119 + break;
49120 + default:
49121 + RT_TRACE(COMP_ERR, "unknown rf chip in funtion %s()\n", __FUNCTION__);
49122 + break;
49123 + }
49124 + return;
49125 +}
49126 +
49127 +/******************************************************************************
49128 + *function: This function check Rf chip to do RF config
49129 + * input: net_device dev
49130 + * output: none
49131 + * return: only 8256 is supported
49132 + * ***************************************************************************/
49133 +RT_STATUS rtl8192_phy_RFConfig(struct net_device* dev)
49134 +{
49135 + struct r8192_priv *priv = ieee80211_priv(dev);
49136 + RT_STATUS rtStatus = RT_STATUS_SUCCESS;
49137 + switch(priv->rf_chip)
49138 + {
49139 + case RF_8225:
49140 +// rtStatus = PHY_RF8225_Config(Adapter);
49141 + break;
49142 + case RF_8256:
49143 + rtStatus = PHY_RF8256_Config(dev);
49144 + break;
49145 +
49146 + case RF_8258:
49147 + break;
49148 + case RF_PSEUDO_11N:
49149 + //rtStatus = PHY_RF8225_Config(Adapter);
49150 + break;
49151 +
49152 + default:
49153 + RT_TRACE(COMP_ERR, "error chip id\n");
49154 + break;
49155 + }
49156 + return rtStatus;
49157 +}
49158 +
49159 +/******************************************************************************
49160 + *function: This function update Initial gain
49161 + * input: net_device dev
49162 + * output: none
49163 + * return: As Windows has not implemented this, wait for complement
49164 + * ***************************************************************************/
49165 +void rtl8192_phy_updateInitGain(struct net_device* dev)
49166 +{
49167 + return;
49168 +}
49169 +
49170 +/******************************************************************************
49171 + *function: This function read RF parameters from general head file, and do RF 3-wire
49172 + * input: net_device dev
49173 + * output: none
49174 + * return: return code show if RF configuration is successful(0:pass, 1:fail)
49175 + * Note: Delay may be required for RF configuration
49176 + * ***************************************************************************/
49177 +u8 rtl8192_phy_ConfigRFWithHeaderFile(struct net_device* dev, RF90_RADIO_PATH_E eRFPath)
49178 +{
49179 +
49180 + int i;
49181 + //u32* pRFArray;
49182 + u8 ret = 0;
49183 +
49184 + switch(eRFPath){
49185 + case RF90_PATH_A:
49186 + for(i = 0;i<RadioA_ArrayLength; i=i+2){
49187 +
49188 + if(Rtl819XRadioA_Array[i] == 0xfe){
49189 + msleep(100);
49190 + continue;
49191 + }
49192 + rtl8192_phy_SetRFReg(dev, eRFPath, Rtl819XRadioA_Array[i], bMask12Bits, Rtl819XRadioA_Array[i+1]);
49193 + //msleep(1);
49194 +
49195 + }
49196 + break;
49197 + case RF90_PATH_B:
49198 + for(i = 0;i<RadioB_ArrayLength; i=i+2){
49199 +
49200 + if(Rtl819XRadioB_Array[i] == 0xfe){
49201 + msleep(100);
49202 + continue;
49203 + }
49204 + rtl8192_phy_SetRFReg(dev, eRFPath, Rtl819XRadioB_Array[i], bMask12Bits, Rtl819XRadioB_Array[i+1]);
49205 + //msleep(1);
49206 +
49207 + }
49208 + break;
49209 + case RF90_PATH_C:
49210 + for(i = 0;i<RadioC_ArrayLength; i=i+2){
49211 +
49212 + if(Rtl819XRadioC_Array[i] == 0xfe){
49213 + msleep(100);
49214 + continue;
49215 + }
49216 + rtl8192_phy_SetRFReg(dev, eRFPath, Rtl819XRadioC_Array[i], bMask12Bits, Rtl819XRadioC_Array[i+1]);
49217 + //msleep(1);
49218 +
49219 + }
49220 + break;
49221 + case RF90_PATH_D:
49222 + for(i = 0;i<RadioD_ArrayLength; i=i+2){
49223 +
49224 + if(Rtl819XRadioD_Array[i] == 0xfe){
49225 + msleep(100);
49226 + continue;
49227 + }
49228 + rtl8192_phy_SetRFReg(dev, eRFPath, Rtl819XRadioD_Array[i], bMask12Bits, Rtl819XRadioD_Array[i+1]);
49229 + //msleep(1);
49230 +
49231 + }
49232 + break;
49233 + default:
49234 + break;
49235 + }
49236 +
49237 + return ret;;
49238 +
49239 +}
49240 +/******************************************************************************
49241 + *function: This function set Tx Power of the channel
49242 + * input: struct net_device *dev
49243 + * u8 channel
49244 + * output: none
49245 + * return: none
49246 + * Note:
49247 + * ***************************************************************************/
49248 +static void rtl8192_SetTxPowerLevel(struct net_device *dev, u8 channel)
49249 +{
49250 + struct r8192_priv *priv = ieee80211_priv(dev);
49251 + u8 powerlevel = priv->TxPowerLevelCCK[channel-1];
49252 + u8 powerlevelOFDM24G = priv->TxPowerLevelOFDM24G[channel-1];
49253 +
49254 + switch(priv->rf_chip)
49255 + {
49256 + case RF_8225:
49257 +#ifdef TO_DO_LIST
49258 + PHY_SetRF8225CckTxPower(Adapter, powerlevel);
49259 + PHY_SetRF8225OfdmTxPower(Adapter, powerlevelOFDM24G);
49260 +#endif
49261 + break;
49262 +
49263 + case RF_8256:
49264 + PHY_SetRF8256CCKTxPower(dev, powerlevel);
49265 + PHY_SetRF8256OFDMTxPower(dev, powerlevelOFDM24G);
49266 + break;
49267 +
49268 + case RF_8258:
49269 + break;
49270 + default:
49271 + RT_TRACE(COMP_ERR, "unknown rf chip ID in rtl8192_SetTxPowerLevel()\n");
49272 + break;
49273 + }
49274 + return;
49275 +}
49276 +/****************************************************************************************
49277 + *function: This function set command table variable(struct SwChnlCmd).
49278 + * input: SwChnlCmd* CmdTable //table to be set.
49279 + * u32 CmdTableIdx //variable index in table to be set
49280 + * u32 CmdTableSz //table size.
49281 + * SwChnlCmdID CmdID //command ID to set.
49282 + * u32 Para1
49283 + * u32 Para2
49284 + * u32 msDelay
49285 + * output:
49286 + * return: true if finished, false otherwise
49287 + * Note:
49288 + * ************************************************************************************/
49289 +static u8 rtl8192_phy_SetSwChnlCmdArray(
49290 + SwChnlCmd* CmdTable,
49291 + u32 CmdTableIdx,
49292 + u32 CmdTableSz,
49293 + SwChnlCmdID CmdID,
49294 + u32 Para1,
49295 + u32 Para2,
49296 + u32 msDelay
49297 + )
49298 +{
49299 + SwChnlCmd* pCmd;
49300 +
49301 + if(CmdTable == NULL)
49302 + {
49303 + RT_TRACE(COMP_ERR, "phy_SetSwChnlCmdArray(): CmdTable cannot be NULL.\n");
49304 + return false;
49305 + }
49306 + if(CmdTableIdx >= CmdTableSz)
49307 + {
49308 + RT_TRACE(COMP_ERR, "phy_SetSwChnlCmdArray(): Access invalid index, please check size of the table, CmdTableIdx:%d, CmdTableSz:%d\n",
49309 + CmdTableIdx, CmdTableSz);
49310 + return false;
49311 + }
49312 +
49313 + pCmd = CmdTable + CmdTableIdx;
49314 + pCmd->CmdID = CmdID;
49315 + pCmd->Para1 = Para1;
49316 + pCmd->Para2 = Para2;
49317 + pCmd->msDelay = msDelay;
49318 +
49319 + return true;
49320 +}
49321 +/******************************************************************************
49322 + *function: This function set channel step by step
49323 + * input: struct net_device *dev
49324 + * u8 channel
49325 + * u8* stage //3 stages
49326 + * u8* step //
49327 + * u32* delay //whether need to delay
49328 + * output: store new stage, step and delay for next step(combine with function above)
49329 + * return: true if finished, false otherwise
49330 + * Note: Wait for simpler function to replace it //wb
49331 + * ***************************************************************************/
49332 +static u8 rtl8192_phy_SwChnlStepByStep(struct net_device *dev, u8 channel, u8* stage, u8* step, u32* delay)
49333 +{
49334 + struct r8192_priv *priv = ieee80211_priv(dev);
49335 +// PCHANNEL_ACCESS_SETTING pChnlAccessSetting;
49336 + SwChnlCmd PreCommonCmd[MAX_PRECMD_CNT];
49337 + u32 PreCommonCmdCnt;
49338 + SwChnlCmd PostCommonCmd[MAX_POSTCMD_CNT];
49339 + u32 PostCommonCmdCnt;
49340 + SwChnlCmd RfDependCmd[MAX_RFDEPENDCMD_CNT];
49341 + u32 RfDependCmdCnt;
49342 + SwChnlCmd *CurrentCmd = NULL;
49343 + //RF90_RADIO_PATH_E eRFPath;
49344 + u8 eRFPath;
49345 +// u32 RfRetVal;
49346 +// u8 RetryCnt;
49347 +
49348 + RT_TRACE(COMP_TRACE, "====>%s()====stage:%d, step:%d, channel:%d\n", __FUNCTION__, *stage, *step, channel);
49349 +// RT_ASSERT(IsLegalChannel(Adapter, channel), ("illegal channel: %d\n", channel));
49350 +
49351 +#ifdef ENABLE_DOT11D
49352 + if (!IsLegalChannel(priv->ieee80211, channel))
49353 + {
49354 + RT_TRACE(COMP_ERR, "=============>set to illegal channel:%d\n", channel);
49355 + return true; //return true to tell upper caller function this channel setting is finished! Or it will in while loop.
49356 + }
49357 +#endif
49358 +
49359 + //for(eRFPath = RF90_PATH_A; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
49360 + //for(eRFPath = 0; eRFPath <RF90_PATH_MAX; eRFPath++)
49361 + {
49362 + //if (!rtl8192_phy_CheckIsLegalRFPath(dev, eRFPath))
49363 + // return false;
49364 + // <1> Fill up pre common command.
49365 + PreCommonCmdCnt = 0;
49366 + rtl8192_phy_SetSwChnlCmdArray(PreCommonCmd, PreCommonCmdCnt++, MAX_PRECMD_CNT,
49367 + CmdID_SetTxPowerLevel, 0, 0, 0);
49368 + rtl8192_phy_SetSwChnlCmdArray(PreCommonCmd, PreCommonCmdCnt++, MAX_PRECMD_CNT,
49369 + CmdID_End, 0, 0, 0);
49370 +
49371 + // <2> Fill up post common command.
49372 + PostCommonCmdCnt = 0;
49373 +
49374 + rtl8192_phy_SetSwChnlCmdArray(PostCommonCmd, PostCommonCmdCnt++, MAX_POSTCMD_CNT,
49375 + CmdID_End, 0, 0, 0);
49376 +
49377 + // <3> Fill up RF dependent command.
49378 + RfDependCmdCnt = 0;
49379 + switch( priv->rf_chip )
49380 + {
49381 + case RF_8225:
49382 + if (!(channel >= 1 && channel <= 14))
49383 + {
49384 + RT_TRACE(COMP_ERR, "illegal channel for Zebra 8225: %d\n", channel);
49385 + return false;
49386 + }
49387 + rtl8192_phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT,
49388 + CmdID_RF_WriteReg, rZebra1_Channel, RF_CHANNEL_TABLE_ZEBRA[channel], 10);
49389 + rtl8192_phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT,
49390 + CmdID_End, 0, 0, 0);
49391 + break;
49392 +
49393 + case RF_8256:
49394 + // TEST!! This is not the table for 8256!!
49395 + if (!(channel >= 1 && channel <= 14))
49396 + {
49397 + RT_TRACE(COMP_ERR, "illegal channel for Zebra 8256: %d\n", channel);
49398 + return false;
49399 + }
49400 + rtl8192_phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT,
49401 + CmdID_RF_WriteReg, rZebra1_Channel, channel, 10);
49402 + rtl8192_phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT,
49403 + CmdID_End, 0, 0, 0);
49404 + break;
49405 +
49406 + case RF_8258:
49407 + break;
49408 +
49409 + default:
49410 + RT_TRACE(COMP_ERR, "Unknown RFChipID: %d\n", priv->rf_chip);
49411 + return false;
49412 + break;
49413 + }
49414 +
49415 +
49416 + do{
49417 + switch(*stage)
49418 + {
49419 + case 0:
49420 + CurrentCmd=&PreCommonCmd[*step];
49421 + break;
49422 + case 1:
49423 + CurrentCmd=&RfDependCmd[*step];
49424 + break;
49425 + case 2:
49426 + CurrentCmd=&PostCommonCmd[*step];
49427 + break;
49428 + }
49429 +
49430 + if(CurrentCmd->CmdID==CmdID_End)
49431 + {
49432 + if((*stage)==2)
49433 + {
49434 + return true;
49435 + }
49436 + else
49437 + {
49438 + (*stage)++;
49439 + (*step)=0;
49440 + continue;
49441 + }
49442 + }
49443 +
49444 + switch(CurrentCmd->CmdID)
49445 + {
49446 + case CmdID_SetTxPowerLevel:
49447 + if(priv->card_8192_version > (u8)VERSION_8190_BD) //xiong: consider it later!
49448 + rtl8192_SetTxPowerLevel(dev,channel);
49449 + break;
49450 + case CmdID_WritePortUlong:
49451 + write_nic_dword(dev, CurrentCmd->Para1, CurrentCmd->Para2);
49452 + break;
49453 + case CmdID_WritePortUshort:
49454 + write_nic_word(dev, CurrentCmd->Para1, (u16)CurrentCmd->Para2);
49455 + break;
49456 + case CmdID_WritePortUchar:
49457 + write_nic_byte(dev, CurrentCmd->Para1, (u8)CurrentCmd->Para2);
49458 + break;
49459 + case CmdID_RF_WriteReg:
49460 + for(eRFPath = 0; eRFPath <priv->NumTotalRFPath; eRFPath++)
49461 + rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, CurrentCmd->Para1, bMask12Bits, CurrentCmd->Para2<<7);
49462 + break;
49463 + default:
49464 + break;
49465 + }
49466 +
49467 + break;
49468 + }while(true);
49469 + }/*for(Number of RF paths)*/
49470 +
49471 + (*delay)=CurrentCmd->msDelay;
49472 + (*step)++;
49473 + return false;
49474 +}
49475 +
49476 +/******************************************************************************
49477 + *function: This function does acturally set channel work
49478 + * input: struct net_device *dev
49479 + * u8 channel
49480 + * output: none
49481 + * return: noin
49482 + * Note: We should not call this function directly
49483 + * ***************************************************************************/
49484 +static void rtl8192_phy_FinishSwChnlNow(struct net_device *dev, u8 channel)
49485 +{
49486 + struct r8192_priv *priv = ieee80211_priv(dev);
49487 + u32 delay = 0;
49488 +
49489 + while(!rtl8192_phy_SwChnlStepByStep(dev,channel,&priv->SwChnlStage,&priv->SwChnlStep,&delay))
49490 + {
49491 + if(delay>0)
49492 + msleep(delay);//or mdelay? need further consideration
49493 + if(!priv->up)
49494 + break;
49495 + }
49496 +}
49497 +/******************************************************************************
49498 + *function: Callback routine of the work item for switch channel.
49499 + * input:
49500 + *
49501 + * output: none
49502 + * return: noin
49503 + * ***************************************************************************/
49504 +void rtl8192_SwChnl_WorkItem(struct net_device *dev)
49505 +{
49506 +
49507 + struct r8192_priv *priv = ieee80211_priv(dev);
49508 +
49509 + RT_TRACE(COMP_TRACE, "==> SwChnlCallback819xUsbWorkItem()\n");
49510 +
49511 + RT_TRACE(COMP_TRACE, "=====>--%s(), set chan:%d, priv:%p\n", __FUNCTION__, priv->chan, priv);
49512 +
49513 + rtl8192_phy_FinishSwChnlNow(dev , priv->chan);
49514 +
49515 + RT_TRACE(COMP_TRACE, "<== SwChnlCallback819xUsbWorkItem()\n");
49516 +}
49517 +
49518 +/******************************************************************************
49519 + *function: This function scheduled actural workitem to set channel
49520 + * input: net_device dev
49521 + * u8 channel //channel to set
49522 + * output: none
49523 + * return: return code show if workitem is scheduled(1:pass, 0:fail)
49524 + * Note: Delay may be required for RF configuration
49525 + * ***************************************************************************/
49526 +u8 rtl8192_phy_SwChnl(struct net_device* dev, u8 channel)
49527 +{
49528 + struct r8192_priv *priv = ieee80211_priv(dev);
49529 + RT_TRACE(COMP_PHY, "=====>%s()\n", __FUNCTION__);
49530 + if(!priv->up)
49531 + return false;
49532 + if(priv->SwChnlInProgress)
49533 + return false;
49534 +
49535 +// if(pHalData->SetBWModeInProgress)
49536 +// return;
49537 +
49538 + //--------------------------------------------
49539 + switch(priv->ieee80211->mode)
49540 + {
49541 + case WIRELESS_MODE_A:
49542 + case WIRELESS_MODE_N_5G:
49543 + if (channel<=14){
49544 + RT_TRACE(COMP_ERR, "WIRELESS_MODE_A but channel<=14");
49545 + return false;
49546 + }
49547 + break;
49548 + case WIRELESS_MODE_B:
49549 + if (channel>14){
49550 + RT_TRACE(COMP_ERR, "WIRELESS_MODE_B but channel>14");
49551 + return false;
49552 + }
49553 + break;
49554 + case WIRELESS_MODE_G:
49555 + case WIRELESS_MODE_N_24G:
49556 + if (channel>14){
49557 + RT_TRACE(COMP_ERR, "WIRELESS_MODE_G but channel>14");
49558 + return false;
49559 + }
49560 + break;
49561 + }
49562 + //--------------------------------------------
49563 +
49564 + priv->SwChnlInProgress = true;
49565 + if(channel == 0)
49566 + channel = 1;
49567 +
49568 + priv->chan=channel;
49569 +
49570 + priv->SwChnlStage=0;
49571 + priv->SwChnlStep=0;
49572 +// schedule_work(&(priv->SwChnlWorkItem));
49573 +// rtl8192_SwChnl_WorkItem(dev);
49574 + if(priv->up) {
49575 +// queue_work(priv->priv_wq,&(priv->SwChnlWorkItem));
49576 + rtl8192_SwChnl_WorkItem(dev);
49577 + }
49578 + priv->SwChnlInProgress = false;
49579 + return true;
49580 +}
49581 +
49582 +static void CCK_Tx_Power_Track_BW_Switch_TSSI(struct net_device *dev )
49583 +{
49584 + struct r8192_priv *priv = ieee80211_priv(dev);
49585 +
49586 + switch(priv->CurrentChannelBW)
49587 + {
49588 + /* 20 MHz channel*/
49589 + case HT_CHANNEL_WIDTH_20:
49590 + //added by vivi, cck,tx power track, 20080703
49591 + priv->CCKPresentAttentuation =
49592 + priv->CCKPresentAttentuation_20Mdefault + priv->CCKPresentAttentuation_difference;
49593 +
49594 + if(priv->CCKPresentAttentuation > (CCKTxBBGainTableLength-1))
49595 + priv->CCKPresentAttentuation = CCKTxBBGainTableLength-1;
49596 + if(priv->CCKPresentAttentuation < 0)
49597 + priv->CCKPresentAttentuation = 0;
49598 +
49599 + RT_TRACE(COMP_POWER_TRACKING, "20M, priv->CCKPresentAttentuation = %d\n", priv->CCKPresentAttentuation);
49600 +
49601 + if(priv->ieee80211->current_network.channel== 14 && !priv->bcck_in_ch14)
49602 + {
49603 + priv->bcck_in_ch14 = TRUE;
49604 + dm_cck_txpower_adjust(dev,priv->bcck_in_ch14);
49605 + }
49606 + else if(priv->ieee80211->current_network.channel != 14 && priv->bcck_in_ch14)
49607 + {
49608 + priv->bcck_in_ch14 = FALSE;
49609 + dm_cck_txpower_adjust(dev,priv->bcck_in_ch14);
49610 + }
49611 + else
49612 + dm_cck_txpower_adjust(dev,priv->bcck_in_ch14);
49613 + break;
49614 +
49615 + /* 40 MHz channel*/
49616 + case HT_CHANNEL_WIDTH_20_40:
49617 + //added by vivi, cck,tx power track, 20080703
49618 + priv->CCKPresentAttentuation =
49619 + priv->CCKPresentAttentuation_40Mdefault + priv->CCKPresentAttentuation_difference;
49620 +
49621 + RT_TRACE(COMP_POWER_TRACKING, "40M, priv->CCKPresentAttentuation = %d\n", priv->CCKPresentAttentuation);
49622 + if(priv->CCKPresentAttentuation > (CCKTxBBGainTableLength-1))
49623 + priv->CCKPresentAttentuation = CCKTxBBGainTableLength-1;
49624 + if(priv->CCKPresentAttentuation < 0)
49625 + priv->CCKPresentAttentuation = 0;
49626 +
49627 + if(priv->ieee80211->current_network.channel == 14 && !priv->bcck_in_ch14)
49628 + {
49629 + priv->bcck_in_ch14 = TRUE;
49630 + dm_cck_txpower_adjust(dev,priv->bcck_in_ch14);
49631 + }
49632 + else if(priv->ieee80211->current_network.channel != 14 && priv->bcck_in_ch14)
49633 + {
49634 + priv->bcck_in_ch14 = FALSE;
49635 + dm_cck_txpower_adjust(dev,priv->bcck_in_ch14);
49636 + }
49637 + else
49638 + dm_cck_txpower_adjust(dev,priv->bcck_in_ch14);
49639 + break;
49640 + }
49641 +}
49642 +
49643 +#ifndef RTL8190P
49644 +static void CCK_Tx_Power_Track_BW_Switch_ThermalMeter(struct net_device *dev)
49645 +{
49646 + struct r8192_priv *priv = ieee80211_priv(dev);
49647 +
49648 + if(priv->ieee80211->current_network.channel == 14 && !priv->bcck_in_ch14)
49649 + priv->bcck_in_ch14 = TRUE;
49650 + else if(priv->ieee80211->current_network.channel != 14 && priv->bcck_in_ch14)
49651 + priv->bcck_in_ch14 = FALSE;
49652 +
49653 + //write to default index and tx power track will be done in dm.
49654 + switch(priv->CurrentChannelBW)
49655 + {
49656 + /* 20 MHz channel*/
49657 + case HT_CHANNEL_WIDTH_20:
49658 + if(priv->Record_CCK_20Mindex == 0)
49659 + priv->Record_CCK_20Mindex = 6; //set default value.
49660 + priv->CCK_index = priv->Record_CCK_20Mindex;//6;
49661 + RT_TRACE(COMP_POWER_TRACKING, "20MHz, CCK_Tx_Power_Track_BW_Switch_ThermalMeter(),CCK_index = %d\n", priv->CCK_index);
49662 + break;
49663 +
49664 + /* 40 MHz channel*/
49665 + case HT_CHANNEL_WIDTH_20_40:
49666 + priv->CCK_index = priv->Record_CCK_40Mindex;//0;
49667 + RT_TRACE(COMP_POWER_TRACKING, "40MHz, CCK_Tx_Power_Track_BW_Switch_ThermalMeter(), CCK_index = %d\n", priv->CCK_index);
49668 + break;
49669 + }
49670 + dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
49671 +}
49672 +#endif
49673 +
49674 +static void CCK_Tx_Power_Track_BW_Switch(struct net_device *dev)
49675 +{
49676 +#ifdef RTL8192E
49677 + struct r8192_priv *priv = ieee80211_priv(dev);
49678 +#endif
49679 +
49680 +#ifdef RTL8190P
49681 + CCK_Tx_Power_Track_BW_Switch_TSSI(dev);
49682 +#else
49683 + //if(pHalData->bDcut == TRUE)
49684 + if(priv->IC_Cut >= IC_VersionCut_D)
49685 + CCK_Tx_Power_Track_BW_Switch_TSSI(dev);
49686 + else
49687 + CCK_Tx_Power_Track_BW_Switch_ThermalMeter(dev);
49688 +#endif
49689 +}
49690 +
49691 +
49692 +//
49693 +/******************************************************************************
49694 + *function: Callback routine of the work item for set bandwidth mode.
49695 + * input: struct net_device *dev
49696 + * HT_CHANNEL_WIDTH Bandwidth //20M or 40M
49697 + * HT_EXTCHNL_OFFSET Offset //Upper, Lower, or Don't care
49698 + * output: none
49699 + * return: none
49700 + * Note: I doubt whether SetBWModeInProgress flag is necessary as we can
49701 + * test whether current work in the queue or not.//do I?
49702 + * ***************************************************************************/
49703 +void rtl8192_SetBWModeWorkItem(struct net_device *dev)
49704 +{
49705 +
49706 + struct r8192_priv *priv = ieee80211_priv(dev);
49707 + u8 regBwOpMode;
49708 +
49709 + RT_TRACE(COMP_SWBW, "==>rtl8192_SetBWModeWorkItem() Switch to %s bandwidth\n", \
49710 + priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20?"20MHz":"40MHz")
49711 +
49712 +
49713 + if(priv->rf_chip== RF_PSEUDO_11N)
49714 + {
49715 + priv->SetBWModeInProgress= false;
49716 + return;
49717 + }
49718 + if(!priv->up)
49719 + {
49720 + priv->SetBWModeInProgress= false;
49721 + return;
49722 + }
49723 + //<1>Set MAC register
49724 + regBwOpMode = read_nic_byte(dev, BW_OPMODE);
49725 +
49726 + switch(priv->CurrentChannelBW)
49727 + {
49728 + case HT_CHANNEL_WIDTH_20:
49729 + regBwOpMode |= BW_OPMODE_20MHZ;
49730 + // 2007/02/07 Mark by Emily becasue we have not verify whether this register works
49731 + write_nic_byte(dev, BW_OPMODE, regBwOpMode);
49732 + break;
49733 +
49734 + case HT_CHANNEL_WIDTH_20_40:
49735 + regBwOpMode &= ~BW_OPMODE_20MHZ;
49736 + // 2007/02/07 Mark by Emily becasue we have not verify whether this register works
49737 + write_nic_byte(dev, BW_OPMODE, regBwOpMode);
49738 + break;
49739 +
49740 + default:
49741 + RT_TRACE(COMP_ERR, "SetChannelBandwidth819xUsb(): unknown Bandwidth: %#X\n",priv->CurrentChannelBW);
49742 + break;
49743 + }
49744 +
49745 + //<2>Set PHY related register
49746 + switch(priv->CurrentChannelBW)
49747 + {
49748 + case HT_CHANNEL_WIDTH_20:
49749 + // Add by Vivi 20071119
49750 + rtl8192_setBBreg(dev, rFPGA0_RFMOD, bRFMOD, 0x0);
49751 + rtl8192_setBBreg(dev, rFPGA1_RFMOD, bRFMOD, 0x0);
49752 +// rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x00100000, 1);
49753 +
49754 + // Correct the tx power for CCK rate in 20M. Suggest by YN, 20071207
49755 +// write_nic_dword(dev, rCCK0_TxFilter1, 0x1a1b0000);
49756 +// write_nic_dword(dev, rCCK0_TxFilter2, 0x090e1317);
49757 +// write_nic_dword(dev, rCCK0_DebugPort, 0x00000204);
49758 + if(!priv->btxpower_tracking)
49759 + {
49760 + write_nic_dword(dev, rCCK0_TxFilter1, 0x1a1b0000);
49761 + write_nic_dword(dev, rCCK0_TxFilter2, 0x090e1317);
49762 + write_nic_dword(dev, rCCK0_DebugPort, 0x00000204);
49763 + }
49764 + else
49765 + CCK_Tx_Power_Track_BW_Switch(dev);
49766 +
49767 +#ifdef RTL8190P
49768 + rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, bADClkPhase, 1);
49769 + rtl8192_setBBreg(dev, rOFDM0_RxDetector1, bMaskByte0, 0x44); // 0xc30 is for 8190 only, Emily
49770 +#else
49771 + #ifdef RTL8192E
49772 + rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x00100000, 1);
49773 + #endif
49774 +#endif
49775 +
49776 + break;
49777 + case HT_CHANNEL_WIDTH_20_40:
49778 + // Add by Vivi 20071119
49779 + rtl8192_setBBreg(dev, rFPGA0_RFMOD, bRFMOD, 0x1);
49780 + rtl8192_setBBreg(dev, rFPGA1_RFMOD, bRFMOD, 0x1);
49781 + //rtl8192_setBBreg(dev, rCCK0_System, bCCKSideBand, (priv->nCur40MhzPrimeSC>>1));
49782 + //rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x00100000, 0);
49783 + //rtl8192_setBBreg(dev, rOFDM1_LSTF, 0xC00, priv->nCur40MhzPrimeSC);
49784 +
49785 + // Correct the tx power for CCK rate in 40M. Suggest by YN, 20071207
49786 + //write_nic_dword(dev, rCCK0_TxFilter1, 0x35360000);
49787 + //write_nic_dword(dev, rCCK0_TxFilter2, 0x121c252e);
49788 + //write_nic_dword(dev, rCCK0_DebugPort, 0x00000409);
49789 + if(!priv->btxpower_tracking)
49790 + {
49791 + write_nic_dword(dev, rCCK0_TxFilter1, 0x35360000);
49792 + write_nic_dword(dev, rCCK0_TxFilter2, 0x121c252e);
49793 + write_nic_dword(dev, rCCK0_DebugPort, 0x00000409);
49794 + }
49795 + else
49796 + CCK_Tx_Power_Track_BW_Switch(dev);
49797 +
49798 + // Set Control channel to upper or lower. These settings are required only for 40MHz
49799 + rtl8192_setBBreg(dev, rCCK0_System, bCCKSideBand, (priv->nCur40MhzPrimeSC>>1));
49800 + rtl8192_setBBreg(dev, rOFDM1_LSTF, 0xC00, priv->nCur40MhzPrimeSC);
49801 +
49802 +
49803 +#ifdef RTL8190P
49804 + rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, bADClkPhase, 0);
49805 + rtl8192_setBBreg(dev, rOFDM0_RxDetector1, bMaskByte0, 0x42); // 0xc30 is for 8190 only, Emily
49806 +
49807 + // Set whether CCK should be sent in upper or lower channel. Suggest by YN. 20071207
49808 + // It is set in Tx descriptor for 8192x series
49809 + if(priv->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)
49810 + {
49811 + rtl8192_setBBreg(dev, rFPGA0_RFMOD, (BIT6|BIT5), 0x01);
49812 + }else if(priv->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER)
49813 + {
49814 + rtl8192_setBBreg(dev, rFPGA0_RFMOD, (BIT6|BIT5), 0x02);
49815 + }
49816 +
49817 +#else
49818 + #ifdef RTL8192E
49819 + rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x00100000, 0);
49820 + #endif
49821 +#endif
49822 + break;
49823 + default:
49824 + RT_TRACE(COMP_ERR, "SetChannelBandwidth819xUsb(): unknown Bandwidth: %#X\n" ,priv->CurrentChannelBW);
49825 + break;
49826 +
49827 + }
49828 + //Skip over setting of J-mode in BB register here. Default value is "None J mode". Emily 20070315
49829 +
49830 +#if 1
49831 + //<3>Set RF related register
49832 + switch( priv->rf_chip )
49833 + {
49834 + case RF_8225:
49835 +#ifdef TO_DO_LIST
49836 + PHY_SetRF8225Bandwidth(Adapter, pHalData->CurrentChannelBW);
49837 +#endif
49838 + break;
49839 +
49840 + case RF_8256:
49841 + PHY_SetRF8256Bandwidth(dev, priv->CurrentChannelBW);
49842 + break;
49843 +
49844 + case RF_8258:
49845 + // PHY_SetRF8258Bandwidth();
49846 + break;
49847 +
49848 + case RF_PSEUDO_11N:
49849 + // Do Nothing
49850 + break;
49851 +
49852 + default:
49853 + RT_TRACE(COMP_ERR, "Unknown RFChipID: %d\n", priv->rf_chip);
49854 + break;
49855 + }
49856 +#endif
49857 + atomic_dec(&(priv->ieee80211->atm_swbw));
49858 + priv->SetBWModeInProgress= false;
49859 +
49860 + RT_TRACE(COMP_SWBW, "<==SetBWMode819xUsb()");
49861 +}
49862 +
49863 +/******************************************************************************
49864 + *function: This function schedules bandwith switch work.
49865 + * input: struct net_device *dev
49866 + * HT_CHANNEL_WIDTH Bandwidth //20M or 40M
49867 + * HT_EXTCHNL_OFFSET Offset //Upper, Lower, or Don't care
49868 + * output: none
49869 + * return: none
49870 + * Note: I doubt whether SetBWModeInProgress flag is necessary as we can
49871 + * test whether current work in the queue or not.//do I?
49872 + * ***************************************************************************/
49873 +void rtl8192_SetBWMode(struct net_device *dev, HT_CHANNEL_WIDTH Bandwidth, HT_EXTCHNL_OFFSET Offset)
49874 +{
49875 + struct r8192_priv *priv = ieee80211_priv(dev);
49876 +
49877 +
49878 + if(priv->SetBWModeInProgress)
49879 + return;
49880 +
49881 + atomic_inc(&(priv->ieee80211->atm_swbw));
49882 + priv->SetBWModeInProgress= true;
49883 +
49884 + priv->CurrentChannelBW = Bandwidth;
49885 +
49886 + if(Offset==HT_EXTCHNL_OFFSET_LOWER)
49887 + priv->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_UPPER;
49888 + else if(Offset==HT_EXTCHNL_OFFSET_UPPER)
49889 + priv->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_LOWER;
49890 + else
49891 + priv->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
49892 +
49893 + //queue_work(priv->priv_wq, &(priv->SetBWModeWorkItem));
49894 + // schedule_work(&(priv->SetBWModeWorkItem));
49895 + rtl8192_SetBWModeWorkItem(dev);
49896 +
49897 +}
49898 +
49899 +
49900 +void InitialGain819xPci(struct net_device *dev, u8 Operation)
49901 +{
49902 +#define SCAN_RX_INITIAL_GAIN 0x17
49903 +#define POWER_DETECTION_TH 0x08
49904 + struct r8192_priv *priv = ieee80211_priv(dev);
49905 + u32 BitMask;
49906 + u8 initial_gain;
49907 +
49908 + if(priv->up)
49909 + {
49910 + switch(Operation)
49911 + {
49912 + case IG_Backup:
49913 + RT_TRACE(COMP_SCAN, "IG_Backup, backup the initial gain.\n");
49914 + initial_gain = SCAN_RX_INITIAL_GAIN;//pHalData->DefaultInitialGain[0];//
49915 + BitMask = bMaskByte0;
49916 + if(dm_digtable.dig_algorithm == DIG_ALGO_BY_FALSE_ALARM)
49917 + rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); // FW DIG OFF
49918 + priv->initgain_backup.xaagccore1 = (u8)rtl8192_QueryBBReg(dev, rOFDM0_XAAGCCore1, BitMask);
49919 + priv->initgain_backup.xbagccore1 = (u8)rtl8192_QueryBBReg(dev, rOFDM0_XBAGCCore1, BitMask);
49920 + priv->initgain_backup.xcagccore1 = (u8)rtl8192_QueryBBReg(dev, rOFDM0_XCAGCCore1, BitMask);
49921 + priv->initgain_backup.xdagccore1 = (u8)rtl8192_QueryBBReg(dev, rOFDM0_XDAGCCore1, BitMask);
49922 + BitMask = bMaskByte2;
49923 + priv->initgain_backup.cca = (u8)rtl8192_QueryBBReg(dev, rCCK0_CCA, BitMask);
49924 +
49925 + RT_TRACE(COMP_SCAN, "Scan InitialGainBackup 0xc50 is %x\n",priv->initgain_backup.xaagccore1);
49926 + RT_TRACE(COMP_SCAN, "Scan InitialGainBackup 0xc58 is %x\n",priv->initgain_backup.xbagccore1);
49927 + RT_TRACE(COMP_SCAN, "Scan InitialGainBackup 0xc60 is %x\n",priv->initgain_backup.xcagccore1);
49928 + RT_TRACE(COMP_SCAN, "Scan InitialGainBackup 0xc68 is %x\n",priv->initgain_backup.xdagccore1);
49929 + RT_TRACE(COMP_SCAN, "Scan InitialGainBackup 0xa0a is %x\n",priv->initgain_backup.cca);
49930 +
49931 + RT_TRACE(COMP_SCAN, "Write scan initial gain = 0x%x \n", initial_gain);
49932 + write_nic_byte(dev, rOFDM0_XAAGCCore1, initial_gain);
49933 + write_nic_byte(dev, rOFDM0_XBAGCCore1, initial_gain);
49934 + write_nic_byte(dev, rOFDM0_XCAGCCore1, initial_gain);
49935 + write_nic_byte(dev, rOFDM0_XDAGCCore1, initial_gain);
49936 + RT_TRACE(COMP_SCAN, "Write scan 0xa0a = 0x%x \n", POWER_DETECTION_TH);
49937 + write_nic_byte(dev, 0xa0a, POWER_DETECTION_TH);
49938 + break;
49939 + case IG_Restore:
49940 + RT_TRACE(COMP_SCAN, "IG_Restore, restore the initial gain.\n");
49941 + BitMask = 0x7f; //Bit0~ Bit6
49942 + if(dm_digtable.dig_algorithm == DIG_ALGO_BY_FALSE_ALARM)
49943 + rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); // FW DIG OFF
49944 +
49945 + rtl8192_setBBreg(dev, rOFDM0_XAAGCCore1, BitMask, (u32)priv->initgain_backup.xaagccore1);
49946 + rtl8192_setBBreg(dev, rOFDM0_XBAGCCore1, BitMask, (u32)priv->initgain_backup.xbagccore1);
49947 + rtl8192_setBBreg(dev, rOFDM0_XCAGCCore1, BitMask, (u32)priv->initgain_backup.xcagccore1);
49948 + rtl8192_setBBreg(dev, rOFDM0_XDAGCCore1, BitMask, (u32)priv->initgain_backup.xdagccore1);
49949 + BitMask = bMaskByte2;
49950 + rtl8192_setBBreg(dev, rCCK0_CCA, BitMask, (u32)priv->initgain_backup.cca);
49951 +
49952 + RT_TRACE(COMP_SCAN, "Scan BBInitialGainRestore 0xc50 is %x\n",priv->initgain_backup.xaagccore1);
49953 + RT_TRACE(COMP_SCAN, "Scan BBInitialGainRestore 0xc58 is %x\n",priv->initgain_backup.xbagccore1);
49954 + RT_TRACE(COMP_SCAN, "Scan BBInitialGainRestore 0xc60 is %x\n",priv->initgain_backup.xcagccore1);
49955 + RT_TRACE(COMP_SCAN, "Scan BBInitialGainRestore 0xc68 is %x\n",priv->initgain_backup.xdagccore1);
49956 + RT_TRACE(COMP_SCAN, "Scan BBInitialGainRestore 0xa0a is %x\n",priv->initgain_backup.cca);
49957 +
49958 + rtl8192_phy_setTxPower(dev,priv->ieee80211->current_network.channel);
49959 +
49960 +
49961 + if(dm_digtable.dig_algorithm == DIG_ALGO_BY_FALSE_ALARM)
49962 + rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1); // FW DIG ON
49963 + break;
49964 + default:
49965 + RT_TRACE(COMP_SCAN, "Unknown IG Operation. \n");
49966 + break;
49967 + }
49968 + }
49969 +}
49970 +
49971 --- /dev/null
49972 +++ b/drivers/staging/rtl8192e/r819xE_phy.h
49973 @@ -0,0 +1,125 @@
49974 +#ifndef _R819XU_PHY_H
49975 +#define _R819XU_PHY_H
49976 +/* Channel switch:The size of command tables for switch channel*/
49977 +#define MAX_PRECMD_CNT 16
49978 +#define MAX_RFDEPENDCMD_CNT 16
49979 +#define MAX_POSTCMD_CNT 16
49980 +
49981 +#ifdef RTL8190P
49982 +#define MACPHY_Array_PGLength 21
49983 +#define Rtl819XMACPHY_Array_PG Rtl8190PciMACPHY_Array_PG
49984 +#define Rtl819XMACPHY_Array Rtl8190PciMACPHY_Array
49985 +#define RadioC_ArrayLength 246
49986 +#define RadioD_ArrayLength 78
49987 +#define Rtl819XRadioA_Array Rtl8190PciRadioA_Array
49988 +#define Rtl819XRadioB_Array Rtl8190PciRadioB_Array
49989 +#define Rtl819XRadioC_Array Rtl8190PciRadioC_Array
49990 +#define Rtl819XRadioD_Array Rtl8190PciRadioD_Array
49991 +#define Rtl819XAGCTAB_Array Rtl8190PciAGCTAB_Array
49992 +#define PHY_REGArrayLength 280
49993 +#define Rtl819XPHY_REGArray Rtl8190PciPHY_REGArray
49994 +#define PHY_REG_1T2RArrayLength 280
49995 +#define Rtl819XPHY_REG_1T2RArray Rtl8190PciPHY_REG_1T2RArray
49996 +#endif
49997 +
49998 + #ifdef RTL8192E
49999 + #define MACPHY_Array_PGLength 30
50000 + #define Rtl819XMACPHY_Array_PG Rtl8192PciEMACPHY_Array_PG
50001 + #define Rtl819XMACPHY_Array Rtl8192PciEMACPHY_Array
50002 + #define RadioC_ArrayLength 1
50003 + #define RadioD_ArrayLength 1
50004 + #define Rtl819XRadioA_Array Rtl8192PciERadioA_Array
50005 + #define Rtl819XRadioB_Array Rtl8192PciERadioB_Array
50006 + #define Rtl819XRadioC_Array Rtl8192PciERadioC_Array
50007 + #define Rtl819XRadioD_Array Rtl8192PciERadioD_Array
50008 + #define Rtl819XAGCTAB_Array Rtl8192PciEAGCTAB_Array
50009 + #define PHY_REGArrayLength 1
50010 + #define Rtl819XPHY_REGArray Rtl8192PciEPHY_REGArray
50011 + #define PHY_REG_1T2RArrayLength 296
50012 + #define Rtl819XPHY_REG_1T2RArray Rtl8192PciEPHY_REG_1T2RArray
50013 + #endif
50014 +#define AGCTAB_ArrayLength 384
50015 +#define MACPHY_ArrayLength 18
50016 +
50017 +#define RadioA_ArrayLength 246
50018 +#define RadioB_ArrayLength 78
50019 +
50020 +
50021 +typedef enum _SwChnlCmdID{
50022 + CmdID_End,
50023 + CmdID_SetTxPowerLevel,
50024 + CmdID_BBRegWrite10,
50025 + CmdID_WritePortUlong,
50026 + CmdID_WritePortUshort,
50027 + CmdID_WritePortUchar,
50028 + CmdID_RF_WriteReg,
50029 +}SwChnlCmdID;
50030 +
50031 +/*--------------------------------Define structure--------------------------------*/
50032 +/* 1. Switch channel related */
50033 +typedef struct _SwChnlCmd{
50034 + SwChnlCmdID CmdID;
50035 + u32 Para1;
50036 + u32 Para2;
50037 + u32 msDelay;
50038 +}__attribute__ ((packed)) SwChnlCmd;
50039 +
50040 +extern u32 rtl819XMACPHY_Array_PG[];
50041 +extern u32 rtl819XPHY_REG_1T2RArray[];
50042 +extern u32 rtl819XAGCTAB_Array[];
50043 +extern u32 rtl819XRadioA_Array[];
50044 +extern u32 rtl819XRadioB_Array[];
50045 +extern u32 rtl819XRadioC_Array[];
50046 +extern u32 rtl819XRadioD_Array[];
50047 +
50048 +typedef enum _HW90_BLOCK{
50049 + HW90_BLOCK_MAC = 0,
50050 + HW90_BLOCK_PHY0 = 1,
50051 + HW90_BLOCK_PHY1 = 2,
50052 + HW90_BLOCK_RF = 3,
50053 + HW90_BLOCK_MAXIMUM = 4, // Never use this
50054 +}HW90_BLOCK_E, *PHW90_BLOCK_E;
50055 +
50056 +typedef enum _RF90_RADIO_PATH{
50057 + RF90_PATH_A = 0, //Radio Path A
50058 + RF90_PATH_B = 1, //Radio Path B
50059 + RF90_PATH_C = 2, //Radio Path C
50060 + RF90_PATH_D = 3, //Radio Path D
50061 + RF90_PATH_MAX //Max RF number 92 support
50062 +}RF90_RADIO_PATH_E, *PRF90_RADIO_PATH_E;
50063 +
50064 +#define bMaskByte0 0xff
50065 +#define bMaskByte1 0xff00
50066 +#define bMaskByte2 0xff0000
50067 +#define bMaskByte3 0xff000000
50068 +#define bMaskHWord 0xffff0000
50069 +#define bMaskLWord 0x0000ffff
50070 +#define bMaskDWord 0xffffffff
50071 +
50072 +//extern u32 rtl8192_CalculateBitShift(u32 dwBitMask);
50073 +extern u8 rtl8192_phy_CheckIsLegalRFPath(struct net_device* dev, u32 eRFPath);
50074 +extern void rtl8192_setBBreg(struct net_device* dev, u32 dwRegAddr, u32 dwBitMask, u32 dwData);
50075 +extern u32 rtl8192_QueryBBReg(struct net_device* dev, u32 dwRegAddr, u32 dwBitMask);
50076 +//extern u32 rtl8192_phy_RFSerialRead(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 Offset);
50077 +//extern void rtl8192_phy_RFSerialWrite(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 Offset, u32 Data);
50078 +extern void rtl8192_phy_SetRFReg(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 RegAddr, u32 BitMask, u32 Data);
50079 +extern u32 rtl8192_phy_QueryRFReg(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 RegAddr, u32 BitMask);
50080 +extern void rtl8192_phy_configmac(struct net_device* dev);
50081 +extern void rtl8192_phyConfigBB(struct net_device* dev, u8 ConfigType);
50082 +//extern void rtl8192_InitBBRFRegDef(struct net_device* dev);
50083 +extern RT_STATUS rtl8192_phy_checkBBAndRF(struct net_device* dev, HW90_BLOCK_E CheckBlock, RF90_RADIO_PATH_E eRFPath);
50084 +//extern RT_STATUS rtl8192_BB_Config_ParaFile(struct net_device* dev);
50085 +extern RT_STATUS rtl8192_BBConfig(struct net_device* dev);
50086 +extern void rtl8192_phy_getTxPower(struct net_device* dev);
50087 +extern void rtl8192_phy_setTxPower(struct net_device* dev, u8 channel);
50088 +extern RT_STATUS rtl8192_phy_RFConfig(struct net_device* dev);
50089 +extern void rtl8192_phy_updateInitGain(struct net_device* dev);
50090 +extern u8 rtl8192_phy_ConfigRFWithHeaderFile(struct net_device* dev, RF90_RADIO_PATH_E eRFPath);
50091 +
50092 +extern u8 rtl8192_phy_SwChnl(struct net_device* dev, u8 channel);
50093 +extern void rtl8192_SetBWMode(struct net_device *dev, HT_CHANNEL_WIDTH Bandwidth, HT_EXTCHNL_OFFSET Offset);
50094 +extern void rtl8192_SwChnl_WorkItem(struct net_device *dev);
50095 +extern void rtl8192_SetBWModeWorkItem(struct net_device *dev);
50096 +extern void InitialGain819xPci(struct net_device *dev, u8 Operation);
50097 +
50098 +#endif
50099 --- /dev/null
50100 +++ b/drivers/staging/rtl8192e/r819xE_phyreg.h
50101 @@ -0,0 +1,878 @@
50102 +#ifndef _R819XU_PHYREG_H
50103 +#define _R819XU_PHYREG_H
50104 +
50105 +
50106 +#define RF_DATA 0x1d4 // FW will write RF data in the register.
50107 +
50108 +//Register //duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF
50109 +//page 1
50110 +#define rPMAC_Reset 0x100
50111 +#define rPMAC_TxStart 0x104
50112 +#define rPMAC_TxLegacySIG 0x108
50113 +#define rPMAC_TxHTSIG1 0x10c
50114 +#define rPMAC_TxHTSIG2 0x110
50115 +#define rPMAC_PHYDebug 0x114
50116 +#define rPMAC_TxPacketNum 0x118
50117 +#define rPMAC_TxIdle 0x11c
50118 +#define rPMAC_TxMACHeader0 0x120
50119 +#define rPMAC_TxMACHeader1 0x124
50120 +#define rPMAC_TxMACHeader2 0x128
50121 +#define rPMAC_TxMACHeader3 0x12c
50122 +#define rPMAC_TxMACHeader4 0x130
50123 +#define rPMAC_TxMACHeader5 0x134
50124 +#define rPMAC_TxDataType 0x138
50125 +#define rPMAC_TxRandomSeed 0x13c
50126 +#define rPMAC_CCKPLCPPreamble 0x140
50127 +#define rPMAC_CCKPLCPHeader 0x144
50128 +#define rPMAC_CCKCRC16 0x148
50129 +#define rPMAC_OFDMRxCRC32OK 0x170
50130 +#define rPMAC_OFDMRxCRC32Er 0x174
50131 +#define rPMAC_OFDMRxParityEr 0x178
50132 +#define rPMAC_OFDMRxCRC8Er 0x17c
50133 +#define rPMAC_CCKCRxRC16Er 0x180
50134 +#define rPMAC_CCKCRxRC32Er 0x184
50135 +#define rPMAC_CCKCRxRC32OK 0x188
50136 +#define rPMAC_TxStatus 0x18c
50137 +
50138 +//90P
50139 +#define MCS_TXAGC 0x340 // MCS AGC
50140 +#define CCK_TXAGC 0x348 // CCK AGC
50141 +
50142 +//page8
50143 +#define rFPGA0_RFMOD 0x800 //RF mode & CCK TxSC
50144 +#define rFPGA0_TxInfo 0x804
50145 +#define rFPGA0_PSDFunction 0x808
50146 +#define rFPGA0_TxGainStage 0x80c
50147 +#define rFPGA0_RFTiming1 0x810
50148 +#define rFPGA0_RFTiming2 0x814
50149 +//#define rFPGA0_XC_RFTiming 0x818
50150 +//#define rFPGA0_XD_RFTiming 0x81c
50151 +#define rFPGA0_XA_HSSIParameter1 0x820
50152 +#define rFPGA0_XA_HSSIParameter2 0x824
50153 +#define rFPGA0_XB_HSSIParameter1 0x828
50154 +#define rFPGA0_XB_HSSIParameter2 0x82c
50155 +#define rFPGA0_XC_HSSIParameter1 0x830
50156 +#define rFPGA0_XC_HSSIParameter2 0x834
50157 +#define rFPGA0_XD_HSSIParameter1 0x838
50158 +#define rFPGA0_XD_HSSIParameter2 0x83c
50159 +#define rFPGA0_XA_LSSIParameter 0x840
50160 +#define rFPGA0_XB_LSSIParameter 0x844
50161 +#define rFPGA0_XC_LSSIParameter 0x848
50162 +#define rFPGA0_XD_LSSIParameter 0x84c
50163 +#define rFPGA0_RFWakeUpParameter 0x850
50164 +#define rFPGA0_RFSleepUpParameter 0x854
50165 +#define rFPGA0_XAB_SwitchControl 0x858
50166 +#define rFPGA0_XCD_SwitchControl 0x85c
50167 +#define rFPGA0_XA_RFInterfaceOE 0x860
50168 +#define rFPGA0_XB_RFInterfaceOE 0x864
50169 +#define rFPGA0_XC_RFInterfaceOE 0x868
50170 +#define rFPGA0_XD_RFInterfaceOE 0x86c
50171 +#define rFPGA0_XAB_RFInterfaceSW 0x870
50172 +#define rFPGA0_XCD_RFInterfaceSW 0x874
50173 +#define rFPGA0_XAB_RFParameter 0x878
50174 +#define rFPGA0_XCD_RFParameter 0x87c
50175 +#define rFPGA0_AnalogParameter1 0x880
50176 +#define rFPGA0_AnalogParameter2 0x884
50177 +#define rFPGA0_AnalogParameter3 0x888
50178 +#define rFPGA0_AnalogParameter4 0x88c
50179 +#define rFPGA0_XA_LSSIReadBack 0x8a0
50180 +#define rFPGA0_XB_LSSIReadBack 0x8a4
50181 +#define rFPGA0_XC_LSSIReadBack 0x8a8
50182 +#define rFPGA0_XD_LSSIReadBack 0x8ac
50183 +#define rFPGA0_PSDReport 0x8b4
50184 +#define rFPGA0_XAB_RFInterfaceRB 0x8e0
50185 +#define rFPGA0_XCD_RFInterfaceRB 0x8e4
50186 +
50187 +//page 9
50188 +#define rFPGA1_RFMOD 0x900 //RF mode & OFDM TxSC
50189 +#define rFPGA1_TxBlock 0x904
50190 +#define rFPGA1_DebugSelect 0x908
50191 +#define rFPGA1_TxInfo 0x90c
50192 +
50193 +//page a
50194 +#define rCCK0_System 0xa00
50195 +#define rCCK0_AFESetting 0xa04
50196 +#define rCCK0_CCA 0xa08
50197 +#define rCCK0_RxAGC1 0xa0c //AGC default value, saturation level
50198 +#define rCCK0_RxAGC2 0xa10 //AGC & DAGC
50199 +#define rCCK0_RxHP 0xa14
50200 +#define rCCK0_DSPParameter1 0xa18 //Timing recovery & Channel estimation threshold
50201 +#define rCCK0_DSPParameter2 0xa1c //SQ threshold
50202 +#define rCCK0_TxFilter1 0xa20
50203 +#define rCCK0_TxFilter2 0xa24
50204 +#define rCCK0_DebugPort 0xa28 //debug port and Tx filter3
50205 +#define rCCK0_FalseAlarmReport 0xa2c //0xa2d
50206 +#define rCCK0_TRSSIReport 0xa50
50207 +#define rCCK0_RxReport 0xa54 //0xa57
50208 +#define rCCK0_FACounterLower 0xa5c //0xa5b
50209 +#define rCCK0_FACounterUpper 0xa58 //0xa5c
50210 +
50211 +//page c
50212 +#define rOFDM0_LSTF 0xc00
50213 +#define rOFDM0_TRxPathEnable 0xc04
50214 +#define rOFDM0_TRMuxPar 0xc08
50215 +#define rOFDM0_TRSWIsolation 0xc0c
50216 +#define rOFDM0_XARxAFE 0xc10 //RxIQ DC offset, Rx digital filter, DC notch filter
50217 +#define rOFDM0_XARxIQImbalance 0xc14 //RxIQ imblance matrix
50218 +#define rOFDM0_XBRxAFE 0xc18
50219 +#define rOFDM0_XBRxIQImbalance 0xc1c
50220 +#define rOFDM0_XCRxAFE 0xc20
50221 +#define rOFDM0_XCRxIQImbalance 0xc24
50222 +#define rOFDM0_XDRxAFE 0xc28
50223 +#define rOFDM0_XDRxIQImbalance 0xc2c
50224 +#define rOFDM0_RxDetector1 0xc30 //PD,BW & SBD
50225 +#define rOFDM0_RxDetector2 0xc34 //SBD & Fame Sync.
50226 +#define rOFDM0_RxDetector3 0xc38 //Frame Sync.
50227 +#define rOFDM0_RxDetector4 0xc3c //PD, SBD, Frame Sync & Short-GI
50228 +#define rOFDM0_RxDSP 0xc40 //Rx Sync Path
50229 +#define rOFDM0_CFOandDAGC 0xc44 //CFO & DAGC
50230 +#define rOFDM0_CCADropThreshold 0xc48 //CCA Drop threshold
50231 +#define rOFDM0_ECCAThreshold 0xc4c // energy CCA
50232 +#define rOFDM0_XAAGCCore1 0xc50
50233 +#define rOFDM0_XAAGCCore2 0xc54
50234 +#define rOFDM0_XBAGCCore1 0xc58
50235 +#define rOFDM0_XBAGCCore2 0xc5c
50236 +#define rOFDM0_XCAGCCore1 0xc60
50237 +#define rOFDM0_XCAGCCore2 0xc64
50238 +#define rOFDM0_XDAGCCore1 0xc68
50239 +#define rOFDM0_XDAGCCore2 0xc6c
50240 +#define rOFDM0_AGCParameter1 0xc70
50241 +#define rOFDM0_AGCParameter2 0xc74
50242 +#define rOFDM0_AGCRSSITable 0xc78
50243 +#define rOFDM0_HTSTFAGC 0xc7c
50244 +#define rOFDM0_XATxIQImbalance 0xc80
50245 +#define rOFDM0_XATxAFE 0xc84
50246 +#define rOFDM0_XBTxIQImbalance 0xc88
50247 +#define rOFDM0_XBTxAFE 0xc8c
50248 +#define rOFDM0_XCTxIQImbalance 0xc90
50249 +#define rOFDM0_XCTxAFE 0xc94
50250 +#define rOFDM0_XDTxIQImbalance 0xc98
50251 +#define rOFDM0_XDTxAFE 0xc9c
50252 +#define rOFDM0_RxHPParameter 0xce0
50253 +#define rOFDM0_TxPseudoNoiseWgt 0xce4
50254 +#define rOFDM0_FrameSync 0xcf0
50255 +#define rOFDM0_DFSReport 0xcf4
50256 +#define rOFDM0_TxCoeff1 0xca4
50257 +#define rOFDM0_TxCoeff2 0xca8
50258 +#define rOFDM0_TxCoeff3 0xcac
50259 +#define rOFDM0_TxCoeff4 0xcb0
50260 +#define rOFDM0_TxCoeff5 0xcb4
50261 +#define rOFDM0_TxCoeff6 0xcb8
50262 +
50263 +
50264 +//page d
50265 +#define rOFDM1_LSTF 0xd00
50266 +#define rOFDM1_TRxPathEnable 0xd04
50267 +#define rOFDM1_CFO 0xd08
50268 +#define rOFDM1_CSI1 0xd10
50269 +#define rOFDM1_SBD 0xd14
50270 +#define rOFDM1_CSI2 0xd18
50271 +#define rOFDM1_CFOTracking 0xd2c
50272 +#define rOFDM1_TRxMesaure1 0xd34
50273 +#define rOFDM1_IntfDet 0xd3c
50274 +#define rOFDM1_PseudoNoiseStateAB 0xd50
50275 +#define rOFDM1_PseudoNoiseStateCD 0xd54
50276 +#define rOFDM1_RxPseudoNoiseWgt 0xd58
50277 +#define rOFDM_PHYCounter1 0xda0 //cca, parity fail
50278 +#define rOFDM_PHYCounter2 0xda4 //rate illegal, crc8 fail
50279 +#define rOFDM_PHYCounter3 0xda8 //MCS not support
50280 +#define rOFDM_ShortCFOAB 0xdac
50281 +#define rOFDM_ShortCFOCD 0xdb0
50282 +#define rOFDM_LongCFOAB 0xdb4
50283 +#define rOFDM_LongCFOCD 0xdb8
50284 +#define rOFDM_TailCFOAB 0xdbc
50285 +#define rOFDM_TailCFOCD 0xdc0
50286 +#define rOFDM_PWMeasure1 0xdc4
50287 +#define rOFDM_PWMeasure2 0xdc8
50288 +#define rOFDM_BWReport 0xdcc
50289 +#define rOFDM_AGCReport 0xdd0
50290 +#define rOFDM_RxSNR 0xdd4
50291 +#define rOFDM_RxEVMCSI 0xdd8
50292 +#define rOFDM_SIGReport 0xddc
50293 +
50294 +//page e
50295 +#define rTxAGC_Rate18_06 0xe00
50296 +#define rTxAGC_Rate54_24 0xe04
50297 +#define rTxAGC_CCK_Mcs32 0xe08
50298 +#define rTxAGC_Mcs03_Mcs00 0xe10
50299 +#define rTxAGC_Mcs07_Mcs04 0xe14
50300 +#define rTxAGC_Mcs11_Mcs08 0xe18
50301 +#define rTxAGC_Mcs15_Mcs12 0xe1c
50302 +
50303 +
50304 +//RF
50305 +//Zebra1
50306 +#define rZebra1_HSSIEnable 0x0
50307 +#define rZebra1_TRxEnable1 0x1
50308 +#define rZebra1_TRxEnable2 0x2
50309 +#define rZebra1_AGC 0x4
50310 +#define rZebra1_ChargePump 0x5
50311 +#define rZebra1_Channel 0x7
50312 +#define rZebra1_TxGain 0x8
50313 +#define rZebra1_TxLPF 0x9
50314 +#define rZebra1_RxLPF 0xb
50315 +#define rZebra1_RxHPFCorner 0xc
50316 +
50317 +//Zebra4
50318 +#define rGlobalCtrl 0
50319 +#define rRTL8256_TxLPF 19
50320 +#define rRTL8256_RxLPF 11
50321 +
50322 +//RTL8258
50323 +#define rRTL8258_TxLPF 0x11
50324 +#define rRTL8258_RxLPF 0x13
50325 +#define rRTL8258_RSSILPF 0xa
50326 +
50327 +//Bit Mask
50328 +//page-1
50329 +#define bBBResetB 0x100
50330 +#define bGlobalResetB 0x200
50331 +#define bOFDMTxStart 0x4
50332 +#define bCCKTxStart 0x8
50333 +#define bCRC32Debug 0x100
50334 +#define bPMACLoopback 0x10
50335 +#define bTxLSIG 0xffffff
50336 +#define bOFDMTxRate 0xf
50337 +#define bOFDMTxReserved 0x10
50338 +#define bOFDMTxLength 0x1ffe0
50339 +#define bOFDMTxParity 0x20000
50340 +#define bTxHTSIG1 0xffffff
50341 +#define bTxHTMCSRate 0x7f
50342 +#define bTxHTBW 0x80
50343 +#define bTxHTLength 0xffff00
50344 +#define bTxHTSIG2 0xffffff
50345 +#define bTxHTSmoothing 0x1
50346 +#define bTxHTSounding 0x2
50347 +#define bTxHTReserved 0x4
50348 +#define bTxHTAggreation 0x8
50349 +#define bTxHTSTBC 0x30
50350 +#define bTxHTAdvanceCoding 0x40
50351 +#define bTxHTShortGI 0x80
50352 +#define bTxHTNumberHT_LTF 0x300
50353 +#define bTxHTCRC8 0x3fc00
50354 +#define bCounterReset 0x10000
50355 +#define bNumOfOFDMTx 0xffff
50356 +#define bNumOfCCKTx 0xffff0000
50357 +#define bTxIdleInterval 0xffff
50358 +#define bOFDMService 0xffff0000
50359 +#define bTxMACHeader 0xffffffff
50360 +#define bTxDataInit 0xff
50361 +#define bTxHTMode 0x100
50362 +#define bTxDataType 0x30000
50363 +#define bTxRandomSeed 0xffffffff
50364 +#define bCCKTxPreamble 0x1
50365 +#define bCCKTxSFD 0xffff0000
50366 +#define bCCKTxSIG 0xff
50367 +#define bCCKTxService 0xff00
50368 +#define bCCKLengthExt 0x8000
50369 +#define bCCKTxLength 0xffff0000
50370 +#define bCCKTxCRC16 0xffff
50371 +#define bCCKTxStatus 0x1
50372 +#define bOFDMTxStatus 0x2
50373 +
50374 +//page-8
50375 +#define bRFMOD 0x1
50376 +#define bJapanMode 0x2
50377 +#define bCCKTxSC 0x30
50378 +#define bCCKEn 0x1000000
50379 +#define bOFDMEn 0x2000000
50380 +#define bOFDMRxADCPhase 0x10000
50381 +#define bOFDMTxDACPhase 0x40000
50382 +#define bXATxAGC 0x3f
50383 +#define bXBTxAGC 0xf00
50384 +#define bXCTxAGC 0xf000
50385 +#define bXDTxAGC 0xf0000
50386 +#define bPAStart 0xf0000000
50387 +#define bTRStart 0x00f00000
50388 +#define bRFStart 0x0000f000
50389 +#define bBBStart 0x000000f0
50390 +#define bBBCCKStart 0x0000000f
50391 +#define bPAEnd 0xf //Reg0x814
50392 +#define bTREnd 0x0f000000
50393 +#define bRFEnd 0x000f0000
50394 +#define bCCAMask 0x000000f0 //T2R
50395 +#define bR2RCCAMask 0x00000f00
50396 +#define bHSSI_R2TDelay 0xf8000000
50397 +#define bHSSI_T2RDelay 0xf80000
50398 +#define bContTxHSSI 0x400 //chane gain at continue Tx
50399 +#define bIGFromCCK 0x200
50400 +#define bAGCAddress 0x3f
50401 +#define bRxHPTx 0x7000
50402 +#define bRxHPT2R 0x38000
50403 +#define bRxHPCCKIni 0xc0000
50404 +#define bAGCTxCode 0xc00000
50405 +#define bAGCRxCode 0x300000
50406 +#define b3WireDataLength 0x800
50407 +#define b3WireAddressLength 0x400
50408 +#define b3WireRFPowerDown 0x1
50409 +//#define bHWSISelect 0x8
50410 +#define b5GPAPEPolarity 0x40000000
50411 +#define b2GPAPEPolarity 0x80000000
50412 +#define bRFSW_TxDefaultAnt 0x3
50413 +#define bRFSW_TxOptionAnt 0x30
50414 +#define bRFSW_RxDefaultAnt 0x300
50415 +#define bRFSW_RxOptionAnt 0x3000
50416 +#define bRFSI_3WireData 0x1
50417 +#define bRFSI_3WireClock 0x2
50418 +#define bRFSI_3WireLoad 0x4
50419 +#define bRFSI_3WireRW 0x8
50420 +#define bRFSI_3Wire 0xf //3-wire total control
50421 +#define bRFSI_RFENV 0x10
50422 +#define bRFSI_TRSW 0x20
50423 +#define bRFSI_TRSWB 0x40
50424 +#define bRFSI_ANTSW 0x100
50425 +#define bRFSI_ANTSWB 0x200
50426 +#define bRFSI_PAPE 0x400
50427 +#define bRFSI_PAPE5G 0x800
50428 +#define bBandSelect 0x1
50429 +#define bHTSIG2_GI 0x80
50430 +#define bHTSIG2_Smoothing 0x01
50431 +#define bHTSIG2_Sounding 0x02
50432 +#define bHTSIG2_Aggreaton 0x08
50433 +#define bHTSIG2_STBC 0x30
50434 +#define bHTSIG2_AdvCoding 0x40
50435 +#define bHTSIG2_NumOfHTLTF 0x300
50436 +#define bHTSIG2_CRC8 0x3fc
50437 +#define bHTSIG1_MCS 0x7f
50438 +#define bHTSIG1_BandWidth 0x80
50439 +#define bHTSIG1_HTLength 0xffff
50440 +#define bLSIG_Rate 0xf
50441 +#define bLSIG_Reserved 0x10
50442 +#define bLSIG_Length 0x1fffe
50443 +#define bLSIG_Parity 0x20
50444 +#define bCCKRxPhase 0x4
50445 +#define bLSSIReadAddress 0x3f000000 //LSSI "Read" Address
50446 +#define bLSSIReadEdge 0x80000000 //LSSI "Read" edge signal
50447 +#define bLSSIReadBackData 0xfff
50448 +#define bLSSIReadOKFlag 0x1000
50449 +#define bCCKSampleRate 0x8 //0: 44MHz, 1:88MHz
50450 +
50451 +#define bRegulator0Standby 0x1
50452 +#define bRegulatorPLLStandby 0x2
50453 +#define bRegulator1Standby 0x4
50454 +#define bPLLPowerUp 0x8
50455 +#define bDPLLPowerUp 0x10
50456 +#define bDA10PowerUp 0x20
50457 +#define bAD7PowerUp 0x200
50458 +#define bDA6PowerUp 0x2000
50459 +#define bXtalPowerUp 0x4000
50460 +#define b40MDClkPowerUP 0x8000
50461 +#define bDA6DebugMode 0x20000
50462 +#define bDA6Swing 0x380000
50463 +#define bADClkPhase 0x4000000
50464 +#define b80MClkDelay 0x18000000
50465 +#define bAFEWatchDogEnable 0x20000000
50466 +#define bXtalCap 0x0f000000
50467 +#define bXtalCap01 0xc0000000
50468 +#define bXtalCap23 0x3
50469 +#define bXtalCap92x 0x0f000000
50470 +#define bIntDifClkEnable 0x400
50471 +#define bExtSigClkEnable 0x800
50472 +#define bBandgapMbiasPowerUp 0x10000
50473 +#define bAD11SHGain 0xc0000
50474 +#define bAD11InputRange 0x700000
50475 +#define bAD11OPCurrent 0x3800000
50476 +#define bIPathLoopback 0x4000000
50477 +#define bQPathLoopback 0x8000000
50478 +#define bAFELoopback 0x10000000
50479 +#define bDA10Swing 0x7e0
50480 +#define bDA10Reverse 0x800
50481 +#define bDAClkSource 0x1000
50482 +#define bAD7InputRange 0x6000
50483 +#define bAD7Gain 0x38000
50484 +#define bAD7OutputCMMode 0x40000
50485 +#define bAD7InputCMMode 0x380000
50486 +#define bAD7Current 0xc00000
50487 +#define bRegulatorAdjust 0x7000000
50488 +#define bAD11PowerUpAtTx 0x1
50489 +#define bDA10PSAtTx 0x10
50490 +#define bAD11PowerUpAtRx 0x100
50491 +#define bDA10PSAtRx 0x1000
50492 +
50493 +#define bCCKRxAGCFormat 0x200
50494 +
50495 +#define bPSDFFTSamplepPoint 0xc000
50496 +#define bPSDAverageNum 0x3000
50497 +#define bIQPathControl 0xc00
50498 +#define bPSDFreq 0x3ff
50499 +#define bPSDAntennaPath 0x30
50500 +#define bPSDIQSwitch 0x40
50501 +#define bPSDRxTrigger 0x400000
50502 +#define bPSDTxTrigger 0x80000000
50503 +#define bPSDSineToneScale 0x7f000000
50504 +#define bPSDReport 0xffff
50505 +
50506 +//page-9
50507 +#define bOFDMTxSC 0x30000000
50508 +#define bCCKTxOn 0x1
50509 +#define bOFDMTxOn 0x2
50510 +#define bDebugPage 0xfff //reset debug page and also HWord, LWord
50511 +#define bDebugItem 0xff //reset debug page and LWord
50512 +#define bAntL 0x10
50513 +#define bAntNonHT 0x100
50514 +#define bAntHT1 0x1000
50515 +#define bAntHT2 0x10000
50516 +#define bAntHT1S1 0x100000
50517 +#define bAntNonHTS1 0x1000000
50518 +
50519 +//page-a
50520 +#define bCCKBBMode 0x3
50521 +#define bCCKTxPowerSaving 0x80
50522 +#define bCCKRxPowerSaving 0x40
50523 +#define bCCKSideBand 0x10
50524 +#define bCCKScramble 0x8
50525 +#define bCCKAntDiversity 0x8000
50526 +#define bCCKCarrierRecovery 0x4000
50527 +#define bCCKTxRate 0x3000
50528 +#define bCCKDCCancel 0x0800
50529 +#define bCCKISICancel 0x0400
50530 +#define bCCKMatchFilter 0x0200
50531 +#define bCCKEqualizer 0x0100
50532 +#define bCCKPreambleDetect 0x800000
50533 +#define bCCKFastFalseCCA 0x400000
50534 +#define bCCKChEstStart 0x300000
50535 +#define bCCKCCACount 0x080000
50536 +#define bCCKcs_lim 0x070000
50537 +#define bCCKBistMode 0x80000000
50538 +#define bCCKCCAMask 0x40000000
50539 +#define bCCKTxDACPhase 0x4
50540 +#define bCCKRxADCPhase 0x20000000 //r_rx_clk
50541 +#define bCCKr_cp_mode0 0x0100
50542 +#define bCCKTxDCOffset 0xf0
50543 +#define bCCKRxDCOffset 0xf
50544 +#define bCCKCCAMode 0xc000
50545 +#define bCCKFalseCS_lim 0x3f00
50546 +#define bCCKCS_ratio 0xc00000
50547 +#define bCCKCorgBit_sel 0x300000
50548 +#define bCCKPD_lim 0x0f0000
50549 +#define bCCKNewCCA 0x80000000
50550 +#define bCCKRxHPofIG 0x8000
50551 +#define bCCKRxIG 0x7f00
50552 +#define bCCKLNAPolarity 0x800000
50553 +#define bCCKRx1stGain 0x7f0000
50554 +#define bCCKRFExtend 0x20000000 //CCK Rx Iinital gain polarity
50555 +#define bCCKRxAGCSatLevel 0x1f000000
50556 +#define bCCKRxAGCSatCount 0xe0
50557 +#define bCCKRxRFSettle 0x1f //AGCsamp_dly
50558 +#define bCCKFixedRxAGC 0x8000
50559 +//#define bCCKRxAGCFormat 0x4000 //remove to HSSI register 0x824
50560 +#define bCCKAntennaPolarity 0x2000
50561 +#define bCCKTxFilterType 0x0c00
50562 +#define bCCKRxAGCReportType 0x0300
50563 +#define bCCKRxDAGCEn 0x80000000
50564 +#define bCCKRxDAGCPeriod 0x20000000
50565 +#define bCCKRxDAGCSatLevel 0x1f000000
50566 +#define bCCKTimingRecovery 0x800000
50567 +#define bCCKTxC0 0x3f0000
50568 +#define bCCKTxC1 0x3f000000
50569 +#define bCCKTxC2 0x3f
50570 +#define bCCKTxC3 0x3f00
50571 +#define bCCKTxC4 0x3f0000
50572 +#define bCCKTxC5 0x3f000000
50573 +#define bCCKTxC6 0x3f
50574 +#define bCCKTxC7 0x3f00
50575 +#define bCCKDebugPort 0xff0000
50576 +#define bCCKDACDebug 0x0f000000
50577 +#define bCCKFalseAlarmEnable 0x8000
50578 +#define bCCKFalseAlarmRead 0x4000
50579 +#define bCCKTRSSI 0x7f
50580 +#define bCCKRxAGCReport 0xfe
50581 +#define bCCKRxReport_AntSel 0x80000000
50582 +#define bCCKRxReport_MFOff 0x40000000
50583 +#define bCCKRxRxReport_SQLoss 0x20000000
50584 +#define bCCKRxReport_Pktloss 0x10000000
50585 +#define bCCKRxReport_Lockedbit 0x08000000
50586 +#define bCCKRxReport_RateError 0x04000000
50587 +#define bCCKRxReport_RxRate 0x03000000
50588 +#define bCCKRxFACounterLower 0xff
50589 +#define bCCKRxFACounterUpper 0xff000000
50590 +#define bCCKRxHPAGCStart 0xe000
50591 +#define bCCKRxHPAGCFinal 0x1c00
50592 +
50593 +#define bCCKRxFalseAlarmEnable 0x8000
50594 +#define bCCKFACounterFreeze 0x4000
50595 +
50596 +#define bCCKTxPathSel 0x10000000
50597 +#define bCCKDefaultRxPath 0xc000000
50598 +#define bCCKOptionRxPath 0x3000000
50599 +
50600 +//page c
50601 +#define bNumOfSTF 0x3
50602 +#define bShift_L 0xc0
50603 +#define bGI_TH 0xc
50604 +#define bRxPathA 0x1
50605 +#define bRxPathB 0x2
50606 +#define bRxPathC 0x4
50607 +#define bRxPathD 0x8
50608 +#define bTxPathA 0x1
50609 +#define bTxPathB 0x2
50610 +#define bTxPathC 0x4
50611 +#define bTxPathD 0x8
50612 +#define bTRSSIFreq 0x200
50613 +#define bADCBackoff 0x3000
50614 +#define bDFIRBackoff 0xc000
50615 +#define bTRSSILatchPhase 0x10000
50616 +#define bRxIDCOffset 0xff
50617 +#define bRxQDCOffset 0xff00
50618 +#define bRxDFIRMode 0x1800000
50619 +#define bRxDCNFType 0xe000000
50620 +#define bRXIQImb_A 0x3ff
50621 +#define bRXIQImb_B 0xfc00
50622 +#define bRXIQImb_C 0x3f0000
50623 +#define bRXIQImb_D 0xffc00000
50624 +#define bDC_dc_Notch 0x60000
50625 +#define bRxNBINotch 0x1f000000
50626 +#define bPD_TH 0xf
50627 +#define bPD_TH_Opt2 0xc000
50628 +#define bPWED_TH 0x700
50629 +#define bIfMF_Win_L 0x800
50630 +#define bPD_Option 0x1000
50631 +#define bMF_Win_L 0xe000
50632 +#define bBW_Search_L 0x30000
50633 +#define bwin_enh_L 0xc0000
50634 +#define bBW_TH 0x700000
50635 +#define bED_TH2 0x3800000
50636 +#define bBW_option 0x4000000
50637 +#define bRatio_TH 0x18000000
50638 +#define bWindow_L 0xe0000000
50639 +#define bSBD_Option 0x1
50640 +#define bFrame_TH 0x1c
50641 +#define bFS_Option 0x60
50642 +#define bDC_Slope_check 0x80
50643 +#define bFGuard_Counter_DC_L 0xe00
50644 +#define bFrame_Weight_Short 0x7000
50645 +#define bSub_Tune 0xe00000
50646 +#define bFrame_DC_Length 0xe000000
50647 +#define bSBD_start_offset 0x30000000
50648 +#define bFrame_TH_2 0x7
50649 +#define bFrame_GI2_TH 0x38
50650 +#define bGI2_Sync_en 0x40
50651 +#define bSarch_Short_Early 0x300
50652 +#define bSarch_Short_Late 0xc00
50653 +#define bSarch_GI2_Late 0x70000
50654 +#define bCFOAntSum 0x1
50655 +#define bCFOAcc 0x2
50656 +#define bCFOStartOffset 0xc
50657 +#define bCFOLookBack 0x70
50658 +#define bCFOSumWeight 0x80
50659 +#define bDAGCEnable 0x10000
50660 +#define bTXIQImb_A 0x3ff
50661 +#define bTXIQImb_B 0xfc00
50662 +#define bTXIQImb_C 0x3f0000
50663 +#define bTXIQImb_D 0xffc00000
50664 +#define bTxIDCOffset 0xff
50665 +#define bTxQDCOffset 0xff00
50666 +#define bTxDFIRMode 0x10000
50667 +#define bTxPesudoNoiseOn 0x4000000
50668 +#define bTxPesudoNoise_A 0xff
50669 +#define bTxPesudoNoise_B 0xff00
50670 +#define bTxPesudoNoise_C 0xff0000
50671 +#define bTxPesudoNoise_D 0xff000000
50672 +#define bCCADropOption 0x20000
50673 +#define bCCADropThres 0xfff00000
50674 +#define bEDCCA_H 0xf
50675 +#define bEDCCA_L 0xf0
50676 +#define bLambda_ED 0x300
50677 +#define bRxInitialGain 0x7f
50678 +#define bRxAntDivEn 0x80
50679 +#define bRxAGCAddressForLNA 0x7f00
50680 +#define bRxHighPowerFlow 0x8000
50681 +#define bRxAGCFreezeThres 0xc0000
50682 +#define bRxFreezeStep_AGC1 0x300000
50683 +#define bRxFreezeStep_AGC2 0xc00000
50684 +#define bRxFreezeStep_AGC3 0x3000000
50685 +#define bRxFreezeStep_AGC0 0xc000000
50686 +#define bRxRssi_Cmp_En 0x10000000
50687 +#define bRxQuickAGCEn 0x20000000
50688 +#define bRxAGCFreezeThresMode 0x40000000
50689 +#define bRxOverFlowCheckType 0x80000000
50690 +#define bRxAGCShift 0x7f
50691 +#define bTRSW_Tri_Only 0x80
50692 +#define bPowerThres 0x300
50693 +#define bRxAGCEn 0x1
50694 +#define bRxAGCTogetherEn 0x2
50695 +#define bRxAGCMin 0x4
50696 +#define bRxHP_Ini 0x7
50697 +#define bRxHP_TRLNA 0x70
50698 +#define bRxHP_RSSI 0x700
50699 +#define bRxHP_BBP1 0x7000
50700 +#define bRxHP_BBP2 0x70000
50701 +#define bRxHP_BBP3 0x700000
50702 +#define bRSSI_H 0x7f0000 //the threshold for high power
50703 +#define bRSSI_Gen 0x7f000000 //the threshold for ant diversity
50704 +#define bRxSettle_TRSW 0x7
50705 +#define bRxSettle_LNA 0x38
50706 +#define bRxSettle_RSSI 0x1c0
50707 +#define bRxSettle_BBP 0xe00
50708 +#define bRxSettle_RxHP 0x7000
50709 +#define bRxSettle_AntSW_RSSI 0x38000
50710 +#define bRxSettle_AntSW 0xc0000
50711 +#define bRxProcessTime_DAGC 0x300000
50712 +#define bRxSettle_HSSI 0x400000
50713 +#define bRxProcessTime_BBPPW 0x800000
50714 +#define bRxAntennaPowerShift 0x3000000
50715 +#define bRSSITableSelect 0xc000000
50716 +#define bRxHP_Final 0x7000000
50717 +#define bRxHTSettle_BBP 0x7
50718 +#define bRxHTSettle_HSSI 0x8
50719 +#define bRxHTSettle_RxHP 0x70
50720 +#define bRxHTSettle_BBPPW 0x80
50721 +#define bRxHTSettle_Idle 0x300
50722 +#define bRxHTSettle_Reserved 0x1c00
50723 +#define bRxHTRxHPEn 0x8000
50724 +#define bRxHTAGCFreezeThres 0x30000
50725 +#define bRxHTAGCTogetherEn 0x40000
50726 +#define bRxHTAGCMin 0x80000
50727 +#define bRxHTAGCEn 0x100000
50728 +#define bRxHTDAGCEn 0x200000
50729 +#define bRxHTRxHP_BBP 0x1c00000
50730 +#define bRxHTRxHP_Final 0xe0000000
50731 +#define bRxPWRatioTH 0x3
50732 +#define bRxPWRatioEn 0x4
50733 +#define bRxMFHold 0x3800
50734 +#define bRxPD_Delay_TH1 0x38
50735 +#define bRxPD_Delay_TH2 0x1c0
50736 +#define bRxPD_DC_COUNT_MAX 0x600
50737 +//#define bRxMF_Hold 0x3800
50738 +#define bRxPD_Delay_TH 0x8000
50739 +#define bRxProcess_Delay 0xf0000
50740 +#define bRxSearchrange_GI2_Early 0x700000
50741 +#define bRxFrame_Guard_Counter_L 0x3800000
50742 +#define bRxSGI_Guard_L 0xc000000
50743 +#define bRxSGI_Search_L 0x30000000
50744 +#define bRxSGI_TH 0xc0000000
50745 +#define bDFSCnt0 0xff
50746 +#define bDFSCnt1 0xff00
50747 +#define bDFSFlag 0xf0000
50748 +
50749 +#define bMFWeightSum 0x300000
50750 +#define bMinIdxTH 0x7f000000
50751 +
50752 +#define bDAFormat 0x40000
50753 +
50754 +#define bTxChEmuEnable 0x01000000
50755 +
50756 +#define bTRSWIsolation_A 0x7f
50757 +#define bTRSWIsolation_B 0x7f00
50758 +#define bTRSWIsolation_C 0x7f0000
50759 +#define bTRSWIsolation_D 0x7f000000
50760 +
50761 +#define bExtLNAGain 0x7c00
50762 +
50763 +//page d
50764 +#define bSTBCEn 0x4
50765 +#define bAntennaMapping 0x10
50766 +#define bNss 0x20
50767 +#define bCFOAntSumD 0x200
50768 +#define bPHYCounterReset 0x8000000
50769 +#define bCFOReportGet 0x4000000
50770 +#define bOFDMContinueTx 0x10000000
50771 +#define bOFDMSingleCarrier 0x20000000
50772 +#define bOFDMSingleTone 0x40000000
50773 +//#define bRxPath1 0x01
50774 +//#define bRxPath2 0x02
50775 +//#define bRxPath3 0x04
50776 +//#define bRxPath4 0x08
50777 +//#define bTxPath1 0x10
50778 +//#define bTxPath2 0x20
50779 +#define bHTDetect 0x100
50780 +#define bCFOEn 0x10000
50781 +#define bCFOValue 0xfff00000
50782 +#define bSigTone_Re 0x3f
50783 +#define bSigTone_Im 0x7f00
50784 +#define bCounter_CCA 0xffff
50785 +#define bCounter_ParityFail 0xffff0000
50786 +#define bCounter_RateIllegal 0xffff
50787 +#define bCounter_CRC8Fail 0xffff0000
50788 +#define bCounter_MCSNoSupport 0xffff
50789 +#define bCounter_FastSync 0xffff
50790 +#define bShortCFO 0xfff
50791 +#define bShortCFOTLength 12 //total
50792 +#define bShortCFOFLength 11 //fraction
50793 +#define bLongCFO 0x7ff
50794 +#define bLongCFOTLength 11
50795 +#define bLongCFOFLength 11
50796 +#define bTailCFO 0x1fff
50797 +#define bTailCFOTLength 13
50798 +#define bTailCFOFLength 12
50799 +
50800 +#define bmax_en_pwdB 0xffff
50801 +#define bCC_power_dB 0xffff0000
50802 +#define bnoise_pwdB 0xffff
50803 +#define bPowerMeasTLength 10
50804 +#define bPowerMeasFLength 3
50805 +#define bRx_HT_BW 0x1
50806 +#define bRxSC 0x6
50807 +#define bRx_HT 0x8
50808 +
50809 +#define bNB_intf_det_on 0x1
50810 +#define bIntf_win_len_cfg 0x30
50811 +#define bNB_Intf_TH_cfg 0x1c0
50812 +
50813 +#define bRFGain 0x3f
50814 +#define bTableSel 0x40
50815 +#define bTRSW 0x80
50816 +
50817 +#define bRxSNR_A 0xff
50818 +#define bRxSNR_B 0xff00
50819 +#define bRxSNR_C 0xff0000
50820 +#define bRxSNR_D 0xff000000
50821 +#define bSNREVMTLength 8
50822 +#define bSNREVMFLength 1
50823 +
50824 +#define bCSI1st 0xff
50825 +#define bCSI2nd 0xff00
50826 +#define bRxEVM1st 0xff0000
50827 +#define bRxEVM2nd 0xff000000
50828 +
50829 +#define bSIGEVM 0xff
50830 +#define bPWDB 0xff00
50831 +#define bSGIEN 0x10000
50832 +
50833 +#define bSFactorQAM1 0xf
50834 +#define bSFactorQAM2 0xf0
50835 +#define bSFactorQAM3 0xf00
50836 +#define bSFactorQAM4 0xf000
50837 +#define bSFactorQAM5 0xf0000
50838 +#define bSFactorQAM6 0xf0000
50839 +#define bSFactorQAM7 0xf00000
50840 +#define bSFactorQAM8 0xf000000
50841 +#define bSFactorQAM9 0xf0000000
50842 +#define bCSIScheme 0x100000
50843 +
50844 +#define bNoiseLvlTopSet 0x3
50845 +#define bChSmooth 0x4
50846 +#define bChSmoothCfg1 0x38
50847 +#define bChSmoothCfg2 0x1c0
50848 +#define bChSmoothCfg3 0xe00
50849 +#define bChSmoothCfg4 0x7000
50850 +#define bMRCMode 0x800000
50851 +#define bTHEVMCfg 0x7000000
50852 +
50853 +#define bLoopFitType 0x1
50854 +#define bUpdCFO 0x40
50855 +#define bUpdCFOOffData 0x80
50856 +#define bAdvUpdCFO 0x100
50857 +#define bAdvTimeCtrl 0x800
50858 +#define bUpdClko 0x1000
50859 +#define bFC 0x6000
50860 +#define bTrackingMode 0x8000
50861 +#define bPhCmpEnable 0x10000
50862 +#define bUpdClkoLTF 0x20000
50863 +#define bComChCFO 0x40000
50864 +#define bCSIEstiMode 0x80000
50865 +#define bAdvUpdEqz 0x100000
50866 +#define bUChCfg 0x7000000
50867 +#define bUpdEqz 0x8000000
50868 +
50869 +//page e
50870 +#define bTxAGCRate18_06 0x7f7f7f7f
50871 +#define bTxAGCRate54_24 0x7f7f7f7f
50872 +#define bTxAGCRateMCS32 0x7f
50873 +#define bTxAGCRateCCK 0x7f00
50874 +#define bTxAGCRateMCS3_MCS0 0x7f7f7f7f
50875 +#define bTxAGCRateMCS7_MCS4 0x7f7f7f7f
50876 +#define bTxAGCRateMCS11_MCS8 0x7f7f7f7f
50877 +#define bTxAGCRateMCS15_MCS12 0x7f7f7f7f
50878 +
50879 +
50880 +//Rx Pseduo noise
50881 +#define bRxPesudoNoiseOn 0x20000000
50882 +#define bRxPesudoNoise_A 0xff
50883 +#define bRxPesudoNoise_B 0xff00
50884 +#define bRxPesudoNoise_C 0xff0000
50885 +#define bRxPesudoNoise_D 0xff000000
50886 +#define bPesudoNoiseState_A 0xffff
50887 +#define bPesudoNoiseState_B 0xffff0000
50888 +#define bPesudoNoiseState_C 0xffff
50889 +#define bPesudoNoiseState_D 0xffff0000
50890 +
50891 +//RF
50892 +//Zebra1
50893 +#define bZebra1_HSSIEnable 0x8
50894 +#define bZebra1_TRxControl 0xc00
50895 +#define bZebra1_TRxGainSetting 0x07f
50896 +#define bZebra1_RxCorner 0xc00
50897 +#define bZebra1_TxChargePump 0x38
50898 +#define bZebra1_RxChargePump 0x7
50899 +#define bZebra1_ChannelNum 0xf80
50900 +#define bZebra1_TxLPFBW 0x400
50901 +#define bZebra1_RxLPFBW 0x600
50902 +
50903 +//Zebra4
50904 +#define bRTL8256RegModeCtrl1 0x100
50905 +#define bRTL8256RegModeCtrl0 0x40
50906 +#define bRTL8256_TxLPFBW 0x18
50907 +#define bRTL8256_RxLPFBW 0x600
50908 +
50909 +//RTL8258
50910 +#define bRTL8258_TxLPFBW 0xc
50911 +#define bRTL8258_RxLPFBW 0xc00
50912 +#define bRTL8258_RSSILPFBW 0xc0
50913 +
50914 +//byte endable for sb_write
50915 +#define bByte0 0x1
50916 +#define bByte1 0x2
50917 +#define bByte2 0x4
50918 +#define bByte3 0x8
50919 +#define bWord0 0x3
50920 +#define bWord1 0xc
50921 +#define bDWord 0xf
50922 +
50923 +//for PutRegsetting & GetRegSetting BitMask
50924 +#define bMaskByte0 0xff
50925 +#define bMaskByte1 0xff00
50926 +#define bMaskByte2 0xff0000
50927 +#define bMaskByte3 0xff000000
50928 +#define bMaskHWord 0xffff0000
50929 +#define bMaskLWord 0x0000ffff
50930 +#define bMaskDWord 0xffffffff
50931 +
50932 +//for PutRFRegsetting & GetRFRegSetting BitMask
50933 +#define bMask12Bits 0xfff
50934 +
50935 +#define bEnable 0x1
50936 +#define bDisable 0x0
50937 +
50938 +#define LeftAntenna 0x0
50939 +#define RightAntenna 0x1
50940 +
50941 +#define tCheckTxStatus 500 //500ms
50942 +#define tUpdateRxCounter 100 //100ms
50943 +
50944 +#define rateCCK 0
50945 +#define rateOFDM 1
50946 +#define rateHT 2
50947 +
50948 +//define Register-End
50949 +#define bPMAC_End 0x1ff
50950 +#define bFPGAPHY0_End 0x8ff
50951 +#define bFPGAPHY1_End 0x9ff
50952 +#define bCCKPHY0_End 0xaff
50953 +#define bOFDMPHY0_End 0xcff
50954 +#define bOFDMPHY1_End 0xdff
50955 +
50956 +//define max debug item in each debug page
50957 +//#define bMaxItem_FPGA_PHY0 0x9
50958 +//#define bMaxItem_FPGA_PHY1 0x3
50959 +//#define bMaxItem_PHY_11B 0x16
50960 +//#define bMaxItem_OFDM_PHY0 0x29
50961 +//#define bMaxItem_OFDM_PHY1 0x0
50962 +
50963 +#define bPMACControl 0x0
50964 +#define bWMACControl 0x1
50965 +#define bWNICControl 0x2
50966 +
50967 +#define PathA 0x0
50968 +#define PathB 0x1
50969 +#define PathC 0x2
50970 +#define PathD 0x3
50971 +
50972 +#define rRTL8256RxMixerPole 0xb
50973 +#define bZebraRxMixerPole 0x6
50974 +#define rRTL8256TxBBOPBias 0x9
50975 +#define bRTL8256TxBBOPBias 0x400
50976 +#define rRTL8256TxBBBW 19
50977 +#define bRTL8256TxBBBW 0x18
50978 +
50979 +#endif //__INC_HAL8190PCIPHYREG_H
50980 --- /dev/null
50981 +++ b/drivers/staging/rtl8192e/r819xP_firmware_img.h
50982 @@ -0,0 +1,3637 @@
50983 +#ifndef __INC_R819XU_FIRMWARE_IMG_H
50984 +#define __INC_R819XU_FIRMWARE_IMG_H
50985 +/*Created on 2008/ 5/19, 6:38*/
50986 +#include <linux/types.h>
50987 +
50988 +u8 rtl8190_fwboot_array[] = {
50989 +0x10,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x3c,0x08,0xbf,0xc0,0x25,0x08,0x00,0x08,
50990 +0x3c,0x09,0xb0,0x03,0xad,0x28,0x00,0x20,0x40,0x80,0x68,0x00,0x00,0x00,0x00,0x00,
50991 +0x3c,0x0a,0xd0,0x00,0x40,0x8a,0x60,0x00,0x00,0x00,0x00,0x00,0x3c,0x08,0x80,0x01,
50992 +0x25,0x08,0xd6,0x04,0x24,0x09,0x00,0x01,0x3c,0x01,0x7f,0xff,0x34,0x21,0xff,0xff,
50993 +0x01,0x01,0x50,0x24,0x00,0x09,0x48,0x40,0x35,0x29,0x00,0x01,0x01,0x2a,0x10,0x2b,
50994 +0x14,0x40,0xff,0xfc,0x00,0x00,0x00,0x00,0x3c,0x0a,0x00,0x00,0x25,0x4a,0x00,0x00,
50995 +0x4c,0x8a,0x00,0x00,0x4c,0x89,0x08,0x00,0x00,0x00,0x00,0x00,0x3c,0x08,0x80,0x01,
50996 +0x25,0x08,0xd6,0x04,0x3c,0x01,0x80,0x00,0x01,0x21,0x48,0x25,0x3c,0x0a,0xbf,0xc0,
50997 +0x25,0x4a,0x00,0x7c,0x3c,0x0b,0xb0,0x03,0xad,0x6a,0x00,0x20,0xad,0x00,0x00,0x00,
50998 +0x21,0x08,0x00,0x04,0x01,0x09,0x10,0x2b,0x14,0x40,0xff,0xf8,0x00,0x00,0x00,0x00,
50999 +0x3c,0x08,0x80,0x01,0x25,0x08,0x7f,0xff,0x24,0x09,0x00,0x01,0x3c,0x01,0x7f,0xff,
51000 +0x34,0x21,0xff,0xff,0x01,0x01,0x50,0x24,0x00,0x09,0x48,0x40,0x35,0x29,0x00,0x01,
51001 +0x01,0x2a,0x10,0x2b,0x14,0x40,0xff,0xfc,0x00,0x00,0x00,0x00,0x3c,0x0a,0x80,0x01,
51002 +0x25,0x4a,0x00,0x00,0x3c,0x01,0x7f,0xff,0x34,0x21,0xff,0xff,0x01,0x41,0x50,0x24,
51003 +0x3c,0x09,0x00,0x01,0x35,0x29,0x7f,0xff,0x4c,0x8a,0x20,0x00,0x4c,0x89,0x28,0x00,
51004 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x24,0x08,0x04,0x10,
51005 +0x00,0x00,0x00,0x00,0x40,0x88,0xa0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
51006 +0x3c,0x08,0xbf,0xc0,0x00,0x00,0x00,0x00,0x8d,0x09,0x00,0x00,0x00,0x00,0x00,0x00,
51007 +0x3c,0x0a,0xbf,0xc0,0x25,0x4a,0x01,0x20,0x3c,0x0b,0xb0,0x03,0xad,0x6a,0x00,0x20,
51008 +0x3c,0x08,0xb0,0x03,0x8d,0x09,0x00,0x00,0x00,0x00,0x00,0x00,0x35,0x29,0x00,0x10,
51009 +0xad,0x09,0x00,0x00,0x00,0x00,0x00,0x00,0x3c,0x08,0x80,0x00,0x25,0x08,0x6a,0xbc,
51010 +0x01,0x00,0x00,0x08,0x00,0x00,0x00,0x00,};
51011 +
51012 +u8 rtl8190_fwmain_array[] = {
51013 +0x40,0x04,0x68,0x00,0x40,0x05,0x70,0x00,0x40,0x06,0x40,0x00,0x0c,0x00,0x1a,0x1e,
51014 +0x00,0x00,0x00,0x00,0x40,0x1a,0x68,0x00,0x33,0x5b,0x00,0x3c,0x17,0x60,0x00,0x09,
51015 +0x00,0x00,0x00,0x00,0x40,0x1b,0x60,0x00,0x00,0x00,0x00,0x00,0x03,0x5b,0xd0,0x24,
51016 +0x40,0x1a,0x70,0x00,0x03,0x40,0x00,0x08,0x42,0x00,0x00,0x10,0x00,0x00,0x00,0x00,
51017 +0x00,0x00,0x00,0x00,0x3c,0x02,0xff,0xff,0x34,0x42,0xff,0xff,0x8c,0x43,0x00,0x00,
51018 +0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x34,0x63,0x00,0x20,0x24,0x42,0x00,0xd0,
51019 +0xac,0x62,0x00,0x00,0x00,0x00,0x20,0x21,0x27,0x85,0x94,0x50,0x00,0x85,0x18,0x21,
51020 +0x24,0x84,0x00,0x01,0x28,0x82,0x00,0x0a,0x14,0x40,0xff,0xfc,0xa0,0x60,0x00,0x00,
51021 +0x27,0x82,0x94,0x5a,0x24,0x04,0x00,0x06,0x24,0x84,0xff,0xff,0xa4,0x40,0x00,0x00,
51022 +0x04,0x81,0xff,0xfd,0x24,0x42,0x00,0x02,0x24,0x02,0x00,0x03,0xa3,0x82,0x94,0x50,
51023 +0x24,0x02,0x00,0x0a,0x24,0x03,0x09,0xc4,0xa3,0x82,0x94,0x52,0x24,0x02,0x00,0x04,
51024 +0x24,0x04,0x00,0x01,0x24,0x05,0x00,0x02,0xa7,0x83,0x94,0x66,0xa3,0x82,0x94,0x58,
51025 +0x24,0x03,0x04,0x00,0x24,0x02,0x02,0x00,0xaf,0x83,0x94,0x6c,0xa3,0x85,0x94,0x59,
51026 +0xa7,0x82,0x94,0x5a,0xa7,0x84,0x94,0x5c,0xaf,0x84,0x94,0x68,0xa3,0x84,0x94,0x51,
51027 +0xa3,0x80,0x94,0x53,0xa3,0x80,0x94,0x54,0xa3,0x80,0x94,0x55,0xa3,0x84,0x94,0x56,
51028 +0xa3,0x85,0x94,0x57,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,
51029 +0x3c,0x02,0x80,0x00,0x24,0x42,0x01,0x7c,0x34,0x63,0x00,0x20,0xac,0x62,0x00,0x00,
51030 +0x27,0x84,0x94,0x78,0x00,0x00,0x10,0x21,0x24,0x42,0x00,0x01,0x00,0x02,0x16,0x00,
51031 +0x00,0x02,0x16,0x03,0x28,0x43,0x00,0x03,0xac,0x80,0xff,0xfc,0xa0,0x80,0x00,0x00,
51032 +0x14,0x60,0xff,0xf9,0x24,0x84,0x00,0x0c,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
51033 +0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x34,0x63,0x00,0x20,0x24,0x42,0x01,0xc0,
51034 +0x3c,0x08,0xb0,0x03,0xac,0x62,0x00,0x00,0x35,0x08,0x00,0x70,0x8d,0x02,0x00,0x00,
51035 +0x00,0xa0,0x48,0x21,0x00,0x04,0x26,0x00,0x00,0x02,0x2a,0x43,0x00,0x06,0x36,0x00,
51036 +0x00,0x07,0x3e,0x00,0x00,0x02,0x12,0x03,0x29,0x23,0x00,0x03,0x00,0x04,0x56,0x03,
51037 +0x00,0x06,0x36,0x03,0x00,0x07,0x3e,0x03,0x30,0x48,0x00,0x01,0x10,0x60,0x00,0x11,
51038 +0x30,0xa5,0x00,0x07,0x24,0x02,0x00,0x02,0x00,0x49,0x10,0x23,0x00,0x45,0x10,0x07,
51039 +0x30,0x42,0x00,0x01,0x10,0x40,0x00,0x66,0x00,0x00,0x00,0x00,0x8f,0xa2,0x00,0x10,
51040 +0x00,0x00,0x00,0x00,0x00,0x02,0x21,0x43,0x11,0x00,0x00,0x10,0x00,0x07,0x20,0x0b,
51041 +0x15,0x20,0x00,0x06,0x24,0x02,0x00,0x01,0x3c,0x02,0xb0,0x05,0x34,0x42,0x01,0x20,
51042 +0xa4,0x44,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x11,0x22,0x00,0x04,
51043 +0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x05,0x08,0x00,0x00,0x94,0x34,0x42,0x01,0x24,
51044 +0x3c,0x02,0xb0,0x05,0x08,0x00,0x00,0x94,0x34,0x42,0x01,0x22,0x15,0x20,0x00,0x54,
51045 +0x24,0x02,0x00,0x01,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x74,0x90,0x43,0x00,0x00,
51046 +0x00,0x00,0x00,0x00,0xaf,0x83,0x94,0x74,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x70,
51047 +0x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x6b,0x00,0x08,0x11,0x60,0x00,0x18,
51048 +0x00,0x09,0x28,0x40,0x00,0x00,0x40,0x21,0x27,0x85,0x94,0x70,0x8c,0xa3,0x00,0x00,
51049 +0x8c,0xa2,0x00,0x04,0x00,0x00,0x00,0x00,0x00,0x62,0x38,0x23,0x00,0x43,0x10,0x2a,
51050 +0x10,0x40,0x00,0x3d,0x00,0x00,0x00,0x00,0xac,0xa7,0x00,0x00,0x25,0x02,0x00,0x01,
51051 +0x00,0x02,0x16,0x00,0x00,0x02,0x46,0x03,0x29,0x03,0x00,0x03,0x14,0x60,0xff,0xf3,
51052 +0x24,0xa5,0x00,0x0c,0x3c,0x03,0xb0,0x03,0x34,0x63,0x00,0x70,0x90,0x62,0x00,0x00,
51053 +0x00,0x00,0x00,0x00,0x00,0x4b,0x10,0x23,0xa0,0x62,0x00,0x00,0x00,0x09,0x28,0x40,
51054 +0x00,0xa9,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x83,0x94,0x78,0x00,0x0a,0x20,0x0b,
51055 +0x00,0x43,0x18,0x21,0x10,0xc0,0x00,0x05,0x00,0x00,0x38,0x21,0x80,0x62,0x00,0x01,
51056 +0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x05,0x00,0x00,0x00,0x00,0x80,0x62,0x00,0x00,
51057 +0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x03,0x00,0xa9,0x10,0x21,0x24,0x07,0x00,0x01,
51058 +0x00,0xa9,0x10,0x21,0x00,0x02,0x30,0x80,0x27,0x82,0x94,0x78,0xa0,0x67,0x00,0x01,
51059 +0x00,0xc2,0x38,0x21,0x80,0xe3,0x00,0x01,0x00,0x00,0x00,0x00,0x10,0x60,0x00,0x07,
51060 +0x00,0x00,0x00,0x00,0x27,0x83,0x94,0x70,0x00,0xc3,0x18,0x21,0x8c,0x62,0x00,0x00,
51061 +0x00,0x00,0x00,0x00,0x00,0x44,0x10,0x21,0xac,0x62,0x00,0x00,0x27,0x85,0x94,0x74,
51062 +0x27,0x82,0x94,0x70,0x00,0xc5,0x28,0x21,0x00,0xc2,0x10,0x21,0x8c,0x43,0x00,0x00,
51063 +0x8c,0xa4,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x64,0x18,0x2a,0x14,0x60,0x00,0x03,
51064 +0x24,0x02,0x00,0x01,0x03,0xe0,0x00,0x08,0xa0,0xe2,0x00,0x00,0xa0,0xe0,0x00,0x00,
51065 +0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x08,0x00,0x00,0xb7,0xac,0xa0,0x00,0x00,
51066 +0x11,0x22,0x00,0x08,0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x7c,
51067 +0x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0xaf,0x83,0x94,0x8c,0x08,0x00,0x00,0xa7,
51068 +0x3c,0x02,0xb0,0x03,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x78,0x90,0x43,0x00,0x00,
51069 +0x00,0x00,0x00,0x00,0xaf,0x83,0x94,0x80,0x08,0x00,0x00,0xa7,0x3c,0x02,0xb0,0x03,
51070 +0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x34,0x63,0x00,0x20,0x24,0x42,0x04,0x10,
51071 +0x3c,0x05,0xb0,0x03,0xac,0x62,0x00,0x00,0x34,0xa5,0x00,0x70,0x8c,0xa2,0x00,0x00,
51072 +0x90,0x84,0x00,0x08,0x3c,0x06,0xb0,0x03,0x00,0x02,0x16,0x00,0x2c,0x83,0x00,0x03,
51073 +0x34,0xc6,0x00,0x72,0x24,0x07,0x00,0x01,0x10,0x60,0x00,0x11,0x00,0x02,0x2f,0xc2,
51074 +0x90,0xc2,0x00,0x00,0x00,0x00,0x18,0x21,0x00,0x02,0x16,0x00,0x10,0xa7,0x00,0x09,
51075 +0x00,0x02,0x16,0x03,0x14,0x80,0x00,0x0c,0x30,0x43,0x00,0x03,0x83,0x82,0x94,0x78,
51076 +0x00,0x00,0x00,0x00,0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x00,0x02,0x16,0x00,
51077 +0x00,0x02,0x1e,0x03,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x72,0xa0,0x43,0x00,0x00,
51078 +0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x30,0x45,0x00,0x05,0x10,0x87,0x00,0x04,
51079 +0x30,0x43,0x00,0x06,0x93,0x82,0x94,0x90,0x08,0x00,0x01,0x1f,0x00,0x43,0x10,0x21,
51080 +0x83,0x82,0x94,0x84,0x00,0x00,0x00,0x00,0x00,0x02,0x10,0x40,0x08,0x00,0x01,0x1f,
51081 +0x00,0x45,0x10,0x21,0x10,0x80,0x00,0x05,0x00,0x00,0x18,0x21,0x24,0x63,0x00,0x01,
51082 +0x00,0x64,0x10,0x2b,0x14,0x40,0xff,0xfd,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,
51083 +0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x24,0x42,0x04,0xe4,
51084 +0x3c,0x04,0xb0,0x02,0x34,0x63,0x00,0x20,0xac,0x62,0x00,0x00,0x34,0x84,0x00,0x08,
51085 +0x24,0x02,0x00,0x01,0xaf,0x84,0x94,0xa0,0xa3,0x82,0x94,0xb0,0xa7,0x80,0x94,0xa4,
51086 +0xa7,0x80,0x94,0xa6,0xaf,0x80,0x94,0xa8,0xaf,0x80,0x94,0xac,0x03,0xe0,0x00,0x08,
51087 +0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x34,0x63,0x00,0x20,
51088 +0x24,0x42,0x05,0x24,0x3c,0x04,0xb0,0x03,0xac,0x62,0x00,0x00,0x34,0x84,0x00,0xac,
51089 +0x80,0xa2,0x00,0x15,0x8c,0x83,0x00,0x00,0x27,0xbd,0xff,0xf0,0x00,0x43,0x10,0x21,
51090 +0xac,0x82,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x10,0x3c,0x02,0xb0,0x03,
51091 +0x3c,0x03,0x80,0x00,0x34,0x42,0x00,0x20,0x24,0x63,0x05,0x5c,0x27,0xbd,0xff,0xe0,
51092 +0xac,0x43,0x00,0x00,0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x18,
51093 +0x8f,0x90,0x94,0xa0,0x0c,0x00,0x02,0x90,0x00,0x80,0x88,0x21,0x14,0x40,0x00,0x2a,
51094 +0x3c,0x02,0x00,0x80,0x16,0x20,0x00,0x02,0x34,0x42,0x02,0x01,0x24,0x02,0x02,0x01,
51095 +0xae,0x02,0x00,0x00,0x97,0x84,0x94,0xa4,0x97,0x82,0x94,0xa6,0x3c,0x03,0xb0,0x02,
51096 +0x00,0x83,0x20,0x21,0x24,0x42,0x00,0x04,0xa7,0x82,0x94,0xa6,0xa4,0x82,0x00,0x00,
51097 +0x8f,0x84,0x94,0xa8,0x8f,0x82,0x94,0xa0,0x93,0x85,0x94,0x52,0x24,0x84,0x00,0x01,
51098 +0x24,0x42,0x00,0x04,0x24,0x03,0x8f,0xff,0x3c,0x07,0xb0,0x06,0x3c,0x06,0xb0,0x03,
51099 +0x00,0x43,0x10,0x24,0x00,0x85,0x28,0x2a,0x34,0xe7,0x80,0x18,0xaf,0x82,0x94,0xa0,
51100 +0xaf,0x84,0x94,0xa8,0x10,0xa0,0x00,0x08,0x34,0xc6,0x01,0x08,0x8f,0x83,0x94,0xac,
51101 +0x8f,0x84,0x94,0x6c,0x8c,0xc2,0x00,0x00,0x00,0x64,0x18,0x21,0x00,0x43,0x10,0x2b,
51102 +0x14,0x40,0x00,0x09,0x00,0x00,0x00,0x00,0x8c,0xe2,0x00,0x00,0x3c,0x03,0x0f,0x00,
51103 +0x3c,0x04,0x04,0x00,0x00,0x43,0x10,0x24,0x10,0x44,0x00,0x03,0x00,0x00,0x00,0x00,
51104 +0x0c,0x00,0x04,0x8e,0x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x18,0x7b,0xb0,0x00,0xbc,
51105 +0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x27,0xbd,0xff,0xd8,0x3c,0x02,0xb0,0x03,
51106 +0x3c,0x03,0x80,0x00,0x24,0x63,0x06,0x48,0xaf,0xb0,0x00,0x10,0x34,0x42,0x00,0x20,
51107 +0x8f,0x90,0x94,0xa0,0xac,0x43,0x00,0x00,0xaf,0xb3,0x00,0x1c,0xaf,0xb2,0x00,0x18,
51108 +0xaf,0xb1,0x00,0x14,0xaf,0xbf,0x00,0x20,0x00,0x80,0x88,0x21,0x00,0xa0,0x90,0x21,
51109 +0x0c,0x00,0x02,0x90,0x00,0xc0,0x98,0x21,0x24,0x07,0x8f,0xff,0x14,0x40,0x00,0x19,
51110 +0x26,0x03,0x00,0x04,0x24,0x02,0x0e,0x03,0xae,0x02,0x00,0x00,0x00,0x67,0x80,0x24,
51111 +0x26,0x02,0x00,0x04,0xae,0x11,0x00,0x00,0x00,0x47,0x80,0x24,0x97,0x86,0x94,0xa4,
51112 +0x26,0x03,0x00,0x04,0xae,0x12,0x00,0x00,0x00,0x67,0x80,0x24,0xae,0x13,0x00,0x00,
51113 +0x8f,0x84,0x94,0xa0,0x3c,0x02,0xb0,0x02,0x97,0x85,0x94,0xa6,0x00,0xc2,0x30,0x21,
51114 +0x8f,0x82,0x94,0xa8,0x24,0x84,0x00,0x10,0x24,0xa5,0x00,0x10,0x00,0x87,0x20,0x24,
51115 +0x24,0x42,0x00,0x01,0xa7,0x85,0x94,0xa6,0xaf,0x84,0x94,0xa0,0xaf,0x82,0x94,0xa8,
51116 +0xa4,0xc5,0x00,0x00,0x8f,0xbf,0x00,0x20,0x7b,0xb2,0x00,0xfc,0x7b,0xb0,0x00,0xbc,
51117 +0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x28,0x27,0xbd,0xff,0xe8,0xaf,0xbf,0x00,0x10,
51118 +0x94,0x82,0x00,0x04,0x00,0x00,0x00,0x00,0x30,0x42,0xe0,0x00,0x14,0x40,0x00,0x14,
51119 +0x00,0x00,0x00,0x00,0x90,0x82,0x00,0x02,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xfc,
51120 +0x00,0x82,0x28,0x21,0x8c,0xa4,0x00,0x00,0x3c,0x02,0x00,0x70,0x8c,0xa6,0x00,0x08,
51121 +0x00,0x82,0x10,0x21,0x2c,0x43,0x00,0x06,0x10,0x60,0x00,0x09,0x3c,0x03,0x80,0x01,
51122 +0x00,0x02,0x10,0x80,0x24,0x63,0x08,0x94,0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x00,
51123 +0x00,0x00,0x00,0x00,0x00,0x80,0x00,0x08,0x00,0x00,0x00,0x00,0xaf,0x86,0x80,0x14,
51124 +0x8f,0xbf,0x00,0x10,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,
51125 +0x8c,0xa4,0x00,0x00,0x0c,0x00,0x1e,0xfc,0x00,0x00,0x00,0x00,0x08,0x00,0x01,0xdc,
51126 +0x00,0x00,0x00,0x00,0x0c,0x00,0x2b,0x59,0x00,0xc0,0x20,0x21,0x08,0x00,0x01,0xdc,
51127 +0x00,0x00,0x00,0x00,0x87,0x83,0x88,0x06,0x93,0x82,0x80,0x18,0x00,0x00,0x00,0x00,
51128 +0x10,0x62,0x00,0x08,0x00,0x00,0x00,0x00,0x93,0x83,0x88,0x07,0x24,0x02,0x00,0x01,
51129 +0xa3,0x82,0x80,0x11,0xa3,0x83,0x80,0x19,0xa3,0x83,0x80,0x18,0x03,0xe0,0x00,0x08,
51130 +0x00,0x00,0x00,0x00,0x93,0x82,0x80,0x19,0x00,0x00,0x00,0x00,0x14,0x62,0xff,0xf6,
51131 +0x00,0x00,0x00,0x00,0x08,0x00,0x01,0xf3,0x00,0x00,0x00,0x00,0x30,0x84,0x00,0xff,
51132 +0x14,0x80,0x00,0x2f,0x00,0x00,0x00,0x00,0x8f,0x82,0x80,0x14,0xa3,0x85,0x8b,0xcb,
51133 +0x10,0x40,0x00,0x2b,0x2c,0xa2,0x00,0x04,0x14,0x40,0x00,0x06,0x00,0x05,0x10,0x40,
51134 +0x24,0xa2,0xff,0xfc,0x2c,0x42,0x00,0x08,0x10,0x40,0x00,0x09,0x24,0xa2,0xff,0xf0,
51135 +0x00,0x05,0x10,0x40,0x27,0x84,0x8b,0xd4,0x00,0x44,0x10,0x21,0x94,0x43,0x00,0x00,
51136 +0x00,0x00,0x00,0x00,0x24,0x63,0x00,0x01,0x03,0xe0,0x00,0x08,0xa4,0x43,0x00,0x00,
51137 +0x2c,0x42,0x00,0x10,0x14,0x40,0x00,0x0a,0x00,0x05,0x10,0x40,0x24,0xa2,0xff,0xe0,
51138 +0x2c,0x42,0x00,0x10,0x14,0x40,0x00,0x06,0x00,0x05,0x10,0x40,0x24,0xa2,0xff,0xd0,
51139 +0x2c,0x42,0x00,0x10,0x10,0x40,0x00,0x09,0x24,0xa2,0xff,0xc0,0x00,0x05,0x10,0x40,
51140 +0x27,0x84,0x8b,0xd4,0x00,0x44,0x10,0x21,0x94,0x43,0xff,0xf8,0x00,0x00,0x00,0x00,
51141 +0x24,0x63,0x00,0x01,0x03,0xe0,0x00,0x08,0xa4,0x43,0xff,0xf8,0x2c,0x42,0x00,0x10,
51142 +0x10,0x40,0x00,0x07,0x00,0x05,0x10,0x40,0x27,0x84,0x8b,0xd4,0x00,0x44,0x10,0x21,
51143 +0x94,0x43,0xff,0xf8,0x00,0x00,0x00,0x00,0x24,0x63,0x00,0x01,0xa4,0x43,0xff,0xf8,
51144 +0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x8f,0x86,0x94,0xa0,0x8f,0x82,0x80,0x14,
51145 +0x27,0xbd,0xff,0xe8,0xaf,0xbf,0x00,0x10,0x10,0x40,0x00,0x2a,0x00,0xc0,0x38,0x21,
51146 +0x24,0x02,0x00,0x07,0x24,0x03,0xff,0x9c,0xa3,0x82,0x8b,0xd3,0xa3,0x83,0x8b,0xd2,
51147 +0x27,0x8a,0x8b,0xd0,0x00,0x00,0x20,0x21,0x24,0x09,0x8f,0xff,0x00,0x04,0x10,0x80,
51148 +0x00,0x4a,0x28,0x21,0x8c,0xa2,0x00,0x00,0x24,0xe3,0x00,0x04,0x24,0x88,0x00,0x01,
51149 +0xac,0xe2,0x00,0x00,0x10,0x80,0x00,0x02,0x00,0x69,0x38,0x24,0xac,0xa0,0x00,0x00,
51150 +0x31,0x04,0x00,0xff,0x2c,0x82,0x00,0x27,0x14,0x40,0xff,0xf5,0x00,0x04,0x10,0x80,
51151 +0x97,0x83,0x94,0xa6,0x97,0x85,0x94,0xa4,0x3c,0x02,0xb0,0x02,0x24,0x63,0x00,0x9c,
51152 +0x00,0xa2,0x28,0x21,0x3c,0x04,0xb0,0x06,0xa7,0x83,0x94,0xa6,0x34,0x84,0x80,0x18,
51153 +0xa4,0xa3,0x00,0x00,0x8c,0x85,0x00,0x00,0x24,0x02,0x8f,0xff,0x24,0xc6,0x00,0x9c,
51154 +0x3c,0x03,0x0f,0x00,0x00,0xc2,0x30,0x24,0x00,0xa3,0x28,0x24,0x3c,0x02,0x04,0x00,
51155 +0xaf,0x86,0x94,0xa0,0x10,0xa2,0x00,0x03,0x00,0x00,0x00,0x00,0x0c,0x00,0x04,0x8e,
51156 +0x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x10,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,
51157 +0x27,0xbd,0x00,0x18,0x8f,0x86,0x94,0xa0,0x27,0xbd,0xff,0xc8,0x24,0x02,0x00,0x08,
51158 +0x24,0x03,0x00,0x20,0xaf,0xbf,0x00,0x30,0xa3,0xa2,0x00,0x13,0xa3,0xa3,0x00,0x12,
51159 +0xa7,0xa4,0x00,0x10,0x00,0xc0,0x28,0x21,0x27,0xa9,0x00,0x10,0x00,0x00,0x38,0x21,
51160 +0x24,0x08,0x8f,0xff,0x00,0x07,0x10,0x80,0x00,0x49,0x10,0x21,0x8c,0x44,0x00,0x00,
51161 +0x24,0xe3,0x00,0x01,0x30,0x67,0x00,0xff,0x24,0xa2,0x00,0x04,0x2c,0xe3,0x00,0x08,
51162 +0xac,0xa4,0x00,0x00,0x14,0x60,0xff,0xf7,0x00,0x48,0x28,0x24,0x97,0x83,0x94,0xa6,
51163 +0x97,0x85,0x94,0xa4,0x3c,0x02,0xb0,0x02,0x24,0x63,0x00,0x20,0x00,0xa2,0x28,0x21,
51164 +0x3c,0x04,0xb0,0x06,0xa7,0x83,0x94,0xa6,0x34,0x84,0x80,0x18,0xa4,0xa3,0x00,0x00,
51165 +0x8c,0x85,0x00,0x00,0x24,0x02,0x8f,0xff,0x24,0xc6,0x00,0x20,0x3c,0x03,0x0f,0x00,
51166 +0x00,0xc2,0x30,0x24,0x00,0xa3,0x28,0x24,0x3c,0x02,0x04,0x00,0xaf,0x86,0x94,0xa0,
51167 +0x10,0xa2,0x00,0x03,0x00,0x00,0x00,0x00,0x0c,0x00,0x04,0x8e,0x00,0x00,0x00,0x00,
51168 +0x8f,0xbf,0x00,0x30,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x38,
51169 +0x93,0x82,0x94,0xb0,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x11,0x24,0x06,0x00,0x01,
51170 +0x8f,0x82,0x94,0xa8,0x3c,0x05,0xb0,0x06,0x3c,0x04,0xb0,0x03,0x34,0xa5,0x80,0x18,
51171 +0x34,0x84,0x01,0x08,0x14,0x40,0x00,0x09,0x00,0x00,0x30,0x21,0x97,0x82,0x94,0xa4,
51172 +0x8c,0x84,0x00,0x00,0x3c,0x03,0xb0,0x02,0x00,0x43,0x10,0x21,0xaf,0x84,0x94,0xac,
51173 +0xa7,0x80,0x94,0xa6,0xac,0x40,0x00,0x00,0xac,0x40,0x00,0x04,0x8c,0xa2,0x00,0x00,
51174 +0x03,0xe0,0x00,0x08,0x00,0xc0,0x10,0x21,0x8f,0x86,0x94,0xa0,0x8f,0x82,0x94,0xa8,
51175 +0x27,0xbd,0xff,0xe8,0xaf,0xbf,0x00,0x10,0x00,0xc0,0x40,0x21,0x14,0x40,0x00,0x0a,
51176 +0x00,0x40,0x50,0x21,0x00,0x00,0x38,0x21,0x27,0x89,0x8b,0xa0,0x24,0xe2,0x00,0x01,
51177 +0x00,0x07,0x18,0x80,0x30,0x47,0x00,0xff,0x00,0x69,0x18,0x21,0x2c,0xe2,0x00,0x0a,
51178 +0x14,0x40,0xff,0xfa,0xac,0x60,0x00,0x00,0x3c,0x02,0x00,0x80,0x10,0x82,0x00,0x6f,
51179 +0x00,0x00,0x00,0x00,0x97,0x82,0x8b,0xa6,0x00,0x00,0x00,0x00,0x24,0x42,0x00,0x01,
51180 +0xa7,0x82,0x8b,0xa6,0x90,0xa3,0x00,0x15,0x97,0x82,0x8b,0xa8,0x00,0x03,0x1e,0x00,
51181 +0x00,0x03,0x1e,0x03,0x00,0x43,0x10,0x21,0xa7,0x82,0x8b,0xa8,0x8c,0xa4,0x00,0x20,
51182 +0x3c,0x02,0x00,0x60,0x3c,0x03,0x00,0x20,0x00,0x82,0x20,0x24,0x10,0x83,0x00,0x54,
51183 +0x00,0x00,0x00,0x00,0x14,0x80,0x00,0x47,0x00,0x00,0x00,0x00,0x97,0x82,0x8b,0xac,
51184 +0x00,0x00,0x00,0x00,0x24,0x42,0x00,0x01,0xa7,0x82,0x8b,0xac,0x84,0xa3,0x00,0x06,
51185 +0x8f,0x82,0x8b,0xbc,0x00,0x00,0x00,0x00,0x00,0x43,0x10,0x21,0xaf,0x82,0x8b,0xbc,
51186 +0x25,0x42,0x00,0x01,0x28,0x43,0x27,0x10,0xaf,0x82,0x94,0xa8,0x10,0x60,0x00,0x09,
51187 +0x24,0x02,0x00,0x04,0x93,0x83,0x80,0x11,0x24,0x02,0x00,0x01,0x10,0x62,0x00,0x05,
51188 +0x24,0x02,0x00,0x04,0x8f,0xbf,0x00,0x10,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,
51189 +0x27,0xbd,0x00,0x18,0x24,0x03,0x00,0x28,0xa3,0x83,0x8b,0xa2,0xa3,0x82,0x8b,0xa3,
51190 +0x90,0xa2,0x00,0x18,0x93,0x83,0x8b,0xcb,0x00,0x00,0x38,0x21,0x00,0x02,0x16,0x00,
51191 +0x00,0x02,0x16,0x03,0xa7,0x82,0x8b,0xb6,0xa3,0x83,0x8b,0xc4,0x27,0x89,0x8b,0xa0,
51192 +0x24,0x05,0x8f,0xff,0x00,0x07,0x10,0x80,0x00,0x49,0x10,0x21,0x8c,0x44,0x00,0x00,
51193 +0x24,0xe3,0x00,0x01,0x30,0x67,0x00,0xff,0x25,0x02,0x00,0x04,0x2c,0xe3,0x00,0x0a,
51194 +0xad,0x04,0x00,0x00,0x14,0x60,0xff,0xf7,0x00,0x45,0x40,0x24,0x97,0x83,0x94,0xa6,
51195 +0x97,0x85,0x94,0xa4,0x3c,0x02,0xb0,0x02,0x24,0x63,0x00,0x28,0x00,0xa2,0x28,0x21,
51196 +0x3c,0x04,0xb0,0x06,0xa7,0x83,0x94,0xa6,0x34,0x84,0x80,0x18,0xa4,0xa3,0x00,0x00,
51197 +0x8c,0x85,0x00,0x00,0x24,0x02,0x8f,0xff,0x24,0xc6,0x00,0x28,0x3c,0x03,0x0f,0x00,
51198 +0x00,0xc2,0x30,0x24,0x00,0xa3,0x28,0x24,0x3c,0x02,0x04,0x00,0xaf,0x86,0x94,0xa0,
51199 +0x10,0xa2,0x00,0x03,0x00,0x00,0x00,0x00,0x0c,0x00,0x04,0x8e,0x00,0x00,0x00,0x00,
51200 +0x0c,0x00,0x02,0x2e,0x00,0x00,0x00,0x00,0xa3,0x80,0x80,0x11,0x08,0x00,0x02,0xdd,
51201 +0x00,0x00,0x00,0x00,0x97,0x82,0x8b,0xae,0x00,0x00,0x00,0x00,0x24,0x42,0x00,0x01,
51202 +0xa7,0x82,0x8b,0xae,0x84,0xa3,0x00,0x06,0x8f,0x82,0x8b,0xc0,0x00,0x00,0x00,0x00,
51203 +0x00,0x43,0x10,0x21,0xaf,0x82,0x8b,0xc0,0x08,0x00,0x02,0xd5,0x25,0x42,0x00,0x01,
51204 +0x97,0x82,0x8b,0xaa,0x00,0x00,0x00,0x00,0x24,0x42,0x00,0x01,0xa7,0x82,0x8b,0xaa,
51205 +0x84,0xa3,0x00,0x06,0x8f,0x82,0x8b,0xb8,0x00,0x00,0x00,0x00,0x00,0x43,0x10,0x21,
51206 +0xaf,0x82,0x8b,0xb8,0x08,0x00,0x02,0xd5,0x25,0x42,0x00,0x01,0x97,0x82,0x8b,0xa4,
51207 +0x00,0x00,0x00,0x00,0x24,0x42,0x00,0x01,0xa7,0x82,0x8b,0xa4,0x08,0x00,0x02,0xbd,
51208 +0x00,0x00,0x00,0x00,0x27,0xbd,0xff,0xd0,0xaf,0xbf,0x00,0x28,0x8c,0xa3,0x00,0x20,
51209 +0x8f,0x8a,0x94,0xa0,0x3c,0x02,0x00,0x10,0x00,0x62,0x10,0x24,0x00,0xa0,0x38,0x21,
51210 +0x01,0x40,0x48,0x21,0x10,0x40,0x00,0x3d,0x00,0x80,0x28,0x21,0x8c,0xe4,0x00,0x1c,
51211 +0x34,0xa5,0x12,0x06,0xaf,0xa5,0x00,0x10,0x8c,0x82,0x00,0x08,0x00,0x03,0x1c,0x42,
51212 +0x30,0x63,0x00,0x30,0x00,0x02,0x13,0x02,0x30,0x42,0x00,0x40,0x00,0x43,0x10,0x25,
51213 +0x90,0xe6,0x00,0x10,0x90,0xe4,0x00,0x13,0x94,0xe8,0x00,0x0c,0x94,0xe3,0x00,0x1a,
51214 +0x00,0x02,0x16,0x00,0x90,0xe7,0x00,0x12,0x00,0xa2,0x28,0x25,0x24,0x02,0x12,0x34,
51215 +0xa7,0xa2,0x00,0x1c,0x24,0x02,0x56,0x78,0xaf,0xa5,0x00,0x10,0xa3,0xa6,0x00,0x18,
51216 +0xa3,0xa7,0x00,0x1f,0xa7,0xa3,0x00,0x1a,0xa3,0xa4,0x00,0x19,0xa7,0xa8,0x00,0x20,
51217 +0xa7,0xa2,0x00,0x22,0x00,0x00,0x28,0x21,0x27,0xa7,0x00,0x10,0x24,0x06,0x8f,0xff,
51218 +0x00,0x05,0x10,0x80,0x00,0x47,0x10,0x21,0x8c,0x44,0x00,0x00,0x24,0xa3,0x00,0x01,
51219 +0x30,0x65,0x00,0xff,0x25,0x22,0x00,0x04,0x2c,0xa3,0x00,0x05,0xad,0x24,0x00,0x00,
51220 +0x14,0x60,0xff,0xf7,0x00,0x46,0x48,0x24,0x97,0x83,0x94,0xa6,0x97,0x85,0x94,0xa4,
51221 +0x3c,0x02,0xb0,0x02,0x24,0x63,0x00,0x14,0x00,0xa2,0x28,0x21,0x3c,0x04,0xb0,0x06,
51222 +0xa7,0x83,0x94,0xa6,0x34,0x84,0x80,0x18,0xa4,0xa3,0x00,0x00,0x8c,0x85,0x00,0x00,
51223 +0x24,0x02,0x8f,0xff,0x25,0x46,0x00,0x14,0x3c,0x03,0x0f,0x00,0x00,0xc2,0x50,0x24,
51224 +0x00,0xa3,0x28,0x24,0x3c,0x02,0x04,0x00,0xaf,0x8a,0x94,0xa0,0x10,0xa2,0x00,0x03,
51225 +0x00,0x00,0x00,0x00,0x0c,0x00,0x04,0x8e,0x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x28,
51226 +0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x30,0x3c,0x05,0xb0,0x03,
51227 +0x3c,0x02,0x80,0x00,0x27,0xbd,0xff,0xc8,0x00,0x04,0x22,0x00,0x34,0xa5,0x00,0x20,
51228 +0x24,0x42,0x0d,0xdc,0x3c,0x03,0xb0,0x00,0xaf,0xb5,0x00,0x24,0xaf,0xb4,0x00,0x20,
51229 +0xaf,0xb2,0x00,0x18,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x30,0x00,0x83,0x80,0x21,
51230 +0xaf,0xb7,0x00,0x2c,0xaf,0xb6,0x00,0x28,0xaf,0xb3,0x00,0x1c,0xaf,0xb1,0x00,0x14,
51231 +0xac,0xa2,0x00,0x00,0x8e,0x09,0x00,0x00,0x00,0x00,0x90,0x21,0x26,0x10,0x00,0x08,
51232 +0x00,0x09,0xa6,0x02,0x12,0x80,0x00,0x13,0x00,0x00,0xa8,0x21,0x24,0x13,0x00,0x02,
51233 +0x3c,0x16,0x00,0xff,0x3c,0x17,0xff,0x00,0x8e,0x09,0x00,0x00,0x00,0x00,0x00,0x00,
51234 +0x00,0x09,0x12,0x02,0x24,0x42,0x00,0x02,0x31,0x25,0x00,0xff,0x10,0xb3,0x00,0x76,
51235 +0x30,0x51,0x00,0xff,0x24,0x02,0x00,0x03,0x10,0xa2,0x00,0x18,0x00,0x00,0x00,0x00,
51236 +0x02,0x51,0x10,0x21,0x30,0x52,0xff,0xff,0x02,0x54,0x18,0x2b,0x14,0x60,0xff,0xf2,
51237 +0x02,0x11,0x80,0x21,0x12,0xa0,0x00,0x0a,0x3c,0x02,0xb0,0x06,0x34,0x42,0x80,0x18,
51238 +0x8c,0x43,0x00,0x00,0x3c,0x04,0x0f,0x00,0x3c,0x02,0x04,0x00,0x00,0x64,0x18,0x24,
51239 +0x10,0x62,0x00,0x03,0x00,0x00,0x00,0x00,0x0c,0x00,0x04,0x8e,0x00,0x00,0x00,0x00,
51240 +0x8f,0xbf,0x00,0x30,0x7b,0xb6,0x01,0x7c,0x7b,0xb4,0x01,0x3c,0x7b,0xb2,0x00,0xfc,
51241 +0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x38,0x8e,0x09,0x00,0x04,
51242 +0x24,0x15,0x00,0x01,0x8e,0x06,0x00,0x0c,0x00,0x09,0x11,0x42,0x00,0x09,0x18,0xc2,
51243 +0x30,0x48,0x00,0x03,0x00,0x09,0x14,0x02,0x30,0x6c,0x00,0x03,0x00,0x09,0x26,0x02,
51244 +0x11,0x15,0x00,0x45,0x30,0x43,0x00,0x0f,0x29,0x02,0x00,0x02,0x14,0x40,0x00,0x26,
51245 +0x00,0x00,0x00,0x00,0x11,0x13,0x00,0x0f,0x00,0x00,0x38,0x21,0x00,0x07,0x22,0x02,
51246 +0x30,0x84,0xff,0x00,0x3c,0x03,0x00,0xff,0x00,0x07,0x2e,0x02,0x00,0x07,0x12,0x00,
51247 +0x00,0x43,0x10,0x24,0x00,0xa4,0x28,0x25,0x00,0xa2,0x28,0x25,0x00,0x07,0x1e,0x00,
51248 +0x00,0xa3,0x28,0x25,0x0c,0x00,0x01,0x92,0x01,0x20,0x20,0x21,0x08,0x00,0x03,0x9d,
51249 +0x02,0x51,0x10,0x21,0x11,0x95,0x00,0x0f,0x00,0x00,0x00,0x00,0x11,0x88,0x00,0x07,
51250 +0x00,0x00,0x00,0x00,0x00,0x04,0x10,0x80,0x27,0x83,0x94,0x50,0x00,0x43,0x10,0x21,
51251 +0x8c,0x47,0x00,0x18,0x08,0x00,0x03,0xc4,0x00,0x07,0x22,0x02,0x00,0x04,0x10,0x40,
51252 +0x27,0x83,0x94,0x58,0x00,0x43,0x10,0x21,0x94,0x47,0x00,0x02,0x08,0x00,0x03,0xc4,
51253 +0x00,0x07,0x22,0x02,0x27,0x82,0x94,0x50,0x00,0x82,0x10,0x21,0x90,0x47,0x00,0x00,
51254 +0x08,0x00,0x03,0xc4,0x00,0x07,0x22,0x02,0x15,0x00,0xff,0xdc,0x00,0x00,0x38,0x21,
51255 +0x10,0x75,0x00,0x05,0x00,0x80,0x38,0x21,0x00,0x65,0x18,0x26,0x24,0x82,0x01,0x00,
51256 +0x00,0x00,0x38,0x21,0x00,0x43,0x38,0x0a,0x24,0x02,0x00,0x01,0x11,0x82,0x00,0x0e,
51257 +0x3c,0x02,0xb0,0x03,0x24,0x02,0x00,0x02,0x11,0x82,0x00,0x06,0x00,0x00,0x00,0x00,
51258 +0x3c,0x02,0xb0,0x03,0x00,0xe2,0x10,0x21,0x8c,0x47,0x00,0x00,0x08,0x00,0x03,0xc4,
51259 +0x00,0x07,0x22,0x02,0x3c,0x02,0xb0,0x03,0x00,0xe2,0x10,0x21,0x94,0x43,0x00,0x00,
51260 +0x08,0x00,0x03,0xc3,0x30,0x67,0xff,0xff,0x00,0xe2,0x10,0x21,0x90,0x43,0x00,0x00,
51261 +0x08,0x00,0x03,0xc3,0x30,0x67,0x00,0xff,0x30,0x62,0x00,0x03,0x00,0x02,0x12,0x00,
51262 +0x11,0x95,0x00,0x07,0x00,0x44,0x38,0x21,0x11,0x93,0x00,0x03,0x00,0x00,0x00,0x00,
51263 +0x08,0x00,0x03,0xf5,0x3c,0x02,0xb0,0x0a,0x08,0x00,0x03,0xfa,0x3c,0x02,0xb0,0x0a,
51264 +0x08,0x00,0x03,0xfe,0x3c,0x02,0xb0,0x0a,0x8e,0x09,0x00,0x04,0x8e,0x02,0x00,0x08,
51265 +0x8e,0x03,0x00,0x0c,0x00,0x09,0x41,0x42,0x00,0x02,0x22,0x02,0x00,0x03,0x3a,0x02,
51266 +0x30,0x84,0xff,0x00,0x30,0xe7,0xff,0x00,0x00,0x02,0x5e,0x02,0x00,0x02,0x32,0x00,
51267 +0x00,0x03,0x56,0x02,0x00,0x03,0x2a,0x00,0x01,0x64,0x58,0x25,0x00,0xd6,0x30,0x24,
51268 +0x01,0x47,0x50,0x25,0x00,0x02,0x16,0x00,0x00,0xb6,0x28,0x24,0x00,0x03,0x1e,0x00,
51269 +0x01,0x66,0x58,0x25,0x01,0x45,0x50,0x25,0x00,0x57,0x10,0x24,0x00,0x77,0x18,0x24,
51270 +0x01,0x62,0x38,0x25,0x01,0x43,0x30,0x25,0x00,0x09,0x10,0xc2,0x00,0x09,0x1c,0x02,
51271 +0x31,0x08,0x00,0x03,0x30,0x4c,0x00,0x03,0x30,0x63,0x00,0x0f,0x00,0x09,0x26,0x02,
51272 +0x00,0xe0,0x58,0x21,0x15,0x00,0x00,0x28,0x00,0xc0,0x50,0x21,0x24,0x02,0x00,0x01,
51273 +0x10,0x62,0x00,0x06,0x00,0x80,0x28,0x21,0x24,0x02,0x00,0x03,0x14,0x62,0xff,0x69,
51274 +0x02,0x51,0x10,0x21,0x24,0x85,0x01,0x00,0x24,0x02,0x00,0x01,0x11,0x82,0x00,0x15,
51275 +0x24,0x02,0x00,0x02,0x11,0x82,0x00,0x0a,0x3c,0x03,0xb0,0x03,0x00,0xa3,0x18,0x21,
51276 +0x8c,0x62,0x00,0x00,0x00,0x0a,0x20,0x27,0x01,0x6a,0x28,0x24,0x00,0x44,0x10,0x24,
51277 +0x00,0x45,0x10,0x25,0xac,0x62,0x00,0x00,0x08,0x00,0x03,0x9d,0x02,0x51,0x10,0x21,
51278 +0x00,0xa3,0x18,0x21,0x94,0x62,0x00,0x00,0x00,0x0a,0x20,0x27,0x01,0x6a,0x28,0x24,
51279 +0x00,0x44,0x10,0x24,0x00,0x45,0x10,0x25,0xa4,0x62,0x00,0x00,0x08,0x00,0x03,0x9d,
51280 +0x02,0x51,0x10,0x21,0x3c,0x03,0xb0,0x03,0x00,0xa3,0x18,0x21,0x90,0x62,0x00,0x00,
51281 +0x00,0x0a,0x20,0x27,0x01,0x6a,0x28,0x24,0x00,0x44,0x10,0x24,0x00,0x45,0x10,0x25,
51282 +0x08,0x00,0x03,0x9c,0xa0,0x62,0x00,0x00,0x24,0x02,0x00,0x01,0x11,0x02,0x00,0x21,
51283 +0x00,0x00,0x00,0x00,0x15,0x13,0xff,0x42,0x00,0x00,0x00,0x00,0x11,0x82,0x00,0x17,
51284 +0x00,0x00,0x00,0x00,0x11,0x88,0x00,0x0b,0x00,0x00,0x00,0x00,0x27,0x83,0x94,0x50,
51285 +0x00,0x04,0x20,0x80,0x00,0x83,0x20,0x21,0x8c,0x82,0x00,0x18,0x00,0x06,0x18,0x27,
51286 +0x00,0xe6,0x28,0x24,0x00,0x43,0x10,0x24,0x00,0x45,0x10,0x25,0x08,0x00,0x03,0x9c,
51287 +0xac,0x82,0x00,0x18,0x27,0x83,0x94,0x58,0x00,0x04,0x20,0x40,0x00,0x83,0x20,0x21,
51288 +0x94,0x82,0x00,0x02,0x00,0x06,0x18,0x27,0x00,0xe6,0x28,0x24,0x00,0x43,0x10,0x24,
51289 +0x00,0x45,0x10,0x25,0x08,0x00,0x03,0x9c,0xa4,0x82,0x00,0x02,0x27,0x83,0x94,0x50,
51290 +0x00,0x83,0x18,0x21,0x90,0x62,0x00,0x00,0x00,0x06,0x20,0x27,0x08,0x00,0x04,0x52,
51291 +0x00,0xe6,0x28,0x24,0x30,0x62,0x00,0x07,0x00,0x02,0x12,0x00,0x11,0x88,0x00,0x0f,
51292 +0x00,0x44,0x10,0x21,0x11,0x93,0x00,0x07,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x0a,
51293 +0x00,0x43,0x18,0x21,0x8c,0x62,0x00,0x00,0x00,0x06,0x20,0x27,0x08,0x00,0x04,0x3f,
51294 +0x00,0xe6,0x28,0x24,0x3c,0x03,0xb0,0x0a,0x00,0x43,0x18,0x21,0x94,0x62,0x00,0x00,
51295 +0x00,0x06,0x20,0x27,0x08,0x00,0x04,0x48,0x00,0xe6,0x28,0x24,0x3c,0x03,0xb0,0x0a,
51296 +0x08,0x00,0x04,0x75,0x00,0x43,0x18,0x21,0x97,0x85,0x94,0xa4,0x3c,0x07,0xb0,0x02,
51297 +0x3c,0x04,0xb0,0x03,0x3c,0x02,0x80,0x00,0x00,0xa7,0x28,0x21,0x34,0x84,0x00,0x20,
51298 +0x24,0x42,0x12,0x38,0x24,0x03,0xff,0x80,0xac,0x82,0x00,0x00,0xa0,0xa3,0x00,0x07,
51299 +0x97,0x82,0x94,0xa6,0x97,0x85,0x94,0xa4,0x3c,0x06,0xb0,0x06,0x30,0x42,0xff,0xf8,
51300 +0x24,0x42,0x00,0x10,0x00,0xa2,0x10,0x21,0x30,0x42,0x0f,0xff,0x24,0x44,0x00,0x08,
51301 +0x30,0x84,0x0f,0xff,0x00,0x05,0x28,0xc2,0x3c,0x03,0x00,0x40,0x00,0xa3,0x28,0x25,
51302 +0x00,0x87,0x20,0x21,0x34,0xc6,0x80,0x18,0xac,0xc5,0x00,0x00,0xaf,0x84,0x94,0xa0,
51303 +0xa7,0x82,0x94,0xa4,0xa7,0x80,0x94,0xa6,0xaf,0x80,0x94,0xa8,0x03,0xe0,0x00,0x08,
51304 +0x00,0x00,0x00,0x00,0x30,0xa5,0x00,0xff,0x30,0x84,0x00,0xff,0x24,0x02,0x00,0x01,
51305 +0x00,0xe0,0x48,0x21,0x30,0xc6,0x00,0xff,0x8f,0xa7,0x00,0x10,0x10,0x82,0x00,0x07,
51306 +0x00,0xa0,0x40,0x21,0x24,0x02,0x00,0x03,0x10,0x82,0x00,0x03,0x00,0x00,0x00,0x00,
51307 +0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x24,0xa8,0x01,0x00,0x3c,0x03,0xb0,0x03,
51308 +0x24,0x02,0x00,0x01,0x00,0x07,0x20,0x27,0x01,0x27,0x28,0x24,0x10,0xc2,0x00,0x14,
51309 +0x01,0x03,0x18,0x21,0x24,0x02,0x00,0x02,0x10,0xc2,0x00,0x09,0x00,0x07,0x50,0x27,
51310 +0x3c,0x03,0xb0,0x03,0x01,0x03,0x18,0x21,0x8c,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
51311 +0x00,0x4a,0x10,0x24,0x00,0x45,0x10,0x25,0x08,0x00,0x04,0xd9,0xac,0x62,0x00,0x00,
51312 +0x3c,0x03,0xb0,0x03,0x01,0x03,0x18,0x21,0x94,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
51313 +0x00,0x4a,0x10,0x24,0x00,0x45,0x10,0x25,0x03,0xe0,0x00,0x08,0xa4,0x62,0x00,0x00,
51314 +0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x44,0x10,0x24,0x00,0x45,0x10,0x25,
51315 +0xa0,0x62,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x30,0x84,0x00,0x07,
51316 +0x00,0x04,0x22,0x00,0x30,0xa5,0x00,0xff,0x00,0x85,0x28,0x21,0x3c,0x02,0xb0,0x0a,
51317 +0x00,0xa2,0x40,0x21,0x30,0xc6,0x00,0xff,0x24,0x02,0x00,0x01,0x8f,0xa4,0x00,0x10,
51318 +0x10,0xc2,0x00,0x14,0x24,0x02,0x00,0x02,0x00,0x04,0x50,0x27,0x10,0xc2,0x00,0x09,
51319 +0x00,0xe4,0x48,0x24,0x3c,0x03,0xb0,0x0a,0x00,0xa3,0x18,0x21,0x8c,0x62,0x00,0x00,
51320 +0x00,0x00,0x00,0x00,0x00,0x4a,0x10,0x24,0x00,0x49,0x10,0x25,0x03,0xe0,0x00,0x08,
51321 +0xac,0x62,0x00,0x00,0x3c,0x03,0xb0,0x0a,0x00,0xa3,0x18,0x21,0x94,0x62,0x00,0x00,
51322 +0x00,0x00,0x00,0x00,0x00,0x4a,0x10,0x24,0x00,0x49,0x10,0x25,0x03,0xe0,0x00,0x08,
51323 +0xa4,0x62,0x00,0x00,0x91,0x02,0x00,0x00,0x00,0x04,0x18,0x27,0x00,0xe4,0x20,0x24,
51324 +0x00,0x43,0x10,0x24,0x00,0x44,0x10,0x25,0x03,0xe0,0x00,0x08,0xa1,0x02,0x00,0x00,
51325 +0x30,0xa9,0x00,0xff,0x27,0x83,0x94,0x50,0x30,0x85,0x00,0xff,0x24,0x02,0x00,0x01,
51326 +0x00,0x07,0x50,0x27,0x00,0xc7,0x40,0x24,0x11,0x22,0x00,0x17,0x00,0xa3,0x18,0x21,
51327 +0x00,0x05,0x20,0x40,0x27,0x82,0x94,0x50,0x00,0x05,0x28,0x80,0x27,0x83,0x94,0x58,
51328 +0x00,0x83,0x50,0x21,0x00,0xa2,0x20,0x21,0x24,0x02,0x00,0x02,0x00,0x07,0x40,0x27,
51329 +0x11,0x22,0x00,0x07,0x00,0xc7,0x28,0x24,0x8c,0x82,0x00,0x18,0x00,0x00,0x00,0x00,
51330 +0x00,0x48,0x10,0x24,0x00,0x45,0x10,0x25,0x03,0xe0,0x00,0x08,0xac,0x82,0x00,0x18,
51331 +0x95,0x42,0x00,0x02,0x00,0x00,0x00,0x00,0x00,0x48,0x10,0x24,0x00,0x45,0x10,0x25,
51332 +0x03,0xe0,0x00,0x08,0xa5,0x42,0x00,0x02,0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
51333 +0x00,0x4a,0x10,0x24,0x00,0x48,0x10,0x25,0x03,0xe0,0x00,0x08,0xa0,0x62,0x00,0x00,
51334 +0x00,0x04,0x32,0x02,0x30,0xc6,0xff,0x00,0x00,0x04,0x16,0x02,0x00,0x04,0x1a,0x00,
51335 +0x3c,0x05,0x00,0xff,0x00,0x65,0x18,0x24,0x00,0x46,0x10,0x25,0x00,0x43,0x10,0x25,
51336 +0x00,0x04,0x26,0x00,0x03,0xe0,0x00,0x08,0x00,0x44,0x10,0x25,0x3c,0x02,0xb0,0x02,
51337 +0x34,0x42,0x00,0x08,0x3c,0x03,0xb0,0x02,0xaf,0x82,0x8c,0x78,0xaf,0x83,0x8c,0x7c,
51338 +0xa7,0x80,0x8c,0x80,0xa7,0x80,0x8c,0x82,0xaf,0x80,0x8c,0x84,0x03,0xe0,0x00,0x08,
51339 +0x00,0x00,0x00,0x00,0x27,0xbd,0xff,0xd8,0xaf,0xbf,0x00,0x20,0x94,0x82,0x00,0x04,
51340 +0x3c,0x05,0xff,0x8f,0x00,0x80,0x18,0x21,0x30,0x42,0xe0,0x00,0x14,0x40,0x00,0x0a,
51341 +0x34,0xa5,0xff,0xff,0x90,0x84,0x00,0x02,0x00,0x00,0x00,0x00,0x30,0x84,0x00,0xfc,
51342 +0x00,0x64,0x20,0x21,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xa2,0x10,0x2b,
51343 +0x10,0x40,0x00,0x05,0x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x20,0x00,0x00,0x00,0x00,
51344 +0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x28,0x0c,0x00,0x07,0xc9,0x00,0x00,0x00,0x00,
51345 +0x08,0x00,0x05,0x4a,0x00,0x00,0x00,0x00,0x27,0xbd,0xff,0xd8,0xaf,0xb2,0x00,0x18,
51346 +0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x20,0xaf,0xb3,0x00,0x1c,
51347 +0x8f,0x90,0x94,0xa0,0x0c,0x00,0x30,0x54,0x00,0x80,0x90,0x21,0x00,0x40,0x88,0x21,
51348 +0x93,0x82,0x82,0x28,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x1b,0x24,0x02,0x00,0x01,
51349 +0xa3,0x82,0x82,0x28,0x24,0x03,0x00,0x05,0x24,0x02,0x00,0x04,0xa3,0x83,0x8c,0x73,
51350 +0xa3,0x82,0x8c,0x72,0xa7,0x80,0x82,0x2a,0x00,0x00,0x28,0x21,0x27,0x86,0x8c,0x70,
51351 +0x00,0x05,0x10,0x80,0x00,0x46,0x10,0x21,0x8c,0x44,0x00,0x00,0x24,0xa3,0x00,0x01,
51352 +0x30,0x65,0xff,0xff,0xae,0x04,0x00,0x00,0x10,0xa0,0xff,0xfa,0x00,0x05,0x10,0x80,
51353 +0x8f,0x83,0x94,0xa0,0x97,0x82,0x94,0xa6,0x24,0x05,0x8f,0xff,0x24,0x63,0x00,0x04,
51354 +0x00,0x65,0x18,0x24,0x26,0x04,0x00,0x04,0x24,0x42,0x00,0x04,0xaf,0x83,0x94,0xa0,
51355 +0xa7,0x82,0x94,0xa6,0x00,0x85,0x80,0x24,0x97,0x84,0x82,0x2a,0x27,0x93,0x80,0x34,
51356 +0x02,0x40,0x28,0x21,0x00,0x93,0x20,0x21,0x0c,0x00,0x30,0xd8,0x02,0x20,0x30,0x21,
51357 +0x97,0x87,0x82,0x2a,0x24,0x02,0x00,0x52,0x00,0xf1,0x18,0x21,0xa7,0x83,0x82,0x2a,
51358 +0x82,0x44,0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x82,0x00,0x06,0x00,0x60,0x38,0x21,
51359 +0x8f,0xbf,0x00,0x20,0x7b,0xb2,0x00,0xfc,0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,
51360 +0x27,0xbd,0x00,0x28,0x82,0x43,0x00,0x01,0x24,0x02,0x00,0x54,0x14,0x62,0xff,0xf8,
51361 +0x24,0x02,0x00,0x4c,0x82,0x43,0x00,0x02,0x00,0x00,0x00,0x00,0x14,0x62,0xff,0xf4,
51362 +0x00,0x00,0x00,0x00,0x30,0xe6,0xff,0xff,0x10,0xc0,0x00,0x0c,0x00,0x00,0x28,0x21,
51363 +0x02,0x60,0x48,0x21,0x24,0x08,0x8f,0xff,0x00,0xa9,0x10,0x21,0x8c,0x44,0x00,0x00,
51364 +0x24,0xa3,0x00,0x04,0x30,0x65,0xff,0xff,0x26,0x02,0x00,0x04,0x00,0xa6,0x18,0x2b,
51365 +0xae,0x04,0x00,0x00,0x14,0x60,0xff,0xf8,0x00,0x48,0x80,0x24,0x97,0x83,0x94,0xa6,
51366 +0x97,0x85,0x94,0xa4,0x3c,0x02,0xb0,0x02,0x00,0x67,0x18,0x21,0x00,0xa2,0x28,0x21,
51367 +0x3c,0x04,0xb0,0x06,0xa7,0x83,0x94,0xa6,0x34,0x84,0x80,0x18,0xa4,0xa3,0x00,0x00,
51368 +0x8f,0x82,0x94,0xa0,0x8c,0x86,0x00,0x00,0x30,0xe5,0xff,0xff,0x24,0x03,0x8f,0xff,
51369 +0x00,0x45,0x10,0x21,0x3c,0x04,0x0f,0x00,0x00,0x43,0x10,0x24,0x00,0xc4,0x30,0x24,
51370 +0x3c,0x03,0x04,0x00,0xaf,0x82,0x94,0xa0,0x10,0xc3,0xff,0xd1,0x00,0x00,0x00,0x00,
51371 +0x0c,0x00,0x04,0x8e,0x00,0x00,0x00,0x00,0xa3,0x80,0x82,0x28,0x08,0x00,0x05,0x88,
51372 +0x00,0x00,0x00,0x00,0x8f,0x82,0x8c,0x7c,0x97,0x83,0x8c,0x80,0x8f,0x87,0x8c,0x78,
51373 +0x3c,0x06,0xff,0xff,0xac,0x43,0x00,0x00,0x8f,0x82,0x8c,0x7c,0x3c,0x03,0x80,0x00,
51374 +0x24,0xe5,0x00,0x08,0xac,0x43,0x00,0x04,0x8f,0x82,0x8c,0x7c,0x34,0xc6,0x1f,0xff,
51375 +0x3c,0x03,0x00,0x40,0x30,0x42,0x0f,0xff,0x3c,0x04,0xb0,0x06,0x00,0x02,0x10,0xc2,
51376 +0x00,0x43,0x10,0x25,0x00,0xa6,0x28,0x24,0x34,0x84,0x80,0x18,0x27,0xbd,0xff,0xf8,
51377 +0xac,0x82,0x00,0x00,0xaf,0x85,0x8c,0x78,0xaf,0x87,0x8c,0x7c,0xa7,0x80,0x8c,0x80,
51378 +0xa7,0x80,0x8c,0x82,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x08,0x03,0xe0,0x00,0x08,
51379 +0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,
51380 +0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x27,0xbd,0xff,0xe0,
51381 +0xaf,0xb2,0x00,0x18,0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,0x8f,0x91,0x8c,0x78,
51382 +0x00,0x80,0x80,0x21,0xaf,0xbf,0x00,0x1c,0x0c,0x00,0x06,0x78,0x00,0xa0,0x90,0x21,
51383 +0x97,0x82,0x8c,0x80,0x36,0x10,0x12,0x00,0x26,0x2a,0x00,0x04,0x24,0x4c,0x00,0x14,
51384 +0x2c,0x42,0x04,0x01,0x14,0x40,0x00,0x0a,0x24,0x09,0x8f,0xff,0x8f,0x82,0x80,0x20,
51385 +0x00,0x00,0x00,0x00,0x24,0x42,0x00,0x01,0xaf,0x82,0x80,0x20,0x8f,0xbf,0x00,0x1c,
51386 +0x8f,0xb2,0x00,0x18,0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,
51387 +0x8e,0x44,0x00,0x1c,0x86,0x47,0x00,0x06,0x97,0x86,0x8c,0x82,0x8c,0x82,0x00,0x08,
51388 +0x00,0x07,0x3c,0x00,0x8f,0x85,0x8c,0x78,0x00,0x02,0x11,0x02,0x30,0x42,0x40,0x00,
51389 +0x02,0x02,0x80,0x25,0xae,0x30,0x00,0x00,0x8c,0x82,0x00,0x04,0x82,0x43,0x00,0x15,
51390 +0x01,0x49,0x88,0x24,0x00,0x02,0x14,0xc2,0x00,0x03,0x1a,0x00,0x00,0x02,0x14,0x00,
51391 +0x00,0x62,0x80,0x25,0xae,0x30,0x00,0x00,0x92,0x43,0x00,0x13,0x92,0x44,0x00,0x10,
51392 +0x96,0x50,0x00,0x1a,0x00,0x03,0x1c,0x00,0x00,0x04,0x26,0x00,0x02,0x03,0x80,0x25,
51393 +0x26,0x22,0x00,0x04,0x00,0x49,0x88,0x24,0x02,0x04,0x80,0x25,0xae,0x30,0x00,0x00,
51394 +0x92,0x42,0x00,0x0f,0x92,0x43,0x00,0x11,0x26,0x24,0x00,0x04,0x00,0x02,0x12,0x00,
51395 +0x00,0x89,0x88,0x24,0x00,0x62,0x80,0x25,0x02,0x07,0x80,0x25,0x26,0x22,0x00,0x04,
51396 +0xae,0x30,0x00,0x00,0x00,0x49,0x88,0x24,0xae,0x20,0x00,0x00,0x8f,0x82,0x80,0x1c,
51397 +0x24,0xc6,0x00,0x01,0x24,0xa5,0x00,0x14,0x30,0xc8,0xff,0xff,0x3c,0x0b,0xb0,0x03,
51398 +0x00,0xa9,0x28,0x24,0x24,0x42,0x00,0x01,0x2d,0x08,0x00,0x0a,0xaf,0x85,0x8c,0x78,
51399 +0xa7,0x8c,0x8c,0x80,0xaf,0x82,0x80,0x1c,0xa7,0x86,0x8c,0x82,0x11,0x00,0x00,0x07,
51400 +0x35,0x6b,0x01,0x08,0x8f,0x82,0x8c,0x84,0x8d,0x63,0x00,0x00,0x24,0x42,0x04,0x00,
51401 +0x00,0x62,0x18,0x2b,0x14,0x60,0xff,0xc1,0x00,0x00,0x00,0x00,0x0c,0x00,0x05,0xbd,
51402 +0x00,0x00,0x00,0x00,0x08,0x00,0x05,0xf3,0x00,0x00,0x00,0x00,0x27,0xbd,0xff,0xe8,
51403 +0xaf,0xbf,0x00,0x10,0x0c,0x00,0x06,0x78,0x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x10,
51404 +0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x27,0xbd,0xff,0xe0,
51405 +0xaf,0xb2,0x00,0x18,0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x1c,
51406 +0x8f,0x90,0x8c,0x78,0x0c,0x00,0x06,0x78,0x00,0x80,0x90,0x21,0x97,0x82,0x8c,0x80,
51407 +0x24,0x11,0x8f,0xff,0x2c,0x42,0x04,0x01,0x14,0x40,0x00,0x06,0x26,0x03,0x00,0x04,
51408 +0x8f,0xbf,0x00,0x1c,0x8f,0xb2,0x00,0x18,0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,
51409 +0x27,0xbd,0x00,0x20,0x24,0x02,0x0e,0x03,0xae,0x02,0x00,0x00,0x00,0x71,0x80,0x24,
51410 +0xae,0x00,0x00,0x00,0x8e,0x44,0x00,0x08,0x26,0x02,0x00,0x04,0x0c,0x00,0x06,0x86,
51411 +0x00,0x51,0x80,0x24,0x97,0x86,0x8c,0x82,0x8f,0x83,0x8c,0x78,0xae,0x02,0x00,0x00,
51412 +0x97,0x82,0x8c,0x80,0x24,0xc6,0x00,0x01,0x8e,0x47,0x00,0x0c,0x24,0x63,0x00,0x10,
51413 +0x30,0xc5,0xff,0xff,0x26,0x04,0x00,0x04,0x3c,0x08,0xb0,0x03,0x00,0x71,0x18,0x24,
51414 +0x00,0x91,0x80,0x24,0x24,0x42,0x00,0x10,0x2c,0xa5,0x00,0x0a,0x35,0x08,0x01,0x08,
51415 +0xae,0x07,0x00,0x00,0xaf,0x83,0x8c,0x78,0xa7,0x82,0x8c,0x80,0xa7,0x86,0x8c,0x82,
51416 +0x10,0xa0,0x00,0x07,0x00,0x00,0x00,0x00,0x8f,0x82,0x8c,0x84,0x8d,0x03,0x00,0x00,
51417 +0x24,0x42,0x04,0x00,0x00,0x62,0x18,0x2b,0x14,0x60,0xff,0xd9,0x00,0x00,0x00,0x00,
51418 +0x0c,0x00,0x05,0xbd,0x00,0x00,0x00,0x00,0x08,0x00,0x06,0x4c,0x00,0x00,0x00,0x00,
51419 +0x97,0x82,0x8c,0x82,0x3c,0x03,0xb0,0x03,0x14,0x40,0x00,0x09,0x34,0x63,0x01,0x08,
51420 +0x8c,0x62,0x00,0x00,0x8f,0x83,0x8c,0x7c,0xa7,0x80,0x8c,0x80,0xaf,0x82,0x8c,0x84,
51421 +0xac,0x60,0x00,0x00,0x8f,0x82,0x8c,0x7c,0x00,0x00,0x00,0x00,0xac,0x40,0x00,0x04,
51422 +0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x00,0x04,0x32,0x02,0x30,0xc6,0xff,0x00,
51423 +0x00,0x04,0x16,0x02,0x00,0x04,0x1a,0x00,0x3c,0x05,0x00,0xff,0x00,0x65,0x18,0x24,
51424 +0x00,0x46,0x10,0x25,0x00,0x43,0x10,0x25,0x00,0x04,0x26,0x00,0x03,0xe0,0x00,0x08,
51425 +0x00,0x44,0x10,0x25,0x80,0x82,0x00,0x00,0x90,0x83,0x00,0x00,0x10,0x40,0x00,0x0c,
51426 +0x00,0x80,0x28,0x21,0x24,0x62,0xff,0x9f,0x30,0x42,0x00,0xff,0x2c,0x42,0x00,0x1a,
51427 +0x10,0x40,0x00,0x02,0x24,0x63,0xff,0xe0,0xa0,0xa3,0x00,0x00,0x24,0xa5,0x00,0x01,
51428 +0x90,0xa2,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x40,0xff,0xf6,0x00,0x40,0x18,0x21,
51429 +0x03,0xe0,0x00,0x08,0x00,0x80,0x10,0x21,0x80,0x82,0x00,0x00,0x90,0x83,0x00,0x00,
51430 +0x10,0x40,0x00,0x0c,0x00,0x80,0x28,0x21,0x24,0x62,0xff,0xbf,0x30,0x42,0x00,0xff,
51431 +0x2c,0x42,0x00,0x1a,0x10,0x40,0x00,0x02,0x24,0x63,0x00,0x20,0xa0,0xa3,0x00,0x00,
51432 +0x24,0xa5,0x00,0x01,0x90,0xa2,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x40,0xff,0xf6,
51433 +0x00,0x40,0x18,0x21,0x03,0xe0,0x00,0x08,0x00,0x80,0x10,0x21,0x27,0xbd,0xff,0xe8,
51434 +0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x14,0x24,0x10,0xff,0xff,0x0c,0x00,0x2d,0x94,
51435 +0x00,0x00,0x00,0x00,0x10,0x50,0xff,0xfd,0x00,0x02,0x16,0x00,0x00,0x02,0x16,0x03,
51436 +0x8f,0xbf,0x00,0x14,0x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,
51437 +0x27,0xbd,0xff,0xc8,0xaf,0xb3,0x00,0x1c,0x00,0x00,0x98,0x21,0xaf,0xb1,0x00,0x14,
51438 +0x02,0x65,0x88,0x2b,0xaf,0xb6,0x00,0x28,0xaf,0xb5,0x00,0x24,0xaf,0xb0,0x00,0x10,
51439 +0xaf,0xbf,0x00,0x34,0xaf,0xbe,0x00,0x30,0xaf,0xb7,0x00,0x2c,0xaf,0xb4,0x00,0x20,
51440 +0xaf,0xb2,0x00,0x18,0x00,0xa0,0xb0,0x21,0xaf,0xa4,0x00,0x38,0x00,0xc0,0xa8,0x21,
51441 +0x12,0x20,0x00,0x17,0x00,0x80,0x80,0x21,0x24,0x17,0xff,0xff,0x24,0x1e,0x00,0x0a,
51442 +0x0c,0x00,0x2d,0x94,0x00,0x00,0x00,0x00,0x10,0x57,0x00,0x0f,0x00,0x02,0x16,0x00,
51443 +0x00,0x02,0x26,0x03,0x10,0x9e,0x00,0x0e,0x24,0x02,0x00,0x0d,0x10,0x82,0x00,0x34,
51444 +0x24,0x02,0x00,0x08,0x10,0x82,0x00,0x25,0x24,0x02,0x00,0x09,0x10,0x82,0x00,0x13,
51445 +0x00,0x00,0x90,0x21,0xa2,0x04,0x00,0x00,0x26,0x73,0x00,0x01,0x16,0xa0,0x00,0x0b,
51446 +0x26,0x10,0x00,0x01,0x02,0x76,0x88,0x2b,0x16,0x20,0xff,0xed,0x00,0x00,0x00,0x00,
51447 +0x7b,0xbe,0x01,0xbc,0x7b,0xb6,0x01,0x7c,0x7b,0xb4,0x01,0x3c,0x7b,0xb2,0x00,0xfc,
51448 +0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x38,0x0c,0x00,0x2d,0x87,
51449 +0x02,0x76,0x88,0x2b,0x08,0x00,0x06,0xe6,0x00,0x00,0x00,0x00,0x24,0x14,0x00,0x20,
51450 +0xa2,0x14,0x00,0x00,0x26,0x52,0x00,0x01,0x24,0x04,0x00,0x20,0x26,0x73,0x00,0x01,
51451 +0x16,0xa0,0x00,0x06,0x26,0x10,0x00,0x01,0x2a,0x42,0x00,0x08,0x10,0x40,0xff,0xea,
51452 +0x02,0x76,0x88,0x2b,0x08,0x00,0x06,0xf5,0xa2,0x14,0x00,0x00,0x0c,0x00,0x2d,0x87,
51453 +0x00,0x00,0x00,0x00,0x08,0x00,0x06,0xfb,0x2a,0x42,0x00,0x08,0x8f,0xa2,0x00,0x38,
51454 +0x00,0x00,0x00,0x00,0x12,0x02,0xff,0xe0,0x00,0x00,0x00,0x00,0x26,0x10,0xff,0xff,
51455 +0x12,0xa0,0xff,0xdc,0x26,0x73,0xff,0xff,0x0c,0x00,0x2d,0x87,0x24,0x04,0x00,0x08,
51456 +0x0c,0x00,0x2d,0x87,0x24,0x04,0x00,0x20,0x08,0x00,0x06,0xef,0x24,0x04,0x00,0x08,
51457 +0x08,0x00,0x06,0xe8,0xa2,0x00,0x00,0x00,0x90,0x82,0x00,0x00,0x00,0x00,0x00,0x00,
51458 +0x00,0x02,0x1e,0x00,0x10,0x60,0x00,0x16,0x00,0x00,0x30,0x21,0x24,0x07,0x00,0x20,
51459 +0x00,0x03,0x1e,0x03,0x10,0x67,0x00,0x17,0x00,0x00,0x00,0x00,0x10,0x60,0x00,0x15,
51460 +0x00,0x00,0x00,0x00,0x10,0x67,0x00,0x0b,0x24,0xc6,0x00,0x01,0x10,0x60,0x00,0x0a,
51461 +0x00,0x02,0x1e,0x00,0x24,0x05,0x00,0x20,0x24,0x84,0x00,0x01,0x80,0x83,0x00,0x00,
51462 +0x90,0x82,0x00,0x00,0x10,0x65,0x00,0x03,0x00,0x00,0x00,0x00,0x14,0x60,0xff,0xfa,
51463 +0x00,0x00,0x00,0x00,0x00,0x02,0x1e,0x00,0x14,0x60,0xff,0xed,0x00,0x00,0x00,0x00,
51464 +0x28,0xc3,0x00,0x08,0x24,0x02,0x00,0x07,0x00,0x43,0x30,0x0a,0x03,0xe0,0x00,0x08,
51465 +0x00,0xc0,0x10,0x21,0x24,0x84,0x00,0x01,0x90,0x82,0x00,0x00,0x08,0x00,0x07,0x2a,
51466 +0x00,0x02,0x1e,0x00,0x27,0xbd,0xff,0xe0,0xaf,0xb1,0x00,0x14,0x27,0x91,0x8c,0x88,
51467 +0xaf,0xb0,0x00,0x10,0x24,0x06,0x00,0x20,0x00,0x80,0x80,0x21,0x00,0x00,0x28,0x21,
51468 +0xaf,0xbf,0x00,0x18,0x0c,0x00,0x30,0xce,0x02,0x20,0x20,0x21,0x82,0x02,0x00,0x00,
51469 +0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x1f,0x00,0x00,0x30,0x21,0x02,0x20,0x20,0x21,
51470 +0x24,0x09,0x00,0x20,0x24,0x08,0x00,0x20,0x24,0x07,0x00,0x08,0xac,0x90,0x00,0x00,
51471 +0x82,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x49,0x00,0x0a,0x00,0x00,0x00,0x00,
51472 +0x10,0x40,0x00,0x08,0x24,0x03,0x00,0x20,0x26,0x10,0x00,0x01,0x82,0x02,0x00,0x00,
51473 +0x00,0x00,0x00,0x00,0x10,0x43,0x00,0x03,0x00,0x00,0x00,0x00,0x14,0x40,0xff,0xfa,
51474 +0x00,0x00,0x00,0x00,0xa2,0x00,0x00,0x00,0x26,0x10,0x00,0x01,0x82,0x02,0x00,0x00,
51475 +0x92,0x03,0x00,0x00,0x10,0x48,0x00,0x0c,0x24,0x05,0x00,0x20,0x24,0xc6,0x00,0x01,
51476 +0x10,0xc7,0x00,0x04,0x24,0x84,0x00,0x04,0x00,0x03,0x16,0x00,0x14,0x40,0xff,0xe7,
51477 +0x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x18,0x7b,0xb0,0x00,0xbc,0x27,0x82,0x8c,0x88,
51478 +0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x26,0x10,0x00,0x01,0x82,0x02,0x00,0x00,
51479 +0x92,0x03,0x00,0x00,0x10,0x45,0xff,0xfc,0x00,0x00,0x00,0x00,0x08,0x00,0x07,0x5c,
51480 +0x24,0xc6,0x00,0x01,0x00,0x80,0x30,0x21,0x90,0x84,0x00,0x00,0x00,0x00,0x38,0x21,
51481 +0x10,0x80,0x00,0x19,0x24,0xc6,0x00,0x01,0x24,0x82,0xff,0xd0,0x30,0x42,0x00,0xff,
51482 +0x2c,0x43,0x00,0x0a,0x14,0x60,0x00,0x0c,0x00,0x07,0x19,0x00,0x24,0x83,0xff,0x9f,
51483 +0x24,0x82,0xff,0xa9,0x24,0x88,0xff,0xc9,0x2c,0x63,0x00,0x06,0x24,0x84,0xff,0xbf,
51484 +0x2c,0x84,0x00,0x06,0x14,0x60,0x00,0x03,0x30,0x42,0x00,0xff,0x10,0x80,0x00,0x0e,
51485 +0x31,0x02,0x00,0xff,0x00,0x07,0x19,0x00,0x00,0x62,0x18,0x21,0x00,0x67,0x10,0x2b,
51486 +0x14,0x40,0x00,0x07,0x00,0x00,0x20,0x21,0x90,0xc4,0x00,0x00,0x00,0x60,0x38,0x21,
51487 +0x14,0x80,0xff,0xe9,0x24,0xc6,0x00,0x01,0xac,0xa7,0x00,0x00,0x24,0x04,0x00,0x01,
51488 +0x03,0xe0,0x00,0x08,0x00,0x80,0x10,0x21,0x08,0x00,0x07,0x8c,0x00,0x00,0x20,0x21,
51489 +0x00,0x00,0x20,0x21,0x27,0x85,0x94,0xc0,0x24,0x82,0x00,0x01,0x00,0x04,0x18,0x80,
51490 +0x30,0x44,0x00,0xff,0x00,0x65,0x18,0x21,0x2c,0x82,0x00,0x0b,0x14,0x40,0xff,0xfa,
51491 +0xac,0x60,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0xaf,0x84,0x8d,0x08,
51492 +0xaf,0x85,0x8d,0x0c,0xaf,0x86,0x8d,0x10,0xaf,0x87,0x8d,0x14,0x03,0xe0,0x00,0x08,
51493 +0x00,0x00,0x00,0x00,0x8f,0x82,0x84,0x98,0x27,0xbd,0xff,0xe8,0xaf,0xbf,0x00,0x10,
51494 +0x2c,0x43,0x00,0x64,0x24,0x42,0x00,0x01,0x27,0x84,0x8c,0xa8,0xaf,0x82,0x84,0x98,
51495 +0x10,0x60,0x00,0x05,0x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x10,0x00,0x00,0x00,0x00,
51496 +0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0xaf,0x80,0x84,0x98,0x0c,0x00,0x07,0xf6,
51497 +0x00,0x00,0x00,0x00,0x00,0x40,0x18,0x21,0x28,0x44,0x00,0x08,0x24,0x02,0x00,0x07,
51498 +0x10,0x62,0x00,0x08,0x00,0x00,0x00,0x00,0x14,0x80,0xff,0xf3,0x24,0x02,0x00,0x08,
51499 +0x27,0x84,0x8c,0xa8,0x14,0x62,0xff,0xf0,0x00,0x00,0x00,0x00,0x0c,0x00,0x1a,0x7e,
51500 +0x00,0x00,0x00,0x00,0x27,0x84,0x8c,0xa8,0x0c,0x00,0x08,0x54,0x00,0x00,0x00,0x00,
51501 +0x8f,0x83,0x84,0x9c,0x3c,0x04,0x80,0x01,0x00,0x60,0x28,0x21,0x24,0x63,0x00,0x01,
51502 +0xaf,0x83,0x84,0x9c,0x0c,0x00,0x1a,0x6b,0x24,0x84,0x04,0x90,0x08,0x00,0x07,0xaa,
51503 +0x00,0x00,0x00,0x00,0x27,0xbd,0xff,0xc0,0xaf,0xbf,0x00,0x38,0x8c,0x85,0x00,0x0c,
51504 +0x8c,0x88,0x00,0x08,0x18,0xa0,0x00,0x0e,0x00,0x00,0x30,0x21,0x24,0x87,0x00,0x08,
51505 +0x27,0xa9,0x00,0x10,0x00,0x06,0x10,0x80,0x00,0x06,0x19,0x00,0x00,0x49,0x10,0x21,
51506 +0x14,0xc0,0x00,0x1f,0x00,0x83,0x18,0x21,0xaf,0xa7,0x00,0x10,0x24,0xc2,0x00,0x01,
51507 +0x30,0x46,0x00,0xff,0x00,0xc5,0x18,0x2a,0x14,0x60,0xff,0xf7,0x00,0x06,0x10,0x80,
51508 +0x29,0x02,0x00,0x0a,0x14,0x40,0x00,0x05,0x00,0x08,0x18,0x40,0x8f,0xbf,0x00,0x38,
51509 +0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x40,0x00,0x68,0x18,0x21,
51510 +0x27,0x82,0x83,0x94,0x00,0x03,0x18,0xc0,0x00,0x62,0x18,0x21,0x8c,0x62,0x00,0x10,
51511 +0x01,0x00,0x20,0x21,0x00,0x40,0xf8,0x09,0x27,0xa6,0x00,0x10,0x8f,0x83,0x84,0xb0,
51512 +0x3c,0x04,0x80,0x01,0x00,0x60,0x28,0x21,0x24,0x63,0x00,0x01,0xaf,0x83,0x84,0xb0,
51513 +0x0c,0x00,0x1a,0x6b,0x24,0x84,0x04,0xa4,0x08,0x00,0x07,0xdf,0x00,0x00,0x00,0x00,
51514 +0x08,0x00,0x07,0xd7,0xac,0x43,0x00,0x00,0x27,0xbd,0xff,0xe0,0xaf,0xb1,0x00,0x14,
51515 +0xaf,0xbf,0x00,0x18,0x00,0x80,0x88,0x21,0x0c,0x00,0x1a,0xa2,0xaf,0xb0,0x00,0x10,
51516 +0x00,0x40,0x20,0x21,0x24,0x02,0xff,0xff,0x10,0x82,0x00,0x1f,0x24,0x03,0x00,0x06,
51517 +0x8f,0x85,0x84,0xc4,0x00,0x00,0x00,0x00,0x14,0xa0,0x00,0x0a,0x24,0x02,0x00,0x08,
51518 +0x24,0x02,0x00,0x02,0x10,0x82,0x00,0x3b,0x28,0x82,0x00,0x03,0x10,0x40,0x00,0x32,
51519 +0x24,0x02,0x00,0x1b,0x24,0x02,0x00,0x01,0x10,0x82,0x00,0x13,0x24,0x03,0x00,0x08,
51520 +0x24,0x02,0x00,0x08,0x10,0x82,0x00,0x23,0x24,0x02,0x00,0x0d,0x10,0x82,0x00,0x18,
51521 +0x02,0x25,0x10,0x21,0x24,0xa3,0x00,0x01,0xa0,0x44,0x00,0x00,0xaf,0x83,0x84,0xc4,
51522 +0x18,0x60,0x00,0x08,0x24,0x02,0x00,0x43,0x82,0x23,0x00,0x00,0x00,0x00,0x00,0x00,
51523 +0x10,0x62,0x00,0x0a,0x00,0x00,0x00,0x00,0x30,0x84,0xff,0xff,0x0c,0x00,0x1a,0x9e,
51524 +0x00,0x00,0x00,0x00,0x24,0x03,0x00,0x06,0x8f,0xbf,0x00,0x18,0x7b,0xb0,0x00,0xbc,
51525 +0x00,0x60,0x10,0x21,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x3c,0x04,0x80,0x01,
51526 +0x0c,0x00,0x1a,0x7e,0x24,0x84,0x04,0xb8,0x08,0x00,0x08,0x1e,0x24,0x03,0x00,0x06,
51527 +0xa0,0x40,0x00,0x00,0x24,0xa5,0x00,0x01,0xaf,0x85,0x84,0xc4,0x0c,0x00,0x1a,0x9e,
51528 +0x24,0x04,0x00,0x0d,0x24,0x03,0x00,0x07,0xaf,0x80,0x84,0xc4,0x08,0x00,0x08,0x1e,
51529 +0x00,0x00,0x00,0x00,0x18,0xa0,0xff,0xeb,0x24,0xa5,0xff,0xff,0xaf,0x85,0x84,0xc4,
51530 +0x0c,0x00,0x1a,0x9e,0x24,0x04,0x00,0x08,0x0c,0x00,0x1a,0x9e,0x24,0x04,0x00,0x20,
51531 +0x08,0x00,0x08,0x1b,0x24,0x04,0x00,0x08,0x14,0x82,0xff,0xd2,0x24,0x02,0x00,0x08,
51532 +0x0c,0x00,0x07,0x90,0x00,0x00,0x00,0x00,0x8f,0x85,0x84,0xc4,0x08,0x00,0x08,0x0c,
51533 +0x24,0x04,0x00,0x0d,0x0c,0x00,0x30,0x54,0x02,0x20,0x20,0x21,0xaf,0x82,0x84,0xc4,
51534 +0x04,0x40,0x00,0x0d,0x00,0x00,0x80,0x21,0x02,0x30,0x10,0x21,0x90,0x44,0x00,0x00,
51535 +0x26,0x10,0x00,0x01,0x00,0x04,0x26,0x00,0x00,0x04,0x26,0x03,0x0c,0x00,0x1a,0x9e,
51536 +0x30,0x84,0xff,0xff,0x8f,0x83,0x84,0xc4,0x00,0x00,0x00,0x00,0x00,0x70,0x18,0x2a,
51537 +0x10,0x60,0xff,0xf6,0x02,0x30,0x10,0x21,0x08,0x00,0x08,0x2e,0x24,0x03,0x00,0x06,
51538 +0x27,0xbd,0xff,0xe8,0xaf,0xbf,0x00,0x10,0x27,0x83,0x8c,0xe8,0x24,0x02,0x00,0x07,
51539 +0x24,0x42,0xff,0xff,0xac,0x60,0x00,0x00,0x04,0x41,0xff,0xfd,0x24,0x63,0x00,0x04,
51540 +0x0c,0x00,0x08,0x66,0x00,0x00,0x00,0x00,0x8f,0x84,0x8c,0xe8,0x27,0x86,0x8c,0xe8,
51541 +0x0c,0x00,0x08,0x83,0x00,0x40,0x28,0x21,0x8f,0xbf,0x00,0x10,0x00,0x00,0x00,0x00,
51542 +0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x27,0xbd,0xff,0xe0,0x00,0x80,0x28,0x21,
51543 +0x27,0x84,0x8c,0xc8,0xaf,0xb1,0x00,0x14,0xaf,0xbf,0x00,0x18,0x0c,0x00,0x30,0xe5,
51544 +0xaf,0xb0,0x00,0x10,0x8f,0x85,0x83,0x34,0x27,0x84,0x8c,0xc8,0x0c,0x00,0x30,0xa9,
51545 +0x00,0x00,0x88,0x21,0x10,0x40,0x00,0x0c,0x00,0x00,0x00,0x00,0x27,0x90,0x8c,0xe8,
51546 +0x8f,0x85,0x83,0x34,0x00,0x00,0x20,0x21,0xae,0x02,0x00,0x00,0x0c,0x00,0x30,0xa9,
51547 +0x26,0x31,0x00,0x01,0x26,0x10,0x00,0x04,0x10,0x40,0x00,0x03,0x2a,0x23,0x00,0x64,
51548 +0x14,0x60,0xff,0xf7,0x00,0x00,0x00,0x00,0x02,0x20,0x10,0x21,0x8f,0xbf,0x00,0x18,
51549 +0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x27,0xbd,0xff,0xd0,
51550 +0xaf,0xb6,0x00,0x28,0xaf,0xb5,0x00,0x24,0xaf,0xb4,0x00,0x20,0xaf,0xbf,0x00,0x2c,
51551 +0xaf,0xb3,0x00,0x1c,0xaf,0xb2,0x00,0x18,0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,
51552 +0x00,0xa0,0xa8,0x21,0x00,0x80,0xa0,0x21,0x00,0xc0,0xb0,0x21,0x10,0xa0,0x00,0x1d,
51553 +0x24,0x02,0x00,0x05,0x3c,0x02,0x80,0x00,0x24,0x43,0x2c,0x80,0x8f,0x82,0x83,0xa4,
51554 +0x00,0x00,0x00,0x00,0x10,0x43,0x00,0x1e,0x00,0x00,0x88,0x21,0x00,0x60,0x98,0x21,
51555 +0x00,0x00,0x90,0x21,0x27,0x90,0x83,0xa4,0x8e,0x05,0xff,0xec,0x02,0x80,0x20,0x21,
51556 +0x0c,0x00,0x30,0xed,0x26,0x10,0x00,0x18,0x10,0x40,0x00,0x06,0x02,0x51,0x18,0x21,
51557 +0x8e,0x02,0x00,0x00,0x26,0x31,0x00,0x01,0x14,0x53,0xff,0xf7,0x00,0x11,0x90,0x40,
51558 +0x02,0x51,0x18,0x21,0x27,0x82,0x83,0x94,0x00,0x03,0x18,0xc0,0x00,0x62,0x18,0x21,
51559 +0x8c,0x62,0x00,0x10,0x02,0x20,0x20,0x21,0x02,0xa0,0x28,0x21,0x00,0x40,0xf8,0x09,
51560 +0x02,0xc0,0x30,0x21,0x8f,0xbf,0x00,0x2c,0x8f,0xb6,0x00,0x28,0x7b,0xb4,0x01,0x3c,
51561 +0x7b,0xb2,0x00,0xfc,0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x30,
51562 +0x08,0x00,0x08,0xa4,0x00,0x00,0x90,0x21,0x27,0xbd,0xff,0xc0,0xaf,0xb5,0x00,0x34,
51563 +0xaf,0xb3,0x00,0x2c,0xaf,0xb1,0x00,0x24,0xaf,0xbf,0x00,0x38,0xaf,0xb4,0x00,0x30,
51564 +0xaf,0xb2,0x00,0x28,0xaf,0xb0,0x00,0x20,0x00,0xc0,0x98,0x21,0x30,0xa5,0x00,0xff,
51565 +0xac,0xc0,0x00,0x00,0x24,0x15,0x00,0x0a,0x00,0x00,0x88,0x21,0x27,0xa8,0x00,0x10,
51566 +0x00,0x91,0x18,0x21,0x80,0x62,0x00,0x00,0x26,0x27,0x00,0x01,0x10,0x40,0x00,0x0c,
51567 +0x01,0x11,0x30,0x21,0x90,0x63,0x00,0x00,0x30,0xf1,0x00,0xff,0x2e,0x22,0x00,0x0a,
51568 +0x14,0x40,0xff,0xf7,0xa0,0xc3,0x00,0x00,0x8f,0xbf,0x00,0x38,0x7b,0xb4,0x01,0xbc,
51569 +0x7b,0xb2,0x01,0x7c,0x7b,0xb0,0x01,0x3c,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x40,
51570 +0x24,0x02,0x00,0x01,0x10,0xa2,0x00,0x23,0x24,0x02,0x00,0x02,0x10,0xa2,0x00,0x1f,
51571 +0x24,0x02,0x00,0x03,0x10,0xa2,0x00,0x1a,0x00,0x00,0x00,0x00,0x02,0x20,0x90,0x21,
51572 +0x12,0x40,0xff,0xf1,0x00,0x00,0x88,0x21,0x27,0xb4,0x00,0x10,0x02,0x91,0x10,0x21,
51573 +0x90,0x44,0x00,0x00,0x0c,0x00,0x09,0x0a,0x00,0x00,0x00,0x00,0x02,0x51,0x20,0x23,
51574 +0x24,0x84,0xff,0xff,0x30,0x84,0x00,0xff,0x02,0xa0,0x28,0x21,0x0c,0x00,0x08,0xfb,
51575 +0x00,0x40,0x80,0x21,0x02,0x02,0x00,0x18,0x8e,0x63,0x00,0x00,0x26,0x22,0x00,0x01,
51576 +0x30,0x51,0x00,0xff,0x02,0x32,0x20,0x2b,0x00,0x00,0x80,0x12,0x00,0x70,0x18,0x21,
51577 +0x14,0x80,0xff,0xee,0xae,0x63,0x00,0x00,0x08,0x00,0x08,0xce,0x00,0x00,0x00,0x00,
51578 +0x80,0x82,0x00,0x00,0x08,0x00,0x08,0xce,0xae,0x62,0x00,0x00,0x08,0x00,0x08,0xdb,
51579 +0x24,0x15,0x00,0x10,0x08,0x00,0x08,0xdb,0x24,0x15,0x00,0x0a,0x30,0x84,0x00,0xff,
51580 +0x30,0xa5,0x00,0xff,0x24,0x06,0x00,0x01,0x10,0x80,0x00,0x09,0x00,0x00,0x10,0x21,
51581 +0x00,0xc5,0x00,0x18,0x24,0x42,0x00,0x01,0x30,0x42,0x00,0xff,0x00,0x44,0x18,0x2b,
51582 +0x00,0x00,0x30,0x12,0x00,0x00,0x00,0x00,0x14,0x60,0xff,0xfa,0x00,0xc5,0x00,0x18,
51583 +0x03,0xe0,0x00,0x08,0x00,0xc0,0x10,0x21,0x30,0x84,0x00,0xff,0x24,0x83,0xff,0xd0,
51584 +0x30,0x62,0x00,0xff,0x2c,0x42,0x00,0x0a,0x14,0x40,0x00,0x06,0x00,0x00,0x00,0x00,
51585 +0x24,0x82,0xff,0xbf,0x2c,0x42,0x00,0x06,0x14,0x40,0x00,0x02,0x24,0x83,0xff,0xc9,
51586 +0x24,0x83,0xff,0xa9,0x03,0xe0,0x00,0x08,0x00,0x60,0x10,0x21,0x27,0xbd,0xff,0xc8,
51587 +0x24,0x02,0x00,0x01,0xaf,0xbf,0x00,0x30,0xaf,0xb5,0x00,0x2c,0xaf,0xb4,0x00,0x28,
51588 +0xaf,0xb3,0x00,0x24,0xaf,0xb2,0x00,0x20,0xaf,0xb1,0x00,0x1c,0x10,0xa2,0x00,0x3e,
51589 +0xaf,0xb0,0x00,0x18,0x24,0x02,0x00,0x02,0x10,0xa2,0x00,0x08,0x24,0x05,0x00,0x01,
51590 +0x00,0x00,0x10,0x21,0x8f,0xbf,0x00,0x30,0x7b,0xb4,0x01,0x7c,0x7b,0xb2,0x01,0x3c,
51591 +0x7b,0xb0,0x00,0xfc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x38,0x8c,0xc4,0x00,0x04,
51592 +0x0c,0x00,0x08,0xb6,0x27,0xa6,0x00,0x10,0x8f,0xa2,0x00,0x10,0x00,0x00,0x00,0x00,
51593 +0x28,0x42,0x00,0x65,0x14,0x40,0x00,0x06,0x00,0x00,0x00,0x00,0x3c,0x04,0x80,0x01,
51594 +0x0c,0x00,0x1a,0x7e,0x24,0x84,0x04,0xbc,0x08,0x00,0x09,0x25,0x24,0x02,0x00,0x01,
51595 +0x3c,0x04,0x80,0x01,0x0c,0x00,0x1a,0x7e,0x24,0x84,0x04,0xc8,0x8f,0x83,0x83,0xa4,
51596 +0x3c,0x02,0x80,0x00,0x24,0x42,0x2c,0x80,0x10,0x62,0xff,0xe5,0x00,0x40,0x90,0x21,
51597 +0x3c,0x13,0x80,0x01,0x27,0x95,0x83,0x90,0x3c,0x14,0x80,0x01,0x27,0x90,0x83,0x94,
51598 +0x00,0x00,0x88,0x21,0x8e,0x03,0x00,0x08,0x8f,0xa2,0x00,0x10,0x00,0x00,0x00,0x00,
51599 +0x10,0x62,0x00,0x08,0x26,0x64,0x04,0xd4,0x26,0x10,0x00,0x18,0x8e,0x02,0x00,0x10,
51600 +0x00,0x00,0x00,0x00,0x14,0x52,0xff,0xf7,0x26,0x31,0x00,0x18,0x08,0x00,0x09,0x25,
51601 +0x00,0x00,0x10,0x21,0x0c,0x00,0x1a,0x7e,0x00,0x00,0x00,0x00,0x02,0x35,0x10,0x21,
51602 +0x8c,0x44,0x00,0x00,0x0c,0x00,0x1a,0x7e,0x00,0x00,0x00,0x00,0x0c,0x00,0x1a,0x7e,
51603 +0x26,0x84,0x04,0xd8,0x8e,0x04,0x00,0x00,0x0c,0x00,0x1a,0x7e,0x26,0x10,0x00,0x18,
51604 +0x08,0x00,0x09,0x4b,0x00,0x00,0x00,0x00,0x3c,0x04,0x80,0x01,0x0c,0x00,0x1a,0x7e,
51605 +0x24,0x84,0x04,0xdc,0x3c,0x04,0x80,0x01,0x0c,0x00,0x1a,0x6b,0x24,0x84,0x04,0xec,
51606 +0x24,0x11,0x00,0x05,0x3c,0x12,0x80,0x01,0x27,0x90,0x88,0x0e,0x86,0x05,0x00,0x00,
51607 +0x26,0x44,0x05,0x0c,0x0c,0x00,0x1a,0x6b,0x26,0x31,0xff,0xff,0x06,0x21,0xff,0xfb,
51608 +0x26,0x10,0xff,0xfe,0x08,0x00,0x09,0x25,0x00,0x00,0x10,0x21,0x27,0xbd,0xff,0xd0,
51609 +0x28,0xa2,0x00,0x02,0xaf,0xb1,0x00,0x1c,0xaf,0xb0,0x00,0x18,0xaf,0xbf,0x00,0x2c,
51610 +0xaf,0xb4,0x00,0x28,0xaf,0xb3,0x00,0x24,0xaf,0xb2,0x00,0x20,0x00,0xa0,0x80,0x21,
51611 +0x14,0x40,0x00,0x51,0x00,0xc0,0x88,0x21,0x8c,0xc4,0x00,0x04,0x24,0x05,0x00,0x02,
51612 +0x0c,0x00,0x08,0xb6,0x27,0xa6,0x00,0x10,0x24,0x02,0x00,0x02,0x12,0x02,0x00,0x48,
51613 +0x24,0x05,0x00,0x01,0x8e,0x24,0x00,0x08,0x0c,0x00,0x08,0xb6,0x27,0xa6,0x00,0x14,
51614 +0x8f,0xa2,0x00,0x14,0x00,0x00,0x00,0x00,0x30,0x42,0x0f,0xff,0xaf,0xa2,0x00,0x14,
51615 +0x7b,0xa4,0x00,0xbc,0x0c,0x00,0x0a,0x06,0x24,0x06,0x00,0x04,0x24,0x03,0x00,0x04,
51616 +0x10,0x43,0x00,0x2a,0x24,0x04,0x00,0x04,0x8f,0xa2,0x00,0x10,0x3c,0x04,0x80,0x01,
51617 +0x24,0x84,0x05,0x10,0x00,0x02,0x19,0x02,0x00,0x03,0x81,0x00,0x8f,0xa3,0x00,0x14,
51618 +0x00,0x50,0x10,0x23,0x00,0x02,0x10,0x82,0x00,0x62,0x18,0x21,0x0c,0x00,0x1a,0x7e,
51619 +0xaf,0xa3,0x00,0x14,0x3c,0x04,0x80,0x01,0x0c,0x00,0x1a,0x7e,0x24,0x84,0x05,0x38,
51620 +0x8f,0xa2,0x00,0x14,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x17,0x00,0x00,0x88,0x21,
51621 +0x3c,0x13,0x80,0x01,0x3c,0x12,0x80,0x01,0x3c,0x14,0x80,0x01,0x0c,0x00,0x2e,0x24,
51622 +0x24,0x04,0x27,0x10,0x32,0x23,0x00,0x03,0x02,0x00,0x28,0x21,0x10,0x60,0x00,0x1c,
51623 +0x26,0x64,0x05,0x64,0x8f,0xa2,0x00,0x10,0x00,0x00,0x00,0x00,0x02,0x02,0x10,0x23,
51624 +0x28,0x42,0xff,0xfd,0x10,0x40,0x00,0x10,0x26,0x44,0x05,0x70,0x0c,0x00,0x1a,0x7e,
51625 +0x26,0x10,0x00,0x04,0x8f,0xa2,0x00,0x14,0x26,0x31,0x00,0x01,0x02,0x22,0x10,0x2b,
51626 +0x14,0x40,0xff,0xee,0x00,0x00,0x00,0x00,0x00,0x00,0x20,0x21,0x8f,0xbf,0x00,0x2c,
51627 +0x8f,0xb4,0x00,0x28,0x7b,0xb2,0x01,0x3c,0x7b,0xb0,0x00,0xfc,0x00,0x80,0x10,0x21,
51628 +0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x30,0x8e,0x05,0x00,0x00,0x26,0x84,0x05,0x74,
51629 +0x0c,0x00,0x1a,0x6b,0x26,0x10,0x00,0x04,0x08,0x00,0x09,0xb1,0x00,0x00,0x00,0x00,
51630 +0x0c,0x00,0x1a,0x6b,0x00,0x00,0x00,0x00,0x08,0x00,0x09,0xa9,0x00,0x00,0x00,0x00,
51631 +0x08,0x00,0x09,0x87,0x24,0x02,0x00,0x01,0x0c,0x00,0x0b,0x2b,0x00,0x00,0x00,0x00,
51632 +0x08,0x00,0x09,0xb7,0x24,0x04,0x00,0x04,0x27,0xbd,0xff,0xd0,0x28,0xa2,0x00,0x03,
51633 +0xaf,0xb1,0x00,0x24,0xaf,0xb0,0x00,0x20,0xaf,0xbf,0x00,0x28,0x00,0xa0,0x88,0x21,
51634 +0x10,0x40,0x00,0x09,0x00,0xc0,0x80,0x21,0x0c,0x00,0x0b,0x2b,0x00,0x00,0x00,0x00,
51635 +0x24,0x04,0x00,0x04,0x8f,0xbf,0x00,0x28,0x7b,0xb0,0x01,0x3c,0x00,0x80,0x10,0x21,
51636 +0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x30,0x8c,0xc4,0x00,0x04,0x24,0x05,0x00,0x02,
51637 +0x0c,0x00,0x08,0xb6,0x27,0xa6,0x00,0x10,0x8e,0x04,0x00,0x08,0x24,0x05,0x00,0x02,
51638 +0x0c,0x00,0x08,0xb6,0x27,0xa6,0x00,0x14,0x24,0x02,0x00,0x03,0x12,0x22,0x00,0x1b,
51639 +0x24,0x05,0x00,0x01,0x8e,0x04,0x00,0x0c,0x0c,0x00,0x08,0xb6,0x27,0xa6,0x00,0x18,
51640 +0x8f,0xa4,0x00,0x10,0x8f,0xa5,0x00,0x18,0x0c,0x00,0x0a,0x06,0x24,0x06,0x00,0x04,
51641 +0x24,0x03,0x00,0x04,0x10,0x43,0xff,0xe7,0x24,0x04,0x00,0x04,0x8f,0xa2,0x00,0x18,
51642 +0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x0b,0x00,0x00,0x28,0x21,0x8f,0xa2,0x00,0x10,
51643 +0x8f,0xa4,0x00,0x14,0x24,0xa5,0x00,0x01,0xac,0x44,0x00,0x00,0x8f,0xa3,0x00,0x10,
51644 +0x8f,0xa2,0x00,0x18,0x24,0x63,0x00,0x04,0x00,0xa2,0x10,0x2b,0x14,0x40,0xff,0xf7,
51645 +0xaf,0xa3,0x00,0x10,0x08,0x00,0x09,0xd9,0x00,0x00,0x20,0x21,0x24,0x02,0x00,0x01,
51646 +0x08,0x00,0x09,0xec,0xaf,0xa2,0x00,0x18,0x30,0xc6,0x00,0xff,0x00,0xa6,0x00,0x18,
51647 +0x00,0x00,0x28,0x12,0x04,0x81,0x00,0x07,0x00,0x00,0x30,0x21,0x3c,0x02,0x80,0x01,
51648 +0x00,0x85,0x18,0x21,0x34,0x42,0x7f,0xff,0x00,0x43,0x10,0x2b,0x10,0x40,0x00,0x0b,
51649 +0x3c,0x02,0xb0,0x03,0x3c,0x02,0xaf,0xff,0x34,0x42,0xff,0xff,0x00,0x44,0x10,0x2b,
51650 +0x10,0x40,0x00,0x17,0x3c,0x02,0xb0,0x0a,0x00,0x85,0x18,0x21,0x34,0x42,0xff,0xff,
51651 +0x00,0x43,0x10,0x2b,0x14,0x40,0x00,0x12,0x3c,0x02,0xb0,0x03,0x34,0x42,0xff,0xff,
51652 +0x00,0x44,0x10,0x2b,0x10,0x40,0x00,0x06,0x3c,0x02,0xb0,0x07,0x3c,0x02,0xb0,0x04,
51653 +0x34,0x42,0xff,0xff,0x00,0x43,0x10,0x2b,0x10,0x40,0x00,0x09,0x3c,0x02,0xb0,0x07,
51654 +0x34,0x42,0x00,0x3f,0x00,0x44,0x10,0x2b,0x10,0x40,0x00,0x06,0x3c,0x02,0xb0,0x07,
51655 +0x34,0x42,0xff,0xff,0x00,0x43,0x10,0x2b,0x14,0x40,0x00,0x02,0x00,0x00,0x00,0x00,
51656 +0x24,0x06,0x00,0x01,0x14,0xc0,0x00,0x11,0x24,0x02,0x00,0x04,0x3c,0x02,0xb0,0x08,
51657 +0x34,0x42,0x0f,0xff,0x00,0x44,0x10,0x2b,0x14,0x40,0x00,0x08,0x3c,0x02,0x4f,0xf7,
51658 +0x00,0x85,0x20,0x21,0x34,0x42,0xf0,0x00,0x00,0x82,0x20,0x21,0x34,0x03,0xef,0xff,
51659 +0x00,0x64,0x18,0x2b,0x14,0x60,0x00,0x02,0x00,0x00,0x00,0x00,0x24,0x06,0x00,0x02,
51660 +0x10,0xc0,0x00,0x02,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x04,0x03,0xe0,0x00,0x08,
51661 +0x00,0x00,0x00,0x00,0x27,0xbd,0xff,0xe0,0x24,0x02,0x00,0x02,0xaf,0xb0,0x00,0x18,
51662 +0xaf,0xbf,0x00,0x1c,0x10,0xa2,0x00,0x23,0x00,0xc0,0x80,0x21,0x28,0xa2,0x00,0x03,
51663 +0x10,0x40,0x00,0x0c,0x24,0x02,0x00,0x03,0x24,0x02,0x00,0x01,0x10,0xa2,0x00,0x04,
51664 +0x00,0x00,0x18,0x21,0x0c,0x00,0x0b,0x2b,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x21,
51665 +0x8f,0xbf,0x00,0x1c,0x8f,0xb0,0x00,0x18,0x00,0x60,0x10,0x21,0x03,0xe0,0x00,0x08,
51666 +0x27,0xbd,0x00,0x20,0x14,0xa2,0xff,0xf7,0x24,0x05,0x00,0x01,0x8c,0xc4,0x00,0x04,
51667 +0x0c,0x00,0x08,0xb6,0x27,0xa6,0x00,0x10,0x8e,0x04,0x00,0x08,0x24,0x05,0x00,0x02,
51668 +0x0c,0x00,0x08,0xb6,0x27,0xa6,0x00,0x14,0x8f,0xa4,0x00,0x10,0x00,0x00,0x00,0x00,
51669 +0x2c,0x82,0x00,0x0b,0x10,0x40,0xff,0xee,0x24,0x03,0x00,0x04,0x00,0x04,0x10,0x80,
51670 +0x8f,0xa4,0x00,0x14,0x27,0x83,0x94,0xc0,0x00,0x43,0x10,0x21,0x08,0x00,0x0a,0x4f,
51671 +0xac,0x44,0x00,0x00,0x8c,0xc4,0x00,0x04,0x24,0x05,0x00,0x01,0x0c,0x00,0x08,0xb6,
51672 +0x27,0xa6,0x00,0x10,0x8f,0xa5,0x00,0x10,0x27,0x83,0x94,0xc0,0x3c,0x04,0x80,0x01,
51673 +0x00,0x05,0x10,0x80,0x00,0x43,0x10,0x21,0x8c,0x46,0x00,0x00,0x0c,0x00,0x1a,0x6b,
51674 +0x24,0x84,0x05,0x7c,0x08,0x00,0x0a,0x50,0x00,0x00,0x18,0x21,0x03,0xe0,0x00,0x08,
51675 +0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,
51676 +0x00,0x00,0x00,0x00,0x27,0xbd,0xff,0xb8,0x28,0xa5,0x00,0x04,0xaf,0xb0,0x00,0x20,
51677 +0xaf,0xbf,0x00,0x40,0xaf,0xb7,0x00,0x3c,0xaf,0xb6,0x00,0x38,0xaf,0xb5,0x00,0x34,
51678 +0xaf,0xb4,0x00,0x30,0xaf,0xb3,0x00,0x2c,0xaf,0xb2,0x00,0x28,0xaf,0xb1,0x00,0x24,
51679 +0x10,0xa0,0x00,0x0b,0x00,0xc0,0x80,0x21,0x0c,0x00,0x0b,0x2b,0x00,0x00,0x00,0x00,
51680 +0x24,0x02,0x00,0x04,0x8f,0xbf,0x00,0x40,0x7b,0xb6,0x01,0xfc,0x7b,0xb4,0x01,0xbc,
51681 +0x7b,0xb2,0x01,0x7c,0x7b,0xb0,0x01,0x3c,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x48,
51682 +0x8c,0xc4,0x00,0x04,0x24,0x05,0x00,0x01,0x0c,0x00,0x08,0xb6,0x27,0xa6,0x00,0x10,
51683 +0x8e,0x04,0x00,0x08,0x24,0x05,0x00,0x01,0x0c,0x00,0x08,0xb6,0x27,0xa6,0x00,0x14,
51684 +0x8e,0x04,0x00,0x0c,0x24,0x05,0x00,0x01,0x0c,0x00,0x08,0xb6,0x27,0xa6,0x00,0x18,
51685 +0x8f,0xa3,0x00,0x18,0x00,0x00,0x00,0x00,0x10,0x60,0x00,0x3a,0x24,0x02,0x00,0x01,
51686 +0x10,0x62,0x00,0x33,0x3c,0x04,0x80,0x01,0x97,0xb0,0x00,0x12,0x8f,0xa2,0x00,0x14,
51687 +0x00,0x00,0x00,0x00,0x02,0x02,0x10,0x2b,0x10,0x40,0xff,0xe2,0x3c,0x15,0x80,0x01,
51688 +0x3c,0x02,0x80,0x01,0x24,0x52,0x05,0xbc,0x3c,0x14,0xb0,0x06,0x24,0x13,0x00,0x01,
51689 +0x3c,0x17,0xb0,0x08,0x3c,0x16,0x80,0x01,0x32,0x02,0x00,0x01,0x02,0x00,0x28,0x21,
51690 +0x10,0x40,0x00,0x1f,0x26,0xa4,0x05,0xb0,0x8f,0xa3,0x00,0x18,0x00,0x10,0x10,0xc0,
51691 +0x00,0x54,0x10,0x21,0x10,0x60,0x00,0x14,0x02,0x40,0x20,0x21,0x00,0x10,0x10,0xc0,
51692 +0x00,0x57,0x10,0x21,0x10,0x73,0x00,0x09,0x26,0xc4,0x05,0xc4,0x8f,0xa2,0x00,0x14,
51693 +0x26,0x03,0x00,0x01,0x30,0x70,0xff,0xff,0x02,0x02,0x10,0x2b,0x14,0x40,0xff,0xee,
51694 +0x00,0x00,0x00,0x00,0x08,0x00,0x0a,0x8d,0x00,0x00,0x00,0x00,0x8c,0x51,0x00,0x00,
51695 +0x00,0x00,0x00,0x00,0x32,0x25,0x00,0xff,0x0c,0x00,0x1a,0x6b,0x00,0x00,0x00,0x00,
51696 +0x08,0x00,0x0a,0xbf,0x00,0x00,0x00,0x00,0x8c,0x51,0x00,0x00,0x0c,0x00,0x1a,0x6b,
51697 +0x00,0x11,0x2c,0x02,0x32,0x25,0x00,0xff,0x08,0x00,0x0a,0xca,0x02,0x40,0x20,0x21,
51698 +0x0c,0x00,0x1a,0x6b,0x00,0x00,0x00,0x00,0x08,0x00,0x0a,0xb6,0x00,0x00,0x00,0x00,
51699 +0x24,0x84,0x05,0x90,0x0c,0x00,0x1a,0x7e,0x00,0x00,0x00,0x00,0x08,0x00,0x0a,0xa6,
51700 +0x00,0x00,0x00,0x00,0x3c,0x04,0x80,0x01,0x08,0x00,0x0a,0xd9,0x24,0x84,0x05,0xd0,
51701 +0x00,0xa0,0x10,0x21,0x27,0xbd,0xff,0xd8,0x28,0x42,0x00,0x04,0xaf,0xb0,0x00,0x20,
51702 +0xaf,0xbf,0x00,0x24,0x00,0xc0,0x80,0x21,0x24,0x05,0x00,0x01,0x10,0x40,0x00,0x08,
51703 +0x27,0xa6,0x00,0x10,0x0c,0x00,0x0b,0x2b,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x04,
51704 +0x8f,0xbf,0x00,0x24,0x8f,0xb0,0x00,0x20,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x28,
51705 +0x8e,0x04,0x00,0x04,0x0c,0x00,0x08,0xb6,0x00,0x00,0x00,0x00,0x8e,0x04,0x00,0x08,
51706 +0x24,0x05,0x00,0x01,0x0c,0x00,0x08,0xb6,0x27,0xa6,0x00,0x14,0x8e,0x04,0x00,0x0c,
51707 +0x24,0x05,0x00,0x01,0x0c,0x00,0x08,0xb6,0x27,0xa6,0x00,0x18,0x08,0x00,0x0a,0xec,
51708 +0x24,0x02,0x00,0x01,0x24,0x03,0x00,0x01,0x00,0x65,0x10,0x2a,0x27,0xbd,0xff,0xd8,
51709 +0x00,0xa0,0x40,0x21,0x10,0x40,0x00,0x0b,0x00,0xc0,0x38,0x21,0x00,0x03,0x20,0x80,
51710 +0x00,0x87,0x10,0x21,0x8c,0x45,0x00,0x00,0x24,0x63,0x00,0x01,0x30,0x63,0x00,0xff,
51711 +0x8c,0xa6,0x00,0x00,0x00,0x9d,0x20,0x21,0x00,0x68,0x10,0x2a,0x14,0x40,0xff,0xf7,
51712 +0xac,0x86,0xff,0xfc,0x8f,0xa3,0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x60,0x00,0x0b,
51713 +0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0x62,0x00,0x03,0x00,0x00,0x00,0x00,
51714 +0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x28,0x93,0xa2,0x00,0x07,0x00,0x00,0x00,0x00,
51715 +0xa3,0x82,0x87,0x6c,0x08,0x00,0x0b,0x14,0x00,0x00,0x00,0x00,0x93,0xa2,0x00,0x07,
51716 +0x00,0x00,0x00,0x00,0xa3,0x82,0x94,0xb0,0x08,0x00,0x0b,0x14,0x00,0x00,0x00,0x00,
51717 +0x27,0xbd,0xff,0xe8,0x3c,0x04,0x80,0x01,0xaf,0xbf,0x00,0x10,0x18,0xa0,0x00,0x03,
51718 +0x24,0x84,0x05,0xf8,0x0c,0x00,0x1a,0x7e,0x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x10,
51719 +0x24,0x02,0x00,0x01,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x27,0xbd,0xff,0xe8,
51720 +0xaf,0xb0,0x00,0x10,0x00,0x80,0x80,0x21,0x3c,0x04,0x80,0x01,0xaf,0xbf,0x00,0x14,
51721 +0x0c,0x00,0x1a,0x7e,0x24,0x84,0x06,0x0c,0x00,0x10,0x10,0x40,0x00,0x50,0x10,0x21,
51722 +0x27,0x83,0x83,0x90,0x00,0x02,0x10,0xc0,0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x08,
51723 +0x0c,0x00,0x1a,0x7e,0x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x14,0x8f,0xb0,0x00,0x10,
51724 +0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,
51725 +0x34,0x63,0x00,0x20,0x24,0x42,0x2c,0xf8,0x3c,0x04,0xb0,0x03,0xac,0x62,0x00,0x00,
51726 +0x34,0x84,0x00,0x2c,0x8c,0x86,0x00,0x00,0x3c,0x05,0xb0,0x0a,0x34,0xa5,0x1a,0x00,
51727 +0x00,0x06,0x1a,0x02,0x30,0x63,0x0f,0xff,0x00,0x06,0x25,0x02,0x24,0x02,0xff,0xff,
51728 +0xac,0xa2,0x00,0x00,0xa7,0x83,0xc5,0x4a,0xa7,0x84,0xc5,0x4c,0xa3,0x86,0xc5,0x48,
51729 +0xa7,0x80,0xc5,0x40,0xa7,0x80,0xc5,0x42,0xa7,0x80,0xc5,0x44,0xa7,0x80,0xc5,0x46,
51730 +0x00,0xa0,0x38,0x21,0x24,0x03,0x00,0x01,0x8c,0xe2,0x00,0x00,0x00,0x00,0x00,0x00,
51731 +0x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,0x34,0x42,0x0a,0x00,0x8c,0x45,0x00,0x00,
51732 +0x3c,0x04,0xb0,0x0a,0x34,0x84,0x1a,0x00,0xa0,0x45,0x00,0x00,0x24,0x03,0x00,0x01,
51733 +0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,
51734 +0x34,0x42,0x0a,0x00,0x3c,0x04,0xb0,0x0a,0xa0,0x45,0x00,0x00,0x34,0x84,0x1a,0x00,
51735 +0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,
51736 +0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,0x3c,0x04,0xb0,0x03,0x34,0x63,0x01,0x08,
51737 +0x34,0x84,0x01,0x18,0x8c,0x65,0x00,0x00,0x8c,0x82,0x00,0x00,0xaf,0x85,0xc5,0x50,
51738 +0x30,0x42,0x02,0x00,0x10,0x40,0x00,0x06,0x3c,0x02,0x00,0x0f,0x3c,0x02,0x00,0x4c,
51739 +0x34,0x42,0x4b,0x40,0xaf,0x82,0xc5,0x54,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
51740 +0x08,0x00,0x0b,0x79,0x34,0x42,0x42,0x40,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,
51741 +0x34,0x63,0x00,0x20,0x24,0x42,0x2d,0xf8,0x30,0x84,0x00,0xff,0xac,0x62,0x00,0x00,
51742 +0x14,0x80,0x02,0xb3,0x24,0x02,0x00,0x02,0x3c,0x03,0xb0,0x0a,0x34,0x63,0x1b,0x40,
51743 +0x24,0x02,0xff,0xff,0xac,0x62,0x00,0x00,0x00,0x60,0x20,0x21,0x24,0x03,0x00,0x01,
51744 +0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,
51745 +0x34,0x42,0x0b,0x40,0x8c,0x46,0x00,0x00,0x3c,0x03,0xb0,0x0a,0x34,0x63,0x1b,0x48,
51746 +0x24,0x02,0xff,0xff,0xac,0x62,0x00,0x00,0x00,0x60,0x20,0x21,0x00,0x06,0x54,0x02,
51747 +0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,
51748 +0x3c,0x02,0xb0,0x0a,0x34,0x42,0x0b,0x48,0x8c,0x46,0x00,0x00,0x3c,0x03,0xb0,0x0a,
51749 +0x34,0x63,0x1b,0x50,0x24,0x02,0xff,0xff,0xac,0x62,0x00,0x00,0x00,0x60,0x20,0x21,
51750 +0x00,0x06,0x64,0x02,0x30,0xcb,0xff,0xff,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,
51751 +0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,0x34,0x42,0x0b,0x50,
51752 +0x8c,0x46,0x00,0x00,0x97,0x84,0xc5,0x40,0x97,0x82,0xc5,0x42,0x97,0x83,0xc5,0x46,
51753 +0x01,0x44,0x20,0x23,0x01,0x62,0x10,0x23,0x00,0x82,0x20,0x21,0x97,0x82,0xc5,0x44,
51754 +0x30,0xcd,0xff,0xff,0x01,0xa3,0x18,0x23,0x01,0x82,0x10,0x23,0x00,0x82,0x20,0x21,
51755 +0x93,0x82,0xc5,0x48,0x00,0x83,0x20,0x21,0x30,0x84,0xff,0xff,0x00,0x82,0x10,0x2b,
51756 +0x10,0x40,0x00,0xec,0x3c,0x03,0xb0,0x0a,0x34,0x63,0x18,0xa0,0x24,0x02,0xff,0xff,
51757 +0xac,0x62,0x00,0x00,0x00,0x60,0x20,0x21,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,
51758 +0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,0x34,0x42,0x08,0xa0,
51759 +0x8c,0x46,0x00,0x00,0x24,0x02,0x00,0x20,0x30,0xc8,0x00,0x7f,0x11,0x02,0x00,0x4d,
51760 +0x2d,0x02,0x00,0x21,0x14,0x40,0x00,0x2b,0x24,0x02,0xff,0x80,0x00,0xc2,0x10,0x24,
51761 +0x25,0x08,0xff,0xff,0x3c,0x03,0xb0,0x0a,0x34,0x63,0x08,0xa0,0x00,0x48,0x30,0x25,
51762 +0x3c,0x04,0xb0,0x0a,0xac,0x66,0x00,0x00,0x34,0x84,0x18,0xa0,0x24,0x03,0x00,0x01,
51763 +0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,
51764 +0x34,0x42,0x08,0xb0,0x3c,0x04,0xb0,0x0a,0xac,0x46,0x00,0x00,0x34,0x84,0x18,0xb0,
51765 +0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,
51766 +0x3c,0x02,0xb0,0x0a,0x34,0x42,0x08,0xc0,0x3c,0x04,0xb0,0x0a,0xac,0x46,0x00,0x00,
51767 +0x34,0x84,0x18,0xc0,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,
51768 +0x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,0x34,0x42,0x08,0xd0,0x3c,0x04,0xb0,0x0a,
51769 +0xac,0x46,0x00,0x00,0x34,0x84,0x18,0xd0,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,
51770 +0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x24,0x02,0x00,0x20,0x11,0x02,0x00,0x07,
51771 +0x24,0x02,0xff,0xff,0xa7,0x8a,0xc5,0x40,0xa7,0x8b,0xc5,0x42,0xa7,0x8c,0xc5,0x44,
51772 +0xa7,0x8d,0xc5,0x46,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x0a,
51773 +0x34,0x63,0x14,0x58,0xac,0x62,0x00,0x00,0x00,0x60,0x20,0x21,0x24,0x03,0x00,0x01,
51774 +0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x00,0x00,0x00,0x00,
51775 +0x3c,0x03,0xb0,0x0a,0x34,0x63,0x04,0x58,0x8c,0x69,0x00,0x00,0x3c,0x02,0xff,0xff,
51776 +0x34,0x42,0x3f,0xff,0x01,0x22,0x10,0x24,0x34,0x49,0x80,0x00,0x3c,0x04,0xb0,0x0a,
51777 +0xac,0x69,0x00,0x00,0x34,0x84,0x14,0x58,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,
51778 +0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x00,0x00,0x00,0x00,0x08,0x00,0x0b,0xf9,
51779 +0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x0a,0x34,0x63,0x14,0x58,0x24,0x02,0xff,0xff,
51780 +0xac,0x62,0x00,0x00,0x00,0x60,0x20,0x21,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,
51781 +0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,0x34,0x42,0x04,0x58,
51782 +0x8c,0x49,0x00,0x00,0x3c,0x04,0xb0,0x0a,0x34,0x84,0x14,0x58,0x35,0x29,0x40,0x00,
51783 +0xac,0x49,0x00,0x00,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,
51784 +0x14,0x43,0xff,0xfd,0x24,0x02,0xff,0xff,0x3c,0x03,0xb0,0x0a,0x34,0x63,0x14,0xb0,
51785 +0xac,0x62,0x00,0x00,0x00,0x60,0x20,0x21,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,
51786 +0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,0x34,0x42,0x04,0xb0,
51787 +0x8c,0x47,0x00,0x00,0x3c,0x03,0xb0,0x0a,0x34,0x63,0x14,0xb8,0x3c,0x05,0xb0,0x0a,
51788 +0x24,0x02,0xff,0xff,0xac,0x62,0x00,0x00,0x34,0xa5,0x14,0xb8,0x00,0x07,0x1e,0x02,
51789 +0x24,0x04,0x00,0x01,0x8c,0xa2,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x44,0xff,0xfd,
51790 +0x3c,0x02,0xb0,0x0a,0x34,0x42,0x04,0xb8,0x8c,0x47,0x00,0x00,0x00,0x03,0x1a,0x00,
51791 +0x30,0xe2,0x00,0xff,0x00,0x62,0x18,0x25,0x2c,0x62,0x00,0x04,0x10,0x40,0x00,0x3a,
51792 +0x2c,0x62,0x00,0x11,0x3c,0x03,0xb0,0x0a,0x34,0x63,0x14,0x10,0x24,0x02,0xff,0xff,
51793 +0xac,0x62,0x00,0x00,0x00,0x60,0x20,0x21,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,
51794 +0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,0x34,0x42,0x04,0x10,
51795 +0x8c,0x47,0x00,0x00,0x24,0x02,0x00,0x03,0x00,0x07,0x1d,0x82,0x30,0x64,0x00,0x03,
51796 +0x10,0x82,0x00,0x1a,0x3c,0x02,0xff,0x3f,0x3c,0x02,0xff,0xff,0x34,0x42,0x3f,0xff,
51797 +0x3c,0x03,0xb0,0x0a,0x34,0x63,0x04,0x58,0x01,0x22,0x48,0x24,0x3c,0x04,0xb0,0x0a,
51798 +0xac,0x69,0x00,0x00,0x34,0x84,0x14,0x58,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,
51799 +0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,0x35,0x29,0x80,0x00,
51800 +0x34,0x42,0x04,0x58,0x3c,0x04,0xb0,0x0a,0xac,0x49,0x00,0x00,0x34,0x84,0x14,0x58,
51801 +0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,
51802 +0x2d,0x02,0x00,0x21,0x08,0x00,0x0b,0xcd,0x00,0x00,0x00,0x00,0x34,0x42,0xff,0xff,
51803 +0x3c,0x03,0x00,0x80,0x00,0xe2,0x10,0x24,0x00,0x43,0x38,0x25,0x3c,0x04,0xb0,0x0a,
51804 +0x3c,0x01,0xb0,0x0a,0xac,0x27,0x04,0x10,0x34,0x84,0x14,0x10,0x24,0x03,0x00,0x01,
51805 +0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x3c,0x02,0xff,0xff,
51806 +0x08,0x00,0x0c,0x60,0x34,0x42,0x3f,0xff,0x14,0x40,0xff,0xd8,0x3c,0x02,0xff,0xff,
51807 +0x3c,0x03,0xb0,0x0a,0x34,0x63,0x14,0x10,0x24,0x02,0xff,0xff,0xac,0x62,0x00,0x00,
51808 +0x00,0x60,0x20,0x21,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,
51809 +0x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,0x34,0x42,0x04,0x10,0x8c,0x47,0x00,0x00,
51810 +0x3c,0x05,0x00,0xc0,0x24,0x03,0x00,0x02,0x00,0xe5,0x10,0x24,0x00,0x02,0x25,0x82,
51811 +0x14,0x83,0xff,0xc6,0x3c,0x02,0xff,0xff,0x3c,0x02,0xff,0x3f,0x34,0x42,0xff,0xff,
51812 +0x00,0xe2,0x10,0x24,0x00,0x45,0x38,0x25,0x3c,0x04,0xb0,0x0a,0x3c,0x01,0xb0,0x0a,
51813 +0xac,0x27,0x04,0x10,0x34,0x84,0x14,0x10,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,
51814 +0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x3c,0x02,0xff,0xff,0x08,0x00,0x0c,0x60,
51815 +0x34,0x42,0x3f,0xff,0x97,0x82,0xc5,0x4c,0x00,0x00,0x00,0x00,0x00,0x44,0x10,0x2b,
51816 +0x10,0x40,0x00,0x74,0x34,0x63,0x18,0xa0,0x24,0x02,0xff,0xff,0xac,0x62,0x00,0x00,
51817 +0x00,0x60,0x20,0x21,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,
51818 +0x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,0x34,0x42,0x08,0xa0,0x8c,0x46,0x00,0x00,
51819 +0x00,0x00,0x00,0x00,0x30,0xc8,0x00,0x7f,0x2d,0x02,0x00,0x32,0x10,0x40,0xff,0x3d,
51820 +0x24,0x02,0x00,0x20,0x11,0x02,0x00,0x2b,0x24,0x02,0xff,0x80,0x00,0xc2,0x10,0x24,
51821 +0x25,0x08,0x00,0x02,0x3c,0x03,0xb0,0x0a,0x34,0x63,0x08,0xa0,0x00,0x48,0x30,0x25,
51822 +0x3c,0x04,0xb0,0x0a,0xac,0x66,0x00,0x00,0x34,0x84,0x18,0xa0,0x24,0x03,0x00,0x01,
51823 +0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,
51824 +0x34,0x42,0x08,0xb0,0x3c,0x04,0xb0,0x0a,0xac,0x46,0x00,0x00,0x34,0x84,0x18,0xb0,
51825 +0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,
51826 +0x3c,0x02,0xb0,0x0a,0x34,0x42,0x08,0xc0,0x3c,0x04,0xb0,0x0a,0xac,0x46,0x00,0x00,
51827 +0x34,0x84,0x18,0xc0,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,
51828 +0x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,0x34,0x42,0x08,0xd0,0x3c,0x04,0xb0,0x0a,
51829 +0xac,0x46,0x00,0x00,0x34,0x84,0x18,0xd0,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,
51830 +0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x00,0x00,0x00,0x00,0x08,0x00,0x0b,0xf9,
51831 +0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x0a,0x34,0x63,0x14,0x10,0x24,0x02,0xff,0xff,
51832 +0xac,0x62,0x00,0x00,0x00,0x60,0x20,0x21,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,
51833 +0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,0x34,0x42,0x04,0x10,
51834 +0x8c,0x47,0x00,0x00,0x3c,0x05,0x00,0xc0,0x24,0x03,0x00,0x03,0x00,0xe5,0x10,0x24,
51835 +0x00,0x02,0x25,0x82,0x10,0x83,0x00,0x0d,0x3c,0x02,0xff,0x3f,0x34,0x42,0xff,0xff,
51836 +0x00,0xe2,0x10,0x24,0x00,0x45,0x38,0x25,0x3c,0x04,0xb0,0x0a,0x3c,0x01,0xb0,0x0a,
51837 +0xac,0x27,0x04,0x10,0x34,0x84,0x14,0x10,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,
51838 +0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x0a,
51839 +0x34,0x63,0x14,0x58,0x24,0x02,0xff,0xff,0xac,0x62,0x00,0x00,0x00,0x60,0x20,0x21,
51840 +0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,
51841 +0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x0a,0x34,0x63,0x04,0x58,0x8c,0x69,0x00,0x00,
51842 +0x3c,0x02,0xff,0xff,0x34,0x42,0x3f,0xff,0x01,0x22,0x48,0x24,0x3c,0x04,0xb0,0x0a,
51843 +0xac,0x69,0x00,0x00,0x34,0x84,0x14,0x58,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,
51844 +0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x24,0x02,0xff,0x80,0x08,0x00,0x0c,0xc0,
51845 +0x00,0xc2,0x10,0x24,0x97,0x82,0xc5,0x4a,0x00,0x00,0x00,0x00,0x00,0x44,0x10,0x2b,
51846 +0x10,0x40,0x00,0x75,0x3c,0x03,0xb0,0x0a,0x34,0x63,0x18,0xa0,0x24,0x02,0xff,0xff,
51847 +0xac,0x62,0x00,0x00,0x00,0x60,0x20,0x21,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,
51848 +0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,0x34,0x42,0x08,0xa0,
51849 +0x8c,0x46,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0xc8,0x00,0x7f,0x2d,0x02,0x00,0x32,
51850 +0x10,0x40,0xfe,0xc4,0x24,0x02,0x00,0x20,0x11,0x02,0x00,0x2b,0x24,0x02,0xff,0x80,
51851 +0x00,0xc2,0x10,0x24,0x25,0x08,0x00,0x01,0x3c,0x03,0xb0,0x0a,0x34,0x63,0x08,0xa0,
51852 +0x00,0x48,0x30,0x25,0x3c,0x04,0xb0,0x0a,0xac,0x66,0x00,0x00,0x34,0x84,0x18,0xa0,
51853 +0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,
51854 +0x3c,0x02,0xb0,0x0a,0x34,0x42,0x08,0xb0,0x3c,0x04,0xb0,0x0a,0xac,0x46,0x00,0x00,
51855 +0x34,0x84,0x18,0xb0,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,
51856 +0x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,0x34,0x42,0x08,0xc0,0x3c,0x04,0xb0,0x0a,
51857 +0xac,0x46,0x00,0x00,0x34,0x84,0x18,0xc0,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,
51858 +0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,0x34,0x42,0x08,0xd0,
51859 +0x3c,0x04,0xb0,0x0a,0xac,0x46,0x00,0x00,0x34,0x84,0x18,0xd0,0x24,0x03,0x00,0x01,
51860 +0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x00,0x00,0x00,0x00,
51861 +0x08,0x00,0x0b,0xf9,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x0a,0x34,0x63,0x14,0x10,
51862 +0x24,0x02,0xff,0xff,0xac,0x62,0x00,0x00,0x00,0x60,0x20,0x21,0x24,0x03,0x00,0x01,
51863 +0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,
51864 +0x34,0x42,0x04,0x10,0x8c,0x47,0x00,0x00,0x3c,0x05,0x00,0xc0,0x24,0x03,0x00,0x03,
51865 +0x00,0xe5,0x10,0x24,0x00,0x02,0x25,0x82,0x10,0x83,0x00,0x0d,0x3c,0x02,0xff,0x3f,
51866 +0x34,0x42,0xff,0xff,0x00,0xe2,0x10,0x24,0x00,0x45,0x38,0x25,0x3c,0x04,0xb0,0x0a,
51867 +0x3c,0x01,0xb0,0x0a,0xac,0x27,0x04,0x10,0x34,0x84,0x14,0x10,0x24,0x03,0x00,0x01,
51868 +0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x00,0x00,0x00,0x00,
51869 +0x3c,0x03,0xb0,0x0a,0x34,0x63,0x14,0x58,0x24,0x02,0xff,0xff,0xac,0x62,0x00,0x00,
51870 +0x00,0x60,0x20,0x21,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,
51871 +0x14,0x43,0xff,0xfd,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x0a,0x34,0x63,0x04,0x58,
51872 +0x8c,0x69,0x00,0x00,0x3c,0x02,0xff,0xff,0x34,0x42,0x3f,0xff,0x01,0x22,0x48,0x24,
51873 +0x3c,0x04,0xb0,0x0a,0xac,0x69,0x00,0x00,0x34,0x84,0x14,0x58,0x24,0x03,0x00,0x01,
51874 +0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x24,0x02,0xff,0x80,
51875 +0x08,0x00,0x0d,0x39,0x00,0xc2,0x10,0x24,0x34,0x63,0x18,0xa0,0x24,0x02,0xff,0xff,
51876 +0xac,0x62,0x00,0x00,0x00,0x60,0x20,0x21,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,
51877 +0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,0x34,0x42,0x08,0xa0,
51878 +0x8c,0x46,0x00,0x00,0x24,0x02,0x00,0x20,0x30,0xc8,0x00,0x7f,0x15,0x02,0xfe,0x51,
51879 +0x24,0x02,0xff,0xff,0x3c,0x03,0xb0,0x0a,0x34,0x63,0x14,0x58,0xac,0x62,0x00,0x00,
51880 +0x00,0x60,0x20,0x21,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,
51881 +0x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,0x34,0x42,0x04,0x58,0x8c,0x49,0x00,0x00,
51882 +0x3c,0x04,0xb0,0x0a,0x34,0x84,0x14,0x58,0x35,0x29,0x40,0x00,0xac,0x49,0x00,0x00,
51883 +0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,
51884 +0x24,0x02,0xff,0xff,0x3c,0x03,0xb0,0x0a,0x34,0x63,0x14,0xb0,0xac,0x62,0x00,0x00,
51885 +0x00,0x60,0x20,0x21,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,
51886 +0x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,0x34,0x42,0x04,0xb0,0x8c,0x47,0x00,0x00,
51887 +0x3c,0x03,0xb0,0x0a,0x34,0x63,0x14,0xb8,0x3c,0x05,0xb0,0x0a,0x24,0x02,0xff,0xff,
51888 +0xac,0x62,0x00,0x00,0x34,0xa5,0x14,0xb8,0x00,0x07,0x1e,0x02,0x24,0x04,0x00,0x01,
51889 +0x8c,0xa2,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x44,0xff,0xfd,0x3c,0x02,0xb0,0x0a,
51890 +0x34,0x42,0x04,0xb8,0x8c,0x47,0x00,0x00,0x00,0x03,0x1a,0x00,0x30,0xe2,0x00,0xff,
51891 +0x00,0x62,0x18,0x25,0x2c,0x62,0x00,0x04,0x10,0x40,0x00,0x3a,0x2c,0x62,0x00,0x11,
51892 +0x3c,0x03,0xb0,0x0a,0x34,0x63,0x14,0x10,0x24,0x02,0xff,0xff,0xac,0x62,0x00,0x00,
51893 +0x00,0x60,0x20,0x21,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,
51894 +0x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,0x34,0x42,0x04,0x10,0x8c,0x47,0x00,0x00,
51895 +0x24,0x02,0x00,0x03,0x00,0x07,0x1d,0x82,0x30,0x64,0x00,0x03,0x10,0x82,0x00,0x1a,
51896 +0x3c,0x02,0xff,0x3f,0x3c,0x02,0xff,0xff,0x34,0x42,0x3f,0xff,0x3c,0x03,0xb0,0x0a,
51897 +0x34,0x63,0x04,0x58,0x01,0x22,0x48,0x24,0x3c,0x04,0xb0,0x0a,0xac,0x69,0x00,0x00,
51898 +0x34,0x84,0x14,0x58,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,
51899 +0x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,0x35,0x29,0x80,0x00,0x34,0x42,0x04,0x58,
51900 +0x3c,0x04,0xb0,0x0a,0xac,0x49,0x00,0x00,0x34,0x84,0x14,0x58,0x24,0x03,0x00,0x01,
51901 +0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x00,0x00,0x00,0x00,
51902 +0x08,0x00,0x0b,0xf9,0x00,0x00,0x00,0x00,0x34,0x42,0xff,0xff,0x3c,0x03,0x00,0x80,
51903 +0x00,0xe2,0x10,0x24,0x00,0x43,0x38,0x25,0x3c,0x03,0xb0,0x0a,0x3c,0x01,0xb0,0x0a,
51904 +0xac,0x27,0x04,0x10,0x34,0x63,0x14,0x10,0x24,0x04,0x00,0x01,0x8c,0x62,0x00,0x00,
51905 +0x00,0x00,0x00,0x00,0x14,0x44,0xff,0xfd,0x3c,0x02,0xff,0xff,0x08,0x00,0x0d,0xef,
51906 +0x34,0x42,0x3f,0xff,0x14,0x40,0xff,0xd8,0x3c,0x02,0xff,0xff,0x3c,0x03,0xb0,0x0a,
51907 +0x34,0x63,0x14,0x10,0x24,0x02,0xff,0xff,0xac,0x62,0x00,0x00,0x00,0x60,0x20,0x21,
51908 +0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,
51909 +0x3c,0x02,0xb0,0x0a,0x34,0x42,0x04,0x10,0x8c,0x47,0x00,0x00,0x3c,0x05,0x00,0xc0,
51910 +0x24,0x03,0x00,0x02,0x00,0xe5,0x10,0x24,0x00,0x02,0x25,0x82,0x14,0x83,0xff,0xc6,
51911 +0x3c,0x02,0xff,0xff,0x3c,0x02,0xff,0x3f,0x34,0x42,0xff,0xff,0x00,0xe2,0x10,0x24,
51912 +0x00,0x45,0x38,0x25,0x3c,0x03,0xb0,0x0a,0x3c,0x01,0xb0,0x0a,0xac,0x27,0x04,0x10,
51913 +0x34,0x63,0x14,0x10,0x24,0x04,0x00,0x01,0x8c,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
51914 +0x14,0x44,0xff,0xfd,0x3c,0x02,0xff,0xff,0x08,0x00,0x0d,0xef,0x34,0x42,0x3f,0xff,
51915 +0x10,0x82,0x00,0x03,0x3c,0x03,0xb0,0x0a,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
51916 +0x34,0x63,0x1a,0x00,0x24,0x02,0xff,0xff,0xac,0x62,0x00,0x00,0x00,0x60,0x20,0x21,
51917 +0xa7,0x80,0xc5,0x40,0xa7,0x80,0xc5,0x42,0xa7,0x80,0xc5,0x44,0xa7,0x80,0xc5,0x46,
51918 +0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,
51919 +0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x0a,0x34,0x63,0x0a,0x00,0x8c,0x66,0x00,0x00,
51920 +0x3c,0x02,0x08,0x00,0x3c,0x04,0xb0,0x0a,0x00,0xc2,0x10,0x25,0xac,0x62,0x00,0x00,
51921 +0x34,0x84,0x1a,0x00,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,
51922 +0x14,0x43,0xff,0xfd,0x3c,0x02,0xf7,0xff,0x3c,0x03,0xb0,0x0a,0x34,0x42,0xff,0xff,
51923 +0x34,0x63,0x0a,0x00,0x00,0xc2,0x10,0x24,0x3c,0x04,0xb0,0x0a,0xac,0x62,0x00,0x00,
51924 +0x34,0x84,0x1a,0x00,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,
51925 +0x14,0x43,0xff,0xfd,0x00,0x00,0x00,0x00,0x08,0x00,0x0e,0x3a,0x00,0x00,0x00,0x00,
51926 +0x30,0x83,0x00,0x03,0x00,0x04,0x20,0x40,0x00,0x83,0x20,0x23,0x3c,0x02,0xb0,0x0a,
51927 +0x00,0x82,0x20,0x21,0xac,0x85,0x00,0x00,0x00,0x00,0x18,0x21,0x24,0x63,0x00,0x01,
51928 +0x2c,0x62,0x27,0x10,0x14,0x40,0xff,0xfe,0x24,0x63,0x00,0x01,0x03,0xe0,0x00,0x08,
51929 +0x24,0x63,0xff,0xff,0x30,0x86,0x00,0x03,0x00,0x04,0x28,0x40,0x3c,0x03,0xb0,0x0a,
51930 +0x00,0xa6,0x10,0x23,0x00,0x43,0x10,0x21,0x24,0x04,0xff,0xff,0xac,0x44,0x10,0x00,
51931 +0x00,0x00,0x18,0x21,0x24,0x63,0x00,0x01,0x2c,0x62,0x27,0x10,0x14,0x40,0xff,0xfe,
51932 +0x24,0x63,0x00,0x01,0x24,0x63,0xff,0xff,0x00,0xa6,0x18,0x23,0x3c,0x02,0xb0,0x0a,
51933 +0x00,0x62,0x18,0x21,0x8c,0x62,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
51934 +0x3c,0x05,0xb0,0x03,0x3c,0x02,0x80,0x00,0x24,0x42,0x3a,0x10,0x24,0x03,0x00,0x01,
51935 +0x34,0xa5,0x00,0x20,0x3c,0x06,0xb0,0x03,0xac,0xa2,0x00,0x00,0x34,0xc6,0x01,0x04,
51936 +0xa0,0x83,0x00,0x48,0xa0,0x80,0x00,0x04,0xa0,0x80,0x00,0x05,0xa0,0x80,0x00,0x06,
51937 +0xa0,0x80,0x00,0x07,0xa0,0x80,0x00,0x08,0xa0,0x80,0x00,0x09,0xa0,0x80,0x00,0x0a,
51938 +0xa0,0x80,0x00,0x11,0xa0,0x80,0x00,0x13,0xa0,0x80,0x00,0x49,0x94,0xc2,0x00,0x00,
51939 +0xac,0x80,0x00,0x00,0xac,0x80,0x00,0x24,0x00,0x02,0x14,0x00,0x00,0x02,0x14,0x03,
51940 +0x30,0x43,0x00,0xff,0x30,0x42,0xff,0x00,0xa4,0x83,0x00,0x46,0xa4,0x82,0x00,0x44,
51941 +0xac,0x80,0x00,0x28,0xac,0x80,0x00,0x2c,0xac,0x80,0x00,0x30,0xac,0x80,0x00,0x34,
51942 +0xac,0x80,0x00,0x38,0xac,0x80,0x00,0x3c,0x03,0xe0,0x00,0x08,0xac,0x80,0x00,0x40,
51943 +0x84,0x83,0x00,0x0c,0x3c,0x07,0xb0,0x03,0x34,0xe7,0x00,0x20,0x00,0x03,0x10,0xc0,
51944 +0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x83,0x99,0x44,0x00,0x43,0x10,0x21,
51945 +0x8c,0x48,0x00,0x18,0x3c,0x02,0x80,0x00,0x24,0x42,0x3a,0xa0,0xac,0xe2,0x00,0x00,
51946 +0x8d,0x03,0x00,0x08,0x80,0x82,0x00,0x13,0x00,0x05,0x2c,0x00,0x00,0x03,0x1e,0x02,
51947 +0x00,0x02,0x12,0x00,0x30,0x63,0x00,0x7e,0x00,0x62,0x18,0x21,0x00,0x65,0x18,0x21,
51948 +0x3c,0x02,0xc0,0x00,0x3c,0x05,0xb0,0x05,0x34,0x42,0x04,0x00,0x24,0x63,0x00,0x01,
51949 +0x3c,0x07,0xb0,0x05,0x3c,0x08,0xb0,0x05,0x34,0xa5,0x04,0x20,0xac,0xa3,0x00,0x00,
51950 +0x00,0xc2,0x30,0x21,0x34,0xe7,0x04,0x24,0x35,0x08,0x02,0x28,0x24,0x02,0x00,0x01,
51951 +0x24,0x03,0x00,0x20,0xac,0xe6,0x00,0x00,0xac,0x82,0x00,0x3c,0x03,0xe0,0x00,0x08,
51952 +0xa1,0x03,0x00,0x00,0x27,0xbd,0xff,0xb0,0x00,0x07,0x60,0x80,0x27,0x82,0xbd,0x40,
51953 +0xaf,0xb7,0x00,0x44,0xaf,0xb6,0x00,0x40,0xaf,0xb5,0x00,0x3c,0xaf,0xb3,0x00,0x34,
51954 +0xaf,0xbf,0x00,0x4c,0xaf,0xbe,0x00,0x48,0xaf,0xb4,0x00,0x38,0xaf,0xb2,0x00,0x30,
51955 +0xaf,0xb1,0x00,0x2c,0xaf,0xb0,0x00,0x28,0x01,0x82,0x10,0x21,0x8c,0x43,0x00,0x00,
51956 +0x00,0xe0,0x70,0x21,0x3c,0x02,0x80,0x00,0x94,0x71,0x00,0x14,0x3c,0x07,0xb0,0x03,
51957 +0x34,0xe7,0x00,0x20,0x24,0x42,0x3b,0x34,0x3c,0x03,0xb0,0x05,0xac,0xe2,0x00,0x00,
51958 +0x34,0x63,0x01,0x28,0x90,0x67,0x00,0x00,0x00,0x11,0xa8,0xc0,0x02,0xb1,0x18,0x21,
51959 +0x27,0x82,0x99,0x44,0x00,0x03,0x18,0x80,0x00,0x62,0x18,0x21,0x00,0x05,0x2c,0x00,
51960 +0x00,0x07,0x3e,0x00,0x28,0xc2,0x00,0x03,0x00,0xc0,0x98,0x21,0xaf,0xa4,0x00,0x50,
51961 +0x00,0x05,0xb4,0x03,0x8c,0x68,0x00,0x18,0x02,0xa0,0x58,0x21,0x10,0x40,0x01,0x70,
51962 +0x00,0x07,0xbe,0x03,0x00,0xd7,0x10,0x07,0x30,0x57,0x00,0x01,0x01,0x71,0x10,0x21,
51963 +0x27,0x83,0x99,0x48,0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x80,0x4d,0x00,0x06,
51964 +0x8d,0x03,0x00,0x00,0x8d,0x02,0x00,0x04,0x8d,0x0a,0x00,0x08,0x8d,0x03,0x00,0x0c,
51965 +0xaf,0xa2,0x00,0x1c,0x11,0xa0,0x01,0x60,0xaf,0xa3,0x00,0x18,0x27,0x82,0xbd,0x40,
51966 +0x01,0x82,0x10,0x21,0x8c,0x44,0x00,0x00,0x00,0x00,0x00,0x00,0x90,0x83,0x00,0x16,
51967 +0x00,0x00,0x00,0x00,0x30,0x63,0x00,0x04,0x14,0x60,0x00,0x14,0x00,0x00,0xa0,0x21,
51968 +0x3c,0x02,0xb0,0x09,0x34,0x42,0x01,0x46,0x90,0x43,0x00,0x00,0x2a,0x64,0x00,0x04,
51969 +0x10,0x80,0x01,0x43,0x30,0x65,0x00,0x01,0x8f,0xa3,0x00,0x50,0x00,0x00,0x00,0x00,
51970 +0x90,0x62,0x00,0x09,0x00,0x00,0x00,0x00,0x12,0x62,0x00,0x02,0x00,0x00,0x00,0x00,
51971 +0x00,0x00,0x28,0x21,0x14,0xa0,0x00,0x03,0x00,0x00,0x38,0x21,0x12,0xe0,0x00,0x03,
51972 +0x38,0xf4,0x00,0x01,0x24,0x07,0x00,0x01,0x38,0xf4,0x00,0x01,0x01,0x71,0x10,0x21,
51973 +0x00,0x02,0x30,0x80,0x27,0x83,0x99,0x50,0x00,0xc3,0x48,0x21,0x91,0x25,0x00,0x00,
51974 +0x8f,0xa3,0x00,0x1c,0x00,0x00,0x00,0x00,0x00,0x03,0x11,0xc3,0x2c,0xa3,0x00,0x04,
51975 +0x30,0x42,0x00,0x01,0x00,0x03,0xa0,0x0b,0x12,0x80,0x00,0xc7,0xaf,0xa2,0x00,0x20,
51976 +0x93,0x90,0xc5,0x2a,0x00,0x0a,0x16,0x42,0x30,0x52,0x00,0x3f,0x2e,0x06,0x00,0x0c,
51977 +0x10,0xc0,0x00,0xaf,0x00,0xa0,0x20,0x21,0x2c,0xa2,0x00,0x10,0x14,0x40,0x00,0x04,
51978 +0x00,0x90,0x10,0x2b,0x30,0xa2,0x00,0x07,0x24,0x44,0x00,0x04,0x00,0x90,0x10,0x2b,
51979 +0x10,0x40,0x00,0x0b,0x01,0x71,0x10,0x21,0x27,0x85,0xc4,0x5c,0x00,0x10,0x10,0x40,
51980 +0x00,0x50,0x10,0x21,0x00,0x45,0x10,0x21,0x90,0x50,0x00,0x00,0x00,0x00,0x00,0x00,
51981 +0x00,0x90,0x18,0x2b,0x14,0x60,0xff,0xfa,0x00,0x10,0x10,0x40,0x01,0x71,0x10,0x21,
51982 +0x00,0x02,0x10,0x80,0x27,0x83,0x99,0x48,0x00,0x43,0x10,0x21,0x31,0xa4,0x00,0x01,
51983 +0x10,0x80,0x00,0x94,0xa0,0x50,0x00,0x07,0x24,0x16,0x00,0x0e,0x24,0x11,0x01,0x06,
51984 +0x27,0x82,0xbd,0x40,0x01,0x82,0x10,0x21,0x8c,0x43,0x00,0x00,0x24,0x1e,0x00,0x01,
51985 +0x00,0x11,0xa8,0xc0,0x90,0x62,0x00,0x16,0x00,0x00,0x00,0x00,0x34,0x42,0x00,0x04,
51986 +0xa0,0x62,0x00,0x16,0x8f,0xa5,0x00,0x1c,0x00,0x10,0x32,0x00,0x00,0x05,0x13,0x43,
51987 +0x30,0x47,0x00,0x01,0x8f,0xa2,0x00,0x18,0x8f,0xa5,0x00,0x20,0x00,0x02,0x22,0x02,
51988 +0x00,0x12,0x10,0x40,0x00,0x05,0x19,0xc0,0x30,0x84,0x07,0xff,0x00,0x47,0x10,0x21,
51989 +0x00,0x1e,0x2a,0x80,0x00,0x43,0x10,0x21,0x00,0x04,0x24,0x80,0x02,0x25,0x28,0x21,
51990 +0x00,0xa4,0x28,0x21,0x00,0x46,0x10,0x21,0x00,0x16,0x1c,0x00,0x3c,0x04,0xc0,0x00,
51991 +0x00,0x43,0x30,0x21,0x16,0x60,0x00,0x2b,0x00,0xa4,0x28,0x21,0x3c,0x02,0xb0,0x05,
51992 +0x34,0x42,0x04,0x00,0x3c,0x03,0xb0,0x05,0x3c,0x04,0xb0,0x05,0xac,0x46,0x00,0x00,
51993 +0x34,0x63,0x04,0x04,0x34,0x84,0x02,0x28,0x24,0x02,0x00,0x01,0xac,0x65,0x00,0x00,
51994 +0xa0,0x82,0x00,0x00,0x3c,0x02,0xb0,0x09,0x34,0x42,0x01,0x46,0x90,0x44,0x00,0x00,
51995 +0x8f,0xa2,0x00,0x50,0x30,0x86,0x00,0x01,0x90,0x43,0x00,0x09,0x00,0x00,0x00,0x00,
51996 +0x02,0x63,0x18,0x26,0x00,0x03,0x30,0x0b,0x14,0xc0,0x00,0x03,0x00,0x00,0x28,0x21,
51997 +0x12,0xe0,0x00,0x03,0x02,0xb1,0x10,0x21,0x24,0x05,0x00,0x01,0x02,0xb1,0x10,0x21,
51998 +0x27,0x83,0x99,0x48,0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x84,0x48,0x00,0x04,
51999 +0x00,0xa0,0x30,0x21,0x00,0xe0,0x20,0x21,0x02,0x60,0x28,0x21,0x02,0x80,0x38,0x21,
52000 +0x0c,0x00,0x00,0x70,0xaf,0xa8,0x00,0x10,0x7b,0xbe,0x02,0x7c,0x7b,0xb6,0x02,0x3c,
52001 +0x7b,0xb4,0x01,0xfc,0x7b,0xb2,0x01,0xbc,0x7b,0xb0,0x01,0x7c,0x03,0xe0,0x00,0x08,
52002 +0x27,0xbd,0x00,0x50,0x24,0x02,0x00,0x01,0x12,0x62,0x00,0x3d,0x3c,0x02,0xb0,0x05,
52003 +0x24,0x02,0x00,0x02,0x12,0x62,0x00,0x31,0x3c,0x02,0xb0,0x05,0x24,0x02,0x00,0x03,
52004 +0x12,0x62,0x00,0x25,0x3c,0x02,0xb0,0x05,0x24,0x02,0x00,0x10,0x12,0x62,0x00,0x19,
52005 +0x3c,0x02,0xb0,0x05,0x24,0x02,0x00,0x11,0x12,0x62,0x00,0x0d,0x3c,0x02,0xb0,0x05,
52006 +0x24,0x02,0x00,0x12,0x16,0x62,0xff,0xcf,0x3c,0x02,0xb0,0x05,0x3c,0x03,0xb0,0x05,
52007 +0x34,0x42,0x04,0x20,0x3c,0x04,0xb0,0x05,0x34,0x63,0x04,0x24,0xac,0x46,0x00,0x00,
52008 +0x34,0x84,0x02,0x28,0xac,0x65,0x00,0x00,0x08,0x00,0x0f,0x74,0x24,0x02,0x00,0x20,
52009 +0x34,0x42,0x04,0x40,0x3c,0x03,0xb0,0x05,0x3c,0x04,0xb0,0x05,0xac,0x46,0x00,0x00,
52010 +0x34,0x63,0x04,0x44,0x34,0x84,0x02,0x28,0x24,0x02,0x00,0x40,0x08,0x00,0x0f,0x74,
52011 +0xac,0x65,0x00,0x00,0x34,0x42,0x04,0x28,0x3c,0x03,0xb0,0x05,0x3c,0x04,0xb0,0x05,
52012 +0xac,0x46,0x00,0x00,0x34,0x63,0x04,0x2c,0x34,0x84,0x02,0x28,0x24,0x02,0xff,0x80,
52013 +0x08,0x00,0x0f,0x74,0xac,0x65,0x00,0x00,0x34,0x42,0x04,0x18,0x3c,0x03,0xb0,0x05,
52014 +0x3c,0x04,0xb0,0x05,0xac,0x46,0x00,0x00,0x34,0x63,0x04,0x1c,0x34,0x84,0x02,0x28,
52015 +0x24,0x02,0x00,0x08,0x08,0x00,0x0f,0x74,0xac,0x65,0x00,0x00,0x34,0x42,0x04,0x10,
52016 +0x3c,0x03,0xb0,0x05,0x3c,0x04,0xb0,0x05,0xac,0x46,0x00,0x00,0x34,0x63,0x04,0x14,
52017 +0x34,0x84,0x02,0x28,0x24,0x02,0x00,0x04,0x08,0x00,0x0f,0x74,0xac,0x65,0x00,0x00,
52018 +0x34,0x42,0x04,0x08,0x3c,0x03,0xb0,0x05,0x3c,0x04,0xb0,0x05,0xac,0x46,0x00,0x00,
52019 +0x34,0x63,0x04,0x0c,0x34,0x84,0x02,0x28,0x24,0x02,0x00,0x02,0x08,0x00,0x0f,0x74,
52020 +0xac,0x65,0x00,0x00,0x24,0x16,0x00,0x14,0x08,0x00,0x0f,0x4c,0x24,0x11,0x01,0x02,
52021 +0x30,0xa2,0x00,0x07,0x24,0x44,0x00,0x0c,0x00,0x90,0x18,0x2b,0x10,0x60,0x00,0x0c,
52022 +0x26,0x02,0x00,0x04,0x27,0x85,0xc4,0x5c,0x00,0x10,0x10,0x40,0x00,0x50,0x10,0x21,
52023 +0x00,0x45,0x10,0x21,0x90,0x50,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x90,0x18,0x2b,
52024 +0x14,0x60,0xff,0xfa,0x00,0x10,0x10,0x40,0x2e,0x06,0x00,0x0c,0x26,0x02,0x00,0x04,
52025 +0x08,0x00,0x0f,0x43,0x00,0x46,0x80,0x0a,0x27,0x82,0xbd,0x40,0x01,0x82,0x20,0x21,
52026 +0x8c,0x87,0x00,0x00,0x00,0x00,0x00,0x00,0x90,0xe2,0x00,0x19,0x00,0x00,0x00,0x00,
52027 +0x14,0x40,0x00,0x07,0x00,0x00,0x00,0x00,0x27,0x82,0x99,0x60,0x00,0xc2,0x10,0x21,
52028 +0x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x60,0x00,0x12,0x00,0x00,0x00,0x00,
52029 +0x90,0xe3,0x00,0x16,0x27,0x82,0x99,0x48,0x00,0xc2,0x10,0x21,0x34,0x63,0x00,0x20,
52030 +0x90,0x50,0x00,0x07,0xa0,0xe3,0x00,0x16,0x8c,0x84,0x00,0x00,0x00,0x0a,0x16,0x42,
52031 +0x30,0x52,0x00,0x3f,0x90,0x83,0x00,0x16,0x24,0x16,0x00,0x18,0x24,0x11,0x01,0x03,
52032 +0x30,0x63,0x00,0xfb,0x24,0x1e,0x00,0x01,0x24,0x15,0x08,0x18,0x08,0x00,0x0f,0x55,
52033 +0xa0,0x83,0x00,0x16,0x8d,0x02,0x00,0x04,0x00,0x0a,0x1c,0x42,0x30,0x42,0x00,0x10,
52034 +0x14,0x40,0x00,0x15,0x30,0x72,0x00,0x3f,0x81,0x22,0x00,0x05,0x00,0x00,0x00,0x00,
52035 +0x14,0x40,0x00,0x11,0x30,0x72,0x00,0x3e,0x27,0x83,0x99,0x58,0x00,0xc3,0x18,0x21,
52036 +0x80,0x64,0x00,0x00,0x27,0x83,0xbe,0xb8,0x00,0x04,0x11,0x00,0x00,0x44,0x10,0x23,
52037 +0x00,0x02,0x10,0x80,0x00,0x44,0x10,0x23,0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,
52038 +0x90,0x44,0x00,0x05,0x90,0x43,0x00,0x04,0x00,0x00,0x00,0x00,0x00,0x64,0x18,0x24,
52039 +0x30,0x63,0x00,0x01,0x02,0x43,0x90,0x25,0x27,0x85,0xbd,0x40,0x01,0x85,0x28,0x21,
52040 +0x8c,0xa6,0x00,0x00,0x01,0x71,0x10,0x21,0x27,0x83,0x99,0x50,0x90,0xc4,0x00,0x16,
52041 +0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x30,0x84,0x00,0xdf,0x90,0x50,0x00,0x00,
52042 +0xa0,0xc4,0x00,0x16,0x8c,0xa3,0x00,0x00,0x2d,0xc4,0x00,0x02,0x80,0xde,0x00,0x12,
52043 +0x90,0x62,0x00,0x16,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xfb,0x14,0x80,0x00,0x06,
52044 +0xa0,0x62,0x00,0x16,0x24,0x02,0x00,0x06,0x11,0xc2,0x00,0x03,0x24,0x02,0x00,0x04,
52045 +0x15,0xc2,0xff,0x14,0x00,0x00,0x00,0x00,0x32,0x42,0x00,0x02,0x2e,0x03,0x00,0x0c,
52046 +0x14,0x60,0x00,0x0d,0x00,0x02,0x20,0x2b,0x32,0x02,0x00,0x0f,0x34,0x42,0x00,0x10,
52047 +0x00,0x04,0x19,0x00,0x00,0x43,0x18,0x21,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0xb8,
52048 +0x00,0x00,0x20,0x21,0x02,0x00,0x28,0x21,0x0c,0x00,0x01,0xfb,0xa0,0x43,0x00,0x00,
52049 +0x08,0x00,0x0f,0x55,0x00,0x00,0x00,0x00,0x08,0x00,0x10,0x4a,0x32,0x03,0x00,0xff,
52050 +0x3c,0x03,0xb0,0x05,0x34,0x63,0x02,0x42,0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
52051 +0x30,0x42,0x00,0x0f,0x14,0x40,0xfe,0xbf,0x00,0x00,0x00,0x00,0x8f,0xa3,0x00,0x50,
52052 +0x00,0x00,0x00,0x00,0x90,0x62,0x00,0x09,0x00,0x00,0x00,0x00,0x02,0x62,0x10,0x26,
52053 +0x08,0x00,0x0f,0x19,0x00,0x02,0x28,0x0b,0x08,0x00,0x0f,0x1f,0x00,0x00,0xa0,0x21,
52054 +0x24,0x02,0x00,0x10,0x10,0xc2,0x00,0x08,0x24,0x02,0x00,0x11,0x10,0xc2,0xfe,0x8e,
52055 +0x00,0x07,0x17,0x83,0x24,0x02,0x00,0x12,0x14,0xc2,0xfe,0x8c,0x00,0x07,0x17,0x43,
52056 +0x08,0x00,0x0e,0xf7,0x30,0x57,0x00,0x01,0x08,0x00,0x0e,0xf7,0x00,0x07,0xbf,0xc2,
52057 +0x00,0x04,0x10,0x40,0x27,0x83,0x86,0x30,0x00,0x43,0x10,0x21,0x00,0x80,0x40,0x21,
52058 +0x94,0x44,0x00,0x00,0x2d,0x07,0x00,0x04,0x24,0xc2,0x00,0x03,0x00,0x47,0x30,0x0a,
52059 +0x00,0x86,0x00,0x18,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x34,0x63,0x00,0x20,
52060 +0x24,0x42,0x41,0xc0,0xac,0x62,0x00,0x00,0x2d,0x06,0x00,0x10,0x00,0x00,0x20,0x12,
52061 +0x00,0x04,0x22,0x42,0x24,0x84,0x00,0x01,0x24,0x83,0x00,0xc0,0x10,0xe0,0x00,0x0b,
52062 +0x24,0x82,0x00,0x60,0x00,0x40,0x20,0x21,0x00,0x65,0x20,0x0a,0x3c,0x03,0xb0,0x03,
52063 +0x34,0x63,0x01,0x00,0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x01,
52064 +0x00,0x44,0x20,0x04,0x03,0xe0,0x00,0x08,0x00,0x80,0x10,0x21,0x24,0x85,0x00,0x28,
52065 +0x24,0x83,0x00,0x24,0x31,0x02,0x00,0x08,0x14,0xc0,0xff,0xf4,0x24,0x84,0x00,0x14,
52066 +0x00,0x60,0x20,0x21,0x08,0x00,0x10,0x87,0x00,0xa2,0x20,0x0b,0x27,0xbd,0xff,0xe0,
52067 +0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0xaf,0xb0,0x00,0x10,0x24,0x42,0x42,0x5c,
52068 +0x00,0x80,0x80,0x21,0x34,0x63,0x00,0x20,0x3c,0x04,0xb0,0x03,0xaf,0xb2,0x00,0x18,
52069 +0xaf,0xb1,0x00,0x14,0xaf,0xbf,0x00,0x1c,0x83,0xb1,0x00,0x33,0x83,0xa8,0x00,0x37,
52070 +0x34,0x84,0x01,0x10,0xac,0x62,0x00,0x00,0x2e,0x02,0x00,0x10,0x00,0xe0,0x90,0x21,
52071 +0x8c,0x87,0x00,0x00,0x14,0x40,0x00,0x0c,0x2e,0x02,0x00,0x0c,0x3c,0x02,0x00,0x0f,
52072 +0x34,0x42,0xf0,0x00,0x00,0xe2,0x10,0x24,0x14,0x40,0x00,0x37,0x32,0x02,0x00,0x08,
52073 +0x32,0x02,0x00,0x07,0x27,0x83,0x86,0xe0,0x00,0x43,0x10,0x21,0x90,0x50,0x00,0x00,
52074 +0x00,0x00,0x00,0x00,0x2e,0x02,0x00,0x0c,0x14,0x40,0x00,0x03,0x02,0x00,0x20,0x21,
52075 +0x32,0x02,0x00,0x0f,0x24,0x44,0x00,0x0c,0x00,0x87,0x10,0x06,0x30,0x42,0x00,0x01,
52076 +0x14,0x40,0x00,0x07,0x2c,0x82,0x00,0x0c,0x00,0x04,0x10,0x80,0x27,0x83,0xbd,0x90,
52077 +0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x00,0x00,0x00,0x00,0x00,0x2c,0x82,0x00,0x0c,
52078 +0x14,0x40,0x00,0x05,0x00,0x05,0x10,0x40,0x00,0x46,0x10,0x21,0x00,0x02,0x11,0x00,
52079 +0x00,0x82,0x10,0x21,0x24,0x44,0x00,0x04,0x15,0x00,0x00,0x02,0x24,0x06,0x00,0x20,
52080 +0x24,0x06,0x00,0x0e,0x0c,0x00,0x10,0x70,0x00,0x00,0x00,0x00,0x00,0x40,0x30,0x21,
52081 +0x3c,0x02,0xb0,0x03,0x34,0x42,0x01,0x00,0x90,0x43,0x00,0x00,0x2e,0x04,0x00,0x04,
52082 +0x24,0x02,0x00,0x10,0x24,0x05,0x00,0x0a,0x00,0x44,0x28,0x0a,0x30,0x63,0x00,0x01,
52083 +0x14,0x60,0x00,0x02,0x00,0x05,0x10,0x40,0x00,0xa0,0x10,0x21,0x30,0x45,0x00,0xff,
52084 +0x00,0xc5,0x10,0x21,0x24,0x46,0x00,0x46,0x02,0x26,0x18,0x04,0xa6,0x43,0x00,0x00,
52085 +0x8f,0xbf,0x00,0x1c,0x8f,0xb2,0x00,0x18,0x7b,0xb0,0x00,0xbc,0x00,0xc0,0x10,0x21,
52086 +0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x10,0x40,0xff,0xcf,0x2e,0x02,0x00,0x0c,
52087 +0x32,0x02,0x00,0x07,0x27,0x83,0x86,0xd8,0x00,0x43,0x10,0x21,0x90,0x44,0x00,0x00,
52088 +0x08,0x00,0x10,0xb5,0x02,0x04,0x80,0x23,0x27,0xbd,0xff,0xb8,0x00,0x05,0x38,0x80,
52089 +0x27,0x82,0xbd,0x40,0xaf,0xbe,0x00,0x40,0xaf,0xb6,0x00,0x38,0xaf,0xb3,0x00,0x2c,
52090 +0xaf,0xbf,0x00,0x44,0xaf,0xb7,0x00,0x3c,0xaf,0xb5,0x00,0x34,0xaf,0xb4,0x00,0x30,
52091 +0xaf,0xb2,0x00,0x28,0xaf,0xb1,0x00,0x24,0xaf,0xb0,0x00,0x20,0x00,0xe2,0x38,0x21,
52092 +0x8c,0xe6,0x00,0x00,0xaf,0xa5,0x00,0x4c,0x3c,0x02,0x80,0x00,0x3c,0x05,0xb0,0x03,
52093 +0x34,0xa5,0x00,0x20,0x24,0x42,0x43,0xb8,0x24,0x03,0x00,0x01,0xac,0xa2,0x00,0x00,
52094 +0xa0,0xc3,0x00,0x12,0x8c,0xe5,0x00,0x00,0x94,0xc3,0x00,0x06,0x90,0xa2,0x00,0x16,
52095 +0xa4,0xc3,0x00,0x14,0x27,0x83,0x99,0x40,0x34,0x42,0x00,0x08,0xa0,0xa2,0x00,0x16,
52096 +0x8c,0xe8,0x00,0x00,0xaf,0xa4,0x00,0x48,0x27,0x82,0x99,0x44,0x95,0x11,0x00,0x14,
52097 +0x00,0x00,0x00,0x00,0x00,0x11,0x98,0xc0,0x02,0x71,0x20,0x21,0x00,0x04,0x20,0x80,
52098 +0x00,0x82,0x10,0x21,0x8c,0x52,0x00,0x18,0x00,0x83,0x18,0x21,0x84,0x75,0x00,0x06,
52099 +0x8e,0x45,0x00,0x08,0x8e,0x46,0x00,0x04,0x8e,0x47,0x00,0x04,0x00,0x05,0x1c,0x82,
52100 +0x00,0x06,0x31,0x42,0x27,0x82,0x99,0x50,0x30,0x63,0x00,0x01,0x30,0xc6,0x00,0x01,
52101 +0x00,0x82,0x20,0x21,0xa5,0x15,0x00,0x1a,0x00,0x05,0x14,0x42,0xaf,0xa3,0x00,0x18,
52102 +0xaf,0xa6,0x00,0x1c,0x30,0xe7,0x00,0x10,0x30,0x56,0x00,0x01,0x80,0x97,0x00,0x06,
52103 +0x14,0xe0,0x00,0x47,0x00,0x05,0xf7,0xc2,0x80,0x82,0x00,0x05,0x00,0x00,0x00,0x00,
52104 +0x14,0x40,0x00,0x44,0x02,0x71,0x10,0x21,0x93,0x90,0xc5,0x29,0x00,0x00,0x00,0x00,
52105 +0x2e,0x02,0x00,0x0c,0x14,0x40,0x00,0x06,0x02,0x00,0x20,0x21,0x00,0x16,0x10,0x40,
52106 +0x00,0x43,0x10,0x21,0x00,0x02,0x11,0x00,0x02,0x02,0x10,0x21,0x24,0x44,0x00,0x04,
52107 +0x02,0x71,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x83,0x99,0x50,0x00,0x43,0x10,0x21,
52108 +0x00,0x80,0x80,0x21,0xa0,0x44,0x00,0x03,0xa0,0x44,0x00,0x00,0x02,0x00,0x20,0x21,
52109 +0x02,0xc0,0x28,0x21,0x0c,0x00,0x10,0x70,0x02,0xa0,0x30,0x21,0x02,0x71,0x18,0x21,
52110 +0x00,0x03,0x88,0x80,0x00,0x40,0xa0,0x21,0x27,0x82,0x99,0x60,0x02,0x22,0x10,0x21,
52111 +0x8c,0x44,0x00,0x00,0x26,0xe3,0x00,0x02,0x00,0x03,0x17,0xc2,0x00,0x62,0x18,0x21,
52112 +0x00,0x04,0x25,0xc2,0x00,0x03,0x18,0x43,0x30,0x84,0x00,0x01,0x00,0x03,0x18,0x40,
52113 +0x03,0xc4,0x20,0x24,0x14,0x80,0x00,0x15,0x02,0x43,0x38,0x21,0x3c,0x08,0xb0,0x03,
52114 +0x35,0x08,0x00,0x28,0x8d,0x03,0x00,0x00,0x8f,0xa6,0x00,0x4c,0x8f,0xa4,0x00,0x48,
52115 +0x27,0x82,0x99,0x48,0x02,0x22,0x10,0x21,0x24,0x63,0x00,0x01,0x02,0xa0,0x28,0x21,
52116 +0xa4,0x54,0x00,0x04,0x00,0xc0,0x38,0x21,0x0c,0x00,0x0e,0xcd,0xad,0x03,0x00,0x00,
52117 +0x7b,0xbe,0x02,0x3c,0x7b,0xb6,0x01,0xfc,0x7b,0xb4,0x01,0xbc,0x7b,0xb2,0x01,0x7c,
52118 +0x7b,0xb0,0x01,0x3c,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x48,0x8f,0xa2,0x00,0x1c,
52119 +0x8f,0xa6,0x00,0x18,0x02,0x00,0x20,0x21,0x02,0xc0,0x28,0x21,0xaf,0xa2,0x00,0x10,
52120 +0x0c,0x00,0x10,0x97,0xaf,0xa0,0x00,0x14,0x08,0x00,0x11,0x53,0x02,0x82,0xa0,0x21,
52121 +0x02,0x71,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x83,0x99,0x50,0x00,0x43,0x10,0x21,
52122 +0x90,0x50,0x00,0x00,0x08,0x00,0x11,0x3f,0xa0,0x50,0x00,0x03,0x27,0xbd,0xff,0xb8,
52123 +0xaf,0xb1,0x00,0x24,0x8f,0xb1,0x00,0x5c,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,
52124 +0x34,0x63,0x00,0x20,0x24,0x42,0x45,0xdc,0xaf,0xbe,0x00,0x40,0xaf,0xb7,0x00,0x3c,
52125 +0xaf,0xb6,0x00,0x38,0xaf,0xb5,0x00,0x34,0xaf,0xb4,0x00,0x30,0xaf,0xa5,0x00,0x4c,
52126 +0x8f,0xb5,0x00,0x58,0xaf,0xbf,0x00,0x44,0xaf,0xb3,0x00,0x2c,0xaf,0xb2,0x00,0x28,
52127 +0xaf,0xb0,0x00,0x20,0x00,0xe0,0xb0,0x21,0xac,0x62,0x00,0x00,0x00,0x80,0xf0,0x21,
52128 +0x00,0x00,0xb8,0x21,0x16,0x20,0x00,0x2b,0x00,0x00,0xa0,0x21,0x27,0x85,0xbd,0x40,
52129 +0x00,0x07,0x10,0x80,0x00,0x45,0x10,0x21,0x8c,0x53,0x00,0x00,0x00,0x15,0x18,0x80,
52130 +0x00,0x65,0x18,0x21,0x92,0x62,0x00,0x16,0x8c,0x72,0x00,0x00,0x30,0x42,0x00,0x03,
52131 +0x14,0x40,0x00,0x2d,0x00,0x00,0x00,0x00,0x92,0x42,0x00,0x16,0x00,0x00,0x00,0x00,
52132 +0x30,0x42,0x00,0x03,0x14,0x40,0x00,0x28,0x00,0x00,0x00,0x00,0x8c,0x82,0x00,0x34,
52133 +0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x18,0x02,0x20,0x10,0x21,0x8c,0x82,0x00,0x38,
52134 +0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x14,0x02,0x20,0x10,0x21,0x8c,0x82,0x00,0x3c,
52135 +0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x0f,0x3c,0x03,0xb0,0x09,0x3c,0x05,0xb0,0x05,
52136 +0x34,0x63,0x01,0x44,0x34,0xa5,0x02,0x52,0x94,0x66,0x00,0x00,0x90,0xa2,0x00,0x00,
52137 +0x8f,0xa3,0x00,0x4c,0x00,0x00,0x00,0x00,0x00,0x62,0x10,0x06,0x30,0x42,0x00,0x01,
52138 +0x10,0x40,0x00,0x04,0x30,0xc6,0xff,0xff,0x2c,0xc2,0x00,0x41,0x10,0x40,0x00,0x09,
52139 +0x24,0x05,0x00,0x14,0x02,0x20,0x10,0x21,0x7b,0xbe,0x02,0x3c,0x7b,0xb6,0x01,0xfc,
52140 +0x7b,0xb4,0x01,0xbc,0x7b,0xb2,0x01,0x7c,0x7b,0xb0,0x01,0x3c,0x03,0xe0,0x00,0x08,
52141 +0x27,0xbd,0x00,0x48,0x0c,0x00,0x0e,0xa8,0x24,0x06,0x01,0x07,0x24,0x02,0x00,0x01,
52142 +0x08,0x00,0x11,0xb9,0xa3,0xc2,0x00,0x11,0x10,0xc0,0x00,0x1c,0x24,0x02,0x00,0x01,
52143 +0x10,0xc2,0x00,0x17,0x00,0xc0,0x88,0x21,0x96,0x54,0x00,0x1a,0x02,0xa0,0xb8,0x21,
52144 +0x12,0x20,0xff,0xed,0x02,0x20,0x10,0x21,0x27,0x83,0xbd,0x40,0x00,0x17,0x10,0x80,
52145 +0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x00,0x3c,0x03,0xb0,0x03,0x34,0x63,0x00,0x28,
52146 +0x80,0x86,0x00,0x12,0x8c,0x62,0x00,0x00,0x00,0x14,0x2c,0x00,0x00,0x05,0x2c,0x03,
52147 +0x00,0x46,0x10,0x21,0x8f,0xa6,0x00,0x4c,0x02,0xe0,0x38,0x21,0x03,0xc0,0x20,0x21,
52148 +0x0c,0x00,0x0e,0xcd,0xac,0x62,0x00,0x00,0x08,0x00,0x11,0xb9,0xaf,0xd1,0x00,0x40,
52149 +0x96,0x74,0x00,0x1a,0x08,0x00,0x11,0xcc,0x02,0xc0,0xb8,0x21,0x3c,0x02,0xb0,0x03,
52150 +0x34,0x42,0x01,0x08,0x8c,0x50,0x00,0x00,0x02,0x60,0x20,0x21,0x0c,0x00,0x26,0x64,
52151 +0x02,0x00,0x28,0x21,0x30,0x42,0x00,0xff,0x02,0x00,0x28,0x21,0x02,0x40,0x20,0x21,
52152 +0x0c,0x00,0x26,0x64,0xaf,0xa2,0x00,0x18,0x8f,0xa4,0x00,0x18,0x00,0x00,0x00,0x00,
52153 +0x10,0x80,0x00,0xed,0x30,0x50,0x00,0xff,0x12,0x00,0x00,0x18,0x24,0x11,0x00,0x01,
52154 +0x96,0x63,0x00,0x14,0x96,0x44,0x00,0x14,0x27,0x85,0x99,0x40,0x00,0x03,0x10,0xc0,
52155 +0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x45,0x10,0x21,0x00,0x04,0x18,0xc0,
52156 +0x8c,0x46,0x00,0x08,0x00,0x64,0x18,0x21,0x00,0x03,0x18,0x80,0x00,0x65,0x18,0x21,
52157 +0x00,0x06,0x17,0x02,0x24,0x04,0x00,0xff,0x8c,0x63,0x00,0x08,0x10,0x44,0x00,0xd6,
52158 +0x00,0x03,0x17,0x02,0x10,0x44,0x00,0xd5,0x3c,0x02,0x80,0x00,0x00,0x66,0x18,0x2b,
52159 +0x24,0x11,0x00,0x02,0x24,0x02,0x00,0x01,0x00,0x43,0x88,0x0a,0x24,0x02,0x00,0x01,
52160 +0x12,0x22,0x00,0x5a,0x24,0x02,0x00,0x02,0x16,0x22,0xff,0xbd,0x00,0x00,0x00,0x00,
52161 +0x96,0x49,0x00,0x14,0x27,0x82,0x99,0x44,0x02,0xa0,0xb8,0x21,0x00,0x09,0x50,0xc0,
52162 +0x01,0x49,0x18,0x21,0x00,0x03,0x40,0x80,0x01,0x02,0x10,0x21,0x8c,0x43,0x00,0x18,
52163 +0x00,0x00,0x00,0x00,0x8c,0x65,0x00,0x08,0x8c,0x62,0x00,0x0c,0x8c,0x62,0x00,0x04,
52164 +0x00,0x05,0x24,0x42,0x00,0x05,0x1c,0x82,0x30,0x42,0x00,0x10,0x30,0x66,0x00,0x01,
52165 +0x14,0x40,0x00,0x41,0x30,0x87,0x00,0x01,0x27,0x82,0x99,0x58,0x01,0x02,0x10,0x21,
52166 +0x80,0x44,0x00,0x00,0x27,0x82,0xbe,0xb8,0x00,0x04,0x19,0x00,0x00,0x64,0x18,0x23,
52167 +0x00,0x03,0x18,0x80,0x00,0x64,0x18,0x23,0x00,0x03,0x18,0x80,0x00,0x62,0x10,0x21,
52168 +0x90,0x45,0x00,0x05,0x27,0x84,0xbd,0xe0,0x00,0x64,0x18,0x21,0x90,0x63,0x00,0x00,
52169 +0x10,0xa0,0x00,0x2b,0x2c,0x64,0x00,0x0c,0x14,0x80,0x00,0x04,0x00,0x60,0x10,0x21,
52170 +0x00,0x06,0x11,0x00,0x00,0x62,0x10,0x21,0x24,0x42,0x00,0x24,0x3c,0x01,0xb0,0x03,
52171 +0xa0,0x22,0x00,0xb9,0x14,0x80,0x00,0x06,0x00,0x60,0x28,0x21,0x00,0x07,0x10,0x40,
52172 +0x00,0x46,0x10,0x21,0x00,0x02,0x11,0x00,0x00,0x62,0x10,0x21,0x24,0x45,0x00,0x04,
52173 +0x01,0x49,0x10,0x21,0x27,0x83,0x99,0x50,0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,
52174 +0x00,0xa0,0x18,0x21,0xa0,0x45,0x00,0x03,0xa0,0x45,0x00,0x00,0x24,0x02,0x00,0x08,
52175 +0x12,0x02,0x00,0x0b,0x24,0x02,0x00,0x01,0x00,0x60,0x28,0x21,0x02,0x40,0x20,0x21,
52176 +0x0c,0x00,0x26,0xe0,0xaf,0xa2,0x00,0x10,0x30,0x54,0xff,0xff,0x92,0x42,0x00,0x16,
52177 +0x00,0x00,0x00,0x00,0x02,0x02,0x10,0x25,0x08,0x00,0x11,0xcc,0xa2,0x42,0x00,0x16,
52178 +0x00,0x60,0x28,0x21,0x02,0x40,0x20,0x21,0x0c,0x00,0x26,0x91,0xaf,0xa0,0x00,0x10,
52179 +0x08,0x00,0x12,0x4f,0x30,0x54,0xff,0xff,0x08,0x00,0x12,0x37,0x00,0x60,0x10,0x21,
52180 +0x14,0x80,0xff,0xfd,0x00,0x00,0x00,0x00,0x00,0x06,0x11,0x00,0x00,0x62,0x10,0x21,
52181 +0x08,0x00,0x12,0x37,0x24,0x42,0x00,0x04,0x27,0x82,0x99,0x50,0x01,0x02,0x10,0x21,
52182 +0x90,0x43,0x00,0x00,0x08,0x00,0x12,0x47,0xa0,0x43,0x00,0x03,0x96,0x69,0x00,0x14,
52183 +0x02,0xc0,0xb8,0x21,0x24,0x0b,0x00,0x01,0x00,0x09,0x10,0xc0,0x00,0x49,0x18,0x21,
52184 +0x00,0x03,0x40,0x80,0x00,0x40,0x50,0x21,0x27,0x82,0x99,0x44,0x01,0x02,0x10,0x21,
52185 +0x8c,0x43,0x00,0x18,0x00,0x00,0x00,0x00,0x8c,0x65,0x00,0x08,0x8c,0x62,0x00,0x0c,
52186 +0x8c,0x62,0x00,0x04,0x00,0x05,0x24,0x42,0x00,0x05,0x1c,0x82,0x30,0x42,0x00,0x10,
52187 +0x30,0x66,0x00,0x01,0x10,0x40,0x00,0x0d,0x30,0x87,0x00,0x01,0x27,0x82,0x99,0x58,
52188 +0x01,0x02,0x10,0x21,0x80,0x43,0x00,0x00,0x00,0x00,0x58,0x21,0x00,0x03,0x11,0x00,
52189 +0x00,0x43,0x10,0x23,0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x23,0x00,0x02,0x10,0x80,
52190 +0x27,0x83,0xbe,0xb0,0x00,0x43,0x10,0x21,0xa0,0x40,0x00,0x04,0x11,0x60,0x00,0x4f,
52191 +0x00,0x00,0x00,0x00,0x01,0x49,0x10,0x21,0x00,0x02,0x20,0x80,0x27,0x85,0x99,0x50,
52192 +0x00,0x85,0x10,0x21,0x80,0x43,0x00,0x05,0x00,0x00,0x00,0x00,0x14,0x60,0x00,0x42,
52193 +0x01,0x49,0x10,0x21,0x27,0x82,0x99,0x58,0x00,0x82,0x10,0x21,0x80,0x44,0x00,0x00,
52194 +0x27,0x82,0xbe,0xb8,0x00,0x04,0x19,0x00,0x00,0x64,0x18,0x23,0x00,0x03,0x18,0x80,
52195 +0x00,0x64,0x18,0x23,0x00,0x03,0x18,0x80,0x00,0x62,0x10,0x21,0x90,0x45,0x00,0x05,
52196 +0x27,0x84,0xbd,0xe0,0x00,0x64,0x18,0x21,0x90,0x63,0x00,0x00,0x10,0xa0,0x00,0x2c,
52197 +0x2c,0x64,0x00,0x0c,0x14,0x80,0x00,0x04,0x00,0x60,0x10,0x21,0x00,0x06,0x11,0x00,
52198 +0x00,0x62,0x10,0x21,0x24,0x42,0x00,0x24,0x3c,0x01,0xb0,0x03,0xa0,0x22,0x00,0xb9,
52199 +0x14,0x80,0x00,0x06,0x00,0x60,0x28,0x21,0x00,0x07,0x10,0x40,0x00,0x46,0x10,0x21,
52200 +0x00,0x02,0x11,0x00,0x00,0x62,0x10,0x21,0x24,0x45,0x00,0x04,0x01,0x49,0x10,0x21,
52201 +0x27,0x83,0x99,0x50,0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x00,0xa0,0x18,0x21,
52202 +0xa0,0x45,0x00,0x03,0xa0,0x45,0x00,0x00,0x8f,0xa4,0x00,0x18,0x24,0x02,0x00,0x08,
52203 +0x10,0x82,0x00,0x0c,0x00,0x60,0x28,0x21,0x24,0x02,0x00,0x01,0x02,0x60,0x20,0x21,
52204 +0x0c,0x00,0x26,0xe0,0xaf,0xa2,0x00,0x10,0x8f,0xa3,0x00,0x18,0x30,0x54,0xff,0xff,
52205 +0x92,0x62,0x00,0x16,0x00,0x00,0x00,0x00,0x00,0x62,0x10,0x25,0x08,0x00,0x11,0xcc,
52206 +0xa2,0x62,0x00,0x16,0x02,0x60,0x20,0x21,0x0c,0x00,0x26,0x91,0xaf,0xa0,0x00,0x10,
52207 +0x08,0x00,0x12,0xbe,0x00,0x00,0x00,0x00,0x08,0x00,0x12,0xa6,0x00,0x60,0x10,0x21,
52208 +0x14,0x80,0xff,0xfd,0x00,0x00,0x00,0x00,0x00,0x06,0x11,0x00,0x00,0x62,0x10,0x21,
52209 +0x08,0x00,0x12,0xa6,0x24,0x42,0x00,0x04,0x00,0x02,0x10,0x80,0x00,0x45,0x10,0x21,
52210 +0x90,0x43,0x00,0x00,0x08,0x00,0x12,0xb6,0xa0,0x43,0x00,0x03,0x27,0x85,0x99,0x50,
52211 +0x08,0x00,0x12,0xd2,0x01,0x49,0x10,0x21,0x3c,0x02,0x80,0x00,0x00,0x62,0x18,0x26,
52212 +0x08,0x00,0x12,0x07,0x00,0xc2,0x30,0x26,0x12,0x00,0xff,0x2d,0x24,0x02,0x00,0x01,
52213 +0x08,0x00,0x12,0x0c,0x24,0x11,0x00,0x02,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,
52214 +0x27,0xbd,0xff,0xd0,0x24,0x42,0x4b,0x88,0x34,0x63,0x00,0x20,0x3c,0x05,0xb0,0x05,
52215 +0xaf,0xb3,0x00,0x24,0xaf,0xb2,0x00,0x20,0xaf,0xb1,0x00,0x1c,0xaf,0xbf,0x00,0x28,
52216 +0xaf,0xb0,0x00,0x18,0xac,0x62,0x00,0x00,0x34,0xa5,0x02,0x42,0x90,0xa2,0x00,0x00,
52217 +0x00,0x80,0x90,0x21,0x24,0x11,0x00,0x10,0x30,0x53,0x00,0xff,0x24,0x02,0x00,0x10,
52218 +0x12,0x22,0x00,0xcf,0x00,0x00,0x18,0x21,0x24,0x02,0x00,0x11,0x12,0x22,0x00,0xc1,
52219 +0x24,0x02,0x00,0x12,0x12,0x22,0x00,0xb4,0x00,0x00,0x00,0x00,0x14,0x60,0x00,0xad,
52220 +0xae,0x43,0x00,0x40,0x3c,0x02,0xb0,0x05,0x34,0x42,0x02,0x2c,0x8c,0x44,0x00,0x00,
52221 +0x3c,0x03,0x00,0x02,0x34,0x63,0x00,0xff,0x00,0x83,0x80,0x24,0x00,0x10,0x14,0x43,
52222 +0x10,0x40,0x00,0x05,0x00,0x00,0x00,0x00,0x8e,0x42,0x00,0x34,0x00,0x00,0x00,0x00,
52223 +0x14,0x40,0x00,0x92,0x00,0x00,0x00,0x00,0x93,0x83,0x94,0x51,0x00,0x00,0x00,0x00,
52224 +0x30,0x62,0x00,0x02,0x10,0x40,0x00,0x04,0x32,0x10,0x00,0xff,0x00,0x10,0x11,0xc3,
52225 +0x14,0x40,0x00,0x86,0x00,0x00,0x00,0x00,0x16,0x00,0x00,0x15,0x02,0x00,0x10,0x21,
52226 +0x26,0x22,0x00,0x01,0x30,0x51,0x00,0xff,0x2e,0x23,0x00,0x13,0x14,0x60,0xff,0xdb,
52227 +0x24,0x03,0x00,0x02,0x12,0x63,0x00,0x73,0x24,0x02,0x00,0x05,0x2a,0x62,0x00,0x03,
52228 +0x10,0x40,0x00,0x58,0x24,0x02,0x00,0x04,0x24,0x02,0x00,0x01,0x12,0x62,0x00,0x4b,
52229 +0x02,0x40,0x20,0x21,0x3c,0x02,0xb0,0x05,0x34,0x42,0x02,0x2c,0x8c,0x43,0x00,0x00,
52230 +0x00,0x00,0x00,0x00,0x30,0x70,0x00,0xff,0x12,0x00,0x00,0x06,0x02,0x00,0x10,0x21,
52231 +0x8f,0xbf,0x00,0x28,0x7b,0xb2,0x01,0x3c,0x7b,0xb0,0x00,0xfc,0x03,0xe0,0x00,0x08,
52232 +0x27,0xbd,0x00,0x30,0x92,0x46,0x00,0x04,0x8e,0x43,0x00,0x24,0x24,0x02,0x00,0x07,
52233 +0x02,0x40,0x20,0x21,0x00,0x00,0x28,0x21,0x24,0x07,0x00,0x06,0xaf,0xa2,0x00,0x10,
52234 +0x0c,0x00,0x11,0x77,0xaf,0xa3,0x00,0x14,0xae,0x42,0x00,0x24,0x3c,0x02,0xb0,0x05,
52235 +0x8c,0x42,0x02,0x2c,0x00,0x00,0x00,0x00,0x30,0x50,0x00,0xff,0x16,0x00,0xff,0xec,
52236 +0x02,0x00,0x10,0x21,0x92,0x46,0x00,0x05,0x8e,0x43,0x00,0x28,0x24,0x02,0x00,0x05,
52237 +0x02,0x40,0x20,0x21,0x24,0x05,0x00,0x01,0x24,0x07,0x00,0x04,0xaf,0xa2,0x00,0x10,
52238 +0x0c,0x00,0x11,0x77,0xaf,0xa3,0x00,0x14,0xae,0x42,0x00,0x28,0x3c,0x02,0xb0,0x05,
52239 +0x8c,0x42,0x02,0x2c,0x00,0x00,0x00,0x00,0x30,0x50,0x00,0xff,0x16,0x00,0xff,0xdc,
52240 +0x02,0x00,0x10,0x21,0x92,0x46,0x00,0x06,0x8e,0x43,0x00,0x2c,0x24,0x02,0x00,0x03,
52241 +0x02,0x40,0x20,0x21,0x24,0x05,0x00,0x02,0x00,0x00,0x38,0x21,0xaf,0xa2,0x00,0x10,
52242 +0x0c,0x00,0x11,0x77,0xaf,0xa3,0x00,0x14,0xae,0x42,0x00,0x2c,0x3c,0x02,0xb0,0x05,
52243 +0x8c,0x42,0x02,0x2c,0x00,0x00,0x00,0x00,0x30,0x50,0x00,0xff,0x16,0x00,0xff,0xcc,
52244 +0x02,0x00,0x10,0x21,0x92,0x46,0x00,0x07,0x8e,0x43,0x00,0x30,0x24,0x02,0x00,0x02,
52245 +0x02,0x40,0x20,0x21,0x24,0x05,0x00,0x03,0x24,0x07,0x00,0x01,0xaf,0xa2,0x00,0x10,
52246 +0x0c,0x00,0x11,0x77,0xaf,0xa3,0x00,0x14,0xae,0x42,0x00,0x30,0x3c,0x02,0xb0,0x05,
52247 +0x8c,0x42,0x02,0x2c,0x08,0x00,0x13,0x28,0x30,0x42,0x00,0xff,0x92,0x46,0x00,0x04,
52248 +0x8e,0x43,0x00,0x24,0x24,0x02,0x00,0x07,0x00,0x00,0x28,0x21,0x24,0x07,0x00,0x06,
52249 +0xaf,0xa2,0x00,0x10,0x0c,0x00,0x11,0x77,0xaf,0xa3,0x00,0x14,0x08,0x00,0x13,0x21,
52250 +0xae,0x42,0x00,0x24,0x12,0x62,0x00,0x0d,0x24,0x02,0x00,0x03,0x24,0x02,0x00,0x08,
52251 +0x16,0x62,0xff,0xa8,0x02,0x40,0x20,0x21,0x92,0x46,0x00,0x07,0x8e,0x42,0x00,0x30,
52252 +0x24,0x05,0x00,0x03,0x24,0x07,0x00,0x01,0xaf,0xa3,0x00,0x10,0x0c,0x00,0x11,0x77,
52253 +0xaf,0xa2,0x00,0x14,0x08,0x00,0x13,0x21,0xae,0x42,0x00,0x30,0x92,0x46,0x00,0x06,
52254 +0x8e,0x43,0x00,0x2c,0x02,0x40,0x20,0x21,0x24,0x05,0x00,0x02,0x00,0x00,0x38,0x21,
52255 +0xaf,0xa2,0x00,0x10,0x0c,0x00,0x11,0x77,0xaf,0xa3,0x00,0x14,0x08,0x00,0x13,0x21,
52256 +0xae,0x42,0x00,0x2c,0x92,0x46,0x00,0x05,0x8e,0x43,0x00,0x28,0x02,0x40,0x20,0x21,
52257 +0x24,0x05,0x00,0x01,0x24,0x07,0x00,0x04,0xaf,0xa2,0x00,0x10,0x0c,0x00,0x11,0x77,
52258 +0xaf,0xa3,0x00,0x14,0x08,0x00,0x13,0x21,0xae,0x42,0x00,0x28,0x0c,0x00,0x01,0x57,
52259 +0x24,0x04,0x00,0x01,0x08,0x00,0x13,0x12,0x00,0x00,0x00,0x00,0x8f,0x84,0xbd,0x80,
52260 +0xae,0x40,0x00,0x34,0x94,0x85,0x00,0x14,0x0c,0x00,0x22,0xe1,0x00,0x00,0x00,0x00,
52261 +0x93,0x83,0x94,0x51,0x00,0x00,0x00,0x00,0x30,0x62,0x00,0x02,0x10,0x40,0xff,0x69,
52262 +0x00,0x00,0x00,0x00,0x0c,0x00,0x01,0x57,0x00,0x00,0x20,0x21,0x08,0x00,0x13,0x0a,
52263 +0x00,0x00,0x00,0x00,0x02,0x40,0x20,0x21,0x0c,0x00,0x10,0xee,0x02,0x20,0x28,0x21,
52264 +0x08,0x00,0x12,0xfe,0x3c,0x02,0xb0,0x05,0x8e,0x42,0x00,0x3c,0x00,0x00,0x00,0x00,
52265 +0x14,0x40,0xff,0x4a,0x00,0x00,0x00,0x00,0x8f,0x82,0xbd,0x88,0x00,0x00,0x00,0x00,
52266 +0x90,0x42,0x00,0x0a,0x00,0x00,0x00,0x00,0x00,0x02,0x18,0x2b,0x08,0x00,0x12,0xfb,
52267 +0xae,0x43,0x00,0x3c,0x8e,0x42,0x00,0x38,0x00,0x00,0x00,0x00,0x14,0x40,0xff,0x3d,
52268 +0x24,0x02,0x00,0x12,0x8f,0x82,0xbd,0x84,0x00,0x00,0x00,0x00,0x90,0x42,0x00,0x0a,
52269 +0x00,0x00,0x00,0x00,0x00,0x02,0x18,0x2b,0x08,0x00,0x12,0xfb,0xae,0x43,0x00,0x38,
52270 +0x8e,0x42,0x00,0x34,0x00,0x00,0x00,0x00,0x14,0x40,0xff,0x30,0x24,0x02,0x00,0x11,
52271 +0x8f,0x82,0xbd,0x80,0x00,0x00,0x00,0x00,0x90,0x42,0x00,0x0a,0x00,0x00,0x00,0x00,
52272 +0x00,0x02,0x18,0x2b,0x08,0x00,0x12,0xfb,0xae,0x43,0x00,0x34,0x3c,0x03,0xb0,0x03,
52273 +0x3c,0x02,0x80,0x00,0x27,0xbd,0xff,0xe0,0x34,0x63,0x00,0x20,0x24,0x42,0x4f,0x3c,
52274 +0x3c,0x08,0xb0,0x03,0xaf,0xb1,0x00,0x14,0xac,0x62,0x00,0x00,0x35,0x08,0x01,0x00,
52275 +0xaf,0xbf,0x00,0x18,0xaf,0xb0,0x00,0x10,0x91,0x03,0x00,0x00,0x00,0xa0,0x48,0x21,
52276 +0x24,0x11,0x00,0x0a,0x2c,0xa5,0x00,0x04,0x24,0x02,0x00,0x10,0x00,0x45,0x88,0x0a,
52277 +0x30,0x63,0x00,0x01,0x00,0xc0,0x28,0x21,0x14,0x60,0x00,0x02,0x00,0x11,0x40,0x40,
52278 +0x02,0x20,0x40,0x21,0x84,0x83,0x00,0x0c,0x31,0x11,0x00,0xff,0x01,0x20,0x20,0x21,
52279 +0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x83,0x99,0x48,
52280 +0x00,0x43,0x10,0x21,0x84,0x43,0x00,0x04,0x24,0x06,0x00,0x0e,0x10,0xe0,0x00,0x06,
52281 +0x02,0x23,0x80,0x21,0x02,0x00,0x10,0x21,0x8f,0xbf,0x00,0x18,0x7b,0xb0,0x00,0xbc,
52282 +0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x0c,0x00,0x10,0x70,0x00,0x00,0x00,0x00,
52283 +0x02,0x11,0x18,0x21,0x08,0x00,0x13,0xf1,0x00,0x62,0x80,0x21,0x27,0xbd,0xff,0xd0,
52284 +0xaf,0xbf,0x00,0x28,0xaf,0xb4,0x00,0x20,0xaf,0xb3,0x00,0x1c,0xaf,0xb2,0x00,0x18,
52285 +0xaf,0xb5,0x00,0x24,0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,0x84,0x82,0x00,0x0c,
52286 +0x3c,0x06,0xb0,0x03,0x34,0xc6,0x00,0x20,0x00,0x02,0x18,0xc0,0x00,0x62,0x18,0x21,
52287 +0x00,0x03,0x18,0x80,0x27,0x82,0x99,0x44,0x00,0x62,0x10,0x21,0x8c,0x55,0x00,0x18,
52288 +0x3c,0x02,0x80,0x00,0x24,0x42,0x4f,0xec,0xac,0xc2,0x00,0x00,0x8e,0xb0,0x00,0x08,
52289 +0x27,0x82,0x99,0x48,0x00,0x62,0x18,0x21,0x90,0x71,0x00,0x07,0x00,0x10,0x86,0x43,
52290 +0x32,0x10,0x00,0x01,0x00,0xa0,0x38,0x21,0x02,0x00,0x30,0x21,0x00,0xa0,0x98,0x21,
52291 +0x02,0x20,0x28,0x21,0x0c,0x00,0x13,0xcf,0x00,0x80,0x90,0x21,0x02,0x20,0x20,0x21,
52292 +0x02,0x00,0x28,0x21,0x24,0x06,0x00,0x14,0x0c,0x00,0x10,0x70,0x00,0x40,0xa0,0x21,
52293 +0x86,0x43,0x00,0x0c,0x3c,0x09,0xb0,0x09,0x3c,0x08,0xb0,0x09,0x00,0x03,0x10,0xc0,
52294 +0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x83,0x99,0x50,0x00,0x43,0x10,0x21,
52295 +0x80,0x43,0x00,0x06,0x3c,0x07,0xb0,0x09,0x3c,0x05,0xb0,0x09,0x28,0x62,0x00,0x00,
52296 +0x24,0x64,0x00,0x03,0x00,0x82,0x18,0x0b,0x00,0x03,0x18,0x83,0x3c,0x02,0xb0,0x09,
52297 +0x00,0x03,0x18,0x80,0x34,0x42,0x01,0x02,0x35,0x29,0x01,0x10,0x35,0x08,0x01,0x14,
52298 +0x34,0xe7,0x01,0x20,0x34,0xa5,0x01,0x24,0xa4,0x54,0x00,0x00,0x12,0x60,0x00,0x11,
52299 +0x02,0xa3,0xa8,0x21,0x8e,0xa2,0x00,0x0c,0x8e,0xa3,0x00,0x08,0x00,0x02,0x14,0x00,
52300 +0x00,0x03,0x1c,0x02,0x00,0x43,0x10,0x21,0xad,0x22,0x00,0x00,0x8e,0xa3,0x00,0x0c,
52301 +0x00,0x00,0x00,0x00,0x00,0x03,0x1c,0x02,0xa5,0x03,0x00,0x00,0x8f,0xbf,0x00,0x28,
52302 +0x7b,0xb4,0x01,0x3c,0x7b,0xb2,0x00,0xfc,0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,
52303 +0x27,0xbd,0x00,0x30,0x8e,0xa2,0x00,0x04,0x00,0x00,0x00,0x00,0xad,0x22,0x00,0x00,
52304 +0x8e,0xa4,0x00,0x08,0x00,0x00,0x00,0x00,0xa5,0x04,0x00,0x00,0x7a,0xa2,0x00,0x7c,
52305 +0x00,0x00,0x00,0x00,0x00,0x03,0x1c,0x00,0x00,0x02,0x14,0x02,0x00,0x62,0x18,0x21,
52306 +0xac,0xe3,0x00,0x00,0x8e,0xa2,0x00,0x0c,0x00,0x00,0x00,0x00,0x00,0x02,0x14,0x02,
52307 +0x08,0x00,0x14,0x43,0xa4,0xa2,0x00,0x00,0x27,0xbd,0xff,0xe0,0xaf,0xb2,0x00,0x18,
52308 +0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x1c,0xaf,0xb1,0x00,0x14,0x84,0x82,0x00,0x0c,
52309 +0x00,0x80,0x90,0x21,0x3c,0x05,0xb0,0x03,0x00,0x02,0x20,0xc0,0x00,0x82,0x20,0x21,
52310 +0x00,0x04,0x20,0x80,0x27,0x82,0x99,0x44,0x00,0x82,0x10,0x21,0x8c,0x51,0x00,0x18,
52311 +0x3c,0x02,0x80,0x00,0x34,0xa5,0x00,0x20,0x24,0x42,0x51,0x68,0x27,0x83,0x99,0x48,
52312 +0xac,0xa2,0x00,0x00,0x00,0x83,0x20,0x21,0x3c,0x02,0xb0,0x03,0x90,0x86,0x00,0x07,
52313 +0x34,0x42,0x01,0x00,0x8e,0x23,0x00,0x08,0x90,0x44,0x00,0x00,0x2c,0xc5,0x00,0x04,
52314 +0x24,0x02,0x00,0x10,0x24,0x10,0x00,0x0a,0x00,0x45,0x80,0x0a,0x00,0x03,0x1e,0x43,
52315 +0x30,0x84,0x00,0x01,0x30,0x65,0x00,0x01,0x14,0x80,0x00,0x02,0x00,0x10,0x10,0x40,
52316 +0x02,0x00,0x10,0x21,0x00,0xc0,0x20,0x21,0x24,0x06,0x00,0x20,0x0c,0x00,0x10,0x70,
52317 +0x30,0x50,0x00,0xff,0x86,0x44,0x00,0x0c,0x27,0x85,0x99,0x50,0x3c,0x06,0xb0,0x09,
52318 +0x00,0x04,0x18,0xc0,0x00,0x64,0x18,0x21,0x00,0x03,0x18,0x80,0x00,0x65,0x18,0x21,
52319 +0x80,0x64,0x00,0x06,0x00,0x50,0x10,0x21,0x34,0xc6,0x01,0x02,0x24,0x85,0x00,0x03,
52320 +0x28,0x83,0x00,0x00,0x00,0xa3,0x20,0x0b,0x00,0x04,0x20,0x83,0x00,0x04,0x20,0x80,
52321 +0xa4,0xc2,0x00,0x00,0x02,0x24,0x20,0x21,0x8c,0x83,0x00,0x04,0x3c,0x02,0xb0,0x09,
52322 +0x34,0x42,0x01,0x10,0xac,0x43,0x00,0x00,0x8c,0x86,0x00,0x08,0x3c,0x02,0xb0,0x09,
52323 +0x34,0x42,0x01,0x14,0xa4,0x46,0x00,0x00,0x8c,0x85,0x00,0x0c,0x8c,0x82,0x00,0x08,
52324 +0x3c,0x06,0xb0,0x09,0x00,0x05,0x2c,0x00,0x00,0x02,0x14,0x02,0x00,0xa2,0x28,0x21,
52325 +0x34,0xc6,0x01,0x20,0xac,0xc5,0x00,0x00,0x8c,0x83,0x00,0x0c,0x3c,0x05,0xb0,0x09,
52326 +0x34,0xa5,0x01,0x24,0x00,0x03,0x1c,0x02,0xa4,0xa3,0x00,0x00,0x92,0x42,0x00,0x0a,
52327 +0x3c,0x03,0xb0,0x09,0x34,0x63,0x01,0x30,0x00,0x02,0x13,0x00,0x24,0x42,0x00,0x04,
52328 +0x30,0x42,0xff,0xff,0xa4,0x62,0x00,0x00,0x86,0x44,0x00,0x0c,0x27,0x83,0x99,0x58,
52329 +0x8f,0xbf,0x00,0x1c,0x00,0x04,0x10,0xc0,0x00,0x44,0x10,0x21,0x00,0x02,0x10,0x80,
52330 +0x00,0x43,0x10,0x21,0x94,0x44,0x00,0x02,0x8f,0xb2,0x00,0x18,0x7b,0xb0,0x00,0xbc,
52331 +0x3c,0x05,0xb0,0x09,0x34,0xa5,0x01,0x32,0xa4,0xa4,0x00,0x00,0x03,0xe0,0x00,0x08,
52332 +0x27,0xbd,0x00,0x20,0x27,0xbd,0xff,0xe0,0x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x00,
52333 +0xaf,0xb0,0x00,0x10,0x34,0x42,0x00,0x20,0x00,0xa0,0x80,0x21,0x24,0x63,0x52,0xf4,
52334 +0x00,0x05,0x2c,0x43,0xaf,0xb1,0x00,0x14,0xaf,0xbf,0x00,0x18,0xac,0x43,0x00,0x00,
52335 +0x10,0xa0,0x00,0x05,0x00,0x80,0x88,0x21,0x8c,0x82,0x00,0x34,0x00,0x00,0x00,0x00,
52336 +0x14,0x40,0x00,0xaf,0x00,0x00,0x00,0x00,0x32,0x10,0x00,0xff,0x12,0x00,0x00,0x47,
52337 +0x00,0x00,0x10,0x21,0x24,0x02,0x00,0x08,0x12,0x02,0x00,0x9c,0x2a,0x02,0x00,0x09,
52338 +0x10,0x40,0x00,0x84,0x24,0x02,0x00,0x40,0x24,0x04,0x00,0x02,0x12,0x04,0x00,0x74,
52339 +0x2a,0x02,0x00,0x03,0x10,0x40,0x00,0x64,0x24,0x02,0x00,0x04,0x24,0x02,0x00,0x01,
52340 +0x12,0x02,0x00,0x55,0x00,0x00,0x00,0x00,0x82,0x22,0x00,0x11,0x92,0x27,0x00,0x11,
52341 +0x10,0x40,0x00,0x4e,0x00,0x00,0x00,0x00,0x92,0x26,0x00,0x0a,0x24,0x02,0x00,0x12,
52342 +0x10,0x46,0x00,0x09,0x30,0xc2,0x00,0xff,0x27,0x83,0xbd,0x40,0x00,0x02,0x10,0x80,
52343 +0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x00,0x00,0x00,0x00,0x00,0x94,0x83,0x00,0x14,
52344 +0x00,0x00,0x00,0x00,0xa6,0x23,0x00,0x0c,0x3c,0x02,0xb0,0x09,0x34,0x42,0x00,0x40,
52345 +0x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x63,0x00,0x03,0xa2,0x23,0x00,0x10,
52346 +0x14,0x60,0x00,0x2b,0x30,0x65,0x00,0x01,0x30,0xc2,0x00,0xff,0x27,0x83,0xbd,0x40,
52347 +0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x00,0x82,0x23,0x00,0x12,
52348 +0x90,0x82,0x00,0x16,0x00,0x00,0x00,0x00,0x00,0x02,0x11,0x42,0x30,0x42,0x00,0x01,
52349 +0x00,0x62,0x18,0x21,0x00,0x03,0x26,0x00,0x14,0x80,0x00,0x18,0xa2,0x23,0x00,0x12,
52350 +0x00,0x07,0x16,0x00,0x14,0x40,0x00,0x11,0x24,0x02,0x00,0x01,0x96,0x23,0x00,0x0c,
52351 +0x27,0x84,0x99,0x50,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,
52352 +0x00,0x44,0x10,0x21,0x80,0x45,0x00,0x06,0x00,0x03,0x1a,0x00,0x3c,0x02,0xb0,0x00,
52353 +0x00,0x65,0x18,0x21,0x00,0x62,0x18,0x21,0x90,0x64,0x00,0x00,0x90,0x62,0x00,0x04,
52354 +0xa2,0x20,0x00,0x15,0xa3,0x80,0x95,0x14,0x24,0x02,0x00,0x01,0x8f,0xbf,0x00,0x18,
52355 +0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x0c,0x00,0x14,0x5a,
52356 +0x02,0x20,0x20,0x21,0x92,0x27,0x00,0x11,0x08,0x00,0x15,0x05,0x00,0x07,0x16,0x00,
52357 +0x0c,0x00,0x13,0xfb,0x02,0x20,0x20,0x21,0x86,0x23,0x00,0x0c,0x27,0x84,0x99,0x48,
52358 +0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x44,0x20,0x21,
52359 +0x90,0x85,0x00,0x07,0x27,0x83,0x99,0x50,0x00,0x43,0x10,0x21,0xa2,0x25,0x00,0x13,
52360 +0x90,0x83,0x00,0x07,0x08,0x00,0x15,0x1d,0xa0,0x43,0x00,0x02,0x92,0x26,0x00,0x0a,
52361 +0x08,0x00,0x14,0xe6,0x30,0xc2,0x00,0xff,0x8e,0x22,0x00,0x24,0x00,0x00,0x00,0x00,
52362 +0x10,0x50,0x00,0x07,0xa2,0x20,0x00,0x08,0x24,0x02,0x00,0x07,0xa2,0x22,0x00,0x0a,
52363 +0x92,0x22,0x00,0x27,0xae,0x20,0x00,0x24,0x08,0x00,0x14,0xde,0xa2,0x22,0x00,0x04,
52364 +0x08,0x00,0x15,0x37,0x24,0x02,0x00,0x06,0x16,0x02,0xff,0x9f,0x24,0x02,0x00,0x01,
52365 +0x8e,0x23,0x00,0x2c,0x00,0x00,0x00,0x00,0x10,0x62,0x00,0x07,0xa2,0x24,0x00,0x08,
52366 +0x24,0x02,0x00,0x03,0xa2,0x22,0x00,0x0a,0x92,0x22,0x00,0x2f,0xae,0x20,0x00,0x2c,
52367 +0x08,0x00,0x14,0xde,0xa2,0x22,0x00,0x06,0x08,0x00,0x15,0x46,0xa2,0x20,0x00,0x0a,
52368 +0x8e,0x22,0x00,0x28,0x24,0x03,0x00,0x01,0x24,0x04,0x00,0x01,0x10,0x44,0x00,0x07,
52369 +0xa2,0x23,0x00,0x08,0x24,0x02,0x00,0x05,0xa2,0x22,0x00,0x0a,0x92,0x22,0x00,0x2b,
52370 +0xae,0x20,0x00,0x28,0x08,0x00,0x14,0xde,0xa2,0x22,0x00,0x05,0x08,0x00,0x15,0x52,
52371 +0x24,0x02,0x00,0x04,0x12,0x02,0x00,0x10,0x2a,0x02,0x00,0x41,0x10,0x40,0x00,0x08,
52372 +0x24,0x02,0x00,0x80,0x24,0x02,0x00,0x20,0x16,0x02,0xff,0x7f,0x24,0x02,0x00,0x12,
52373 +0xa2,0x22,0x00,0x0a,0xa2,0x22,0x00,0x08,0x08,0x00,0x14,0xde,0xae,0x20,0x00,0x3c,
52374 +0x16,0x02,0xff,0x79,0x24,0x02,0x00,0x10,0xa2,0x22,0x00,0x0a,0xa2,0x22,0x00,0x08,
52375 +0x08,0x00,0x14,0xde,0xae,0x20,0x00,0x34,0x24,0x02,0x00,0x11,0xa2,0x22,0x00,0x0a,
52376 +0xa2,0x22,0x00,0x08,0x08,0x00,0x14,0xde,0xae,0x20,0x00,0x38,0x8e,0x24,0x00,0x30,
52377 +0x24,0x02,0x00,0x03,0x24,0x03,0x00,0x01,0x10,0x83,0x00,0x07,0xa2,0x22,0x00,0x08,
52378 +0x24,0x02,0x00,0x02,0xa2,0x22,0x00,0x0a,0x92,0x22,0x00,0x33,0xae,0x20,0x00,0x30,
52379 +0x08,0x00,0x14,0xde,0xa2,0x22,0x00,0x07,0x08,0x00,0x15,0x76,0xa2,0x24,0x00,0x0a,
52380 +0x8f,0x84,0xbd,0x80,0xae,0x20,0x00,0x34,0x94,0x85,0x00,0x14,0x0c,0x00,0x22,0xe1,
52381 +0x32,0x10,0x00,0xff,0x08,0x00,0x14,0xcf,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,
52382 +0x3c,0x02,0x80,0x00,0x24,0x42,0x56,0x0c,0x34,0x63,0x00,0x20,0xac,0x62,0x00,0x00,
52383 +0x80,0xa2,0x00,0x15,0x3c,0x06,0xb0,0x05,0x10,0x40,0x00,0x0a,0x34,0xc6,0x02,0x54,
52384 +0x83,0x83,0x95,0x14,0x00,0x00,0x00,0x00,0xac,0x83,0x00,0x24,0x8c,0xc2,0x00,0x00,
52385 +0x00,0x00,0x00,0x00,0x00,0x02,0x17,0x42,0x30,0x42,0x00,0x01,0x03,0xe0,0x00,0x08,
52386 +0xac,0x82,0x00,0x28,0x8c,0x82,0x00,0x2c,0x3c,0x06,0xb0,0x05,0x34,0xc6,0x04,0x50,
52387 +0x00,0x02,0x18,0x43,0x30,0x63,0x00,0x01,0x10,0x40,0x00,0x04,0x30,0x45,0x00,0x01,
52388 +0xac,0x83,0x00,0x28,0x03,0xe0,0x00,0x08,0xac,0x85,0x00,0x24,0x90,0xc2,0x00,0x00,
52389 +0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xff,0x30,0x43,0x00,0x02,0x30,0x42,0x00,0x01,
52390 +0xac,0x83,0x00,0x28,0x03,0xe0,0x00,0x08,0xac,0x82,0x00,0x24,0x3c,0x03,0xb0,0x03,
52391 +0x3c,0x02,0x80,0x00,0x27,0xbd,0xff,0xd8,0x34,0x63,0x00,0x20,0x24,0x42,0x56,0x9c,
52392 +0xac,0x62,0x00,0x00,0xaf,0xb1,0x00,0x1c,0xaf,0xbf,0x00,0x20,0xaf,0xb0,0x00,0x18,
52393 +0x90,0xa6,0x00,0x0a,0x27,0x83,0xbd,0x40,0x00,0xa0,0x88,0x21,0x00,0x06,0x10,0x80,
52394 +0x00,0x43,0x10,0x21,0x8c,0x50,0x00,0x00,0x80,0xa5,0x00,0x11,0x92,0x03,0x00,0x12,
52395 +0x10,0xa0,0x00,0x04,0xa2,0x20,0x00,0x15,0x24,0x02,0x00,0x12,0x10,0xc2,0x00,0xda,
52396 +0x00,0x00,0x00,0x00,0x82,0x22,0x00,0x12,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x67,
52397 +0x00,0x00,0x00,0x00,0xa2,0x20,0x00,0x12,0xa2,0x00,0x00,0x19,0x86,0x23,0x00,0x0c,
52398 +0x00,0x00,0x00,0x00,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,
52399 +0x27,0x83,0x99,0x60,0x00,0x43,0x10,0x21,0xa0,0x40,0x00,0x00,0x92,0x03,0x00,0x16,
52400 +0x00,0x00,0x00,0x00,0x30,0x63,0x00,0xdf,0xa2,0x03,0x00,0x16,0x82,0x02,0x00,0x12,
52401 +0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x20,0x00,0x00,0x00,0x00,0x92,0x23,0x00,0x08,
52402 +0x00,0x00,0x00,0x00,0x14,0x60,0x00,0x45,0x24,0x02,0x00,0x01,0xa2,0x20,0x00,0x04,
52403 +0x92,0x08,0x00,0x04,0x00,0x00,0x00,0x00,0x15,0x00,0x00,0x1e,0x24,0x02,0x00,0x01,
52404 +0x92,0x07,0x00,0x0a,0xa2,0x02,0x00,0x17,0x92,0x02,0x00,0x16,0x30,0xe3,0x00,0xff,
52405 +0x30,0x42,0x00,0xe4,0x10,0x60,0x00,0x03,0xa2,0x02,0x00,0x16,0x34,0x42,0x00,0x01,
52406 +0xa2,0x02,0x00,0x16,0x11,0x00,0x00,0x05,0x00,0x00,0x00,0x00,0x92,0x02,0x00,0x16,
52407 +0x00,0x00,0x00,0x00,0x34,0x42,0x00,0x02,0xa2,0x02,0x00,0x16,0x92,0x02,0x00,0x17,
52408 +0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x08,0x00,0x00,0x00,0x00,0x96,0x02,0x00,0x06,
52409 +0x00,0x00,0x00,0x00,0xa6,0x02,0x00,0x14,0x8f,0xbf,0x00,0x20,0x7b,0xb0,0x00,0xfc,
52410 +0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x28,0x96,0x02,0x00,0x00,0x08,0x00,0x15,0xf2,
52411 +0xa6,0x02,0x00,0x14,0x92,0x07,0x00,0x0a,0x00,0x00,0x00,0x00,0x14,0xe0,0x00,0x03,
52412 +0x00,0x00,0x00,0x00,0x08,0x00,0x15,0xde,0xa2,0x00,0x00,0x17,0x96,0x04,0x00,0x00,
52413 +0x96,0x05,0x00,0x06,0x27,0x86,0x99,0x40,0x00,0x04,0x18,0xc0,0x00,0x64,0x18,0x21,
52414 +0x00,0x05,0x10,0xc0,0x00,0x45,0x10,0x21,0x00,0x03,0x18,0x80,0x00,0x66,0x18,0x21,
52415 +0x00,0x02,0x10,0x80,0x00,0x46,0x10,0x21,0x8c,0x66,0x00,0x08,0x8c,0x45,0x00,0x08,
52416 +0x3c,0x03,0x80,0x00,0x00,0xc3,0x20,0x24,0x10,0x80,0x00,0x08,0x00,0xa3,0x10,0x24,
52417 +0x10,0x40,0x00,0x04,0x00,0x00,0x18,0x21,0x10,0x80,0x00,0x02,0x24,0x03,0x00,0x01,
52418 +0x00,0xa6,0x18,0x2b,0x08,0x00,0x15,0xde,0xa2,0x03,0x00,0x17,0x10,0x40,0xff,0xfd,
52419 +0x00,0xa6,0x18,0x2b,0x08,0x00,0x16,0x12,0x00,0x00,0x00,0x00,0x10,0x62,0x00,0x09,
52420 +0x24,0x02,0x00,0x02,0x10,0x62,0x00,0x05,0x24,0x02,0x00,0x03,0x14,0x62,0xff,0xb8,
52421 +0x00,0x00,0x00,0x00,0x08,0x00,0x15,0xd8,0xa2,0x20,0x00,0x07,0x08,0x00,0x15,0xd8,
52422 +0xa2,0x20,0x00,0x06,0x08,0x00,0x15,0xd8,0xa2,0x20,0x00,0x05,0x82,0x22,0x00,0x10,
52423 +0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x69,0x2c,0x62,0x00,0x02,0x10,0x40,0x00,0x49,
52424 +0x3c,0x02,0xb0,0x09,0x92,0x25,0x00,0x08,0x00,0x00,0x00,0x00,0x30,0xa6,0x00,0xff,
52425 +0x2c,0xc2,0x00,0x04,0x10,0x40,0x00,0x3b,0x2c,0xc2,0x00,0x10,0x3c,0x04,0xb0,0x05,
52426 +0x34,0x84,0x02,0x29,0x90,0x83,0x00,0x00,0x24,0x02,0x00,0x01,0x00,0xc2,0x10,0x04,
52427 +0x00,0x02,0x10,0x27,0x00,0x62,0x18,0x24,0xa0,0x83,0x00,0x00,0x86,0x23,0x00,0x0c,
52428 +0x96,0x26,0x00,0x0c,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x28,0x80,
52429 +0x27,0x83,0x99,0x44,0x00,0xa3,0x18,0x21,0x8c,0x64,0x00,0x18,0x00,0x00,0x00,0x00,
52430 +0x8c,0x82,0x00,0x04,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x10,0x10,0x40,0x00,0x18,
52431 +0x24,0x07,0x00,0x01,0x93,0x82,0x94,0x51,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x01,
52432 +0x14,0x40,0x00,0x0a,0x24,0x05,0x00,0x24,0x00,0x06,0x2c,0x00,0x00,0x05,0x2c,0x03,
52433 +0x0c,0x00,0x22,0xe1,0x02,0x00,0x20,0x21,0x92,0x02,0x00,0x16,0xa2,0x00,0x00,0x12,
52434 +0x30,0x42,0x00,0xe7,0x08,0x00,0x15,0xcf,0xa2,0x02,0x00,0x16,0xf0,0xc5,0x00,0x06,
52435 +0x00,0x00,0x28,0x12,0x27,0x82,0x99,0x40,0x00,0xa2,0x28,0x21,0x0c,0x00,0x01,0x49,
52436 +0x3c,0x04,0x00,0x80,0x96,0x26,0x00,0x0c,0x08,0x00,0x16,0x4f,0x00,0x06,0x2c,0x00,
52437 +0x27,0x83,0x99,0x50,0x27,0x82,0x99,0x58,0x00,0xa2,0x10,0x21,0x00,0xa3,0x18,0x21,
52438 +0x90,0x44,0x00,0x00,0x90,0x65,0x00,0x05,0x93,0x82,0x80,0x10,0x00,0x00,0x30,0x21,
52439 +0x0c,0x00,0x29,0x0b,0xaf,0xa2,0x00,0x10,0x96,0x26,0x00,0x0c,0x08,0x00,0x16,0x49,
52440 +0x00,0x00,0x00,0x00,0x14,0x40,0xff,0xcd,0x3c,0x04,0xb0,0x05,0x34,0x84,0x02,0x29,
52441 +0x90,0x83,0x00,0x00,0x30,0xa5,0x00,0x0f,0x24,0x02,0x00,0x80,0x08,0x00,0x16,0x38,
52442 +0x00,0xa2,0x10,0x07,0x86,0x26,0x00,0x0c,0x3c,0x03,0xb0,0x09,0x34,0x42,0x01,0x72,
52443 +0x34,0x63,0x01,0x78,0x94,0x47,0x00,0x00,0x8c,0x65,0x00,0x00,0x00,0x06,0x10,0xc0,
52444 +0x00,0x46,0x10,0x21,0x3c,0x04,0xb0,0x09,0xae,0x25,0x00,0x1c,0x34,0x84,0x01,0x7c,
52445 +0x27,0x83,0x99,0x44,0x00,0x02,0x10,0x80,0x8c,0x85,0x00,0x00,0x00,0x43,0x10,0x21,
52446 +0x8c,0x43,0x00,0x18,0xae,0x25,0x00,0x20,0xa6,0x27,0x00,0x18,0x8c,0x66,0x00,0x08,
52447 +0x02,0x20,0x20,0x21,0x0c,0x00,0x16,0x9f,0x00,0x00,0x28,0x21,0x86,0x25,0x00,0x18,
52448 +0x8e,0x26,0x00,0x1c,0x8e,0x27,0x00,0x20,0x02,0x20,0x20,0x21,0x0c,0x00,0x23,0xe3,
52449 +0xaf,0xa2,0x00,0x10,0x08,0x00,0x15,0xcf,0xa2,0x02,0x00,0x12,0x92,0x22,0x00,0x08,
52450 +0x08,0x00,0x15,0xcf,0xa2,0x22,0x00,0x09,0xa2,0x20,0x00,0x11,0x80,0x82,0x00,0x50,
52451 +0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x03,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0xd0,
52452 +0xac,0x40,0x00,0x00,0x08,0x00,0x15,0xcf,0xa0,0x80,0x00,0x50,0x94,0x8a,0x00,0x0c,
52453 +0x24,0x03,0x00,0x24,0x00,0x80,0x70,0x21,0x3c,0x02,0x80,0x00,0x3c,0x04,0xb0,0x03,
52454 +0x24,0x42,0x5a,0x7c,0xf1,0x43,0x00,0x06,0x34,0x84,0x00,0x20,0x00,0x00,0x18,0x12,
52455 +0x00,0xa0,0x68,0x21,0xac,0x82,0x00,0x00,0x27,0x85,0x99,0x50,0x27,0x82,0x99,0x4f,
52456 +0x27,0xbd,0xff,0xf8,0x00,0x62,0x60,0x21,0x00,0x65,0x58,0x21,0x00,0x00,0xc0,0x21,
52457 +0x11,0xa0,0x00,0xcc,0x00,0x00,0x78,0x21,0x00,0x0a,0x1c,0x00,0x00,0x03,0x1c,0x03,
52458 +0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x45,0x10,0x21,
52459 +0x91,0x87,0x00,0x00,0x80,0x48,0x00,0x04,0x03,0xa0,0x60,0x21,0x00,0x0a,0x1c,0x00,
52460 +0x00,0x03,0x1c,0x03,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x48,0x80,
52461 +0x27,0x83,0x99,0x44,0xa3,0xa7,0x00,0x00,0x01,0x23,0x18,0x21,0x8c,0x64,0x00,0x18,
52462 +0x25,0x02,0xff,0xff,0x00,0x48,0x40,0x0b,0x8c,0x83,0x00,0x04,0x2d,0x05,0x00,0x07,
52463 +0x24,0x02,0x00,0x06,0x30,0x63,0x00,0x08,0x14,0x60,0x00,0x35,0x00,0x45,0x40,0x0a,
52464 +0x93,0xa7,0x00,0x00,0x27,0x82,0x99,0x58,0x01,0x22,0x10,0x21,0x30,0xe3,0x00,0xf0,
52465 +0x38,0x63,0x00,0x50,0x30,0xe5,0x00,0xff,0x00,0x05,0x20,0x2b,0x00,0x03,0x18,0x2b,
52466 +0x00,0x64,0x18,0x24,0x90,0x49,0x00,0x00,0x10,0x60,0x00,0x16,0x30,0xe4,0x00,0x0f,
52467 +0x24,0x02,0x00,0x04,0x10,0xa2,0x00,0x9d,0x00,0x00,0x00,0x00,0x11,0xa0,0x00,0x3a,
52468 +0x2c,0xa2,0x00,0x0c,0x10,0x40,0x00,0x02,0x24,0x84,0x00,0x0c,0x00,0xe0,0x20,0x21,
52469 +0x30,0x84,0x00,0xff,0x00,0x04,0x10,0x40,0x27,0x83,0xc4,0x5c,0x00,0x44,0x10,0x21,
52470 +0x00,0x43,0x10,0x21,0x90,0x47,0x00,0x00,0x00,0x00,0x00,0x00,0x2c,0xe3,0x00,0x0c,
52471 +0xa3,0xa7,0x00,0x00,0x10,0x60,0x00,0x02,0x24,0xe2,0x00,0x04,0x00,0xe0,0x10,0x21,
52472 +0xa3,0xa2,0x00,0x00,0x91,0x65,0x00,0x00,0x91,0x82,0x00,0x00,0x30,0xa3,0x00,0xff,
52473 +0x00,0x62,0x10,0x2b,0x10,0x40,0x00,0x0e,0x2c,0x62,0x00,0x0c,0x14,0x40,0x00,0x03,
52474 +0x00,0x60,0x20,0x21,0x30,0xa2,0x00,0x0f,0x24,0x44,0x00,0x0c,0x00,0x04,0x10,0x40,
52475 +0x00,0x44,0x20,0x21,0x27,0x83,0xc4,0x5c,0x00,0x83,0x18,0x21,0x90,0x62,0x00,0x02,
52476 +0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x05,0x00,0x09,0x11,0x00,0xa1,0x85,0x00,0x00,
52477 +0x93,0xa2,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x08,0x00,0x49,0x10,0x23,
52478 +0x00,0x02,0x10,0x80,0x00,0x49,0x10,0x23,0x00,0x02,0x10,0x80,0x00,0x44,0x10,0x21,
52479 +0x27,0x83,0xbd,0xe8,0x00,0x43,0x10,0x21,0x90,0x44,0x00,0x00,0x00,0x00,0x00,0x00,
52480 +0x2c,0x83,0x00,0x0c,0x14,0x60,0x00,0x06,0x00,0x80,0x10,0x21,0x00,0x18,0x10,0x40,
52481 +0x00,0x4f,0x10,0x21,0x00,0x02,0x11,0x00,0x00,0x82,0x10,0x21,0x24,0x42,0x00,0x04,
52482 +0x08,0x00,0x17,0x00,0xa1,0x82,0x00,0x00,0x8f,0x8d,0x87,0x70,0x00,0x00,0x00,0x00,
52483 +0x01,0xa8,0x10,0x21,0x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x60,0xff,0xd1,
52484 +0x00,0x00,0x28,0x21,0x00,0x06,0x74,0x82,0x30,0xe2,0x00,0xff,0x2c,0x42,0x00,0x0c,
52485 +0x14,0x40,0x00,0x03,0x00,0xe0,0x10,0x21,0x30,0xe2,0x00,0x0f,0x24,0x42,0x00,0x0c,
52486 +0x30,0x44,0x00,0xff,0xa3,0xa2,0x00,0x00,0x24,0x02,0x00,0x0c,0x10,0x82,0x00,0x0d,
52487 +0x00,0x09,0x11,0x00,0x00,0x49,0x10,0x23,0x00,0x02,0x10,0x80,0x00,0x04,0x18,0x40,
52488 +0x00,0x49,0x10,0x23,0x00,0x64,0x18,0x21,0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,
52489 +0x27,0x84,0xbd,0xe8,0x00,0x44,0x10,0x21,0x90,0x47,0x00,0x00,0x00,0x00,0x00,0x00,
52490 +0xa3,0xa7,0x00,0x00,0x00,0x0a,0x1c,0x00,0x00,0x03,0x1c,0x03,0x00,0x03,0x10,0xc0,
52491 +0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x83,0x99,0x44,0x00,0x43,0x10,0x21,
52492 +0x8c,0x44,0x00,0x18,0x00,0x00,0x00,0x00,0x8c,0x83,0x00,0x04,0x00,0x00,0x00,0x00,
52493 +0x30,0x63,0x00,0x10,0x14,0x60,0x00,0x33,0x00,0x06,0x14,0x42,0x00,0x09,0x11,0x00,
52494 +0x00,0x49,0x10,0x23,0x00,0x02,0x10,0x80,0x00,0x49,0x10,0x23,0x27,0x83,0xbe,0xb8,
52495 +0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x90,0x44,0x00,0x04,0x90,0x43,0x00,0x05,
52496 +0x00,0x00,0x00,0x00,0x00,0x64,0xc0,0x24,0x93,0xa7,0x00,0x00,0x00,0x00,0x00,0x00,
52497 +0x2c,0xe2,0x00,0x0f,0x10,0x40,0x00,0x0f,0x31,0xcf,0x00,0x01,0x00,0x0a,0x1c,0x00,
52498 +0x00,0x03,0x1c,0x03,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,
52499 +0x27,0x84,0x99,0x40,0x00,0x44,0x10,0x21,0x84,0x43,0x00,0x06,0x00,0x00,0x00,0x00,
52500 +0x28,0x63,0x06,0x41,0x14,0x60,0x00,0x04,0x30,0xe2,0x00,0xff,0x24,0x07,0x00,0x0f,
52501 +0xa3,0xa7,0x00,0x00,0x30,0xe2,0x00,0xff,0x2c,0x42,0x00,0x0c,0x14,0x40,0x00,0x06,
52502 +0x00,0xe0,0x10,0x21,0x00,0x18,0x10,0x40,0x00,0x4f,0x10,0x21,0x00,0x02,0x11,0x00,
52503 +0x00,0x47,0x10,0x21,0x24,0x42,0x00,0x04,0xa3,0xa2,0x00,0x00,0x00,0x40,0x38,0x21,
52504 +0x01,0xa8,0x10,0x21,0x90,0x43,0x00,0x00,0x24,0xa4,0x00,0x01,0x30,0x85,0xff,0xff,
52505 +0x00,0xa3,0x18,0x2b,0x14,0x60,0xff,0xad,0x30,0xe2,0x00,0xff,0x08,0x00,0x16,0xed,
52506 +0x00,0x00,0x00,0x00,0x08,0x00,0x17,0x4e,0x30,0x58,0x00,0x01,0x81,0xc2,0x00,0x48,
52507 +0x00,0x00,0x00,0x00,0x10,0x40,0xff,0x73,0x00,0x00,0x00,0x00,0x08,0x00,0x16,0xdb,
52508 +0x00,0x00,0x00,0x00,0x00,0x0a,0x1c,0x00,0x00,0x03,0x1c,0x03,0x00,0x03,0x10,0xc0,
52509 +0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x45,0x10,0x21,0x80,0x48,0x00,0x05,
52510 +0x91,0x67,0x00,0x00,0x08,0x00,0x16,0xbb,0x03,0xa0,0x58,0x21,0x3c,0x03,0xb0,0x03,
52511 +0x3c,0x02,0x80,0x00,0x34,0x63,0x00,0x20,0x24,0x42,0x5e,0x1c,0x03,0xe0,0x00,0x08,
52512 +0xac,0x62,0x00,0x00,0x27,0xbd,0xff,0xc0,0xaf,0xb7,0x00,0x34,0xaf,0xb6,0x00,0x30,
52513 +0xaf,0xb5,0x00,0x2c,0xaf,0xb4,0x00,0x28,0xaf,0xb3,0x00,0x24,0xaf,0xb2,0x00,0x20,
52514 +0xaf,0xbf,0x00,0x3c,0xaf,0xbe,0x00,0x38,0xaf,0xb1,0x00,0x1c,0xaf,0xb0,0x00,0x18,
52515 +0x84,0x82,0x00,0x0c,0x27,0x93,0x99,0x44,0x3c,0x05,0xb0,0x03,0x00,0x02,0x18,0xc0,
52516 +0x00,0x62,0x18,0x21,0x00,0x03,0x18,0x80,0x00,0x73,0x10,0x21,0x8c,0x5e,0x00,0x18,
52517 +0x3c,0x02,0x80,0x00,0x34,0xa5,0x00,0x20,0x24,0x42,0x5e,0x34,0xac,0xa2,0x00,0x00,
52518 +0x8f,0xd0,0x00,0x08,0x27,0x95,0x99,0x50,0x00,0x75,0x18,0x21,0x00,0x00,0x28,0x21,
52519 +0x02,0x00,0x30,0x21,0x90,0x71,0x00,0x00,0x0c,0x00,0x16,0x9f,0x00,0x80,0xb0,0x21,
52520 +0x00,0x40,0x90,0x21,0x00,0x10,0x14,0x42,0x30,0x54,0x00,0x01,0x02,0x40,0x20,0x21,
52521 +0x00,0x10,0x14,0x82,0x02,0x80,0x28,0x21,0x12,0x51,0x00,0x23,0x00,0x10,0xbf,0xc2,
52522 +0x86,0xc3,0x00,0x0c,0x30,0x50,0x00,0x01,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,
52523 +0x00,0x02,0x10,0x80,0x00,0x55,0x10,0x21,0xa0,0x52,0x00,0x00,0x86,0xc3,0x00,0x0c,
52524 +0x00,0x00,0x00,0x00,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,
52525 +0x00,0x53,0x30,0x21,0x8c,0xc7,0x00,0x18,0x27,0x83,0x99,0x40,0x00,0x43,0x10,0x21,
52526 +0x8c,0xe3,0x00,0x04,0x84,0x46,0x00,0x06,0x00,0x03,0x19,0x42,0x0c,0x00,0x10,0x70,
52527 +0x30,0x73,0x00,0x01,0x00,0x40,0x88,0x21,0x02,0x40,0x20,0x21,0x02,0x80,0x28,0x21,
52528 +0x16,0xe0,0x00,0x10,0x02,0x00,0x30,0x21,0x86,0xc2,0x00,0x0c,0x00,0x00,0x00,0x00,
52529 +0x00,0x02,0x18,0xc0,0x00,0x62,0x18,0x21,0x00,0x03,0x18,0x80,0x27,0x82,0x99,0x48,
52530 +0x00,0x62,0x18,0x21,0xa4,0x71,0x00,0x04,0x7b,0xbe,0x01,0xfc,0x7b,0xb6,0x01,0xbc,
52531 +0x7b,0xb4,0x01,0x7c,0x7b,0xb2,0x01,0x3c,0x7b,0xb0,0x00,0xfc,0x03,0xe0,0x00,0x08,
52532 +0x27,0xbd,0x00,0x40,0x86,0xc3,0x00,0x0c,0xaf,0xb3,0x00,0x10,0xaf,0xa0,0x00,0x14,
52533 +0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x55,0x10,0x21,
52534 +0x80,0x47,0x00,0x06,0x00,0x00,0x00,0x00,0x24,0xe7,0x00,0x02,0x00,0x07,0x17,0xc2,
52535 +0x00,0xe2,0x38,0x21,0x00,0x07,0x38,0x43,0x00,0x07,0x38,0x40,0x0c,0x00,0x10,0x97,
52536 +0x03,0xc7,0x38,0x21,0x08,0x00,0x17,0xce,0x02,0x22,0x88,0x21,0x3c,0x03,0xb0,0x03,
52537 +0x3c,0x02,0x80,0x00,0x27,0xbd,0xff,0xd0,0x34,0x63,0x00,0x20,0x24,0x42,0x5f,0xbc,
52538 +0xaf,0xb2,0x00,0x20,0xac,0x62,0x00,0x00,0xaf,0xbf,0x00,0x28,0xaf,0xb3,0x00,0x24,
52539 +0xaf,0xb1,0x00,0x1c,0xaf,0xb0,0x00,0x18,0x3c,0x02,0xb0,0x03,0x90,0x83,0x00,0x0a,
52540 +0x34,0x42,0x01,0x04,0x94,0x45,0x00,0x00,0x00,0x03,0x18,0x80,0x27,0x82,0xbd,0x40,
52541 +0x00,0x62,0x18,0x21,0x30,0xa6,0xff,0xff,0x8c,0x71,0x00,0x00,0x80,0x85,0x00,0x12,
52542 +0x30,0xc9,0x00,0xff,0x00,0x06,0x32,0x02,0xa4,0x86,0x00,0x44,0xa4,0x89,0x00,0x46,
52543 +0x82,0x22,0x00,0x12,0x00,0x80,0x90,0x21,0x10,0xa0,0x00,0x1b,0xa0,0x80,0x00,0x15,
52544 +0x00,0xc5,0x10,0x2a,0x10,0x40,0x00,0x14,0x00,0x00,0x00,0x00,0xa2,0x20,0x00,0x19,
52545 +0x84,0x83,0x00,0x0c,0x00,0x00,0x00,0x00,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,
52546 +0x00,0x02,0x10,0x80,0x27,0x83,0x99,0x60,0x00,0x43,0x10,0x21,0xa0,0x40,0x00,0x00,
52547 +0xa0,0x80,0x00,0x12,0x92,0x22,0x00,0x16,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xdf,
52548 +0xa2,0x22,0x00,0x16,0x8f,0xbf,0x00,0x28,0x7b,0xb2,0x01,0x3c,0x7b,0xb0,0x00,0xfc,
52549 +0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x30,0x0c,0x00,0x17,0x87,0x00,0x00,0x00,0x00,
52550 +0x08,0x00,0x18,0x1d,0x00,0x00,0x00,0x00,0x28,0x42,0x00,0x02,0x10,0x40,0x01,0x76,
52551 +0x00,0x00,0x28,0x21,0x94,0x87,0x00,0x0c,0x00,0x00,0x00,0x00,0x00,0xe0,0x10,0x21,
52552 +0x00,0x02,0x14,0x00,0x00,0x02,0x14,0x03,0x00,0x07,0x24,0x00,0x00,0x04,0x24,0x03,
52553 +0x00,0x02,0x18,0xc0,0x00,0x62,0x18,0x21,0x00,0x04,0x28,0xc0,0x00,0xa4,0x28,0x21,
52554 +0x27,0x82,0x99,0x60,0x00,0x03,0x18,0x80,0x00,0x62,0x18,0x21,0x00,0x05,0x28,0x80,
52555 +0x27,0x82,0x99,0x48,0x00,0xa2,0x10,0x21,0x8c,0x68,0x00,0x00,0x80,0x44,0x00,0x06,
52556 +0x27,0x82,0x99,0x50,0x00,0x08,0x1d,0x02,0x00,0xa2,0x28,0x21,0x38,0x84,0x00,0x00,
52557 +0x30,0x63,0x00,0x01,0x01,0x24,0x30,0x0b,0x80,0xaa,0x00,0x04,0x80,0xa9,0x00,0x05,
52558 +0x10,0x60,0x00,0x02,0x00,0x08,0x14,0x02,0x30,0x46,0x00,0x0f,0x15,0x20,0x00,0x28,
52559 +0x01,0x49,0x10,0x21,0x15,0x40,0x00,0x11,0x30,0xe3,0xff,0xff,0x92,0x45,0x00,0x08,
52560 +0x00,0x00,0x00,0x00,0x30,0xa8,0x00,0xff,0x2d,0x02,0x00,0x04,0x10,0x40,0x01,0x46,
52561 +0x2d,0x02,0x00,0x10,0x3c,0x04,0xb0,0x05,0x34,0x84,0x02,0x29,0x90,0x83,0x00,0x00,
52562 +0x24,0x02,0x00,0x01,0x01,0x02,0x10,0x04,0x00,0x62,0x18,0x25,0xa0,0x83,0x00,0x00,
52563 +0x96,0x47,0x00,0x0c,0x00,0x00,0x00,0x00,0x30,0xe3,0xff,0xff,0x00,0x03,0x10,0xc0,
52564 +0x00,0x43,0x10,0x21,0x27,0x84,0x99,0x50,0x00,0x02,0x10,0x80,0x00,0x44,0x10,0x21,
52565 +0x80,0x45,0x00,0x06,0x00,0x03,0x1a,0x00,0x3c,0x04,0xb0,0x00,0x00,0x65,0x18,0x21,
52566 +0x00,0x64,0x20,0x21,0x94,0x82,0x00,0x00,0x82,0x43,0x00,0x10,0x00,0x02,0x14,0x00,
52567 +0x14,0x60,0x00,0x06,0x00,0x02,0x3c,0x03,0x30,0xe2,0x00,0x04,0x14,0x40,0x00,0x04,
52568 +0x01,0x49,0x10,0x21,0x34,0xe2,0x08,0x00,0xa4,0x82,0x00,0x00,0x01,0x49,0x10,0x21,
52569 +0x00,0x02,0x16,0x00,0x00,0x02,0x16,0x03,0x00,0x46,0x10,0x2a,0x10,0x40,0x00,0x7c,
52570 +0x00,0x00,0x00,0x00,0x82,0x42,0x00,0x10,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x0e,
52571 +0x00,0x00,0x00,0x00,0x86,0x43,0x00,0x0c,0x25,0x44,0x00,0x01,0x00,0x03,0x10,0xc0,
52572 +0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x83,0x99,0x50,0x00,0x43,0x10,0x21,
52573 +0xa0,0x44,0x00,0x04,0x92,0x23,0x00,0x16,0x02,0x40,0x20,0x21,0x30,0x63,0x00,0xfb,
52574 +0x08,0x00,0x18,0x22,0xa2,0x23,0x00,0x16,0x86,0x43,0x00,0x0c,0x25,0x24,0x00,0x01,
52575 +0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x83,0x99,0x50,
52576 +0x00,0x43,0x10,0x21,0xa0,0x44,0x00,0x05,0x86,0x45,0x00,0x0c,0x0c,0x00,0x26,0x5b,
52577 +0x02,0x20,0x20,0x21,0x10,0x40,0x00,0x5a,0x00,0x00,0x00,0x00,0x92,0x45,0x00,0x08,
52578 +0x00,0x00,0x00,0x00,0x30,0xa6,0x00,0xff,0x2c,0xc2,0x00,0x04,0x10,0x40,0x00,0x4c,
52579 +0x2c,0xc2,0x00,0x10,0x3c,0x04,0xb0,0x05,0x34,0x84,0x02,0x29,0x90,0x83,0x00,0x00,
52580 +0x24,0x02,0x00,0x01,0x00,0xc2,0x10,0x04,0x00,0x02,0x10,0x27,0x00,0x62,0x18,0x24,
52581 +0xa0,0x83,0x00,0x00,0x92,0x45,0x00,0x08,0x00,0x00,0x00,0x00,0x30,0xa5,0x00,0xff,
52582 +0x14,0xa0,0x00,0x33,0x24,0x02,0x00,0x01,0xa2,0x40,0x00,0x04,0x92,0x22,0x00,0x04,
52583 +0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x0c,0x24,0x02,0x00,0x01,0xa2,0x22,0x00,0x17,
52584 +0x92,0x22,0x00,0x17,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x04,0x00,0x00,0x00,0x00,
52585 +0x96,0x22,0x00,0x06,0x08,0x00,0x18,0x1d,0xa6,0x22,0x00,0x14,0x96,0x22,0x00,0x00,
52586 +0x08,0x00,0x18,0x1d,0xa6,0x22,0x00,0x14,0x92,0x22,0x00,0x0a,0x00,0x00,0x00,0x00,
52587 +0x14,0x40,0x00,0x03,0x00,0x00,0x00,0x00,0x08,0x00,0x18,0xac,0xa2,0x20,0x00,0x17,
52588 +0x96,0x24,0x00,0x00,0x96,0x25,0x00,0x06,0x27,0x86,0x99,0x40,0x00,0x04,0x18,0xc0,
52589 +0x00,0x64,0x18,0x21,0x00,0x05,0x10,0xc0,0x00,0x45,0x10,0x21,0x00,0x03,0x18,0x80,
52590 +0x00,0x66,0x18,0x21,0x00,0x02,0x10,0x80,0x00,0x46,0x10,0x21,0x8c,0x65,0x00,0x08,
52591 +0x8c,0x44,0x00,0x08,0x3c,0x03,0x80,0x00,0x00,0xa3,0x30,0x24,0x10,0xc0,0x00,0x08,
52592 +0x00,0x83,0x10,0x24,0x10,0x40,0x00,0x04,0x00,0x00,0x18,0x21,0x10,0xc0,0x00,0x02,
52593 +0x24,0x03,0x00,0x01,0x00,0x85,0x18,0x2b,0x08,0x00,0x18,0xac,0xa2,0x23,0x00,0x17,
52594 +0x10,0x40,0xff,0xfd,0x00,0x85,0x18,0x2b,0x08,0x00,0x18,0xcf,0x00,0x00,0x00,0x00,
52595 +0x10,0xa2,0x00,0x09,0x24,0x02,0x00,0x02,0x10,0xa2,0x00,0x05,0x24,0x02,0x00,0x03,
52596 +0x14,0xa2,0xff,0xca,0x00,0x00,0x00,0x00,0x08,0x00,0x18,0xa7,0xa2,0x40,0x00,0x07,
52597 +0x08,0x00,0x18,0xa7,0xa2,0x40,0x00,0x06,0x08,0x00,0x18,0xa7,0xa2,0x40,0x00,0x05,
52598 +0x14,0x40,0xff,0xbe,0x3c,0x04,0xb0,0x05,0x34,0x84,0x02,0x29,0x90,0x83,0x00,0x00,
52599 +0x30,0xa5,0x00,0x0f,0x24,0x02,0x00,0x80,0x08,0x00,0x18,0x9e,0x00,0xa2,0x10,0x07,
52600 +0x0c,0x00,0x17,0x8d,0x02,0x40,0x20,0x21,0x08,0x00,0x18,0x1d,0x00,0x00,0x00,0x00,
52601 +0x92,0x45,0x00,0x08,0x00,0x00,0x00,0x00,0x30,0xa6,0x00,0xff,0x2c,0xc2,0x00,0x04,
52602 +0x10,0x40,0x00,0x99,0x2c,0xc2,0x00,0x10,0x3c,0x04,0xb0,0x05,0x34,0x84,0x02,0x29,
52603 +0x90,0x83,0x00,0x00,0x24,0x02,0x00,0x01,0x00,0xc2,0x10,0x04,0x00,0x02,0x10,0x27,
52604 +0x00,0x62,0x18,0x24,0xa0,0x83,0x00,0x00,0x92,0x45,0x00,0x08,0x00,0x00,0x00,0x00,
52605 +0x30,0xa5,0x00,0xff,0x14,0xa0,0x00,0x80,0x24,0x02,0x00,0x01,0xa2,0x40,0x00,0x04,
52606 +0x86,0x43,0x00,0x0c,0x27,0x93,0x99,0x44,0x96,0x47,0x00,0x0c,0x00,0x03,0x10,0xc0,
52607 +0x00,0x43,0x10,0x21,0x00,0x02,0x28,0x80,0x00,0xb3,0x18,0x21,0x8c,0x64,0x00,0x18,
52608 +0x00,0x00,0x00,0x00,0x8c,0x82,0x00,0x04,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x10,
52609 +0x10,0x40,0x00,0x64,0x00,0x00,0x30,0x21,0x00,0x07,0x1c,0x00,0x00,0x03,0x1c,0x03,
52610 +0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x53,0x10,0x21,
52611 +0x8c,0x43,0x00,0x18,0x93,0x82,0x94,0x51,0x8c,0x64,0x00,0x04,0x30,0x42,0x00,0x01,
52612 +0x00,0x04,0x21,0x42,0x14,0x40,0x00,0x4d,0x30,0x90,0x00,0x01,0x00,0x07,0x2c,0x00,
52613 +0x00,0x05,0x2c,0x03,0x0c,0x00,0x22,0xe1,0x02,0x20,0x20,0x21,0x96,0x26,0x00,0x06,
52614 +0x12,0x00,0x00,0x14,0x30,0xc5,0xff,0xff,0x02,0x60,0x90,0x21,0x00,0x05,0x10,0xc0,
52615 +0x00,0x45,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x52,0x18,0x21,0x92,0x22,0x00,0x0a,
52616 +0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x0b,0x02,0x20,0x20,0x21,0x8c,0x63,0x00,0x18,
52617 +0x00,0x00,0x00,0x00,0x8c,0x62,0x00,0x04,0x00,0x00,0x00,0x00,0x00,0x02,0x11,0x42,
52618 +0x0c,0x00,0x22,0xe1,0x30,0x50,0x00,0x01,0x96,0x26,0x00,0x06,0x16,0x00,0xff,0xef,
52619 +0x30,0xc5,0xff,0xff,0x92,0x22,0x00,0x04,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x0d,
52620 +0x24,0x02,0x00,0x01,0xa2,0x22,0x00,0x17,0x92,0x22,0x00,0x17,0x00,0x00,0x00,0x00,
52621 +0x10,0x40,0x00,0x05,0x00,0x00,0x00,0x00,0xa6,0x26,0x00,0x14,0x92,0x22,0x00,0x16,
52622 +0x08,0x00,0x18,0x1c,0x30,0x42,0x00,0xc3,0x96,0x22,0x00,0x00,0x08,0x00,0x19,0x43,
52623 +0xa6,0x22,0x00,0x14,0x92,0x22,0x00,0x0a,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x03,
52624 +0x00,0x00,0x00,0x00,0x08,0x00,0x19,0x3e,0xa2,0x20,0x00,0x17,0x96,0x24,0x00,0x00,
52625 +0x30,0xc5,0xff,0xff,0x00,0x05,0x18,0xc0,0x00,0x04,0x10,0xc0,0x00,0x44,0x10,0x21,
52626 +0x00,0x65,0x18,0x21,0x27,0x84,0x99,0x40,0x00,0x02,0x10,0x80,0x00,0x44,0x10,0x21,
52627 +0x00,0x03,0x18,0x80,0x8c,0x45,0x00,0x08,0x00,0x64,0x18,0x21,0x8c,0x64,0x00,0x08,
52628 +0x3c,0x02,0x80,0x00,0x00,0xa2,0x38,0x24,0x10,0xe0,0x00,0x08,0x00,0x82,0x10,0x24,
52629 +0x10,0x40,0x00,0x04,0x00,0x00,0x18,0x21,0x10,0xe0,0x00,0x02,0x24,0x03,0x00,0x01,
52630 +0x00,0x85,0x18,0x2b,0x08,0x00,0x19,0x3e,0xa2,0x23,0x00,0x17,0x10,0x40,0xff,0xfd,
52631 +0x00,0x85,0x18,0x2b,0x08,0x00,0x19,0x62,0x00,0x00,0x00,0x00,0x24,0x05,0x00,0x24,
52632 +0xf0,0xe5,0x00,0x06,0x00,0x00,0x28,0x12,0x27,0x82,0x99,0x40,0x00,0xa2,0x28,0x21,
52633 +0x0c,0x00,0x01,0x49,0x00,0x00,0x20,0x21,0x96,0x47,0x00,0x0c,0x08,0x00,0x19,0x20,
52634 +0x00,0x07,0x2c,0x00,0x27,0x83,0x99,0x50,0x27,0x82,0x99,0x58,0x00,0xa2,0x10,0x21,
52635 +0x00,0xa3,0x18,0x21,0x90,0x44,0x00,0x00,0x90,0x65,0x00,0x05,0x93,0x82,0x80,0x10,
52636 +0x24,0x07,0x00,0x01,0x0c,0x00,0x29,0x0b,0xaf,0xa2,0x00,0x10,0x96,0x47,0x00,0x0c,
52637 +0x08,0x00,0x19,0x13,0x00,0x07,0x1c,0x00,0x10,0xa2,0x00,0x09,0x24,0x02,0x00,0x02,
52638 +0x10,0xa2,0x00,0x05,0x24,0x02,0x00,0x03,0x14,0xa2,0xff,0x7d,0x00,0x00,0x00,0x00,
52639 +0x08,0x00,0x19,0x04,0xa2,0x40,0x00,0x07,0x08,0x00,0x19,0x04,0xa2,0x40,0x00,0x06,
52640 +0x08,0x00,0x19,0x04,0xa2,0x40,0x00,0x05,0x14,0x40,0xff,0x71,0x3c,0x04,0xb0,0x05,
52641 +0x34,0x84,0x02,0x29,0x90,0x83,0x00,0x00,0x30,0xa5,0x00,0x0f,0x24,0x02,0x00,0x80,
52642 +0x08,0x00,0x18,0xfb,0x00,0xa2,0x10,0x07,0x14,0x40,0xfe,0xc3,0x3c,0x04,0xb0,0x05,
52643 +0x34,0x84,0x02,0x29,0x90,0x83,0x00,0x00,0x30,0xa5,0x00,0x0f,0x24,0x02,0x00,0x80,
52644 +0x08,0x00,0x18,0x56,0x00,0xa2,0x10,0x07,0x84,0x83,0x00,0x0c,0x00,0x00,0x00,0x00,
52645 +0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x83,0x99,0x44,
52646 +0x00,0x43,0x10,0x21,0x8c,0x47,0x00,0x18,0x00,0x00,0x00,0x00,0x8c,0xe6,0x00,0x08,
52647 +0x0c,0x00,0x16,0x9f,0x00,0x00,0x00,0x00,0x02,0x40,0x20,0x21,0x00,0x00,0x28,0x21,
52648 +0x00,0x00,0x30,0x21,0x00,0x00,0x38,0x21,0x0c,0x00,0x23,0xe3,0xaf,0xa2,0x00,0x10,
52649 +0x00,0x02,0x1e,0x00,0x14,0x60,0xfe,0x6b,0xa2,0x22,0x00,0x12,0x92,0x43,0x00,0x08,
52650 +0x00,0x00,0x00,0x00,0x14,0x60,0x00,0x40,0x24,0x02,0x00,0x01,0xa2,0x40,0x00,0x04,
52651 +0x92,0x28,0x00,0x04,0x00,0x00,0x00,0x00,0x15,0x00,0x00,0x19,0x24,0x02,0x00,0x01,
52652 +0x92,0x27,0x00,0x0a,0xa2,0x22,0x00,0x17,0x92,0x22,0x00,0x17,0x00,0x00,0x00,0x00,
52653 +0x10,0x40,0x00,0x10,0x00,0x00,0x00,0x00,0x96,0x22,0x00,0x06,0x00,0x00,0x00,0x00,
52654 +0xa6,0x22,0x00,0x14,0x92,0x22,0x00,0x16,0x30,0xe3,0x00,0xff,0x30,0x42,0x00,0xc0,
52655 +0x10,0x60,0x00,0x03,0xa2,0x22,0x00,0x16,0x34,0x42,0x00,0x01,0xa2,0x22,0x00,0x16,
52656 +0x11,0x00,0xfe,0x50,0x00,0x00,0x00,0x00,0x92,0x22,0x00,0x16,0x08,0x00,0x18,0x1c,
52657 +0x34,0x42,0x00,0x02,0x96,0x22,0x00,0x00,0x08,0x00,0x19,0xc5,0xa6,0x22,0x00,0x14,
52658 +0x92,0x27,0x00,0x0a,0x00,0x00,0x00,0x00,0x14,0xe0,0x00,0x03,0x00,0x00,0x00,0x00,
52659 +0x08,0x00,0x19,0xbe,0xa2,0x20,0x00,0x17,0x96,0x24,0x00,0x00,0x96,0x25,0x00,0x06,
52660 +0x27,0x86,0x99,0x40,0x00,0x04,0x18,0xc0,0x00,0x64,0x18,0x21,0x00,0x05,0x10,0xc0,
52661 +0x00,0x45,0x10,0x21,0x00,0x03,0x18,0x80,0x00,0x66,0x18,0x21,0x00,0x02,0x10,0x80,
52662 +0x00,0x46,0x10,0x21,0x8c,0x65,0x00,0x08,0x8c,0x44,0x00,0x08,0x3c,0x03,0x80,0x00,
52663 +0x00,0xa3,0x30,0x24,0x10,0xc0,0x00,0x08,0x00,0x83,0x10,0x24,0x10,0x40,0x00,0x04,
52664 +0x00,0x00,0x18,0x21,0x10,0xc0,0x00,0x02,0x24,0x03,0x00,0x01,0x00,0x85,0x18,0x2b,
52665 +0x08,0x00,0x19,0xbe,0xa2,0x23,0x00,0x17,0x10,0x40,0xff,0xfd,0x00,0x85,0x18,0x2b,
52666 +0x08,0x00,0x19,0xed,0x00,0x00,0x00,0x00,0x10,0x62,0x00,0x09,0x24,0x02,0x00,0x02,
52667 +0x10,0x62,0x00,0x05,0x24,0x02,0x00,0x03,0x14,0x62,0xff,0xbd,0x00,0x00,0x00,0x00,
52668 +0x08,0x00,0x19,0xb8,0xa2,0x40,0x00,0x07,0x08,0x00,0x19,0xb8,0xa2,0x40,0x00,0x06,
52669 +0x08,0x00,0x19,0xb8,0xa2,0x40,0x00,0x05,0x3c,0x02,0x80,0x00,0x00,0x82,0x30,0x24,
52670 +0x10,0xc0,0x00,0x08,0x00,0xa2,0x18,0x24,0x10,0x60,0x00,0x04,0x00,0x00,0x10,0x21,
52671 +0x10,0xc0,0x00,0x02,0x24,0x02,0x00,0x01,0x00,0xa4,0x10,0x2b,0x03,0xe0,0x00,0x08,
52672 +0x00,0x00,0x00,0x00,0x10,0x60,0xff,0xfd,0x00,0xa4,0x10,0x2b,0x08,0x00,0x1a,0x08,
52673 +0x00,0x00,0x00,0x00,0x30,0x82,0xff,0xff,0x00,0x02,0x18,0xc0,0x00,0x62,0x18,0x21,
52674 +0x27,0x84,0x99,0x50,0x00,0x03,0x18,0x80,0x00,0x64,0x18,0x21,0x80,0x66,0x00,0x06,
52675 +0x00,0x02,0x12,0x00,0x3c,0x03,0xb0,0x00,0x00,0x46,0x10,0x21,0x00,0x45,0x10,0x21,
52676 +0x03,0xe0,0x00,0x08,0x00,0x43,0x10,0x21,0x27,0xbd,0xff,0xe0,0x30,0x82,0x00,0x7c,
52677 +0x30,0x84,0xff,0x00,0xaf,0xbf,0x00,0x1c,0xaf,0xb2,0x00,0x18,0xaf,0xb1,0x00,0x14,
52678 +0xaf,0xb0,0x00,0x10,0x14,0x40,0x00,0x41,0x00,0x04,0x22,0x03,0x24,0x02,0x00,0x04,
52679 +0x3c,0x10,0xb0,0x03,0x8e,0x10,0x00,0x00,0x10,0x82,0x00,0x32,0x24,0x02,0x00,0x08,
52680 +0x10,0x82,0x00,0x03,0x32,0x02,0x00,0x20,0x08,0x00,0x1a,0x2e,0x00,0x00,0x00,0x00,
52681 +0x10,0x40,0x00,0x17,0x3c,0x02,0xb0,0x06,0x34,0x42,0x80,0x24,0x8c,0x43,0x00,0x00,
52682 +0x00,0x00,0x00,0x00,0x30,0x67,0x00,0xff,0x10,0xe0,0x00,0x23,0x00,0x00,0x88,0x21,
52683 +0x8f,0x85,0x99,0x20,0x00,0x40,0x30,0x21,0x94,0xa2,0x00,0x08,0x8c,0xc3,0x00,0x00,
52684 +0x26,0x31,0x00,0x01,0x24,0x42,0x00,0x02,0x30,0x42,0x01,0xff,0x34,0x63,0x01,0x00,
52685 +0x02,0x27,0x20,0x2a,0xa4,0xa2,0x00,0x08,0x14,0x80,0xff,0xf7,0xac,0xc3,0x00,0x00,
52686 +0x84,0xa3,0x00,0x08,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x30,0xac,0x43,0x00,0x00,
52687 +0x27,0x92,0xbd,0x40,0x24,0x11,0x00,0x12,0x8e,0x44,0x00,0x00,0x26,0x31,0xff,0xff,
52688 +0x90,0x82,0x00,0x10,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x03,0x26,0x52,0x00,0x04,
52689 +0x0c,0x00,0x20,0x48,0x00,0x00,0x00,0x00,0x06,0x21,0xff,0xf7,0x24,0x02,0xff,0xdf,
52690 +0x02,0x02,0x80,0x24,0x3c,0x01,0xb0,0x03,0x0c,0x00,0x1a,0xe6,0xac,0x30,0x00,0x00,
52691 +0x08,0x00,0x1a,0x2e,0x00,0x00,0x00,0x00,0x8f,0x85,0x99,0x20,0x08,0x00,0x1a,0x44,
52692 +0x00,0x00,0x00,0x00,0x24,0x02,0xff,0x95,0x3c,0x03,0xb0,0x03,0x02,0x02,0x80,0x24,
52693 +0x34,0x63,0x00,0x30,0x3c,0x01,0xb0,0x03,0xac,0x30,0x00,0x00,0x0c,0x00,0x1a,0xaf,
52694 +0xac,0x60,0x00,0x00,0x08,0x00,0x1a,0x2e,0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,
52695 +0x34,0x42,0x00,0x50,0x08,0x00,0x1a,0x2e,0xac,0x46,0x00,0x00,0xaf,0xa7,0x00,0x0c,
52696 +0xaf,0xa4,0x00,0x00,0xaf,0xa5,0x00,0x04,0xaf,0xa6,0x00,0x08,0x27,0xbd,0xfe,0xe8,
52697 +0x00,0x80,0x28,0x21,0x27,0xa6,0x01,0x1c,0x27,0xa4,0x00,0x10,0xaf,0xbf,0x01,0x14,
52698 +0x0c,0x00,0x2e,0x2c,0xaf,0xb0,0x01,0x10,0x00,0x40,0x80,0x21,0x0c,0x00,0x1a,0x7e,
52699 +0x27,0xa4,0x00,0x10,0x02,0x00,0x10,0x21,0x8f,0xbf,0x01,0x14,0x8f,0xb0,0x01,0x10,
52700 +0x03,0xe0,0x00,0x08,0x27,0xbd,0x01,0x18,0x93,0x83,0x87,0x6c,0x27,0xbd,0xff,0xe8,
52701 +0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x14,0x14,0x60,0x00,0x14,0x00,0x80,0x80,0x21,
52702 +0x80,0x82,0x00,0x00,0x90,0x84,0x00,0x00,0x14,0x40,0x00,0x05,0x00,0x00,0x00,0x00,
52703 +0x8f,0xbf,0x00,0x14,0x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,
52704 +0x00,0x04,0x26,0x00,0x00,0x04,0x26,0x03,0x30,0x84,0xff,0xff,0x0c,0x00,0x1a,0x9e,
52705 +0x26,0x10,0x00,0x01,0x92,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x60,0xff,0xf8,
52706 +0x00,0x60,0x20,0x21,0x08,0x00,0x1a,0x88,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
52707 +0x14,0x43,0xff,0xef,0x00,0x00,0x00,0x00,0x0c,0x00,0x05,0x52,0x00,0x00,0x00,0x00,
52708 +0x08,0x00,0x1a,0x88,0x00,0x00,0x00,0x00,0x30,0x84,0xff,0xff,0x48,0x84,0x00,0x00,
52709 +0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x27,0xbd,0xff,0xe8,0xaf,0xbf,0x00,0x10,
52710 +0x0c,0x00,0x2d,0x94,0x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x10,0x00,0x02,0x14,0x00,
52711 +0x00,0x02,0x14,0x03,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x03,0xe0,0x00,0x08,
52712 +0x24,0x02,0x00,0x01,0x03,0xe0,0x00,0x08,0x24,0x02,0x00,0x01,0x3c,0x0a,0x80,0x00,
52713 +0x25,0x4a,0x6a,0xbc,0x3c,0x0b,0xb0,0x03,0xad,0x6a,0x00,0x20,0x3c,0x08,0x80,0x01,
52714 +0x25,0x08,0x00,0x00,0x3c,0x09,0x80,0x01,0x25,0x29,0x0b,0x90,0x11,0x09,0x00,0x10,
52715 +0x00,0x00,0x00,0x00,0x3c,0x0a,0x80,0x00,0x25,0x4a,0x6a,0xe4,0x3c,0x0b,0xb0,0x03,
52716 +0xad,0x6a,0x00,0x20,0x3c,0x08,0xb0,0x06,0x35,0x08,0x80,0x10,0x00,0x00,0x00,0x00,
52717 +0x00,0x00,0x00,0x00,0x8d,0x09,0x00,0x00,0x00,0x00,0x00,0x00,0x31,0x29,0x00,0x01,
52718 +0x00,0x00,0x00,0x00,0x24,0x01,0x00,0x01,0x15,0x21,0xff,0xf2,0x00,0x00,0x00,0x00,
52719 +0x3c,0x0a,0x80,0x00,0x25,0x4a,0x6b,0x20,0x3c,0x0b,0xb0,0x03,0xad,0x6a,0x00,0x20,
52720 +0x3c,0x02,0xb0,0x03,0x8c,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x34,0x63,0x00,0x40,
52721 +0x00,0x00,0x00,0x00,0xac,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x3c,0x0a,0x80,0x00,
52722 +0x25,0x4a,0x6b,0x4c,0x3c,0x0b,0xb0,0x03,0xad,0x6a,0x00,0x20,0x3c,0x02,0x80,0x01,
52723 +0x24,0x42,0x00,0x00,0x3c,0x03,0x80,0x01,0x24,0x63,0x0b,0x90,0x3c,0x04,0xb0,0x00,
52724 +0x8c,0x85,0x00,0x00,0x00,0x00,0x00,0x00,0xac,0x45,0x00,0x00,0x24,0x42,0x00,0x04,
52725 +0x24,0x84,0x00,0x04,0x00,0x43,0x08,0x2a,0x14,0x20,0xff,0xf9,0x00,0x00,0x00,0x00,
52726 +0x0c,0x00,0x1a,0xe6,0x00,0x00,0x00,0x00,0x3c,0x0a,0x80,0x00,0x25,0x4a,0x6b,0x98,
52727 +0x3c,0x0b,0xb0,0x03,0xad,0x6a,0x00,0x20,0x3c,0x02,0x80,0x01,0x24,0x42,0x0b,0x90,
52728 +0x3c,0x03,0x80,0x01,0x24,0x63,0x48,0x64,0xac,0x40,0x00,0x00,0xac,0x40,0x00,0x04,
52729 +0xac,0x40,0x00,0x08,0xac,0x40,0x00,0x0c,0x24,0x42,0x00,0x10,0x00,0x43,0x08,0x2a,
52730 +0x14,0x20,0xff,0xf9,0x00,0x00,0x00,0x00,0x3c,0x0a,0x80,0x00,0x25,0x4a,0x6b,0xd8,
52731 +0x3c,0x0b,0xb0,0x03,0xad,0x6a,0x00,0x20,0x3c,0x1c,0x80,0x01,0x27,0x9c,0x7f,0xf0,
52732 +0x27,0x9d,0x95,0x20,0x00,0x00,0x00,0x00,0x27,0x9d,0x99,0x08,0x3c,0x0a,0x80,0x00,
52733 +0x25,0x4a,0x6b,0xfc,0x3c,0x0b,0xb0,0x03,0xad,0x6a,0x00,0x20,0x40,0x80,0x68,0x00,
52734 +0x40,0x08,0x60,0x00,0x00,0x00,0x00,0x00,0x35,0x08,0xff,0x01,0x40,0x88,0x60,0x00,
52735 +0x00,0x00,0x00,0x00,0x0c,0x00,0x1d,0x15,0x00,0x00,0x00,0x00,0x24,0x84,0xf8,0x00,
52736 +0x30,0x87,0x00,0x03,0x00,0x04,0x30,0x40,0x00,0xc7,0x20,0x23,0x3c,0x02,0xb0,0x0a,
52737 +0x27,0xbd,0xff,0xe0,0x24,0x03,0xff,0xff,0x00,0x82,0x20,0x21,0xaf,0xb1,0x00,0x14,
52738 +0xac,0x83,0x10,0x00,0xaf,0xbf,0x00,0x18,0xaf,0xb0,0x00,0x10,0x00,0xa0,0x88,0x21,
52739 +0x24,0x03,0x00,0x01,0x8c,0x82,0x10,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,
52740 +0x00,0xc7,0x10,0x23,0x3c,0x03,0xb0,0x0a,0x00,0x43,0x10,0x21,0x8c,0x50,0x00,0x00,
52741 +0x0c,0x00,0x1b,0x63,0x02,0x20,0x20,0x21,0x02,0x11,0x80,0x24,0x00,0x50,0x80,0x06,
52742 +0x02,0x00,0x10,0x21,0x8f,0xbf,0x00,0x18,0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,
52743 +0x27,0xbd,0x00,0x20,0x27,0xbd,0xff,0xd8,0xaf,0xb2,0x00,0x18,0x00,0xa0,0x90,0x21,
52744 +0x24,0x05,0xff,0xff,0xaf,0xb3,0x00,0x1c,0xaf,0xbf,0x00,0x20,0xaf,0xb1,0x00,0x14,
52745 +0xaf,0xb0,0x00,0x10,0x00,0xc0,0x98,0x21,0x12,0x45,0x00,0x23,0x24,0x84,0xf8,0x00,
52746 +0x30,0x83,0x00,0x03,0x00,0x04,0x10,0x40,0x00,0x40,0x88,0x21,0x00,0x60,0x20,0x21,
52747 +0x00,0x43,0x10,0x23,0x3c,0x03,0xb0,0x0a,0x00,0x43,0x10,0x21,0xac,0x45,0x10,0x00,
52748 +0x00,0x40,0x18,0x21,0x24,0x05,0x00,0x01,0x8c,0x62,0x10,0x00,0x00,0x00,0x00,0x00,
52749 +0x14,0x45,0xff,0xfd,0x3c,0x02,0xb0,0x0a,0x02,0x24,0x88,0x23,0x02,0x22,0x88,0x21,
52750 +0x8e,0x30,0x00,0x00,0x0c,0x00,0x1b,0x63,0x02,0x40,0x20,0x21,0x00,0x12,0x18,0x27,
52751 +0x02,0x03,0x80,0x24,0x00,0x53,0x10,0x04,0x02,0x02,0x80,0x25,0xae,0x30,0x00,0x00,
52752 +0x24,0x03,0x00,0x01,0x8e,0x22,0x10,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,
52753 +0x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x20,0x7b,0xb2,0x00,0xfc,0x7b,0xb0,0x00,0xbc,
52754 +0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x28,0x30,0x82,0x00,0x03,0x00,0x04,0x18,0x40,
52755 +0x00,0x62,0x18,0x23,0x3c,0x04,0xb0,0x0a,0x00,0x64,0x18,0x21,0xac,0x66,0x00,0x00,
52756 +0x24,0x04,0x00,0x01,0x8c,0x62,0x10,0x00,0x00,0x00,0x00,0x00,0x14,0x44,0xff,0xfd,
52757 +0x00,0x00,0x00,0x00,0x08,0x00,0x1b,0x51,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x21,
52758 +0x00,0x64,0x10,0x06,0x30,0x42,0x00,0x01,0x14,0x40,0x00,0x05,0x00,0x00,0x00,0x00,
52759 +0x24,0x63,0x00,0x01,0x2c,0x62,0x00,0x20,0x14,0x40,0xff,0xf9,0x00,0x00,0x00,0x00,
52760 +0x03,0xe0,0x00,0x08,0x00,0x60,0x10,0x21,0x27,0xbd,0xff,0xe0,0x3c,0x03,0xb0,0x05,
52761 +0xaf,0xb2,0x00,0x18,0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x1c,
52762 +0x00,0x80,0x90,0x21,0x00,0xa0,0x80,0x21,0x00,0xc0,0x88,0x21,0x34,0x63,0x02,0x2e,
52763 +0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x01,0x14,0x40,0xff,0xfc,
52764 +0x24,0x04,0x08,0x24,0x3c,0x05,0x00,0xc0,0x0c,0x00,0x1b,0x29,0x24,0x06,0x00,0x03,
52765 +0x24,0x04,0x08,0x34,0x3c,0x05,0x00,0xc0,0x0c,0x00,0x1b,0x29,0x24,0x06,0x00,0x03,
52766 +0x3c,0x02,0xc0,0x00,0x00,0x10,0x1c,0x00,0x34,0x42,0x04,0x00,0x3c,0x04,0xb0,0x05,
52767 +0x3c,0x05,0xb0,0x05,0x24,0x63,0x16,0x09,0x02,0x22,0x10,0x21,0x34,0x84,0x04,0x20,
52768 +0x34,0xa5,0x04,0x24,0x3c,0x06,0xb0,0x05,0xac,0x83,0x00,0x00,0x24,0x07,0x00,0x01,
52769 +0xac,0xa2,0x00,0x00,0x34,0xc6,0x02,0x28,0x24,0x02,0x00,0x20,0xae,0x47,0x00,0x3c,
52770 +0x24,0x04,0x08,0x24,0xa0,0xc2,0x00,0x00,0x3c,0x05,0x00,0xc0,0xa2,0x47,0x00,0x11,
52771 +0x0c,0x00,0x1b,0x29,0x24,0x06,0x00,0x01,0x24,0x04,0x08,0x34,0x3c,0x05,0x00,0xc0,
52772 +0x0c,0x00,0x1b,0x29,0x24,0x06,0x00,0x01,0x8f,0xbf,0x00,0x1c,0x8f,0xb2,0x00,0x18,
52773 +0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x24,0x02,0x00,0x06,
52774 +0xac,0x82,0x00,0x0c,0xa0,0x80,0x00,0x50,0xac,0x80,0x00,0x00,0xac,0x80,0x00,0x04,
52775 +0xac,0x80,0x00,0x08,0xac,0x80,0x00,0x14,0xac,0x80,0x00,0x18,0xac,0x80,0x00,0x1c,
52776 +0xa4,0x80,0x00,0x20,0xac,0x80,0x00,0x24,0xac,0x80,0x00,0x28,0xac,0x80,0x00,0x2c,
52777 +0xa0,0x80,0x00,0x30,0xa0,0x80,0x00,0x31,0xac,0x80,0x00,0x34,0xac,0x80,0x00,0x38,
52778 +0xa0,0x80,0x00,0x3c,0xac,0x82,0x00,0x10,0xa0,0x80,0x00,0x44,0xac,0x80,0x00,0x48,
52779 +0x03,0xe0,0x00,0x08,0xac,0x80,0x00,0x4c,0x3c,0x04,0xb0,0x06,0x34,0x84,0x80,0x00,
52780 +0x8c,0x83,0x00,0x00,0x3c,0x02,0x12,0x00,0x3c,0x05,0xb0,0x03,0x00,0x62,0x18,0x25,
52781 +0x34,0xa5,0x00,0x8b,0x24,0x02,0xff,0x80,0xac,0x83,0x00,0x00,0x03,0xe0,0x00,0x08,
52782 +0xa0,0xa2,0x00,0x00,0x3c,0x04,0xb0,0x03,0x34,0x84,0x00,0x0b,0x24,0x02,0x00,0x22,
52783 +0x3c,0x05,0xb0,0x01,0x3c,0x06,0x45,0x67,0x3c,0x0a,0xb0,0x09,0xa0,0x82,0x00,0x00,
52784 +0x34,0xa5,0x00,0x04,0x34,0xc6,0x89,0xaa,0x35,0x4a,0x00,0x04,0x24,0x02,0x01,0x23,
52785 +0x3c,0x0b,0xb0,0x09,0x3c,0x07,0x01,0x23,0x3c,0x0c,0xb0,0x09,0x3c,0x01,0xb0,0x01,
52786 +0xac,0x20,0x00,0x00,0x27,0xbd,0xff,0xe0,0xac,0xa0,0x00,0x00,0x35,0x6b,0x00,0x08,
52787 +0x3c,0x01,0xb0,0x09,0xac,0x26,0x00,0x00,0x34,0xe7,0x45,0x66,0xa5,0x42,0x00,0x00,
52788 +0x35,0x8c,0x00,0x0c,0x24,0x02,0xcd,0xef,0x3c,0x0d,0xb0,0x09,0x3c,0x08,0xcd,0xef,
52789 +0x3c,0x0e,0xb0,0x09,0xad,0x67,0x00,0x00,0xaf,0xb7,0x00,0x1c,0xa5,0x82,0x00,0x00,
52790 +0xaf,0xb6,0x00,0x18,0xaf,0xb5,0x00,0x14,0xaf,0xb4,0x00,0x10,0xaf,0xb3,0x00,0x0c,
52791 +0xaf,0xb2,0x00,0x08,0xaf,0xb1,0x00,0x04,0xaf,0xb0,0x00,0x00,0x35,0xad,0x00,0x10,
52792 +0x35,0x08,0x01,0x22,0x35,0xce,0x00,0x14,0x24,0x02,0x89,0xab,0x3c,0x0f,0xb0,0x09,
52793 +0x3c,0x09,0x89,0xab,0x3c,0x10,0xb0,0x09,0x3c,0x11,0xb0,0x09,0x3c,0x12,0xb0,0x09,
52794 +0x3c,0x13,0xb0,0x09,0x3c,0x14,0xb0,0x09,0x3c,0x15,0xb0,0x09,0x3c,0x16,0xb0,0x09,
52795 +0x3c,0x17,0xb0,0x09,0xad,0xa8,0x00,0x00,0x24,0x03,0xff,0xff,0xa5,0xc2,0x00,0x00,
52796 +0x35,0xef,0x00,0x18,0x35,0x29,0xcd,0xee,0x36,0x10,0x00,0x1c,0x36,0x31,0x00,0x20,
52797 +0x36,0x52,0x00,0x24,0x36,0x73,0x00,0x28,0x36,0x94,0x00,0x2c,0x36,0xb5,0x00,0x30,
52798 +0x36,0xd6,0x00,0x34,0x36,0xf7,0x00,0x38,0x24,0x02,0x45,0x67,0xad,0xe9,0x00,0x00,
52799 +0xa6,0x02,0x00,0x00,0xae,0x23,0x00,0x00,0x8f,0xb0,0x00,0x00,0xa6,0x43,0x00,0x00,
52800 +0x8f,0xb1,0x00,0x04,0xae,0x63,0x00,0x00,0x8f,0xb2,0x00,0x08,0xa6,0x83,0x00,0x00,
52801 +0x8f,0xb3,0x00,0x0c,0xae,0xa3,0x00,0x00,0x8f,0xb4,0x00,0x10,0xa6,0xc3,0x00,0x00,
52802 +0x8f,0xb5,0x00,0x14,0xae,0xe3,0x00,0x00,0x7b,0xb6,0x00,0xfc,0x3c,0x18,0xb0,0x09,
52803 +0x37,0x18,0x00,0x3c,0xa7,0x03,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,
52804 +0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x34,0x63,0x00,0x20,0x24,0x42,0x70,0x70,
52805 +0xac,0x62,0x00,0x00,0x8c,0x83,0x00,0x34,0x34,0x02,0xff,0xff,0x00,0x43,0x10,0x2a,
52806 +0x14,0x40,0x00,0xed,0x00,0x80,0x28,0x21,0x8c,0x84,0x00,0x08,0x24,0x02,0x00,0x03,
52807 +0x10,0x82,0x00,0xe0,0x00,0x00,0x00,0x00,0x8c,0xa2,0x00,0x2c,0x00,0x00,0x00,0x00,
52808 +0x14,0x40,0x00,0x47,0x24,0x02,0x00,0x06,0x3c,0x03,0xb0,0x05,0x34,0x63,0x04,0x50,
52809 +0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xff,0x14,0x40,0x00,0xc6,
52810 +0xac,0xa2,0x00,0x2c,0x24,0x02,0x00,0x01,0x10,0x82,0x00,0xc5,0x00,0x00,0x00,0x00,
52811 +0x24,0x02,0x00,0x02,0x10,0x82,0x00,0xb3,0x00,0x00,0x00,0x00,0x8c,0xa6,0x00,0x04,
52812 +0x24,0x02,0x00,0x02,0x10,0xc2,0x00,0xa9,0x00,0x00,0x00,0x00,0x8c,0xa2,0x00,0x14,
52813 +0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x09,0x24,0x02,0x00,0x01,0x3c,0x03,0xb0,0x09,
52814 +0x34,0x63,0x01,0x60,0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xff,
52815 +0x10,0x40,0x00,0x05,0xac,0xa2,0x00,0x14,0x24,0x02,0x00,0x01,0xac,0xa2,0x00,0x00,
52816 +0x03,0xe0,0x00,0x08,0xac,0xa0,0x00,0x14,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0xd0,
52817 +0x8c,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x61,0x00,0x16,0x3c,0x03,0xb0,0x05,
52818 +0x34,0x63,0x02,0x2e,0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x01,
52819 +0x14,0x40,0x00,0x10,0x3c,0x02,0xb0,0x05,0x34,0x42,0x02,0x42,0x90,0x43,0x00,0x00,
52820 +0x00,0x00,0x00,0x00,0x14,0x60,0x00,0x0b,0x00,0x00,0x00,0x00,0x80,0xa2,0x00,0x50,
52821 +0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x07,0x00,0x00,0x00,0x00,0x14,0x80,0x00,0x05,
52822 +0x24,0x02,0x00,0x0e,0x24,0x03,0x00,0x01,0xac,0xa2,0x00,0x00,0x03,0xe0,0x00,0x08,
52823 +0xa0,0xa3,0x00,0x50,0x80,0xa2,0x00,0x31,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x0a,
52824 +0x3c,0x02,0xb0,0x06,0x34,0x42,0x80,0x18,0x8c,0x43,0x00,0x00,0x3c,0x04,0xf0,0x00,
52825 +0x3c,0x02,0x80,0x00,0x00,0x64,0x18,0x24,0x10,0x62,0x00,0x03,0x24,0x02,0x00,0x09,
52826 +0x03,0xe0,0x00,0x08,0xac,0xa2,0x00,0x00,0x8c,0xa2,0x00,0x40,0x00,0x00,0x00,0x00,
52827 +0x8c,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x60,0x00,0x09,0x3c,0x03,0xb0,0x03,
52828 +0x3c,0x02,0xb0,0x05,0x34,0x42,0x02,0x2c,0x8c,0x43,0x00,0x00,0x3c,0x04,0x00,0x02,
52829 +0x00,0x64,0x18,0x24,0x14,0x60,0xff,0xf2,0x24,0x02,0x00,0x10,0x3c,0x03,0xb0,0x03,
52830 +0x34,0x63,0x02,0x01,0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x80,
52831 +0x10,0x40,0x00,0x0e,0x00,0x00,0x00,0x00,0x8c,0xa3,0x00,0x0c,0x00,0x00,0x00,0x00,
52832 +0xac,0xa3,0x00,0x10,0x3c,0x02,0xb0,0x03,0x90,0x42,0x02,0x01,0x00,0x00,0x00,0x00,
52833 +0x30,0x42,0x00,0x0f,0xac,0xa2,0x00,0x0c,0x90,0xa3,0x00,0x0f,0x24,0x02,0x00,0x0d,
52834 +0x3c,0x01,0xb0,0x03,0x08,0x00,0x1c,0x74,0xa0,0x23,0x02,0x01,0x3c,0x02,0xb0,0x09,
52835 +0x34,0x42,0x01,0x80,0x90,0x44,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x1e,0x00,
52836 +0x00,0x03,0x1e,0x03,0x10,0x60,0x00,0x15,0xa0,0xa4,0x00,0x44,0x24,0x02,0x00,0x01,
52837 +0x10,0x62,0x00,0x0b,0x24,0x02,0x00,0x02,0x10,0x62,0x00,0x03,0x24,0x03,0x00,0x0d,
52838 +0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x8c,0xa2,0x00,0x0c,0xac,0xa3,0x00,0x00,
52839 +0x24,0x03,0x00,0x04,0xac,0xa2,0x00,0x10,0x03,0xe0,0x00,0x08,0xac,0xa3,0x00,0x0c,
52840 +0x24,0x02,0x00,0x0d,0xac,0xa2,0x00,0x00,0x24,0x03,0x00,0x04,0x24,0x02,0x00,0x06,
52841 +0xac,0xa3,0x00,0x10,0x03,0xe0,0x00,0x08,0xac,0xa2,0x00,0x0c,0x8c,0xa3,0x00,0x38,
52842 +0x24,0x04,0x00,0x01,0x10,0x64,0x00,0x2d,0x24,0x02,0x00,0x02,0x10,0x60,0x00,0x19,
52843 +0x00,0x00,0x00,0x00,0x10,0x62,0x00,0x10,0x24,0x02,0x00,0x04,0x10,0x62,0x00,0x04,
52844 +0x00,0x00,0x00,0x00,0xac,0xa0,0x00,0x38,0x03,0xe0,0x00,0x08,0xac,0xa0,0x00,0x00,
52845 +0x10,0xc4,0x00,0x07,0x24,0x02,0x00,0x03,0x80,0xa2,0x00,0x30,0x00,0x00,0x00,0x00,
52846 +0x00,0x02,0x18,0x0b,0xac,0xa3,0x00,0x00,0x03,0xe0,0x00,0x08,0xac,0xa0,0x00,0x38,
52847 +0x08,0x00,0x1c,0xc6,0xac,0xa2,0x00,0x00,0x10,0xc4,0x00,0x02,0x24,0x02,0x00,0x03,
52848 +0x24,0x02,0x00,0x0c,0xac,0xa2,0x00,0x00,0x24,0x02,0x00,0x04,0x03,0xe0,0x00,0x08,
52849 +0xac,0xa2,0x00,0x38,0x10,0xc4,0x00,0x0e,0x3c,0x03,0xb0,0x06,0x34,0x63,0x80,0x24,
52850 +0x8c,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xff,0x10,0x40,0x00,0x06,
52851 +0xac,0xa2,0x00,0x18,0x24,0x02,0x00,0x02,0xac,0xa2,0x00,0x00,0xac,0xa0,0x00,0x18,
52852 +0x08,0x00,0x1c,0xcf,0x24,0x02,0x00,0x01,0x08,0x00,0x1c,0xdc,0xac,0xa0,0x00,0x00,
52853 +0x24,0x02,0x00,0x03,0x08,0x00,0x1c,0xdc,0xac,0xa2,0x00,0x00,0x24,0x03,0x00,0x0b,
52854 +0xac,0xa2,0x00,0x38,0x03,0xe0,0x00,0x08,0xac,0xa3,0x00,0x00,0x80,0xa2,0x00,0x30,
52855 +0x00,0x00,0x00,0x00,0x14,0x40,0xff,0x55,0x24,0x02,0x00,0x04,0x08,0x00,0x1c,0x74,
52856 +0x00,0x00,0x00,0x00,0x84,0xa2,0x00,0x20,0x00,0x00,0x00,0x00,0x10,0x40,0xff,0x84,
52857 +0x24,0x02,0x00,0x06,0x3c,0x02,0xb0,0x05,0x34,0x42,0x02,0x2e,0x90,0x43,0x00,0x00,
52858 +0x00,0x00,0x00,0x00,0x30,0x63,0x00,0x01,0x30,0x63,0x00,0xff,0x00,0x60,0x10,0x21,
52859 +0x14,0x40,0xff,0x42,0xa4,0xa3,0x00,0x20,0x08,0x00,0x1c,0x74,0x24,0x02,0x00,0x06,
52860 +0x8c,0xa2,0x00,0x1c,0x00,0x00,0x00,0x00,0x14,0x40,0xff,0x75,0x24,0x02,0x00,0x05,
52861 +0x3c,0x03,0xb0,0x05,0x34,0x63,0x02,0x2c,0x8c,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
52862 +0x30,0x42,0x00,0xff,0x10,0x40,0xff,0x32,0xac,0xa2,0x00,0x1c,0x08,0x00,0x1c,0x74,
52863 +0x24,0x02,0x00,0x05,0x3c,0x02,0xb0,0x05,0x8c,0x42,0x00,0x00,0x00,0x00,0x00,0x00,
52864 +0x00,0x02,0x17,0x42,0x30,0x42,0x00,0x01,0x14,0x40,0xff,0x65,0x24,0x02,0x00,0x06,
52865 +0x08,0x00,0x1c,0x2a,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x0a,0x03,0xe0,0x00,0x08,
52866 +0xac,0x82,0x00,0x00,0x27,0xbd,0xff,0xc8,0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,
52867 +0x27,0x91,0x91,0xf8,0x27,0x90,0x8f,0x38,0xaf,0xbf,0x00,0x30,0xaf,0xb7,0x00,0x2c,
52868 +0xaf,0xb6,0x00,0x28,0xaf,0xb5,0x00,0x24,0xaf,0xb4,0x00,0x20,0xaf,0xb3,0x00,0x1c,
52869 +0x0c,0x00,0x2d,0x21,0xaf,0xb2,0x00,0x18,0x0c,0x00,0x07,0x90,0x00,0x00,0x00,0x00,
52870 +0xaf,0x91,0x95,0x10,0xaf,0x90,0x99,0x20,0x48,0x02,0x00,0x00,0x0c,0x00,0x1b,0xba,
52871 +0x00,0x00,0x00,0x00,0x0c,0x00,0x1f,0x97,0x02,0x00,0x20,0x21,0x3c,0x02,0xb0,0x03,
52872 +0x34,0x42,0x00,0x3a,0x94,0x43,0x00,0x00,0x3a,0x54,0xff,0xff,0xa3,0x83,0x99,0x24,
52873 +0x0c,0x00,0x00,0x34,0x02,0x80,0xa8,0x21,0x0c,0x00,0x1b,0xc5,0x02,0x80,0xb0,0x21,
52874 +0x27,0x84,0x8d,0x78,0x0c,0x00,0x32,0x44,0x02,0x80,0xb8,0x21,0x93,0x84,0x80,0x10,
52875 +0x0c,0x00,0x28,0xb0,0x00,0x00,0x00,0x00,0x0c,0x00,0x0e,0x84,0x02,0x20,0x20,0x21,
52876 +0x0c,0x00,0x01,0x39,0x00,0x00,0x00,0x00,0x27,0x84,0x8d,0x20,0x0c,0x00,0x1b,0xa3,
52877 +0x00,0x00,0x00,0x00,0x27,0x82,0x92,0x2c,0xaf,0x82,0x8d,0x60,0x0c,0x00,0x00,0x5f,
52878 +0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,0x34,0x63,0x01,0x08,0x3c,0x04,0xb0,0x09,
52879 +0x3c,0x05,0xb0,0x09,0x8c,0x66,0x00,0x00,0x34,0x84,0x01,0x68,0x24,0x02,0xc8,0x80,
52880 +0x34,0xa5,0x01,0x40,0x24,0x03,0x00,0x0a,0xa4,0x82,0x00,0x00,0xa4,0xa3,0x00,0x00,
52881 +0x3c,0x04,0xb0,0x03,0x8c,0x82,0x00,0x00,0xaf,0x86,0x8d,0x18,0x34,0x42,0x00,0x20,
52882 +0xac,0x82,0x00,0x00,0x0c,0x00,0x07,0xa1,0x00,0x00,0x00,0x00,0x3c,0x04,0xb0,0x05,
52883 +0x0c,0x00,0x2d,0x39,0x34,0x84,0x00,0x04,0x8f,0x83,0x8d,0x20,0x00,0x00,0x00,0x00,
52884 +0x2c,0x62,0x00,0x11,0x10,0x40,0xff,0xf7,0x00,0x03,0x10,0x80,0x3c,0x03,0x80,0x01,
52885 +0x24,0x63,0x08,0xac,0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x00,0x00,0x00,0x00,0x00,
52886 +0x00,0x80,0x00,0x08,0x00,0x00,0x00,0x00,0x27,0x84,0x8d,0x78,0x0c,0x00,0x31,0x79,
52887 +0x00,0x00,0x00,0x00,0x27,0x84,0x8d,0x20,0x0c,0x00,0x1c,0x1c,0x00,0x00,0x00,0x00,
52888 +0x93,0x83,0x88,0x6d,0x24,0x02,0x00,0x01,0x10,0x62,0x00,0x07,0x00,0x00,0x00,0x00,
52889 +0x8f,0x82,0x8d,0x54,0x00,0x00,0x00,0x00,0x24,0x42,0x00,0x01,0xaf,0x82,0x8d,0x54,
52890 +0x08,0x00,0x1d,0x55,0x00,0x00,0x00,0x00,0x27,0x84,0x8d,0x78,0x0c,0x00,0x31,0xf8,
52891 +0x00,0x00,0x00,0x00,0x08,0x00,0x1d,0x70,0x00,0x00,0x00,0x00,0x27,0x84,0x8d,0x78,
52892 +0x0c,0x00,0x33,0xda,0x00,0x00,0x00,0x00,0xa3,0x82,0x8d,0x51,0xaf,0x80,0x8d,0x20,
52893 +0x08,0x00,0x1d,0x70,0x00,0x00,0x00,0x00,0x27,0x84,0x8f,0x38,0x0c,0x00,0x20,0xd3,
52894 +0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xff,0x14,0x40,0x00,0x05,0x3c,0x03,0xb0,0x05,
52895 +0xaf,0x80,0x8d,0x20,0xaf,0x80,0x8d,0x24,0x08,0x00,0x1d,0x70,0x00,0x00,0x00,0x00,
52896 +0x34,0x63,0x04,0x50,0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xff,
52897 +0xaf,0x82,0x8d,0x4c,0x14,0x40,0x00,0x1e,0x24,0x02,0x00,0x01,0x8f,0x84,0x8d,0x28,
52898 +0x00,0x00,0x00,0x00,0x10,0x82,0x00,0x1d,0x3c,0x03,0xb0,0x09,0x34,0x63,0x01,0x60,
52899 +0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xff,0xaf,0x82,0x8d,0x34,
52900 +0x14,0x40,0x00,0x13,0x24,0x02,0x00,0x01,0x24,0x02,0x00,0x02,0x10,0x82,0x00,0x07,
52901 +0x3c,0x02,0xb0,0x05,0x24,0x02,0x00,0x01,0x24,0x03,0x00,0x03,0xaf,0x82,0x8d,0x24,
52902 +0xaf,0x83,0x8d,0x20,0x08,0x00,0x1d,0x70,0x00,0x00,0x00,0x00,0x34,0x42,0x02,0x2e,
52903 +0x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x63,0x00,0x01,0x30,0x63,0x00,0xff,
52904 +0x00,0x60,0x10,0x21,0xa7,0x83,0x8d,0x40,0x14,0x40,0xff,0xf3,0x24,0x02,0x00,0x01,
52905 +0xaf,0x82,0x8d,0x24,0x08,0x00,0x1d,0x7f,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x05,
52906 +0x34,0x63,0x02,0x2c,0x8c,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xff,
52907 +0xaf,0x82,0x8d,0x3c,0x14,0x40,0xff,0xf6,0x24,0x02,0x00,0x01,0x08,0x00,0x1d,0x97,
52908 +0x3c,0x03,0xb0,0x09,0x27,0x84,0x8f,0x38,0x0c,0x00,0x22,0x4c,0x00,0x00,0x00,0x00,
52909 +0x83,0x82,0x8d,0x50,0x00,0x00,0x00,0x00,0x14,0x40,0xff,0xed,0x24,0x02,0x00,0x02,
52910 +0x3c,0x03,0xb0,0x05,0x34,0x63,0x04,0x50,0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
52911 +0x30,0x42,0x00,0xff,0xaf,0x82,0x8d,0x4c,0x14,0x40,0xff,0xe5,0x24,0x02,0x00,0x02,
52912 +0x8f,0x84,0x8d,0x28,0x24,0x02,0x00,0x01,0x10,0x82,0x00,0x12,0x24,0x02,0x00,0x02,
52913 +0x10,0x82,0x00,0x05,0x3c,0x02,0xb0,0x05,0x24,0x02,0x00,0x02,0xaf,0x82,0x8d,0x24,
52914 +0x08,0x00,0x1d,0xa4,0x24,0x03,0x00,0x04,0x34,0x42,0x02,0x2e,0x90,0x43,0x00,0x00,
52915 +0x00,0x00,0x00,0x00,0x30,0x63,0x00,0x01,0x30,0x63,0x00,0xff,0x00,0x60,0x10,0x21,
52916 +0xa7,0x83,0x8d,0x40,0x14,0x40,0xff,0xf4,0x00,0x00,0x00,0x00,0x08,0x00,0x1d,0xb0,
52917 +0x24,0x02,0x00,0x02,0x3c,0x03,0xb0,0x05,0x34,0x63,0x02,0x2c,0x8c,0x62,0x00,0x00,
52918 +0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xff,0xaf,0x82,0x8d,0x3c,0x14,0x40,0xff,0xf7,
52919 +0x00,0x00,0x00,0x00,0x08,0x00,0x1d,0xd0,0x24,0x02,0x00,0x02,0x27,0x84,0x91,0xf8,
52920 +0x0c,0x00,0x12,0xe2,0x00,0x00,0x00,0x00,0x8f,0x83,0x8d,0x24,0xaf,0x82,0x8d,0x3c,
52921 +0x38,0x64,0x00,0x02,0x00,0x04,0x18,0x0a,0xaf,0x83,0x8d,0x24,0x14,0x40,0x00,0x08,
52922 +0x24,0x02,0x00,0x05,0x8f,0x82,0x92,0x38,0xaf,0x80,0x8d,0x20,0x10,0x40,0xff,0x78,
52923 +0x24,0x04,0x00,0x01,0xaf,0x84,0x8d,0x28,0x08,0x00,0x1d,0x70,0x00,0x00,0x00,0x00,
52924 +0xaf,0x82,0x8d,0x20,0x08,0x00,0x1d,0x70,0x00,0x00,0x00,0x00,0x83,0x82,0x8d,0x70,
52925 +0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x02,0x24,0x02,0x00,0x20,0xaf,0x82,0x8d,0x3c,
52926 +0x8f,0x85,0x8d,0x3c,0x27,0x84,0x91,0xf8,0x0c,0x00,0x14,0xbd,0x00,0x00,0x00,0x00,
52927 +0x00,0x02,0x1e,0x00,0xa3,0x82,0x8d,0x50,0xaf,0x80,0x8d,0x3c,0x10,0x60,0xff,0x73,
52928 +0x3c,0x02,0xb0,0x05,0x34,0x42,0x02,0x2e,0x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,
52929 +0x30,0x63,0x00,0x01,0x30,0x63,0x00,0xff,0x00,0x60,0x10,0x21,0xa7,0x83,0x8d,0x40,
52930 +0x10,0x40,0xff,0xe7,0x24,0x02,0x00,0x06,0x24,0x04,0x00,0x02,0xaf,0x84,0x8d,0x28,
52931 +0x08,0x00,0x1d,0x7f,0x00,0x00,0x00,0x00,0x27,0x84,0x8d,0x20,0x27,0x85,0x91,0xf8,
52932 +0x0c,0x00,0x15,0x83,0x00,0x00,0x00,0x00,0x8f,0x82,0x8d,0x44,0xaf,0x80,0x8d,0x4c,
52933 +0x14,0x40,0x00,0x18,0x00,0x40,0x18,0x21,0x8f,0x82,0x8d,0x48,0x00,0x00,0x00,0x00,
52934 +0x14,0x40,0x00,0x14,0x24,0x02,0x00,0x02,0x8f,0x83,0x8d,0x28,0x00,0x00,0x00,0x00,
52935 +0x10,0x62,0x00,0x09,0x24,0x02,0x00,0x01,0x8f,0x83,0x8d,0x24,0x00,0x00,0x00,0x00,
52936 +0x10,0x62,0x00,0x02,0x24,0x02,0x00,0x03,0x24,0x02,0x00,0x06,0xaf,0x82,0x8d,0x20,
52937 +0x08,0x00,0x1d,0xf9,0x24,0x04,0x00,0x03,0x3c,0x02,0x40,0x00,0x34,0x42,0x00,0x14,
52938 +0x3c,0x01,0xb0,0x05,0xac,0x22,0x00,0x00,0xaf,0x80,0x8d,0x20,0x08,0x00,0x1d,0xf9,
52939 +0x24,0x04,0x00,0x03,0x10,0x60,0x00,0x10,0x00,0x00,0x00,0x00,0x27,0x84,0x8d,0x20,
52940 +0x27,0x85,0x91,0xf8,0x0c,0x00,0x15,0xa7,0x00,0x00,0x00,0x00,0x8f,0x83,0x8d,0x24,
52941 +0x24,0x02,0x00,0x01,0xa3,0x80,0x8d,0x50,0xaf,0x80,0x8d,0x28,0x10,0x62,0x00,0x02,
52942 +0x24,0x02,0x00,0x03,0x24,0x02,0x00,0x04,0xaf,0x82,0x8d,0x20,0xaf,0x80,0x8d,0x44,
52943 +0x08,0x00,0x1d,0x70,0x00,0x00,0x00,0x00,0x83,0x82,0x8d,0x70,0x00,0x00,0x00,0x00,
52944 +0x14,0x40,0x00,0x04,0x00,0x00,0x00,0x00,0x27,0x84,0x91,0xf8,0x0c,0x00,0x17,0xef,
52945 +0x00,0x00,0x00,0x00,0x8f,0x82,0x8d,0x24,0xa3,0x80,0x8d,0x50,0xaf,0x80,0x8d,0x20,
52946 +0xaf,0x80,0x8d,0x28,0x14,0x40,0x00,0x02,0x24,0x02,0x00,0x02,0xaf,0x82,0x8d,0x24,
52947 +0xaf,0x80,0x8d,0x48,0x08,0x00,0x1d,0x70,0x00,0x00,0x00,0x00,0x27,0x84,0x8d,0x20,
52948 +0x27,0x85,0x91,0xf8,0x0c,0x00,0x15,0xa7,0x00,0x00,0x00,0x00,0x8f,0x82,0x8d,0x24,
52949 +0xa3,0x80,0x8d,0x50,0xaf,0x80,0x8d,0x20,0xaf,0x80,0x8d,0x28,0x14,0x40,0xff,0x0c,
52950 +0x24,0x02,0x00,0x02,0xaf,0x82,0x8d,0x24,0x08,0x00,0x1d,0x70,0x00,0x00,0x00,0x00,
52951 +0x27,0x84,0x91,0xf8,0x0c,0x00,0x17,0xef,0x00,0x00,0x00,0x00,0x08,0x00,0x1e,0x5f,
52952 +0x00,0x00,0x00,0x00,0x27,0x84,0x8d,0x78,0x0c,0x00,0x34,0x70,0x00,0x00,0x00,0x00,
52953 +0x08,0x00,0x1d,0x7e,0x00,0x00,0x00,0x00,0x0c,0x00,0x2b,0x15,0x00,0x00,0x00,0x00,
52954 +0x0c,0x00,0x31,0xea,0x00,0x00,0x00,0x00,0x0c,0x00,0x1f,0x89,0x00,0x00,0x00,0x00,
52955 +0x93,0x83,0xc5,0x58,0x00,0x00,0x00,0x00,0x14,0x60,0x00,0x1c,0x3c,0x02,0xb0,0x03,
52956 +0x34,0x42,0x01,0x08,0x8c,0x44,0x00,0x00,0x8f,0x83,0xc5,0x50,0x8f,0x82,0xc5,0x54,
52957 +0x00,0x83,0x18,0x23,0x00,0x43,0x10,0x2b,0x10,0x40,0x00,0x14,0x2e,0xa3,0x00,0x01,
52958 +0x2e,0x82,0x00,0x01,0x00,0x43,0x10,0x25,0x2e,0xc4,0x00,0x01,0x00,0x44,0x10,0x25,
52959 +0x2e,0xe3,0x00,0x01,0x3c,0x05,0xb0,0x03,0x00,0x43,0x10,0x25,0x34,0xa5,0x01,0x18,
52960 +0x8c,0xa3,0x00,0x00,0x14,0x40,0x00,0x02,0x24,0x04,0x00,0x02,0x00,0x00,0x20,0x21,
52961 +0x0c,0x00,0x0b,0x7e,0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,0x34,0x42,0x01,0x08,
52962 +0x8c,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0xaf,0x83,0xc5,0x50,0x0c,0x00,0x01,0xe9,
52963 +0x00,0x00,0x00,0x00,0xaf,0x80,0x8d,0x20,0xaf,0x80,0x8d,0x54,0x08,0x00,0x1d,0x55,
52964 +0x00,0x00,0x00,0x00,0x27,0x90,0xbd,0x40,0x24,0x11,0x00,0x12,0x8e,0x04,0x00,0x00,
52965 +0x00,0x00,0x00,0x00,0x90,0x82,0x00,0x10,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x03,
52966 +0x00,0x00,0x00,0x00,0x0c,0x00,0x20,0x48,0x00,0x00,0x00,0x00,0x26,0x31,0xff,0xff,
52967 +0x06,0x21,0xff,0xf6,0x26,0x10,0x00,0x04,0x08,0x00,0x1d,0x7f,0x00,0x00,0x00,0x00,
52968 +0x3c,0x02,0xb0,0x03,0x34,0x42,0x01,0x08,0x8c,0x44,0x00,0x00,0x8f,0x82,0x8d,0x18,
52969 +0x00,0x04,0x19,0xc2,0x00,0x02,0x11,0xc2,0x10,0x62,0xfe,0xcc,0x3c,0x02,0xb0,0x03,
52970 +0x34,0x42,0x01,0x02,0x90,0x43,0x00,0x00,0x3c,0x12,0xb0,0x05,0xaf,0x84,0x8d,0x18,
52971 +0x30,0x63,0x00,0xff,0x00,0x03,0x11,0x40,0x00,0x43,0x10,0x23,0x00,0x02,0x10,0x80,
52972 +0x00,0x43,0x10,0x21,0x00,0x02,0x99,0x00,0x00,0x00,0x88,0x21,0x36,0x52,0x02,0x2c,
52973 +0x27,0x90,0xbd,0x40,0x8e,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x90,0x83,0x00,0x16,
52974 +0x00,0x00,0x00,0x00,0x30,0x62,0x00,0x03,0x10,0x40,0x00,0x06,0x30,0x62,0x00,0x1c,
52975 +0x14,0x40,0x00,0x04,0x00,0x00,0x00,0x00,0x8f,0x85,0x8d,0x18,0x0c,0x00,0x26,0x05,
52976 +0x02,0x60,0x30,0x21,0x8e,0x42,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xff,
52977 +0x14,0x40,0xfe,0xae,0x00,0x00,0x00,0x00,0x26,0x31,0x00,0x01,0x2a,0x22,0x00,0x13,
52978 +0x14,0x40,0xff,0xec,0x26,0x10,0x00,0x04,0x08,0x00,0x1d,0x7f,0x00,0x00,0x00,0x00,
52979 +0x8f,0x84,0x8d,0x2c,0x27,0x85,0x91,0xf8,0x0c,0x00,0x1f,0x1c,0x00,0x00,0x00,0x00,
52980 +0x8f,0x83,0x8d,0x2c,0x24,0x02,0x00,0x04,0x14,0x62,0xfe,0xa0,0x24,0x02,0x00,0x05,
52981 +0x08,0x00,0x1d,0xfc,0x00,0x00,0x00,0x00,0x27,0x84,0x91,0xf8,0x0c,0x00,0x2b,0x3c,
52982 +0x00,0x00,0x00,0x00,0x08,0x00,0x1d,0xa4,0x24,0x03,0x00,0x05,0x8f,0x82,0x92,0x2c,
52983 +0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x0d,0x00,0x00,0x00,0x00,0x8f,0x84,0xbd,0x80,
52984 +0xaf,0x80,0x92,0x2c,0x94,0x85,0x00,0x14,0x0c,0x00,0x22,0xe1,0x00,0x00,0x00,0x00,
52985 +0x93,0x82,0x94,0x51,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x02,0x10,0x40,0x00,0x03,
52986 +0x00,0x00,0x00,0x00,0x0c,0x00,0x01,0x57,0x00,0x00,0x20,0x21,0x8f,0x84,0xbd,0x80,
52987 +0x0c,0x00,0x20,0x48,0x00,0x00,0x00,0x00,0x08,0x00,0x1d,0x7f,0x00,0x00,0x00,0x00,
52988 +0x3c,0x02,0xff,0x90,0x27,0xbd,0xff,0xe8,0x00,0x80,0x18,0x21,0x34,0x42,0x00,0x01,
52989 +0x27,0x84,0x91,0xf8,0x10,0x62,0x00,0x05,0xaf,0xbf,0x00,0x10,0x8f,0xbf,0x00,0x10,
52990 +0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x0c,0x00,0x0e,0x84,
52991 +0x00,0x00,0x00,0x00,0x27,0x84,0x8f,0x38,0x0c,0x00,0x1f,0x97,0x00,0x00,0x00,0x00,
52992 +0x27,0x84,0x8d,0x20,0x0c,0x00,0x1b,0xa3,0x00,0x00,0x00,0x00,0x08,0x00,0x1f,0x03,
52993 +0x00,0x00,0x00,0x00,0x8f,0x82,0x92,0x38,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x05,
52994 +0x00,0x00,0x18,0x21,0x8f,0x82,0x8d,0x28,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x02,
52995 +0x00,0x00,0x00,0x00,0x24,0x03,0x00,0x01,0x03,0xe0,0x00,0x08,0x00,0x60,0x10,0x21,
52996 +0x27,0xbd,0xff,0xe0,0x3c,0x06,0xb0,0x03,0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,
52997 +0x34,0xc6,0x00,0x5f,0xaf,0xbf,0x00,0x18,0x90,0xc3,0x00,0x00,0x3c,0x07,0xb0,0x03,
52998 +0x34,0xe7,0x00,0x5d,0x34,0x63,0x00,0x01,0x3c,0x09,0xb0,0x03,0x24,0x02,0x00,0x01,
52999 +0xa0,0xc3,0x00,0x00,0x00,0x80,0x80,0x21,0xa0,0xe2,0x00,0x00,0x00,0xa0,0x88,0x21,
53000 +0x35,0x29,0x00,0x5e,0x00,0xe0,0x40,0x21,0x24,0x04,0x00,0x01,0x91,0x22,0x00,0x00,
53001 +0x91,0x03,0x00,0x00,0x30,0x42,0x00,0x01,0x14,0x83,0x00,0x03,0x30,0x42,0x00,0x01,
53002 +0x14,0x40,0xff,0xfa,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x04,0x12,0x02,0x00,0x2c,
53003 +0x24,0x05,0x0f,0x00,0x24,0x02,0x00,0x06,0x12,0x02,0x00,0x08,0x24,0x05,0x00,0x0f,
53004 +0x3c,0x02,0xb0,0x03,0x34,0x42,0x02,0x00,0xa0,0x50,0x00,0x00,0x8f,0xbf,0x00,0x18,
53005 +0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x24,0x04,0x0c,0x04,
53006 +0x0c,0x00,0x1b,0x29,0x24,0x06,0x00,0x0f,0x24,0x04,0x0d,0x04,0x24,0x05,0x00,0x0f,
53007 +0x0c,0x00,0x1b,0x29,0x24,0x06,0x00,0x0f,0x24,0x04,0x08,0x80,0x24,0x05,0x1e,0x00,
53008 +0x0c,0x00,0x1b,0x29,0x24,0x06,0x00,0x0f,0x24,0x04,0x08,0x8c,0x24,0x05,0x0f,0x00,
53009 +0x0c,0x00,0x1b,0x29,0x24,0x06,0x00,0x0f,0x24,0x04,0x08,0x24,0x3c,0x05,0x00,0x30,
53010 +0x0c,0x00,0x1b,0x29,0x24,0x06,0x00,0x02,0x24,0x04,0x08,0x2c,0x3c,0x05,0x00,0x30,
53011 +0x0c,0x00,0x1b,0x29,0x24,0x06,0x00,0x02,0x24,0x04,0x08,0x34,0x3c,0x05,0x00,0x30,
53012 +0x0c,0x00,0x1b,0x29,0x24,0x06,0x00,0x02,0x24,0x04,0x08,0x3c,0x3c,0x05,0x00,0x30,
53013 +0x0c,0x00,0x1b,0x29,0x24,0x06,0x00,0x02,0x08,0x00,0x1f,0x3d,0x3c,0x02,0xb0,0x03,
53014 +0x24,0x04,0x08,0x8c,0x0c,0x00,0x1b,0x29,0x24,0x06,0x00,0x04,0x24,0x04,0x08,0x80,
53015 +0x24,0x05,0x1e,0x00,0x0c,0x00,0x1b,0x29,0x24,0x06,0x00,0x04,0x24,0x04,0x0c,0x04,
53016 +0x24,0x05,0x00,0x0f,0x0c,0x00,0x1b,0x29,0x24,0x06,0x00,0x04,0x24,0x04,0x0d,0x04,
53017 +0x24,0x05,0x00,0x0f,0x0c,0x00,0x1b,0x29,0x24,0x06,0x00,0x04,0x24,0x04,0x08,0x24,
53018 +0x3c,0x05,0x00,0x30,0x0c,0x00,0x1b,0x29,0x24,0x06,0x00,0x03,0x24,0x04,0x08,0x2c,
53019 +0x3c,0x05,0x00,0x30,0x0c,0x00,0x1b,0x29,0x24,0x06,0x00,0x03,0x24,0x04,0x08,0x34,
53020 +0x3c,0x05,0x00,0x30,0x0c,0x00,0x1b,0x29,0x24,0x06,0x00,0x02,0x3c,0x05,0x00,0x30,
53021 +0x24,0x06,0x00,0x03,0x0c,0x00,0x1b,0x29,0x24,0x04,0x08,0x3c,0x02,0x20,0x20,0x21,
53022 +0x24,0x05,0x00,0x14,0x0c,0x00,0x1b,0x6e,0x24,0x06,0x01,0x07,0x08,0x00,0x1f,0x3d,
53023 +0x3c,0x02,0xb0,0x03,0x3c,0x03,0xb0,0x03,0x34,0x63,0x00,0x73,0x90,0x62,0x00,0x00,
53024 +0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x02,0x14,0x40,0x00,0x04,0x00,0x00,0x00,0x00,
53025 +0xa3,0x80,0x87,0x6d,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
53026 +0xa3,0x82,0x87,0x6d,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,
53027 +0x3c,0x02,0x80,0x00,0x00,0x80,0x70,0x21,0x34,0x63,0x00,0x20,0x24,0x42,0x7e,0x5c,
53028 +0x3c,0x04,0xb0,0x03,0xac,0x62,0x00,0x00,0x34,0x84,0x00,0x30,0xad,0xc0,0x02,0xb8,
53029 +0x8c,0x83,0x00,0x00,0x24,0x02,0x00,0xff,0xa5,0xc0,0x00,0x0a,0x00,0x00,0x30,0x21,
53030 +0xa7,0x82,0x99,0x30,0x27,0x88,0x99,0x40,0xa5,0xc3,0x00,0x08,0x3c,0x07,0xb0,0x08,
53031 +0x30,0xc2,0xff,0xff,0x00,0x02,0x20,0xc0,0x24,0xc3,0x00,0x01,0x00,0x82,0x10,0x21,
53032 +0x00,0x60,0x30,0x21,0x00,0x02,0x10,0x80,0x30,0x63,0xff,0xff,0x00,0x48,0x10,0x21,
53033 +0x00,0x87,0x20,0x21,0x28,0xc5,0x00,0xff,0xac,0x83,0x00,0x00,0x14,0xa0,0xff,0xf4,
53034 +0xa4,0x43,0x00,0x00,0x3c,0x02,0xb0,0x08,0x34,0x03,0xff,0xff,0x25,0xc4,0x00,0x0c,
53035 +0x24,0x0a,0x00,0x02,0x34,0x42,0x07,0xf8,0x3c,0x06,0xb0,0x03,0xa7,0x83,0xbd,0x1c,
53036 +0xac,0x43,0x00,0x00,0xaf,0x84,0xbd,0x40,0x34,0xc6,0x00,0x64,0xa0,0x8a,0x00,0x18,
53037 +0x94,0xc5,0x00,0x00,0x8f,0x82,0xbd,0x40,0x25,0xc4,0x00,0x30,0x24,0x08,0x00,0x03,
53038 +0x3c,0x03,0xb0,0x03,0xa0,0x45,0x00,0x21,0x34,0x63,0x00,0x66,0xaf,0x84,0xbd,0x44,
53039 +0xa0,0x88,0x00,0x18,0x94,0x65,0x00,0x00,0x8f,0x82,0xbd,0x44,0x25,0xc4,0x00,0x54,
53040 +0x25,0xc7,0x00,0x78,0xa0,0x45,0x00,0x21,0xaf,0x84,0xbd,0x48,0xa0,0x88,0x00,0x18,
53041 +0x94,0x65,0x00,0x00,0x8f,0x82,0xbd,0x48,0x25,0xc8,0x00,0x9c,0x24,0x09,0x00,0x01,
53042 +0xa0,0x45,0x00,0x21,0xaf,0x87,0xbd,0x4c,0xa0,0xea,0x00,0x18,0x94,0xc4,0x00,0x00,
53043 +0x8f,0x82,0xbd,0x4c,0x3c,0x03,0xb0,0x03,0x34,0x63,0x00,0x62,0xa0,0x44,0x00,0x21,
53044 +0xaf,0x88,0xbd,0x50,0xa1,0x09,0x00,0x18,0x94,0x65,0x00,0x00,0x8f,0x82,0xbd,0x50,
53045 +0x25,0xc4,0x00,0xc0,0x3c,0x06,0xb0,0x03,0xa0,0x45,0x00,0x21,0xaf,0x84,0xbd,0x54,
53046 +0xa0,0x89,0x00,0x18,0x94,0x65,0x00,0x00,0x8f,0x82,0xbd,0x54,0x25,0xc4,0x00,0xe4,
53047 +0x34,0xc6,0x00,0x60,0xa0,0x45,0x00,0x21,0xaf,0x84,0xbd,0x58,0xa0,0x80,0x00,0x18,
53048 +0x94,0xc5,0x00,0x00,0x8f,0x82,0xbd,0x58,0x25,0xc3,0x01,0x08,0x25,0xc7,0x01,0x2c,
53049 +0xa0,0x45,0x00,0x21,0xaf,0x83,0xbd,0x5c,0xa0,0x60,0x00,0x18,0x94,0xc8,0x00,0x00,
53050 +0x8f,0x82,0xbd,0x5c,0x25,0xc4,0x01,0x50,0x25,0xc5,0x01,0x74,0xa0,0x48,0x00,0x21,
53051 +0x25,0xc6,0x01,0x98,0x25,0xc9,0x01,0xbc,0x25,0xca,0x01,0xe0,0x25,0xcb,0x02,0x04,
53052 +0x25,0xcc,0x02,0x28,0x25,0xcd,0x02,0x4c,0x24,0x02,0x00,0x10,0x3c,0x03,0xb0,0x03,
53053 +0xaf,0x87,0xbd,0x60,0x34,0x63,0x00,0x38,0xa0,0xe0,0x00,0x18,0xaf,0x84,0xbd,0x64,
53054 +0xa0,0x80,0x00,0x18,0xaf,0x85,0xbd,0x68,0xa0,0xa0,0x00,0x18,0xaf,0x86,0xbd,0x6c,
53055 +0xa0,0xc0,0x00,0x18,0xaf,0x89,0xbd,0x70,0xa1,0x20,0x00,0x18,0xaf,0x8a,0xbd,0x74,
53056 +0xa1,0x40,0x00,0x18,0xaf,0x8b,0xbd,0x78,0xa1,0x60,0x00,0x18,0xaf,0x8c,0xbd,0x7c,
53057 +0xa1,0x80,0x00,0x18,0xaf,0x8d,0xbd,0x80,0xa1,0xa2,0x00,0x18,0x94,0x64,0x00,0x00,
53058 +0x8f,0x82,0xbd,0x80,0x25,0xc5,0x02,0x70,0x3c,0x03,0xb0,0x03,0xa0,0x44,0x00,0x21,
53059 +0x24,0x02,0x00,0x11,0xaf,0x85,0xbd,0x84,0x34,0x63,0x00,0x6e,0xa0,0xa2,0x00,0x18,
53060 +0x94,0x64,0x00,0x00,0x8f,0x82,0xbd,0x84,0x25,0xc5,0x02,0x94,0x3c,0x03,0xb0,0x03,
53061 +0xa0,0x44,0x00,0x21,0x24,0x02,0x00,0x12,0xaf,0x85,0xbd,0x88,0x34,0x63,0x00,0x6c,
53062 +0xa0,0xa2,0x00,0x18,0x94,0x64,0x00,0x00,0x8f,0x82,0xbd,0x88,0x24,0x05,0xff,0xff,
53063 +0x24,0x07,0x00,0x01,0xa0,0x44,0x00,0x21,0x24,0x06,0x00,0x12,0x27,0x84,0xbd,0x40,
53064 +0x8c,0x82,0x00,0x00,0x24,0xc6,0xff,0xff,0xa0,0x40,0x00,0x04,0x8c,0x83,0x00,0x00,
53065 +0xa4,0x45,0x00,0x00,0xa4,0x45,0x00,0x02,0xa0,0x60,0x00,0x0a,0x8c,0x82,0x00,0x00,
53066 +0xa4,0x65,0x00,0x06,0xa4,0x65,0x00,0x08,0xa0,0x40,0x00,0x10,0x8c,0x83,0x00,0x00,
53067 +0xa4,0x45,0x00,0x0c,0xa4,0x45,0x00,0x0e,0xa0,0x60,0x00,0x12,0x8c,0x82,0x00,0x00,
53068 +0x00,0x00,0x00,0x00,0xa0,0x40,0x00,0x16,0x8c,0x83,0x00,0x00,0xa4,0x45,0x00,0x14,
53069 +0xa0,0x67,0x00,0x17,0x8c,0x82,0x00,0x00,0x24,0x84,0x00,0x04,0xa0,0x40,0x00,0x20,
53070 +0x04,0xc1,0xff,0xe7,0xac,0x40,0x00,0x1c,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
53071 +0x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x01,0x34,0x42,0x00,0x20,0x24,0x63,0x81,0x20,
53072 +0xac,0x43,0x00,0x00,0x90,0x82,0x00,0x10,0x00,0x80,0x60,0x21,0x10,0x40,0x00,0x56,
53073 +0x00,0x00,0x70,0x21,0x97,0x82,0x99,0x30,0x94,0x8a,0x00,0x0c,0x27,0x87,0x99,0x40,
53074 +0x00,0x02,0x40,0xc0,0x01,0x02,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x47,0x10,0x21,
53075 +0x90,0x8b,0x00,0x18,0xa4,0x4a,0x00,0x00,0x94,0x83,0x00,0x0e,0x39,0x64,0x00,0x10,
53076 +0x2c,0x84,0x00,0x01,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x34,0x85,0x00,0x02,
53077 +0x39,0x63,0x00,0x11,0x00,0x83,0x28,0x0b,0x34,0xa3,0x00,0x08,0x39,0x64,0x00,0x12,
53078 +0x00,0x02,0x10,0x80,0x00,0xa4,0x18,0x0b,0x00,0x47,0x10,0x21,0x94,0x49,0x00,0x04,
53079 +0x34,0x64,0x00,0x20,0x00,0x6b,0x20,0x0b,0x34,0x83,0x00,0x40,0x39,0x62,0x00,0x01,
53080 +0x00,0x82,0x18,0x0b,0x00,0x09,0x30,0xc0,0x34,0x64,0x00,0x80,0x00,0xc9,0x28,0x21,
53081 +0x39,0x62,0x00,0x02,0x00,0x60,0x68,0x21,0x00,0x82,0x68,0x0a,0x00,0x05,0x28,0x80,
53082 +0x3c,0x02,0xb0,0x08,0x00,0xa7,0x28,0x21,0x00,0xc2,0x30,0x21,0x01,0x02,0x40,0x21,
53083 +0x34,0x03,0xff,0xff,0x35,0xa4,0x01,0x00,0x39,0x62,0x00,0x03,0x2d,0x67,0x00,0x13,
53084 +0xad,0x0a,0x00,0x00,0xa4,0xa3,0x00,0x00,0xac,0xc3,0x00,0x00,0xa7,0x89,0x99,0x30,
53085 +0x10,0xe0,0x00,0x0f,0x00,0x82,0x68,0x0a,0x3c,0x03,0x80,0x01,0x00,0x0b,0x10,0x80,
53086 +0x24,0x63,0x08,0xf0,0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x00,0x00,0x00,0x00,0x00,
53087 +0x00,0x80,0x00,0x08,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,0x34,0x63,0x00,0x60,
53088 +0x94,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x14,0x00,0x00,0x02,0x74,0x03,
53089 +0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x3a,0x94,0x44,0x00,0x00,0x93,0x83,0x99,0x24,
53090 +0x91,0x82,0x00,0x21,0x01,0xc4,0x20,0x21,0x91,0x85,0x00,0x10,0x00,0x04,0x24,0x00,
53091 +0x00,0x62,0x18,0x21,0x00,0x04,0x74,0x03,0x00,0x6e,0x18,0x23,0x00,0x65,0x10,0x2a,
53092 +0x00,0xa2,0x18,0x0a,0x00,0x0d,0x24,0x00,0x3c,0x02,0xb0,0x06,0x24,0x05,0xff,0xff,
53093 +0x00,0x64,0x18,0x25,0x34,0x42,0x80,0x20,0xac,0x43,0x00,0x00,0xa5,0x85,0x00,0x0e,
53094 +0xa1,0x80,0x00,0x10,0xa5,0x85,0x00,0x0c,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
53095 +0x3c,0x03,0xb0,0x03,0x08,0x00,0x20,0x8c,0x34,0x63,0x00,0x62,0x3c,0x03,0xb0,0x03,
53096 +0x08,0x00,0x20,0x8c,0x34,0x63,0x00,0x64,0x3c,0x03,0xb0,0x03,0x08,0x00,0x20,0x8c,
53097 +0x34,0x63,0x00,0x66,0x3c,0x03,0xb0,0x03,0x08,0x00,0x20,0x8c,0x34,0x63,0x00,0x38,
53098 +0x3c,0x03,0xb0,0x03,0x08,0x00,0x20,0x8c,0x34,0x63,0x00,0x6e,0x3c,0x03,0xb0,0x03,
53099 +0x08,0x00,0x20,0x8c,0x34,0x63,0x00,0x6c,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x01,
53100 +0x34,0x63,0x00,0x20,0x24,0x42,0x82,0xe8,0x00,0x05,0x28,0x40,0xac,0x62,0x00,0x00,
53101 +0x00,0xa6,0x28,0x21,0x2c,0xe2,0x00,0x10,0x14,0x80,0x00,0x06,0x00,0x00,0x18,0x21,
53102 +0x10,0x40,0x00,0x02,0x00,0x00,0x00,0x00,0x00,0xe0,0x18,0x21,0x03,0xe0,0x00,0x08,
53103 +0x00,0x60,0x10,0x21,0x24,0x02,0x00,0x20,0x10,0xe2,0x00,0x06,0x2c,0xe4,0x00,0x10,
53104 +0x24,0xa2,0x00,0x01,0x10,0x80,0xff,0xf9,0x00,0x02,0x11,0x00,0x08,0x00,0x20,0xc7,
53105 +0x00,0x47,0x18,0x21,0x08,0x00,0x20,0xc7,0x24,0xa3,0x00,0x50,0x27,0xbd,0xff,0xc8,
53106 +0xaf,0xb4,0x00,0x20,0xaf,0xb3,0x00,0x1c,0xaf,0xb2,0x00,0x18,0xaf,0xb1,0x00,0x14,
53107 +0xaf,0xbf,0x00,0x30,0xaf,0xb7,0x00,0x2c,0xaf,0xb6,0x00,0x28,0xaf,0xb5,0x00,0x24,
53108 +0xaf,0xb0,0x00,0x10,0x00,0x80,0x90,0x21,0x84,0x84,0x00,0x08,0x3c,0x05,0xb0,0x03,
53109 +0x3c,0x02,0x80,0x01,0x34,0xa5,0x00,0x20,0x24,0x42,0x83,0x4c,0x3c,0x03,0xb0,0x06,
53110 +0x00,0x04,0x20,0x80,0xac,0xa2,0x00,0x00,0x00,0x83,0x20,0x21,0x3c,0x06,0xb0,0x06,
53111 +0x8c,0x82,0x00,0x00,0x34,0xc6,0x80,0x24,0x8c,0x88,0x00,0x00,0x8c,0xc4,0x00,0x00,
53112 +0x96,0x45,0x00,0x08,0x30,0x53,0xff,0xff,0x00,0x08,0x44,0x02,0x34,0x84,0x01,0x00,
53113 +0x3c,0x02,0xb0,0x00,0x00,0x08,0x18,0xc0,0x00,0x13,0x3a,0x00,0xac,0xc4,0x00,0x00,
53114 +0x00,0xe2,0x38,0x21,0xae,0x53,0x02,0xb8,0x00,0x68,0x18,0x21,0x24,0xa5,0x00,0x02,
53115 +0x8c,0xf6,0x00,0x00,0x30,0xa5,0x01,0xff,0x8c,0xf5,0x00,0x04,0x27,0x86,0x99,0x40,
53116 +0x00,0x03,0x18,0x80,0x00,0x13,0xa0,0xc0,0xa6,0x45,0x00,0x08,0x00,0x66,0x18,0x21,
53117 +0x02,0x93,0x10,0x21,0x00,0x02,0x48,0x80,0x94,0x65,0x00,0x00,0x01,0x26,0x30,0x21,
53118 +0x24,0x02,0xff,0xff,0x00,0x15,0x1a,0x02,0x27,0x84,0x99,0x50,0xa4,0xc2,0x00,0x02,
53119 +0x30,0x63,0x00,0x1f,0x24,0x02,0x00,0x10,0x01,0x24,0x20,0x21,0xa4,0xc8,0x00,0x04,
53120 +0x8c,0xf0,0x00,0x08,0xa6,0x43,0x00,0x06,0xa6,0x45,0x00,0x0a,0xa0,0x82,0x00,0x06,
53121 +0x86,0x43,0x00,0x06,0x27,0x82,0x99,0x44,0x01,0x22,0x88,0x21,0x24,0x02,0x00,0x13,
53122 +0x10,0x62,0x00,0xee,0xae,0x27,0x00,0x18,0x3c,0x03,0xb0,0x03,0x34,0x63,0x01,0x00,
53123 +0xa6,0x40,0x00,0x02,0x3c,0x02,0xb0,0x03,0x90,0x64,0x00,0x00,0x34,0x42,0x01,0x08,
53124 +0x8c,0x45,0x00,0x00,0x00,0x10,0x1b,0xc2,0x00,0x04,0x20,0x82,0x30,0x63,0x00,0x01,
53125 +0xac,0xc5,0x00,0x08,0x10,0x60,0x00,0xc7,0x30,0x97,0x00,0x01,0x00,0x10,0x16,0x82,
53126 +0x30,0x46,0x00,0x01,0x00,0x10,0x12,0x02,0x00,0x10,0x19,0xc2,0x00,0x10,0x26,0x02,
53127 +0x00,0x10,0x2e,0x42,0x30,0x48,0x00,0x7f,0x24,0x02,0x00,0x01,0x30,0x71,0x00,0x01,
53128 +0x30,0x84,0x00,0x01,0x10,0xc2,0x00,0xb3,0x30,0xa3,0x00,0x01,0x00,0x60,0x28,0x21,
53129 +0x0c,0x00,0x20,0xba,0x01,0x00,0x38,0x21,0x02,0x93,0x18,0x21,0x00,0x03,0x18,0x80,
53130 +0x2c,0x46,0x00,0x54,0x27,0x85,0x99,0x50,0x27,0x84,0x99,0x48,0x00,0x06,0x10,0x0a,
53131 +0x00,0x65,0x28,0x21,0x26,0x26,0x00,0x02,0x00,0x64,0x18,0x21,0xa0,0xa2,0x00,0x02,
53132 +0xa0,0x66,0x00,0x06,0xa0,0x62,0x00,0x07,0xa0,0xa2,0x00,0x01,0x02,0x93,0x28,0x21,
53133 +0x00,0x05,0x28,0x80,0x27,0x82,0x99,0x44,0x00,0xa2,0x58,0x21,0x8d,0x64,0x00,0x18,
53134 +0x00,0x10,0x15,0xc2,0x30,0x42,0x00,0x01,0x8c,0x83,0x00,0x0c,0x27,0x84,0x99,0x60,
53135 +0x00,0xa4,0x48,0x21,0xa6,0x42,0x00,0x00,0xa6,0x56,0x00,0x04,0x8d,0x26,0x00,0x00,
53136 +0x00,0x03,0x19,0x42,0x3c,0x02,0xff,0xef,0x34,0x42,0xff,0xff,0x30,0x63,0x00,0x01,
53137 +0x00,0xc2,0x40,0x24,0x00,0x03,0x1d,0x00,0x01,0x03,0x40,0x25,0x00,0x08,0x15,0x02,
53138 +0x00,0x10,0x34,0x42,0x00,0x10,0x3c,0x82,0x00,0x15,0x19,0x82,0x00,0x15,0x25,0x82,
53139 +0x00,0x10,0x2c,0x02,0x30,0x42,0x00,0x01,0x30,0xcd,0x00,0x01,0x30,0x6c,0x00,0x01,
53140 +0x30,0xe6,0x00,0x01,0x30,0x8a,0x00,0x03,0x32,0xb1,0x00,0x07,0x30,0xa5,0x00,0x01,
53141 +0xad,0x28,0x00,0x00,0x10,0x40,0x00,0x0b,0x32,0x07,0x00,0x7f,0x8d,0x64,0x00,0x18,
53142 +0x3c,0x03,0xff,0xf0,0x34,0x63,0xff,0xff,0x8c,0x82,0x00,0x0c,0x01,0x03,0x18,0x24,
53143 +0x00,0x02,0x13,0x82,0x30,0x42,0x00,0x0f,0x00,0x02,0x14,0x00,0x00,0x62,0x18,0x25,
53144 +0xad,0x23,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xc2,0x00,0x6a,0x00,0x00,0x00,0x00,
53145 +0x15,0x80,0x00,0x03,0x00,0x00,0x00,0x00,0x15,0x40,0x00,0x5b,0x24,0x02,0x00,0x01,
53146 +0x96,0x42,0x00,0x04,0x00,0x00,0x00,0x00,0x24,0x42,0x00,0x04,0xa6,0x42,0x00,0x04,
53147 +0x00,0xa0,0x20,0x21,0x0c,0x00,0x20,0xba,0x01,0xa0,0x28,0x21,0x02,0x93,0x18,0x21,
53148 +0x00,0x03,0x40,0x80,0x2c,0x45,0x00,0x54,0x27,0x84,0x99,0x50,0x01,0x04,0x20,0x21,
53149 +0x00,0x05,0x10,0x0a,0xa0,0x82,0x00,0x00,0xa0,0x80,0x00,0x04,0xa0,0x80,0x00,0x05,
53150 +0x96,0x43,0x00,0x04,0x27,0x82,0x99,0x40,0x01,0x02,0x10,0x21,0xa4,0x43,0x00,0x06,
53151 +0x27,0x82,0x99,0x44,0x92,0x46,0x00,0x01,0x01,0x02,0x10,0x21,0x8c,0x45,0x00,0x18,
53152 +0x27,0x83,0x99,0x60,0x01,0x03,0x18,0x21,0xa0,0x60,0x00,0x00,0xa0,0x86,0x00,0x07,
53153 +0x94,0xa2,0x00,0x10,0x24,0x03,0x00,0x04,0x30,0x42,0x00,0x0f,0x10,0x43,0x00,0x36,
53154 +0x24,0xa5,0x00,0x10,0x94,0xa3,0x00,0x16,0x27,0x87,0x99,0x58,0x01,0x07,0x10,0x21,
53155 +0xa4,0x43,0x00,0x02,0x94,0xa2,0x00,0x04,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x01,
53156 +0x14,0x40,0x00,0x24,0x02,0x93,0x20,0x21,0x94,0xa2,0x00,0x00,0x24,0x03,0x00,0xa4,
53157 +0x30,0x42,0x00,0xff,0x10,0x43,0x00,0x1f,0x00,0x00,0x00,0x00,0x94,0xa2,0x00,0x00,
53158 +0x24,0x03,0x00,0x88,0x30,0x42,0x00,0x88,0x10,0x43,0x00,0x14,0x02,0x93,0x18,0x21,
53159 +0x27,0x84,0x99,0x60,0x00,0x03,0x18,0x80,0x00,0x64,0x18,0x21,0x8c,0x62,0x00,0x00,
53160 +0x3c,0x04,0x00,0x80,0x00,0x44,0x10,0x25,0xac,0x62,0x00,0x00,0x02,0x93,0x10,0x21,
53161 +0x00,0x02,0x10,0x80,0x00,0x47,0x10,0x21,0xa0,0x51,0x00,0x00,0x8f,0xbf,0x00,0x30,
53162 +0x7b,0xb6,0x01,0x7c,0x7b,0xb4,0x01,0x3c,0x7b,0xb2,0x00,0xfc,0x7b,0xb0,0x00,0xbc,
53163 +0x24,0x02,0x00,0x01,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x38,0x94,0xa2,0x00,0x18,
53164 +0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x60,0x10,0x40,0xff,0xe9,0x02,0x93,0x18,0x21,
53165 +0x02,0x93,0x20,0x21,0x27,0x82,0x99,0x60,0x00,0x04,0x20,0x80,0x00,0x82,0x20,0x21,
53166 +0x8c,0x83,0x00,0x00,0x3c,0x02,0xff,0x7f,0x34,0x42,0xff,0xff,0x00,0x62,0x18,0x24,
53167 +0x08,0x00,0x21,0xaf,0xac,0x83,0x00,0x00,0x27,0x87,0x99,0x58,0x01,0x07,0x10,0x21,
53168 +0x08,0x00,0x21,0x99,0xa4,0x40,0x00,0x02,0x11,0x42,0x00,0x07,0x00,0x00,0x00,0x00,
53169 +0x2d,0x42,0x00,0x02,0x14,0x40,0xff,0xa7,0x00,0xa0,0x20,0x21,0x96,0x42,0x00,0x04,
53170 +0x08,0x00,0x21,0x77,0x24,0x42,0x00,0x0c,0x96,0x42,0x00,0x04,0x08,0x00,0x21,0x77,
53171 +0x24,0x42,0x00,0x08,0x16,0xe6,0xff,0x96,0x3c,0x02,0xff,0xfb,0x8d,0x63,0x00,0x18,
53172 +0x34,0x42,0xff,0xff,0x02,0x02,0x10,0x24,0xac,0x62,0x00,0x08,0x08,0x00,0x21,0x70,
53173 +0x00,0x00,0x30,0x21,0x16,0xe6,0xff,0x4e,0x00,0x60,0x28,0x21,0x3c,0x02,0xfb,0xff,
53174 +0x34,0x42,0xff,0xff,0x02,0x02,0x10,0x24,0xac,0xe2,0x00,0x08,0x08,0x00,0x21,0x2f,
53175 +0x00,0x00,0x30,0x21,0x93,0x87,0xc4,0x54,0x00,0x10,0x1e,0x42,0x00,0x10,0x26,0x82,
53176 +0x27,0x82,0x99,0x48,0x2c,0xe5,0x00,0x0c,0x01,0x22,0x48,0x21,0x30,0x63,0x00,0x01,
53177 +0x30,0x86,0x00,0x01,0x14,0xa0,0x00,0x06,0x00,0xe0,0x40,0x21,0x00,0x03,0x10,0x40,
53178 +0x00,0x46,0x10,0x21,0x00,0x02,0x11,0x00,0x00,0xe2,0x10,0x21,0x24,0x48,0x00,0x04,
53179 +0x02,0x93,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x84,0x99,0x50,0x27,0x83,0x99,0x48,
53180 +0x00,0x44,0x20,0x21,0x00,0x43,0x10,0x21,0xa1,0x28,0x00,0x07,0xa0,0x40,0x00,0x06,
53181 +0xa0,0x80,0x00,0x02,0x08,0x00,0x21,0x3f,0xa0,0x80,0x00,0x01,0x24,0x02,0x00,0x01,
53182 +0x00,0xe0,0x20,0x21,0x0c,0x00,0x01,0xc2,0xa6,0x42,0x00,0x02,0x8e,0x24,0x00,0x18,
53183 +0x0c,0x00,0x05,0x39,0x00,0x00,0x00,0x00,0x08,0x00,0x21,0xb3,0x00,0x00,0x00,0x00,
53184 +0x30,0xa7,0xff,0xff,0x00,0x07,0x18,0xc0,0x00,0x67,0x18,0x21,0x3c,0x06,0xb0,0x03,
53185 +0x3c,0x02,0x80,0x01,0x24,0x42,0x88,0x30,0x27,0x85,0x99,0x50,0x00,0x03,0x18,0x80,
53186 +0x34,0xc6,0x00,0x20,0x00,0x65,0x18,0x21,0xac,0xc2,0x00,0x00,0x80,0x62,0x00,0x07,
53187 +0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x29,0x00,0x80,0x28,0x21,0x90,0x82,0x00,0x16,
53188 +0x00,0x00,0x00,0x00,0x34,0x42,0x00,0x02,0x30,0x43,0x00,0x01,0x14,0x60,0x00,0x02,
53189 +0xa0,0x82,0x00,0x16,0xa0,0x80,0x00,0x17,0x90,0xa2,0x00,0x04,0x3c,0x03,0xb0,0x03,
53190 +0x27,0x86,0x99,0x40,0x14,0x40,0x00,0x06,0x34,0x63,0x00,0x20,0x24,0x02,0x00,0x01,
53191 +0xa0,0xa2,0x00,0x04,0xa4,0xa7,0x00,0x02,0x03,0xe0,0x00,0x08,0xa4,0xa7,0x00,0x00,
53192 +0x94,0xa4,0x00,0x02,0x3c,0x02,0x80,0x01,0x24,0x42,0xa0,0x30,0xac,0x62,0x00,0x00,
53193 +0x00,0x04,0x18,0xc0,0x00,0x64,0x18,0x21,0x00,0x03,0x18,0x80,0x00,0x66,0x18,0x21,
53194 +0x94,0x62,0x00,0x04,0xa4,0x67,0x00,0x02,0x3c,0x03,0xb0,0x08,0x00,0x02,0x20,0xc0,
53195 +0x00,0x82,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x46,0x10,0x21,0x00,0x83,0x20,0x21,
53196 +0xa4,0x47,0x00,0x00,0xac,0x87,0x00,0x00,0x90,0xa2,0x00,0x04,0xa4,0xa7,0x00,0x02,
53197 +0x24,0x42,0x00,0x01,0x03,0xe0,0x00,0x08,0xa0,0xa2,0x00,0x04,0x90,0x82,0x00,0x16,
53198 +0x24,0x85,0x00,0x06,0x34,0x42,0x00,0x01,0x30,0x43,0x00,0x02,0x14,0x60,0xff,0xda,
53199 +0xa0,0x82,0x00,0x16,0x24,0x02,0x00,0x01,0x08,0x00,0x22,0x22,0xa0,0x82,0x00,0x17,
53200 +0x27,0xbd,0xff,0xe8,0xaf,0xbf,0x00,0x10,0x00,0x80,0x38,0x21,0x84,0x84,0x00,0x02,
53201 +0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x01,0x3c,0x0a,0xb0,0x06,0x34,0x63,0x00,0x20,
53202 +0x24,0x42,0x89,0x30,0x3c,0x0b,0xb0,0x08,0x27,0x89,0x99,0x40,0x34,0x0c,0xff,0xff,
53203 +0x35,0x4a,0x80,0x20,0x10,0x80,0x00,0x30,0xac,0x62,0x00,0x00,0x97,0x82,0x99,0x30,
53204 +0x94,0xe6,0x02,0xba,0x00,0x02,0x18,0xc0,0x00,0x6b,0x28,0x21,0xac,0xa6,0x00,0x00,
53205 +0x8c,0xe4,0x02,0xb8,0x00,0x62,0x18,0x21,0x00,0x03,0x18,0x80,0x00,0x04,0x10,0xc0,
53206 +0x00,0x44,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x49,0x10,0x21,0x94,0x48,0x00,0x04,
53207 +0x00,0x69,0x18,0x21,0xa4,0x66,0x00,0x00,0x00,0x08,0x28,0xc0,0x00,0xab,0x10,0x21,
53208 +0xac,0x4c,0x00,0x00,0x8c,0xe4,0x02,0xb8,0x27,0x82,0x99,0x44,0x00,0xa8,0x28,0x21,
53209 +0x00,0x04,0x18,0xc0,0x00,0x64,0x18,0x21,0x00,0x03,0x18,0x80,0x00,0x62,0x10,0x21,
53210 +0x8c,0x46,0x00,0x18,0x27,0x84,0x99,0x50,0x00,0x64,0x18,0x21,0x8c,0xc2,0x00,0x00,
53211 +0x80,0x67,0x00,0x06,0x00,0x05,0x28,0x80,0x30,0x42,0xff,0xff,0x00,0x47,0x10,0x21,
53212 +0x30,0x43,0x00,0xff,0x00,0x03,0x18,0x2b,0x00,0x02,0x12,0x02,0x00,0x43,0x10,0x21,
53213 +0x3c,0x04,0x00,0x04,0x00,0xa9,0x28,0x21,0x00,0x44,0x10,0x25,0xa4,0xac,0x00,0x00,
53214 +0xad,0x42,0x00,0x00,0xa7,0x88,0x99,0x30,0x8f,0xbf,0x00,0x10,0x00,0x00,0x00,0x00,
53215 +0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x84,0xe3,0x00,0x06,0x27,0x82,0xbd,0x40,
53216 +0x94,0xe5,0x02,0xba,0x00,0x03,0x18,0x80,0x00,0x62,0x18,0x21,0x8c,0x64,0x00,0x00,
53217 +0x0c,0x00,0x22,0x0c,0x00,0x00,0x00,0x00,0x08,0x00,0x22,0x86,0x00,0x00,0x00,0x00,
53218 +0x94,0x88,0x00,0x00,0x00,0x80,0x58,0x21,0x27,0x8a,0x99,0x40,0x00,0x08,0x18,0xc0,
53219 +0x00,0x68,0x18,0x21,0x3c,0x04,0xb0,0x03,0x00,0x03,0x18,0x80,0x3c,0x02,0x80,0x01,
53220 +0x00,0x6a,0x18,0x21,0x34,0x84,0x00,0x20,0x24,0x42,0x8a,0x50,0x30,0xa5,0xff,0xff,
53221 +0xac,0x82,0x00,0x00,0x94,0x67,0x00,0x02,0x11,0x05,0x00,0x35,0x24,0x04,0x00,0x01,
53222 +0x91,0x66,0x00,0x04,0x00,0x00,0x00,0x00,0x00,0x86,0x10,0x2a,0x10,0x40,0x00,0x10,
53223 +0x00,0xc0,0x48,0x21,0x3c,0x0d,0xb0,0x03,0x01,0x40,0x60,0x21,0x35,0xad,0x00,0x20,
53224 +0x10,0xe5,0x00,0x0d,0x24,0x84,0x00,0x01,0x00,0x07,0x10,0xc0,0x00,0x47,0x10,0x21,
53225 +0x00,0x02,0x10,0x80,0x01,0x20,0x30,0x21,0x00,0x4a,0x10,0x21,0x00,0x86,0x18,0x2a,
53226 +0x00,0xe0,0x40,0x21,0x94,0x47,0x00,0x02,0x14,0x60,0xff,0xf5,0x00,0x00,0x00,0x00,
53227 +0x03,0xe0,0x00,0x08,0x00,0x00,0x10,0x21,0x00,0x08,0x20,0xc0,0x00,0x88,0x20,0x21,
53228 +0x24,0xc2,0xff,0xff,0x00,0x04,0x20,0x80,0xa1,0x62,0x00,0x04,0x00,0x8c,0x20,0x21,
53229 +0x94,0x83,0x00,0x04,0x00,0x07,0x10,0xc0,0x00,0x47,0x10,0x21,0x00,0x02,0x10,0x80,
53230 +0x00,0x4c,0x10,0x21,0x00,0x03,0x28,0xc0,0x94,0x46,0x00,0x02,0x00,0xa3,0x18,0x21,
53231 +0x00,0x03,0x18,0x80,0x00,0x6c,0x18,0x21,0xa4,0x66,0x00,0x00,0xa4,0x86,0x00,0x02,
53232 +0x95,0x64,0x00,0x02,0x3c,0x03,0xb0,0x08,0x3c,0x02,0x80,0x01,0x00,0xa3,0x28,0x21,
53233 +0x24,0x42,0xa0,0x30,0xad,0xa2,0x00,0x00,0x10,0x87,0x00,0x03,0xac,0xa6,0x00,0x00,
53234 +0x03,0xe0,0x00,0x08,0x24,0x02,0x00,0x01,0x08,0x00,0x22,0xd4,0xa5,0x68,0x00,0x02,
53235 +0x91,0x62,0x00,0x04,0xa5,0x67,0x00,0x00,0x24,0x42,0xff,0xff,0x30,0x43,0x00,0xff,
53236 +0x14,0x60,0xff,0xf7,0xa1,0x62,0x00,0x04,0x24,0x02,0xff,0xff,0x08,0x00,0x22,0xd4,
53237 +0xa5,0x62,0x00,0x02,0x00,0x05,0x40,0xc0,0x01,0x05,0x30,0x21,0x27,0xbd,0xff,0xd8,
53238 +0x00,0x06,0x30,0x80,0x27,0x82,0x99,0x44,0xaf,0xb2,0x00,0x18,0xaf,0xb1,0x00,0x14,
53239 +0xaf,0xbf,0x00,0x20,0xaf,0xb3,0x00,0x1c,0xaf,0xb0,0x00,0x10,0x00,0xc2,0x10,0x21,
53240 +0x8c,0x47,0x00,0x18,0x00,0xa0,0x90,0x21,0x3c,0x02,0x80,0x01,0x3c,0x05,0xb0,0x03,
53241 +0x34,0xa5,0x00,0x20,0x24,0x42,0x8b,0x84,0xac,0xa2,0x00,0x00,0x27,0x83,0x99,0x50,
53242 +0x00,0xc3,0x30,0x21,0x8c,0xe2,0x00,0x00,0x80,0xc5,0x00,0x06,0x00,0x80,0x88,0x21,
53243 +0x30,0x42,0xff,0xff,0x00,0x45,0x10,0x21,0x30,0x43,0x00,0xff,0x10,0x60,0x00,0x02,
53244 +0x00,0x02,0x12,0x02,0x24,0x42,0x00,0x01,0x30,0x53,0x00,0xff,0x01,0x12,0x10,0x21,
53245 +0x00,0x02,0x10,0x80,0x27,0x83,0x99,0x50,0x00,0x43,0x10,0x21,0x80,0x44,0x00,0x07,
53246 +0x00,0x00,0x00,0x00,0x10,0x80,0x00,0x4b,0x26,0x24,0x00,0x06,0x32,0x50,0xff,0xff,
53247 +0x02,0x20,0x20,0x21,0x0c,0x00,0x22,0x94,0x02,0x00,0x28,0x21,0x92,0x22,0x00,0x10,
53248 +0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x2e,0x3c,0x03,0xb0,0x08,0x3c,0x09,0x80,0x01,
53249 +0x27,0x88,0x99,0x40,0xa6,0x32,0x00,0x0c,0x00,0x10,0x20,0xc0,0x00,0x90,0x20,0x21,
53250 +0x00,0x04,0x20,0x80,0x00,0x88,0x20,0x21,0x94,0x82,0x00,0x04,0x3c,0x03,0xb0,0x08,
53251 +0x3c,0x07,0xb0,0x03,0x00,0x02,0x28,0xc0,0x00,0xa2,0x10,0x21,0x00,0x02,0x10,0x80,
53252 +0x00,0x48,0x10,0x21,0x00,0xa3,0x28,0x21,0x25,0x26,0xa0,0x30,0x34,0x03,0xff,0xff,
53253 +0x34,0xe7,0x00,0x20,0xac,0xe6,0x00,0x00,0xa4,0x83,0x00,0x02,0xa4,0x43,0x00,0x00,
53254 +0xac,0xa3,0x00,0x00,0x92,0x22,0x00,0x10,0x92,0x23,0x00,0x0a,0xa6,0x32,0x00,0x0e,
53255 +0x02,0x62,0x10,0x21,0x14,0x60,0x00,0x05,0xa2,0x22,0x00,0x10,0x92,0x22,0x00,0x16,
53256 +0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xfe,0xa2,0x22,0x00,0x16,0x92,0x22,0x00,0x04,
53257 +0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x05,0x00,0x00,0x00,0x00,0x92,0x22,0x00,0x16,
53258 +0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xfd,0xa2,0x22,0x00,0x16,0x8f,0xbf,0x00,0x20,
53259 +0x7b,0xb2,0x00,0xfc,0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x28,
53260 +0x96,0x22,0x00,0x0e,0x27,0x88,0x99,0x40,0x00,0x02,0x20,0xc0,0x00,0x82,0x20,0x21,
53261 +0x00,0x04,0x20,0x80,0x00,0x88,0x20,0x21,0x94,0x82,0x00,0x04,0x3c,0x06,0xb0,0x03,
53262 +0x3c,0x09,0x80,0x01,0x00,0x02,0x28,0xc0,0x00,0xa2,0x10,0x21,0x00,0x02,0x10,0x80,
53263 +0x00,0xa3,0x28,0x21,0x00,0x48,0x10,0x21,0x34,0xc6,0x00,0x20,0x25,0x23,0xa0,0x30,
53264 +0xac,0xc3,0x00,0x00,0xa4,0x50,0x00,0x00,0xac,0xb0,0x00,0x00,0x08,0x00,0x23,0x12,
53265 +0xa4,0x90,0x00,0x02,0x08,0x00,0x23,0x09,0x32,0x50,0xff,0xff,0x3c,0x03,0xb0,0x03,
53266 +0x3c,0x02,0x80,0x01,0x24,0x42,0x8d,0x4c,0x34,0x63,0x00,0x20,0xac,0x62,0x00,0x00,
53267 +0x90,0x82,0x00,0x04,0x97,0xaa,0x00,0x12,0x00,0x80,0x60,0x21,0x30,0xa8,0xff,0xff,
53268 +0x00,0x4a,0x20,0x23,0x34,0x09,0xff,0xff,0x30,0xcf,0xff,0xff,0x30,0xee,0xff,0xff,
53269 +0x11,0x09,0x00,0x73,0xa1,0x84,0x00,0x04,0x00,0x0e,0xc0,0xc0,0x00,0x08,0x10,0xc0,
53270 +0x00,0x48,0x10,0x21,0x03,0x0e,0x20,0x21,0x27,0x8d,0x99,0x40,0x00,0x04,0x20,0x80,
53271 +0x00,0x02,0x10,0x80,0x00,0x4d,0x10,0x21,0x00,0x8d,0x20,0x21,0x94,0x86,0x00,0x02,
53272 +0x94,0x43,0x00,0x04,0x3c,0x19,0x80,0x01,0xa4,0x46,0x00,0x02,0x00,0x03,0x28,0xc0,
53273 +0x00,0xa3,0x18,0x21,0x94,0x87,0x00,0x02,0x3c,0x02,0xb0,0x08,0x00,0x03,0x18,0x80,
53274 +0x00,0xa2,0x28,0x21,0x00,0x6d,0x18,0x21,0x27,0x22,0xa0,0x30,0x3c,0x01,0xb0,0x03,
53275 +0xac,0x22,0x00,0x20,0xa4,0x66,0x00,0x00,0x10,0xe9,0x00,0x57,0xac,0xa6,0x00,0x00,
53276 +0x01,0xe0,0x30,0x21,0x11,0x40,0x00,0x1d,0x00,0x00,0x48,0x21,0x01,0x40,0x38,0x21,
53277 +0x27,0x8b,0x99,0x44,0x27,0x8a,0x99,0x50,0x00,0x06,0x40,0xc0,0x01,0x06,0x18,0x21,
53278 +0x00,0x03,0x18,0x80,0x00,0x6b,0x10,0x21,0x8c,0x44,0x00,0x18,0x00,0x6a,0x18,0x21,
53279 +0x80,0x65,0x00,0x06,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0xff,0xff,
53280 +0x00,0x45,0x10,0x21,0x30,0x44,0x00,0xff,0x00,0x02,0x12,0x02,0x01,0x22,0x18,0x21,
53281 +0x24,0x62,0x00,0x01,0x14,0x80,0x00,0x02,0x30,0x49,0x00,0xff,0x30,0x69,0x00,0xff,
53282 +0x01,0x06,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x4d,0x10,0x21,0x24,0xe7,0xff,0xff,
53283 +0x94,0x46,0x00,0x02,0x14,0xe0,0xff,0xe9,0x00,0x06,0x40,0xc0,0x91,0x82,0x00,0x10,
53284 +0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x20,0x3c,0x06,0xb0,0x03,0xa5,0x8f,0x00,0x0c,
53285 +0x03,0x0e,0x20,0x21,0x00,0x04,0x20,0x80,0x00,0x8d,0x20,0x21,0x94,0x82,0x00,0x04,
53286 +0x3c,0x03,0xb0,0x08,0x3c,0x07,0xb0,0x03,0x00,0x02,0x28,0xc0,0x00,0xa2,0x10,0x21,
53287 +0x00,0x02,0x10,0x80,0x00,0x4d,0x10,0x21,0x00,0xa3,0x28,0x21,0x27,0x26,0xa0,0x30,
53288 +0x34,0x03,0xff,0xff,0x34,0xe7,0x00,0x20,0xac,0xe6,0x00,0x00,0xa4,0x83,0x00,0x02,
53289 +0xa4,0x43,0x00,0x00,0xac,0xa3,0x00,0x00,0x91,0x82,0x00,0x10,0x91,0x83,0x00,0x04,
53290 +0xa5,0x8e,0x00,0x0e,0x01,0x22,0x10,0x21,0x14,0x60,0x00,0x05,0xa1,0x82,0x00,0x10,
53291 +0x91,0x82,0x00,0x16,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xfd,0xa1,0x82,0x00,0x16,
53292 +0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x95,0x82,0x00,0x0e,0x3c,0x03,0xb0,0x08,
53293 +0x00,0x02,0x20,0xc0,0x00,0x82,0x20,0x21,0x00,0x04,0x20,0x80,0x00,0x8d,0x20,0x21,
53294 +0x94,0x82,0x00,0x04,0x34,0xc6,0x00,0x20,0x27,0x27,0xa0,0x30,0x00,0x02,0x28,0xc0,
53295 +0x00,0xa2,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0xa3,0x28,0x21,0x00,0x4d,0x10,0x21,
53296 +0xac,0xc7,0x00,0x00,0xa4,0x8f,0x00,0x02,0xa4,0x4f,0x00,0x00,0xac,0xaf,0x00,0x00,
53297 +0x08,0x00,0x23,0xa1,0x03,0x0e,0x20,0x21,0x08,0x00,0x23,0x7c,0xa5,0x88,0x00,0x02,
53298 +0x00,0x0e,0xc0,0xc0,0x03,0x0e,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x8d,0x99,0x40,
53299 +0x00,0x4d,0x10,0x21,0x94,0x43,0x00,0x02,0x30,0x84,0x00,0xff,0x14,0x80,0x00,0x05,
53300 +0xa5,0x83,0x00,0x00,0x24,0x02,0xff,0xff,0x3c,0x19,0x80,0x01,0x08,0x00,0x23,0x7c,
53301 +0xa5,0x82,0x00,0x02,0x08,0x00,0x23,0x7c,0x3c,0x19,0x80,0x01,0x3c,0x08,0xb0,0x03,
53302 +0x3c,0x02,0x80,0x01,0x27,0xbd,0xff,0x78,0x35,0x08,0x00,0x20,0x24,0x42,0x8f,0x8c,
53303 +0xaf,0xb2,0x00,0x68,0xaf,0xb1,0x00,0x64,0xaf,0xb0,0x00,0x60,0xad,0x02,0x00,0x00,
53304 +0xaf,0xbf,0x00,0x84,0xaf,0xbe,0x00,0x80,0xaf,0xb7,0x00,0x7c,0xaf,0xb6,0x00,0x78,
53305 +0xaf,0xb5,0x00,0x74,0xaf,0xb4,0x00,0x70,0xaf,0xb3,0x00,0x6c,0xaf,0xa4,0x00,0x88,
53306 +0x90,0x83,0x00,0x0a,0x27,0x82,0xbd,0x40,0xaf,0xa6,0x00,0x90,0x00,0x03,0x18,0x80,
53307 +0x00,0x62,0x18,0x21,0x8c,0x63,0x00,0x00,0xaf,0xa7,0x00,0x94,0x27,0x86,0x99,0x44,
53308 +0xaf,0xa3,0x00,0x1c,0x94,0x63,0x00,0x14,0x30,0xb1,0xff,0xff,0x24,0x08,0x00,0x01,
53309 +0x00,0x03,0x20,0xc0,0xaf,0xa3,0x00,0x18,0x00,0x83,0x18,0x21,0xaf,0xa4,0x00,0x54,
53310 +0x00,0x03,0x18,0x80,0x27,0x84,0x99,0x50,0x00,0x64,0x20,0x21,0x80,0x82,0x00,0x06,
53311 +0x00,0x66,0x18,0x21,0x8c,0x66,0x00,0x18,0x24,0x42,0x00,0x02,0x00,0x02,0x1f,0xc2,
53312 +0x8c,0xc4,0x00,0x08,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x43,0x00,0x02,0x10,0x40,
53313 +0x00,0x04,0x2f,0xc2,0x00,0x04,0x1c,0x82,0x00,0xc2,0x38,0x21,0x00,0x04,0x24,0x42,
53314 +0x8f,0xa2,0x00,0x1c,0x30,0x63,0x00,0x01,0x30,0x84,0x00,0x01,0xaf,0xa5,0x00,0x3c,
53315 +0xaf,0xa3,0x00,0x34,0xaf,0xa4,0x00,0x38,0xaf,0xa0,0x00,0x40,0xaf,0xa0,0x00,0x44,
53316 +0xaf,0xa0,0x00,0x50,0xaf,0xa8,0x00,0x20,0x80,0x42,0x00,0x12,0x8f,0xb2,0x00,0x18,
53317 +0xaf,0xa2,0x00,0x28,0x8c,0xd0,0x00,0x0c,0x14,0xa0,0x01,0xda,0x00,0x60,0x30,0x21,
53318 +0x00,0x10,0x10,0x82,0x30,0x45,0x00,0x07,0x10,0xa0,0x00,0x11,0xaf,0xa0,0x00,0x30,
53319 +0x8f,0xa4,0x00,0x98,0x27,0x82,0x86,0x30,0x00,0x04,0x18,0x40,0x00,0x62,0x18,0x21,
53320 +0x24,0xa2,0x00,0x05,0x8f,0xa5,0x00,0x20,0x94,0x64,0x00,0x00,0x00,0x45,0x10,0x04,
53321 +0x00,0x44,0x00,0x1a,0x14,0x80,0x00,0x02,0x00,0x00,0x00,0x00,0x00,0x07,0x00,0x0d,
53322 +0x00,0x00,0x10,0x12,0x24,0x42,0x00,0x10,0x30,0x42,0xff,0xfc,0xaf,0xa2,0x00,0x30,
53323 +0x8f,0xa3,0x00,0x18,0x8f,0xa4,0x00,0x28,0x34,0x02,0xff,0xff,0xaf,0xa0,0x00,0x2c,
53324 +0xaf,0xa2,0x00,0x48,0xaf,0xa3,0x00,0x4c,0x00,0x60,0xf0,0x21,0x00,0x00,0xb8,0x21,
53325 +0x18,0x80,0x00,0x4e,0xaf,0xa0,0x00,0x24,0x00,0x11,0x89,0x02,0xaf,0xb1,0x00,0x58,
53326 +0x00,0x80,0xa8,0x21,0x00,0x12,0x10,0xc0,0x00,0x52,0x20,0x21,0x00,0x04,0x20,0x80,
53327 +0x00,0x40,0xa0,0x21,0x27,0x82,0x99,0x58,0x00,0x82,0x10,0x21,0x94,0x43,0x00,0x02,
53328 +0x8f,0xa6,0x00,0x58,0x27,0x85,0x99,0x40,0x00,0x03,0x19,0x02,0x00,0x66,0x18,0x23,
53329 +0x30,0x63,0x0f,0xff,0x00,0x85,0x20,0x21,0x28,0x62,0x00,0x20,0x94,0x96,0x00,0x02,
53330 +0x10,0x40,0x01,0xa1,0x28,0x62,0x00,0x40,0x8f,0xa8,0x00,0x90,0x00,0x00,0x00,0x00,
53331 +0x00,0x68,0x10,0x06,0x30,0x43,0x00,0x01,0x24,0x02,0x00,0x01,0x10,0x62,0x01,0x7b,
53332 +0x3c,0x02,0xb0,0x03,0x8f,0xa6,0x00,0x88,0x34,0x42,0x01,0x04,0x84,0xc5,0x00,0x0c,
53333 +0x02,0x92,0x18,0x21,0x94,0x46,0x00,0x00,0x00,0x05,0x20,0xc0,0x00,0x85,0x20,0x21,
53334 +0x00,0x03,0x18,0x80,0x27,0x82,0x99,0x50,0x27,0x85,0x99,0x48,0x00,0x65,0x28,0x21,
53335 +0x00,0x62,0x18,0x21,0x80,0x71,0x00,0x05,0x80,0x73,0x00,0x04,0x8f,0xa3,0x00,0x88,
53336 +0x30,0xd0,0xff,0xff,0x00,0x10,0x3a,0x03,0x32,0x08,0x00,0xff,0x27,0x82,0x99,0x60,
53337 +0x00,0x04,0x20,0x80,0x80,0xa6,0x00,0x06,0x00,0x82,0x20,0x21,0xa4,0x67,0x00,0x44,
53338 +0xa4,0x68,0x00,0x46,0x8c,0x84,0x00,0x00,0x38,0xc6,0x00,0x00,0x01,0x00,0x80,0x21,
53339 +0x00,0x04,0x15,0x02,0x30,0x42,0x00,0x01,0x10,0x40,0x00,0x03,0x00,0xe6,0x80,0x0a,
53340 +0x00,0x04,0x14,0x02,0x30,0x50,0x00,0x0f,0x12,0x20,0x01,0x50,0x02,0x40,0x20,0x21,
53341 +0x02,0x71,0x10,0x21,0x00,0x50,0x10,0x2a,0x14,0x40,0x00,0xed,0x02,0x92,0x10,0x21,
53342 +0x93,0x82,0x94,0x51,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x01,0x14,0x40,0x00,0xe0,
53343 +0x02,0x92,0x28,0x21,0x26,0xe2,0x00,0x01,0x30,0x57,0xff,0xff,0x02,0x40,0xf0,0x21,
53344 +0x26,0xb5,0xff,0xff,0x16,0xa0,0xff,0xb7,0x02,0xc0,0x90,0x21,0x16,0xe0,0x00,0xd0,
53345 +0x00,0x00,0x00,0x00,0x8f,0xa3,0x00,0x98,0x00,0x00,0x00,0x00,0x2c,0x62,0x00,0x10,
53346 +0x10,0x40,0x00,0x2e,0x00,0x00,0x00,0x00,0x8f,0xa4,0x00,0x24,0x00,0x00,0x00,0x00,
53347 +0x18,0x80,0x00,0x2a,0x24,0x03,0x00,0x01,0x8f,0xa5,0x00,0x1c,0x27,0x84,0x99,0x44,
53348 +0x94,0xb2,0x00,0x14,0xa0,0xa3,0x00,0x12,0x8f,0xa6,0x00,0x3c,0x00,0x12,0x10,0xc0,
53349 +0x00,0x52,0x10,0x21,0x00,0x02,0x80,0x80,0x27,0x82,0x99,0x50,0x02,0x02,0x10,0x21,
53350 +0x80,0x43,0x00,0x06,0x02,0x04,0x20,0x21,0x8c,0x85,0x00,0x18,0x24,0x63,0x00,0x02,
53351 +0x00,0x03,0x17,0xc2,0x00,0x62,0x18,0x21,0x00,0x03,0x18,0x43,0x00,0x03,0x18,0x40,
53352 +0x14,0xc0,0x00,0x0e,0x00,0xa3,0x38,0x21,0x27,0x82,0x99,0x40,0x02,0x02,0x10,0x21,
53353 +0x94,0x43,0x00,0x06,0x8f,0xa8,0x00,0x1c,0x24,0x02,0x00,0x01,0xa5,0x03,0x00,0x1a,
53354 +0x7b,0xbe,0x04,0x3c,0x7b,0xb6,0x03,0xfc,0x7b,0xb4,0x03,0xbc,0x7b,0xb2,0x03,0x7c,
53355 +0x7b,0xb0,0x03,0x3c,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x88,0x8f,0xa4,0x00,0x98,
53356 +0x8f,0xa5,0x00,0x38,0x8f,0xa6,0x00,0x34,0xaf,0xa0,0x00,0x10,0x0c,0x00,0x10,0x97,
53357 +0xaf,0xa0,0x00,0x14,0x08,0x00,0x24,0xae,0x00,0x00,0x00,0x00,0x8f,0xa3,0x00,0x44,
53358 +0x93,0x82,0x87,0x6d,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x61,0x30,0x69,0x00,0x03,
53359 +0x8f,0xa4,0x00,0x24,0x8f,0xa5,0x00,0x28,0x00,0x00,0x00,0x00,0x00,0x85,0x10,0x2a,
53360 +0x10,0x40,0x00,0x8f,0x00,0x00,0x00,0x00,0x8f,0xa6,0x00,0x1c,0x00,0x00,0x00,0x00,
53361 +0x90,0xc4,0x00,0x04,0x00,0x00,0x00,0x00,0x30,0x83,0x00,0xff,0x00,0xa3,0x10,0x2a,
53362 +0x10,0x40,0x00,0x87,0x00,0x00,0x00,0x00,0x8f,0xa8,0x00,0x24,0x00,0x00,0x00,0x00,
53363 +0x11,0x00,0x00,0x83,0x00,0x65,0x10,0x23,0x00,0xa8,0x18,0x23,0x00,0x62,0x10,0x2a,
53364 +0x14,0x40,0x00,0x7d,0x30,0x63,0x00,0xff,0x00,0x85,0x10,0x23,0x30,0x42,0x00,0xff,
53365 +0xaf,0xa2,0x00,0x50,0x8f,0xa2,0x00,0x50,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x73,
53366 +0x00,0x00,0xa8,0x21,0x27,0x8c,0x99,0x40,0x3c,0x0b,0x80,0xff,0x24,0x10,0x00,0x04,
53367 +0x27,0x91,0x99,0x44,0x35,0x6b,0xff,0xff,0x3c,0x0d,0x7f,0x00,0x27,0x8e,0x99,0x50,
53368 +0x01,0x80,0x78,0x21,0x00,0x12,0x30,0xc0,0x00,0xd2,0x10,0x21,0x00,0x02,0x10,0x80,
53369 +0x00,0x4c,0x10,0x21,0x94,0x42,0x00,0x06,0x8f,0xa3,0x00,0x2c,0x8f,0xa4,0x00,0x30,
53370 +0xaf,0xa2,0x00,0x44,0x8f,0xa5,0x00,0x44,0x30,0x49,0x00,0x03,0x02,0x09,0x10,0x23,
53371 +0x30,0x42,0x00,0x03,0x00,0xa2,0x10,0x21,0x8f,0xa8,0x00,0x30,0x24,0x42,0x00,0x04,
53372 +0x30,0x42,0xff,0xff,0x00,0x64,0x38,0x21,0x01,0x02,0x28,0x23,0x00,0x62,0x18,0x21,
53373 +0x00,0x48,0x10,0x2b,0x10,0x40,0x00,0x52,0x00,0x00,0x20,0x21,0x30,0xe7,0xff,0xff,
53374 +0x30,0xa4,0xff,0xff,0xaf,0xa7,0x00,0x2c,0x00,0xd2,0x10,0x21,0x00,0x02,0x10,0x80,
53375 +0x00,0x51,0x18,0x21,0x8c,0x65,0x00,0x18,0x00,0x04,0x25,0x80,0x00,0x8d,0x20,0x24,
53376 +0x8c,0xa8,0x00,0x04,0x00,0x4e,0x18,0x21,0x00,0x4f,0x50,0x21,0x01,0x0b,0x40,0x24,
53377 +0x01,0x04,0x40,0x25,0xac,0xa8,0x00,0x04,0x8f,0xa4,0x00,0x98,0x8f,0xa2,0x00,0x50,
53378 +0x26,0xb5,0x00,0x01,0xa0,0x64,0x00,0x00,0x8c,0xa4,0x00,0x08,0x00,0x00,0x00,0x00,
53379 +0x04,0x81,0x00,0x0c,0x02,0xa2,0x30,0x2a,0x80,0x62,0x00,0x06,0x00,0x00,0x00,0x00,
53380 +0x24,0x42,0x00,0x02,0x00,0x02,0x1f,0xc2,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x43,
53381 +0x00,0x02,0x10,0x40,0x00,0xa2,0x38,0x21,0x8f,0xa5,0x00,0x40,0x00,0x00,0x00,0x00,
53382 +0xa4,0xe5,0x00,0x00,0x95,0x52,0x00,0x02,0x14,0xc0,0xff,0xc7,0x00,0x12,0x30,0xc0,
53383 +0x8f,0xa4,0x00,0x24,0x8f,0xa5,0x00,0x50,0x8f,0xa6,0x00,0x1c,0x8f,0xa3,0x00,0x2c,
53384 +0x00,0x85,0x80,0x21,0xa0,0xd0,0x00,0x12,0x00,0x09,0x10,0x23,0x30,0x42,0x00,0x03,
53385 +0x8f,0xa8,0x00,0x88,0x00,0x62,0x10,0x23,0xa4,0xc2,0x00,0x1a,0x85,0x03,0x00,0x0c,
53386 +0x00,0x00,0x00,0x00,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,
53387 +0x27,0x83,0x99,0x44,0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x18,0x00,0x00,0x00,0x00,
53388 +0x8c,0x83,0x00,0x04,0x00,0x00,0x00,0x00,0x30,0x63,0x00,0x10,0x14,0x60,0xff,0x74,
53389 +0x02,0x00,0x10,0x21,0x8f,0xa3,0x00,0x54,0x8f,0xa4,0x00,0x18,0x8f,0xa5,0x00,0x24,
53390 +0x00,0x64,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x83,0x99,0x58,0x00,0x43,0x10,0x21,
53391 +0x90,0x44,0x00,0x00,0x10,0xa0,0x00,0x03,0x00,0x00,0x30,0x21,0x08,0x00,0x24,0xb4,
53392 +0x02,0x00,0x10,0x21,0x93,0x82,0x80,0x10,0x00,0x00,0x28,0x21,0x00,0x00,0x38,0x21,
53393 +0x0c,0x00,0x29,0x0b,0xaf,0xa2,0x00,0x10,0x08,0x00,0x24,0xb4,0x02,0x00,0x10,0x21,
53394 +0x30,0x63,0xff,0xff,0x08,0x00,0x25,0x06,0xaf,0xa3,0x00,0x2c,0x8f,0xa8,0x00,0x44,
53395 +0x08,0x00,0x25,0x28,0x31,0x09,0x00,0x03,0x08,0x00,0x24,0xe1,0xaf,0xa3,0x00,0x50,
53396 +0x8f,0xa6,0x00,0x44,0xaf,0xa0,0x00,0x50,0x08,0x00,0x25,0x28,0x30,0xc9,0x00,0x03,
53397 +0x8f,0xa5,0x00,0x48,0x8f,0xa6,0x00,0x4c,0x8f,0xa4,0x00,0x1c,0x03,0xc0,0x38,0x21,
53398 +0x0c,0x00,0x23,0x53,0xaf,0xb7,0x00,0x10,0x08,0x00,0x24,0x91,0x00,0x00,0x00,0x00,
53399 +0x00,0x05,0x28,0x80,0x27,0x82,0x99,0x40,0x00,0xa2,0x28,0x21,0x00,0x00,0x20,0x21,
53400 +0x0c,0x00,0x01,0x49,0x00,0x00,0x00,0x00,0x08,0x00,0x24,0x8a,0x26,0xe2,0x00,0x01,
53401 +0x00,0x02,0x80,0x80,0x27,0x83,0x99,0x50,0x8f,0xa4,0x00,0x1c,0x02,0x03,0x18,0x21,
53402 +0x26,0x31,0x00,0x01,0x02,0x40,0x28,0x21,0x0c,0x00,0x26,0x5b,0xa0,0x71,0x00,0x05,
53403 +0x14,0x40,0xff,0x13,0x00,0x00,0x00,0x00,0x16,0xe0,0x00,0x4d,0x03,0xc0,0x38,0x21,
53404 +0x8f,0xa4,0x00,0x24,0x8f,0xa5,0x00,0x20,0x24,0x02,0x00,0x01,0x24,0x84,0x00,0x01,
53405 +0xaf,0xb2,0x00,0x48,0xaf,0xb6,0x00,0x4c,0x02,0xc0,0xf0,0x21,0x10,0xa2,0x00,0x41,
53406 +0xaf,0xa4,0x00,0x24,0x27,0x82,0x99,0x40,0x02,0x02,0x10,0x21,0x94,0x42,0x00,0x06,
53407 +0x8f,0xa4,0x00,0x30,0xaf,0xa0,0x00,0x20,0xaf,0xa2,0x00,0x44,0x30,0x49,0x00,0x03,
53408 +0x8f,0xa8,0x00,0x44,0x00,0x09,0x10,0x23,0x30,0x42,0x00,0x03,0x01,0x02,0x10,0x21,
53409 +0x24,0x42,0x00,0x04,0x30,0x42,0xff,0xff,0x00,0x44,0x18,0x2b,0x10,0x60,0x00,0x2b,
53410 +0x00,0x00,0x00,0x00,0x8f,0xa5,0x00,0x2c,0x00,0x82,0x10,0x23,0x00,0xa4,0x18,0x21,
53411 +0x30,0x63,0xff,0xff,0x30,0x44,0xff,0xff,0xaf,0xa3,0x00,0x2c,0x02,0x92,0x28,0x21,
53412 +0x00,0x05,0x28,0x80,0x27,0x82,0x99,0x44,0x00,0xa2,0x10,0x21,0x8c,0x46,0x00,0x18,
53413 +0x3c,0x03,0x80,0xff,0x3c,0x02,0x7f,0x00,0x8c,0xc8,0x00,0x04,0x00,0x04,0x25,0x80,
53414 +0x34,0x63,0xff,0xff,0x00,0x82,0x20,0x24,0x01,0x03,0x40,0x24,0x01,0x04,0x40,0x25,
53415 +0xac,0xc8,0x00,0x04,0x8f,0xa8,0x00,0x98,0x27,0x82,0x99,0x50,0x00,0xa2,0x10,0x21,
53416 +0xa0,0x48,0x00,0x00,0x8c,0xc4,0x00,0x08,0x00,0x00,0x00,0x00,0x00,0x04,0x27,0xc2,
53417 +0x10,0x80,0xfe,0xdb,0xaf,0xa4,0x00,0x3c,0x80,0x42,0x00,0x06,0x00,0x00,0x00,0x00,
53418 +0x24,0x42,0x00,0x02,0x00,0x02,0x1f,0xc2,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x43,
53419 +0x00,0x02,0x10,0x40,0x00,0xc2,0x38,0x21,0x8f,0xa2,0x00,0x40,0x00,0x00,0x00,0x00,
53420 +0xa4,0xe2,0x00,0x00,0x08,0x00,0x24,0x8d,0x26,0xb5,0xff,0xff,0x8f,0xa6,0x00,0x2c,
53421 +0x00,0x00,0x20,0x21,0x00,0xc2,0x10,0x21,0x30,0x42,0xff,0xff,0x08,0x00,0x25,0x9b,
53422 +0xaf,0xa2,0x00,0x2c,0x8f,0xa6,0x00,0x1c,0x08,0x00,0x25,0x85,0xa4,0xd2,0x00,0x14,
53423 +0x8f,0xa5,0x00,0x48,0x8f,0xa6,0x00,0x4c,0x8f,0xa4,0x00,0x1c,0x0c,0x00,0x23,0x53,
53424 +0xaf,0xb7,0x00,0x10,0x08,0x00,0x25,0x7c,0x00,0x00,0xb8,0x21,0x0c,0x00,0x1a,0x11,
53425 +0x00,0x00,0x28,0x21,0x94,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x34,0x63,0x08,0x00,
53426 +0xa4,0x43,0x00,0x00,0x08,0x00,0x24,0x81,0x02,0x71,0x10,0x21,0x02,0x92,0x18,0x21,
53427 +0x00,0x03,0x80,0x80,0x27,0x82,0x99,0x44,0x02,0x02,0x10,0x21,0x8c,0x44,0x00,0x18,
53428 +0x00,0x00,0x00,0x00,0x8c,0x83,0x00,0x04,0x00,0x00,0x00,0x00,0x30,0x63,0x00,0x10,
53429 +0x10,0x60,0x00,0x09,0x24,0x06,0x00,0x01,0x93,0x82,0x94,0x51,0x00,0x00,0x00,0x00,
53430 +0x30,0x42,0x00,0x01,0x10,0x40,0xfe,0xa3,0x3c,0x04,0x00,0x80,0x27,0x85,0x99,0x40,
53431 +0x08,0x00,0x25,0x6c,0x02,0x05,0x28,0x21,0x27,0x83,0x99,0x58,0x27,0x82,0x99,0x50,
53432 +0x02,0x03,0x18,0x21,0x02,0x02,0x10,0x21,0x90,0x64,0x00,0x00,0x90,0x45,0x00,0x05,
53433 +0x93,0x83,0x80,0x10,0x00,0x00,0x38,0x21,0x0c,0x00,0x29,0x0b,0xaf,0xa3,0x00,0x10,
53434 +0x08,0x00,0x25,0xe2,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x04,0x00,0x00,0x00,0x00,
53435 +0x8f,0xa4,0x00,0x94,0x08,0x00,0x24,0x59,0x00,0x64,0x10,0x06,0x08,0x00,0x24,0x5a,
53436 +0x00,0x00,0x18,0x21,0x8f,0xa4,0x00,0x98,0x8f,0xa5,0x00,0x38,0xaf,0xa0,0x00,0x10,
53437 +0x0c,0x00,0x10,0x97,0xaf,0xa8,0x00,0x14,0x30,0x42,0xff,0xff,0x08,0x00,0x24,0x24,
53438 +0xaf,0xa2,0x00,0x40,0x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x01,0x27,0xbd,0xff,0xe0,
53439 +0x34,0x42,0x00,0x20,0x24,0x63,0x98,0x14,0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,
53440 +0xaf,0xbf,0x00,0x18,0xac,0x43,0x00,0x00,0x90,0x82,0x00,0x0a,0x00,0x80,0x80,0x21,
53441 +0x14,0x40,0x00,0x45,0x00,0x00,0x88,0x21,0x92,0x02,0x00,0x04,0x00,0x00,0x00,0x00,
53442 +0x14,0x40,0x00,0x3c,0x00,0x00,0x00,0x00,0x12,0x20,0x00,0x18,0x00,0x00,0x00,0x00,
53443 +0x92,0x02,0x00,0x16,0x92,0x05,0x00,0x0a,0x30,0x42,0x00,0xfc,0x10,0xa0,0x00,0x03,
53444 +0xa2,0x02,0x00,0x16,0x34,0x42,0x00,0x01,0xa2,0x02,0x00,0x16,0x92,0x04,0x00,0x04,
53445 +0x00,0x00,0x00,0x00,0x30,0x83,0x00,0xff,0x10,0x60,0x00,0x05,0x00,0x00,0x00,0x00,
53446 +0x92,0x02,0x00,0x16,0x00,0x00,0x00,0x00,0x34,0x42,0x00,0x02,0xa2,0x02,0x00,0x16,
53447 +0x10,0x60,0x00,0x0a,0x00,0x00,0x00,0x00,0x14,0xa0,0x00,0x08,0x00,0x00,0x00,0x00,
53448 +0x96,0x02,0x00,0x00,0xa2,0x00,0x00,0x17,0xa6,0x02,0x00,0x14,0x8f,0xbf,0x00,0x18,
53449 +0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x14,0x80,0x00,0x05,
53450 +0x24,0x02,0x00,0x01,0x96,0x03,0x00,0x06,0xa2,0x02,0x00,0x17,0x08,0x00,0x26,0x2f,
53451 +0xa6,0x03,0x00,0x14,0x96,0x04,0x00,0x00,0x96,0x05,0x00,0x06,0x27,0x86,0x99,0x40,
53452 +0x00,0x04,0x10,0xc0,0x00,0x05,0x18,0xc0,0x00,0x44,0x10,0x21,0x00,0x65,0x18,0x21,
53453 +0x00,0x02,0x10,0x80,0x00,0x03,0x18,0x80,0x00,0x66,0x18,0x21,0x00,0x46,0x10,0x21,
53454 +0x8c,0x65,0x00,0x08,0x8c,0x44,0x00,0x08,0x0c,0x00,0x1a,0x02,0x00,0x00,0x00,0x00,
53455 +0x30,0x43,0x00,0xff,0x10,0x60,0x00,0x04,0xa2,0x02,0x00,0x17,0x96,0x02,0x00,0x06,
53456 +0x08,0x00,0x26,0x2f,0xa6,0x02,0x00,0x14,0x96,0x02,0x00,0x00,0x08,0x00,0x26,0x2f,
53457 +0xa6,0x02,0x00,0x14,0x96,0x05,0x00,0x00,0x0c,0x00,0x26,0x5b,0x02,0x00,0x20,0x21,
53458 +0x08,0x00,0x26,0x16,0x02,0x22,0x88,0x21,0x94,0x85,0x00,0x06,0x0c,0x00,0x26,0x5b,
53459 +0x00,0x00,0x00,0x00,0x08,0x00,0x26,0x12,0x00,0x40,0x88,0x21,0x3c,0x03,0xb0,0x03,
53460 +0x3c,0x02,0x80,0x01,0x34,0x63,0x00,0x20,0x24,0x42,0x99,0x6c,0x27,0xbd,0xff,0xf0,
53461 +0xac,0x62,0x00,0x00,0x00,0x00,0x10,0x21,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x10,
53462 +0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x01,0x34,0x63,0x00,0x20,0x24,0x42,0x99,0x90,
53463 +0xac,0x62,0x00,0x00,0x90,0x89,0x00,0x0a,0x00,0x80,0x30,0x21,0x11,0x20,0x00,0x05,
53464 +0x00,0xa0,0x50,0x21,0x90,0x82,0x00,0x17,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x1b,
53465 +0x00,0x00,0x00,0x00,0x90,0xc7,0x00,0x04,0x00,0x00,0x00,0x00,0x10,0xe0,0x00,0x1b,
53466 +0x00,0x00,0x00,0x00,0x94,0xc8,0x00,0x00,0x27,0x83,0x99,0x40,0x93,0x85,0x94,0x50,
53467 +0x00,0x08,0x10,0xc0,0x00,0x48,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,
53468 +0x8c,0x44,0x00,0x08,0x00,0xe5,0x28,0x2b,0x10,0xa0,0x00,0x06,0x01,0x44,0x18,0x23,
53469 +0x8f,0x82,0x94,0x68,0x00,0x00,0x00,0x00,0x00,0x43,0x10,0x2b,0x10,0x40,0x00,0x05,
53470 +0x00,0x00,0x00,0x00,0x24,0x03,0x00,0x10,0xa4,0xc8,0x00,0x14,0x03,0xe0,0x00,0x08,
53471 +0x00,0x60,0x10,0x21,0x11,0x20,0x00,0x05,0x00,0x00,0x00,0x00,0x94,0xc2,0x00,0x06,
53472 +0x24,0x03,0x00,0x08,0x08,0x00,0x26,0x87,0xa4,0xc2,0x00,0x14,0x08,0x00,0x26,0x87,
53473 +0x00,0x00,0x18,0x21,0x27,0xbd,0xff,0xc8,0xaf,0xb5,0x00,0x2c,0xaf,0xb4,0x00,0x28,
53474 +0xaf,0xb3,0x00,0x24,0xaf,0xb0,0x00,0x18,0xaf,0xbf,0x00,0x30,0xaf,0xb2,0x00,0x20,
53475 +0xaf,0xb1,0x00,0x1c,0x94,0x91,0x00,0x06,0x00,0x80,0xa0,0x21,0x3c,0x02,0x80,0x01,
53476 +0x3c,0x04,0xb0,0x03,0x00,0x11,0xa8,0xc0,0x34,0x84,0x00,0x20,0x24,0x42,0x9a,0x44,
53477 +0x02,0xb1,0x48,0x21,0xac,0x82,0x00,0x00,0x00,0x09,0x48,0x80,0x24,0x03,0x00,0x01,
53478 +0x27,0x82,0x99,0x50,0xa2,0x83,0x00,0x12,0x01,0x22,0x10,0x21,0x27,0x84,0x99,0x44,
53479 +0x01,0x24,0x20,0x21,0x80,0x48,0x00,0x06,0x8c,0x8a,0x00,0x18,0x27,0x83,0x99,0x60,
53480 +0x01,0x23,0x48,0x21,0x8d,0x24,0x00,0x00,0x25,0x08,0x00,0x02,0x8d,0x42,0x00,0x00,
53481 +0x8d,0x49,0x00,0x04,0x00,0x08,0x17,0xc2,0x8d,0x43,0x00,0x08,0x01,0x02,0x40,0x21,
53482 +0x00,0x04,0x25,0xc2,0x00,0x08,0x40,0x43,0x30,0x84,0x00,0x01,0x00,0x03,0x1f,0xc2,
53483 +0x00,0x08,0x40,0x40,0x00,0xe0,0x80,0x21,0x00,0x64,0x18,0x24,0x00,0x09,0x49,0x42,
53484 +0x01,0x48,0x10,0x21,0x00,0xa0,0x98,0x21,0x00,0xa0,0x20,0x21,0x00,0x40,0x38,0x21,
53485 +0x02,0x00,0x28,0x21,0x14,0x60,0x00,0x19,0x31,0x29,0x00,0x01,0x94,0x42,0x00,0x00,
53486 +0x02,0xb1,0x88,0x21,0x02,0x00,0x28,0x21,0x00,0x11,0x88,0x80,0x27,0x90,0x99,0x40,
53487 +0x02,0x30,0x80,0x21,0x96,0x03,0x00,0x06,0x30,0x52,0xff,0xff,0x02,0x60,0x20,0x21,
53488 +0x00,0x60,0x30,0x21,0xa6,0x83,0x00,0x1a,0x27,0x82,0x99,0x48,0x0c,0x00,0x10,0x70,
53489 +0x02,0x22,0x88,0x21,0x00,0x52,0x10,0x21,0x96,0x03,0x00,0x06,0xa6,0x22,0x00,0x04,
53490 +0x8f,0xbf,0x00,0x30,0x7b,0xb4,0x01,0x7c,0x7b,0xb2,0x01,0x3c,0x7b,0xb0,0x00,0xfc,
53491 +0x00,0x60,0x10,0x21,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x38,0xaf,0xa9,0x00,0x10,
53492 +0x0c,0x00,0x10,0x97,0xaf,0xa0,0x00,0x14,0x08,0x00,0x26,0xc5,0x02,0xb1,0x88,0x21,
53493 +0x27,0xbd,0xff,0xc0,0xaf,0xbe,0x00,0x38,0xaf,0xb7,0x00,0x34,0xaf,0xb6,0x00,0x30,
53494 +0xaf,0xb5,0x00,0x2c,0xaf,0xb3,0x00,0x24,0xaf,0xb1,0x00,0x1c,0xaf,0xbf,0x00,0x3c,
53495 +0xaf,0xb4,0x00,0x28,0xaf,0xb2,0x00,0x20,0xaf,0xb0,0x00,0x18,0x94,0x90,0x00,0x00,
53496 +0x3c,0x08,0xb0,0x03,0x35,0x08,0x00,0x20,0x00,0x10,0x10,0xc0,0x00,0x50,0x18,0x21,
53497 +0x00,0x40,0x88,0x21,0x3c,0x02,0x80,0x01,0x00,0x03,0x48,0x80,0x24,0x42,0x9b,0x80,
53498 +0x00,0x80,0x98,0x21,0x27,0x84,0x99,0x50,0x01,0x24,0x20,0x21,0x93,0xb7,0x00,0x53,
53499 +0xad,0x02,0x00,0x00,0x80,0x83,0x00,0x06,0x27,0x82,0x99,0x44,0x01,0x22,0x10,0x21,
53500 +0x8c,0x44,0x00,0x18,0x24,0x63,0x00,0x02,0x00,0x03,0x17,0xc2,0x8c,0x88,0x00,0x08,
53501 +0x00,0x62,0x18,0x21,0x00,0x03,0x18,0x43,0x00,0x03,0x18,0x40,0xaf,0xa7,0x00,0x4c,
53502 +0x2c,0xa2,0x00,0x10,0x00,0xa0,0xa8,0x21,0x00,0x83,0x50,0x21,0x00,0x08,0x47,0xc2,
53503 +0x00,0xc0,0x58,0x21,0x00,0x00,0xb0,0x21,0x8c,0x92,0x00,0x0c,0x14,0x40,0x00,0x13,
53504 +0x00,0x00,0xf0,0x21,0x92,0x67,0x00,0x04,0x24,0x14,0x00,0x01,0x12,0x87,0x00,0x10,
53505 +0x02,0x30,0x10,0x21,0x27,0x83,0x99,0x58,0x01,0x23,0x18,0x21,0x80,0x64,0x00,0x00,
53506 +0x27,0x83,0xbe,0xb0,0x00,0x04,0x11,0x00,0x00,0x44,0x10,0x23,0x00,0x02,0x10,0x80,
53507 +0x00,0x44,0x10,0x23,0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x90,0x44,0x00,0x04,
53508 +0x00,0x00,0x00,0x00,0x10,0x80,0x00,0x23,0x00,0x00,0x00,0x00,0x02,0x30,0x10,0x21,
53509 +0x00,0x02,0x80,0x80,0x24,0x04,0x00,0x01,0x27,0x83,0x99,0x60,0xa2,0x64,0x00,0x12,
53510 +0x02,0x03,0x18,0x21,0x8c,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x15,0xc2,
53511 +0x30,0x42,0x00,0x01,0x01,0x02,0x10,0x24,0x14,0x40,0x00,0x0e,0x02,0xa0,0x20,0x21,
53512 +0x27,0x82,0x99,0x40,0x02,0x02,0x10,0x21,0x94,0x43,0x00,0x06,0x00,0x00,0x00,0x00,
53513 +0xa6,0x63,0x00,0x1a,0x94,0x42,0x00,0x06,0x7b,0xbe,0x01,0xfc,0x7b,0xb6,0x01,0xbc,
53514 +0x7b,0xb4,0x01,0x7c,0x7b,0xb2,0x01,0x3c,0x7b,0xb0,0x00,0xfc,0x03,0xe0,0x00,0x08,
53515 +0x27,0xbd,0x00,0x40,0x8f,0xa5,0x00,0x4c,0x01,0x60,0x30,0x21,0x01,0x40,0x38,0x21,
53516 +0xaf,0xa0,0x00,0x10,0x0c,0x00,0x10,0x97,0xaf,0xa0,0x00,0x14,0x08,0x00,0x27,0x2c,
53517 +0x00,0x00,0x00,0x00,0x27,0x83,0x99,0x60,0x01,0x23,0x18,0x21,0x8c,0x62,0x00,0x00,
53518 +0x00,0x00,0x00,0x00,0x00,0x02,0x15,0xc2,0x30,0x42,0x00,0x01,0x01,0x02,0x10,0x24,
53519 +0x14,0x40,0x00,0xaf,0x00,0xa0,0x20,0x21,0x32,0x4f,0x00,0x03,0x00,0x12,0x10,0x82,
53520 +0x25,0xe3,0x00,0x0d,0x30,0x45,0x00,0x07,0x00,0x74,0x78,0x04,0x10,0xa0,0x00,0x0e,
53521 +0x00,0x00,0x90,0x21,0x27,0x82,0x86,0x30,0x00,0x15,0x18,0x40,0x00,0x62,0x18,0x21,
53522 +0x94,0x64,0x00,0x00,0x24,0xa2,0x00,0x05,0x00,0x54,0x10,0x04,0x00,0x44,0x00,0x1a,
53523 +0x14,0x80,0x00,0x02,0x00,0x00,0x00,0x00,0x00,0x07,0x00,0x0d,0x00,0x00,0x10,0x12,
53524 +0x24,0x42,0x00,0x10,0x30,0x52,0xff,0xfc,0x02,0x30,0x10,0x21,0x27,0x83,0x99,0x50,
53525 +0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x90,0x44,0x00,0x03,0x00,0x00,0x00,0x00,
53526 +0x30,0x83,0x00,0xff,0x2c,0x62,0x00,0x0c,0x14,0x40,0x00,0x04,0x2c,0x62,0x00,0x19,
53527 +0x30,0x82,0x00,0x0f,0x24,0x43,0x00,0x0c,0x2c,0x62,0x00,0x19,0x10,0x40,0x00,0x19,
53528 +0x24,0x0e,0x00,0x20,0x24,0x62,0xff,0xe9,0x2c,0x42,0x00,0x02,0x14,0x40,0x00,0x15,
53529 +0x24,0x0e,0x00,0x10,0x24,0x62,0xff,0xeb,0x2c,0x42,0x00,0x02,0x14,0x40,0x00,0x11,
53530 +0x24,0x0e,0x00,0x08,0x24,0x02,0x00,0x14,0x10,0x62,0x00,0x0e,0x24,0x0e,0x00,0x02,
53531 +0x24,0x62,0xff,0xef,0x2c,0x42,0x00,0x03,0x14,0x40,0x00,0x0a,0x24,0x0e,0x00,0x10,
53532 +0x24,0x62,0xff,0xf1,0x2c,0x42,0x00,0x02,0x14,0x40,0x00,0x06,0x24,0x0e,0x00,0x08,
53533 +0x24,0x62,0xff,0xf3,0x2c,0x42,0x00,0x02,0x24,0x0e,0x00,0x04,0x24,0x03,0x00,0x02,
53534 +0x00,0x62,0x70,0x0a,0x30,0xe2,0x00,0xff,0x00,0x00,0x48,0x21,0x00,0x00,0x68,0x21,
53535 +0x10,0x40,0x00,0x6d,0x00,0x00,0x58,0x21,0x3c,0x14,0x80,0xff,0x27,0x99,0x99,0x40,
53536 +0x01,0xf2,0xc0,0x23,0x36,0x94,0xff,0xff,0x01,0xc9,0x10,0x2a,0x14,0x40,0x00,0x64,
53537 +0x24,0x03,0x00,0x04,0x00,0x10,0x28,0xc0,0x00,0xb0,0x10,0x21,0x00,0x02,0x10,0x80,
53538 +0x00,0x59,0x10,0x21,0x94,0x56,0x00,0x06,0x00,0x00,0x00,0x00,0x32,0xcc,0x00,0x03,
53539 +0x00,0x6c,0x10,0x23,0x30,0x42,0x00,0x03,0x02,0xc2,0x10,0x21,0x24,0x42,0x00,0x04,
53540 +0x30,0x51,0xff,0xff,0x02,0x32,0x18,0x2b,0x10,0x60,0x00,0x4d,0x01,0xf1,0x10,0x23,
53541 +0x02,0x51,0x10,0x23,0x01,0x78,0x18,0x2b,0x10,0x60,0x00,0x34,0x30,0x44,0xff,0xff,
53542 +0x29,0x22,0x00,0x40,0x10,0x40,0x00,0x31,0x01,0x72,0x18,0x21,0x25,0x22,0x00,0x01,
53543 +0x00,0x02,0x16,0x00,0x00,0x02,0x4e,0x03,0x00,0xb0,0x10,0x21,0x00,0x02,0x30,0x80,
53544 +0x27,0x82,0x99,0x44,0x30,0x6b,0xff,0xff,0x00,0xc2,0x18,0x21,0x8c,0x67,0x00,0x18,
53545 +0x00,0x04,0x25,0x80,0x3c,0x03,0x7f,0x00,0x8c,0xe2,0x00,0x04,0x00,0x83,0x20,0x24,
53546 +0x27,0x83,0x99,0x50,0x00,0x54,0x10,0x24,0x00,0xc3,0x28,0x21,0x00,0x44,0x10,0x25,
53547 +0xac,0xe2,0x00,0x04,0x16,0xe0,0x00,0x02,0xa0,0xb5,0x00,0x00,0xa0,0xb5,0x00,0x03,
53548 +0x27,0x84,0x99,0x60,0x00,0xc4,0x18,0x21,0x8c,0x62,0x00,0x00,0x8c,0xe8,0x00,0x08,
53549 +0x00,0x02,0x15,0xc2,0x00,0x08,0x47,0xc2,0x30,0x42,0x00,0x01,0x01,0x02,0x10,0x24,
53550 +0x10,0x40,0x00,0x0a,0x00,0x00,0x00,0x00,0x80,0xa2,0x00,0x06,0x00,0x00,0x00,0x00,
53551 +0x24,0x42,0x00,0x02,0x00,0x02,0x1f,0xc2,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x43,
53552 +0x00,0x02,0x10,0x40,0x00,0xe2,0x50,0x21,0xa5,0x5e,0x00,0x00,0x92,0x62,0x00,0x04,
53553 +0x25,0xad,0x00,0x01,0x27,0x84,0x99,0x40,0x00,0xc4,0x18,0x21,0x01,0xa2,0x10,0x2a,
53554 +0x94,0x70,0x00,0x02,0x14,0x40,0xff,0xb8,0x00,0x00,0x00,0x00,0x96,0x63,0x00,0x14,
53555 +0x00,0x0c,0x10,0x23,0xa2,0x69,0x00,0x12,0x30,0x42,0x00,0x03,0x01,0x62,0x10,0x23,
53556 +0x00,0x03,0x80,0xc0,0x8f,0xa5,0x00,0x4c,0x30,0x4b,0xff,0xff,0x02,0x03,0x80,0x21,
53557 +0x27,0x82,0x99,0x48,0x00,0x10,0x80,0x80,0xa6,0x6b,0x00,0x1a,0x02,0xa0,0x20,0x21,
53558 +0x01,0x60,0x30,0x21,0x01,0x60,0x88,0x21,0x0c,0x00,0x10,0x70,0x02,0x02,0x80,0x21,
53559 +0x00,0x5e,0x10,0x21,0xa6,0x02,0x00,0x04,0x08,0x00,0x27,0x32,0x02,0x20,0x10,0x21,
53560 +0x01,0x62,0x10,0x2b,0x10,0x40,0xff,0xe9,0x00,0x00,0x20,0x21,0x29,0x22,0x00,0x40,
53561 +0x10,0x40,0xff,0xe6,0x01,0x71,0x18,0x21,0x08,0x00,0x27,0xa8,0x25,0x22,0x00,0x01,
53562 +0x08,0x00,0x27,0xd7,0x32,0xcc,0x00,0x03,0x08,0x00,0x27,0xd7,0x00,0x00,0x60,0x21,
53563 +0x8f,0xa5,0x00,0x4c,0x01,0x40,0x38,0x21,0xaf,0xa0,0x00,0x10,0x0c,0x00,0x10,0x97,
53564 +0xaf,0xb4,0x00,0x14,0x92,0x67,0x00,0x04,0x08,0x00,0x27,0x4a,0x30,0x5e,0xff,0xff,
53565 +0x30,0x84,0xff,0xff,0x00,0x04,0x30,0xc0,0x00,0xc4,0x20,0x21,0x00,0x04,0x20,0x80,
53566 +0x27,0x82,0x99,0x40,0x3c,0x03,0xb0,0x08,0x30,0xa5,0xff,0xff,0x00,0x82,0x20,0x21,
53567 +0x00,0xc3,0x30,0x21,0xac,0xc5,0x00,0x00,0x03,0xe0,0x00,0x08,0xa4,0x85,0x00,0x00,
53568 +0x30,0x84,0xff,0xff,0x00,0x04,0x30,0xc0,0x00,0xc4,0x30,0x21,0x27,0x88,0x99,0x40,
53569 +0x00,0x06,0x30,0x80,0x00,0xc8,0x30,0x21,0x94,0xc3,0x00,0x04,0x3c,0x02,0xb0,0x08,
53570 +0x3c,0x07,0xb0,0x03,0x00,0x03,0x20,0xc0,0x00,0x83,0x18,0x21,0x00,0x03,0x18,0x80,
53571 +0x00,0x82,0x20,0x21,0x3c,0x02,0x80,0x01,0x30,0xa5,0xff,0xff,0x00,0x68,0x18,0x21,
53572 +0x34,0xe7,0x00,0x20,0x24,0x42,0xa0,0x30,0xac,0xe2,0x00,0x00,0xa4,0xc5,0x00,0x02,
53573 +0xa4,0x65,0x00,0x00,0x03,0xe0,0x00,0x08,0xac,0x85,0x00,0x00,0x30,0x84,0xff,0xff,
53574 +0x00,0x04,0x10,0xc0,0x00,0x44,0x10,0x21,0x27,0x89,0x99,0x40,0x00,0x02,0x10,0x80,
53575 +0x00,0x49,0x10,0x21,0x97,0x83,0x99,0x30,0x94,0x4a,0x00,0x04,0x3c,0x02,0xb0,0x08,
53576 +0x00,0x03,0x38,0xc0,0x00,0x0a,0x40,0xc0,0x00,0xe3,0x18,0x21,0x01,0x0a,0x28,0x21,
53577 +0x00,0xe2,0x38,0x21,0x01,0x02,0x40,0x21,0x00,0x03,0x18,0x80,0x00,0x05,0x28,0x80,
53578 +0x3c,0x06,0xb0,0x03,0x3c,0x02,0x80,0x01,0x00,0xa9,0x28,0x21,0x00,0x69,0x18,0x21,
53579 +0x34,0xc6,0x00,0x20,0x34,0x09,0xff,0xff,0x24,0x42,0xa0,0x8c,0xac,0xc2,0x00,0x00,
53580 +0xa4,0x64,0x00,0x00,0xac,0xe4,0x00,0x00,0xa4,0xa9,0x00,0x00,0xad,0x09,0x00,0x00,
53581 +0xa7,0x8a,0x99,0x30,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,
53582 +0x3c,0x02,0x80,0x01,0x34,0x63,0x00,0x20,0x24,0x42,0xa1,0x0c,0x3c,0x04,0xb0,0x03,
53583 +0xac,0x62,0x00,0x00,0x34,0x84,0x01,0x10,0x8c,0x82,0x00,0x00,0x97,0x83,0x87,0x74,
53584 +0x30,0x42,0xff,0xff,0x10,0x62,0x00,0x16,0x24,0x0a,0x00,0x01,0xa7,0x82,0x87,0x74,
53585 +0xaf,0x80,0xbd,0x90,0x00,0x40,0x28,0x21,0x24,0x06,0x00,0x01,0x27,0x84,0xbd,0x94,
53586 +0x25,0x43,0xff,0xff,0x00,0x66,0x10,0x04,0x00,0xa2,0x10,0x24,0x14,0x40,0x00,0x07,
53587 +0x00,0x00,0x00,0x00,0x8c,0x83,0xff,0xfc,0x00,0x00,0x00,0x00,0x00,0x66,0x10,0x04,
53588 +0x00,0xa2,0x10,0x24,0x38,0x42,0x00,0x00,0x01,0x42,0x18,0x0a,0x25,0x4a,0x00,0x01,
53589 +0x2d,0x42,0x00,0x14,0xac,0x83,0x00,0x00,0x14,0x40,0xff,0xf1,0x24,0x84,0x00,0x04,
53590 +0x3c,0x0b,0xb0,0x03,0x00,0x00,0x50,0x21,0x3c,0x0c,0x80,0x00,0x27,0x89,0xbd,0xe0,
53591 +0x35,0x6b,0x01,0x20,0x8d,0x68,0x00,0x00,0x8d,0x23,0x00,0x04,0x01,0x0c,0x10,0x24,
53592 +0x00,0x02,0x17,0xc2,0x11,0x03,0x00,0x37,0xa1,0x22,0x00,0xdc,0xa1,0x20,0x00,0xd5,
53593 +0xa1,0x20,0x00,0xd6,0x01,0x20,0x30,0x21,0x00,0x00,0x38,0x21,0x00,0x00,0x28,0x21,
53594 +0x01,0x20,0x20,0x21,0x00,0xa8,0x10,0x06,0x30,0x42,0x00,0x01,0x10,0xe0,0x00,0x10,
53595 +0xa0,0x82,0x00,0x0a,0x90,0x82,0x00,0x07,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x31,
53596 +0x24,0xa2,0xff,0xff,0xa0,0x82,0x00,0x08,0x90,0x82,0x00,0x0a,0x00,0x00,0x00,0x00,
53597 +0x10,0x40,0x00,0x09,0x00,0x00,0x00,0x00,0x90,0x83,0x00,0x08,0x00,0x00,0x00,0x00,
53598 +0x00,0x03,0x10,0x40,0x00,0x43,0x10,0x21,0x00,0x46,0x10,0x21,0xa0,0x45,0x00,0x09,
53599 +0x90,0x82,0x00,0x0a,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x07,0x00,0x00,0x00,0x00,
53600 +0x14,0xe0,0x00,0x04,0x00,0x00,0x00,0x00,0xa0,0xc5,0x00,0xd5,0x24,0x07,0x00,0x01,
53601 +0xa0,0x85,0x00,0x08,0xa0,0xc5,0x00,0xd6,0x24,0xa5,0x00,0x01,0x2c,0xa2,0x00,0x1c,
53602 +0x14,0x40,0xff,0xe0,0x24,0x84,0x00,0x03,0x90,0xc4,0x00,0xd5,0x00,0x00,0x28,0x21,
53603 +0x00,0xa4,0x10,0x2b,0x10,0x40,0x00,0x0b,0x00,0x00,0x00,0x00,0x00,0xc0,0x18,0x21,
53604 +0xa0,0x64,0x00,0x08,0x90,0xc2,0x00,0xd5,0x24,0xa5,0x00,0x01,0xa0,0x62,0x00,0x09,
53605 +0x90,0xc4,0x00,0xd5,0x00,0x00,0x00,0x00,0x00,0xa4,0x10,0x2b,0x14,0x40,0xff,0xf8,
53606 +0x24,0x63,0x00,0x03,0x25,0x4a,0x00,0x01,0x2d,0x42,0x00,0x08,0xad,0x28,0x00,0x04,
53607 +0x25,0x6b,0x00,0x04,0x14,0x40,0xff,0xbf,0x25,0x29,0x00,0xec,0x03,0xe0,0x00,0x08,
53608 +0x00,0x00,0x00,0x00,0x90,0x82,0x00,0x05,0x08,0x00,0x28,0x7e,0xa0,0x82,0x00,0x08,
53609 +0x97,0x85,0x94,0x5a,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x01,0x27,0xbd,0xff,0xe8,
53610 +0x34,0x63,0x00,0x20,0x24,0x42,0xa2,0xc0,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x14,
53611 +0xac,0x62,0x00,0x00,0x30,0x90,0x00,0xff,0x00,0x05,0x28,0x42,0x00,0x00,0x48,0x21,
53612 +0x27,0x8f,0xbd,0xe4,0x00,0x00,0x50,0x21,0x00,0x00,0x58,0x21,0x27,0x98,0xbe,0xc4,
53613 +0x27,0x99,0xbe,0xc0,0x27,0x8e,0xbe,0xbe,0x27,0x8c,0xbd,0xe8,0x27,0x8d,0xbe,0x40,
53614 +0x27,0x88,0xbe,0xb8,0x00,0x0a,0x18,0x80,0x01,0x6f,0x10,0x21,0xac,0x40,0x00,0x00,
53615 +0xac,0x45,0x00,0x58,0x00,0x6e,0x20,0x21,0x00,0x78,0x10,0x21,0xa1,0x00,0xff,0xfc,
53616 +0xad,0x00,0x00,0x00,0xa1,0x00,0x00,0x04,0xa1,0x00,0x00,0x05,0xad,0x00,0xff,0xf8,
53617 +0x00,0x79,0x18,0x21,0x24,0x06,0x00,0x01,0x24,0xc6,0xff,0xff,0xa0,0x80,0x00,0x00,
53618 +0xa4,0x60,0x00,0x00,0xac,0x40,0x00,0x00,0x24,0x63,0x00,0x02,0x24,0x42,0x00,0x04,
53619 +0x04,0xc1,0xff,0xf9,0x24,0x84,0x00,0x01,0x00,0x0a,0x10,0x80,0x00,0x4d,0x20,0x21,
53620 +0x00,0x00,0x30,0x21,0x00,0x4c,0x18,0x21,0x27,0x87,0x87,0x78,0x8c,0xe2,0x00,0x00,
53621 +0x24,0xe7,0x00,0x04,0xac,0x82,0x00,0x00,0xa0,0x66,0x00,0x00,0xa0,0x66,0x00,0x01,
53622 +0x24,0xc6,0x00,0x01,0x28,0xc2,0x00,0x1c,0xa0,0x60,0x00,0x02,0x24,0x84,0x00,0x04,
53623 +0x14,0x40,0xff,0xf6,0x24,0x63,0x00,0x03,0x25,0x29,0x00,0x01,0x29,0x22,0x00,0x08,
53624 +0x25,0x4a,0x00,0x3b,0x25,0x08,0x00,0xec,0x14,0x40,0xff,0xd6,0x25,0x6b,0x00,0xec,
53625 +0xa7,0x80,0x87,0x74,0x00,0x00,0x48,0x21,0x27,0x83,0xbd,0x90,0xac,0x69,0x00,0x00,
53626 +0x25,0x29,0x00,0x01,0x29,0x22,0x00,0x0c,0x14,0x40,0xff,0xfc,0x24,0x63,0x00,0x04,
53627 +0x0c,0x00,0x28,0x43,0x00,0x00,0x00,0x00,0x2e,0x04,0x00,0x14,0x27,0x83,0xbd,0xe0,
53628 +0x24,0x09,0x00,0x07,0x10,0x80,0x00,0x0a,0x00,0x00,0x00,0x00,0x90,0x62,0x00,0xd5,
53629 +0x25,0x29,0xff,0xff,0xa0,0x62,0x00,0x00,0x05,0x21,0xff,0xfa,0x24,0x63,0x00,0xec,
53630 +0x8f,0xbf,0x00,0x14,0x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,
53631 +0x90,0x62,0x00,0xd6,0x08,0x00,0x29,0x01,0x25,0x29,0xff,0xff,0x30,0x84,0x00,0xff,
53632 +0x00,0x04,0x11,0x00,0x00,0x44,0x10,0x23,0x00,0x02,0x10,0x80,0x00,0x44,0x10,0x23,
53633 +0x00,0x02,0x10,0x80,0x27,0x83,0xbd,0xe0,0x00,0x43,0x60,0x21,0x3c,0x04,0xb0,0x03,
53634 +0x3c,0x02,0x80,0x01,0x34,0x84,0x00,0x20,0x24,0x42,0xa4,0x2c,0x30,0xc6,0x00,0xff,
53635 +0x93,0xaa,0x00,0x13,0x30,0xa5,0x00,0xff,0x30,0xe7,0x00,0xff,0xac,0x82,0x00,0x00,
53636 +0x10,0xc0,0x00,0xb8,0x25,0x8f,0x00,0xd0,0x91,0x82,0x00,0x00,0x00,0x00,0x00,0x00,
53637 +0x24,0x42,0xff,0xfc,0x2c,0x43,0x00,0x18,0x10,0x60,0x00,0x9b,0x3c,0x03,0x80,0x01,
53638 +0x00,0x02,0x10,0x80,0x24,0x63,0x09,0x3c,0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x00,
53639 +0x00,0x00,0x00,0x00,0x00,0x80,0x00,0x08,0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x2c,
53640 +0x14,0x40,0x00,0x1c,0x00,0x00,0x00,0x00,0x10,0xa0,0x00,0x17,0x00,0x00,0x00,0x00,
53641 +0x24,0x02,0x00,0x01,0x10,0xa2,0x00,0x11,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,
53642 +0x10,0xa2,0x00,0x0c,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x03,0x10,0xa2,0x00,0x06,
53643 +0x00,0x00,0x00,0x00,0x8d,0x82,0x00,0xd0,0x00,0x00,0x00,0x00,0x24,0x42,0xff,0xe0,
53644 +0x03,0xe0,0x00,0x08,0xad,0x82,0x00,0xd0,0x8d,0x82,0x00,0xd0,0x08,0x00,0x29,0x3c,
53645 +0x24,0x42,0xff,0xe8,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x8d,0x82,0x00,0xd0,
53646 +0x08,0x00,0x29,0x3c,0x24,0x42,0x00,0x01,0x8d,0x82,0x00,0xd0,0x08,0x00,0x29,0x3c,
53647 +0x24,0x42,0x00,0x02,0x10,0xa0,0xff,0xf9,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
53648 +0x10,0xa2,0xff,0xec,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0xe9,
53649 +0x00,0x00,0x00,0x00,0x8d,0x82,0x00,0xd0,0x08,0x00,0x29,0x3c,0x24,0x42,0xff,0xd0,
53650 +0x10,0xa0,0xff,0xf1,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0xeb,
53651 +0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0xe6,0x24,0x02,0x00,0x03,
53652 +0x14,0xa2,0xff,0xe1,0x00,0x00,0x00,0x00,0x8d,0x82,0x00,0xd0,0x08,0x00,0x29,0x3c,
53653 +0x24,0x42,0xff,0xf8,0x2d,0x42,0x00,0x24,0x14,0x40,0x00,0x0e,0x00,0x00,0x00,0x00,
53654 +0x10,0xa0,0xff,0xe1,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0xdb,
53655 +0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0xd6,0x24,0x02,0x00,0x03,
53656 +0x10,0xa2,0xff,0xf1,0x00,0x00,0x00,0x00,0x8d,0x82,0x00,0xd0,0x08,0x00,0x29,0x3c,
53657 +0x24,0x42,0xff,0xf0,0x10,0xa0,0xff,0xd1,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
53658 +0x10,0xa2,0xff,0xcc,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0xf7,0x00,0x00,0x00,0x00,
53659 +0x24,0x02,0x00,0x03,0x14,0xa2,0xff,0xd7,0x00,0x00,0x00,0x00,0x08,0x00,0x29,0x39,
53660 +0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x24,0x10,0x40,0xff,0xe5,0x00,0x00,0x00,0x00,
53661 +0x10,0xa0,0xff,0xc2,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x14,0xa2,0xff,0xca,
53662 +0x00,0x00,0x00,0x00,0x08,0x00,0x29,0x5e,0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x29,
53663 +0x10,0x40,0xff,0xdb,0x00,0x00,0x00,0x00,0x08,0x00,0x29,0x49,0x00,0x00,0x00,0x00,
53664 +0x2d,0x42,0x00,0x24,0x14,0x40,0x00,0x0e,0x00,0x00,0x00,0x00,0x10,0xa0,0xff,0xb6,
53665 +0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0xb0,0x00,0x00,0x00,0x00,
53666 +0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0xab,0x24,0x02,0x00,0x03,0x14,0xa2,0xff,0xc6,
53667 +0x00,0x00,0x00,0x00,0x8d,0x82,0x00,0xd0,0x08,0x00,0x29,0x3c,0x24,0x42,0xff,0xfa,
53668 +0x10,0xa0,0xff,0xa9,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0xa1,
53669 +0x24,0x02,0x00,0x02,0x14,0xa2,0xff,0x94,0x00,0x00,0x00,0x00,0x08,0x00,0x29,0x5e,
53670 +0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x24,0x10,0x40,0xff,0xe8,0x00,0x00,0x00,0x00,
53671 +0x10,0xa0,0xff,0x9a,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0x95,
53672 +0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0x90,0x00,0x00,0x00,0x00,0x08,0x00,0x29,0x51,
53673 +0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x2c,0x14,0x40,0xff,0xcd,0x00,0x00,0x00,0x00,
53674 +0x10,0xa0,0xff,0x91,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0x8b,
53675 +0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0x86,0x00,0x00,0x00,0x00,
53676 +0x08,0x00,0x29,0x5e,0x00,0x00,0x00,0x00,0x10,0xa0,0xff,0x87,0x00,0x00,0x00,0x00,
53677 +0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0x81,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,
53678 +0x10,0xa2,0xff,0x7c,0x24,0x02,0x00,0x03,0x14,0xa2,0xff,0x97,0x00,0x00,0x00,0x00,
53679 +0x8d,0x82,0x00,0xd0,0x08,0x00,0x29,0x3c,0x24,0x42,0xff,0xfc,0x2d,0x42,0x00,0x24,
53680 +0x14,0x40,0xff,0xa4,0x00,0x00,0x00,0x00,0x08,0x00,0x29,0x54,0x00,0x00,0x00,0x00,
53681 +0x2d,0x42,0x00,0x24,0x14,0x40,0xff,0x9f,0x00,0x00,0x00,0x00,0x08,0x00,0x29,0x2e,
53682 +0x00,0x00,0x00,0x00,0x91,0x86,0x00,0x00,0x91,0x83,0x00,0xd4,0x25,0x8d,0x00,0x5c,
53683 +0x30,0xc4,0x00,0xff,0x00,0x04,0x10,0x40,0x00,0x44,0x10,0x21,0x00,0x04,0x48,0x80,
53684 +0x01,0x82,0x58,0x21,0x01,0x89,0x40,0x21,0x25,0x78,0x00,0x08,0x10,0x60,0x00,0x36,
53685 +0x25,0x0e,0x00,0x60,0x10,0xa0,0x00,0x25,0x00,0x00,0x00,0x00,0x91,0x82,0x00,0xdd,
53686 +0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x1e,0x00,0x00,0x00,0x00,0x27,0x87,0x87,0x78,
53687 +0x01,0x27,0x10,0x21,0x8c,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0xad,0x03,0x00,0x60,
53688 +0x91,0x62,0x00,0x08,0x00,0x00,0x00,0x00,0x00,0x40,0x30,0x21,0xa1,0x82,0x00,0x00,
53689 +0x30,0xc2,0x00,0xff,0x00,0x02,0x10,0x80,0x00,0x47,0x10,0x21,0x8c,0x43,0x00,0x00,
53690 +0x00,0x00,0x00,0x00,0x00,0x03,0x18,0x42,0xad,0xa3,0x00,0x00,0x91,0x84,0x00,0x00,
53691 +0x8d,0xc5,0x00,0x00,0x00,0x04,0x20,0x80,0x00,0x87,0x10,0x21,0x8c,0x43,0x00,0x00,
53692 +0x00,0x05,0x28,0x40,0x00,0x8c,0x20,0x21,0x00,0x03,0x1a,0x80,0x00,0xa3,0x10,0x2b,
53693 +0x00,0x62,0x28,0x0a,0xac,0x85,0x00,0x60,0x03,0xe0,0x00,0x08,0xa1,0x80,0x00,0xd4,
53694 +0x27,0x87,0x87,0x78,0x08,0x00,0x29,0xf0,0xa1,0x80,0x00,0xdd,0x27,0x82,0x87,0xe8,
53695 +0x8d,0x83,0x00,0xd8,0x00,0x82,0x10,0x21,0x90,0x44,0x00,0x00,0x24,0x63,0x00,0x01,
53696 +0x00,0x64,0x20,0x2b,0x14,0x80,0xff,0x33,0xad,0x83,0x00,0xd8,0x8d,0x02,0x00,0x60,
53697 +0xa1,0x80,0x00,0xd4,0x00,0x02,0x1f,0xc2,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x43,
53698 +0x03,0xe0,0x00,0x08,0xad,0x82,0x00,0x5c,0x10,0xe0,0x00,0x1d,0x24,0x83,0xff,0xfc,
53699 +0x2c,0x62,0x00,0x18,0x10,0x40,0x00,0xe4,0x00,0x03,0x10,0x80,0x3c,0x03,0x80,0x01,
53700 +0x24,0x63,0x09,0x9c,0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x00,0x00,0x00,0x00,0x00,
53701 +0x00,0x80,0x00,0x08,0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x2c,0x14,0x40,0x00,0x65,
53702 +0x00,0x00,0x00,0x00,0x10,0xa0,0x00,0x60,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
53703 +0x10,0xa2,0x00,0x5a,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0x00,0x08,
53704 +0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x03,0x10,0xa2,0x00,0x51,0x00,0x00,0x00,0x00,
53705 +0x8d,0x82,0x00,0xd0,0x00,0x00,0x00,0x00,0x24,0x42,0xff,0xe0,0xad,0x82,0x00,0xd0,
53706 +0x8d,0xe3,0x00,0x00,0x8d,0xa2,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x43,0x10,0x21,
53707 +0xad,0xa2,0x00,0x00,0xad,0xe0,0x00,0x00,0x8d,0xa3,0x00,0x00,0x8d,0xc4,0x00,0x00,
53708 +0x00,0x00,0x00,0x00,0x00,0x83,0x10,0x2a,0x10,0x40,0x00,0x22,0x00,0x00,0x00,0x00,
53709 +0x93,0x05,0x00,0x01,0x91,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x45,0x00,0x05,
53710 +0x24,0x02,0x00,0x01,0xa1,0x85,0x00,0x00,0xa1,0x82,0x00,0xd4,0x03,0xe0,0x00,0x08,
53711 +0xad,0x80,0x00,0xd8,0x91,0x82,0x00,0xdd,0x24,0x03,0x00,0x01,0x10,0x43,0x00,0x05,
53712 +0x00,0x00,0x00,0x00,0xa1,0x83,0x00,0xd4,0xad,0x80,0x00,0xd8,0x03,0xe0,0x00,0x08,
53713 +0xa1,0x83,0x00,0xdd,0x00,0x04,0x17,0xc2,0x00,0x82,0x10,0x21,0x00,0x02,0x10,0x43,
53714 +0xad,0xa2,0x00,0x00,0x91,0x83,0x00,0x00,0x27,0x82,0x87,0x78,0x8d,0xc5,0x00,0x00,
53715 +0x00,0x03,0x18,0x80,0x00,0x62,0x18,0x21,0x8c,0x64,0x00,0x00,0x00,0x05,0x28,0x40,
53716 +0x00,0x04,0x1a,0x80,0x00,0xa3,0x10,0x2b,0x00,0x62,0x28,0x0a,0x08,0x00,0x2a,0x02,
53717 +0xad,0xc5,0x00,0x00,0x97,0x82,0x94,0x5c,0x00,0x00,0x00,0x00,0x00,0x62,0x10,0x2a,
53718 +0x10,0x40,0xfe,0xdc,0x00,0x00,0x00,0x00,0x91,0x82,0x00,0xdd,0x00,0x00,0x00,0x00,
53719 +0x14,0x40,0x00,0x15,0x00,0x00,0x00,0x00,0x91,0x83,0x00,0x00,0x27,0x82,0x87,0x78,
53720 +0x00,0x03,0x18,0x80,0x00,0x62,0x10,0x21,0x8c,0x44,0x00,0x00,0x00,0x6c,0x18,0x21,
53721 +0xac,0x64,0x00,0x60,0x93,0x05,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x10,0x80,
53722 +0x01,0x82,0x10,0x21,0x24,0x4e,0x00,0x60,0xa1,0x85,0x00,0x00,0x8d,0xc2,0x00,0x00,
53723 +0x00,0x00,0x00,0x00,0x00,0x02,0x1f,0xc2,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x43,
53724 +0x03,0xe0,0x00,0x08,0xad,0xa2,0x00,0x00,0x08,0x00,0x2a,0x77,0xa1,0x80,0x00,0xdd,
53725 +0x8d,0x82,0x00,0xd0,0x08,0x00,0x2a,0x33,0x24,0x42,0xff,0xe8,0x8d,0x82,0x00,0xd0,
53726 +0x08,0x00,0x2a,0x33,0x24,0x42,0x00,0x01,0x8d,0x82,0x00,0xd0,0x08,0x00,0x2a,0x33,
53727 +0x24,0x42,0x00,0x02,0x10,0xa0,0xff,0xf9,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
53728 +0x10,0xa2,0xff,0xa3,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0xa0,
53729 +0x00,0x00,0x00,0x00,0x8d,0x82,0x00,0xd0,0x08,0x00,0x2a,0x33,0x24,0x42,0xff,0xd0,
53730 +0x10,0xa0,0xff,0xf1,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0xeb,
53731 +0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0x99,0x24,0x02,0x00,0x03,
53732 +0x14,0xa2,0xff,0xe3,0x00,0x00,0x00,0x00,0x8d,0x82,0x00,0xd0,0x08,0x00,0x2a,0x33,
53733 +0x24,0x42,0xff,0xf8,0x2d,0x42,0x00,0x24,0x14,0x40,0x00,0x0e,0x00,0x00,0x00,0x00,
53734 +0x10,0xa0,0xff,0xe1,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0xdb,
53735 +0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0x89,0x24,0x02,0x00,0x03,
53736 +0x10,0xa2,0xff,0xf1,0x00,0x00,0x00,0x00,0x8d,0x82,0x00,0xd0,0x08,0x00,0x2a,0x33,
53737 +0x24,0x42,0xff,0xf0,0x10,0xa0,0xff,0xd1,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
53738 +0x10,0xa2,0xff,0x7f,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0xf7,0x00,0x00,0x00,0x00,
53739 +0x24,0x02,0x00,0x03,0x14,0xa2,0xff,0xd7,0x00,0x00,0x00,0x00,0x08,0x00,0x2a,0x30,
53740 +0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x24,0x10,0x40,0xff,0xe5,0x00,0x00,0x00,0x00,
53741 +0x10,0xa0,0xff,0xc2,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x14,0xa2,0xff,0xca,
53742 +0x00,0x00,0x00,0x00,0x08,0x00,0x2a,0x9e,0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x29,
53743 +0x10,0x40,0xff,0xdb,0x00,0x00,0x00,0x00,0x08,0x00,0x2a,0x89,0x00,0x00,0x00,0x00,
53744 +0x2d,0x42,0x00,0x24,0x14,0x40,0x00,0x0e,0x00,0x00,0x00,0x00,0x10,0xa0,0xff,0xb6,
53745 +0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0xb0,0x00,0x00,0x00,0x00,
53746 +0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0x5e,0x24,0x02,0x00,0x03,0x14,0xa2,0xff,0xc6,
53747 +0x00,0x00,0x00,0x00,0x8d,0x82,0x00,0xd0,0x08,0x00,0x2a,0x33,0x24,0x42,0xff,0xfa,
53748 +0x10,0xa0,0xff,0xa9,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0x54,
53749 +0x24,0x02,0x00,0x02,0x14,0xa2,0xff,0x4b,0x00,0x00,0x00,0x00,0x08,0x00,0x2a,0x9e,
53750 +0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x24,0x10,0x40,0xff,0xe8,0x00,0x00,0x00,0x00,
53751 +0x10,0xa0,0xff,0x9a,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0x48,
53752 +0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0x92,0x00,0x00,0x00,0x00,0x08,0x00,0x2a,0x91,
53753 +0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x2c,0x14,0x40,0xff,0xcd,0x00,0x00,0x00,0x00,
53754 +0x10,0xa0,0xff,0x91,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0x8b,
53755 +0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0x39,0x00,0x00,0x00,0x00,
53756 +0x08,0x00,0x2a,0x9e,0x00,0x00,0x00,0x00,0x10,0xa0,0xff,0x87,0x00,0x00,0x00,0x00,
53757 +0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0x81,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,
53758 +0x10,0xa2,0xff,0x2f,0x24,0x02,0x00,0x03,0x14,0xa2,0xff,0x97,0x00,0x00,0x00,0x00,
53759 +0x8d,0x82,0x00,0xd0,0x08,0x00,0x2a,0x33,0x24,0x42,0xff,0xfc,0x2d,0x42,0x00,0x24,
53760 +0x14,0x40,0xff,0xa4,0x00,0x00,0x00,0x00,0x08,0x00,0x2a,0x94,0x00,0x00,0x00,0x00,
53761 +0x2d,0x42,0x00,0x24,0x14,0x40,0xff,0x9f,0x00,0x00,0x00,0x00,0x08,0x00,0x2a,0x25,
53762 +0x00,0x00,0x00,0x00,0x27,0xbd,0xff,0xe8,0x3c,0x02,0xb0,0x03,0xaf,0xbf,0x00,0x14,
53763 +0xaf,0xb0,0x00,0x10,0x34,0x42,0x01,0x18,0x3c,0x03,0xb0,0x03,0x8c,0x50,0x00,0x00,
53764 +0x34,0x63,0x01,0x2c,0x90,0x62,0x00,0x00,0x32,0x05,0x00,0x01,0xa3,0x82,0x80,0x10,
53765 +0x14,0xa0,0x00,0x14,0x30,0x44,0x00,0xff,0x32,0x02,0x01,0x00,0x14,0x40,0x00,0x09,
53766 +0x00,0x00,0x00,0x00,0x32,0x02,0x08,0x00,0x10,0x40,0x00,0x02,0x24,0x02,0x00,0x01,
53767 +0xa3,0x82,0xc5,0x58,0x8f,0xbf,0x00,0x14,0x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,
53768 +0x27,0xbd,0x00,0x18,0x0c,0x00,0x0b,0x3e,0x00,0x00,0x00,0x00,0x26,0x02,0xff,0x00,
53769 +0xa3,0x80,0xc5,0x58,0x3c,0x01,0xb0,0x03,0xac,0x22,0x01,0x18,0x08,0x00,0x2b,0x26,
53770 +0x32,0x02,0x08,0x00,0x0c,0x00,0x28,0xb0,0x00,0x00,0x00,0x00,0x26,0x02,0xff,0xff,
53771 +0x3c,0x01,0xb0,0x03,0xac,0x22,0x01,0x18,0x08,0x00,0x2b,0x23,0x32,0x02,0x01,0x00,
53772 +0x27,0xbd,0xff,0xe0,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0xd0,0xaf,0xbf,0x00,0x18,
53773 +0x8c,0x43,0x00,0x00,0x3c,0x02,0x00,0x40,0x24,0x07,0x0f,0xff,0x00,0x03,0x33,0x02,
53774 +0x00,0x03,0x2d,0x02,0x00,0x03,0x43,0x02,0x30,0x69,0x0f,0xff,0x00,0x62,0x18,0x24,
53775 +0x30,0xa5,0x00,0x03,0x30,0xc6,0x00,0xff,0x10,0x60,0x00,0x08,0x31,0x08,0x00,0xff,
53776 +0x01,0x00,0x30,0x21,0x0c,0x00,0x2b,0xe7,0xaf,0xa9,0x00,0x10,0x8f,0xbf,0x00,0x18,
53777 +0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x0c,0x00,0x2c,0x39,
53778 +0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,0x34,0x63,0x00,0xd4,0x08,0x00,0x2b,0x4f,
53779 +0xac,0x62,0x00,0x00,0x27,0xbd,0xff,0xc0,0xaf,0xb6,0x00,0x30,0xaf,0xb3,0x00,0x24,
53780 +0xaf,0xb1,0x00,0x1c,0xaf,0xb0,0x00,0x18,0xaf,0xbf,0x00,0x3c,0xaf,0xbe,0x00,0x38,
53781 +0xaf,0xb7,0x00,0x34,0xaf,0xb5,0x00,0x2c,0xaf,0xb4,0x00,0x28,0xaf,0xb2,0x00,0x20,
53782 +0x0c,0x00,0x1f,0x11,0x00,0x80,0x80,0x21,0x00,0x00,0xb0,0x21,0x00,0x00,0x88,0x21,
53783 +0x10,0x40,0x00,0x12,0x00,0x00,0x98,0x21,0x3c,0x02,0xb0,0x03,0x3c,0x03,0xb0,0x03,
53784 +0x3c,0x04,0xb0,0x03,0x24,0x05,0x00,0x01,0x34,0x42,0x00,0xbc,0x34,0x63,0x00,0xbb,
53785 +0x34,0x84,0x00,0xba,0xa4,0x40,0x00,0x00,0xa0,0x65,0x00,0x00,0xa0,0x85,0x00,0x00,
53786 +0x7b,0xbe,0x01,0xfc,0x7b,0xb6,0x01,0xbc,0x7b,0xb4,0x01,0x7c,0x7b,0xb2,0x01,0x3c,
53787 +0x7b,0xb0,0x00,0xfc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x40,0x3c,0x02,0xb0,0x03,
53788 +0x34,0x42,0x01,0x47,0x90,0x44,0x00,0x00,0x00,0x10,0x1a,0x02,0x3c,0x15,0xfd,0xff,
53789 +0x30,0x84,0x00,0xff,0xa0,0x50,0x00,0x00,0x30,0x74,0x00,0x0f,0xaf,0xa4,0x00,0x10,
53790 +0x00,0x00,0x90,0x21,0x3c,0x17,0x02,0x00,0x36,0xb5,0xff,0xff,0x3c,0x1e,0xb0,0x03,
53791 +0x0c,0x00,0x0e,0x71,0x24,0x04,0x00,0x78,0x00,0x57,0x10,0x25,0x00,0x40,0x28,0x21,
53792 +0x0c,0x00,0x0e,0x64,0x24,0x04,0x00,0x78,0x00,0x00,0x80,0x21,0x0c,0x00,0x2d,0x0a,
53793 +0x00,0x00,0x00,0x00,0x26,0x03,0x00,0x01,0x30,0x70,0x00,0xff,0x10,0x40,0x00,0x47,
53794 +0x2e,0x03,0x00,0x02,0x14,0x60,0xff,0xf9,0x00,0x00,0x00,0x00,0x0c,0x00,0x0e,0x71,
53795 +0x24,0x04,0x00,0x78,0x00,0x55,0x10,0x24,0x00,0x40,0x28,0x21,0x0c,0x00,0x0e,0x64,
53796 +0x24,0x04,0x00,0x78,0x24,0x02,0x00,0x01,0x12,0x82,0x00,0x38,0x24,0x04,0x00,0xe0,
53797 +0x12,0x80,0x00,0x36,0x24,0x04,0x00,0xe4,0x32,0x22,0x00,0x60,0x32,0x23,0x0c,0x00,
53798 +0x00,0x03,0x1a,0x02,0x3c,0x05,0x00,0x60,0x00,0x02,0x11,0x42,0x02,0x25,0x20,0x24,
53799 +0x00,0x43,0x10,0x25,0x3c,0x03,0x04,0x00,0x02,0x23,0x28,0x24,0x00,0x04,0x24,0x42,
53800 +0x00,0x44,0x10,0x25,0x00,0x05,0x2d,0x02,0x00,0x45,0x88,0x25,0x12,0x20,0x00,0x05,
53801 +0x26,0x42,0x00,0x01,0x26,0xc2,0x00,0x01,0x30,0x56,0x00,0xff,0x02,0x71,0x98,0x21,
53802 +0x26,0x42,0x00,0x01,0x02,0x5e,0x20,0x21,0x30,0x52,0x00,0xff,0x2e,0x43,0x00,0x05,
53803 +0xa0,0x91,0x00,0xd8,0x14,0x60,0xff,0xce,0x3c,0x02,0xb0,0x03,0x8f,0xa5,0x00,0x10,
53804 +0x34,0x42,0x01,0x47,0xa0,0x45,0x00,0x00,0x12,0x60,0x00,0x0e,0x3c,0x02,0xb0,0x03,
53805 +0x12,0xc0,0x00,0x0d,0x34,0x42,0x00,0xbc,0x00,0x13,0x10,0x40,0x00,0x53,0x10,0x21,
53806 +0x00,0x02,0x10,0xc0,0x00,0x53,0x10,0x21,0x00,0x02,0x98,0x80,0x02,0x76,0x00,0x1b,
53807 +0x16,0xc0,0x00,0x02,0x00,0x00,0x00,0x00,0x00,0x07,0x00,0x0d,0x00,0x00,0x98,0x12,
53808 +0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0xbc,0x3c,0x03,0xb0,0x03,0x3c,0x04,0xb0,0x03,
53809 +0xa4,0x53,0x00,0x00,0x34,0x63,0x00,0xbb,0x34,0x84,0x00,0xba,0x24,0x02,0x00,0x01,
53810 +0xa0,0x60,0x00,0x00,0x08,0x00,0x2b,0x74,0xa0,0x82,0x00,0x00,0x0c,0x00,0x0e,0x71,
53811 +0x00,0x00,0x00,0x00,0x08,0x00,0x2b,0xa2,0x00,0x40,0x88,0x21,0x3c,0x03,0xb0,0x03,
53812 +0x34,0x63,0x00,0xbc,0x3c,0x04,0xb0,0x03,0x3c,0x05,0xb0,0x03,0xa4,0x60,0x00,0x00,
53813 +0x34,0x84,0x00,0xbb,0x34,0xa5,0x00,0xba,0x24,0x02,0x00,0x02,0x24,0x03,0x00,0x01,
53814 +0xa0,0x82,0x00,0x00,0x08,0x00,0x2b,0x74,0xa0,0xa3,0x00,0x00,0x27,0xbd,0xff,0xd8,
53815 +0xaf,0xb0,0x00,0x10,0x30,0xd0,0x00,0xff,0x2e,0x02,0x00,0x2e,0xaf,0xb2,0x00,0x18,
53816 +0xaf,0xb1,0x00,0x14,0xaf,0xbf,0x00,0x20,0xaf,0xb3,0x00,0x1c,0x30,0xb1,0x00,0xff,
53817 +0x14,0x40,0x00,0x06,0x00,0x80,0x90,0x21,0x8f,0xbf,0x00,0x20,0x7b,0xb2,0x00,0xfc,
53818 +0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x28,0x2e,0x13,0x00,0x10,
53819 +0x24,0x05,0x00,0x14,0x0c,0x00,0x1b,0x6e,0x24,0x06,0x01,0x07,0x12,0x60,0x00,0x38,
53820 +0x02,0x00,0x30,0x21,0x8f,0xa2,0x00,0x38,0x30,0xc3,0x00,0x3f,0x3c,0x04,0xb0,0x09,
53821 +0x00,0x02,0x14,0x00,0x00,0x43,0x30,0x25,0x34,0x84,0x01,0x60,0x90,0x82,0x00,0x00,
53822 +0x00,0x00,0x00,0x00,0x14,0x40,0xff,0xfd,0x24,0x02,0x00,0x01,0x12,0x22,0x00,0x2a,
53823 +0x2a,0x22,0x00,0x02,0x14,0x40,0x00,0x24,0x24,0x02,0x00,0x02,0x12,0x22,0x00,0x20,
53824 +0x24,0x02,0x00,0x03,0x12,0x22,0x00,0x19,0x00,0x00,0x00,0x00,0x16,0x60,0xff,0xe2,
53825 +0x24,0x02,0x00,0x01,0x12,0x22,0x00,0x13,0x2a,0x22,0x00,0x02,0x14,0x40,0x00,0x0d,
53826 +0x24,0x02,0x00,0x02,0x12,0x22,0x00,0x09,0x24,0x02,0x00,0x03,0x16,0x22,0xff,0xda,
53827 +0x00,0x00,0x00,0x00,0x24,0x04,0x08,0x4c,0x24,0x05,0xff,0xff,0x0c,0x00,0x1b,0x29,
53828 +0x3c,0x06,0x0c,0xb8,0x08,0x00,0x2b,0xf2,0x00,0x00,0x00,0x00,0x08,0x00,0x2c,0x1a,
53829 +0x24,0x04,0x08,0x48,0x16,0x20,0xff,0xd0,0x00,0x00,0x00,0x00,0x08,0x00,0x2c,0x1a,
53830 +0x24,0x04,0x08,0x40,0x08,0x00,0x2c,0x1a,0x24,0x04,0x08,0x44,0x24,0x04,0x08,0x4c,
53831 +0x0c,0x00,0x1b,0x29,0x24,0x05,0xff,0xff,0x08,0x00,0x2c,0x0f,0x00,0x00,0x00,0x00,
53832 +0x08,0x00,0x2c,0x28,0x24,0x04,0x08,0x48,0x16,0x20,0xff,0xe0,0x00,0x00,0x00,0x00,
53833 +0x08,0x00,0x2c,0x28,0x24,0x04,0x08,0x40,0x08,0x00,0x2c,0x28,0x24,0x04,0x08,0x44,
53834 +0x02,0x40,0x20,0x21,0x0c,0x00,0x2c,0x75,0x02,0x20,0x28,0x21,0x08,0x00,0x2b,0xfd,
53835 +0x00,0x40,0x30,0x21,0x27,0xbd,0xff,0xd8,0x2c,0xc2,0x00,0x2e,0xaf,0xb3,0x00,0x1c,
53836 +0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x20,0xaf,0xb2,0x00,0x18,
53837 +0x00,0xc0,0x88,0x21,0x30,0xb0,0x00,0xff,0x00,0x80,0x98,0x21,0x14,0x40,0x00,0x07,
53838 +0x00,0x00,0x18,0x21,0x8f,0xbf,0x00,0x20,0x7b,0xb2,0x00,0xfc,0x7b,0xb0,0x00,0xbc,
53839 +0x00,0x60,0x10,0x21,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x28,0x2e,0x32,0x00,0x10,
53840 +0x24,0x05,0x00,0x14,0x0c,0x00,0x1b,0x6e,0x24,0x06,0x01,0x07,0x12,0x40,0x00,0x1f,
53841 +0x02,0x20,0x10,0x21,0x30,0x45,0x00,0x3f,0x0c,0x00,0x2c,0xb2,0x02,0x00,0x20,0x21,
53842 +0x16,0x40,0x00,0x0a,0x00,0x40,0x88,0x21,0x24,0x02,0x00,0x01,0x12,0x02,0x00,0x15,
53843 +0x2a,0x02,0x00,0x02,0x14,0x40,0x00,0x0f,0x24,0x02,0x00,0x02,0x12,0x02,0x00,0x0b,
53844 +0x24,0x02,0x00,0x03,0x12,0x02,0x00,0x03,0x00,0x00,0x00,0x00,0x08,0x00,0x2c,0x45,
53845 +0x02,0x20,0x18,0x21,0x24,0x04,0x08,0x4c,0x24,0x05,0xff,0xff,0x0c,0x00,0x1b,0x29,
53846 +0x3c,0x06,0x0c,0xb8,0x08,0x00,0x2c,0x45,0x02,0x20,0x18,0x21,0x08,0x00,0x2c,0x62,
53847 +0x24,0x04,0x08,0x48,0x16,0x00,0xff,0xf5,0x00,0x00,0x00,0x00,0x08,0x00,0x2c,0x62,
53848 +0x24,0x04,0x08,0x40,0x08,0x00,0x2c,0x62,0x24,0x04,0x08,0x44,0x02,0x60,0x20,0x21,
53849 +0x02,0x20,0x30,0x21,0x0c,0x00,0x2c,0x75,0x02,0x00,0x28,0x21,0x08,0x00,0x2c,0x52,
53850 +0x30,0x45,0x00,0x3f,0x27,0xbd,0xff,0xe8,0x2c,0xc2,0x00,0x1f,0xaf,0xb0,0x00,0x10,
53851 +0xaf,0xbf,0x00,0x14,0x00,0xc0,0x80,0x21,0x14,0x40,0x00,0x1d,0x30,0xa5,0x00,0xff,
53852 +0x24,0x02,0x00,0x01,0x10,0xa2,0x00,0x18,0x28,0xa2,0x00,0x02,0x14,0x40,0x00,0x12,
53853 +0x24,0x02,0x00,0x02,0x10,0xa2,0x00,0x0e,0x24,0x02,0x00,0x03,0x10,0xa2,0x00,0x07,
53854 +0x24,0x04,0x08,0x4c,0x26,0x10,0xff,0xe2,0x02,0x00,0x10,0x21,0x8f,0xbf,0x00,0x14,
53855 +0x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x24,0x05,0xff,0xff,
53856 +0x0c,0x00,0x1b,0x29,0x3c,0x06,0x0d,0xf8,0x08,0x00,0x2c,0x86,0x26,0x10,0xff,0xe2,
53857 +0x08,0x00,0x2c,0x8b,0x24,0x04,0x08,0x48,0x14,0xa0,0xff,0xf2,0x24,0x04,0x08,0x40,
53858 +0x08,0x00,0x2c,0x8c,0x24,0x05,0xff,0xff,0x08,0x00,0x2c,0x8b,0x24,0x04,0x08,0x44,
53859 +0x2c,0xc2,0x00,0x10,0x14,0x40,0xff,0xec,0x24,0x02,0x00,0x01,0x10,0xa2,0x00,0x14,
53860 +0x28,0xa2,0x00,0x02,0x14,0x40,0x00,0x0e,0x24,0x02,0x00,0x02,0x10,0xa2,0x00,0x0a,
53861 +0x24,0x02,0x00,0x03,0x10,0xa2,0x00,0x03,0x24,0x04,0x08,0x4c,0x08,0x00,0x2c,0x86,
53862 +0x26,0x10,0xff,0xf1,0x24,0x05,0xff,0xff,0x0c,0x00,0x1b,0x29,0x3c,0x06,0x0d,0xb8,
53863 +0x08,0x00,0x2c,0x86,0x26,0x10,0xff,0xf1,0x08,0x00,0x2c,0xa5,0x24,0x04,0x08,0x48,
53864 +0x14,0xa0,0xff,0xf6,0x24,0x04,0x08,0x40,0x08,0x00,0x2c,0xa6,0x24,0x05,0xff,0xff,
53865 +0x08,0x00,0x2c,0xa5,0x24,0x04,0x08,0x44,0x27,0xbd,0xff,0xe0,0x00,0x80,0x10,0x21,
53866 +0x24,0x04,0x00,0x50,0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x18,
53867 +0x00,0xa0,0x88,0x21,0x0c,0x00,0x01,0x31,0x30,0x50,0x00,0xff,0x24,0x03,0x00,0x01,
53868 +0x12,0x03,0x00,0x3e,0x02,0x20,0x30,0x21,0x2a,0x02,0x00,0x02,0x14,0x40,0x00,0x2a,
53869 +0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x12,0x02,0x00,0x19,0x24,0x04,0x08,0x34,
53870 +0x24,0x02,0x00,0x03,0x12,0x02,0x00,0x05,0x24,0x04,0x08,0x3c,0x8f,0xbf,0x00,0x18,
53871 +0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x0c,0x00,0x1b,0x29,
53872 +0x3c,0x05,0x3f,0x00,0x24,0x04,0x08,0x3c,0x3c,0x05,0x80,0x00,0x0c,0x00,0x1b,0x29,
53873 +0x00,0x00,0x30,0x21,0x3c,0x05,0x80,0x00,0x24,0x06,0x00,0x01,0x0c,0x00,0x1b,0x29,
53874 +0x24,0x04,0x08,0x3c,0x0c,0x00,0x01,0x31,0x24,0x04,0x00,0x28,0x24,0x04,0x08,0xac,
53875 +0x0c,0x00,0x1b,0x0b,0x24,0x05,0x0f,0xff,0x08,0x00,0x2c,0xc7,0x00,0x00,0x00,0x00,
53876 +0x0c,0x00,0x1b,0x29,0x3c,0x05,0x3f,0x00,0x24,0x04,0x08,0x34,0x3c,0x05,0x80,0x00,
53877 +0x0c,0x00,0x1b,0x29,0x00,0x00,0x30,0x21,0x3c,0x05,0x80,0x00,0x24,0x06,0x00,0x01,
53878 +0x0c,0x00,0x1b,0x29,0x24,0x04,0x08,0x34,0x0c,0x00,0x01,0x31,0x24,0x04,0x00,0x28,
53879 +0x08,0x00,0x2c,0xd8,0x24,0x04,0x08,0xa8,0x16,0x00,0xff,0xdc,0x02,0x20,0x30,0x21,
53880 +0x24,0x04,0x08,0x24,0x0c,0x00,0x1b,0x29,0x3c,0x05,0x3f,0x00,0x24,0x04,0x08,0x24,
53881 +0x3c,0x05,0x80,0x00,0x0c,0x00,0x1b,0x29,0x00,0x00,0x30,0x21,0x3c,0x05,0x80,0x00,
53882 +0x24,0x06,0x00,0x01,0x0c,0x00,0x1b,0x29,0x24,0x04,0x08,0x24,0x0c,0x00,0x01,0x31,
53883 +0x24,0x04,0x00,0x28,0x08,0x00,0x2c,0xd8,0x24,0x04,0x08,0xa0,0x24,0x04,0x08,0x2c,
53884 +0x0c,0x00,0x1b,0x29,0x3c,0x05,0x3f,0x00,0x24,0x04,0x08,0x2c,0x3c,0x05,0x80,0x00,
53885 +0x0c,0x00,0x1b,0x29,0x00,0x00,0x30,0x21,0x3c,0x05,0x80,0x00,0x24,0x06,0x00,0x01,
53886 +0x0c,0x00,0x1b,0x29,0x24,0x04,0x08,0x2c,0x0c,0x00,0x01,0x31,0x24,0x04,0x00,0x28,
53887 +0x08,0x00,0x2c,0xd8,0x24,0x04,0x08,0xa4,0x3c,0x05,0x00,0x14,0x3c,0x02,0xb0,0x05,
53888 +0x34,0x42,0x04,0x20,0x3c,0x06,0xc0,0x00,0x3c,0x03,0xb0,0x05,0x3c,0x04,0xb0,0x05,
53889 +0x34,0xa5,0x17,0x09,0xac,0x45,0x00,0x00,0x34,0xc6,0x05,0x07,0x34,0x63,0x04,0x24,
53890 +0x34,0x84,0x02,0x28,0x3c,0x07,0xb0,0x05,0x24,0x02,0x00,0x20,0xac,0x66,0x00,0x00,
53891 +0x34,0xe7,0x04,0x50,0xa0,0x82,0x00,0x00,0x90,0xe2,0x00,0x00,0x00,0x00,0x00,0x00,
53892 +0x30,0x42,0x00,0x03,0x10,0x40,0xff,0xfc,0x24,0x02,0x00,0x01,0x03,0xe0,0x00,0x08,
53893 +0x00,0x00,0x00,0x00,0x27,0xbd,0xff,0xe8,0xaf,0xbf,0x00,0x10,0x0c,0x00,0x2d,0xcf,
53894 +0x00,0x00,0x00,0x00,0x0c,0x00,0x2d,0xd1,0x00,0x00,0x00,0x00,0x0c,0x00,0x2d,0xf8,
53895 +0x00,0x00,0x00,0x00,0x3c,0x04,0xb0,0x05,0x34,0x84,0x00,0x04,0x0c,0x00,0x2d,0xd8,
53896 +0x34,0x05,0x9c,0x40,0x8f,0xbf,0x00,0x10,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,
53897 +0x27,0xbd,0x00,0x18,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,
53898 +0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x24,0x02,0x00,0x01,0x03,0xe0,0x00,0x08,
53899 +0x24,0x02,0x00,0x01,0x97,0x82,0x88,0x10,0x00,0x00,0x00,0x00,0x2c,0x43,0x00,0x64,
53900 +0x24,0x42,0x00,0x01,0xa7,0x82,0x88,0x10,0x14,0x60,0x00,0x28,0x00,0x80,0x30,0x21,
53901 +0x8c,0x82,0x00,0x00,0x3c,0x03,0x20,0x00,0xa7,0x80,0x88,0x10,0x00,0x43,0x10,0x24,
53902 +0x10,0x40,0x00,0x22,0x00,0x00,0x00,0x00,0x8c,0x82,0x00,0x00,0x3c,0x03,0x80,0x00,
53903 +0x00,0x43,0x10,0x25,0x97,0x83,0x88,0x04,0xac,0x82,0x00,0x00,0x8c,0x85,0x00,0x00,
53904 +0x24,0x63,0x00,0x01,0x3c,0x02,0x40,0x64,0x34,0x42,0x64,0x00,0x00,0x03,0x24,0x00,
53905 +0x00,0xa2,0x28,0x25,0x00,0x04,0x24,0x03,0x24,0x02,0x00,0x64,0xac,0xc5,0x00,0x00,
53906 +0xa7,0x83,0x88,0x04,0x10,0x82,0x00,0x2b,0x00,0x00,0x00,0x00,0x87,0x82,0x88,0x06,
53907 +0x24,0x03,0x00,0x3c,0x10,0x43,0x00,0x21,0x00,0x00,0x00,0x00,0x87,0x82,0x88,0x08,
53908 +0x00,0x00,0x00,0x00,0x10,0x43,0x00,0x17,0x00,0x00,0x00,0x00,0x87,0x83,0x88,0x0a,
53909 +0x24,0x02,0x00,0x18,0x10,0x62,0x00,0x0d,0x00,0x00,0x00,0x00,0x87,0x83,0x88,0x0c,
53910 +0x24,0x02,0x01,0x6d,0x10,0x62,0x00,0x03,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,
53911 +0x00,0x00,0x00,0x00,0x97,0x82,0x88,0x0e,0xa7,0x80,0x88,0x0c,0x24,0x42,0x00,0x01,
53912 +0xa7,0x82,0x88,0x0e,0x08,0x00,0x2d,0x67,0x00,0x00,0x00,0x00,0x97,0x82,0x88,0x0c,
53913 +0xa7,0x80,0x88,0x0a,0x24,0x42,0x00,0x01,0xa7,0x82,0x88,0x0c,0x08,0x00,0x2d,0x63,
53914 +0x00,0x00,0x00,0x00,0x97,0x82,0x88,0x0a,0xa7,0x80,0x88,0x08,0x24,0x42,0x00,0x01,
53915 +0xa7,0x82,0x88,0x0a,0x08,0x00,0x2d,0x5f,0x00,0x00,0x00,0x00,0x97,0x82,0x88,0x08,
53916 +0xa7,0x80,0x88,0x06,0x24,0x42,0x00,0x01,0xa7,0x82,0x88,0x08,0x08,0x00,0x2d,0x5b,
53917 +0x00,0x00,0x00,0x00,0x97,0x82,0x88,0x06,0xa7,0x80,0x88,0x04,0x24,0x42,0x00,0x01,
53918 +0xa7,0x82,0x88,0x06,0x08,0x00,0x2d,0x57,0x00,0x00,0x00,0x00,0x00,0x04,0x24,0x00,
53919 +0x3c,0x03,0xb0,0x07,0x00,0x04,0x24,0x03,0x34,0x63,0x00,0x28,0x90,0x62,0x00,0x00,
53920 +0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x40,0x10,0x40,0xff,0xfc,0x00,0x00,0x00,0x00,
53921 +0x3c,0x01,0xb0,0x07,0xa0,0x24,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x00,0x10,0x21,
53922 +0x3c,0x02,0xb0,0x07,0x34,0x42,0x00,0x28,0x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,
53923 +0x30,0x63,0x00,0x01,0x10,0x60,0x00,0x06,0x24,0x02,0xff,0xff,0x3c,0x02,0xb0,0x07,
53924 +0x90,0x42,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x16,0x00,0x00,0x02,0x16,0x03,
53925 +0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x27,0xbd,0xff,0xe0,0xaf,0xb0,0x00,0x10,
53926 +0x3c,0x10,0x04,0xc4,0x00,0x04,0x11,0x00,0x36,0x10,0xb4,0x00,0x02,0x02,0x00,0x1b,
53927 +0xaf,0xb1,0x00,0x14,0x3c,0x11,0xb0,0x07,0x36,0x31,0x00,0x18,0x24,0x04,0x00,0x0a,
53928 +0xaf,0xbf,0x00,0x18,0x14,0x40,0x00,0x02,0x00,0x00,0x00,0x00,0x00,0x07,0x00,0x0d,
53929 +0x00,0x00,0x80,0x12,0x0c,0x00,0x2e,0x24,0x00,0x00,0x00,0x00,0x92,0x22,0x00,0x00,
53930 +0x24,0x03,0xff,0x80,0x24,0x04,0x00,0x0a,0x00,0x43,0x10,0x25,0x0c,0x00,0x2e,0x24,
53931 +0xa2,0x22,0x00,0x00,0x24,0x04,0x00,0x0a,0x3c,0x01,0xb0,0x07,0xa0,0x30,0x00,0x00,
53932 +0x0c,0x00,0x2e,0x24,0x00,0x10,0x82,0x03,0x3c,0x02,0xb0,0x07,0x34,0x42,0x00,0x08,
53933 +0xa0,0x50,0x00,0x00,0x0c,0x00,0x2e,0x24,0x24,0x04,0x00,0x0a,0x92,0x22,0x00,0x00,
53934 +0x8f,0xbf,0x00,0x18,0x8f,0xb0,0x00,0x10,0x30,0x42,0x00,0x7f,0xa2,0x22,0x00,0x00,
53935 +0x8f,0xb1,0x00,0x14,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x03,0xe0,0x00,0x08,
53936 +0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,
53937 +0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,0x34,0x63,0x00,0x58,0x8c,0x62,0x00,0x00,
53938 +0x00,0x00,0x00,0x00,0x34,0x42,0x07,0xa4,0x03,0xe0,0x00,0x08,0xac,0x62,0x00,0x00,
53939 +0x27,0xbd,0xff,0xf8,0x00,0x80,0x38,0x21,0x00,0xa0,0x30,0x21,0x00,0x00,0x18,0x21,
53940 +0x00,0x63,0x00,0x18,0x00,0x00,0x10,0x12,0x00,0xc2,0x10,0x2b,0x14,0x40,0x00,0x05,
53941 +0x00,0x00,0x00,0x00,0x24,0x63,0x00,0x01,0x2c,0x62,0x01,0x00,0x14,0x40,0xff,0xf9,
53942 +0x00,0x63,0x00,0x18,0x24,0x63,0xff,0xff,0x00,0x63,0x00,0x18,0x30,0x63,0x00,0xff,
53943 +0x8c,0xe4,0x00,0x00,0x00,0x03,0x2a,0x00,0x00,0x03,0x1c,0x00,0x00,0x00,0x10,0x12,
53944 +0x00,0xc2,0x10,0x23,0x30,0x42,0x00,0xff,0x00,0x45,0x10,0x21,0x00,0x43,0x10,0x21,
53945 +0x00,0x82,0x20,0x25,0xac,0xe4,0x00,0x00,0x8c,0xe2,0x00,0x00,0x3c,0x03,0x40,0x00,
53946 +0x00,0x43,0x10,0x25,0xac,0xe2,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x08,
53947 +0x27,0xbd,0xff,0xe0,0xaf,0xbf,0x00,0x18,0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,
53948 +0x3c,0x04,0xb0,0x03,0x8c,0x82,0x00,0x00,0x3c,0x06,0xb0,0x03,0x34,0xc6,0x00,0x08,
53949 +0x34,0x42,0x40,0x00,0xac,0x82,0x00,0x00,0x8c,0x83,0x00,0x00,0x24,0x02,0xcf,0xff,
53950 +0x3c,0x11,0xb0,0x07,0x00,0x62,0x18,0x24,0xac,0x83,0x00,0x00,0x8c,0xc5,0x00,0x00,
53951 +0x3c,0x02,0x00,0xff,0x24,0x04,0x00,0x0a,0x00,0xa2,0x28,0x25,0xac,0xc5,0x00,0x00,
53952 +0x0c,0x00,0x2e,0x24,0x36,0x31,0x00,0x18,0x24,0x02,0xff,0x83,0x3c,0x04,0x00,0x01,
53953 +0xa2,0x22,0x00,0x00,0x0c,0x00,0x2d,0xa2,0x34,0x84,0xc2,0x00,0x0c,0x00,0x2e,0x24,
53954 +0x24,0x04,0x00,0x0a,0x24,0x02,0x00,0x03,0xa2,0x22,0x00,0x00,0x24,0x04,0x00,0x0a,
53955 +0x0c,0x00,0x2e,0x24,0x3c,0x10,0xb0,0x07,0x36,0x10,0x00,0x10,0x24,0x02,0x00,0x06,
53956 +0xa2,0x02,0x00,0x00,0x0c,0x00,0x2e,0x24,0x24,0x04,0x00,0x0a,0xa2,0x00,0x00,0x00,
53957 +0x8f,0xbf,0x00,0x18,0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,
53958 +0x10,0x80,0x00,0x05,0x00,0x00,0x18,0x21,0x24,0x63,0x00,0x01,0x00,0x64,0x10,0x2b,
53959 +0x14,0x40,0xff,0xfd,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
53960 +0x27,0xbd,0xff,0xc0,0xaf,0xb5,0x00,0x34,0xaf,0xb2,0x00,0x28,0xaf,0xb0,0x00,0x20,
53961 +0xaf,0xbf,0x00,0x38,0xaf,0xb4,0x00,0x30,0xaf,0xb3,0x00,0x2c,0xaf,0xb1,0x00,0x24,
53962 +0xaf,0xa5,0x00,0x44,0x90,0xa7,0x00,0x00,0x00,0x80,0xa8,0x21,0x00,0xc0,0x90,0x21,
53963 +0x00,0x07,0x1e,0x00,0x10,0x60,0x00,0x0f,0x00,0x80,0x80,0x21,0x00,0x03,0x1e,0x03,
53964 +0x24,0x02,0x00,0x25,0x10,0x62,0x00,0x13,0x00,0x00,0x88,0x21,0xa2,0x07,0x00,0x00,
53965 +0x8f,0xa5,0x00,0x44,0x26,0x10,0x00,0x01,0x24,0xa5,0x00,0x01,0xaf,0xa5,0x00,0x44,
53966 +0x90,0xa7,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0x1e,0x00,0x14,0x60,0xff,0xf3,
53967 +0x00,0x00,0x00,0x00,0x02,0x15,0x10,0x23,0xa2,0x00,0x00,0x00,0x8f,0xbf,0x00,0x38,
53968 +0x7b,0xb4,0x01,0xbc,0x7b,0xb2,0x01,0x7c,0x7b,0xb0,0x01,0x3c,0x03,0xe0,0x00,0x08,
53969 +0x27,0xbd,0x00,0x40,0x24,0xa5,0x00,0x01,0xaf,0xa5,0x00,0x44,0x80,0xa3,0x00,0x00,
53970 +0x00,0x00,0x00,0x00,0x24,0x63,0xff,0xe0,0x2c,0x62,0x00,0x11,0x10,0x40,0x00,0x11,
53971 +0x00,0xa0,0x38,0x21,0x00,0x03,0x10,0x80,0x3c,0x03,0x80,0x01,0x24,0x63,0x09,0xfc,
53972 +0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x00,0x08,
53973 +0x00,0x00,0x00,0x00,0x08,0x00,0x2e,0x51,0x36,0x31,0x00,0x10,0x08,0x00,0x2e,0x51,
53974 +0x36,0x31,0x00,0x08,0x08,0x00,0x2e,0x51,0x36,0x31,0x00,0x20,0x08,0x00,0x2e,0x51,
53975 +0x36,0x31,0x00,0x04,0x90,0xe4,0x00,0x00,0x3c,0x02,0x80,0x01,0x24,0x42,0x02,0x1c,
53976 +0x00,0x44,0x10,0x21,0x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x63,0x00,0x04,
53977 +0x14,0x60,0x00,0xfd,0x24,0x14,0xff,0xff,0x00,0x04,0x16,0x00,0x00,0x02,0x16,0x03,
53978 +0x24,0x03,0x00,0x2a,0x10,0x43,0x00,0xee,0x26,0x42,0x00,0x03,0x80,0xa3,0x00,0x00,
53979 +0x24,0x02,0x00,0x2e,0x10,0x62,0x00,0xcc,0x24,0x08,0xff,0xff,0x80,0xa3,0x00,0x00,
53980 +0x24,0x02,0x00,0x68,0x10,0x62,0x00,0xc4,0x24,0x06,0xff,0xff,0x24,0x02,0x00,0x6c,
53981 +0x10,0x62,0x00,0xc1,0x24,0x02,0x00,0x4c,0x10,0x62,0x00,0xbf,0x24,0x02,0x00,0x5a,
53982 +0x10,0x62,0x00,0xbd,0x00,0x00,0x00,0x00,0x80,0xa3,0x00,0x00,0x00,0x00,0x00,0x00,
53983 +0x24,0x63,0xff,0xdb,0x2c,0x62,0x00,0x54,0x10,0x40,0x00,0xaa,0x24,0x09,0x00,0x0a,
53984 +0x00,0x03,0x10,0x80,0x3c,0x03,0x80,0x01,0x24,0x63,0x0a,0x40,0x00,0x43,0x10,0x21,
53985 +0x8c,0x44,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x00,0x08,0x00,0x00,0x00,0x00,
53986 +0x32,0x22,0x00,0x10,0x14,0x40,0x00,0x09,0x24,0x02,0xff,0xfc,0x26,0x94,0xff,0xff,
53987 +0x1a,0x80,0x00,0x05,0x24,0x02,0x00,0x20,0x26,0x94,0xff,0xff,0xa2,0x02,0x00,0x00,
53988 +0x1e,0x80,0xff,0xfd,0x26,0x10,0x00,0x01,0x24,0x02,0xff,0xfc,0x26,0x44,0x00,0x03,
53989 +0x00,0x82,0x90,0x24,0x92,0x42,0x00,0x03,0x26,0x94,0xff,0xff,0x26,0x52,0x00,0x04,
53990 +0xa2,0x02,0x00,0x00,0x1a,0x80,0x00,0x06,0x26,0x10,0x00,0x01,0x24,0x02,0x00,0x20,
53991 +0x26,0x94,0xff,0xff,0xa2,0x02,0x00,0x00,0x1e,0x80,0xff,0xfd,0x26,0x10,0x00,0x01,
53992 +0x8f,0xa5,0x00,0x44,0x08,0x00,0x2e,0x43,0x24,0xa5,0x00,0x01,0x24,0x02,0x00,0x25,
53993 +0x08,0x00,0x2e,0x40,0xa2,0x02,0x00,0x00,0x36,0x31,0x00,0x40,0x24,0x09,0x00,0x10,
53994 +0x24,0x02,0x00,0x4c,0x10,0xc2,0x00,0x2a,0x24,0x02,0x00,0x6c,0x10,0xc2,0x00,0x05,
53995 +0x24,0x02,0x00,0x5a,0x10,0xc2,0x00,0x1f,0x24,0x02,0x00,0x68,0x10,0xc2,0x00,0x13,
53996 +0x24,0x02,0xff,0xfc,0x24,0x02,0xff,0xfc,0x26,0x43,0x00,0x03,0x00,0x62,0x90,0x24,
53997 +0x32,0x22,0x00,0x02,0x8e,0x47,0x00,0x00,0x00,0x00,0x30,0x21,0x10,0x40,0x00,0x03,
53998 +0x26,0x52,0x00,0x04,0x00,0xe0,0x10,0x21,0x00,0x02,0x37,0xc3,0x02,0x00,0x20,0x21,
53999 +0xaf,0xa9,0x00,0x10,0xaf,0xb4,0x00,0x14,0xaf,0xa8,0x00,0x18,0x0c,0x00,0x2f,0x91,
54000 +0xaf,0xb1,0x00,0x1c,0x08,0x00,0x2e,0xac,0x00,0x40,0x80,0x21,0x26,0x43,0x00,0x03,
54001 +0x00,0x62,0x90,0x24,0x32,0x22,0x00,0x02,0x96,0x47,0x00,0x02,0x00,0x00,0x30,0x21,
54002 +0x10,0x40,0xff,0xf2,0x26,0x52,0x00,0x04,0x00,0x07,0x14,0x00,0x08,0x00,0x2e,0xc6,
54003 +0x00,0x02,0x3c,0x03,0x26,0x42,0x00,0x03,0x24,0x03,0xff,0xfc,0x00,0x43,0x90,0x24,
54004 +0x8e,0x47,0x00,0x00,0x00,0x00,0x30,0x21,0x08,0x00,0x2e,0xc7,0x26,0x52,0x00,0x04,
54005 +0x26,0x42,0x00,0x07,0x24,0x03,0xff,0xf8,0x00,0x43,0x90,0x24,0x8e,0x46,0x00,0x00,
54006 +0x8e,0x47,0x00,0x04,0x08,0x00,0x2e,0xc7,0x26,0x52,0x00,0x08,0x08,0x00,0x2e,0xb4,
54007 +0x36,0x31,0x00,0x02,0x26,0x44,0x00,0x03,0x24,0x02,0xff,0xfc,0x00,0x82,0x90,0x24,
54008 +0x8e,0x44,0x00,0x00,0x02,0x15,0x10,0x23,0x26,0x52,0x00,0x04,0x08,0x00,0x2e,0x42,
54009 +0xac,0x82,0x00,0x00,0x08,0x00,0x2e,0xb4,0x24,0x09,0x00,0x08,0x24,0x02,0xff,0xff,
54010 +0x12,0x82,0x00,0x11,0x00,0x00,0x00,0x00,0x26,0x43,0x00,0x03,0x24,0x02,0xff,0xfc,
54011 +0x00,0x62,0x90,0x24,0x8e,0x47,0x00,0x00,0x02,0x00,0x20,0x21,0x24,0x02,0x00,0x10,
54012 +0x00,0x00,0x30,0x21,0xaf,0xa2,0x00,0x10,0xaf,0xb4,0x00,0x14,0xaf,0xa8,0x00,0x18,
54013 +0x0c,0x00,0x2f,0x91,0xaf,0xb1,0x00,0x1c,0x8f,0xa5,0x00,0x44,0x00,0x40,0x80,0x21,
54014 +0x08,0x00,0x2e,0x42,0x26,0x52,0x00,0x04,0x24,0x14,0x00,0x08,0x08,0x00,0x2e,0xf6,
54015 +0x36,0x31,0x00,0x01,0x26,0x42,0x00,0x03,0x24,0x03,0xff,0xfc,0x00,0x43,0x90,0x24,
54016 +0x8e,0x53,0x00,0x00,0x00,0x00,0x00,0x00,0x12,0x60,0x00,0x23,0x26,0x52,0x00,0x04,
54017 +0x02,0x60,0x20,0x21,0x0c,0x00,0x30,0x5f,0x01,0x00,0x28,0x21,0x00,0x40,0x20,0x21,
54018 +0x32,0x22,0x00,0x10,0x14,0x40,0x00,0x09,0x00,0x94,0x10,0x2a,0x10,0x40,0x00,0x07,
54019 +0x26,0x94,0xff,0xff,0x24,0x03,0x00,0x20,0x00,0x94,0x10,0x2a,0xa2,0x03,0x00,0x00,
54020 +0x26,0x94,0xff,0xff,0x14,0x40,0xff,0xfc,0x26,0x10,0x00,0x01,0x18,0x80,0x00,0x07,
54021 +0x00,0x80,0x18,0x21,0x92,0x62,0x00,0x00,0x24,0x63,0xff,0xff,0x26,0x73,0x00,0x01,
54022 +0xa2,0x02,0x00,0x00,0x14,0x60,0xff,0xfb,0x26,0x10,0x00,0x01,0x00,0x94,0x10,0x2a,
54023 +0x10,0x40,0xff,0x83,0x26,0x94,0xff,0xff,0x24,0x03,0x00,0x20,0x00,0x94,0x10,0x2a,
54024 +0xa2,0x03,0x00,0x00,0x26,0x94,0xff,0xff,0x14,0x40,0xff,0xfc,0x26,0x10,0x00,0x01,
54025 +0x08,0x00,0x2e,0xac,0x00,0x00,0x00,0x00,0x3c,0x02,0x80,0x01,0x08,0x00,0x2f,0x10,
54026 +0x24,0x53,0x08,0x04,0x24,0x02,0x00,0x25,0xa2,0x02,0x00,0x00,0x8f,0xa5,0x00,0x44,
54027 +0x00,0x00,0x00,0x00,0x80,0xa2,0x00,0x00,0x90,0xa3,0x00,0x00,0x10,0x40,0x00,0x03,
54028 +0x26,0x10,0x00,0x01,0x08,0x00,0x2e,0x40,0xa2,0x03,0x00,0x00,0x24,0xa5,0xff,0xff,
54029 +0x08,0x00,0x2e,0x42,0xaf,0xa5,0x00,0x44,0x80,0xa6,0x00,0x00,0x24,0xa5,0x00,0x01,
54030 +0x08,0x00,0x2e,0x86,0xaf,0xa5,0x00,0x44,0x24,0xa5,0x00,0x01,0xaf,0xa5,0x00,0x44,
54031 +0x90,0xa4,0x00,0x00,0x3c,0x02,0x80,0x01,0x24,0x42,0x02,0x1c,0x00,0x44,0x10,0x21,
54032 +0x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x63,0x00,0x04,0x14,0x60,0x00,0x0f,
54033 +0x00,0x04,0x16,0x00,0x00,0x02,0x16,0x03,0x24,0x03,0x00,0x2a,0x10,0x43,0x00,0x04,
54034 +0x26,0x42,0x00,0x03,0x29,0x02,0x00,0x00,0x08,0x00,0x2e,0x7b,0x00,0x02,0x40,0x0b,
54035 +0x24,0x03,0xff,0xfc,0x00,0x43,0x90,0x24,0x24,0xa5,0x00,0x01,0x8e,0x48,0x00,0x00,
54036 +0xaf,0xa5,0x00,0x44,0x08,0x00,0x2f,0x55,0x26,0x52,0x00,0x04,0x0c,0x00,0x2f,0x75,
54037 +0x27,0xa4,0x00,0x44,0x8f,0xa5,0x00,0x44,0x08,0x00,0x2f,0x55,0x00,0x40,0x40,0x21,
54038 +0x24,0x03,0xff,0xfc,0x00,0x43,0x90,0x24,0x8e,0x54,0x00,0x00,0x24,0xe5,0x00,0x01,
54039 +0xaf,0xa5,0x00,0x44,0x06,0x81,0xff,0x0d,0x26,0x52,0x00,0x04,0x00,0x14,0xa0,0x23,
54040 +0x08,0x00,0x2e,0x77,0x36,0x31,0x00,0x10,0x0c,0x00,0x2f,0x75,0x27,0xa4,0x00,0x44,
54041 +0x8f,0xa5,0x00,0x44,0x08,0x00,0x2e,0x77,0x00,0x40,0xa0,0x21,0x08,0x00,0x2e,0x51,
54042 +0x36,0x31,0x00,0x01,0x8c,0x86,0x00,0x00,0x3c,0x02,0x80,0x01,0x00,0x80,0x48,0x21,
54043 +0x90,0xc3,0x00,0x00,0x24,0x44,0x02,0x1c,0x00,0x64,0x18,0x21,0x90,0x62,0x00,0x00,
54044 +0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x04,0x10,0x40,0x00,0x10,0x00,0x00,0x38,0x21,
54045 +0x00,0x80,0x40,0x21,0x24,0xc2,0x00,0x01,0x80,0xc5,0x00,0x00,0xad,0x22,0x00,0x00,
54046 +0x90,0x43,0x00,0x00,0x00,0x40,0x30,0x21,0x00,0x07,0x10,0x80,0x00,0x68,0x18,0x21,
54047 +0x90,0x64,0x00,0x00,0x00,0x47,0x10,0x21,0x00,0x02,0x10,0x40,0x00,0x45,0x10,0x21,
54048 +0x30,0x84,0x00,0x04,0x14,0x80,0xff,0xf3,0x24,0x47,0xff,0xd0,0x03,0xe0,0x00,0x08,
54049 +0x00,0xe0,0x10,0x21,0x27,0xbd,0xff,0x98,0xaf,0xb2,0x00,0x50,0x8f,0xb2,0x00,0x84,
54050 +0x3c,0x02,0x80,0x01,0xaf,0xb4,0x00,0x58,0x32,0x43,0x00,0x40,0xaf,0xb1,0x00,0x4c,
54051 +0xaf,0xb0,0x00,0x48,0xaf,0xb7,0x00,0x64,0xaf,0xb6,0x00,0x60,0xaf,0xb5,0x00,0x5c,
54052 +0xaf,0xb3,0x00,0x54,0x00,0x80,0x68,0x21,0x00,0xc0,0x70,0x21,0x00,0xe0,0x78,0x21,
54053 +0x8f,0xb0,0x00,0x78,0x8f,0xb8,0x00,0x7c,0x8f,0xb1,0x00,0x80,0x10,0x60,0x00,0x03,
54054 +0x24,0x54,0x08,0x0c,0x3c,0x02,0x80,0x01,0x24,0x54,0x08,0x34,0x32,0x42,0x00,0x10,
54055 +0x10,0x40,0x00,0x04,0x26,0x02,0xff,0xfe,0x24,0x02,0xff,0xfe,0x02,0x42,0x90,0x24,
54056 +0x26,0x02,0xff,0xfe,0x2c,0x42,0x00,0x23,0x10,0x40,0x00,0x5d,0x00,0x00,0x18,0x21,
54057 +0x32,0x42,0x00,0x01,0x24,0x15,0x00,0x30,0x24,0x03,0x00,0x20,0x32,0x44,0x00,0x02,
54058 +0x00,0x62,0xa8,0x0a,0x10,0x80,0x00,0x07,0x00,0x00,0xb8,0x21,0x05,0xc0,0x00,0x96,
54059 +0x32,0x42,0x00,0x04,0x10,0x40,0x00,0x90,0x32,0x42,0x00,0x08,0x24,0x17,0x00,0x2b,
54060 +0x27,0x18,0xff,0xff,0x32,0x56,0x00,0x20,0x12,0xc0,0x00,0x07,0x01,0xcf,0x10,0x25,
54061 +0x24,0x02,0x00,0x10,0x12,0x02,0x00,0x86,0x27,0x03,0xff,0xff,0x3a,0x02,0x00,0x08,
54062 +0x00,0x62,0xc0,0x0a,0x01,0xcf,0x10,0x25,0x14,0x40,0x00,0x55,0x00,0x00,0xc8,0x21,
54063 +0x24,0x02,0x00,0x30,0x24,0x19,0x00,0x01,0xa3,0xa2,0x00,0x00,0x02,0x39,0x10,0x2a,
54064 +0x03,0x22,0x88,0x0b,0x32,0x43,0x00,0x11,0x14,0x60,0x00,0x0a,0x03,0x11,0xc0,0x23,
54065 +0x03,0x00,0x10,0x21,0x18,0x40,0x00,0x07,0x27,0x18,0xff,0xff,0x24,0x03,0x00,0x20,
54066 +0x03,0x00,0x10,0x21,0xa1,0xa3,0x00,0x00,0x27,0x18,0xff,0xff,0x1c,0x40,0xff,0xfc,
54067 +0x25,0xad,0x00,0x01,0x12,0xe0,0x00,0x03,0x00,0x00,0x00,0x00,0xa1,0xb7,0x00,0x00,
54068 +0x25,0xad,0x00,0x01,0x12,0xc0,0x00,0x07,0x32,0x42,0x00,0x10,0x24,0x02,0x00,0x08,
54069 +0x12,0x02,0x00,0x38,0x24,0x02,0x00,0x10,0x12,0x02,0x00,0x30,0x24,0x02,0x00,0x30,
54070 +0x32,0x42,0x00,0x10,0x14,0x40,0x00,0x0a,0x03,0x31,0x10,0x2a,0x03,0x00,0x10,0x21,
54071 +0x18,0x40,0x00,0x06,0x27,0x18,0xff,0xff,0x03,0x00,0x10,0x21,0xa1,0xb5,0x00,0x00,
54072 +0x27,0x18,0xff,0xff,0x1c,0x40,0xff,0xfc,0x25,0xad,0x00,0x01,0x03,0x31,0x10,0x2a,
54073 +0x10,0x40,0x00,0x07,0x26,0x31,0xff,0xff,0x24,0x03,0x00,0x30,0x03,0x31,0x10,0x2a,
54074 +0xa1,0xa3,0x00,0x00,0x26,0x31,0xff,0xff,0x14,0x40,0xff,0xfc,0x25,0xad,0x00,0x01,
54075 +0x03,0x20,0x10,0x21,0x18,0x40,0x00,0x08,0x27,0x39,0xff,0xff,0x03,0xb9,0x10,0x21,
54076 +0x90,0x43,0x00,0x00,0x03,0x20,0x20,0x21,0x27,0x39,0xff,0xff,0xa1,0xa3,0x00,0x00,
54077 +0x1c,0x80,0xff,0xfa,0x25,0xad,0x00,0x01,0x03,0x00,0x10,0x21,0x18,0x40,0x00,0x07,
54078 +0x27,0x18,0xff,0xff,0x24,0x03,0x00,0x20,0x03,0x00,0x10,0x21,0xa1,0xa3,0x00,0x00,
54079 +0x27,0x18,0xff,0xff,0x1c,0x40,0xff,0xfc,0x25,0xad,0x00,0x01,0x01,0xa0,0x18,0x21,
54080 +0x7b,0xb6,0x03,0x3c,0x7b,0xb4,0x02,0xfc,0x7b,0xb2,0x02,0xbc,0x7b,0xb0,0x02,0x7c,
54081 +0x00,0x60,0x10,0x21,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x68,0xa1,0xa2,0x00,0x00,
54082 +0x92,0x83,0x00,0x21,0x25,0xad,0x00,0x01,0xa1,0xa3,0x00,0x00,0x08,0x00,0x2f,0xe4,
54083 +0x25,0xad,0x00,0x01,0x24,0x02,0x00,0x30,0x08,0x00,0x30,0x17,0xa1,0xa2,0x00,0x00,
54084 +0x01,0xcf,0x10,0x25,0x10,0x40,0xff,0xad,0x00,0x00,0x60,0x21,0x00,0x0e,0x18,0x02,
54085 +0x03,0x3d,0x98,0x21,0x00,0x60,0x20,0x21,0x01,0xe0,0x38,0x21,0x10,0x60,0x00,0x04,
54086 +0x27,0x39,0x00,0x01,0x00,0x70,0x00,0x1b,0x00,0x00,0x20,0x12,0x00,0x00,0x18,0x10,
54087 +0x00,0x80,0x48,0x21,0x00,0xe0,0x30,0x21,0x01,0x80,0x70,0x21,0x01,0x80,0x28,0x21,
54088 +0x10,0x00,0x00,0x06,0x24,0x04,0x00,0x21,0x00,0x03,0x08,0x40,0x00,0x03,0x2f,0xc2,
54089 +0x00,0x22,0x18,0x25,0x00,0x06,0x30,0x40,0x00,0x0e,0x70,0x40,0x14,0xa0,0x00,0x02,
54090 +0x00,0x70,0x10,0x2b,0x14,0x40,0x00,0x03,0x24,0x84,0xff,0xff,0x00,0x70,0x18,0x23,
54091 +0x25,0xce,0x00,0x01,0x14,0x80,0xff,0xf4,0x00,0x06,0x17,0xc2,0x02,0x83,0x18,0x21,
54092 +0x01,0xc0,0x38,0x21,0x00,0x00,0x50,0x21,0x00,0x09,0x20,0x00,0x00,0x00,0x28,0x21,
54093 +0x90,0x66,0x00,0x00,0x00,0x8a,0x70,0x25,0x00,0xa7,0x78,0x25,0x01,0xcf,0x10,0x25,
54094 +0x14,0x40,0xff,0xda,0xa2,0x66,0x00,0x00,0x08,0x00,0x2f,0xcc,0x02,0x39,0x10,0x2a,
54095 +0x08,0x00,0x2f,0xc5,0x27,0x18,0xff,0xfe,0x10,0x40,0xff,0x73,0x32,0x56,0x00,0x20,
54096 +0x08,0x00,0x2f,0xbc,0x24,0x17,0x00,0x20,0x00,0x0f,0x78,0x23,0x00,0x0e,0x70,0x23,
54097 +0x00,0x0f,0x10,0x2b,0x01,0xc2,0x70,0x23,0x08,0x00,0x2f,0xbc,0x24,0x17,0x00,0x2d,
54098 +0x80,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x06,0x00,0x80,0x18,0x21,
54099 +0x24,0x63,0x00,0x01,0x80,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x40,0xff,0xfc,
54100 +0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x64,0x10,0x23,0x24,0xa5,0xff,0xff,
54101 +0x24,0x02,0xff,0xff,0x10,0xa2,0x00,0x0d,0x00,0x80,0x18,0x21,0x80,0x82,0x00,0x00,
54102 +0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x09,0x00,0x00,0x00,0x00,0x24,0x06,0xff,0xff,
54103 +0x24,0xa5,0xff,0xff,0x10,0xa6,0x00,0x05,0x24,0x63,0x00,0x01,0x80,0x62,0x00,0x00,
54104 +0x00,0x00,0x00,0x00,0x14,0x40,0xff,0xfa,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,
54105 +0x00,0x64,0x10,0x23,0x80,0x82,0x00,0x00,0x90,0x88,0x00,0x00,0x10,0x40,0x00,0x17,
54106 +0x00,0x00,0x48,0x21,0x90,0xa3,0x00,0x00,0x00,0xa0,0x30,0x21,0x10,0x60,0x00,0x0b,
54107 +0x00,0x60,0x38,0x21,0x00,0x08,0x16,0x00,0x00,0x02,0x46,0x03,0x00,0x07,0x16,0x00,
54108 +0x00,0x02,0x16,0x03,0x11,0x02,0x00,0x05,0x24,0xc6,0x00,0x01,0x90,0xc3,0x00,0x00,
54109 +0x00,0x00,0x00,0x00,0x14,0x60,0xff,0xf9,0x00,0x60,0x38,0x21,0x00,0x03,0x16,0x00,
54110 +0x10,0x40,0x00,0x06,0x00,0x00,0x00,0x00,0x24,0x84,0x00,0x01,0x90,0x82,0x00,0x00,
54111 +0x25,0x29,0x00,0x01,0x14,0x40,0xff,0xeb,0x00,0x40,0x40,0x21,0x03,0xe0,0x00,0x08,
54112 +0x01,0x20,0x10,0x21,0x80,0x82,0x00,0x00,0x90,0x87,0x00,0x00,0x10,0x40,0x00,0x17,
54113 +0x00,0x00,0x18,0x21,0x90,0xa2,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x1e,0x00,
54114 +0x10,0x60,0x00,0x0c,0x00,0xa0,0x30,0x21,0x00,0x07,0x16,0x00,0x00,0x02,0x3e,0x03,
54115 +0x00,0x03,0x16,0x03,0x10,0xe2,0x00,0x0d,0x00,0x80,0x18,0x21,0x24,0xc6,0x00,0x01,
54116 +0x90,0xc2,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x1e,0x00,0x14,0x60,0xff,0xf9,
54117 +0x00,0x03,0x16,0x03,0x24,0x84,0x00,0x01,0x90,0x82,0x00,0x00,0x00,0x00,0x00,0x00,
54118 +0x14,0x40,0xff,0xec,0x00,0x40,0x38,0x21,0x00,0x00,0x18,0x21,0x03,0xe0,0x00,0x08,
54119 +0x00,0x60,0x10,0x21,0x27,0xbd,0xff,0xe0,0xaf,0xb0,0x00,0x10,0x8f,0x90,0xc5,0x5c,
54120 +0xaf,0xb1,0x00,0x14,0xaf,0xbf,0x00,0x18,0x00,0x84,0x80,0x0b,0x00,0x00,0x30,0x21,
54121 +0x12,0x00,0x00,0x0a,0x00,0xa0,0x88,0x21,0x0c,0x00,0x30,0x71,0x02,0x00,0x20,0x21,
54122 +0x02,0x02,0x80,0x21,0x82,0x02,0x00,0x00,0x02,0x20,0x28,0x21,0x02,0x00,0x20,0x21,
54123 +0x14,0x40,0x00,0x07,0x00,0x00,0x30,0x21,0xaf,0x80,0xc5,0x5c,0x8f,0xbf,0x00,0x18,
54124 +0x7b,0xb0,0x00,0xbc,0x00,0xc0,0x10,0x21,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,
54125 +0x0c,0x00,0x30,0x8d,0x00,0x00,0x00,0x00,0x00,0x40,0x18,0x21,0x10,0x40,0x00,0x07,
54126 +0x02,0x00,0x30,0x21,0x80,0x42,0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x03,
54127 +0x00,0x00,0x00,0x00,0xa0,0x60,0x00,0x00,0x24,0x63,0x00,0x01,0xaf,0x83,0xc5,0x5c,
54128 +0x08,0x00,0x30,0xbb,0x00,0x00,0x00,0x00,0x24,0xc6,0xff,0xff,0x24,0x02,0xff,0xff,
54129 +0x10,0xc2,0x00,0x05,0x00,0x80,0x18,0x21,0x24,0xc6,0xff,0xff,0xa0,0x65,0x00,0x00,
54130 +0x14,0xc2,0xff,0xfd,0x24,0x63,0x00,0x01,0x03,0xe0,0x00,0x08,0x00,0x80,0x10,0x21,
54131 +0x24,0xc6,0xff,0xff,0x24,0x02,0xff,0xff,0x10,0xc2,0x00,0x08,0x00,0x80,0x18,0x21,
54132 +0x24,0x07,0xff,0xff,0x90,0xa2,0x00,0x00,0x24,0xc6,0xff,0xff,0x24,0xa5,0x00,0x01,
54133 +0xa0,0x62,0x00,0x00,0x14,0xc7,0xff,0xfb,0x24,0x63,0x00,0x01,0x03,0xe0,0x00,0x08,
54134 +0x00,0x80,0x10,0x21,0x00,0x80,0x18,0x21,0x90,0xa2,0x00,0x00,0x24,0xa5,0x00,0x01,
54135 +0xa0,0x82,0x00,0x00,0x14,0x40,0xff,0xfc,0x24,0x84,0x00,0x01,0x03,0xe0,0x00,0x08,
54136 +0x00,0x60,0x10,0x21,0x90,0x83,0x00,0x00,0x90,0xa2,0x00,0x00,0x24,0x84,0x00,0x01,
54137 +0x00,0x62,0x10,0x23,0x00,0x02,0x16,0x00,0x00,0x02,0x16,0x03,0x14,0x40,0x00,0x03,
54138 +0x24,0xa5,0x00,0x01,0x14,0x60,0xff,0xf7,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,
54139 +0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x00,0x10,0x21,0x93,0x85,0x88,0x6d,
54140 +0x24,0x02,0x00,0x01,0x14,0xa2,0x00,0x53,0x00,0x80,0x40,0x21,0x8c,0x89,0x00,0x04,
54141 +0x3c,0x02,0xb0,0x01,0x01,0x22,0x30,0x21,0x8c,0xc3,0x00,0x04,0x3c,0x02,0x01,0x00,
54142 +0x00,0x62,0x10,0x24,0x10,0x40,0x00,0x4b,0x30,0x62,0x00,0x08,0x10,0x45,0x00,0x59,
54143 +0x00,0x00,0x00,0x00,0x94,0xc2,0x00,0x38,0x24,0x03,0x00,0xb4,0x30,0x44,0x00,0xff,
54144 +0x10,0x83,0x00,0x61,0x24,0x02,0x00,0xc4,0x10,0x82,0x00,0x54,0x24,0x02,0x00,0x94,
54145 +0x10,0x82,0x00,0x45,0x00,0x00,0x00,0x00,0x94,0xc2,0x00,0x38,0x00,0x00,0x00,0x00,
54146 +0x30,0x47,0xff,0xff,0x30,0xe3,0x40,0xff,0x24,0x02,0x40,0x88,0x14,0x62,0x00,0x39,
54147 +0x30,0xe3,0x03,0x00,0x24,0x02,0x03,0x00,0x10,0x62,0x00,0x38,0x00,0x00,0x00,0x00,
54148 +0x94,0xc2,0x00,0x56,0x00,0x00,0x00,0x00,0x30,0x47,0xff,0xff,0x30,0xe2,0x00,0x80,
54149 +0x14,0x40,0x00,0x30,0x3c,0x02,0xb0,0x01,0x01,0x22,0x30,0x21,0x94,0xc3,0x00,0x60,
54150 +0x24,0x02,0x00,0x08,0x14,0x43,0x00,0x3b,0x00,0x00,0x00,0x00,0x90,0xc2,0x00,0x62,
54151 +0x24,0x03,0x00,0x04,0x00,0x02,0x39,0x02,0x10,0xe3,0x00,0x15,0x24,0x02,0x00,0x06,
54152 +0x14,0xe2,0x00,0x34,0x00,0x00,0x00,0x00,0x8d,0x05,0x01,0xac,0x94,0xc4,0x00,0x66,
54153 +0x27,0x82,0x92,0x48,0x00,0x05,0x28,0x80,0x30,0x87,0xff,0xff,0x00,0xa2,0x28,0x21,
54154 +0x00,0x07,0x1a,0x00,0x8c,0xa4,0x00,0x00,0x00,0x07,0x12,0x02,0x00,0x43,0x10,0x25,
54155 +0x24,0x42,0x00,0x5e,0x24,0x03,0xc0,0x00,0x30,0x47,0xff,0xff,0x00,0x83,0x20,0x24,
54156 +0x00,0x87,0x20,0x25,0xac,0xa4,0x00,0x00,0x08,0x00,0x31,0x61,0xad,0x07,0x00,0x10,
54157 +0x8d,0x05,0x01,0xac,0x94,0xc4,0x00,0x64,0x27,0x82,0x92,0x48,0x00,0x05,0x28,0x80,
54158 +0x30,0x87,0xff,0xff,0x00,0xa2,0x28,0x21,0x00,0x07,0x1a,0x00,0x8c,0xa4,0x00,0x00,
54159 +0x00,0x07,0x12,0x02,0x00,0x43,0x10,0x25,0x24,0x42,0x00,0x36,0x3c,0x03,0xff,0xff,
54160 +0x30,0x47,0xff,0xff,0x00,0x83,0x20,0x24,0x00,0x87,0x20,0x25,0xac,0xa4,0x00,0x00,
54161 +0xad,0x07,0x00,0x10,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x94,0xc2,0x00,0x50,
54162 +0x08,0x00,0x31,0x1f,0x30,0x47,0xff,0xff,0x8d,0x04,0x01,0xac,0x27,0x83,0x92,0x48,
54163 +0x00,0x04,0x20,0x80,0x00,0x83,0x20,0x21,0x8c,0x82,0x00,0x00,0x3c,0x03,0xff,0xff,
54164 +0x00,0x43,0x10,0x24,0x34,0x42,0x00,0x2e,0xac,0x82,0x00,0x00,0x24,0x03,0x00,0x2e,
54165 +0xad,0x03,0x00,0x10,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x8d,0x04,0x01,0xac,
54166 +0x27,0x83,0x92,0x48,0x00,0x04,0x20,0x80,0x00,0x83,0x20,0x21,0x8c,0x82,0x00,0x00,
54167 +0x3c,0x03,0xff,0xff,0x00,0x43,0x10,0x24,0x34,0x42,0x00,0x0e,0x24,0x03,0x00,0x0e,
54168 +0x08,0x00,0x31,0x60,0xac,0x82,0x00,0x00,0x8d,0x04,0x01,0xac,0x27,0x83,0x92,0x48,
54169 +0x00,0x04,0x20,0x80,0x00,0x83,0x20,0x21,0x8c,0x82,0x00,0x00,0x3c,0x03,0xff,0xff,
54170 +0x00,0x43,0x10,0x24,0x34,0x42,0x00,0x14,0x24,0x03,0x00,0x14,0x08,0x00,0x31,0x60,
54171 +0xac,0x82,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x30,0xc6,0x00,0xff,
54172 +0x00,0x06,0x48,0x40,0x01,0x26,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x8b,0xc5,0x70,
54173 +0x27,0x83,0xc5,0x76,0x00,0x4b,0x40,0x21,0x00,0x43,0x10,0x21,0x94,0x47,0x00,0x00,
54174 +0x30,0xa2,0x3f,0xff,0x10,0xe2,0x00,0x29,0x30,0x8a,0xff,0xff,0x95,0x02,0x00,0x02,
54175 +0x24,0x03,0x00,0x01,0x00,0x02,0x11,0x82,0x30,0x42,0x00,0x01,0x10,0x43,0x00,0x18,
54176 +0x00,0x00,0x00,0x00,0x01,0x26,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x4b,0x30,0x21,
54177 +0x94,0xc4,0x00,0x02,0x27,0x83,0xc5,0x76,0x27,0x85,0xc5,0x74,0x00,0x45,0x28,0x21,
54178 +0x30,0x84,0xff,0xdf,0x00,0x43,0x10,0x21,0xa4,0xc4,0x00,0x02,0xa4,0x40,0x00,0x00,
54179 +0xa4,0xa0,0x00,0x00,0x94,0xc3,0x00,0x02,0x3c,0x04,0xb0,0x01,0x01,0x44,0x20,0x21,
54180 +0x30,0x63,0xff,0xbf,0xa4,0xc3,0x00,0x02,0xa0,0xc0,0x00,0x00,0x8c,0x82,0x00,0x04,
54181 +0x24,0x03,0xf0,0xff,0x00,0x43,0x10,0x24,0x03,0xe0,0x00,0x08,0xac,0x82,0x00,0x04,
54182 +0x24,0x02,0xc0,0x00,0x91,0x04,0x00,0x01,0x00,0xa2,0x10,0x24,0x00,0x47,0x28,0x25,
54183 +0x3c,0x03,0xb0,0x01,0x24,0x02,0x00,0x02,0x14,0x82,0xff,0xe2,0x01,0x43,0x18,0x21,
54184 +0xac,0x65,0x00,0x00,0x08,0x00,0x31,0x8e,0x01,0x26,0x10,0x21,0x08,0x00,0x31,0x8e,
54185 +0x01,0x26,0x10,0x21,0x93,0x83,0x88,0x6d,0x24,0x02,0x00,0x01,0x14,0x62,0x00,0x0d,
54186 +0x3c,0x02,0xb0,0x01,0x8c,0x84,0x00,0x04,0x3c,0x06,0xb0,0x09,0x00,0x82,0x20,0x21,
54187 +0x8c,0x85,0x00,0x08,0x8c,0x83,0x00,0x04,0x3c,0x02,0x01,0x00,0x34,0xc6,0x01,0x00,
54188 +0x00,0x62,0x18,0x24,0x14,0x60,0x00,0x05,0x30,0xa5,0x20,0x00,0x24,0x02,0x00,0x06,
54189 +0xa0,0xc2,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x09,
54190 +0x10,0xa0,0xff,0xfc,0x34,0x63,0x01,0x00,0x24,0x02,0x00,0x0e,0x08,0x00,0x31,0xc1,
54191 +0xa0,0x62,0x00,0x00,0x3c,0x02,0xb0,0x01,0x30,0xa5,0xff,0xff,0x00,0xa2,0x28,0x21,
54192 +0x8c,0xa3,0x00,0x00,0x3c,0x02,0x10,0x00,0x00,0x80,0x30,0x21,0x00,0x62,0x18,0x24,
54193 +0x8c,0xa2,0x00,0x04,0x10,0x60,0x00,0x04,0x00,0x00,0x00,0x00,0x30,0x42,0x80,0x00,
54194 +0x10,0x40,0x00,0x13,0x00,0x00,0x00,0x00,0x8c,0xc2,0x01,0xa8,0x00,0x00,0x00,0x00,
54195 +0x24,0x44,0x00,0x01,0x28,0x83,0x00,0x00,0x24,0x42,0x00,0x40,0x00,0x83,0x10,0x0a,
54196 +0x93,0x83,0x88,0x6c,0x00,0x02,0x11,0x83,0x00,0x02,0x11,0x80,0x00,0x82,0x20,0x23,
54197 +0x24,0x63,0xff,0xff,0xac,0xc4,0x01,0xa8,0xa3,0x83,0x88,0x6c,0x8c,0xc4,0x01,0xac,
54198 +0x8c,0xc2,0x01,0xa8,0x00,0x00,0x00,0x00,0x00,0x44,0x10,0x26,0x00,0x02,0x10,0x2b,
54199 +0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,0x34,0x63,0x00,0x73,
54200 +0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x01,0x14,0x40,0x00,0x04,
54201 +0x00,0x00,0x00,0x00,0xa3,0x80,0x88,0x6d,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
54202 +0x24,0x02,0x00,0x01,0xa3,0x82,0x88,0x6d,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
54203 +0x8c,0x82,0x00,0x04,0x3c,0x05,0xb0,0x01,0x00,0x80,0x50,0x21,0x00,0x45,0x10,0x21,
54204 +0x8c,0x43,0x00,0x04,0x24,0x02,0x00,0x05,0x00,0x03,0x1a,0x02,0x30,0x69,0x00,0x0f,
54205 +0x11,0x22,0x00,0x0b,0x24,0x02,0x00,0x07,0x11,0x22,0x00,0x09,0x24,0x02,0x00,0x0a,
54206 +0x11,0x22,0x00,0x07,0x24,0x02,0x00,0x0b,0x11,0x22,0x00,0x05,0x24,0x02,0x00,0x01,
54207 +0x93,0x83,0x88,0x6c,0x3c,0x04,0xb0,0x06,0x10,0x62,0x00,0x03,0x34,0x84,0x80,0x18,
54208 +0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,
54209 +0x00,0x02,0x17,0x02,0x14,0x40,0xff,0xfa,0x00,0x00,0x00,0x00,0x8d,0x43,0x01,0xa8,
54210 +0x27,0x82,0x92,0x48,0x00,0x03,0x18,0x80,0x00,0x6a,0x20,0x21,0x8c,0x87,0x00,0xa8,
54211 +0x00,0x62,0x18,0x21,0x8c,0x68,0x00,0x00,0x00,0xe5,0x28,0x21,0x8c,0xa9,0x00,0x00,
54212 +0x3c,0x02,0xff,0xff,0x27,0x83,0x93,0x48,0x01,0x22,0x10,0x24,0x00,0x48,0x10,0x25,
54213 +0xac,0xa2,0x00,0x00,0x8d,0x44,0x01,0xa8,0x00,0x07,0x30,0xc2,0x3c,0x02,0x00,0x80,
54214 +0x00,0x04,0x20,0x80,0x00,0x83,0x20,0x21,0x00,0x06,0x32,0x00,0x8c,0xa9,0x00,0x04,
54215 +0x00,0xc2,0x30,0x25,0x8c,0x82,0x00,0x00,0x3c,0x03,0x80,0x00,0x01,0x22,0x10,0x25,
54216 +0x00,0x43,0x10,0x25,0xac,0xa2,0x00,0x04,0xaf,0x87,0xc5,0x60,0x8c,0xa2,0x00,0x00,
54217 +0x00,0x00,0x00,0x00,0xaf,0x82,0xc5,0x68,0x8c,0xa3,0x00,0x04,0x3c,0x01,0xb0,0x07,
54218 +0xac,0x26,0x80,0x18,0x8d,0x42,0x01,0xa8,0xaf,0x83,0xc5,0x64,0x93,0x85,0x88,0x6c,
54219 +0x24,0x44,0x00,0x01,0x28,0x83,0x00,0x00,0x24,0x42,0x00,0x40,0x00,0x83,0x10,0x0a,
54220 +0x00,0x02,0x11,0x83,0x00,0x02,0x11,0x80,0x24,0xa5,0xff,0xff,0x00,0x82,0x20,0x23,
54221 +0xad,0x44,0x01,0xa8,0xa3,0x85,0x88,0x6c,0x08,0x00,0x32,0x0c,0x00,0x00,0x00,0x00,
54222 +0x3c,0x05,0xb0,0x03,0x3c,0x02,0x80,0x01,0x34,0xa5,0x00,0x20,0x24,0x42,0xc9,0x10,
54223 +0xac,0xa2,0x00,0x00,0x24,0x02,0x00,0x02,0x24,0x03,0x00,0x20,0xac,0x82,0x00,0x64,
54224 +0x3c,0x02,0x80,0x01,0xac,0x83,0x00,0x60,0xac,0x80,0x00,0x00,0xac,0x80,0x00,0x04,
54225 +0xac,0x80,0x00,0x08,0xac,0x80,0x00,0x4c,0xac,0x80,0x00,0x50,0xac,0x80,0x00,0x54,
54226 +0xac,0x80,0x00,0x0c,0xac,0x80,0x00,0x58,0xa0,0x80,0x00,0x5c,0x24,0x42,0xc9,0xd4,
54227 +0x24,0x83,0x00,0x68,0x24,0x05,0x00,0x0f,0x24,0xa5,0xff,0xff,0xac,0x62,0x00,0x00,
54228 +0x04,0xa1,0xff,0xfd,0x24,0x63,0x00,0x04,0x3c,0x02,0x80,0x01,0x24,0x42,0xcb,0x04,
54229 +0xac,0x82,0x00,0x78,0x3c,0x03,0x80,0x01,0x3c,0x02,0x80,0x01,0x24,0x63,0xcc,0x90,
54230 +0x24,0x42,0xcb,0xfc,0xac,0x83,0x00,0x88,0xac,0x82,0x00,0x98,0x3c,0x03,0x80,0x01,
54231 +0x3c,0x02,0x80,0x01,0x24,0x63,0xcd,0x38,0x24,0x42,0xce,0x50,0xac,0x83,0x00,0xa0,
54232 +0xac,0x82,0x00,0xa4,0xa0,0x80,0x01,0xba,0xac,0x80,0x01,0xa8,0xac,0x80,0x01,0xac,
54233 +0xac,0x80,0x01,0xb0,0xac,0x80,0x01,0xb4,0xa0,0x80,0x01,0xb8,0x03,0xe0,0x00,0x08,
54234 +0xa0,0x80,0x01,0xb9,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x01,0x34,0x63,0x00,0x20,
54235 +0x24,0x42,0xc9,0xd4,0x03,0xe0,0x00,0x08,0xac,0x62,0x00,0x00,0x3c,0x03,0xb0,0x03,
54236 +0x3c,0x02,0x80,0x01,0x27,0xbd,0xff,0xe8,0x34,0x63,0x00,0x20,0x24,0x42,0xc9,0xec,
54237 +0xaf,0xb0,0x00,0x10,0xac,0x62,0x00,0x00,0xaf,0xbf,0x00,0x14,0x8c,0x83,0x00,0x10,
54238 +0x8f,0x82,0x94,0xe8,0x00,0x80,0x80,0x21,0x3c,0x04,0x80,0x01,0x30,0x46,0x00,0x01,
54239 +0x10,0x60,0x00,0x11,0x24,0x84,0x08,0x64,0x8e,0x02,0x00,0x14,0x00,0x00,0x00,0x00,
54240 +0x10,0x40,0x00,0x0d,0x00,0x00,0x00,0x00,0x8e,0x05,0x00,0x10,0x8e,0x03,0x00,0x14,
54241 +0x8e,0x02,0x00,0x04,0x00,0xa3,0x28,0x21,0x00,0x45,0x10,0x21,0x30,0x43,0x00,0xff,
54242 +0x00,0x03,0x18,0x2b,0x00,0x02,0x12,0x02,0x00,0x43,0x10,0x21,0x00,0x02,0x12,0x00,
54243 +0x30,0x42,0x3f,0xff,0xae,0x02,0x00,0x04,0x14,0xc0,0x00,0x0a,0x00,0x00,0x00,0x00,
54244 +0xae,0x00,0x00,0x00,0xae,0x00,0x00,0x4c,0xae,0x00,0x00,0x50,0xae,0x00,0x00,0x54,
54245 +0xae,0x00,0x00,0x0c,0x8f,0xbf,0x00,0x14,0x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,
54246 +0x27,0xbd,0x00,0x18,0x8e,0x05,0x00,0x10,0x8e,0x07,0x00,0x04,0x8e,0x06,0x00,0x14,
54247 +0x0c,0x00,0x1a,0x6b,0x00,0x00,0x00,0x00,0x08,0x00,0x32,0x9d,0xae,0x00,0x00,0x00,
54248 +0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x01,0x34,0x63,0x00,0x20,0x24,0x42,0xca,0xb0,
54249 +0xac,0x62,0x00,0x00,0x8c,0x86,0x00,0x04,0x3c,0x02,0xb0,0x01,0x24,0x03,0x00,0x01,
54250 +0x00,0xc2,0x10,0x21,0x8c,0x45,0x00,0x00,0xac,0x83,0x00,0x4c,0x00,0x05,0x14,0x02,
54251 +0x30,0xa3,0x3f,0xff,0x30,0x42,0x00,0xff,0xac,0x83,0x00,0x10,0xac,0x82,0x00,0x14,
54252 +0x8c,0x83,0x00,0x14,0xac,0x85,0x00,0x40,0x00,0xc3,0x30,0x21,0x03,0xe0,0x00,0x08,
54253 +0xac,0x86,0x00,0x08,0x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x01,0x27,0xbd,0xff,0xe8,
54254 +0x34,0x42,0x00,0x20,0x24,0x63,0xcb,0x04,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x14,
54255 +0xac,0x43,0x00,0x00,0x8c,0x82,0x00,0x4c,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x0a,
54256 +0x00,0x80,0x80,0x21,0xae,0x00,0x00,0x00,0xae,0x00,0x00,0x4c,0xae,0x00,0x00,0x50,
54257 +0xae,0x00,0x00,0x54,0xae,0x00,0x00,0x0c,0x8f,0xbf,0x00,0x14,0x8f,0xb0,0x00,0x10,
54258 +0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x0c,0x00,0x32,0xac,0x00,0x00,0x00,0x00,
54259 +0x08,0x00,0x32,0xce,0xae,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x01,
54260 +0x27,0xbd,0xff,0xe8,0x34,0x42,0x00,0x20,0x24,0x63,0xcb,0x68,0xaf,0xb0,0x00,0x10,
54261 +0xaf,0xbf,0x00,0x14,0xac,0x43,0x00,0x00,0x8c,0x82,0x00,0x4c,0x00,0x00,0x00,0x00,
54262 +0x10,0x40,0x00,0x16,0x00,0x80,0x80,0x21,0x8e,0x03,0x00,0x08,0x3c,0x02,0xb0,0x01,
54263 +0x8e,0x04,0x00,0x44,0x00,0x62,0x18,0x21,0x90,0x65,0x00,0x00,0x24,0x02,0x00,0x01,
54264 +0xae,0x02,0x00,0x50,0x30,0xa3,0x00,0xff,0x00,0x03,0x10,0x82,0x00,0x04,0x23,0x02,
54265 +0x30,0x84,0x00,0x0f,0x30,0x42,0x00,0x03,0x00,0x03,0x19,0x02,0xae,0x04,0x00,0x34,
54266 +0xae,0x02,0x00,0x2c,0xae,0x03,0x00,0x30,0xa2,0x05,0x00,0x48,0x8f,0xbf,0x00,0x14,
54267 +0x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x0c,0x00,0x32,0xac,
54268 +0x00,0x00,0x00,0x00,0x08,0x00,0x32,0xe6,0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,
54269 +0x3c,0x03,0x80,0x01,0x27,0xbd,0xff,0xe8,0x34,0x42,0x00,0x20,0x24,0x63,0xcb,0xfc,
54270 +0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x14,0xac,0x43,0x00,0x00,0x8c,0x82,0x00,0x50,
54271 +0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x16,0x00,0x80,0x80,0x21,0x92,0x03,0x00,0x44,
54272 +0x8e,0x02,0x00,0x40,0x83,0x85,0x95,0x14,0x92,0x04,0x00,0x41,0x30,0x63,0x00,0x01,
54273 +0x00,0x02,0x16,0x02,0xae,0x04,0x00,0x14,0x00,0x00,0x30,0x21,0xae,0x02,0x00,0x18,
54274 +0x10,0xa0,0x00,0x04,0xae,0x03,0x00,0x3c,0x10,0x60,0x00,0x03,0x24,0x02,0x00,0x01,
54275 +0x24,0x06,0x00,0x01,0x24,0x02,0x00,0x01,0xa3,0x86,0x95,0x14,0x8f,0xbf,0x00,0x14,
54276 +0xae,0x02,0x00,0x54,0x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,
54277 +0x0c,0x00,0x32,0xda,0x00,0x00,0x00,0x00,0x08,0x00,0x33,0x0b,0x00,0x00,0x00,0x00,
54278 +0x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x01,0x27,0xbd,0xff,0xe8,0x34,0x42,0x00,0x20,
54279 +0x24,0x63,0xcc,0x90,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x14,0xac,0x43,0x00,0x00,
54280 +0x8c,0x82,0x00,0x50,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x1b,0x00,0x80,0x80,0x21,
54281 +0x3c,0x02,0xb0,0x03,0x8c,0x42,0x00,0x00,0x92,0x04,0x00,0x44,0x8e,0x03,0x00,0x40,
54282 +0x83,0x86,0x95,0x14,0x92,0x05,0x00,0x41,0x30,0x42,0x08,0x00,0x30,0x84,0x00,0x01,
54283 +0x00,0x02,0x12,0xc2,0x00,0x03,0x1e,0x02,0x00,0x82,0x20,0x25,0xae,0x05,0x00,0x14,
54284 +0x00,0x00,0x38,0x21,0xae,0x03,0x00,0x18,0x10,0xc0,0x00,0x04,0xae,0x04,0x00,0x3c,
54285 +0x10,0x80,0x00,0x03,0x24,0x02,0x00,0x01,0x24,0x07,0x00,0x01,0x24,0x02,0x00,0x01,
54286 +0xa3,0x87,0x95,0x14,0x8f,0xbf,0x00,0x14,0xae,0x02,0x00,0x54,0x8f,0xb0,0x00,0x10,
54287 +0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x0c,0x00,0x32,0xda,0x00,0x00,0x00,0x00,
54288 +0x08,0x00,0x33,0x30,0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x01,
54289 +0x27,0xbd,0xff,0xe8,0x34,0x42,0x00,0x20,0x24,0x63,0xcd,0x38,0xaf,0xb0,0x00,0x10,
54290 +0xaf,0xbf,0x00,0x14,0xac,0x43,0x00,0x00,0x8c,0x82,0x00,0x54,0x00,0x00,0x00,0x00,
54291 +0x10,0x40,0x00,0x37,0x00,0x80,0x80,0x21,0x8e,0x04,0x00,0x04,0x8e,0x03,0x00,0x44,
54292 +0x3c,0x02,0x80,0x00,0x3c,0x05,0xb0,0x01,0x34,0x42,0x00,0x10,0x00,0x85,0x20,0x21,
54293 +0x00,0x62,0x18,0x25,0xac,0x83,0x00,0x04,0x8e,0x02,0x00,0x04,0x8e,0x03,0x01,0xac,
54294 +0x02,0x00,0x20,0x21,0x00,0x45,0x10,0x21,0x8c,0x46,0x00,0x00,0x00,0x03,0x18,0x80,
54295 +0x27,0x82,0x92,0x48,0x00,0x62,0x18,0x21,0xac,0x66,0x00,0x00,0x8e,0x02,0x00,0x04,
54296 +0x8e,0x03,0x01,0xac,0x00,0x45,0x10,0x21,0x8c,0x46,0x00,0x04,0x00,0x03,0x18,0x80,
54297 +0x27,0x82,0x93,0x48,0x00,0x62,0x18,0x21,0x0c,0x00,0x30,0xfb,0xac,0x66,0x00,0x00,
54298 +0x8e,0x03,0x01,0xac,0x8e,0x07,0x00,0x04,0x3c,0x06,0xb0,0x03,0x24,0x65,0x00,0x01,
54299 +0x28,0xa4,0x00,0x00,0x24,0x62,0x00,0x40,0x00,0xa4,0x10,0x0a,0x00,0x02,0x11,0x83,
54300 +0x00,0x02,0x11,0x80,0x00,0x03,0x18,0x80,0x00,0xa2,0x28,0x23,0x00,0x70,0x18,0x21,
54301 +0xae,0x05,0x01,0xac,0xac,0x67,0x00,0xa8,0x34,0xc6,0x00,0x30,0x8c,0xc3,0x00,0x00,
54302 +0x93,0x82,0x88,0x6c,0x02,0x00,0x20,0x21,0x24,0x63,0x00,0x01,0x24,0x42,0x00,0x01,
54303 +0xac,0xc3,0x00,0x00,0xa3,0x82,0x88,0x6c,0x0c,0x00,0x32,0x7b,0x00,0x00,0x00,0x00,
54304 +0x8f,0xbf,0x00,0x14,0x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,
54305 +0x0c,0x00,0x33,0x24,0x00,0x00,0x00,0x00,0x08,0x00,0x33,0x5a,0x00,0x00,0x00,0x00,
54306 +0x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x01,0x27,0xbd,0xff,0xe8,0x34,0x42,0x00,0x20,
54307 +0x24,0x63,0xce,0x50,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x14,0xac,0x43,0x00,0x00,
54308 +0x8c,0x82,0x00,0x54,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x37,0x00,0x80,0x80,0x21,
54309 +0x8e,0x04,0x00,0x04,0x8e,0x03,0x00,0x44,0x3c,0x02,0x80,0x00,0x3c,0x05,0xb0,0x01,
54310 +0x34,0x42,0x00,0x10,0x00,0x85,0x20,0x21,0x00,0x62,0x18,0x25,0xac,0x83,0x00,0x04,
54311 +0x8e,0x02,0x00,0x04,0x8e,0x03,0x01,0xac,0x02,0x00,0x20,0x21,0x00,0x45,0x10,0x21,
54312 +0x8c,0x46,0x00,0x00,0x00,0x03,0x18,0x80,0x27,0x82,0x92,0x48,0x00,0x62,0x18,0x21,
54313 +0xac,0x66,0x00,0x00,0x8e,0x02,0x00,0x04,0x8e,0x03,0x01,0xac,0x00,0x45,0x10,0x21,
54314 +0x8c,0x46,0x00,0x04,0x00,0x03,0x18,0x80,0x27,0x82,0x93,0x48,0x00,0x62,0x18,0x21,
54315 +0x0c,0x00,0x30,0xfb,0xac,0x66,0x00,0x00,0x8e,0x03,0x01,0xac,0x8e,0x07,0x00,0x04,
54316 +0x3c,0x06,0xb0,0x03,0x24,0x65,0x00,0x01,0x28,0xa4,0x00,0x00,0x24,0x62,0x00,0x40,
54317 +0x00,0xa4,0x10,0x0a,0x00,0x02,0x11,0x83,0x00,0x02,0x11,0x80,0x00,0x03,0x18,0x80,
54318 +0x00,0xa2,0x28,0x23,0x00,0x70,0x18,0x21,0xae,0x05,0x01,0xac,0xac,0x67,0x00,0xa8,
54319 +0x34,0xc6,0x00,0x30,0x8c,0xc3,0x00,0x00,0x93,0x82,0x88,0x6c,0x02,0x00,0x20,0x21,
54320 +0x24,0x63,0x00,0x01,0x24,0x42,0x00,0x01,0xac,0xc3,0x00,0x00,0xa3,0x82,0x88,0x6c,
54321 +0x0c,0x00,0x32,0x7b,0x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x14,0x8f,0xb0,0x00,0x10,
54322 +0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x0c,0x00,0x33,0x24,0x00,0x00,0x00,0x00,
54323 +0x08,0x00,0x33,0xa0,0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x01,
54324 +0x34,0x42,0x00,0x20,0x24,0x63,0xcf,0x68,0x27,0xbd,0xff,0xe0,0xac,0x43,0x00,0x00,
54325 +0x3c,0x02,0x80,0x01,0xaf,0xb2,0x00,0x18,0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,
54326 +0xaf,0xbf,0x00,0x1c,0x00,0x80,0x80,0x21,0x24,0x52,0xc9,0xd4,0x00,0x00,0x88,0x21,
54327 +0x3c,0x03,0xb0,0x09,0x34,0x63,0x00,0x06,0x8e,0x06,0x00,0x04,0x90,0x62,0x00,0x00,
54328 +0x00,0x06,0x22,0x02,0x00,0x44,0x10,0x23,0x24,0x44,0x00,0x40,0x28,0x83,0x00,0x00,
54329 +0x24,0x42,0x00,0x7f,0x00,0x83,0x10,0x0a,0x00,0x02,0x11,0x83,0x00,0x02,0x11,0x80,
54330 +0x24,0x84,0xff,0xff,0x10,0x44,0x00,0x68,0x00,0x00,0x28,0x21,0x3c,0x02,0xb0,0x01,
54331 +0x00,0xc2,0x10,0x21,0x8c,0x44,0x00,0x04,0x3c,0x03,0x7c,0x00,0x34,0x63,0x00,0xf0,
54332 +0x00,0x83,0x18,0x24,0xae,0x04,0x00,0x44,0x8c,0x44,0x00,0x00,0x10,0x60,0x00,0x69,
54333 +0x00,0x00,0x38,0x21,0x3c,0x09,0xb0,0x03,0x3c,0x06,0x7c,0x00,0x35,0x29,0x00,0x99,
54334 +0x3c,0x0a,0xb0,0x01,0x24,0x08,0x00,0x40,0x34,0xc6,0x00,0xf0,0x3c,0x0b,0xff,0xff,
54335 +0x3c,0x0c,0x28,0x38,0x16,0x20,0x00,0x06,0x24,0xa5,0x00,0x01,0x93,0x82,0x88,0xa0,
54336 +0x24,0x11,0x00,0x01,0x24,0x42,0x00,0x01,0xa1,0x22,0x00,0x00,0xa3,0x82,0x88,0xa0,
54337 +0x8e,0x02,0x00,0x04,0x24,0x07,0x00,0x01,0x24,0x42,0x01,0x00,0x30,0x42,0x3f,0xff,
54338 +0xae,0x02,0x00,0x04,0x00,0x4a,0x10,0x21,0x8c,0x43,0x00,0x04,0x00,0x00,0x00,0x00,
54339 +0xae,0x03,0x00,0x44,0x8c,0x44,0x00,0x00,0x10,0xa8,0x00,0x2d,0x00,0x66,0x18,0x24,
54340 +0x14,0x60,0xff,0xec,0x00,0x8b,0x10,0x24,0x14,0x4c,0xff,0xea,0x24,0x02,0x00,0x01,
54341 +0x10,0xe2,0x00,0x2f,0x3c,0x03,0xb0,0x09,0x8e,0x02,0x00,0x44,0x8e,0x04,0x00,0x60,
54342 +0x00,0x02,0x1e,0x42,0x00,0x02,0x12,0x02,0x30,0x42,0x00,0x0f,0x30,0x63,0x00,0x01,
54343 +0xae,0x02,0x00,0x00,0x10,0x44,0x00,0x1a,0xae,0x03,0x00,0x58,0x8e,0x02,0x00,0x64,
54344 +0x8e,0x04,0x00,0x58,0x00,0x00,0x00,0x00,0x10,0x82,0x00,0x05,0x00,0x00,0x00,0x00,
54345 +0xae,0x00,0x00,0x4c,0xae,0x00,0x00,0x50,0xae,0x00,0x00,0x54,0xae,0x00,0x00,0x0c,
54346 +0x8e,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x10,0x80,0x00,0x50,0x10,0x21,
54347 +0x8c,0x42,0x00,0x68,0x00,0x00,0x00,0x00,0x10,0x52,0x00,0x06,0x00,0x00,0x00,0x00,
54348 +0x00,0x40,0xf8,0x09,0x02,0x00,0x20,0x21,0x8e,0x04,0x00,0x58,0x8e,0x03,0x00,0x00,
54349 +0x00,0x00,0x00,0x00,0xae,0x03,0x00,0x60,0x08,0x00,0x33,0xe8,0xae,0x04,0x00,0x64,
54350 +0x8e,0x02,0x00,0x64,0x00,0x00,0x00,0x00,0x14,0x62,0xff,0xe5,0x00,0x00,0x00,0x00,
54351 +0x7a,0x02,0x0d,0x7c,0x8f,0xbf,0x00,0x1c,0x8f,0xb2,0x00,0x18,0x7b,0xb0,0x00,0xbc,
54352 +0x00,0x43,0x10,0x26,0x00,0x02,0x10,0x2b,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,
54353 +0x34,0x63,0x00,0x06,0x8e,0x04,0x00,0x04,0x90,0x62,0x00,0x00,0x00,0x04,0x22,0x02,
54354 +0x00,0x44,0x10,0x23,0x24,0x44,0x00,0x40,0x28,0x83,0x00,0x00,0x24,0x42,0x00,0x7f,
54355 +0x00,0x83,0x10,0x0a,0x00,0x02,0x11,0x83,0x00,0x02,0x11,0x80,0x00,0x82,0x20,0x23,
54356 +0x14,0x87,0xff,0xc5,0x00,0x00,0x00,0x00,0x8e,0x03,0x00,0x00,0x00,0x00,0x00,0x00,
54357 +0x2c,0x62,0x00,0x03,0x14,0x40,0x00,0x05,0x24,0x02,0x00,0x0d,0x10,0x62,0x00,0x03,
54358 +0x24,0x02,0x00,0x01,0x08,0x00,0x34,0x48,0xa2,0x02,0x00,0x5c,0x08,0x00,0x34,0x48,
54359 +0xa2,0x00,0x00,0x5c,0x3c,0x02,0xff,0xff,0x00,0x82,0x10,0x24,0x3c,0x03,0x28,0x38,
54360 +0x14,0x43,0xff,0x94,0x24,0x02,0x00,0x01,0x08,0x00,0x34,0x20,0x00,0x00,0x00,0x00,
54361 +0x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x01,0x34,0x42,0x00,0x20,0x24,0x63,0xd1,0xc0,
54362 +0xac,0x43,0x00,0x00,0x8c,0x83,0x01,0xa8,0x8c,0x82,0x01,0xac,0x00,0x80,0x40,0x21,
54363 +0x10,0x62,0x00,0x20,0x00,0x00,0x20,0x21,0x93,0x82,0x88,0x6d,0x00,0x03,0x28,0x80,
54364 +0x3c,0x07,0xb0,0x06,0x00,0xa8,0x18,0x21,0x24,0x04,0x00,0x01,0x8c,0x66,0x00,0xa8,
54365 +0x10,0x44,0x00,0x1c,0x34,0xe7,0x80,0x18,0x3c,0x05,0xb0,0x01,0xaf,0x86,0xc5,0x60,
54366 +0x00,0xc5,0x28,0x21,0x8c,0xa3,0x00,0x00,0x00,0x06,0x20,0xc2,0x3c,0x02,0x00,0x80,
54367 +0x00,0x04,0x22,0x00,0x00,0x82,0x20,0x25,0xaf,0x83,0xc5,0x68,0x8c,0xa2,0x00,0x04,
54368 +0xac,0xe4,0x00,0x00,0x8d,0x03,0x01,0xa8,0xaf,0x82,0xc5,0x64,0x24,0x64,0x00,0x01,
54369 +0x04,0x80,0x00,0x0a,0x00,0x80,0x10,0x21,0x00,0x02,0x11,0x83,0x8d,0x03,0x01,0xac,
54370 +0x00,0x02,0x11,0x80,0x00,0x82,0x10,0x23,0x00,0x43,0x18,0x26,0xad,0x02,0x01,0xa8,
54371 +0x00,0x03,0x20,0x2b,0x03,0xe0,0x00,0x08,0x00,0x80,0x10,0x21,0x08,0x00,0x34,0x92,
54372 +0x24,0x62,0x00,0x40,0x27,0x82,0x92,0x48,0x00,0x06,0x20,0xc2,0x00,0x04,0x22,0x00,
54373 +0x00,0xa2,0x48,0x21,0x3c,0x02,0x00,0x80,0x00,0x82,0x58,0x25,0x93,0x82,0x88,0x6c,
54374 +0x3c,0x0a,0xb0,0x06,0x3c,0x03,0xb0,0x01,0x2c,0x42,0x00,0x02,0x00,0xc3,0x38,0x21,
54375 +0x35,0x4a,0x80,0x18,0x14,0x40,0xff,0xef,0x00,0x00,0x20,0x21,0x8c,0xe5,0x00,0x00,
54376 +0x8d,0x23,0x00,0x00,0x24,0x02,0xc0,0x00,0x00,0xa2,0x10,0x24,0x00,0x43,0x10,0x25,
54377 +0xac,0xe2,0x00,0x00,0x8d,0x04,0x01,0xa8,0x27,0x83,0x93,0x48,0x8c,0xe5,0x00,0x04,
54378 +0x00,0x04,0x20,0x80,0x00,0x83,0x20,0x21,0x8c,0x82,0x00,0x00,0x3c,0x03,0x80,0x00,
54379 +0x00,0xa2,0x10,0x25,0x00,0x43,0x10,0x25,0xac,0xe2,0x00,0x04,0xaf,0x86,0xc5,0x60,
54380 +0x8c,0xe2,0x00,0x00,0x93,0x85,0x88,0x6c,0xaf,0x82,0xc5,0x68,0x8c,0xe3,0x00,0x04,
54381 +0xad,0x4b,0x00,0x00,0x8d,0x02,0x01,0xa8,0xaf,0x83,0xc5,0x64,0x24,0xa5,0xff,0xff,
54382 +0x24,0x44,0x00,0x01,0x28,0x83,0x00,0x00,0x24,0x42,0x00,0x40,0x00,0x83,0x10,0x0a,
54383 +0x00,0x02,0x11,0x83,0x00,0x02,0x11,0x80,0x00,0x82,0x20,0x23,0xad,0x04,0x01,0xa8,
54384 +0xa3,0x85,0x88,0x6c,0x79,0x02,0x0d,0x7c,0x00,0x00,0x00,0x00,0x00,0x43,0x10,0x26,
54385 +0x08,0x00,0x34,0x99,0x00,0x02,0x20,0x2b,0x90,0x87,0x00,0x00,0x3c,0x02,0x80,0x01,
54386 +0x27,0xbd,0xff,0xe8,0x24,0x48,0x02,0x1c,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x14,
54387 +0x01,0x07,0x18,0x21,0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x20,
54388 +0x10,0x40,0x00,0x0a,0x00,0x00,0x80,0x21,0x24,0x84,0x00,0x01,0x90,0x87,0x00,0x00,
54389 +0x00,0x00,0x00,0x00,0x01,0x07,0x18,0x21,0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
54390 +0x30,0x42,0x00,0x20,0x14,0x40,0xff,0xf8,0x00,0x00,0x00,0x00,0x00,0x07,0x16,0x00,
54391 +0x00,0x02,0x16,0x03,0x24,0x03,0x00,0x2d,0x10,0x43,0x00,0x0f,0x00,0x00,0x00,0x00,
54392 +0x0c,0x00,0x34,0xfd,0x00,0x00,0x00,0x00,0x00,0x40,0x18,0x21,0x00,0x02,0x10,0x23,
54393 +0x04,0x61,0x00,0x05,0x00,0x70,0x10,0x0a,0x16,0x00,0x00,0x03,0x3c,0x02,0x80,0x00,
54394 +0x3c,0x02,0x7f,0xff,0x34,0x42,0xff,0xff,0x8f,0xbf,0x00,0x14,0x8f,0xb0,0x00,0x10,
54395 +0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x24,0x10,0xff,0xff,0x08,0x00,0x34,0xec,
54396 +0x24,0x84,0x00,0x01,0x00,0x80,0x38,0x21,0x90,0x84,0x00,0x00,0x3c,0x02,0x80,0x01,
54397 +0x24,0x48,0x02,0x1c,0x01,0x04,0x18,0x21,0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
54398 +0x30,0x42,0x00,0x20,0x10,0x40,0x00,0x0a,0x00,0x00,0x50,0x21,0x24,0xe7,0x00,0x01,
54399 +0x90,0xe4,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x04,0x18,0x21,0x90,0x62,0x00,0x00,
54400 +0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x20,0x14,0x40,0xff,0xf8,0x00,0x00,0x00,0x00,
54401 +0x00,0x04,0x16,0x00,0x00,0x02,0x16,0x03,0x38,0x42,0x00,0x2b,0x24,0xe3,0x00,0x01,
54402 +0x24,0x04,0x00,0x10,0x10,0xc4,0x00,0x38,0x00,0x62,0x38,0x0a,0x90,0xe4,0x00,0x00,
54403 +0x14,0xc0,0x00,0x07,0x00,0x80,0x18,0x21,0x00,0x04,0x16,0x00,0x00,0x02,0x16,0x03,
54404 +0x24,0x03,0x00,0x30,0x10,0x43,0x00,0x25,0x24,0x06,0x00,0x0a,0x00,0x80,0x18,0x21,
54405 +0x00,0x03,0x16,0x00,0x10,0x40,0x00,0x1a,0x30,0x64,0x00,0xff,0x24,0x82,0xff,0xa9,
54406 +0x2c,0x83,0x00,0x61,0x30,0x48,0x00,0xff,0x10,0x60,0x00,0x09,0x2c,0x89,0x00,0x41,
54407 +0x24,0x82,0xff,0xc9,0x30,0x48,0x00,0xff,0x11,0x20,0x00,0x05,0x2c,0x83,0x00,0x3a,
54408 +0x24,0x82,0xff,0xd0,0x14,0x60,0x00,0x02,0x30,0x48,0x00,0xff,0x24,0x08,0x00,0xff,
54409 +0x01,0x06,0x10,0x2a,0x10,0x40,0x00,0x0a,0x01,0x46,0x00,0x18,0x24,0xe7,0x00,0x01,
54410 +0x00,0x00,0x18,0x12,0x00,0x6a,0x10,0x2b,0x14,0x40,0x00,0x0a,0x00,0x68,0x50,0x21,
54411 +0x80,0xe2,0x00,0x00,0x90,0xe3,0x00,0x00,0x14,0x40,0xff,0xe8,0x30,0x64,0x00,0xff,
54412 +0x10,0xa0,0x00,0x02,0x00,0x00,0x00,0x00,0xac,0xa7,0x00,0x00,0x03,0xe0,0x00,0x08,
54413 +0x01,0x40,0x10,0x21,0x03,0xe0,0x00,0x08,0x24,0x02,0xff,0xff,0x24,0x06,0x00,0x08,
54414 +0x80,0xe3,0x00,0x01,0x24,0x02,0x00,0x78,0x10,0x62,0x00,0x03,0x24,0x02,0x00,0x58,
54415 +0x14,0x62,0xff,0xd7,0x00,0x80,0x18,0x21,0x24,0xe7,0x00,0x02,0x90,0xe4,0x00,0x00,
54416 +0x08,0x00,0x35,0x1f,0x24,0x06,0x00,0x10,0x80,0xe3,0x00,0x00,0x24,0x02,0x00,0x30,
54417 +0x90,0xe4,0x00,0x00,0x10,0x62,0xff,0xf2,0x00,0x00,0x00,0x00,0x08,0x00,0x35,0x18,
54418 +0x00,0x00,0x00,0x00,0x3c,0x04,0xb0,0x03,0x3c,0x06,0xb0,0x07,0x3c,0x02,0x80,0x01,
54419 +0x34,0xc6,0x00,0x18,0x34,0x84,0x00,0x20,0x24,0x42,0xd5,0x54,0x24,0x03,0xff,0x83,
54420 +0xac,0x82,0x00,0x00,0xa0,0xc3,0x00,0x00,0x90,0xc4,0x00,0x00,0x27,0xbd,0xff,0xf8,
54421 +0x3c,0x03,0xb0,0x07,0x24,0x02,0xff,0x82,0xa3,0xa4,0x00,0x00,0xa0,0x62,0x00,0x00,
54422 +0x90,0x64,0x00,0x00,0x3c,0x02,0xb0,0x07,0x34,0x42,0x00,0x08,0xa3,0xa4,0x00,0x01,
54423 +0xa0,0x40,0x00,0x00,0x90,0x43,0x00,0x00,0x24,0x02,0x00,0x03,0x3c,0x05,0xb0,0x07,
54424 +0xa3,0xa3,0x00,0x00,0xa0,0xc2,0x00,0x00,0x90,0xc4,0x00,0x00,0x34,0xa5,0x00,0x10,
54425 +0x24,0x02,0x00,0x06,0x3c,0x03,0xb0,0x07,0xa3,0xa4,0x00,0x00,0x34,0x63,0x00,0x38,
54426 +0xa0,0xa2,0x00,0x00,0x90,0x64,0x00,0x00,0x3c,0x02,0xb0,0x07,0x34,0x42,0x00,0x20,
54427 +0xa3,0xa4,0x00,0x00,0xa0,0xa0,0x00,0x00,0x90,0xa3,0x00,0x00,0xaf,0x82,0xc8,0x70,
54428 +0xa3,0xa3,0x00,0x00,0xa0,0x40,0x00,0x00,0x90,0x43,0x00,0x00,0x03,0xe0,0x00,0x08,
54429 +0x27,0xbd,0x00,0x08,};
54430 +
54431 +u8 rtl8190_fwdata_array[] = {
54432 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
54433 +0x00,0x00,0x00,0x00,0x0a,0x0d,0x5b,0x43,0x4d,0x50,0x4b,0x5d,0x00,0x00,0x00,0x00,
54434 +0x80,0x01,0x00,0x14,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
54435 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
54436 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
54437 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
54438 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
54439 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
54440 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
54441 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
54442 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
54443 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
54444 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
54445 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
54446 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
54447 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
54448 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
54449 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
54450 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
54451 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
54452 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
54453 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
54454 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
54455 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
54456 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
54457 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
54458 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
54459 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
54460 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
54461 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
54462 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
54463 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
54464 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
54465 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x08,0x08,0x08,
54466 +0x08,0x08,0x08,0x08,0x08,0x28,0x28,0x28,0x28,0x28,0x08,0x08,0x08,0x08,0x08,0x08,
54467 +0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0xa0,0x10,0x10,0x10,
54468 +0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x04,0x04,0x04,0x04,
54469 +0x04,0x04,0x04,0x04,0x04,0x04,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x41,0x41,0x41,
54470 +0x41,0x41,0x41,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,
54471 +0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x10,0x10,0x10,0x10,0x10,0x10,0x42,0x42,0x42,
54472 +0x42,0x42,0x42,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,
54473 +0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x10,0x10,0x10,0x10,0x08,0x00,0x00,0x00,0x00,
54474 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
54475 +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xa0,0x10,0x10,0x10,
54476 +0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,
54477 +0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x01,0x01,0x01,0x01,
54478 +0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,
54479 +0x01,0x01,0x01,0x10,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x02,0x02,0x02,0x02,0x02,
54480 +0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,
54481 +0x02,0x02,0x02,0x10,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x20,0x09,0x0d,0x0a,
54482 +0x00,0x00,0x00,0x00,0x80,0x01,0x03,0x1c,0x00,0x00,0x00,0x00,0x43,0x6e,0x73,0x64,
54483 +0x31,0x00,0x00,0x00,0x68,0x65,0x6c,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
54484 +0x72,0x34,0x00,0x00,0x77,0x34,0x00,0x00,0x64,0x62,0x67,0x00,0x72,0x61,0x63,0x74,
54485 +0x72,0x6c,0x00,0x00,0x73,0x79,0x73,0x64,0x00,0x00,0x00,0x00,0x73,0x79,0x73,0x63,
54486 +0x74,0x72,0x6c,0x00,0x74,0x78,0x74,0x62,0x6c,0x00,0x00,0x00,0x70,0x72,0x61,0x6e,
54487 +0x67,0x65,0x00,0x00,0x64,0x6d,0x00,0x00,0x75,0x6e,0x6b,0x6e,0x6f,0x77,0x00,0x00,
54488 +0x80,0x01,0x03,0x34,0x80,0x01,0x03,0x3c,0x80,0x01,0x03,0x3c,0x00,0x00,0x00,0x01,
54489 +0x00,0x00,0x00,0x00,0x80,0x00,0x24,0x5c,0x80,0x01,0x03,0x40,0x80,0x01,0x03,0x3c,
54490 +0x80,0x01,0x03,0x3c,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x80,0x00,0x25,0xbc,
54491 +0x80,0x01,0x03,0x44,0x80,0x01,0x03,0x3c,0x80,0x01,0x03,0x3c,0x00,0x00,0x00,0x01,
54492 +0x00,0x00,0x00,0x00,0x80,0x00,0x27,0x38,0x80,0x01,0x03,0x48,0x80,0x01,0x03,0x3c,
54493 +0x80,0x01,0x03,0x3c,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x80,0x00,0x29,0x04,
54494 +0x80,0x01,0x03,0x4c,0x80,0x01,0x03,0x3c,0x80,0x01,0x03,0x3c,0x00,0x00,0x00,0x01,
54495 +0x00,0x00,0x00,0x00,0x80,0x00,0x29,0xdc,0x80,0x01,0x03,0x54,0x80,0x01,0x03,0x3c,
54496 +0x80,0x01,0x03,0x3c,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x80,0x00,0x29,0xe4,
54497 +0x80,0x01,0x03,0x5c,0x80,0x01,0x03,0x3c,0x80,0x01,0x03,0x3c,0x00,0x00,0x00,0x01,
54498 +0x00,0x00,0x00,0x00,0x80,0x00,0x29,0xec,0x80,0x01,0x03,0x64,0x80,0x01,0x03,0x3c,
54499 +0x80,0x01,0x03,0x3c,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x80,0x00,0x29,0xf4,
54500 +0x80,0x01,0x03,0x6c,0x80,0x01,0x03,0x3c,0x80,0x01,0x03,0x3c,0x00,0x00,0x00,0x01,
54501 +0x00,0x00,0x00,0x00,0x80,0x00,0x2b,0x80,0x80,0x01,0x03,0x74,0x80,0x01,0x03,0x3c,
54502 +0x80,0x01,0x03,0x3c,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x80,0x00,0x2b,0xf4,
54503 +0x80,0x01,0x03,0x78,0x80,0x01,0x03,0x3c,0x80,0x01,0x03,0x3c,0x00,0x00,0x00,0x0f,
54504 +0x00,0x00,0x00,0x01,0x80,0x00,0x2c,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
54505 +0x0a,0x0d,0x52,0x54,0x4c,0x38,0x31,0x39,0x58,0x2d,0x25,0x64,0x3e,0x00,0x00,0x00,
54506 +0x00,0x00,0x00,0x00,0x52,0x54,0x4c,0x38,0x31,0x39,0x58,0x2d,0x25,0x64,0x3e,0x0a,
54507 +0x0d,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x2a,0x00,0x00,0x00,0x0a,0x0d,0x45,0x72,
54508 +0x72,0x20,0x44,0x49,0x52,0x00,0x00,0x00,0x0a,0x0d,0x44,0x42,0x47,0x20,0x43,0x4d,
54509 +0x44,0x73,0x3a,0x00,0x0a,0x0d,0x5b,0x00,0x5d,0x2d,0x00,0x00,0x0a,0x0d,0x3c,0x31,
54510 +0x2e,0x43,0x4d,0x4e,0x3e,0x20,0x3c,0x32,0x2e,0x3f,0x3e,0x00,0x0a,0x0d,0x20,0x79,
54511 +0x65,0x61,0x72,0x2d,0x64,0x61,0x79,0x2d,0x68,0x6f,0x75,0x72,0x2d,0x6d,0x69,0x6e,
54512 +0x2d,0x73,0x65,0x63,0x2d,0x31,0x30,0x6d,0x73,0x3d,0x00,0x00,0x25,0x64,0x2d,0x00,
54513 +0x0a,0x0d,0x09,0x20,0x20,0x20,0x20,0x20,0x30,0x30,0x20,0x20,0x20,0x20,0x20,0x20,
54514 +0x20,0x30,0x34,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x30,0x38,0x20,0x20,0x20,0x20,
54515 +0x20,0x20,0x20,0x30,0x43,0x00,0x00,0x00,0x0a,0x0d,0x09,0x20,0x20,0x20,0x20,0x20,
54516 +0x3d,0x3d,0x3d,0x3d,0x3d,0x3d,0x3d,0x3d,0x3d,0x3d,0x3d,0x3d,0x3d,0x3d,0x3d,0x3d,
54517 +0x3d,0x3d,0x3d,0x3d,0x3d,0x3d,0x3d,0x3d,0x3d,0x3d,0x3d,0x3d,0x3d,0x3d,0x3d,0x3d,
54518 +0x3d,0x3d,0x3d,0x00,0x0d,0x0a,0x20,0x30,0x78,0x25,0x30,0x38,0x58,0x20,0x20,0x00,
54519 +0x09,0x00,0x00,0x00,0x25,0x30,0x38,0x58,0x20,0x00,0x00,0x00,0x0a,0x0d,0x44,0x62,
54520 +0x67,0x5f,0x46,0x6c,0x61,0x67,0x25,0x64,0x3d,0x30,0x78,0x25,0x30,0x38,0x78,0x00,
54521 +0x0a,0x0d,0x54,0x58,0x4c,0x4c,0x54,0x09,0x09,0x4e,0x45,0x58,0x54,0x20,0x20,0x20,
54522 +0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x4e,0x45,0x58,0x54,0x0a,0x0d,0x00,
54523 +0x0a,0x0d,0x20,0x50,0x61,0x67,0x65,0x25,0x33,0x64,0x09,0x00,0x25,0x34,0x64,0x20,
54524 +0x20,0x20,0x20,0x00,0x25,0x34,0x64,0x20,0x20,0x20,0x20,0x09,0x00,0x00,0x00,0x00,
54525 +0x0a,0x0d,0x54,0x58,0x4f,0x51,0x54,0x09,0x09,0x48,0x65,0x61,0x64,0x20,0x20,0x20,
54526 +0x20,0x54,0x61,0x69,0x6c,0x20,0x20,0x20,0x20,0x48,0x65,0x61,0x64,0x20,0x20,0x20,
54527 +0x20,0x54,0x61,0x69,0x6c,0x0a,0x0d,0x00,0x0a,0x0d,0x55,0x6e,0x6b,0x6e,0x6f,0x77,
54528 +0x20,0x63,0x6f,0x6d,0x6d,0x61,0x6e,0x64,0x00,0x00,0x00,0x00,0x0a,0x0d,0x45,0x72,
54529 +0x72,0x20,0x41,0x72,0x67,0x0a,0x0d,0x55,0x53,0x41,0x47,0x45,0x3a,0x00,0x00,0x00,
54530 +0x10,0x00,0x08,0x00,0x02,0xe9,0x01,0x74,0x02,0xab,0x01,0xc7,0x01,0x55,0x00,0xe4,
54531 +0x00,0xab,0x00,0x72,0x00,0x55,0x00,0x4c,0x00,0x4c,0x00,0x4c,0x00,0x4c,0x00,0x4c,
54532 +0x02,0x76,0x01,0x3b,0x00,0xd2,0x00,0x9e,0x00,0x69,0x00,0x4f,0x00,0x46,0x00,0x3f,
54533 +0x01,0x3b,0x00,0x9e,0x00,0x69,0x00,0x4f,0x00,0x35,0x00,0x27,0x00,0x23,0x00,0x20,
54534 +0x01,0x2f,0x00,0x98,0x00,0x65,0x00,0x4c,0x00,0x33,0x00,0x26,0x00,0x22,0x00,0x1e,
54535 +0x00,0x98,0x00,0x4c,0x00,0x33,0x00,0x26,0x00,0x19,0x00,0x13,0x00,0x11,0x00,0x0f,
54536 +0x02,0x39,0x01,0x1c,0x00,0xbd,0x00,0x8e,0x00,0x5f,0x00,0x47,0x00,0x3f,0x00,0x39,
54537 +0x01,0x1c,0x00,0x8e,0x00,0x5f,0x00,0x47,0x00,0x2f,0x00,0x23,0x00,0x20,0x00,0x1c,
54538 +0x01,0x11,0x00,0x89,0x00,0x5b,0x00,0x44,0x00,0x2e,0x00,0x22,0x00,0x1e,0x00,0x1b,
54539 +0x00,0x89,0x00,0x44,0x00,0x2e,0x00,0x22,0x00,0x17,0x00,0x11,0x00,0x0f,0x00,0x0e,
54540 +0x02,0xab,0x02,0xab,0x02,0x66,0x02,0x66,0x07,0x06,0x06,0x06,0x05,0x06,0x07,0x08,
54541 +0x04,0x06,0x07,0x08,0x09,0x0a,0x0b,0x0b,0x49,0x6e,0x74,0x00,0x00,0x00,0x00,0x00,
54542 +0x00,0x00,0x54,0x4c,0x42,0x4d,0x4f,0x44,0x00,0x00,0x00,0x00,0x54,0x4c,0x42,0x4c,
54543 +0x5f,0x64,0x61,0x74,0x61,0x00,0x54,0x4c,0x42,0x53,0x00,0x00,0x00,0x00,0x00,0x00,
54544 +0x41,0x64,0x45,0x4c,0x5f,0x64,0x61,0x74,0x61,0x00,0x41,0x64,0x45,0x53,0x00,0x00,
54545 +0x00,0x00,0x00,0x00,0x45,0x78,0x63,0x43,0x6f,0x64,0x65,0x36,0x00,0x00,0x45,0x78,
54546 +0x63,0x43,0x6f,0x64,0x65,0x37,0x00,0x00,0x53,0x79,0x73,0x00,0x00,0x00,0x00,0x00,
54547 +0x00,0x00,0x42,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x52,0x49,0x00,0x00,
54548 +0x00,0x00,0x00,0x00,0x00,0x00,0x43,0x70,0x55,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
54549 +0x4f,0x76,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
54550 +0x80,0x01,0x14,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x00,0x00,0x00,0x10,
54551 +0x00,0x00,0x00,0x2c,0x00,0x00,0x00,0x58,0x00,0x00,0x00,0x30,0x00,0x00,0x00,0x48,
54552 +0x00,0x00,0x00,0x60,0x00,0x00,0x00,0x90,0x00,0x00,0x00,0xc0,0x00,0x00,0x01,0x20,
54553 +0x00,0x00,0x01,0x20,0x00,0x00,0x01,0x20,0x00,0x00,0x00,0x68,0x00,0x00,0x00,0xd0,
54554 +0x00,0x00,0x01,0x38,0x00,0x00,0x01,0xa0,0x00,0x00,0x02,0x70,0x00,0x00,0x03,0x40,
54555 +0x00,0x00,0x03,0xa8,0x00,0x00,0x04,0x10,0x00,0x00,0x00,0xd0,0x00,0x00,0x01,0xa0,
54556 +0x00,0x00,0x02,0x70,0x00,0x00,0x03,0x40,0x00,0x00,0x04,0xe0,0x00,0x00,0x06,0x80,
54557 +0x00,0x00,0x07,0x50,0x00,0x00,0x08,0x20,0x01,0x01,0x01,0x02,0x01,0x01,0x02,0x02,
54558 +0x03,0x03,0x04,0x04,0x01,0x02,0x02,0x04,0x04,0x06,0x07,0x08,0x02,0x04,0x04,0x07,
54559 +0x07,0x0b,0x0d,0x0e,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
54560 +0x00,0x00,0x00,0x00,0x3c,0x4e,0x55,0x4c,0x4c,0x3e,0x00,0x00,0x30,0x31,0x32,0x33,
54561 +0x34,0x35,0x36,0x37,0x38,0x39,0x61,0x62,0x63,0x64,0x65,0x66,0x67,0x68,0x69,0x6a,
54562 +0x6b,0x6c,0x6d,0x6e,0x6f,0x70,0x71,0x72,0x73,0x74,0x75,0x76,0x77,0x78,0x79,0x7a,
54563 +0x00,0x00,0x00,0x00,0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x37,0x38,0x39,0x41,0x42,
54564 +0x43,0x44,0x45,0x46,0x47,0x48,0x49,0x4a,0x4b,0x4c,0x4d,0x4e,0x4f,0x50,0x51,0x52,
54565 +0x53,0x54,0x55,0x56,0x57,0x58,0x59,0x5a,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
54566 +0x00,0x00,0x00,0x00,0x5b,0x52,0x58,0x5d,0x20,0x70,0x6b,0x74,0x5f,0x6c,0x65,0x6e,
54567 +0x3d,0x25,0x64,0x20,0x6f,0x66,0x66,0x73,0x65,0x74,0x3d,0x25,0x64,0x20,0x73,0x74,
54568 +0x61,0x72,0x74,0x5f,0x61,0x64,0x64,0x72,0x3d,0x25,0x30,0x38,0x78,0x0a,0x0d,0x00,
54569 +0x00,0x00,0x00,0x00,0x80,0x00,0x07,0x6c,0x80,0x00,0x07,0x80,0x80,0x00,0x07,0x80,
54570 +0x80,0x00,0x07,0x70,0x80,0x00,0x07,0x70,0x80,0x00,0x07,0x94,0x80,0x00,0x75,0x98,
54571 +0x80,0x00,0x75,0xec,0x80,0x00,0x76,0x08,0x80,0x00,0x76,0xf4,0x80,0x00,0x77,0xac,
54572 +0x80,0x00,0x77,0xfc,0x80,0x00,0x78,0x68,0x80,0x00,0x79,0x6c,0x80,0x00,0x79,0xa0,
54573 +0x80,0x00,0x79,0xb4,0x80,0x00,0x79,0xc8,0x80,0x00,0x7a,0x74,0x80,0x00,0x7a,0xb0,
54574 +0x80,0x00,0x7b,0x60,0x80,0x00,0x7b,0x88,0x80,0x00,0x75,0x54,0x80,0x00,0x7b,0x9c,
54575 +0x80,0x00,0x82,0x28,0x80,0x00,0x82,0xa0,0x80,0x00,0x82,0xac,0x80,0x00,0x82,0xb8,
54576 +0x80,0x00,0x82,0x40,0x80,0x00,0x82,0x40,0x80,0x00,0x82,0x40,0x80,0x00,0x82,0x40,
54577 +0x80,0x00,0x82,0x40,0x80,0x00,0x82,0x40,0x80,0x00,0x82,0x40,0x80,0x00,0x82,0x40,
54578 +0x80,0x00,0x82,0x40,0x80,0x00,0x82,0x40,0x80,0x00,0x82,0x40,0x80,0x00,0x82,0x40,
54579 +0x80,0x00,0x82,0xc4,0x80,0x00,0x82,0xd0,0x80,0x00,0x82,0xdc,0x80,0x00,0xa5,0x50,
54580 +0x80,0x00,0xa5,0x50,0x80,0x00,0xa5,0x50,0x80,0x00,0xa5,0x50,0x80,0x00,0xa5,0x50,
54581 +0x80,0x00,0xa5,0x84,0x80,0x00,0xa5,0xf4,0x80,0x00,0xa6,0x1c,0x80,0x00,0xa6,0xf8,
54582 +0x80,0x00,0xa6,0xf8,0x80,0x00,0xa6,0xf8,0x80,0x00,0xa6,0xf8,0x80,0x00,0xa6,0xf8,
54583 +0x80,0x00,0xa6,0x30,0x80,0x00,0xa6,0x94,0x80,0x00,0xa6,0xc4,0x80,0x00,0xa6,0xf8,
54584 +0x80,0x00,0xa6,0xf8,0x80,0x00,0xa6,0xf8,0x80,0x00,0xa6,0xf8,0x80,0x00,0xa6,0xd0,
54585 +0x80,0x00,0xa7,0x2c,0x80,0x00,0xa7,0x40,0x80,0x00,0xa4,0xac,0x80,0x00,0xaa,0x50,
54586 +0x80,0x00,0xaa,0x50,0x80,0x00,0xaa,0x50,0x80,0x00,0xaa,0x50,0x80,0x00,0xaa,0x50,
54587 +0x80,0x00,0xaa,0x84,0x80,0x00,0xaa,0xf4,0x80,0x00,0xab,0x1c,0x80,0x00,0xab,0xf8,
54588 +0x80,0x00,0xab,0xf8,0x80,0x00,0xab,0xf8,0x80,0x00,0xab,0xf8,0x80,0x00,0xab,0xf8,
54589 +0x80,0x00,0xab,0x30,0x80,0x00,0xab,0x94,0x80,0x00,0xab,0xc4,0x80,0x00,0xab,0xf8,
54590 +0x80,0x00,0xab,0xf8,0x80,0x00,0xab,0xf8,0x80,0x00,0xab,0xf8,0x80,0x00,0xab,0xd0,
54591 +0x80,0x00,0xac,0x2c,0x80,0x00,0xac,0x40,0x80,0x00,0xa8,0x88,0x80,0x00,0xb9,0x8c,
54592 +0x80,0x00,0xb9,0xa4,0x80,0x00,0xb9,0xa4,0x80,0x00,0xb9,0x94,0x80,0x00,0xb9,0xa4,
54593 +0x80,0x00,0xb9,0xa4,0x80,0x00,0xb9,0xa4,0x80,0x00,0xb9,0xa4,0x80,0x00,0xb9,0xa4,
54594 +0x80,0x00,0xb9,0xa4,0x80,0x00,0xb9,0xa4,0x80,0x00,0xb9,0x9c,0x80,0x00,0xb9,0xa4,
54595 +0x80,0x00,0xb9,0x84,0x80,0x00,0xb9,0xa4,0x80,0x00,0xb9,0xa4,0x80,0x00,0xbd,0xcc,
54596 +0x80,0x00,0xba,0xbc,0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,
54597 +0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,
54598 +0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,
54599 +0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,
54600 +0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,
54601 +0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,
54602 +0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,
54603 +0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,
54604 +0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,
54605 +0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,
54606 +0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,
54607 +0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,
54608 +0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,0x80,0x00,0xba,0xc8,
54609 +0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,
54610 +0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,
54611 +0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,0x80,0x00,0xba,0x50,0x80,0x00,0xbb,0x9c,
54612 +0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,
54613 +0x80,0x00,0xbb,0x9c,0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,
54614 +0x80,0x00,0xbc,0xd4,0x80,0x00,0xbb,0xa4,0x80,0x00,0xbb,0xc4,0x80,0x00,0xbb,0xcc,
54615 +0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0x24,0x80,0x00,0xbc,0xd4,
54616 +0x80,0x00,0xba,0xd0,0x80,0x00,0xbc,0xd4,0x80,0x00,0xbc,0xd4,0x80,0x00,0xba,0xcc,
54617 +};
54618 +
54619 +#endif //__INC_R819XU_FIRMWARE_IMG_H
Peter's tree of IPFire 2.x