From 05bd7298d6576e7bd28c64040dd3315d6d125920 Mon Sep 17 00:00:00 2001 From: Michael Tremer Date: Thu, 19 Mar 2015 15:01:00 +0100 Subject: [PATCH] fireinfo: Fix signature strings --- webapp/backend/fireinfo.py | 63 +++++++++++++++++++++++++++++++++----- webapp/backend/iuse.py | 2 +- 2 files changed, 56 insertions(+), 9 deletions(-) diff --git a/webapp/backend/fireinfo.py b/webapp/backend/fireinfo.py index beeced8..0773c52 100644 --- a/webapp/backend/fireinfo.py +++ b/webapp/backend/fireinfo.py @@ -31,21 +31,31 @@ CPU_VENDORS = { } CPU_STRINGS = ( - # AMD + ### AMD ### + # APU + (r"AMD (\w+) APU with Radeon(tm) HD Graphics", r"AMD \1 APU"), + # Athlon + (r"AMD Athlon.* II X2 ([a-z0-9]+).*", r"AMD Athlon X2 \1"), + (r"AMD Athlon\(tm\) 64 Processor (\w+)", r"AMD Athlon64 \1"), + (r"AMD Athlon\(tm\) 64 X2 Dual Core Processor (\w+)", r"AMD Athlon64 X2 \1"), (r"(AMD Athlon).*(XP).*", r"\1 \2"), (r"(AMD Phenom).* ([0-9]+) .*", r"\1 \2"), (r"(AMD Phenom).*", r"\1"), (r"(AMD Sempron).*", r"\1"), - (r"AMD Athlon.* II X2 ([a-z0-9]+).*", r"AMD Athlon X2 \1"), + # Geode + (r"Geode\(TM\) Integrated Processor by AMD PCS", r"AMD Geode"), (r"(Geode).*", r"\1"), # Intel (r"Intel\(R\) (Atom|Celeron).*CPU\s*([A-Z0-9]+) .*", r"Intel \1 \2"), (r"(Intel).*(Celeron).*", r"\1 \2"), - (r"Intel.* Core.*2 Duo *CPU .* ([A-Z0-9]+) .*", r"Intel C2D \1"), - (r"Intel.* Core.*2 CPU .* ([A-Z0-9]+) .*", r"Intel C2 \1"), - (r"Intel.* Core.*2 Quad *CPU .* ([A-Z0-9]+) .*", r"Intel C2Q \1"), - (r"Intel.* Xeon.* CPU .* ([A-Z0-9]+) .*", r"Intel Xeon \1"), + (r"Intel\(R\)? Core\(TM\)?2 Duo *CPU .* ([A-Z0-9]+) .*", r"Intel C2D \1"), + (r"Intel\(R\)? Core\(TM\)?2 Duo CPU (\w+)", r"Intel C2D \1"), + (r"Intel\(R\)? Core\(TM\)?2 CPU .* ([A-Z0-9]+) .*", r"Intel C2 \1"), + (r"Intel\(R\)? Core\(TM\)?2 Quad *CPU .* ([A-Z0-9]+) .*", r"Intel C2Q \1"), + (r"Intel\(R\)? Core\(TM\)? (i[753]\-\w+) CPU", r"Intel Core \1"), + (r"Intel\(R\)? Xeon\(R\)? CPU (\w+) (0|v\d+)", r"Intel Xeon \1 \2"), + (r"Intel\(R\)? Xeon\(R\)? CPU\s+(\w+)", r"Intel Xeon \1"), (r"(Intel).*(Xeon).*", r"\1 \2"), (r"Intel.* Pentium.* (D|4) .*", r"Intel Pentium \1"), (r"Intel.* Pentium.* Dual .* ([A-Z0-9]+) .*", r"Intel Pentium Dual \1"), @@ -53,6 +63,9 @@ CPU_STRINGS = ( (r"(Pentium I{2,3}).*", r"Intel \1"), (r"(Celeron \(Coppermine\))", r"Intel Celeron"), + # NSC + (r"Geode\(TM\) Integrated Processor by National Semi", r"NSC Geode"), + # VIA (r"(VIA \w*).*", r"\1"), @@ -225,15 +238,34 @@ class Processor(Object): def format_model(self): s = self.model_string + + # Remove everything after the @: Intel(R) Core(TM) i7-3770 CPU @ 3.40GHz + s, sep, rest = s.partition("@") + for pattern, repl in CPU_STRINGS: if re.match(pattern, s) is None: continue - return re.sub(pattern, repl, s) + + s = re.sub(pattern, repl, s) + break # Otherwise remove the symbols - for i in ("C", "R", "TM"): + for i in ("C", "R", "TM", "tm"): s = s.replace("(%s)" % i, "") + # Replace too long strings with shorter ones + pairs = ( + ("Quad-Core Processor", ""), + ("Dual-Core Processor", ""), + ("Processor", "CPU"), + ("processor", "CPU"), + ) + for k, v in pairs: + s = s.replace(k, v) + + # Remove too many spaces + s = " ".join((e for e in s.split() if e)) + return s @property @@ -956,6 +988,21 @@ class Profile(Object): return r + @property + def release_short(self): + pairs = ( + (r"Release Candidate (\d+)", r"RC\1"), + ) + + s = self.release + for pattern, repl in pairs: + if re.search(pattern, s) is None: + continue + + s = re.sub(pattern, repl, s) + + return s + # Virtual @property diff --git a/webapp/backend/iuse.py b/webapp/backend/iuse.py index ae890f4..5faadcc 100644 --- a/webapp/backend/iuse.py +++ b/webapp/backend/iuse.py @@ -147,7 +147,7 @@ class Image1(ImageObject): def draw(self): _ = self.locale.translate - line1 = [_("%s on %s") % (self.profile.release, self.profile.arch),] + line1 = [_("%s on %s") % (self.profile.release_short, self.profile.arch),] line2 = [] # Show the appliance model in the second line if available -- 2.39.2