src/patches/suse-2.6.27.25/patches.arch/x86-disable-AMD-ATI-boot-interrupt-generation.patch

   1 From: Olaf Dabrunz <od@suse.de>
   2
   3 Subject: Disable AMD/ATI legacy boot interrupt generation
   4
   5 Add quirks for several AMD/ATI chipsets to prevent generation of legacy boot
   6 interrupts.
   7
   8 Integrates a separate older quirk to make IO-APIC mode work on AMD 8131 rev. A0
   9 and B0, which was due to an AMD erratum.
  10
  11 Signed-off-by: Olaf Dabrunz <od@suse.de>
  12 Signed-off-by: Stefan Assmann <sassmann@suse.de>
  13 ---
  14  drivers/pci/quirks.c |   71 +++++++++++++++++++++++++++++++++++----------------
  15  1 file changed, 50 insertions(+), 21 deletions(-)
  16
  17 --- a/drivers/pci/quirks.c
  18 +++ b/drivers/pci/quirks.c
  19 @@ -603,27 +603,6 @@ static void __init quirk_ioapic_rmw(stru
  20                 sis_apic_bug = 1;
  21  }
  22  DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SI,      PCI_ANY_ID,                     quirk_ioapic_rmw);
  23 -
  24 -#define AMD8131_revA0        0x01
  25 -#define AMD8131_revB0        0x11
  26 -#define AMD8131_MISC         0x40
  27 -#define AMD8131_NIOAMODE_BIT 0
  28 -static void quirk_amd_8131_ioapic(struct pci_dev *dev)
  29 -{
  30 -        unsigned char tmp;
  31 -
  32 -        if (nr_ioapics == 0)
  33 -                return;
  34 -
  35 -        if (dev->revision == AMD8131_revA0 || dev->revision == AMD8131_revB0) {
  36 -                dev_info(&dev->dev, "Fixing up AMD8131 IOAPIC mode\n");
  37 -                pci_read_config_byte( dev, AMD8131_MISC, &tmp);
  38 -                tmp &= ~(1 << AMD8131_NIOAMODE_BIT);
  39 -                pci_write_config_byte( dev, AMD8131_MISC, tmp);
  40 -        }
  41 -}
  42 -DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_BRIDGE, quirk_amd_8131_ioapic);
  43 -DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_BRIDGE, quirk_amd_8131_ioapic);
  44  #endif /* CONFIG_X86_IO_APIC */
  45
  46  /*
  47 @@ -1509,6 +1488,56 @@ static void quirk_disable_broadcom_boot_
  48                         "0x%04x:0x%04x\n", dev->vendor, dev->device);
  49  }
  50  DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS,   PCI_DEVICE_ID_SERVERWORKS_HT1000SB,       quirk_disable_broadcom_boot_interrupt);
  51 +
  52 +/*
  53 + * disable boot interrupts on AMD and ATI chipsets
  54 + */
  55 +/*
  56 + * NOIOAMODE needs to be disabled to disable "boot interrupts". For AMD 8131
  57 + * rev. A0 and B0, NOIOAMODE needs to be disabled anyway to fix IO-APIC mode
  58 + * (due to an erratum).
  59 + */
  60 +#define AMD_813X_MISC                  0x40
  61 +#define AMD_813X_NOIOAMODE             (1<<0)
  62 +
  63 +static void quirk_disable_amd_813x_boot_interrupt(struct pci_dev *dev)
  64 +{
  65 +       u32 pci_config_dword;
  66 +
  67 +       if (noioapicquirk)
  68 +               return;
  69 +
  70 +       pci_read_config_dword(dev, AMD_813X_MISC, &pci_config_dword);
  71 +       pci_config_dword &= ~AMD_813X_NOIOAMODE;
  72 +       pci_write_config_dword(dev, AMD_813X_MISC, pci_config_dword);
  73 +
  74 +       printk(KERN_INFO "disabled boot interrupts on PCI device "
  75 +                       "0x%04x:0x%04x\n", dev->vendor, dev->device);
  76 +}
  77 +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AMD,   PCI_DEVICE_ID_AMD_8131_BRIDGE,    quirk_disable_amd_813x_boot_interrupt);
  78 +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AMD,   PCI_DEVICE_ID_AMD_8132_BRIDGE,    quirk_disable_amd_813x_boot_interrupt);
  79 +
  80 +#define AMD_8111_PCI_IRQ_ROUTING       0x56
  81 +
  82 +static void quirk_disable_amd_8111_boot_interrupt(struct pci_dev *dev)
  83 +{
  84 +       u16 pci_config_word;
  85 +
  86 +       if (noioapicquirk)
  87 +               return;
  88 +
  89 +       pci_read_config_word(dev, AMD_8111_PCI_IRQ_ROUTING, &pci_config_word);
  90 +       if (!pci_config_word) {
  91 +               printk(KERN_INFO "boot interrupts on PCI device 0x%04x:0x%04x "
  92 +                               "already disabled\n",
  93 +                               dev->vendor, dev->device);
  94 +               return;
  95 +       }
  96 +       pci_write_config_word(dev, AMD_8111_PCI_IRQ_ROUTING, 0);
  97 +       printk(KERN_INFO "disabled boot interrupts on PCI device "
  98 +                       "0x%04x:0x%04x\n", dev->vendor, dev->device);
  99 +}
 100 +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AMD,   PCI_DEVICE_ID_AMD_8111_SMBUS,     quirk_disable_amd_8111_boot_interrupt);
 101  #endif /* CONFIG_X86_IO_APIC */
 102
 103  /*