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Updated xen patches taken from suse.
[people/teissler/ipfire-2.x.git] / src / patches / suse-2.6.27.25 / patches.suse / suse-ppc32-mol-BIT
1 Subject: mol build fix
2 From: schwab@suse.de
3
4 ---
5 drivers/macintosh/mol/context.c | 4 -
6 drivers/macintosh/mol/emu.c | 2
7 drivers/macintosh/mol/fault.c | 20 +++----
8 drivers/macintosh/mol/include/asmdbg.h | 2
9 drivers/macintosh/mol/include/asmdefs.h | 2
10 drivers/macintosh/mol/include/mac_registers.h | 20 +++----
11 drivers/macintosh/mol/include/processor.h | 66 +++++++++++++-------------
12 drivers/macintosh/mol/mmu_fb.c | 2
13 drivers/macintosh/mol/mmu_io.c | 6 +-
14 drivers/macintosh/mol/mtable.c | 12 ++--
15 drivers/macintosh/mol/ptaccess.c | 6 +-
16 11 files changed, 71 insertions(+), 71 deletions(-)
17
18 --- a/drivers/macintosh/mol/context.c
19 +++ b/drivers/macintosh/mol/context.c
20 @@ -37,9 +37,9 @@ flush_all_PTEs( kernel_vars_t *kv )
21
22 for( pte=ptehash.base, i=0; i<npte; i++, pte+=2 ) {
23 v = *pte;
24 - if( !(v & BIT(0)) ) /* test V-bit */
25 + if( !(v & MOL_BIT(0)) ) /* test V-bit */
26 continue;
27 - v = (v & ~BIT(0)) >> 7;
28 + v = (v & ~MOL_BIT(0)) >> 7;
29 v = (v - ((v & 0xf) * MUNGE_ESID_ADD)) * MUNGE_MUL_INVERSE;
30 v = (v>>4) & CTX_MASK;
31
32 --- a/drivers/macintosh/mol/emu.c
33 +++ b/drivers/macintosh/mol/emu.c
34 @@ -60,7 +60,7 @@ do_mtsdr1( kernel_vars_t *kv, ulong valu
35 /* the mask must be a valid one; we hade better make sure we are
36 * not tricked by a bogus sdr1 value
37 */
38 - for( mask=BIT(23); mask && !(mask & value) ; mask=mask>>1 )
39 + for( mask=MOL_BIT(23); mask && !(mask & value) ; mask=mask>>1 )
40 ;
41 mask = mask? ((mask | (mask-1)) << 16) | 0xffff : 0xffff;
42 mbase = value & ~mask;
43 --- a/drivers/macintosh/mol/fault.c
44 +++ b/drivers/macintosh/mol/fault.c
45 @@ -31,10 +31,10 @@
46 #include "hash.h"
47
48 /* exception bits (srr1/dsisr and a couple of mol defined bits) */
49 -#define EBIT_PAGE_FAULT BIT(1) /* I/D, PTE missing */
50 -#define EBIT_NO_EXEC BIT(3) /* I, no-execute or guarded */
51 -#define EBIT_PROT_VIOL BIT(4) /* I/D, protection violation */
52 -#define EBIT_IS_WRITE BIT(6) /* D */
53 +#define EBIT_PAGE_FAULT MOL_BIT(1) /* I/D, PTE missing */
54 +#define EBIT_NO_EXEC MOL_BIT(3) /* I, no-execute or guarded */
55 +#define EBIT_PROT_VIOL MOL_BIT(4) /* I/D, protection violation */
56 +#define EBIT_IS_WRITE MOL_BIT(6) /* D */
57 #define EBIT_IS_DSI 1 /* D, virtual bit */
58 #define EBIT_USE_MMU 2 /* I/D, virtual bit */
59
60 @@ -135,7 +135,7 @@ lookup_603_pte( kernel_vars_t *kv, ulong
61 MREGS.spr[S_HASH2] = MMU.hash_mbase + (pteg ^ (mask << 6));
62
63 /* construct compare word */
64 - cmp = BIT(0) | (vsid <<7) | (cmp_ea >> 22);
65 + cmp = MOL_BIT(0) | (vsid <<7) | (cmp_ea >> 22);
66 if( is_dsi ) {
67 MREGS.spr[S_DCMP] = cmp;
68 MREGS.spr[S_DMISS] = ea;
69 @@ -167,7 +167,7 @@ lookup_mac_pte( kernel_vars_t *kv, ulong
70 pteg = ((phash & mask) << 6);
71
72 /* construct compare word */
73 - cmp = BIT(0) | (vsid <<7) | ((ea&0x0fffffff)>>22);
74 + cmp = MOL_BIT(0) | (vsid <<7) | ((ea&0x0fffffff)>>22);
75
76 /* look in primary PTEG */
77 p = (ulong*)((ulong)MMU.hash_base + pteg);
78 @@ -177,7 +177,7 @@ lookup_mac_pte( kernel_vars_t *kv, ulong
79
80 /* look in secondary PTEG */
81 p = (ulong*)( (ulong)MMU.hash_base + (pteg ^ (mask << 6)) );
82 - cmp |= BIT(25);
83 + cmp |= MOL_BIT(25);
84
85 for( i=0; i<8; i++,p+=2 )
86 if( cmp == *p )
87 @@ -300,7 +300,7 @@ find_pte_slot( ulong ea, ulong *pte0, in
88
89 /* look in secondary PTEG */
90 p = secondary;
91 - cmp |= BIT(25);
92 + cmp |= MOL_BIT(25);
93 for( i=0; i<8; i++, p+=2 )
94 if( cmp == *p ) {
95 *pte0 |= PTE0_H;
96 @@ -314,12 +314,12 @@ find_pte_slot( ulong ea, ulong *pte0, in
97
98 /* free slot in primary PTEG? */
99 for( p=primary, i=0; i<8; i++, p+=2 )
100 - if( !(*p & BIT(0)) )
101 + if( !(*p & MOL_BIT(0)) )
102 return p;
103
104 /* free slot in secondary PTEG? */
105 for( p=secondary, i=0; i<8; i++, p+=2 )
106 - if( !(*p & BIT(0)) ) {
107 + if( !(*p & MOL_BIT(0)) ) {
108 *pte0 |= PTE0_H;
109 return p;
110 }
111 --- a/drivers/macintosh/mol/include/asmdbg.h
112 +++ b/drivers/macintosh/mol/include/asmdbg.h
113 @@ -124,7 +124,7 @@ MACRO(PERF_MONITOR_GET, [
114 lwz r5,xDEBUG_SCR1(r1)
115 ])
116 MACRO(PERF_MONITOR_SETUP, [scr], [
117 - LOADI _scr,BIT(2) | BIT(3) | BIT(31) // count in SV-mode if PM is zero.
118 + LOADI _scr,MOL_BIT(2) | MOL_BIT(3) | MOL_BIT(31) // count in SV-mode if PM is zero.
119 mtspr S_MMCR0,_scr
120 li _scr,0
121 mtspr S_MMCR1,_scr
122 --- a/drivers/macintosh/mol/include/asmdefs.h
123 +++ b/drivers/macintosh/mol/include/asmdefs.h
124 @@ -391,7 +391,7 @@ MACRO(ori_, [reg1, reg2, value], [
125 #define EXTERN( name ) _##name
126 #endif
127
128 -#define BIT(n) (1<<(31-(n)))
129 +#define MOL_BIT(n) (1<<(31-(n)))
130
131 #endif /* _H_ASMDEFS */
132
133 --- a/drivers/macintosh/mol/include/mac_registers.h
134 +++ b/drivers/macintosh/mol/include/mac_registers.h
135 @@ -111,7 +111,7 @@ typedef struct mac_regs { /* this stru
136
137 #define NUM_MREGS_PAGES ((sizeof(mac_regs_t)+0xfff)/0x1000)
138
139 -#define BIT(n) (1U<<(31-(n))) /* bit 0 is MSB */
140 +#define MOL_BIT(n) (1U<<(31-(n))) /* bit 0 is MSB */
141
142 #ifndef __KERNEL__
143 extern mac_regs_t *mregs;
144 @@ -152,17 +152,17 @@ extern mac_regs_t *mregs;
145
146
147 #ifdef __KERNEL__
148 -#define fb_DbgTrace BIT( FBIT_DbgTrace )
149 -#define fb_Trace BIT( FBIT_Trace )
150 -#define fb_PrepareSplitmode BIT( FBIT_PrepareSplitmode )
151 -#define fb_InSplitmode BIT( FBIT_InSplitmode )
152 -#define fb_LoadSegreg BIT( FBIT_LoadSegreg )
153 +#define fb_DbgTrace MOL_BIT( FBIT_DbgTrace )
154 +#define fb_Trace MOL_BIT( FBIT_Trace )
155 +#define fb_PrepareSplitmode MOL_BIT( FBIT_PrepareSplitmode )
156 +#define fb_InSplitmode MOL_BIT( FBIT_InSplitmode )
157 +#define fb_LoadSegreg MOL_BIT( FBIT_LoadSegreg )
158 #endif
159 -#define fb_MsrModified BIT( FBIT_MsrModified )
160 -#define fb_RecalcDecInt BIT( FBIT_RecalcDecInt )
161 -#define fb_IRQPending BIT( FBIT_IRQPending )
162 +#define fb_MsrModified MOL_BIT( FBIT_MsrModified )
163 +#define fb_RecalcDecInt MOL_BIT( FBIT_RecalcDecInt )
164 +#define fb_IRQPending MOL_BIT( FBIT_IRQPending )
165 #ifdef EMULATE_603
166 -#define fb_603_AltGPR BIT( FBIT_603_AltGPR )
167 +#define fb_603_AltGPR MOL_BIT( FBIT_603_AltGPR )
168 #endif
169
170 #endif /* _MAC_REGISTERS_H */
171 --- a/drivers/macintosh/mol/include/processor.h
172 +++ b/drivers/macintosh/mol/include/processor.h
173 @@ -18,16 +18,16 @@
174
175
176 #define PTE0_VSID(s) (((s)>>7) & 0xffffff)
177 -#define PTE0_V BIT(0)
178 -#define PTE0_H BIT(25)
179 +#define PTE0_V MOL_BIT(0)
180 +#define PTE0_H MOL_BIT(25)
181 #define PTE0_API 0x3f
182
183 -#define PTE1_R BIT(23)
184 -#define PTE1_C BIT(24)
185 -#define PTE1_W BIT(25)
186 -#define PTE1_I BIT(26)
187 -#define PTE1_M BIT(27)
188 -#define PTE1_G BIT(28)
189 +#define PTE1_R MOL_BIT(23)
190 +#define PTE1_C MOL_BIT(24)
191 +#define PTE1_W MOL_BIT(25)
192 +#define PTE1_I MOL_BIT(26)
193 +#define PTE1_M MOL_BIT(27)
194 +#define PTE1_G MOL_BIT(28)
195 #ifdef CONFIG_AMIGAONE
196 /* Memory coherence locks up A1 compatible systems. */
197 #define PTE1_WIMG (PTE1_W | PTE1_I | PTE1_G)
198 @@ -37,9 +37,9 @@
199 #define PTE1_PP 0x3
200 #define PTE1_RPN (~0xfffUL)
201
202 -#define VSID_Ks BIT(1)
203 -#define VSID_Kp BIT(2)
204 -#define VSID_N BIT(3)
205 +#define VSID_Ks MOL_BIT(1)
206 +#define VSID_Kp MOL_BIT(2)
207 +#define VSID_N MOL_BIT(3)
208
209
210
211 @@ -236,30 +236,30 @@
212 #define HID0_BHT (1<<2) /* Branch History Table Enable */
213 #define HID0_BTCD (1<<1) /* Branch target cache disable */
214
215 -#define L2CR_L2E BIT(0) /* L2 enable */
216 -#define L2CR_L2PE BIT(1) /* L2 data parity generation and checking */
217 -#define L2CR_L2SIZ_512K BIT(2)
218 -#define L2CR_L2SIZ_256K BIT(3)
219 -#define L2CR_L2SIZ_1MB (BIT(2)|BIT(3))
220 -#define L2CR_L2CLK_1 BIT(6) /* L2 clock ration */
221 -#define L2CR_L2CLK_15 (BIT(6)*2)
222 -#define L2CR_L2CLK_2 (BIT(6)*4)
223 -#define L2CR_L2CLK_25 (BIT(6)*5)
224 -#define L2CR_L2CLK_3 (BIT(6)*6)
225 +#define L2CR_L2E MOL_BIT(0) /* L2 enable */
226 +#define L2CR_L2PE MOL_BIT(1) /* L2 data parity generation and checking */
227 +#define L2CR_L2SIZ_512K MOL_BIT(2)
228 +#define L2CR_L2SIZ_256K MOL_BIT(3)
229 +#define L2CR_L2SIZ_1MB (MOL_BIT(2)|MOL_BIT(3))
230 +#define L2CR_L2CLK_1 MOL_BIT(6) /* L2 clock ration */
231 +#define L2CR_L2CLK_15 (MOL_BIT(6)*2)
232 +#define L2CR_L2CLK_2 (MOL_BIT(6)*4)
233 +#define L2CR_L2CLK_25 (MOL_BIT(6)*5)
234 +#define L2CR_L2CLK_3 (MOL_BIT(6)*6)
235 #define L2CR_L2RAM_FT 0 /* flow-through (reg-buf) synchronous SRAM */
236 -#define L2CR_L2RAM_PB BIT(7) /* Piplined (reg-reg) synchronous burst SRAM */
237 -#define L2CR_L2RAM_PLW (BIT(7)|BIT(8)) /* Piplined (reg-reg) synchronous late-write */
238 -#define L2CR_L2DO BIT(9) /* L2 data-only */
239 -#define L2CR_L2I BIT(10) /* L2 global invalidate */
240 -#define L2CR_L2CTL BIT(11) /* L2 RAM control (ZZ enable, low-power mode) */
241 -#define L2CR_L2WT BIT(12) /* L2 write-through */
242 -#define L2CR_L2TS BIT(13) /* L2 test support */
243 +#define L2CR_L2RAM_PB MOL_BIT(7) /* Piplined (reg-reg) synchronous burst SRAM */
244 +#define L2CR_L2RAM_PLW (MOL_BIT(7)|MOL_BIT(8)) /* Piplined (reg-reg) synchronous late-write */
245 +#define L2CR_L2DO MOL_BIT(9) /* L2 data-only */
246 +#define L2CR_L2I MOL_BIT(10) /* L2 global invalidate */
247 +#define L2CR_L2CTL MOL_BIT(11) /* L2 RAM control (ZZ enable, low-power mode) */
248 +#define L2CR_L2WT MOL_BIT(12) /* L2 write-through */
249 +#define L2CR_L2TS MOL_BIT(13) /* L2 test support */
250 #define L2CR_L2OH_05 0 /* L2 output hold 0.5 nS */
251 -#define L2CR_L2OH_10 BIT(15) /* L2 output hold 1.0 nS */
252 -#define L2CR_L2SL BIT(16) /* L2 DLL slow (use if bus freq < 150 MHz) */
253 -#define L2CR_L2DF BIT(17) /* L2 differential clock */
254 -#define L2CR_L2BYP BIT(18) /* L2 DLL bypass */
255 -#define L2CR_L2IP BIT(31) /* L2 global invalidate in progress */
256 +#define L2CR_L2OH_10 MOL_BIT(15) /* L2 output hold 1.0 nS */
257 +#define L2CR_L2SL MOL_BIT(16) /* L2 DLL slow (use if bus freq < 150 MHz) */
258 +#define L2CR_L2DF MOL_BIT(17) /* L2 differential clock */
259 +#define L2CR_L2BYP MOL_BIT(18) /* L2 DLL bypass */
260 +#define L2CR_L2IP MOL_BIT(31) /* L2 global invalidate in progress */
261
262 /* SPR_THRM1 */
263 #define THRM1_TIN (1 << 31)
264 --- a/drivers/macintosh/mol/mmu_fb.c
265 +++ b/drivers/macintosh/mol/mmu_fb.c
266 @@ -160,7 +160,7 @@ get_dirty_fb_lines( kernel_vars_t *kv, s
267 p->slot = NULL;
268 p->dirty = 1;
269 __tlbie( p->ea );
270 - } else if( p->slot[1] & BIT(24) ) { /* C-BIT */
271 + } else if( p->slot[1] & MOL_BIT(24) ) { /* C-BIT */
272 p->dirty = 1;
273 __store_PTE( p->ea, p->slot, p->pte0, p->pte1 );
274 BUMP(fb_ptec_flush);
275 --- a/drivers/macintosh/mol/mmu_io.c
276 +++ b/drivers/macintosh/mol/mmu_io.c
277 @@ -129,13 +129,13 @@ bat_align( int flags, ulong ea, ulong lp
278 bat[1] = (lphys & ~(s-1)) | 2; /* pp=10, R/W */
279
280 #ifndef CONFIG_AMIGAONE
281 - bat[1] |= BIT(27); /* [M] (memory coherence) */
282 + bat[1] |= MOL_BIT(27); /* [M] (memory coherence) */
283 #endif
284
285 if( !(flags & MAPPING_FORCE_CACHE) ) {
286 - bat[1] |= BIT(26); /* [I] (inhibit cache) */
287 + bat[1] |= MOL_BIT(26); /* [I] (inhibit cache) */
288 } else {
289 - bat[1] |= BIT(25); /* [W] (write through) */
290 + bat[1] |= MOL_BIT(25); /* [W] (write through) */
291 }
292 return 0;
293 }
294 --- a/drivers/macintosh/mol/mtable.c
295 +++ b/drivers/macintosh/mol/mtable.c
296 @@ -45,10 +45,10 @@ struct pterec {
297 uint pent; /* defined below */
298 };
299
300 -#define PENT_LV_HEAD BIT(0) /* Resident - do not put on free list */
301 -#define PENT_UNUSED BIT(1) /* (lvhead) PTE index is not valid */
302 -#define PENT_EA_BIT14 BIT(2) /* for the partial ea used by tlbie */
303 -#define PENT_EA_LAST BIT(3) /* next entry is the pelist pointer */
304 +#define PENT_LV_HEAD MOL_BIT(0) /* Resident - do not put on free list */
305 +#define PENT_UNUSED MOL_BIT(1) /* (lvhead) PTE index is not valid */
306 +#define PENT_EA_BIT14 MOL_BIT(2) /* for the partial ea used by tlbie */
307 +#define PENT_EA_LAST MOL_BIT(3) /* next entry is the pelist pointer */
308 #define PENT_TOPEA_MASK 0x0f800000 /* bit 4-8 of ea */
309 #define PENT_SV_BIT 0x00400000 /* PTE uses vsid_sv */
310 #define PENT_INDEX_MASK 0x003fffff /* PTE index (there can be at most 2^22 PTEs) */
311 @@ -675,7 +675,7 @@ pte_inserted( kernel_vars_t *kv, ulong e
312
313 /* get_free_pent inserts the entry into the lvring and sets a few pent bits */
314 pr = get_free_pent(vi, lvrange, lvptr);
315 - pr->pent |= PTE_TO_IND(pte) | pent_cmp | ((ea & BIT(14)) ? PENT_EA_BIT14 : 0);
316 + pr->pent |= PTE_TO_IND(pte) | pent_cmp | ((ea & MOL_BIT(14)) ? PENT_EA_BIT14 : 0);
317
318 /* insert in (non-empty) ea ring */
319 pr->ea_next = *pp;
320 @@ -684,7 +684,7 @@ pte_inserted( kernel_vars_t *kv, ulong e
321 /* ea ring was empty */
322 pr = *pp = get_free_pent(vi, lvrange, lvptr);
323 pr->pent |= PENT_EA_LAST | PTE_TO_IND(pte) | pent_cmp
324 - | ((ea & BIT(14)) ? PENT_EA_BIT14 : 0);
325 + | ((ea & MOL_BIT(14)) ? PENT_EA_BIT14 : 0);
326 pr->ea_next = (pterec_t*)pp;
327 }
328 out:
329 --- a/drivers/macintosh/mol/ptaccess.c
330 +++ b/drivers/macintosh/mol/ptaccess.c
331 @@ -39,7 +39,7 @@ do_intercept_tlbie( kernel_vars_t *kv, u
332 clear_bit_mol( pteoffs >> 3, MMU.pthash_inuse_bits );
333
334 v = (pteoffs >> 6);
335 - if( pte0 & BIT(25) ) /* secondary hash? */
336 + if( pte0 & MOL_BIT(25) ) /* secondary hash? */
337 v = ~v;
338 v ^= (pte0 >> 7);
339 v = ((pte0 << 10) & 0xfc00) | (v & 0x3ff);
340 @@ -93,7 +93,7 @@ do_tlbli( kernel_vars_t *kv, ulong ea )
341 mPTE_t *p;
342
343 //printk("do_tlbli %08lX : %08lX %08lX\n", ea, MREGS.spr[S_ICMP], MREGS.spr[S_RPA] );
344 - if( MREGS.spr[S_SRR1] & BIT(14) )
345 + if( MREGS.spr[S_SRR1] & MOL_BIT(14) )
346 ind += 32;
347
348 p = &MMU.ptes_i_603[ind];
349 @@ -114,7 +114,7 @@ do_tlbld( kernel_vars_t *kv, ulong ea )
350
351 //printk("do_tlbld %08lX\n", ea );
352
353 - if( MREGS.spr[S_SRR1] & BIT(14) )
354 + if( MREGS.spr[S_SRR1] & MOL_BIT(14) )
355 ind += 32;
356
357 p = &MMU.ptes_d_603[ind];
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