From: Jim Wilson <jimw@sifive.com>
Date: Fri, 27 Jul 2018 21:35:29 +0000 (-0700)
Subject: RISC-V: Fix gas configure support for riscv*-*-*.
X-Git-Tag: users/ARM/embedded-binutils-master-2018q4~1241
X-Git-Url: http://git.ipfire.org/?p=thirdparty%2Fbinutils-gdb.git;a=commitdiff_plain;h=d19969ffbfda0576fab881e0b00c2fefae3aa8df

RISC-V: Fix gas configure support for riscv*-*-*.

	gas/
	* configure.tgt (riscv*): Accept as alias for riscv32*.
---

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 0cc4e55d244..c941f99490b 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,7 @@
+2018-07-27  Jim Wilson  <jimw@sifive.com>
+
+	* configure.tgt (riscv*): Accept as alias for riscv32*.
+
 2018-07-26  H.J. Lu  <hongjiu.lu@intel.com>
 
 	PR gas/23453
diff --git a/gas/configure.tgt b/gas/configure.tgt
index 3d0415c1aa4..6df7dea31ff 100644
--- a/gas/configure.tgt
+++ b/gas/configure.tgt
@@ -89,8 +89,8 @@ case ${cpu} in
   pj*)			cpu_type=pj endian=big ;;
   powerpc*le*)		cpu_type=ppc endian=little ;;
   powerpc*)		cpu_type=ppc endian=big ;;
-  riscv32*)		cpu_type=riscv endian=little arch=riscv32 ;;
   riscv64*)		cpu_type=riscv endian=little arch=riscv64 ;;
+  riscv32* | riscv*)	cpu_type=riscv endian=little arch=riscv32 ;;
   rs6000*)		cpu_type=ppc ;;
   rl78*)		cpu_type=rl78 ;;
   rx)			cpu_type=rx ;;