Andre Vieira [Mon, 15 Apr 2019 11:18:16 +0000 (12:18 +0100)]
[binutils, ARM, 15/16] Add support for VSCCLRM
Like for CLRM, this patch aims to share as much logic with the similar looking VLDM/VSTM. This is achieved by adding 2 new enumerator values in enum reg_list_els for the single-precision and double-precision variants of VSCCLRM and extending parse_vfp_reg_list () to deal with these types.
These behave like the existing REGLIST_VFP_S and REGLIST_VFP_D types with extra logic to expect VPR as the last element in the register list.
The function is algo augmented with a new partial_match parameter to indicate if any register other than VPR had already been parsed in the register list so as to not try parsing the second variant if that's the case and return the right error message.
The rest of the patch is the usual encoding function, new disassembler table entries and format specifier and parsing, encoding and disassembling tests.
It is worth mentioning that the new entry in the disassembler table was added in the coprocessor-related table despite VSCCLRM always being available even in FPU-less configurations. The main reason for this is that VSCCLRM also match VLDMIA entry and must thus be tried first but coprocessor entries are tried before T32 entries. It also makes sense because it is in the same encoding space as coprocessor and VFP instructions and is thus the natural place for someone to look for this instruction.
Note: Both variants of VSCCLRM support D16-D31 registers but Armv8.1-M Mainline overall does not. I have thus decided not to implement support for these registers in order to keep the code simpler. It can always be added later if needed.
ChangeLog entries are as follows:
*** gas/ChangeLog ***
2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/tc-arm.c (arm_typed_reg_parse): Fix typo in comment.
(enum reg_list_els): New REGLIST_VFP_S_VPR and REGLIST_VFP_D_VPR
enumerators.
(parse_vfp_reg_list): Add new partial_match parameter. Set
*partial_match to TRUE if at least one element in the register list has
matched. Add support for REGLIST_VFP_S_VPR and REGLIST_VFP_D_VPR
register lists which expect VPR as last element in the list.
(s_arm_unwind_save_vfp_armv6): Adapt call to parse_vfp_reg_list to new
prototype.
(s_arm_unwind_save_vfp): Likewise.
(enum operand_parse_code): New OP_VRSDVLST enumerator.
(parse_operands): Adapt call to parse_vfp_reg_list to new prototype.
Handle new OP_VRSDVLST case.
(do_t_vscclrm): New function.
(insns): New entry for VSCCLRM instruction.
* testsuite/gas/arm/archv8m_1m-cmse-main-bad.s: Add invalid VSCCLRM
instructions.
* testsuite/gas/arm/archv8m_1m-cmse-main-bad.l: Add error expectations
for above instructions.
* testsuite/gas/arm/archv8m_1m-cmse-main.s: Add tests for VSCCLRM
instruction.
* testsuite/gas/arm/archv8m_1m-cmse-main.d: Add expected disassembly
for above instructions.
*** opcodes/ChangeLog ***
2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
* arm-dis.c (coprocessor_opcodes): Document new %C format control code.
Add new entries for VSCCLRM instruction.
(print_insn_coprocessor): Handle new %C format control code.
Andre Vieira [Mon, 15 Apr 2019 11:14:38 +0000 (12:14 +0100)]
[opcodes, ARM, 14/16] Add mode availability to coprocessor table entries
The coprocessor_opcodes table is used both to share commonalities in coprocessor-related instructions and to avoid duplication between Arm and Thumb mode. However, some instructions do have differences between Arm and Thumb. For instance, vldmia allows PC as base register in Arm mode but not in Thumb mode.
In that very case the distinction becomes necessary because the encoding with PC as base register is used in Thumb mode to denote a VSCCLRM. It is thus necessary to distinguish what is Arm or Thumb only from what is shared. This patch adds an extra field to the coprocessor_opcodes table entries to indicate what mode is a given instruction available in. The print_insn_coprocessor then uses that field to determine if an entry that matched the mark and value checked should be allowed to match or not given the current mode.
ChangeLog entry is as follows:
*** opcodes/ChangeLog ***
2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
* arm-dis.c (enum isa): New enum.
(struct sopcode32): New structure.
(coprocessor_opcodes): change type of entries to struct sopcode32 and
set isa field of all current entries to ANY.
(print_insn_coprocessor): Change type of insn to struct sopcode32.
Only match an entry if its isa field allows the current mode.
Andre Vieira [Mon, 15 Apr 2019 11:07:20 +0000 (12:07 +0100)]
[binutils, ARM, 13/16] Add support for CLRM
Given the similarity between LDM/STM and CLRM register lists, most of the changes in this patch aim at sharing code between those two sets of instruction. Sharing is achieved both in parsing and encoding of those instructions.
In terms of parsing, parse_reg_list () is extended to take a type that describe what type of instruction is being parsed. The reg_list_els used for parse_vfp_reg_list () is reused for the type and that function is added an assert for the new REGLIST_CLRM and REGLIST_RN enumerators.
parse_reg_list () is then taught to accept APSR and reject SP and PC when parsing for a CLRM instruction. At last, caller of parse_reg_list () is updated accordingly and logic is added for the new OP_CLRMLST operand.
Encoding-wise, encode_thumb2_ldmstm () is reused to encode the variable bits of CLRM and is thus renamed encode_thumb2_multi (). A new do_io parameter is added to distinguish between LDM/STM and CLRM which guard all the LDM/STM specific code of the function.
Finally objdump is told how to disassemble CLRM, again reusing the logic to print the LDM/STM register list (format specifier 'm'). Tests are also added in the form of negative tests to check parsing and encoding/disassembling tests.
ChangeLog entries are as follows:
*** gas/ChangeLog ***
2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/tc-arm.c (enum reg_list_els): Define earlier and add
REGLIST_RN and REGLIST_CLRM enumerators.
(parse_reg_list): Add etype parameter to distinguish between regular
core register list and CLRM register list. Add logic to
recognize CLRM register list.
(parse_vfp_reg_list): Assert type is not for core register list.
(s_arm_unwind_save_core): Update call to parse_reg_list to new
prototype.
(enum operand_parse_code): Declare OP_CLRMLST enumerator.
(parse_operands): Update call to parse_reg_list to new prototype. Add
logic for OP_CLRMLST.
(encode_thumb2_ldmstm): Rename into ...
(encode_thumb2_multi): This. Add do_io parameter. Add logic to
encode CLRM and guard LDM/STM only code by do_io.
(do_t_ldmstm): Adapt to use encode_thumb2_multi.
(do_t_push_pop): Likewise.
(do_t_clrm): New function.
(insns): Define CLRM.
* testsuite/gas/arm/archv8m_1m-cmse-main-bad.d: New file.
* testsuite/gas/arm/archv8m_1m-cmse-main-bad.l: Likewise.
* testsuite/gas/arm/archv8m_1m-cmse-main-bad.s: Likewise.
* testsuite/gas/arm/archv8m_1m-cmse-main.d: Likewise.
* testsuite/gas/arm/archv8m_1m-cmse-main.s: Likewise.
*** opcodes/ChangeLog ***
2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
* arm-dis.c (thumb_opcodes): Document %n control code. Add entry for
CLRM.
(print_insn_thumb32): Add logic to print %n CLRM register list.
s patch is part of a series of patches to add support for Armv8.1-M Mainline instructions to binutils.
This patch adds support to the Scalar low overhead loop instructions:
LE
WLS
DLS
We also add a new assembler resolvable relocation bfd_reloc_code_real enum for the 12-bit branch offset used in these instructions.
ChangeLog entries are as follows:
*** bfd/ChnageLog ***
2019-04-12 Sudakshina Das <sudi.das@arm.com>
Andre Vieira <andre.simoesdiasvieira@arm.com>
* config/tc-arm.c (operand_parse_code): Add OP_LR and OP_oLR
for the LR operand and optional LR operand.
(parse_operands): Add switch cases for OP_LR and OP_oLR for
both type checking and value checking.
(encode_thumb32_addr_mode): New entries for DLS, WLS and LE.
(v8_1_loop_reloc): New helper function for handling labels
for the low overhead loop instructions.
(do_t_loloop): New function to encode DLS, WLS and LE.
(insns): New entries for WLS, DLS and LE.
(md_pcrel_from_section): New switch case
for BFD_RELOC_ARM_THUMB_LOOP12.
(md_appdy_fix): Likewise.
(tc_gen_reloc): Likewise.
* testsuite/gas/arm/armv8_1-m-tloop.s: New.
* testsuite/gas/arm/armv8_1-m-tloop.d: New.
* testsuite/gas/arm/armv8_1-m-tloop-bad.s: New.
* testsuite/gas/arm/armv8_1-m-tloop-bad.d: New.
* testsuite/gas/arm/armv8_1-m-tloop-bad.l: New.
*** opcodes/ChangeLog ***
2019-04-12 Sudakshina Das <sudi.das@arm.com>
* arm-dis.c (print_insn_thumb32): Updated to accept new %P
and %Q patterns.
2019-04-15 Sudakshina Das <sudi.das@arm.com>
Andre Vieira <andre.simoesdiasvieira@arm.com>
* config/tc-arm.c (T16_32_TAB): New entriy for bfcsel.
(do_t_v8_1_branch): New switch case for bfcsel.
(toU): Define.
(insns): New instruction for bfcsel.
(md_pcrel_from_section): New switch case
for BFD_RELOC_THUMB_PCREL_BFCSEL.
(md_appdy_fix): Likewise
(tc_gen_reloc): Likewise.
* testsuite/gas/arm/armv8_1-m-bfcsel.d: New.
* testsuite/gas/arm/armv8_1-m-bfcsel.s: New.
Andre Vieira [Mon, 15 Apr 2019 10:46:54 +0000 (11:46 +0100)]
[binutils, ARM, 10/16] BFCSEL infrastructure with new global reloc R_ARM_THM_BF12
This patch is part of a series of patches to add support for Armv8.1-M Mainline
instructions to binutils.
This adds infrastructure for the BFCSEL instructions which is one of the first
instructions in Arm that have more than one relocations in them.
This adds a new relocation R_ARM_THM_BF12.
The inconsistency between external R_ARM_THM_BF12 and internal
BFD_RELOC_ARM_THUMB_BF13 is because internally we count the static bit-0 of the
immediate and we don't externally.
ChangeLog entries are as follows :
ChangeLog entries are as follows :
*** bfd/ChnageLog ***
2019-04-04 Sudakshina Das <sudi.das@arm.com>
* reloc.c (BFD_RELOC_ARM_THUMB_BF13): New.
* bfd-in2.h: Regenerated.
* libbfd.h: Regenerated.
* elf32-arm.c (elf32_arm_howto_table_1): New entry for R_ARM_THM_BF13.
(elf32_arm_reloc_map elf32_arm_reloc_map): Map BFD_RELOC_ARM_THUMB_BF13
and R_ARM_THM_BF12 together.
(elf32_arm_final_link_relocate): New switch case for R_ARM_THM_BF13.
*** elfcpp/ChangeLog ***
2019-04-04 Sudakshina Das <sudi.das@arm.com>
* arm.h (R_ARM_THM_BF12): New relocation code.
*** gas/ChangeLog ***
2019-04-04 Sudakshina Das <sudi.das@arm.com>
* config/tc-arm.c (md_pcrel_from_section): New switch case for
BFD_RELOC_ARM_THUMB_BF13.
(md_appdy_fix): Likewise.
(tc_gen_reloc): Likewise.
*** include/ChangeLog ***
2019-04-04 Sudakshina Das <sudi.das@arm.com>
* elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF12.
*** opcodes/ChangeLog ***
2019-04-04 Sudakshina Das <sudi.das@arm.com>
* arm-dis.c (print_insn_thumb32): Updated to accept new %Z pattern.
Andre Vieira [Mon, 15 Apr 2019 10:37:51 +0000 (11:37 +0100)]
[binutils, ARM, 8/16] BFL infrastructure with new global reloc R_ARM_THM_BF18
This patch is part of a series of patches to add support for Armv8.1-M Mainline instructions to binutils.
This adds infrastructure for the BFL instructions which is one of the first instructions in Arm that have more than one relocations in them.
This adds a new relocation R_ARM_THM_BF18.
The inconsistency between external R_ARM_THM_BF18 and internal
BFD_RELOC_ARM_THUMB_BF19 is because internally we count the static bit-0 of the immediate and we don't externally.
ChangeLog entries are as follows :
*** bfd/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* reloc.c (BFD_RELOC_ARM_THUMB_BF19): New
* libbfd.h: Regenerated.
* bfd-in2.h: Regenerated.
* bfd-elf32-arm.c (elf32_arm_howto_table_1): New entry for R_ARM_THM_BF18.
(elf32_arm_reloc_map elf32_arm_reloc_map): Map BFD_RELOC_ARM_THUMB_BF19
and R_ARM_THM_BF18 together.
(elf32_arm_final_link_relocate): New switch case for R_ARM_THM_BF19.
*** elfcpp/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* arm.h (R_ARM_THM_BF18): New relocation code.
*** gas/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* config/tc-arm.c (md_pcrel_from_section): New switch case for
BFD_RELOC_ARM_THUMB_BF19.
(md_appdy_fix): Likewise.
(tc_gen_reloc): Likewise.
*** include/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF18.
*** opcodes/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* arm-dis.c (print_insn_thumb32): Updated to accept new %Y pattern.
Andre Vieira [Mon, 15 Apr 2019 10:29:14 +0000 (11:29 +0100)]
[binutils, ARM, 7/16] New BFX and BFLX instruction for Armv8.1-M Mainline
This patch is part of a series of patches to add support for Armv8.1-M Mainline instructions to binutils.
This patch adds the BFX and BFLX instructions.
ChangeLog entries are as follows :
*** gas/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* config/tc-arm.c (T16_32_TAB): New entries for bfx and bflx.
(do_t_v8_1_branch): New switch cases for bfx and bflx.
(insns): New instruction for bfx and bflx.
* testsuite/gas/arm/armv8_1-m-bf-exchange.d: New.
* testsuite/gas/arm/armv8_1-m-bf-exchange.s: New.
* testsuite/gas/arm/armv8_1-m-bf-exchange-bad.s: New
* testsuite/gas/arm/armv8_1-m-bf-exchange-bad.l: New
* testsuite/gas/arm/armv8_1-m-bf-exchange-bad.d: New
*** opcodes/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* arm-dis.c (print_insn_thumb32): Add '%<bitfield>S' to print an
Arm register with r13 and r15 unpredictable.
(thumb32_opcodes): New instructions for bfx and bflx.
Andre Vieira [Mon, 15 Apr 2019 10:18:57 +0000 (11:18 +0100)]
[binutils, ARM, 5/16] BF insns infrastructure with new global reloc R_ARM_THM_BF16
This patch is part of a series of patches to add support for Armv8.1-M Mainline instructions to binutils.
This adds infrastructure for the BF instructions which is one of the first instructions in Arm that have more than one relocations in them.
This is the third infrastructure patch that adds a new relocation R_ARM_THM_BF16.
The inconsistency between external R_ARM_THM_BF16 and internal
BFD_RELOC_ARM_THUMB_BF17 is because internally we count the static bit-0 of the immediate and we don't externally.
ChangeLog entries are as follows :
*** bfd/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* reloc.c (BFD_RELOC_ARM_THUMB_BF17): New enum.
* bfd-in2.h: Regenerated.
* libbfd.h: Regenerated.
* bfd-elf32-arm.c (elf32_arm_howto_table_1): New entry for R_ARM_THM_BF16.
(elf32_arm_reloc_map elf32_arm_reloc_map): Map BFD_RELOC_ARM_THUMB_BF17
and R_ARM_THM_BF16 together.
(get_value_helper): New reloc helper.
(elf32_arm_final_link_relocate): New switch case for R_ARM_THM_BF16.
*** elfcpp/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* arm.h (R_ARM_THM_BF16): New relocation code.
*** gas/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* config/tc-arm.c (md_pcrel_from_section): New switch case for
BFD_RELOC_ARM_THUMB_BF17.
(md_appdy_fix): Likewise.
(tc_gen_reloc): Likewise.
*** include/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF16.
*** opcodes/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* arm-dis.c (print_insn_thumb32): Updated to accept new %W pattern.
Andre Vieira [Mon, 15 Apr 2019 10:12:57 +0000 (11:12 +0100)]
[binutils, ARM, 4/16] BF insns infrastructure with array of relocs in struct arm_it
This patch is part of a series of patches to add support for ARMv8.1-M Mainline
instructions to binutils.
This adds infrastructure for the Branch Future instructions (BF, BFX, BFL,
BFLX, BFCSEL).
These are the first instructions in ARM that have more than one relocations in
them. Their external relocations can be found in the 'ELF for the Arm
Architecture - ABI 2019Q1' document on developer.arm.com
This is the second infrastructure patch that adds support to allow up to
3 relocations in an instruction. This is done by changing the reloc member of
struct arm_it to an array instead (relocs[3]). All the previous occurrences of
reloc can now to referring to relocs[0].
ChangeLog entries are as follows :
*** gas/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* config/tc-arm.c (ARM_IT_MAX_RELOCS): New macro.
(arm_it): Member reloc renamed relocs and updated to an array.
Rest: Replace all occurrences of reloc to relocs[0].
Andre Vieira [Mon, 15 Apr 2019 10:06:30 +0000 (11:06 +0100)]
[binutils, ARM, 3/16] BF insns infrastructure with new bfd_reloc_code_real for fallback branch
This patch is part of a series of patches to add support for Armv8.1-M Mainline
instructions to binutils.
This adds infrastructure for the Branch Future instructions (BF, BFX, BFL, BFLX,
BFCSEL). These are the first instructions in ARM that have more than one
relocations in them.
This is the first infrastructure patch that adds a new bfd_reloc_code_real enum
for the fallback branch offset.
This is common for all such instructions and needs to be resolvable by the
assembler.
ChangeLog entries are as follows :
*** bfd/ChangeLog ***
* config/tc-arm.c (md_pcrel_from_section): New switch case
for BFD_RELOC_THUMB_PCREL_BRANCH5.
(v8_1_branch_value_check): New function to check branch
offsets.
(md_appdy_fix): New switch case for
BFD_RELOC_THUMB_PCREL_BRANCH5.
(tc_gen_reloc): Likewise.
*** opcodes/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* arm-dis.c (print_insn_thumb32): Updated to accept new %G pattern.
Andre Vieira [Mon, 15 Apr 2019 10:00:21 +0000 (11:00 +0100)]
[GAS, ARM, 2/16] Add CLI extension support for Armv8.1-M Mainline
This patch implements the dsp, fp and fp.dp extensions for Armv8.1-M Mainline.
This patch also removes the fp-armv8 check from the half-precision move
instructions 'do_neon_movhf', as checking that the FP16 instructions extension
feature bit is enabled 'ARM_EXT2_FP16_INST' is enough.
gas/ChangeLog:
2019-04-15 Andre Vieira <andre.simoesdiasvieira@arm.com>
* config/tc-arm.c (do_neon_movhf): Remove fp-armv8 check.
(armv8_1m_main_ext_table): New extension table.
(arm_archs): Use the new extension table.
* doc/c-arm.texi: Add missing arch and document new extensions.
* testsuite/gas/arm/armv8.1-m.main-fp.d: New.
* testsuite/gas/arm/armv8.1-m.main-fp-dp.d: New.
* testsuite/gas/arm/armv8.1-m.main-hp.d: New.
Andre Vieira [Mon, 15 Apr 2019 09:54:42 +0000 (10:54 +0100)]
[binutils, ARM, 1/16] Add support for Armv8.1-M Mainline CLI
The patch is straightforward, it does the following:
- support the new Tag_CPU_arch build attribute value, ie.:
+ declare the new value
+ update all the asserts forcing logic to be reviewed for new
architectures
+ create a corresponding bfd_mach_arm_8_1M_MAIN enumerator in bfd and
add mapping from Tag_CPU_arch to it
+ teach readelf about new Tag_CPU_arch value
- declare armv8.1-m.main as a supported architecture value
- define Armv8.1-M Mainline in terms of feature bits available
- tell objdump mapping from bfd_mach_arm_8_1M_MAIN enumerator to feature
bits available
- update architecture-specific logic in gas and bfd guarded by the
asserts mentioned above.
- tests for all the above
ChangeLog entries are as follows:
*** bfd/ChangeLog ***
2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
* archures.c (bfd_mach_arm_8_1M_MAIN): Define.
* bfd-in2.h: Regenerate.
* cpu-arm.c (arch_info_struct): Add entry for Armv8.1-M Mainline.
* elf32-arm.c (using_thumb_only): Return true for Armv8.1-M Mainline
and update assert.
(using_thumb2): Likewise.
(using_thumb2_bl): Update assert.
(arch_has_arm_nop): Likewise.
(bfd_arm_get_mach_from_attributes): Add case for Armv8.1-M Mainline.
(tag_cpu_arch_combine): Add logic for Armv8.1-M Mainline merging.
*** binutils/ChangeLog ***
2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
* readelf.c (arm_attr_tag_CPU_arch): Add entry for Armv8.1-M Mainline.
*** gas/ChangeLog ***
2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/tc-arm.c (cpu_arch_ver): Add entry for Armv8.1-M Mainline
Tag_CPU_arch build attribute value. Reindent.
(get_aeabi_cpu_arch_from_fset): Update assert.
(aeabi_set_public_attributes): Update assert for Tag_DIV_use logic.
* testsuite/gas/arm/attr-march-armv8_1-m.main.d: New test.
*** include/ChangeLog ***
2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
* elf/arm.h (TAG_CPU_ARCH_V8_1M_MAIN): new macro.
(MAX_TAG_CPU_ARCH): Set value to above macro.
* opcode/arm.h (ARM_EXT2_V8_1M_MAIN): New macro.
(ARM_AEXT_V8_1M_MAIN): Likewise.
(ARM_AEXT2_V8_1M_MAIN): Likewise.
(ARM_ARCH_V8_1M_MAIN): Likewise.
*** ld/ChangeLog ***
2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
* testsuite/ld-arm/attr-merge-13.attr: New test.
* testsuite/ld-arm/attr-merge-13a.s: New test.
* testsuite/ld-arm/attr-merge-13b.s: New test.
*** opcodes/ChangeLog ***
2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
* arm-dis.c (select_arm_features): Add logic for Armv8.1-M Mainline.
Andrew Burgess [Thu, 11 Apr 2019 22:17:31 +0000 (23:17 +0100)]
sim: Use host not target byte order for merging and splitting values
When using writes to memory through a struct to merge and extract
multi-word value, it is the endianness of the host, not the target
that affects which order the component words need to be written into
the structure.
Of the 5 functions adjusted here 4 of them are unused. The 5th,
JOINSIDF will soon be used by the or1k target.
For or1k, simulated on x86-64, this change fixes this function so that
the correct bytes are now returned.
Matthew Fortune [Tue, 9 Apr 2019 20:40:00 +0000 (20:40 +0000)]
[MIPS] Add i6500 CPU and fix i6400 default ASEs
gas/
* config/tc-mips.c (mips_cpu_info_table): Add i6500. Update
default ASEs for i6400.
* doc/c-mips.texi (-march): Document i6500.
* testsuite/gas/mips/elf_mach_i6400.d: New test.
* testsuite/gas/mips/elf_mach_i6500.d: New test.
* testsuite/gas/mips/mips.exp: Run the new tests.
Matthew Fortune [Tue, 9 Apr 2019 17:34:48 +0000 (10:34 -0700)]
[MIPS] Apply ASE information for the selected processor
GAS does not enable implicit ASEs for most MIPS processors.
The rework of option handling done as part of .module implementation
left the implicit ASE logic broken and default enabled ASEs for
most processors did not get applied. This patch ensures the ASE
information is carried forward to the point where it is required.
gas/
* config/tc-mips.c (mips_set_options) <init_ase>: New field.
(file_mips_opts, mips_opts) <init_ase>: Initialize new field.
(file_mips_check_options): Propagate initial ASE settings.
(mips_after_parse_args, parse_code_option): Track the initial
ASE settings for a CPU.
(s_mipsset): Restore the initial ASE settings when reverting
to the default arch.
* testsuite/gas/mips/elf_mach_p6600.d: New test.
* testsuite/gas/mips/mips.exp: Run the new test.
Alan Modra [Fri, 12 Apr 2019 11:02:57 +0000 (20:32 +0930)]
Automatic makefile dependencies for generated ld/e*.c
This patch modifies genscripts.sh to emit dependency info along with
the generated emulation e*.c files. This is done by a new source_sh
function that records its arg to a file (.deps/e*.Tc), using the
function whenever a shell script is sourced. Entries in the file are
made unique and written to .deps/e*.Pc. These files are then
included by the Makefile.
Alan Modra [Fri, 12 Apr 2019 09:32:44 +0000 (19:02 +0930)]
ld TDIRS substitution
It is no longer true that autoconf/automake cannot substitute vars
with embedded new-lines.
* configure.ac (TDIRS): Build up tdirs in this variable and
AC_SUBST, also using AM_SUBST_NOTMAKE.
* configure: Regenerate.
* Makefile.am (DISTCLEANFILES): Remove tdirs.
* Makefile.in: Regenerate.
Andrew Burgess [Fri, 12 Apr 2019 23:54:16 +0000 (00:54 +0100)]
gdb: Fix failure in gdb.base/complex-parts.exp for x86-32
The x86-32 ABI specifies 96-bit long double, this was causing a
failure on the test gdb.base/complex-parts.exp.
The problem is that GDB tries to find a builtin floating point type of
the correct size in order to reuse the name of that type as the name
for the components of the complex type being built.
Previously GDB was only aware of floating point types sized 32, 64, or
128 bits. This patch teaches GDB how to handle 96 bit floating point
type.
gdb/ChangeLog:
* dwarf2read.c (dwarf2_init_complex_target_type): Handle complex
target types of size 96-bits, add some additional comments, and
check that the builtin type we found was the correct size.
Eli Zaretskii [Fri, 12 Apr 2019 12:35:57 +0000 (15:35 +0300)]
Another fix for GDB styling
gdb/ChangeLog:
2019-04-12 Eli Zaretskii <eliz@gnu.org>
* utils.c (prompt_for_continue): Don't restore the styling at the
end, as applied_style has the wrong value. This fixes styling in
long lists of file names that are interrupted by the "Continue?"
prompt.
Andrew Burgess [Thu, 11 Apr 2019 22:51:48 +0000 (23:51 +0100)]
gdb: Remove LANG_MAGIC
The language_defn structure has an la_magic field, this used to be
used as a basic check that the language_defn structure had the
expected layout - at least the end of the structure was where we
expected it to be.
This feature only really makes sense if we imagine GDB dynamically
loading language support from dynamic libraries, where a version
mismatch might cause problems.
However, in current GDB language support is statically built into GDB,
and since this commit:
Andrew Burgess [Sun, 7 Apr 2019 21:30:37 +0000 (22:30 +0100)]
gdb/riscv: Remove riscv_type_alignment function
Make use of the type_align function and remove riscv_type_alignment as
it is no longer needed. I tested this against a number of RV32 and
RV64 targets, and I also ran the tests with an assertion in place
checking that the old riscv_type_alignment function gives the same
answer as the common type_align function - it does, and all the tests
still pass.
gdb/ChangeLog:
* riscv-tdep.c (riscv_type_align): New function.
(riscv_type_alignment): Delete.
(riscv_arg_location): Use 'type_align'.
(riscv_gdbarch_init): Register riscv_type_align gdbarch function.
Andrew Burgess [Sat, 6 Apr 2019 10:02:04 +0000 (11:02 +0100)]
gdb: Fix alignment computation for structs with only static fields
The current code in gdbtypes.c:type_align incorrectly returns 0 as the
alignment for a structure containing only static fields. After this
patch the correct value of 1 is returned. The gdb.base/align.exp test
is extended to cover this case.
gdb/ChangeLog:
* gdbtypes.c (type_align): A struct with no non-static fields also
has alignment of 1.
gdb/testsuite/ChangeLog:
* gdb.base/align.exp: Extend test to cover structures containing
only static fields.
Andrew Burgess [Fri, 5 Apr 2019 12:50:19 +0000 (13:50 +0100)]
gdb/riscv: Handle empty C++ structs during argument passing
This commit resolves a large number of failures in the test script
gdb.base/infcall-nested-structs.exp which were caused by GDB (for
RISC-V) incorrectly handling empty C++ structures when preparing
arguments for a dummy call, or collecting a return value.
The issue is further complicated in that there was a bug in GCC, such
that in some cases GCC would generate incorrect code when passing a
small structure that contained empty sub-structures. This was fixed
in GCC trunk on 5-March-2019, so in order to see the best results with
this patch you'll need a recent version of GCC.
Anything that used to work should continue to work after this patch,
regardless of GCC version being used.
The fix in this commit is that GDB now pays more attention to the
offset of fields within a structure when preparing arguments as in C++
an empty structure has a non-zero size, this is an example:
struct s1 { struct s2 { } empty; int f; };
We previously assumed that 'f' was at offset 0 inside type 's1',
however this is not the case in C++ as 's2' has size 1, and with
alignment 'f' is likely at some even bigger offset inside 's1'.
gdb/ChangeLog:
* riscv-tdep.c (riscv_call_arg_complex_float): Fix offset of first
component to 0.
(riscv_struct_info::riscv_struct_info): Initialise m_offsets
member.
(riscv_struct_info::analyse): New implementation using new
analyse_inner member function.
(riscv_struct_info::field_offset): New member function.
(riscv_struct_info::m_offsets): New member variable.
(riscv_struct_info::analyse_inner): New private member function,
takes the old implementation of riscv_struct_info::analyse but
extended to track field offsets.
(riscv_call_arg_struct): Update the struct folding special cases
to handle cases where empty C++ structs, which are non-zero
length, are found.
(riscv_arg_location): Initialise the length of each location, a
non-zero length now indicates the location is in use.
(riscv_push_dummy_call): Allow for the first location having a
non-zero offset when setting up arguments.
(riscv_return_value): Likewise, but for return values.
Max Filippov [Fri, 5 Apr 2019 00:06:57 +0000 (17:06 -0700)]
xtensa: gas: add relaxations tests
gas/
2019-04-11 Max Filippov <jcmvbkbc@gmail.com>
* testsuite/gas/xtensa/loop-relax-2.d: New test definition.
* testsuite/gas/xtensa/loop-relax.d: New test definition.
* testsuite/gas/xtensa/loop-relax.s: New test source.
* testsuite/gas/xtensa/text-section-literals-1a.d: New test
definition.
* testsuite/gas/xtensa/text-section-literals-2.d: New test
definition.
* testsuite/gas/xtensa/text-section-literals-2.s: New test
source.
* testsuite/gas/xtensa/text-section-literals-2a.d: New test
definition.
* testsuite/gas/xtensa/text-section-literals-3.d: New test
definition.
* testsuite/gas/xtensa/text-section-literals-3.s: New test
source.
* testsuite/gas/xtensa/text-section-literals-4.d: New test
definition.
* testsuite/gas/xtensa/text-section-literals-4.s: New test
source.
* testsuite/gas/xtensa/text-section-literals-4a.d: New test
definition.
Max Filippov [Fri, 5 Apr 2019 00:51:00 +0000 (17:51 -0700)]
xtensa: gas: convert tests to run_dump_tests
gas/
2019-04-11 Max Filippov <jcmvbkbc@gmail.com>
* testsuite/gas/xtensa/all.exp: Remove all expect-based
tests and all explicit run_dump_test / run_list_test
invocations. Add run_dump_tests for all .d files in the
test subdirectory.
* testsuite/gas/xtensa/entry_align.d: New test definition.
* testsuite/gas/xtensa/entry_align.l: New test output.
* testsuite/gas/xtensa/entry_misalign.d: New test definition.
* testsuite/gas/xtensa/entry_misalign2.d: New test definition.
* testsuite/gas/xtensa/j_too_far.d: New test definition.
* testsuite/gas/xtensa/j_too_far.l: New test output.
* testsuite/gas/xtensa/loop_align.d: New test definition.
* testsuite/gas/xtensa/loop_misalign.d: New test definition.
* testsuite/gas/xtensa/trampoline-2.d: New test definition.
* testsuite/gas/xtensa/trampoline-2.l: Remove empty output.
* testsuite/gas/xtensa/xtensa-err.exp: Use positive logic.
Max Filippov [Wed, 10 Apr 2019 08:18:01 +0000 (01:18 -0700)]
xtensa: gas: clean up literal management code
gas/
2019-04-11 Max Filippov <jcmvbkbc@gmail.com>
* config/tc-xtensa.c (xtensa_literal_pseudo): Drop code that has
no effect.
(get_literal_pool_location): Only search for the literal pool
when auto litpools is used, otherwise take one recorded in the
tc_segment_info_data.
(xtensa_assign_litpool_addresses): New function.
(xtensa_move_literals): Don't duplicate 'literal pool location
required...' error message. Call xtensa_assign_litpool_addresses.
Max Filippov [Mon, 8 Apr 2019 20:47:18 +0000 (13:47 -0700)]
xtensa: gas: put .literal_position at section start
Provide literal position at the beginning of each section for literal
space reserved by relaxations when text-section-literals or
auto-litpools options are used. Remove code that adds fill frag to the
literal section for every .literal_position directive to avoid creation
of empty literal sections.
Fix auto-litpools tests that got literal pool address changes.
gas/
2019-04-11 Max Filippov <jcmvbkbc@gmail.com>
* config/tc-xtensa.c (xtensa_is_init_fini): Add declaration.
(xtensa_mark_literal_pool_location): Don't add fill frag to literal
section that records literal pool location.
(md_begin): Call xtensa_mark_literal_pool_location when text
section literals or auto litpools are used.
(xtensa_elf_section_change_hook): Call
xtensa_mark_literal_pool_location when text section literals or
auto litpools are used, there's no literal pool location defined
for the current section and it's not .init or .fini.
* testsuite/gas/xtensa/auto-litpools-first1.d: Fix up addresses.
* testsuite/gas/xtensa/auto-litpools-first2.d: Likewise.
* testsuite/gas/xtensa/auto-litpools.d: Likewise.
Add a new option to disable the listing of discarded sections
in map file output. The use case stems from a large application
built with -ffunction-sections --gc-sections where the list of
discarded sections blows up the map file output. The default
behaviour remains to print discarded sections, but the new option
allows us to disable it.
ld/
* NEWS: Mention new option --no-print-map-discarded.
* ld.h (ld_config_type) <print_map_discarded>: New field.
* ldlang.c (lang_map): Conditionally output discarded sections
in map files based on configuration option.
* ldlex.h (option_values) <OPTION_PRINT_MAP_DISCARDED,
OPTION_NO_PRINT_MAP_DISCARDED>: New.
* ldmain.c (main): Enabled print_map_discarded by default.
* lexsup.c (ld_options): Add new command-line options.
(parse_args) <OPTION_NO_PRINT_MAP_DISCARDED,
OPTION_PRINT_MAP_DISCARDED>: New cases.
* ld.texi: Document new options.
* testsuite/ld-gc/gc.exp: Add new test.
* testsuite/ld-gc/skip-map-discarded.s: New file.
* testsuite/ld-gc/skip-map-discarded.d: New file.
* testsuite/ld-gc/skip-map-discarded.map: New file.
Tom de Vries [Thu, 11 Apr 2019 17:13:05 +0000 (19:13 +0200)]
[gdb/testsuite] Add cc-with-dwz.exp and cc-with-dwz-m.exp
We can use CC_WITH_TWEAKS_FLAGS when cd-ing into the gdb build subdir and
invoking make check:
...
$ cd $objdir/gdb
$ make check \
RUNTESTFLAGS='--target_board=cc-with-tweaks' \
CC_WITH_TWEAKS_FLAGS='-z'
...
But when cd-ing into the top-level build dir and invoking make check-gdb
instead:
...
$ cd $objdir
$ make check-gdb \
RUNTESTFLAGS='--target_board=cc-with-tweaks' \
CC_WITH_TWEAKS_FLAGS='-z'
...
using CC_WITH_TWEAKS_FLAGS has no effect, because CC_WITH_TWEAKS_FLAGS is not
passed down from the top level Makefile.
Add cc-with-dwz.exp and cc-with-dwz-m.exp, that don't require
CC_WITH_TWEAKS_FLAGS to be set in the make invocation, allowing us to run these
test configurations from the toplevel build dir:
...
$ cd $objdir
$ make check-gdb \
RUNTESTFLAGS='--target_board=cc-with-dwz'
...
Tested on x86_64-linux.
gdb/testsuite/ChangeLog:
2019-04-11 Tom de Vries <tdevries@suse.de>
* boards/cc-with-dwz-m.exp: New file.
* boards/cc-with-dwz.exp: New file.
* boards/cc-with-tweaks.exp: Note that check-gdb doesn't work.
H.J. Lu [Thu, 11 Apr 2019 15:18:51 +0000 (08:18 -0700)]
x86: Add -z cet-report=[none|warning|error]
Add -z cet-report=[none|warning|error] to report the missing Intel
Indirect Branch Tracking (IBT) and Shadow Stack (SHSTK) properties
in input .note.gnu.property section. -z cet-report=none, which is
the default, will make the linker not report missing properties in
input files. -z cet-report=warning will make the linker issue a
warning for missing properties in input files. -z cet-report=error
will make the linker issue an error for missing properties in input
files. Note that -z ibt will turn off the missing IBT property report
and -z shstk will turn off the missing SHSTK property report.
Supported for Linux/i386 and Linux/x86_64.
bfd/
* elf-linker-x86.h (elf_x86_cet_report): New.
(elf_linker_x86_params): Add cet_report.
* elfxx-x86.c (_bfd_x86_elf_link_setup_gnu_properties): Report
missing IBT and SHSTK properties if needed.
H.J. Lu [Thu, 11 Apr 2019 13:52:03 +0000 (06:52 -0700)]
ld: Add -static-pie tests
Add -static-pie tests for DT_INIT_ARRAY, DT_FINI_ARRAY, DT_PREINIT_ARRAY
and IFUNC.
* testsuite/config/default.exp (STATIC_PIE_LDFLAGS): New. Set
to "-static-pie" if target compiler supports it.
* testsuite/ld-elf/elf.exp: Run -static-pie tests if
$STATIC_PIE_LDFLAGS isn't empty.
* testsuite/ld-ifunc/ifunc.exp: Likewise.
Tamar Christina [Thu, 11 Apr 2019 10:27:28 +0000 (11:27 +0100)]
AArch64: When DF_BIND_NOW don't use TLSDESC GOT value.
When using DF_BIND_NOW on AArch64 we don't reserve the GOT slot for a TLSDESC,
but we still emitted DT_TLSDESC_GOT and DT_TLSDESC_PLT. This caused random
memory corruption as the "special" value of (bfd_vma)-1 would be set for
dt_tlsdesc_got.
Since we don't have a value of dt_tlsdesc_got I also don't emit DT_TLSDESC_PLT
now becuase it would point to an incomplete PLT. To be able to write the PLT
entry DT_TLSDESC_GOT is needed and since we don't have one we can't write the
PLT entry either.
It is my understanding that GLIBC doesn't need these two entries when not lazy
loading. Conversely AArch32 does not reserve neither the GOT not the PLT slot
when doing DF_BIND_NOW.
AArch32 does not need these checks because these values are initialized to 0
and so the if (...) checks don't pass, but on AArch64 these are initialized
to (bfd_vma)-1 and thus we need some extra checks.
bfd/ChangeLog:
PR ld/24302
* elfnn-aarch64.c (elfNN_aarch64_size_dynamic_sections): Don't emit
DT_TLSDESC_GOT and DT_TLSDESC_PLT when DF_BIND_NOW.
(elfNN_aarch64_finish_dynamic_sections): Don't write PLT if DF_BIND_NOW.
ld/ChangeLog:
PR ld/24302
* testsuite/ld-aarch64/aarch64-elf.exp: Add new test.
* testsuite/ld-aarch64/tls-relax-gdesc-le-now.d: New test.
Sudakshina Das [Thu, 11 Apr 2019 09:19:37 +0000 (10:19 +0100)]
[BINUTILS, AArch64, 2/2] Update Store Allocation Tag instructions
This patch updates the Store allocation tags instructions in
Armv8.5-A Memory Tagging Extension. This is part of the changes
that have been introduced recently in the 00bet10 release
All of these instructions have an updated register operand (Xt -> <Xt|SP>)
Sudakshina Das [Thu, 11 Apr 2019 09:13:23 +0000 (10:13 +0100)]
[BINUTILS, AArch64, 1/2] Add new LDGM/STGM instruction
This patch adds the new LDGM/STGM instructions of the
Armv8.5-A Memory Tagging Extension. This is part of the changes
that have been introduced recently in the 00bet10 release
The instructions are as follows:
LDGM Xt, [<Xn|SP>]
STGM Xt, [<Xn|SP>]
*** gas/ChangeLog ***
2019-04-11 Sudakshina Das <sudi.das@arm.com>
* testsuite/gas/aarch64/armv8_5-a-memtag.d: New tests for ldgm and stgm.
* testsuite/gas/aarch64/armv8_5-a-memtag.s: Likewise.
* testsuite/gas/aarch64/illegal-memtag.l: Likewise.
* testsuite/gas/aarch64/illegal-memtag.s: Likewise.
*** opcodes/ChangeLog ***
2019-04-11 Sudakshina Das <sudi.das@arm.com>
* aarch64-asm-2.c: Regenerated.
* aarch64-dis-2.c: Likewise.
* aarch64-opc-2.c: Likewise.
* aarch64-tbl.h (aarch64_opcode): Add new ldgm and stgm.
Alan Hayward [Wed, 10 Apr 2019 14:58:27 +0000 (15:58 +0100)]
AArch64: Ensure regcache is reset between tests
A recent change made the AArch64 self tests resuse the saved regs
cache, rather than creating a new one. Ensure it is reset to default
values between tests.
Do this by splitting the reset functionality from trad_frame_alloc_saved_regs
into a new function.
Fixes selftest on AArch64.
gdb/ChangeLog:
* aarch64-tdep.c (aarch64_analyze_prologue_test): Reset saved regs.
* trad-frame.c (trad_frame_reset_saved_regs): New function.
(trad_frame_alloc_saved_regs): Call trad_frame_reset_saved_regs.
* trad-frame.h (trad_frame_reset_saved_regs): New declaration.
H.J. Lu [Thu, 11 Apr 2019 01:36:05 +0000 (18:36 -0700)]
ld: Don't define __rel[a]_iplt_start/__rel[a]_iplt_end in PIE
__rel[a]_iplt_start and __rel[a]_iplt_end are defined to handle IFUNC in
static executables. For PIE, since IFUNC is handled as the part of the
normal dynamic relocation processing, there is no need to define these
symbols in PIE.
* scripttempl/elf.sc (CREATE_PIC): New. Set for CREATE_SHLIB or
CREATE_PIE.
(__rel_iplt_start): Don't define for CREATE_PIC.
(__rel_iplt_end): Likewise.
(__rela_iplt_start): Likewise.
(__rela_iplt_end): Likewise.
Kevin Buettner [Sat, 16 Mar 2019 19:40:01 +0000 (12:40 -0700)]
Fix amd64->i386 linux syscall restart problem
This commit fixes some failures in gdb.base/interrupt.exp
when debugging a 32-bit i386 linux inferior from an amd64 host.
When running the following test...
make check RUNTESTFLAGS="--target_board unix/-m32 interrupt.exp"
... without this commit, I see the following output:
FAIL: gdb.base/interrupt.exp: continue (the program exited)
FAIL: gdb.base/interrupt.exp: echo data
FAIL: gdb.base/interrupt.exp: Send Control-C, second time
FAIL: gdb.base/interrupt.exp: signal SIGINT (the program is no longer running)
ERROR: Undefined command "".
ERROR: GDB process no longer exists
=== gdb Summary ===
When the test is run with this commit in place, we see 12 passes
instead. This is the desired behavior.
Analysis:
On Linux, when a syscall is interrupted by a signal, the syscall
may return -ERESTARTSYS when a signal occurs. Doing so indicates that
the syscall is restartable. Then, depending on settings associated
with the signal handler, and after the signal handler is called, the
kernel can then either return -EINTR or can cause the syscall to be
restarted. In this discussion, we are concerned with the latter
case.
On i386, the kernel returns this status via the EAX register.
When debugging a 32-bit (i386) process from a 64-bit (amd64)
GDB, the debugger fetches 64-bit registers even though the
process being debugged is 32-bit. Since we're debugging a 32-bit
target, only 32 bits are being saved in the register cache.
Now, ideally, GDB would save all 64-bits in the regcache and
then would be able to restore those same values when it comes
time to continue the target. I've looked into doing this, but
it's not easy and I don't see many benefits to doing so. One
benefit, however, would be that EAX would appear as a negative
value for doing syscall restarts.
At the moment, GDB is setting the high 32 bits of RAX (and other
registers too) to 0. So, when GDB restores EAX just prior to
a syscall restart, the high 32 bits of RAX are zeroed, thus making
it look like a positive value. For this particular purpose, we
need to sign extend EAX so that RAX will appear as a negative
value when EAX is set to -ERESTARTSYS. This in turn will cause
the signal handling code in the kernel to recognize -ERESTARTSYS
which will in turn cause the syscall to be restarted.
This commit is based on work by Jan Kratochvil from 2009:
Jan's patch had the sign extension code in amd64-nat.c. Several
other native targets make use of this code, so it seemed better
to move the sign extension code to a linux specific file. I
also added similar code to gdbserver.
Another approach is to fix the problem in the kernel. Hui Zhu
tried to get a fix into the kernel back in 2014, but it was not
accepted. Discussion regarding this approach may be found here:
https://lore.kernel.org/patchwork/patch/457841/
Even if a fix were to be put into the kernel, we'd still need
some kind of fix in GDB in order to support older kernels.
Finally, I'll note that Fedora has been carrying a similar patch for
at least nine years. Other distributions, including RHEL and CentOS
have picked up this change and have been using it too.
gdb/ChangeLog:
* amd64-linux-nat.c (amd64_linux_collect_native_gregset): New
function.
(fill_gregset): Call amd64_linux_collect_native_gregset instead
of amd64_collect_native_gregset.
(amd64_linux_nat_target::store_registers): Likewise.
gdb/gdbserver/ChangeLog:
* linux-x86-low.c (x86_fill_gregset): Sign extend EAX value
when using a 64-bit gdbserver.
Nick Clifton [Wed, 10 Apr 2019 14:49:36 +0000 (15:49 +0100)]
Pull in patch for libiberty that fixes a stack exhaustion bug when demangling a pathalogically constructed mangled name.
PR 89394
* cp-demangle.c (cplus_demangle_fill_name): Reject negative
lengths.
(d_count_templates_scopes): Replace num_templates and num_scopes
parameters with a struct d_print_info pointer parameter. Adjust
body of the function accordingly. Add recursion counter and check
that the recursion limit is not reached.
(d_print_init): Pass dpi parameter to d_count_templates_scopes.
Reset recursion counter afterwards, unless the recursion limit was
reached.
Tom Tromey [Sun, 10 Mar 2019 21:37:20 +0000 (15:37 -0600)]
Introduce a separate debug objfile iterator
This introduces a new iterator and range adapter for iteration over
the separate debug files of a given objfile. As in the current
approach, the requested objfile is returned first, followed by the
separate debug objfiles.
gdb/ChangeLog
2019-04-10 Tom Tromey <tom@tromey.com>
* symtab.c (lookup_global_symbol_from_objfile)
(lookup_symbol_in_objfile_from_linkage_name): Use the iterator.
* objfiles.h (class separate_debug_iterator): New.
(class separate_debug_range): New.
(struct objfile) <separate_debug_objfiles>: New method.
(objfile_separate_debug_iterate): Don't declare.
* objfiles.c (separate_debug_iterator::operator++): Rename from
objfile_separate_debug_iterate.
(objfile_relocate, objfile_rebase, objfile_has_symbols): Use the
iterator.
* minsyms.c (lookup_minimal_symbol_by_pc_section): Use the
iterator.
Disable R_X86_64_PLT32 generation as branch marker on Solaris/x86
The fix H.J. implemented for PR gas/22791 in the thread starting at
[PATCH] x86-64: Treat PC32 relocation with branch as PLT32
https://sourceware.org/ml/binutils/2018-02/msg00065.html
is causing problems on Solaris/x86. The native linker is strongly
preferred there, and there's no intention of implementing the linker
optimization he plans there. Besides, the kernel runtime linker,
otherwise has no need to deal with that reloc at all, and instead of
adding (possibly even more) workarounds with no benefit, it seems
appropriate to disable the R_X86_64_PLT32 generation as branch marker on
Solaris/x86 in the first place.
The patch itself is trivial, the only complication is adapting the
testsuite. Since I've found no way to have conditional sections in the
.d files, I've instead used the solution already found elsewhere of
having separate .d files for the affected tests in an i386/solaris
subdirectory and skipping the original ones.
Tested on amd64-pc-solaris2.11 and x86_64-pc-linux-gnu without
regressions.
Alan Modra [Wed, 10 Apr 2019 02:28:15 +0000 (11:58 +0930)]
cskyelf.em branch stub handling
This fixes the csky-elf ld-elf/pr21884 and ld-unique/pr21529 failures,
by disabling branch stubs for binary (and other non-csky) output.
The csky-linux target gets branch stubs off by default because
presumably there are reasons why branch stubs were disabled, but
rather than killing the support completely it can be enabled by
--branch-stub.
* emultempl/cskyelf.em (csk_elf_before_parse): New function,
setting use_branch_stub false for linux.
(csky_elf_create_output_section_statements): Do emit this
function and all others in the file for linux, plus the branch
option control. Disable branch stubs when non-ELF.
Alan Modra [Wed, 10 Apr 2019 02:05:48 +0000 (11:35 +0930)]
Fix some ld dependencies
In looking at the csky-elf vs. csky-linux differences, the first thing
I compared was csky_elf.sh and cskyelf_linux.sh. Those files are
mostly the same but besides the real differences, annoyingly have some
lines ordered differently. It's better in such cases to have one file
source the other, making differences plain. This patch does that for
csky and microblaze, removes an unused variable defined in a few
places, and fixes ld makefile dependencies.
* Makefile.am (eskyelf.c, eskyelf_linux.c): Depend on cskyelf.em.
(ecskyelf_linux.c): Depend on cskyelf.sh.
(eelf32microblazeel.c): Depend on elf32microblaze.sh.
* Makefile.in: Regenerate.
* emulparams/cskyelf.sh: Comment regarding cskelf_linux.sh.
(PAGE_SIZE): Don't define.
* emulparams/cskyelf_linux.sh: Source sckyelf.sh, leaving just
the differing variable defs/undefs.
* emulparams/elf32mcore.sh (PAGE_SIZE): Don't define.
* emulparams/elf32microblaze.sh: Comment re. elf32microblazeel.sh.
(OUTPUT_FORMAT): Use BIG_OUTPUT_FORMAT.
(PAGE_SIZE): Don't define.
* emulparams/elf32microblazeel.sh: Source elf32microblaze.sh,
leaving just the differing OUTPUT_FORMAT.
Alan Modra [Mon, 8 Apr 2019 07:27:51 +0000 (16:57 +0930)]
te-cloudabi.h
This patch is aimed a fixing large numbers of x86_64-cloudabi failures
caused by gas selecting the wrong target name.
* config/te-cloudabi.h: New file.
* config/tc-aarch64.c (aarch64_after_parse_args): Use TE_CLOUDABI
rather than TARGET_OS to select cloudabi.
* config/tc-i386.h (ELF_TARGET_FORMAT64): Define for TE_CLOUDABI.
* configure.tgt (*-*-cloudabi*): Set em=cloudabi.
Tom Tromey [Tue, 9 Apr 2019 19:19:28 +0000 (13:19 -0600)]
Fix Rust lexer buglet
PR rust/24414 points out that the Rust lexer uses strtoul when lexing
an integer, and that this can give the wrong results in some
situations.
This patch changes it to use strtoulst, like most of the rest of gdb.
It also adds a self test.
Tested on x86-64 Fedora 29 using an i686 build.
gdb/ChangeLog
2019-04-09 Ivan Begert <ivanbegert@gmail.com>
Tom Tromey <tromey@adacore.com>
PR rust/24414:
* rust-exp.y (rust_parser::lex_number): Use strtoulst.
(rust_lex_int_test): Change "value" to be LONGEST.
(rust_lex_tests): Add test for long integer literal.
Tom Tromey [Thu, 4 Apr 2019 22:57:11 +0000 (16:57 -0600)]
Use find_thread_in_random in select_event_lwp
I noticed that find_thread_in_random duplicates the code in
find_thread_in_random, so this patch changes the latter to use the
former.
There are two other spots in gdb that do this, but to unify all of
them would require switching some code from using the "iterate over"
idiom to using iterators.
Another possible improvement is that find_thread_in_random could be
made single-pass using reservoir sampling.
Tested by the buildbot.
gdb/gdbserver/ChangeLog
2019-04-09 Tom Tromey <tromey@adacore.com>
* linux-low.c (select_event_lwp): Use find_thread_in_random.
Tom Tromey [Thu, 4 Apr 2019 23:03:27 +0000 (17:03 -0600)]
Consistently use bool for fake_pid_p
I noticed a few spots where fake_pid_p is handled as an int, whereas
the field in struct inferior has type bool. This patch changes the
remaining places to use bool as well.
Tested by the buildbot.
gdb/ChangeLog
2019-04-09 Tom Tromey <tromey@adacore.com>
* remote.c (remote_target::remote_add_inferior): Change fake_pid_p
to bool.
(extended_remote_target::attach): Update.
(remote_target::remote_notice_new_inferior): Update.
(remote_target::add_current_inferior_and_thread): Update.
* inferior.c (exit_inferior_1): Use "false".
* corelow.c (add_to_thread_list): Make fake_pid_p bool.
Simon Marchi [Tue, 9 Apr 2019 16:32:26 +0000 (12:32 -0400)]
Use -qualified flag when setting temporary breakpoint in start command
When using the "start" command, GDB puts a temporary breakpoint on the
"main" symbol (we literally invoke the tbreak command). However, since
it does wild matching by default, it also puts a breakpoint on any C++
method or "main" function in a namespace. For example, when debugging
GDB, it creates a total of 24 locations:
(gdb) start
Temporary breakpoint 1 at 0x198c1e9: main. (24 locations)
as there are a bunch of methods called main in the selftests, such as
selftests::string_view::capacity_1::main()
If such method was called in the constructor of a global object, or a
function marked with the attribute "constructor", then we would stop at
the wrong place. Also, this causes a few extra symtabs (those that
contain the "wrong" mains) to be expanded for nothing.
The dummiest, most straightforward solution is to add -qualified when
invoking tbreak. With this patch, "start" creates a single-location
breakpoint, as expected.
I copied the start.exp test to start-cpp.exp and made it use a C++ test
file, which contains two main functions. The new test verifies that the
output of "start" is the output we get when we set a single-location
breakpoint.
gdb/ChangeLog:
* infcmd.c (run_command_1): Pass -qualified to tbreak when usind
the "start" command.
gdb/testsuite/ChangeLog:
* gdb.base/start-cpp.exp: New file.
* gdb.base/start-cpp.cc: New file.
Robert Suchanek [Tue, 9 Apr 2019 09:30:26 +0000 (17:30 +0800)]
[MIPS] Add RDHWR with the SEL field for MIPS R6.
In Release 6 of the MIPS architecture [1], instruction RDHWR supports
a 3rd operand to serve as the 3-bit select field for the hardware
register.
[1] "MIPS Architecture for Programmers Volume II-A: The MIPS32
Instruction Set Manual", Imagination Technologies Ltd., Document
Number: MD00086, Revision 6.06, December 15, 2016, Section 3.2
"Alphabetical List of Instructions", pp. 332-334
gas/
* testsuite/gas/mips/mips.exp: Run hwr-names test.
* testsuite/gas/mips/hwr-names.s: Add test cases for RDHWR with
the SEL field.
* testsuite/gas/mips/mipsr6@hwr-names.d: New file.
Kevin Buettner [Thu, 21 Mar 2019 03:38:33 +0000 (20:38 -0700)]
Rename python function thread_from_thread_handle to thread_from_handle
This renaming was done to stay consistent with the naming of the new
gdb.InferiorThread.handle method. I had initially named it "thread_handle"
but Tom Tromey suggested just "handle".
The old name (thread_from_thread_handle) still works, but is marked as
deprecated in comments in the code as well as in the documentation.
I have some code which uses these functions. I very much like the
brevity of the new names.
gdb/doc/ChangeLog:
* python.texi (Inferiors In Python): Rename
Inferior.thread_from_thread_handle to Inferior.thread_from_handle.
Add note about the former being deprecated.
gdb/ChangeLog:
* python/py-inferior.c (infpy_thread_from_thread_handle):
Adjust comments to reflect renaming of thread_from_thread_handle
to thread_from_handle. Adjust keywords. Fix type error message.
(inferior_object_methods): Add thread_from_handle. Retain
thread_from_thread_handle, but mark it as deprecated.
testsuite/ChangeLog:
* gdb.python/py-thrhandle.exp: Adjust tests to call
thread_from_handle instead of thread_from_thread_handle.
Kevin Buettner [Wed, 27 Feb 2019 22:06:28 +0000 (15:06 -0700)]
Support buffer objects as handles in Inferior.thread_from_thread_handle()
InferiorThread.handle() returns a python bytes object. We'd like to
be able to pass the output of this function, a thread handle, to
Inferior.thread_from_thread_handle(). Up to now,
thread_from_thread_handle() expects to receive a gdb.Value input.
This commit adds support to also allow a python buffer object to be
passed as the handle.
infpy_thread_from_thread_handle() calls find_thread_by_handle() which
has the obvious functionality. It used to pass the thread handle via
a struct value pointer. I've revised this interface to instead pass a
gdb::array_view<const gdb_byte> object. (Thanks to Tom Tromey for
suggesting this data structure over an earlier version which passed a
gdb_byte pointer and length.)
gdb/ChangeLog:
* gdbthread.h (find_thread_by_handle): Revise declaration.
* thread.c (find_thread_by_handle): Likewise. Adjust
implementation too.
* python/py-inferior.c (infpy_thread_from_thread_handle): Add
support for buffer objects as handles.
This patch adds a thread_info_to_thread_handle method to the target_ops
struct. It also implements this functionality for remote targets and
linux native threads.
Pedro Alves [Mon, 8 Apr 2019 12:03:54 +0000 (13:03 +0100)]
Some gdb_exception{,error,quit} tweaks
- Explicitly include <string> for std::string.
- Use std::make_shared to construct gdb_exception::message instead of
operator new, avoiding one heap allocation (2 instead of 3). Add
'const char *fmt, va_list ap' parameters to
gdb_exception{,error,quit}'s ctors, and do the std::make_shared in
the gdb_exception ctor.
- gdb_exception_error's constructor does not need to have an 'enum
return_reason' parameter, since it is always RETURN_ERROR, by
definition.
- Similarly, gdb_exception_quit's contructor does not need to have
'enum return_reason'/'enum errors' parameters.
- In the gdb_exception_{quit,_error} ctors that take a gdb_exception
as argument, assert that they're being passed a gdb_exception object
of the right 'reason'.
gdb/ChangeLog:
2019-04-08 Pedro Alves <palves@redhat.com>
* common/common-exceptions.c (throw_exception): Don't create
named object to throw; throw directly.
(throw_it): Likewise. Don't initialize gdb_exception::message
here, with new; pass FMT and AP to the ctor instead.
* common/common-exceptions.h: Include <string>.
(gdb_exception::gdb_exception(enum return_reason, enum errors,
const char *, va_list)): New ctor. Use std::make_shared.
(gdb_exception_error::gdb_exception_error(enum return_reason, enum
errors)): Delete.
(gdb_exception_error::gdb_exception_error(enum errors, const char
*, va_list)): New.
(gdb_exception_error::gdb_exception_error(const gdb_exception &)):
Add assertion.
(gdb_exception_quit::gdb_exception_quit(enum return_reason, enum
errors)): Delete.
(gdb_exception_quit::gdb_exception_quit(const char *, va_list)): New.
(gdb_exception_quit::gdb_exception_quit(const gdb_exception &)):
Add assertion.
Tom Tromey [Mon, 28 Jan 2019 17:45:45 +0000 (10:45 -0700)]
Replace throw_exception with throw in some cases
This replaces throw_exception with "throw;" when possible. This was
written by script. The rule that is followed is that uses of the
form:
catch (... &name)
{
...
throw_exception (name);
}
... can be rewritten. This should always be safe, because exceptions
are caught by const reference, and therefore can't be modified in the
body of the catch.
gdb/ChangeLog
2019-04-08 Tom Tromey <tom@tromey.com>
* valops.c (value_rtti_indirect_type): Replace throw_exception
with throw.
* tracefile-tfile.c (tfile_target_open): Replace throw_exception
with throw.
* thread.c (thr_try_catch_cmd): Replace throw_exception with
throw.
* target.c (target_translate_tls_address): Replace throw_exception
with throw.
* stack.c (frame_apply_command_count): Replace throw_exception
with throw.
* solib-spu.c (append_ocl_sos): Replace throw_exception with
throw.
* s390-tdep.c (s390_frame_unwind_cache): Replace throw_exception
with throw.
* rs6000-tdep.c (rs6000_frame_cache)
(rs6000_epilogue_frame_cache): Replace throw_exception with throw.
* remote.c: Replace throw_exception with throw.
* record-full.c (record_full_message, record_full_wait_1)
(record_full_restore): Replace throw_exception with throw.
* record-btrace.c:
(get_thread_current_frame_id, record_btrace_start_replaying)
(cmd_record_btrace_bts_start, cmd_record_btrace_pt_start)
(cmd_record_btrace_start): Replace throw_exception with throw.
* parse.c (parse_exp_in_context_1): Replace throw_exception with
throw.
* linux-nat.c (detach_one_lwp, linux_resume_one_lwp)
(resume_stopped_resumed_lwps): Replace throw_exception with throw.
* linespec.c:
(find_linespec_symbols): Replace throw_exception with throw.
* infrun.c (displaced_step_prepare, resume): Replace
throw_exception with throw.
* infcmd.c (post_create_inferior): Replace throw_exception with
throw.
* inf-loop.c (inferior_event_handler): Replace throw_exception
with throw.
* i386-tdep.c (i386_frame_cache, i386_epilogue_frame_cache)
(i386_sigtramp_frame_cache): Replace throw_exception with throw.
* frame.c (frame_unwind_pc, get_prev_frame_if_no_cycle)
(get_prev_frame_always, get_frame_pc_if_available)
(get_frame_address_in_block_if_available, get_frame_language):
Replace throw_exception with throw.
* frame-unwind.c (frame_unwind_try_unwinder): Replace
throw_exception with throw.
* eval.c (fetch_subexp_value, evaluate_var_value)
(evaluate_funcall, evaluate_subexp_standard): Replace
throw_exception with throw.
* dwarf2loc.c (call_site_find_chain)
(dwarf2_evaluate_loc_desc_full, dwarf2_locexpr_baton_eval):
Replace throw_exception with throw.
* dwarf2-frame.c (dwarf2_frame_cache): Replace throw_exception
with throw.
* darwin-nat.c (darwin_attach_pid): Replace throw_exception with
throw.
* cp-abi.c (baseclass_offset): Replace throw_exception with throw.
* completer.c (complete_line_internal): Replace throw_exception
with throw.
* compile/compile-object-run.c (compile_object_run): Replace
throw_exception with throw.
* cli/cli-script.c (process_next_line): Replace throw_exception
with throw.
* btrace.c (btrace_compute_ftrace_pt, btrace_compute_ftrace)
(btrace_enable, btrace_maint_update_pt_packets): Replace
throw_exception with throw.
* breakpoint.c (create_breakpoint, save_breakpoints): Replace
throw_exception with throw.
* break-catch-throw.c (re_set_exception_catchpoint): Replace
throw_exception with throw.
* amd64-tdep.c (amd64_frame_cache, amd64_sigtramp_frame_cache)
(amd64_epilogue_frame_cache): Replace throw_exception with throw.
* aarch64-tdep.c (aarch64_make_prologue_cache)
(aarch64_make_stub_cache): Replace throw_exception with throw.
gdb/gdbserver/ChangeLog
2019-04-08 Tom Tromey <tom@tromey.com>
* linux-low.c (linux_detach_one_lwp): Replace throw_exception with
throw.
(linux_resume_one_lwp): Likewise.
Tom Tromey [Wed, 3 Apr 2019 22:02:42 +0000 (16:02 -0600)]
Rewrite TRY/CATCH
This rewrites gdb's TRY/CATCH to plain C++ try/catch. The patch was
largely written by script, though one change (to a comment in
common-exceptions.h) was reverted by hand.
gdb/ChangeLog
2019-04-08 Tom Tromey <tom@tromey.com>
* xml-support.c: Use C++ exception handling.
* x86-linux-nat.c: Use C++ exception handling.
* windows-nat.c: Use C++ exception handling.
* varobj.c: Use C++ exception handling.
* value.c: Use C++ exception handling.
* valprint.c: Use C++ exception handling.
* valops.c: Use C++ exception handling.
* unittests/parse-connection-spec-selftests.c: Use C++ exception
handling.
* unittests/cli-utils-selftests.c: Use C++ exception handling.
* typeprint.c: Use C++ exception handling.
* tui/tui.c: Use C++ exception handling.
* tracefile-tfile.c: Use C++ exception handling.
* top.c: Use C++ exception handling.
* thread.c: Use C++ exception handling.
* target.c: Use C++ exception handling.
* symmisc.c: Use C++ exception handling.
* symfile-mem.c: Use C++ exception handling.
* stack.c: Use C++ exception handling.
* sparc64-linux-tdep.c: Use C++ exception handling.
* solib.c: Use C++ exception handling.
* solib-svr4.c: Use C++ exception handling.
* solib-spu.c: Use C++ exception handling.
* solib-frv.c: Use C++ exception handling.
* solib-dsbt.c: Use C++ exception handling.
* selftest-arch.c: Use C++ exception handling.
* s390-tdep.c: Use C++ exception handling.
* rust-lang.c: Use C++ exception handling.
* rust-exp.y: Use C++ exception handling.
* rs6000-tdep.c: Use C++ exception handling.
* rs6000-aix-tdep.c: Use C++ exception handling.
* riscv-tdep.c: Use C++ exception handling.
* remote.c: Use C++ exception handling.
* remote-fileio.c: Use C++ exception handling.
* record-full.c: Use C++ exception handling.
* record-btrace.c: Use C++ exception handling.
* python/python.c: Use C++ exception handling.
* python/py-value.c: Use C++ exception handling.
* python/py-utils.c: Use C++ exception handling.
* python/py-unwind.c: Use C++ exception handling.
* python/py-type.c: Use C++ exception handling.
* python/py-symbol.c: Use C++ exception handling.
* python/py-record.c: Use C++ exception handling.
* python/py-record-btrace.c: Use C++ exception handling.
* python/py-progspace.c: Use C++ exception handling.
* python/py-prettyprint.c: Use C++ exception handling.
* python/py-param.c: Use C++ exception handling.
* python/py-objfile.c: Use C++ exception handling.
* python/py-linetable.c: Use C++ exception handling.
* python/py-lazy-string.c: Use C++ exception handling.
* python/py-infthread.c: Use C++ exception handling.
* python/py-inferior.c: Use C++ exception handling.
* python/py-gdb-readline.c: Use C++ exception handling.
* python/py-framefilter.c: Use C++ exception handling.
* python/py-frame.c: Use C++ exception handling.
* python/py-finishbreakpoint.c: Use C++ exception handling.
* python/py-cmd.c: Use C++ exception handling.
* python/py-breakpoint.c: Use C++ exception handling.
* python/py-arch.c: Use C++ exception handling.
* printcmd.c: Use C++ exception handling.
* ppc-linux-tdep.c: Use C++ exception handling.
* parse.c: Use C++ exception handling.
* p-valprint.c: Use C++ exception handling.
* objc-lang.c: Use C++ exception handling.
* mi/mi-main.c: Use C++ exception handling.
* mi/mi-interp.c: Use C++ exception handling.
* mi/mi-cmd-stack.c: Use C++ exception handling.
* mi/mi-cmd-break.c: Use C++ exception handling.
* main.c: Use C++ exception handling.
* linux-thread-db.c: Use C++ exception handling.
* linux-tdep.c: Use C++ exception handling.
* linux-nat.c: Use C++ exception handling.
* linux-fork.c: Use C++ exception handling.
* linespec.c: Use C++ exception handling.
* language.c: Use C++ exception handling.
* jit.c: Use C++ exception handling.
* infrun.c: Use C++ exception handling.
* infcmd.c: Use C++ exception handling.
* infcall.c: Use C++ exception handling.
* inf-loop.c: Use C++ exception handling.
* i386-tdep.c: Use C++ exception handling.
* i386-linux-tdep.c: Use C++ exception handling.
* guile/scm-value.c: Use C++ exception handling.
* guile/scm-type.c: Use C++ exception handling.
* guile/scm-symtab.c: Use C++ exception handling.
* guile/scm-symbol.c: Use C++ exception handling.
* guile/scm-pretty-print.c: Use C++ exception handling.
* guile/scm-ports.c: Use C++ exception handling.
* guile/scm-param.c: Use C++ exception handling.
* guile/scm-math.c: Use C++ exception handling.
* guile/scm-lazy-string.c: Use C++ exception handling.
* guile/scm-frame.c: Use C++ exception handling.
* guile/scm-disasm.c: Use C++ exception handling.
* guile/scm-cmd.c: Use C++ exception handling.
* guile/scm-breakpoint.c: Use C++ exception handling.
* guile/scm-block.c: Use C++ exception handling.
* guile/guile-internal.h: Use C++ exception handling.
* gnu-v3-abi.c: Use C++ exception handling.
* gdbtypes.c: Use C++ exception handling.
* frame.c: Use C++ exception handling.
* frame-unwind.c: Use C++ exception handling.
* fbsd-tdep.c: Use C++ exception handling.
* f-valprint.c: Use C++ exception handling.
* exec.c: Use C++ exception handling.
* event-top.c: Use C++ exception handling.
* event-loop.c: Use C++ exception handling.
* eval.c: Use C++ exception handling.
* dwarf2read.c: Use C++ exception handling.
* dwarf2loc.c: Use C++ exception handling.
* dwarf2-frame.c: Use C++ exception handling.
* dwarf2-frame-tailcall.c: Use C++ exception handling.
* dwarf-index-write.c: Use C++ exception handling.
* dwarf-index-cache.c: Use C++ exception handling.
* dtrace-probe.c: Use C++ exception handling.
* disasm-selftests.c: Use C++ exception handling.
* darwin-nat.c: Use C++ exception handling.
* cp-valprint.c: Use C++ exception handling.
* cp-support.c: Use C++ exception handling.
* cp-abi.c: Use C++ exception handling.
* corelow.c: Use C++ exception handling.
* completer.c: Use C++ exception handling.
* compile/compile-object-run.c: Use C++ exception handling.
* compile/compile-object-load.c: Use C++ exception handling.
* compile/compile-cplus-symbols.c: Use C++ exception handling.
* compile/compile-c-symbols.c: Use C++ exception handling.
* common/selftest.c: Use C++ exception handling.
* common/new-op.c: Use C++ exception handling.
* cli/cli-script.c: Use C++ exception handling.
* cli/cli-interp.c: Use C++ exception handling.
* cli/cli-cmds.c: Use C++ exception handling.
* c-varobj.c: Use C++ exception handling.
* btrace.c: Use C++ exception handling.
* breakpoint.c: Use C++ exception handling.
* break-catch-throw.c: Use C++ exception handling.
* arch-utils.c: Use C++ exception handling.
* amd64-tdep.c: Use C++ exception handling.
* ada-valprint.c: Use C++ exception handling.
* ada-typeprint.c: Use C++ exception handling.
* ada-lang.c: Use C++ exception handling.
* aarch64-tdep.c: Use C++ exception handling.
gdb/gdbserver/ChangeLog
2019-04-08 Tom Tromey <tom@tromey.com>
* server.c: Use C++ exception handling.
* linux-low.c: Use C++ exception handling.
* gdbreplay.c: Use C++ exception handling.
Tom Tromey [Mon, 28 Jan 2019 17:11:10 +0000 (10:11 -0700)]
Make exceptions use std::string and be self-managing
This changes the exception's "message" member to be a shared_ptr
wrapping a std::string. This allows removing the stack of exception
messages, because now exceptions will self-destruct when needed. This
also adds a noexcept copy constructor and operator= to gdb_exception,
plus a "what" method.
gdb/ChangeLog
2019-04-08 Tom Tromey <tom@tromey.com>
Tom Tromey [Fri, 25 Jan 2019 00:31:21 +0000 (17:31 -0700)]
Simplify exception handling
Now that cleanups have been removed, TRY/CATCH can't be SJLJ-based any
more. This patch simplifies the exception handling code, by removing
the non-working variants.
Note that the "pure" C++ exception handling code is removed as well; I
think the route forward must be to change exceptions to be
self-destructing, so that try_scope_depth can simply be removed.
Some longjmp-based code remains, as it is needed to throw an exception
through readline.
gdb/ChangeLog
2019-04-08 Tom Tromey <tom@tromey.com>
Alan Modra [Mon, 8 Apr 2019 04:31:17 +0000 (14:01 +0930)]
Fix x86_64-rdos build fail
x86_64-rdos is one of the few x86_64 targets that is 64-bit only and
the x86_64 configure entries don't depend on elf-vxworks.lo. This
results in undefined references from elfxx-x86.o.
* configure.ac (elfxx_x86): Define and use.
* configure: Regenerate.
Tom Tromey [Sat, 20 Oct 2018 18:30:00 +0000 (12:30 -0600)]
Make "all" depend on "info"
I've broken "make info" a couple of times now, because I sometimes
forget to run "make info" after modifying a Texinfo file.
I don't know why gdb's "make all" doesn't build the info pages. I
suspect this was some Cygnus-local oddity back in the day.
This patch changes doc/Makefile.in so that the info pages are built by
"make all". As a point of reference, Automake has essentially always
worked this way. According to the Automake manual (I didn't
double-check) this is required by the GNU coding standards.
The first time I sent this patch, I mentioned that I wanted to look
into some existing bugs in bugzilla about missing "makeinfo".
However, today I tried and I discovered that BFD requires makeinfo,
and builds its info file as part of "all". So, I think this change
doesn't worsen the situation for users in any way, and can simply go
in.
gdb/doc/ChangeLog
2019-04-07 Tom Tromey <tom@tromey.com>
Alan Modra [Sun, 7 Apr 2019 11:17:06 +0000 (20:47 +0930)]
print_insn_powerpc tidy
* ppc-dis.c (print_insn_powerpc): Use a tiny state machine
op_separator to control printing of spaces, comma and parens
rather than need_comma, need_paren and spaces vars.
projects / thirdparty / binutils-gdb.git / log
