Alan Modra [Tue, 28 Feb 2017 00:08:51 +0000 (10:38 +1030)]
Nios2 dynobj handling fixes
A number of places in elf32-nios.c created dynamic sections but didn't
set the hash table dynobj. That meant we could have duplicate dynamic
sections connected to a number of bfds, so size_dynamic_sections
didn't properly discard or allocate contents.
Also, the entire set of dynamic sections was created in check_relocs
on seeing GOT relocs, when only .got related sections are needed,
probably done to hide segfaults later in finish_dynamic_sections.
The patch fixes these issues and makes the assembler emit errors when
nios2 lacks the necessary pc-relative relocs for subtraction
expressions, rather than silently generating bad code.
eg. ld-elf/merge. I've also tidied uses of elf32_nios2_hash_table and
elf_hash_table.
bfd/
PR 20995
* elf32-nios2.c (nios2_elf32_relocate_section): Use htab
rather than elf32_nios2_hash_table or elf_hash_table.
(create_got_section): Likewise.
(nios2_elf32_finish_dynamic_symbol): Likewise.
(nios2_elf32_adjust_dynamic_symbol): Likewise.
(nios2_elf32_size_dynamic_sections): Likewise.
(nios2_elf32_check_relocs): Delete dynobj, sgot, and srelgot
vars. Use htab equivalents directly instead. Don't create
all dynamic sections on needing just the GOT. Use a goto
rather than a fall-through with reloc test. Ensure
htab->dynobj is set when making dynamic sreloc section.
(nios2_elf32_finish_dynamic_sections): Delete dynobj, use htab
equivalent directly instead. Don't segfault on looking for
.dynamic when dynamic sections have not been created. Don't
segfault on .got.plt being discarded.
(nios2_elf32_size_dynamic_sections): Delete plt and got vars.
Don't set "relocs" on .rela.plt. Do handle .sbss. Delete
fixme and another not so relevant comment.
(nios2_elf_add_symbol_hook): Delete dynobj var. If not
already set, set hash table dynobj on creating .sbss.
gas/
* config/tc-nios2.h (TC_FORCE_RELOCATION_SUB_LOCAL): Define.
ld/
* testsuite/ld-elf/merge.d: xfail for nios.
Alan Modra [Mon, 27 Feb 2017 21:36:02 +0000 (08:06 +1030)]
Don't make dynamic .data.rel.ro SEC_READONLY
I'd made this dynamic section read-only so a flag test distinguished
it from .dynbss, but like any other .data.rel.ro section it really
should be marked read-write. (It is read-only after relocation, not
before.) When using the standard linker scripts this usually doesn't
matter since the output section is among other read-write sections and
not page aligned. However, it might matter in the extraordinary case
of the dynamic section being the only .data.rel.ro section with the
output section just happening to be page aligned and a multiple of a
page in size. In that case the output section would be read-only, and
live it its own read-only PT_LOAD segment, which is incorrect.
Alan Modra [Mon, 27 Feb 2017 22:02:36 +0000 (08:32 +1030)]
PowerPC addpcis fix
This came up because I was looking at ld/tmpdir/addpcis.o and noticed
the odd addends on REL16DX_HA. They ought to both be -4. The error
crept in due REL16DX_HA howto being pc-relative (as indeed it should
be), and code at gas/write.c:1001 after this comment
/* Make it pc-relative. If the back-end code has not
selected a pc-relative reloc, cancel the adjustment
we do later on all pc-relative relocs. */
*not* cancelling the pc-relative adjustment. So I've made a dummy
non-relative split reloc so that the generic code handles this, rather
than attempting to add hacks later in md_apply_fix which would not be
very robust. Having the new internal reloc also makes it easy to
support
addpcis rx,sym@ha
as an equivalent to
addpcis rx,(sym-0f)@ha
0:
The patch also fixes overflow checking, which must test whether the
addi will overflow too since @l relocs don't have any overflow check.
Lastly, since I was poking at md_apply_fix, I arranged to have the
generic gas/write.c code emit errors for subtraction expressions where
we lack reloc support.
include/
* elf/ppc64.h (R_PPC64_16DX_HA): New. Expand fake reloc comment.
* elf/ppc.h (R_PPC_16DX_HA): Likewise.
bfd/
* reloc.c (BFD_RELOC_PPC_16DX_HA): New.
* elf64-ppc.c (ppc64_elf_howto_raw <R_PPC64_16DX_HA>): New howto.
(ppc64_elf_reloc_type_lookup): Translate new bfd reloc.
(ppc64_elf_ha_reloc): Correct overflow test on REL16DX_HA.
(ppc64_elf_relocate_section): Likewise.
* elf32-ppc.c (ppc_elf_howto_raw <R_PPC_16DX_HA>): New howto.
(ppc_elf_reloc_type_lookup): Translate new bfd reloc.
(ppc_elf_check_relocs): Handle R_PPC_16DX_HA to pacify gcc.
* libbfd.h: Regenerate.
* bfd-in2.h: Regenerate.
gas/
* config/tc-ppc.c (md_assemble): Use BFD_RELOC_PPC_16DX_HA for addpcis.
(md_apply_fix): Remove fx_subsy check. Move code converting to
pcrel reloc earlier and handle BFD_RELOC_PPC_16DX_HA. Remove code
emiiting errors on seeing fx_pcrel set on unexpected relocs, as
that is done now by the generic code via..
* config/tc-ppc.h (TC_FORCE_RELOCATION_SUB_LOCAL): ..this. Define.
(TC_VALIDATE_FIX_SUB): Define.
ld/
* testsuite/ld-powerpc/addpcis.d: Define ext1 and ext2 at
limits of addpcis range.
Andrew Waterman [Wed, 22 Feb 2017 05:56:57 +0000 (21:56 -0800)]
bfd: RISC-V: relax to gp in more cases.
bfd/ChangeLog:
2017-02-24 Andrew Waterman <andrew@sifive.com>
* elfnn-riscv.c (GP_NAME): New macro.
(riscv_global_pointer_value): Use it.
(_bfd_riscv_relax_lui): If symbol and global pointer are in same
output section, consider only that section's alignment.
opcodes/
* aarch64-tbl.h (OP_SVE_HMH, OP_SVE_VMU_HSD, OP_SVE_VMVU_HSD)
(OP_SVE_VMVV_HSD, OP_SVE_VMVVU_HSD, OP_SVE_VM_HSD, OP_SVE_VUVV_HSD)
(OP_SVE_VUV_HSD, OP_SVE_VU_HSD, OP_SVE_VVVU_H, OP_SVE_VVVU_S)
(OP_SVE_VVVU_HSD, OP_SVE_VVV_D, OP_SVE_VVV_D_H, OP_SVE_VVV_H)
(OP_SVE_VVV_HSD, OP_SVE_VVV_S, OP_SVE_VVV_S_B, OP_SVE_VVV_SD_BH)
(OP_SVE_VV_BHSDQ, OP_SVE_VV_HSD, OP_SVE_VZVV_HSD, OP_SVE_VZV_HSD)
(OP_SVE_V_HSD): New macros.
(OP_SVE_VMU_SD, OP_SVE_VMVU_SD, OP_SVE_VM_SD, OP_SVE_VUVV_SD)
(OP_SVE_VU_SD, OP_SVE_VVVU_SD, OP_SVE_VVV_SD, OP_SVE_VZVV_SD)
(OP_SVE_VZV_SD, OP_SVE_V_SD): Delete.
(aarch64_opcode_table): Add new SVE instructions.
(aarch64_opcode_table): Use imm_rotate{1,2} instead of imm_rotate
for rotation operands. Add new SVE operands.
* aarch64-asm.h (ins_sve_addr_ri_s4): New inserter.
(ins_sve_quad_index): Likewise.
(ins_imm_rotate): Split into...
(ins_imm_rotate1, ins_imm_rotate2): ...these two inserters.
* aarch64-asm.c (aarch64_ins_imm_rotate): Split into...
(aarch64_ins_imm_rotate1, aarch64_ins_imm_rotate2): ...these two
functions.
(aarch64_ins_sve_addr_ri_s4): New function.
(aarch64_ins_sve_quad_index): Likewise.
(do_misc_encoding): Handle "MOV Zn.Q, Qm".
* aarch64-asm-2.c: Regenerate.
* aarch64-dis.h (ext_sve_addr_ri_s4): New extractor.
(ext_sve_quad_index): Likewise.
(ext_imm_rotate): Split into...
(ext_imm_rotate1, ext_imm_rotate2): ...these two extractors.
* aarch64-dis.c (aarch64_ext_imm_rotate): Split into...
(aarch64_ext_imm_rotate1, aarch64_ext_imm_rotate2): ...these two
functions.
(aarch64_ext_sve_addr_ri_s4): New function.
(aarch64_ext_sve_quad_index): Likewise.
(aarch64_ext_sve_index): Allow quad indices.
(do_misc_decoding): Likewise.
* aarch64-dis-2.c: Regenerate.
* aarch64-opc.h (FLD_SVE_i3h, FLD_SVE_rot1, FLD_SVE_rot2): New
aarch64_field_kinds.
(OPD_F_OD_MASK): Widen by one bit.
(OPD_F_NO_ZR): Bump accordingly.
(get_operand_field_width): New function.
* aarch64-opc.c (fields): Add new SVE fields.
(operand_general_constraint_met_p): Handle new SVE operands.
(aarch64_print_operand): Likewise.
* aarch64-opc-2.c: Regenerate.
gas/
* doc/c-aarch64.texi: Document that sve implies fp16, simd and compnum.
* config/tc-aarch64.c (parse_vector_type_for_operand): Allow .q
to be used with SVE registers.
(parse_operands): Handle new SVE operands.
(aarch64_features): Make "sve" require F16 rather than FP. Also
require COMPNUM.
* testsuite/gas/aarch64/sve.s: Add tests for new instructions.
Include compnum tests.
* testsuite/gas/aarch64/sve.d: Update accordingly.
* testsuite/gas/aarch64/sve-invalid.s: Add tests for new instructions.
* testsuite/gas/aarch64/sve-invalid.l: Update accordingly. Also
update expected output for new FMOV and MOV alternatives.
This patch adds a named "compnum" feature for the ARMv8.3-A FCADD
and FCMLA extensions.
include/
* opcode/aarch64.h (AARCH64_FEATURE_COMPNUM): New macro.
(AARCH64_ARCH_V8_3): Include AARCH64_FEATURE_COMPNUM.
opcodes/
* aarch64-tbl.h (aarch64_feature_simd_v8_3): Replace with...
(aarch64_feature_compnum): ...this.
(SIMD_V8_3): Replace with...
(COMPNUM): ...this.
(CNUM_INSN): New macro.
(aarch64_opcode_table): Use it for the complex number instructions.
gas/
* doc/c-aarch64.texi: Add a "compnum" entry.
* config/tc-aarch64.c (aarch64_features): Likewise,
* testsuite/gas/aarch64/advsimd-compnum.s: New test.
* testsuite/gas/aarch64/advsimd-compnum.d: Likewise.
The documentation entry for the SVE feature incorrectly said that
it was enabled by default for ARMv8-A or later. This patch fixes
that and also mentions that +sve implies +simd. (It also implies
+fp, but that follows by transitivity.)
[AArch64] Add separate feature flag for weaker release consistent load insns
The weaker release consistency support of ARMv8.3-A is allowed as an optional
extension for ARMv8.2-A, so separate command line option and feature flag is
added: -march=armv8.2-a+rcpc turns LDAPR, LDAPRB, LDAPRH instructions on.
opcodes/
2017-01-04 Szabolcs Nagy <szabolcs.nagy@arm.com>
* aarch64-tbl.h (RCPC, RCPC_INSN): Define.
(aarch64_opcode_table): Use RCPC_INSN.
include/
2017-01-04 Szabolcs Nagy <szabolcs.nagy@arm.com>
Andreas Krebbel [Mon, 2 Jan 2017 15:40:29 +0000 (16:40 +0100)]
S/390: Add support for new cpu architecture - arch12.
This adds support of new instructions to the S/390 specific parts.
The important feature of the new instruction set is the support of
single and extended precision floating point vector operations.
Note: arch12 is NOT the official name of the new CPU. It just
continues the series of archXX options supported as alternate names.
The archXX terminology refers to the edition number of the Principle
of Operations manual. The official CPU name will be added later while
keeping support of the arch12 for backwards compatibility.
No testsuite regressions.
Committed to mainline.
Bye,
-Andreas-
opcodes/ChangeLog:
2017-02-23 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* s390-mkopc.c (main): Accept arch12 as cpu string and vx2 as
facility.
* s390-opc.c: Add new operand description macros, new instruction
types, instruction masks, and new .insn instruction types.
* s390-opc.txt: Add new arch12 instructions.
include/ChangeLog:
2017-02-23 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* opcode/s390.h (enum s390_opcode_cpu_val): New value
S390_OPCODE_ARCH12.
(S390_INSTR_FLAG_VX2): New macro definition.
gas/ChangeLog:
2017-02-23 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/tc-s390.c (s390_parse_cpu): New entry for arch12.
* doc/as.texinfo: Document arch12 as cpu type.
* doc/c-s390.texi: Likewise.
* testsuite/gas/s390/s390.exp: Run arch12 specific tests.
* testsuite/gas/s390/zarch-arch12.d: New test.
* testsuite/gas/s390/zarch-arch12.s: New test.
* testsuite/gas/s390/zarch-z13.d: Rename some mnemonics in the
output patterns.
Alan Modra [Thu, 23 Feb 2017 01:50:42 +0000 (12:20 +1030)]
Correct VLE 16D and SDAREL relocations
PR 20744
bfd/
* elf32-ppc.c (ppc_elf_howto_raw): Correct dst_mask on all VLE
16D relocations.
(ppc_elf_vle_split16): Correct field mask and shift for 16D relocs.
(ppc_elf_relocate_section): Correct calculation for VLE SDAREL
relocs.
ld/
* testsuite/ld-powerpc/vle-reloc-2.s: Use r6 for last insn of
each group.
* testsuite/ld-powerpc/vle-reloc-2.d: Update for above change
and sdarel reloc fix.
Alan Modra [Thu, 16 Feb 2017 11:49:10 +0000 (22:19 +1030)]
ld testsuite function pointer comparisons vs. hppa
ld/testsuite/ld-elf/check-ptr-eq.c fails for hppa, since function
pointers may point at plabels. It isn't valid to cast two function
pointers to void* and then compare the void pointers.
* testsuite/ld-elf/check-ptr-eq.c (check_ptr_eq): Change params
from void pointers to function pointers.
* testsuite/ld-elf/pr18718.c: Update to suit.
* testsuite/ld-elf/pr18720a.c: Update to suit.
Alan Modra [Tue, 14 Feb 2017 00:15:51 +0000 (10:45 +1030)]
hppa -z relro again
I misunderstood the hppa alias problem. File offsets of segments need
to be such that no page is mapped twice with different permissions.
(Which still seems to me like something the kernel could fix, but
anyhow, this is not so difficult to achieve in ld.)
PR 21000
bfd/
* elf-bfd.h (struct elf_backend_data): Add no_page_alias.
* elfxx-target.h (elf_backend_no_page_alias): Define.
(elfNN_bed): Init new field.
* elf.c (assign_file_positions_for_load_sections): If no_page_alias
ensure PT_LOAD segment starts on a new page.
* elf32-hppa.c (elf_backend_no_page_alias): Define.
ld/
* testsuite/ld-elf/loadaddr1.d: Adjust for hppa file offsets.
* testsuite/ld-elf/loadaddr2.d: Likewise.
* testsuite/ld-elf/loadaddr3a.d: Likewise.
* testsuite/ld-scripts/rgn-at5.d: Likewise.
Alan Modra [Thu, 16 Feb 2017 01:53:12 +0000 (12:23 +1030)]
PR21132, hppa-linux pie support doesn't work
This fixes a long-standing hppa bug seen when generating PIEs, and I
think possible to trigger with forced local symbols in shared
libraries. Not allocating enough space for PLT relocs results in ld
writing outside of the buffer.
PR 21132
* elf32-hppa.c (allocate_plt_static): Allocate space for relocs
if pic.
H.J. Lu [Wed, 15 Feb 2017 19:39:30 +0000 (11:39 -0800)]
i386: Allow "lea foo@GOT, %reg" in PIC
"lea foo@GOT, %reg" is OK in PIC since it only loads the GOT offset
into register, which can be used later with a GOT base register to
get the value in the GOT entry.
Palmer Dabbelt [Wed, 8 Feb 2017 19:26:07 +0000 (11:26 -0800)]
Don't use "_gp" on RISC-V, use "_global_pointer$" instead
"_gp" could conflict with ABI-complient code. While it's probably OK
because MIPS uses this name, we figured it'd be good to clean this up
before a release with RISC-V in it.
ld/ChangeLog:
2017-02-13 Palmer Dabbelt <palmer@dabbelt.com>
* emulparams/elf32lriscv-defs.sh (SDATA_START_SYMBOLS): Change
_gp to __global_pointer$.
bfd/ChangeLog:
2017-02-13 Palmer Dabbelt <palmer@dabbelt.com>
* elfnn-riscv.c (riscv_global_pointer_value): Change _gp to
__global_pointer$.
MIPS/BFD: Respect the ELF gABI dynamic symbol table sort requirement
Ensure all local symbols precede external symbols in the dynamic symbol
table.
No local symbols are expected to make it to the dynamic symbol table
except for section symbols already taken care of, so this is really a
safeguard only against a potential BFD bug otherwise not so harmful,
which may become a grave one due to a symbol table sorting requirement
violation (see PR ld/20828 for an example). This means however that no
test suite coverage is possible for this change as code introduced here
is not normally expected to trigger.
Logically split then the part of the dynamic symbol table which is not
global offset table mapped, into a local area at the beginning and an
external area following. By the time `mips_elf_sort_hash_table' is
called we have the number of local dynamic symbol table entries (section
and non-section) already counted in `local_dynsymcount', so use it to
offset the external area from the beginning.
bfd/
* elfxx-mips.c (mips_elf_hash_sort_data): Add
`max_local_dynindx'.
(mips_elf_sort_hash_table): Handle it.
(mips_elf_sort_hash_table_f) <GGA_NONE>: For forced local
symbols bump up `max_local_dynindx' rather than
`max_non_got_dynindx'.
MIPS/BFD: Use `bfd_size_type' for dynamic symbol table indices
Use the `bfd_size_type' data type for dynamic symbol table indices in
the MIPS backend, in line with generic code and removing the need to use
a cast.
bfd/
* elfxx-mips.c (mips_elf_hash_sort_data): Convert the
`min_got_dynindx', `max_unref_got_dynindx' and
`max_non_got_dynindx' members to the `bfd_size_type' data type.
(mips_elf_sort_hash_table): Adjust accordingly.
MIPS/BFD: Fix assertion in `mips_elf_sort_hash_table'
Move the assertion on non-NULL `htab' in `mips_elf_sort_hash_table' to
the beginning, before the pointer is dereferenced (`mips_elf_hash_table
(info)' and `elf_hash_table (info)' both point to the same memory
location, differently typed).
bfd/
* elfxx-mips.c (mips_elf_sort_hash_table): Move assertion on
non-NULL `htab' to the beginning.
Alan Modra [Sat, 11 Feb 2017 06:47:59 +0000 (17:17 +1030)]
Fix use after free in cgen instruction lookup
* cgen-opc.c (cgen_lookup_insn): Delete buf and base_insn temps.
Use insn_bytes_value and insn_int_value directly instead. Don't
free allocated memory until function exit.
* elf32-cris.c (elf_cris_finish_dynamic_symbol): Remove now unused
local variable dynobj.
PR ld/20995
* elf32-cris.c (elf_cris_size_dynamic_sections): Handle sdynrelro.
(elf_cris_adjust_dynamic_symbol): Place variables copied into the
executable from read-only sections into sdynrelro.
(elf_cris_finish_dynamic_symbol): Select sreldynrelro for
dynamic relocs in sdynrelro.
(elf_backend_want_dynrelro): Define.
MIPS/LD/testsuite: Correct relocation addends in VxWorks tests
Fix commit 171191bac50e ("Add support for STT_IFUNC"),
<https://sourceware.org/ml/binutils/2008-12/msg00052.html>, commit e04d7088afe0 ("PR ld/14088: Always display addend as signed hex
number"), <https://sourceware.org/ml/binutils/2012-05/msg00123.html> and
commit 343dbc36ffae ("Print addend as signed in objdump"),
<https://sourceware.org/ml/binutils/2012-05/msg00163.html> regressions:
FAIL: VxWorks executable test 1 (dynamic)
FAIL: ld-mips-elf/vxworks-forced-local-1
seen with `mips-vxworks' and `mipsel-vxworks' targets and adjust dump
patterns according to changes made to the presentation of relocation
addends in `readelf -r' and `objdump -r' output.
ld/
* testsuite/ld-mips-elf/vxworks-forced-local-1.d: Correct the
presentation of relocation addends.
* testsuite/ld-mips-elf/vxworks1-lib.rd: Likewise.
* testsuite/ld-mips-elf/vxworks1.dd: Likewise.
* testsuite/ld-mips-elf/vxworks1.rd: Likewise.
MIPS/LD/testsuite: Fix a `tls-multi-got-1-1.s' build failure
Correct a commit ec9ab52c3217 ("gas: consistently emit diagnostics for
non-zero data emission to .bss/.struct"),
<https://sourceware.org/ml/binutils/2015-12/msg00073.html> regression:
.../ld/testsuite/ld-mips-elf/tls-multi-got-1-1.s: Assembler messages:
.../ld/testsuite/ld-mips-elf/tls-multi-got-1-1.s:39: Error: attempt to store non-zero value in section `.tbss'
ERROR: -EB -march=mips1 -32 -KPIC .../ld/testsuite/ld-mips-elf/tls-multi-got-1-1.s: assembly failed
UNRESOLVED: Shared library with multiple GOTs and TLS
in MIPS target testing and move `tlsvar_ld' to `.tdata' section, in line
with the remaining local dynamic definitions introduced with the set of
tests added with commit f4e584bd00f1 ("TLS support for MIPS"),
<https://sourceware.org/ml/binutils/2005-02/msg00607.html>.
ld/
* testsuite/ld-mips-elf/tls-multi-got-1-1.s: Place `tlsvar_ld'
in `.tdata' section.
* testsuite/ld-mips-elf/tls-multi-got-1.got: Adjust accordingly.
* testsuite/ld-mips-elf/tls-multi-got-1.r: Likewise.
Complement commit 9d862524f6ae ("MIPS: Verify the ISA mode and alignment
of branch and jump targets") and add GAS and LD options to control the
checks for invalid branches between ISA modes introduced there, to help
with some handwritten code lacking `.insn' annotation for labels used as
branch targets and code produced by older versions of GCC which suffers
from the issue with branches to code that has been optimized away,
addressed with GCC commit 242424 ("MIPS/GCC: Mark trailing labels with
`.insn'"), <https://gcc.gnu.org/ml/gcc-patches/2016-11/msg01061.html>.
bfd/
* elfxx-mips.h (_bfd_mips_elf_insn32): Rename prototype to...
(_bfd_mips_elf_linker_flags): ... this. Add another parameter.
* elfxx-mips.c (mips_elf_link_hash_table): Add
`ignore_branch_isa' member.
(mips_elf_perform_relocation): Do not treat an ISA mode mismatch
in branch relocation calculation as an error if
`ignore_branch_isa' has been set.
(_bfd_mips_elf_insn32): Rename to...
(_bfd_mips_elf_linker_flags): ... this. Rename the `on'
parameter to `insn32' and add an `ignore_branch_isa' parameter.
Handle the new parameter.
gas/
* config/tc-mips.c (mips_ignore_branch_isa): New variable.
(options): Add OPTION_IGNORE_BRANCH_ISA and
OPTION_NO_IGNORE_BRANCH_ISA enum values.
(md_longopts): Add "mignore-branch-isa" and
"mno-ignore-branch-isa" options.
(md_parse_option): Handle OPTION_IGNORE_BRANCH_ISA and
OPTION_NO_IGNORE_BRANCH_ISA.
(fix_bad_cross_mode_branch_p): Return FALSE if
`mips_ignore_branch_isa' has been set.
(md_show_usage): Add `-mignore-branch-isa' and
`-mno-ignore-branch-isa'.
* doc/as.texinfo (Target MIPS options): Add
`-mignore-branch-isa' and `-mno-ignore-branch-isa' options.
(-mignore-branch-isa, -mno-ignore-branch-isa): New options.
* doc/c-mips.texi (MIPS Options): Add `-mignore-branch-isa' and
`-mno-ignore-branch-isa' options.
* testsuite/gas/mips/branch-local-ignore-2.d: New test.
* testsuite/gas/mips/branch-local-ignore-3.d: New test.
* testsuite/gas/mips/branch-local-ignore-n32-2.d: New test.
* testsuite/gas/mips/branch-local-ignore-n32-3.d: New test.
* testsuite/gas/mips/branch-local-ignore-n64-2.d: New test.
* testsuite/gas/mips/branch-local-ignore-n64-3.d: New test.
* testsuite/gas/mips/mips.exp: Run the new tests.
ld/
* emultempl/mipself.em (ignore_branch_isa): New variable.
(mips_create_output_section_statements): Rename
`_bfd_mips_elf_insn32' called to `_bfd_mips_elf_linker_flags',
add `ignore_branch_isa' argument.
(PARSE_AND_LIST_PROLOGUE): Add OPTION_IGNORE_BRANCH_ISA and
OPTION_NO_IGNORE_BRANCH_ISA enum values.
(PARSE_AND_LIST_LONGOPTS): Add "ignore-branch-isa" and
"no-ignore-branch-isa" options.
(PARSE_AND_LIST_OPTIONS): Add `--ignore-branch-isa' and
`--no-ignore-branch-isa'.
(PARSE_AND_LIST_ARGS_CASES): Handle OPTION_IGNORE_BRANCH_ISA and
OPTION_NO_IGNORE_BRANCH_ISA.
* ld.texinfo (Options specific to MIPS targets): Add
`--ignore-branch-isa' and `--no-ignore-branch-isa' options.
(ld and the MIPS family): Likewise.
* testsuite/ld-mips-elf/bal-jalx-pic-ignore.d: New test.
* testsuite/ld-mips-elf/bal-jalx-pic-ignore-n32.d: New test.
* testsuite/ld-mips-elf/bal-jalx-pic-ignore-n64.d: New test.
* testsuite/ld-mips-elf/unaligned-branch-ignore-2.d: New test.
* testsuite/ld-mips-elf/unaligned-branch-ignore-r6-1: New test.
* testsuite/ld-mips-elf/unaligned-branch-ignore-mips16: New
test.
* testsuite/ld-mips-elf/unaligned-branch-ignore-micromips: New
test.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
MIPS/GAS/testsuite: Convert branch local list tests to dump tests
gas/
* testsuite/gas/mips/branch-local-2.d: New test.
* testsuite/gas/mips/branch-local-3.d: New test.
* testsuite/gas/mips/branch-local-n32-2.d: New test.
* testsuite/gas/mips/branch-local-n32-3.d: New test.
* testsuite/gas/mips/branch-local-n64-2.d: New test.
* testsuite/gas/mips/branch-local-n64-3.d: New test.
* testsuite/gas/mips/mips.exp: Fold corresponding list tests
into the new tests.
Solaris2/LD: Fix anonymous version script acceptance bug
Correct a bug in Solaris 2 linker emulation code triggered by a test
introduced with commit 81ff47b3a546 ("PR ld/20828: Fix linker script
symbols wrongly forced local with section GC") and only create implicit
version nodes if versioning is actually introduced with a version script
(or VERSION command) rather than only global vs local symbol visibility
selected, fixing an:
ld: anonymous version tag cannot be combined with other version tags
linker error produced whenever a version script (or VERSION command) is
used that does not assign symbol versions, such as:
{ global: foo; bar; local: *; };
and consequently removing a:
FAIL: PR ld/20828 dynamic symbols with section GC (version script)
test suite failure with the `x86_64-solaris2' target.
ld/
* emultempl/solaris2.em (elf_solaris2_before_allocation): Do not
add implicit version nodes if an anonymous version tag is being
used.
Make the sh_info field of .rel.plt point to .plt (MIPS).
gold/
* mips.cc (Mips_output_data_plt::rel_plt): Remove const from return
type.
(Target_mips::make_plt_entry): Make the sh_info field of .rel.plt
point to .plt.
Fix MIPS GOT when global symbols are forced to local visibility.
gold/
PR gold/21054
* mips.cc (Mips_got_info::record_global_got_symbol): Don't add symbol
to the dynamic symbol table if it is forced to local visibility.
(Target_mips::do_finalize_sections): Don't add __RLD_MAP symbol to the
dynamic symbol table if it is forced to local visibility.
Complement commit 81ff47b3a546 ("PR ld/20828: Fix linker script symbols
wrongly forced local with section GC") and add `.plt' to the list of
output sections created, fixing:
FAIL: PR ld/20828 dynamic symbols with section GC (auxiliary shared library)
FAIL: PR ld/20828 dynamic symbols with section GC (plain)
FAIL: PR ld/20828 dynamic symbols with section GC (version script)
failures with `riscv32-elf', `riscv32-linux', `riscv64-elf' and
`riscv64-linux' targets caused by LD crashing in the absence of such a
section.
PR ld/20828: Remove leading `_' from symbols used in tests
Complement commit 81ff47b3a546 ("PR ld/20828: Fix linker script symbols
wrongly forced local with section GC") and remove the leading underscore
from `_fdata' and `_edata' symbols used in tests, fixing a:
FAIL: PR ld/20828 dynamic symbols with section GC (version script)
failure with targets such as: `bfin-elf', `bfin-uclinux', `metag-elf',
`metag-linux' `mn10300-elf', `sh-elf', `sh64-elf', and possibly other
ones, that have `_' set (with `elf_symbol_leading_char') as the leading
character for symbols. As from commit 93252b1cf41a ("bfd/ld: handle ABI
prefixes in version scripts") these targets strip the leading underscore
before applying version script rules, because the (default) syntax for
symbol names is that of the C language rather than their low-level
symbol table encoding.
ld/
PR ld/20828
* testsuite/ld-elf/pr20828.ld: Rename `_fdata' and `_edata' to
`fdata' and `edata' respectively.
* testsuite/ld-elf/pr20828.ver: Adjust accordingly.
* testsuite/ld-elf/pr20828-a.sd: Likewise.
* testsuite/ld-elf/pr20828-b.sd: Likewise.
* testsuite/ld-elf/pr20828-c.sd: Likewise.
Complement commit 81ff47b3a546 ("PR ld/20828: Fix linker script symbols
wrongly forced local with section GC") and make tests check for the
presence of global `_fdata' and `_edata' symbols separately, removing
any dependency on symbol table ordering for tests to succeed and
removing:
FAIL: PR ld/20828 dynamic symbols with section GC (auxiliary shared library)
FAIL: PR ld/20828 dynamic symbols with section GC (plain)
failures with the `x86_64-solaris2' target, which has additional
intervening entries:
Symbol table '.dynsym' contains 6 entries:
Num: Value Size Type Bind Vis Ndx Name
0: 0000000000000000 0 NOTYPE LOCAL DEFAULT UND
1: 0000000000000000 0 NOTYPE GLOBAL DEFAULT 1 _fdata
2: 0000000000000000 0 OBJECT GLOBAL DEFAULT 1 _DYNAMIC
3: 0000000000000000 0 OBJECT GLOBAL DEFAULT ABS _PROCEDURE_LINKAGE_TABLE_
4: 0000000000000000 0 NOTYPE GLOBAL DEFAULT 1 _edata
5: 00000000000001b8 0 OBJECT GLOBAL DEFAULT 4 _GLOBAL_OFFSET_TABLE_
Rename dump pattern files accordingly for consistency.
causing the garbage collection of unused symbols present in a DSO
involved in a link to make identically named symbols ordinarily defined
(i.e. not hidden or PROVIDEd) by a linker script local, even though the
latter symbols are supposed to be global as if no DSO defined them as
well.
This is because linker script assignments are processed very late as
`lang_process' proceeds, down in the call to `ldemul_before_allocation',
which is made after the call to `lang_gc_sections' to do input section
garbage collecting. Consequently if unused, then any such DSO-defined
symbol has already been garbage-collected and internally marked local.
It would ordinarily be removed from dynamic symbol table output, however
a linker script assignment correctly replaces its original definition
with the new one and enters it into the dynamic symbol table produced as
it is supposed to be exported. The original local marking is however
retained making the symbol local in the dynamic symbol table and
therefore not available externally. This also causes a sorting problem
with the MIPS target, which does not expect non-section local dynamic
symbols to be output and produces an invalid binary.
Fix the problem then, by removing the `forced_local' marking for the
offending case and add suitable test cases. First to verify that unused
symbols ordinarily defined with linker script assignments remain
exported in the context of input section garbage collection whether or
not a DSO defining identically named symbols is present in the link.
Second that a linker version script still correctly retains or removes
such symbols as requested.
bfd/
PR ld/20828
* elflink.c (bfd_elf_record_link_assignment): Clear any
`forced_local' marking for DSO symbols that are not being
provided.
ld/
PR ld/20828
* testsuite/ld-elf/pr20828-1.sd: New test.
* testsuite/ld-elf/pr20828-2a.sd: New test.
* testsuite/ld-elf/pr20828-2b.sd: New test.
* testsuite/ld-elf/pr20828.ld: New test linker script.
* testsuite/ld-elf/pr20828.ver: New test version script.
* testsuite/ld-elf/pr20828.s: New test source.
* testsuite/ld-elf/shared.exp: Run the new test.
PR gas/20649: MIPS: Fix GOT16/LO16 reloc pairing with comdat sections
Correct a regression from commit 8614eeee67f9 ("Traditional MIPS
patches"), <https://sourceware.org/ml/binutils/2000-07/msg00018.html>,
which caused symbols in linkonce or what is these days known as comdat
sections to be treated as external for the purpose of PIC relocation
generation even if their binding remains STB_LOCAL. This in turn
disabled GOT16/LO16 relocation pairing with references to such symbols,
as no complementing LO16 relocation is expected for external GOT16
references in the o32 ABI, which ultimately leads to link errors, e.g.:
ld: comdat-reloc.o: Can't find matching LO16 reloc against `foo' for R_MIPS_GOT16 at 0x24 in section `.text.bar[bar]'
as with the LD test case included with this change.
Revert the special case for symbols in comdat sections then, making code
actually match `adjust_reloc_syms' as indicated in its explanatory
comment, and adjust calling code accordingly. Also bring back the
corresponding description of what now is `s_is_linkonce', lost with
commit 5f0fe04bc550 ("Improved MIPS16/MIPS32 code intermixing for
gas."), <https://www.sourceware.org/ml/binutils/2006-07/msg00039.html>.
gas/
PR gas/20649
* config/tc-mips.c (pic_need_relax): Don't check for linkonce
symbols, remove the `segtype' parameter.
(mips_frob_file, md_estimate_size_before_relax): Adjust
accordingly.
(s_is_linkonce): Add an explanatory comment.
* testsuite/gas/mips/comdat-reloc.d: New test.
* testsuite/gas/mips/comdat-reloc.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new test.
Andrew Waterman [Thu, 22 Dec 2016 02:05:28 +0000 (18:05 -0800)]
RISC-V/GAS: Support more relocs against constant addresses
Previously, some pseudoinstructions like "call" only accepted
symbolic addresses and rejected constant addresses with an
esoteric internal error. This patch enables them by deferring
application of constant relocations to md_apply_fix, rather than
eagerly applying them during instruction assembly.
gas/ChangeLog
2017-01-09 Andrew Waterman <andrew@sifive.com>
* config/tc-riscv.c (append_insn): Don't eagerly apply relocations
against constants.
(md_apply_fix): Mark relocations against constants as "done."
projects / thirdparty / binutils-gdb.git / log
