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git.ipfire.org Git - thirdparty/gcc.git/commit
i386: Optimize pinsrq of 0 with index 1 into movq [PR94866]
Add new pattern involving vec_merge RTX that is produced by combine from the
combination of sse4_1_pinsrq and *movdi_internal:
7: r86:DI=0
8: r85:V2DI=vec_merge(vec_duplicate(r86:DI),r87:V2DI,0x2)
REG_DEAD r87:V2DI
REG_DEAD r86:DI
Successfully matched this instruction:
(set (reg:V2DI 85 [ a ])
(vec_merge:V2DI (reg:V2DI 87)
(const_vector:V2DI [
(const_int 0 [0]) repeated x2
])
(const_int 1 [0x1])))
PR target/94866
gcc/ChangeLog:
* config/i386/sse.md (*sse2_movq128_<mode>_1): New insn pattern.
gcc/testsuite/ChangeLog:
* g++.target/i386/pr94866.C: New test.