i386: Fix register spill failure with concat RTX [PR111010]

i386: Fix register spill failure with concat RTX [PR111010]

Disable (=&r,m,m) alternative for 32-bit targets. The combination of two
memory operands (possibly with complex addressing mode), early clobbered
output, frame pointer and PIC registers uses too much registers on
a register constrained 32-bit target.

Also merge two similar patterns using DWIH mode iterator.

	PR target/111010

gcc/ChangeLog:

	* config/i386/i386.md (*concat<any_or_plus:mode><dwi>3_3):
	Merge pattern from *concatditi3_3 and *concatsidi3_3 using
	DWIH mode iterator.  Disable (=&r,m,m) alternative for
	32-bit targets.
	(*concat<any_or_plus:mode><dwi>3_3): Disable (=&r,m,m)
	alternative for 32-bit targets.