git.ipfire.org Git - thirdparty/gcc.git/commit

author	H.J. Lu <hjl.tools@gmail.com>
	Mon, 21 Mar 2022 18:45:59 +0000 (11:45 -0700)
committer	H.J. Lu <hjl.tools@gmail.com>
	Mon, 21 Mar 2022 22:34:36 +0000 (15:34 -0700)
commit	e8b6afa98f0a390c955a089a3d61fdd24f4e1d3a
tree	254268e8936d874b44f81c218127455f0e71d1e8	tree \| snapshot
parent	c65bd532e225996cc9c5b75355d2cb648d0bcfc5	commit \| diff

x86: Disable SSE in ISA2 for -mgeneral-regs-only

Replace OPTION_MASK_ISA2_AVX512F_UNSET with OPTION_MASK_ISA2_SSE_UNSET
in OPTION_MASK_ISA2_GENERAL_REGS_ONLY_UNSET to disable SSE, AVX and
AVX512 ISAs.

gcc/

PR target/105000
* common/config/i386/i386-common.cc
(OPTION_MASK_ISA2_GENERAL_REGS_ONLY_UNSET): Replace
OPTION_MASK_ISA2_AVX512F_UNSET with OPTION_MASK_ISA2_SSE_UNSET.

gcc/testsuite/

PR target/105000
* gcc.target/i386/pr105000-1.c: New test.
* gcc.target/i386/pr105000-2.c: Likewise.
* gcc.target/i386/pr105000-3.c: Likewise.
* gcc.target/i386/pr105000-4.c: Likewise.

gcc/common/config/i386/i386-common.cc		diff \| blob \| blame \| history
gcc/testsuite/gcc.target/i386/pr105000-1.c	[new file with mode: 0644]	blob
gcc/testsuite/gcc.target/i386/pr105000-2.c	[new file with mode: 0644]	blob
gcc/testsuite/gcc.target/i386/pr105000-3.c	[new file with mode: 0644]	blob
gcc/testsuite/gcc.target/i386/pr105000-4.c	[new file with mode: 0644]	blob