PR middle-end/89797 - ICE on a vector_size (1LU << 33) int variable

gcc/ChangeLog:
	* tree.h (TYPE_VECTOR_SUBPARTS): Use HOST_WIDE_INT_1U.
	* config/aarch64/aarch64.c (aarch64_simd_vector_alignment): Avoid
	assuming type size fits in SHWI.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@270447 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 43100ca02778eda2b738c01bbc2e251a0142ecf9..3784ca2d46516db4f6e3a5168a970377cb483fa0 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2019-04-18  Martin Sebor  <msebor@redhat.com>
+
+       PR middle-end/89797
+       * tree.h (TYPE_VECTOR_SUBPARTS): Use HOST_WIDE_INT_1U.
+       * config/aarch64/aarch64.c (aarch64_simd_vector_alignment): Avoid
+       assuming type size fits in SHWI.
+
 2019-04-18  Jan Hubicka  <hubicka@ucw.cz>
 
        PR ipa/85051

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 9be75485ce3a97c34792d1ca13385cf384f6c043..41bdefc6fee53391e0d1aad7e6cc69411ba94840 100644 (file)
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -14924,8 +14924,7 @@ aarch64_simd_vector_alignment (const_tree type)
        be set for non-predicate vectors of booleans.  Modes are the most
        direct way we have of identifying real SVE predicate types.  */
     return GET_MODE_CLASS (TYPE_MODE (type)) == MODE_VECTOR_BOOL ? 16 : 128;
-  HOST_WIDE_INT align = tree_to_shwi (TYPE_SIZE (type));
-  return MIN (align, 128);
+  return wi::umin (wi::to_wide (TYPE_SIZE (type)), 128).to_uhwi ();
 }
 
 /* Implement target hook TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT.  */

diff --git a/gcc/tree.h b/gcc/tree.h
index 7c00c292eb9aa45aead60699ea39f815715b9d60..2f2f109451a1125d5ee95922659c04ed111ab544 100644 (file)
--- a/gcc/tree.h
+++ b/gcc/tree.h
@@ -3735,13 +3735,13 @@ TYPE_VECTOR_SUBPARTS (const_tree node)
   if (NUM_POLY_INT_COEFFS == 2)
     {
       poly_uint64 res = 0;
-      res.coeffs[0] = 1 << (precision & 0xff);
+      res.coeffs[0] = HOST_WIDE_INT_1U << (precision & 0xff);
       if (precision & 0x100)
-       res.coeffs[1] = 1 << (precision & 0xff);
+       res.coeffs[1] = HOST_WIDE_INT_1U << (precision & 0xff);
       return res;
     }
   else
-    return (unsigned HOST_WIDE_INT)1 << precision;
+    return HOST_WIDE_INT_1U << precision;
 }
 
 /* Set the number of elements in VECTOR_TYPE NODE to SUBPARTS, which must