RISC-V: Add early clobber to the dest of vwsll

We missed the existing early clobber for the dest operand of vwsll
pattern when resolve the conflict of revert register overlap.  Thus
add it back to the pattern.  Unfortunately, we have no test to cover
this part and will improve this after GCC-15 open.

The below tests are passed for this patch:
* The rv64gcv fully regression test with isl build.

gcc/ChangeLog:

	* config/riscv/vector-crypto.md: Add early clobber to the
	dest operand of vwsll.

Signed-off-by: Pan Li <pan2.li@intel.com>

diff --git a/gcc/config/riscv/vector-crypto.md b/gcc/config/riscv/vector-crypto.md
index 8a4888a765353076effe8a70038b15ce65b74ce4..e474ddf5da73a263a4f8334b4aa1ee240d5d0eca 100755 (executable)
--- a/gcc/config/riscv/vector-crypto.md
+++ b/gcc/config/riscv/vector-crypto.md
@@ -303,7 +303,7 @@
    (set_attr "mode" "<V_DOUBLE_TRUNC>")])
 
 (define_insn "@pred_vwsll<mode>_scalar"
-  [(set (match_operand:VWEXTI 0 "register_operand"              "=vr,     vr")
+  [(set (match_operand:VWEXTI 0 "register_operand"              "=&vr,    &vr")
      (if_then_else:VWEXTI
        (unspec:<VM>
          [(match_operand:<VM> 1 "vector_mask_operand"           "vmWc1, vmWc1")