Nathan Sidwell [Thu, 18 Jan 2018 11:53:50 +0000 (11:53 +0000)]
PR c++/83160] local ref to capture
https://gcc.gnu.org/ml/gcc-patches/2018-01/msg01638.html
PR c++/83160
* cp-tree.h (mark_use): Declare.
* expr.c (mark_use): Make extern.
* call.c (direct_reference_binding): Set inner conv's
rvaluedness_matches_p, if it is an identity.
(convert_like_real): Mark lvalue or rvalue use for identity as
rvaledness_matches_p demands.
Richard Biener [Thu, 18 Jan 2018 10:59:33 +0000 (10:59 +0000)]
re PR tree-optimization/83887 ([graphite] ICE in verify_dominators, at dominance.c:1184 (error: dominator of 3 should be 21, not 18))
2018-01-18 Richard Biener <rguenther@suse.de>
PR tree-optimization/83887
* graphite-scop-detection.c
(scop_detection::get_nearest_dom_with_single_entry): Remove.
(scop_detection::get_nearest_pdom_with_single_exit): Likewise.
(scop_detection::merge_sese): Re-implement with a flood-fill
algorithm that properly finds a SESE region if it exists.
* gcc.dg/graphite/pr83887.c: New testcase.
* gfortran.dg/graphite/pr83887.f90: Likewise.
* gfortran.dg/graphite/pr83887.f: Likewise.
Kyrylo Tkachov [Thu, 18 Jan 2018 09:30:58 +0000 (09:30 +0000)]
[arm] PR target/65578: Fix builtin-bswap16-1.c and builtin-bswap-1.c
The builtin-bswap-1.c and builtin-bswap16-1.c are pretty annoying at the moment.
They force an explicit armv6 option that is a thumb1 target, so if you're testing a toolchain
configured with something like --with-cpu=cortex-a15 --with-float=hard --with-mode=thumb
you'll get those pesky errors about Thumb1 hard-float not being implemented, even though
the tests don't relate to floating-point functionality at all. I *think* this is also due
to the wrong order of dg-options and dg-require-effective-target directives that might
end up not doing a proper effective target check.
The solution in this patch is to commonise the code and create a couple of tests for each.
One tests an armv6t2 target. This allows us to test an ARM or a Thumb2 target.
The second one sets an armv6-m target, which is a Thumb1 target.
The dg-add-options machinery for arm_arch_v6m knows how to add the right -mfloat-abi=soft option.
With this patch we end up testing all of ARM, Thumb1, Thumb2 codegen whereas before we only
ever tried testing Thumb1, if the multilib options happened to line up just right, and would
give an ugly error otherwise. Now, if the multilib options don't allow the test it should just
appear as UNSUPPORTED.
PR target/65578
* gcc.target/arm/builtin-bswap.x: New file.
* gcc.target/arm/builtin-bswap-1.c: Include the above. Add checks
and options for armv6t2.
* gcc.target/arm/builtin-bswap-2.c: Include the above. Add checks
and options for Thumb1.
* gcc.target/arm/builtin-bswap16.x: New file.
* gcc.target/arm/builtin-bswap16-1.c: Include the above. Add checks
and options for armv6t2.
* gcc.target/arm/builtin-bswap16-2.c: Include the above. Add checks
and options for Thumb1.
Ian Lance Taylor [Thu, 18 Jan 2018 04:24:48 +0000 (04:24 +0000)]
re PR go/83787 (Many 32-bit Solaris/SPARC Go tests FAIL after Go1.10beta1 update)
PR go/83787
compiler: pass int to makechan, call makechan64 when appropriate
The update to 1.10beta1 changed makechan to take int instead of int64,
and added a makechan64 call for large values. Since the size is the
last argument to makechan, the old compiler which always passed a
64-bit int worked fine on 64-bit systems and little-endian 32-bit
systems, but broke on big-endian 32-bit systems. This CL fixes the
compiler to use the appropriate types.
Bill Schmidt [Thu, 18 Jan 2018 01:21:50 +0000 (01:21 +0000)]
rs6000.md (*call_indirect_nonlocal_sysv<mode>): Generate different code for -mno-speculate-indirect-jumps.
[gcc]
2018-01-17 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/rs6000.md (*call_indirect_nonlocal_sysv<mode>):
Generate different code for -mno-speculate-indirect-jumps.
(*call_value_indirect_nonlocal_sysv<mode>): Likewise.
(*call_indirect_aix<mode>): Disable for
-mno-speculate-indirect-jumps.
(*call_indirect_aix<mode>_nospec): New define_insn.
(*call_value_indirect_aix<mode>): Disable for
-mno-speculate-indirect-jumps.
(*call_value_indirect_aix<mode>_nospec): New define_insn.
(*sibcall_nonlocal_sysv<mode>): Generate different code for
-mno-speculate-indirect-jumps.
(*sibcall_value_nonlocal_sysv<mode>): Likewise.
[gcc/testsuite]
2018-01-17 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* gcc.target/powerpc/safe-indirect-jump-1.c: Remove endian
restriction, but still restrict to 64-bit.
* gcc.target/powerpc/safe-indirect-jump-7.c: New file.
* gcc.target/powerpc/safe-indirect-jump-8.c: New file.
Michael Meissner [Wed, 17 Jan 2018 23:16:03 +0000 (23:16 +0000)]
rs6000.c (rs6000_emit_move): If we load or store a long double type...
[gcc]
2018-01-17 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000.c (rs6000_emit_move): If we load or store a
long double type, set the flags for noting the default long double
type, even if we don't pass or return a long double type.
[gcc/testsuite]
2018-01-17 Michael Meissner <meissner@linux.vnet.ibm.com>
* gcc.target/powerpc/gnuattr1.c: New test to make sure we set the
appropriate .gnu_attribute for the long double type, if we use the
long double type, but do not generate any calls.
* gcc.target/powerpc/gnuattr2.c: Likewise.
* gcc.target/powerpc/gnuattr3.c: Likewise.
Paolo Carlini [Wed, 17 Jan 2018 21:29:59 +0000 (21:29 +0000)]
re PR c++/78344 (ICE on invalid c++ code on x86_64-linux-gnu (internal compiler error: tree check: expected tree_list, have error_mark in cp_check_const_attributes, at cp/decl2.c:1347))
/cp
2018-01-17 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/78344
* decl.c (grokdeclarator): Do not append the error_mark_node
due to an erroneous optional attribute-specifier-seq.
/testsuite
2018-01-17 Paolo Carlini <paolo.carlini@oracle.com>
Ian Lance Taylor [Wed, 17 Jan 2018 21:24:41 +0000 (21:24 +0000)]
compiler: enable escape analysis for runtime
The runtime package was hard-coded non-escape, and the escape
analysis was not run for the runtime package. This CL removes
the hard-code, and lets the escape analysis decide. It is not
allowed for local variables and closures in the runtime to be
heap allocated. This CL adds the check that make sure that they
indeed do not escape.
The escape analysis is always run when compiling the runtime
now.
Paolo Carlini [Wed, 17 Jan 2018 20:29:25 +0000 (20:29 +0000)]
re PR c++/81054 (ICE with volatile variable in constexpr function)
/cp
2018-01-17 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/81054
* constexpr.c (ensure_literal_type_for_constexpr_object): Return
error_mark_node when we give an error.
* decl.c (cp_finish_decl): Use the latter.
/testsuite
2018-01-17 Paolo Carlini <paolo.carlini@oracle.com>
Paolo Carlini [Wed, 17 Jan 2018 20:28:47 +0000 (20:28 +0000)]
re PR c++/81054 (ICE with volatile variable in constexpr function)
/cp
2018-01-17 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/81054
* constexpr.c (ensure_literal_type_for_constexpr_object): Return
error_mark_node when we give an error.
* decl.c (cp_finish_decl): Use the latter.
/testsuite
2018-01-17 Paolo Carlini <paolo.carlini@oracle.com>
Kyrylo Tkachov [Wed, 17 Jan 2018 19:11:15 +0000 (19:11 +0000)]
[arm] Fix gcc.target/arm/g2.c and scd42-2.c for --with-mode=thumb hardfloat targets
These -mcpu=xscale tests are ARM-only tests and they go to great pains to reject
explicit overriding options, but they're missing the -marm in their dg-options, which means
they will still give that nasty Thumb1 hard-float error when testing an implicit --with-mode=thumb
toolchain (--with-cpu=cortex-a15 --with-fpu=neon-vfpv4 --with-float=hard --with-mode=thumb, for example).
This patch adds the missing -marm and all is good again.
* gcc.target/arm/g2.c: Add -marm to dg-options.
* gcc.target/arm/scd42-2.c: Likewise.
Andrew Waterman [Wed, 17 Jan 2018 19:07:20 +0000 (19:07 +0000)]
RISC-V: Mark fsX as call clobbered when soft-float.
2018-01-17 Andrew Waterman <andrew@sifive.com>
gcc/
* config/riscv/riscv.c (riscv_conditional_register_usage): If
UNITS_PER_FP_ARG is 0, set call_used_regs to 1 for all FP regs.
David Malcolm [Wed, 17 Jan 2018 17:51:25 +0000 (17:51 +0000)]
C++: Fix crash in warn_for_memset within templates (PR c++/83814)
gcc/c-family/ChangeLog:
PR c++/83814
* c-common.c (fold_for_warn): Move to c/c-fold.c and cp/expr.c.
gcc/c/ChangeLog:
PR c++/83814
* c-fold.c (fold_for_warn): Move from c-common.c, reducing to just
the C part.
gcc/cp/ChangeLog:
PR c++/83814
* expr.c (fold_for_warn): Move from c-common.c, reducing to just
the C++ part. If processing a template, call
fold_non_dependent_expr rather than fully folding.
gcc/testsuite/ChangeLog:
PR c++/83814
PR c++/83902
* g++.dg/wrappers/pr83814.C: New test case.
* g++.dg/wrappers/pr83902.C: New test case.
David Malcolm [Wed, 17 Jan 2018 16:56:56 +0000 (16:56 +0000)]
lto, testsuite: Fix ICE in -Wodr (PR lto/83121)
PR lto/83121 reports an ICE deep inside the linemap code when -Wodr
reports on a type mismatch.
The root cause is that the warning can access the DECL_SOURCE_LOCATION
of a streamed-in decl before the lto_location_cache has been applied.
lto_location_cache::input_location stores RESERVED_LOCATION_COUNT (==2)
as a poison value until the cache is applied:
250 /* Keep value RESERVED_LOCATION_COUNT in *loc as linemap lookups will
251 ICE on it. */
The fix is relatively simple: apply the cache before reading the
DECL_SOURCE_LOCATION.
Triggering the ICE was fiddly: it seems to be affected by many things,
including the order of files, and (I think) by filenames. My theory is
that it's affected by the ordering of the tree nodes in the LTO stream:
for the ICE to occur, the types in question need to be compared before
some other operation flushes the lto_location_cache. This ordering
is affected by the hash-based ordering in DFS in lto-streamer-out.c, which
might explain why r255066 seemed to trigger the bug; the only relevant
change to LTO there seemed to be:
* lto-streamer-out.c (hash_tree): Hash TYPE_EMPTY_P and DECL_PADDING_P.
If so, then the bug was presumably already present, but hidden.
The patch also adds regression test coverage for the ICE, which is more
involved - as far as I can tell, we don't have an existing way to verify
diagnostics emitted during link-time optimization.
Hence the patch adds some machinery to lib/lto.exp to support two new
directives: dg-lto-warning and dg-lto-message, corresponding to
dg-warning and dg-message respectively, where the diagnostics are
expected to be emitted at link-time.
The test case includes examples of LTO warnings and notes in both the
primary and secondary source files
Doing so required reusing the logic from DejaGnu for handling diagnostics.
Unfortunately the pertinent code is a 50 line loop within a ~200 line Tcl
function in dg.exp (dg-test), so I had to copy it from DejaGnu, making
various changes as necessary (see lto_handle_diagnostics_for_file in the
patch; for example the LTO version supports multiple source files,
identifying which source file emitted a diagnostic).
For non-LTO diagnostics we currently ignore surplus "note" diagnostics.
This patch updates lto_prune_warns to follow this behavior (since
otherwise we'd need numerous dg-lto-message directives for the motivating
test case).
The patch adds these PASS results to g++.sum:
PASS: g++.dg/lto/pr83121 cp_lto_pr83121_0.o assemble, -O0 -flto
PASS: g++.dg/lto/pr83121 cp_lto_pr83121_1.o assemble, -O0 -flto
PASS: g++.dg/lto/pr83121 (test for LTO warnings, pr83121_0.C line 6)
PASS: g++.dg/lto/pr83121 (test for LTO warnings, pr83121_0.C line 8)
PASS: g++.dg/lto/pr83121 (test for LTO warnings, pr83121_1.C line 2)
PASS: g++.dg/lto/pr83121 (test for LTO warnings, pr83121_1.C line 3)
PASS: g++.dg/lto/pr83121 cp_lto_pr83121_0.o-cp_lto_pr83121_1.o link, -O0 -flto
The output for dg-lto-message above refers to "warnings", rather than
"messages" but that's the same as for the non-LTO case, where dg-message
also refers to "warnings".
gcc/ChangeLog:
PR lto/83121
* ipa-devirt.c (add_type_duplicate): When comparing memory layout,
call the lto_location_cache before reading the
DECL_SOURCE_LOCATION of the types.
gcc/testsuite/ChangeLog:
PR lto/83121
* g++.dg/lto/pr83121_0.C: New test case.
* g++.dg/lto/pr83121_1.C: New test case.
* lib/lto.exp (lto_handle_diagnostics_for_file): New procedure,
adapted from DejaGnu's dg-test.
(lto_handle_diagnostics): New procedure.
(lto_prune_warns): Ignore informational notes.
(lto-link-and-maybe-run): Add "messages_by_file" param.
Call lto_handle_diagnostics. Avoid issuing "unresolved" for
"execute" when "link" fails if "execute" was not specified.
(lto-can-handle-directive): New procedure.
(lto-get-options-main): Call lto-can-handle-directive. Add a
dg-messages local, using it to set the caller's
dg-messages-by-file for the given source file.
(lto-get-options): Likewise.
(lto-execute): Add dg-messages-by-file local, and pass it to
lto-link-and-maybe-run.
Wilco Dijkstra [Wed, 17 Jan 2018 16:31:42 +0000 (16:31 +0000)]
[AArch64] PR82964: Fix 128-bit immediate ICEs
This fixes PR82964 which reports ICEs for some CONST_WIDE_INT immediates.
It turns out decimal floating point CONST_DOUBLE get changed into
CONST_WIDE_INT without checking the constraint on the operand, which
results in failures. Avoid this by only allowing SF/DF/TF mode floating
point constants in aarch64_legitimate_constant_p. A similar issue can
occur with 128-bit immediates which may be emitted even when disallowed
in aarch64_legitimate_constant_p, and the constraints in movti_aarch64
don't match. Fix this with a new constraint and allowing valid immediates
in aarch64_legitimate_constant_p.
Rather than allowing all 128-bit immediates and expanding in up to 8
MOV/MOVK instructions, limit them to 4 instructions and use a literal
load for other cases. Improve a few TImode tests to use a literal and
ensure they are skipped with -fpic.
This fixes all reported failures.
gcc/
PR target/82964
* config/aarch64/aarch64.md (movti_aarch64): Use Uti constraint.
* config/aarch64/aarch64.c (aarch64_mov128_immediate): New function.
(aarch64_legitimate_constant_p): Just support CONST_DOUBLE
SF/DF/TF mode to avoid creating illegal CONST_WIDE_INT immediates.
* config/aarch64/aarch64-protos.h (aarch64_mov128_immediate):
Add declaration.
* config/aarch64/constraints.md (aarch64_movti_operand):
Limit immediates.
* config/aarch64/predicates.md (Uti): Add new constraint.
gcc/testsuite/
PR target/79041
PR target/82964
* gcc.target/aarch64/pr79041-2.c: Improve test, disable with fpic.
* gcc.target/aarch64/pr78733.c: Improve test, disable with fpic.
Co-Authored-By: Richard Sandiford <richard.sandiford@linaro.org>
From-SVN: r256800
Kyrylo Tkachov [Wed, 17 Jan 2018 16:27:19 +0000 (16:27 +0000)]
[arm][testsuite] Fix -march tests in effective target checks auto-generation
There is a typo in the armv8.1-a and armv8.2-a effective target check generators.
They are not actually used anywhere in the testsuite as far as I can tell, but the fix is obvious.
* lib/target-supports.exp: Fix -march arguments in arm arch effective
target check autogenerator for armv8.1-a and armv8.2-a.
2018-01-17 Carl Love <cel@us.ibm.com>
* config/rs6000/vsx.md (define_expand xl_len_r,
define_expand stxvl, define_expand *stxvl): Add match_dup argument.
(define_insn): Add, match_dup 1 argument to define_insn stxvll and
lxvll.
(define_expand, define_insn): Move the shift left from the
define_insn to the define_expand for lxvl and stxvl instructions.
* config/rs6000/rs6000-builtin.def (BU_P9V_64BIT_VSX_2): Change LXVL
and XL_LEN_R definitions to PURE.
gcc/testsuite/ChangeLog:
2018-01-17 Carl Love <cel@us.ibm.com>
* gcc.target/powerpc/builtins-6-p9-runnable.c: Add additional tests.
Add debug print statements.
* gcc.target/powerpc/builtins-5-p9-runnable.c: Add test to do
16 byte vector load followed by a partial vector load.
Uros Bizjak [Wed, 17 Jan 2018 15:58:48 +0000 (16:58 +0100)]
i386.c (indirect_thunk_name): Declare regno as unsigned int.
* config/i386/i386.c (indirect_thunk_name): Declare regno
as unsigned int. Compare regno with INVALID_REGNUM.
(output_indirect_thunk): Ditto.
(output_indirect_thunk_function): Ditto.
(ix86_code_end): Declare regno as unsigned int. Use INVALID_REGNUM
in the call to output_indirect_thunk_function.
David Malcolm [Wed, 17 Jan 2018 15:56:07 +0000 (15:56 +0000)]
Fix failure building LLVM with location wrapper nodes (PR c++/83799)
PR c++/83799 reports a failure building LLVM due to a bogus
"no matching function for call to" error at a callsite like this:
TLI->getTypeLegalizationCost(DL);
where "DL" is from:
using TargetTransformInfoImplBase::DL;
The root cause is that type_dependent_expression_p on a USING_DECL
should return true when processing a template, but after r256448 the
the argument at the callsite is a location wrapper around the USING_DECL,
and type_dependent_expression_p erroneously returns false for it, as
it is comparing tree codes, and failing a match, then looking at types.
This prevents cp_parser_postfix_expression from using the
"build_min_nt_call_vec" path for handling the call, instead erroneously
handling it via build_new_method_call (which fails for this case).
This patch fixes the problem by stripping any location wrappers before
the various tree code tests in type_dependent_expression_p. It fixes
the reduced test case, and the full BasicTargetTransformInfo.ii; after
this patch, the assembly generated for that latter case is identical to
that generated before r256448.
gcc/cp/ChangeLog:
PR c++/83799
* pt.c (type_dependent_expression_p): Strip any location wrapper
before testing tree codes.
(selftest::test_type_dependent_expression_p): New function.
(selftest::cp_pt_c_tests): Call it.
gcc/testsuite/ChangeLog:
PR c++/83799
* g++.dg/wrappers/pr83799.C: New test case.
Nathan Sidwell [Wed, 17 Jan 2018 15:39:35 +0000 (15:39 +0000)]
[C++/83739] bogus error tsubsting range for in generic lambda
https://gcc.gnu.org/ml/gcc-patches/2018-01/msg01554.html
PR c++/83739
* pt.c (tsubst_expr) <case RANGE_FOR_STMT>: Rebuild a range_for if
this not a final instantiation.
Kyrylo Tkachov [Wed, 17 Jan 2018 11:30:35 +0000 (11:30 +0000)]
[arm] Convert gcc.target/arm/stl-cond.c into an RTL test
This is an awkward testsuite failure. The original bug was that we were failing to put out
the conditional code in the conditional form of the STL instruction (oops!).
So we wanted to output STLNE, but instead output STL.
The testacase relies on if-conversion to conditionalise the insn for STL.
However, ever since r251643 the expansion of a non-relaxed atomic store
always includes a compiler barrier. That blocks if-conversion in all cases.
So there's no easy way to get to a conditional STL instruction from a C program.
But we do want to test for the original bug fix that if the RTL insn for STL is conditionalised
it should output the conditional code.
The solution in this patch is to convert the test into an RTL test with the COND_EXEC form
of the STL insn and scan the assembly output there.
This seems to work fine, and gives us an opportunity to create a gcc.dg/rtl/arm directory
in the RTL tests.
This now makes the gcc.target/arm/stl-cond.c disappear (as the test is deleted) and
the new test in gcc.dg/rtl/arm/stl-cond.c passes.
* gcc.dg/rtl/arm/stl-cond.c: New test.
* gcc.target/arm/stl-cond.c: Delete.
Kyrylo Tkachov [Wed, 17 Jan 2018 11:24:52 +0000 (11:24 +0000)]
[arm] Fix gcc.target/arm/pr40887.c directives
This patch converts gcc.target/arm/pr40887.c to use the proper effective target check and dg-add-options for armv5te
so that we avoid situations where we end up trying to compile the test with a Thumb1 hard-float ABI, which makes the
compiler complain.
This allows the test to pass gracefully for me for my compiler configured with:
--with-cpu=cortex-a15 --with-fpu=neon-vfpv4 --with-float=hard --with-mode=thumb
* gcc.target/arm/pr40887.c: Add armv5te effective target checks and
directives.
Kyrylo Tkachov [Wed, 17 Jan 2018 11:13:05 +0000 (11:13 +0000)]
[arm] Fix gcc.target/arm/xor-and.c
This test is naughty because it doesn't use the proper effective target checks
and add-options mechanisms for setting a Thumb1 target, which leads to Thumb1 hard-float errors
when testing a toolchain configured with --with-cpu=cortex-a15 --with-fpu=neon-vfpv4 --with-float=hard --with-mode=thumb.
This patch fixes that in the obvious way.
* gcc.target/arm/xor-and.c: Fix armv6 effective target checks
and options.
to an aligned 32-bit integer. The strict-alignment handling of
this case creates an aligned temporary slot, moves the operand
into the slot in the operand's original mode, then accesses the
slot in the more-aligned result mode.
Previously the size of the temporary slot was calculated using:
HOST_WIDE_INT temp_size
= MAX (int_size_in_bytes (inner_type),
(HOST_WIDE_INT) GET_MODE_SIZE (mode));
int_size_in_bytes would return -1 for the variable-length type,
so we'd use the size of the result mode for the slot. r256152 replaced
int_size_in_bytes with tree_to_poly_uint64, which triggered an ICE.
If op0 has BLKmode we do a block copy of GET_MODE_SIZE (mode) bytes
and then convert the slot to "mode":
so I think in that case just the size of "mode" is enough, even if op0
is a fixed-size type. For non-BLKmode op0 we first move in op0's mode
and then convert the slot to "mode":
emit_move_insn (new_with_op0_mode, op0);
op0 = new_rtx;
}
}
op0 = adjust_address (op0, mode, 0);
so I think we want the maximum of the two mode sizes in that case.
2018-01-17 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
PR middle-end/83884
* expr.c (expand_expr_real_1): Use the size of GET_MODE (op0)
rather than the size of inner_type to determine the stack slot size
when handling VIEW_CONVERT_EXPRs on strict-alignment targets.
Ian Lance Taylor [Wed, 17 Jan 2018 01:39:05 +0000 (01:39 +0000)]
elf.c (codes): Fix size to be 288.
* elf.c (codes) [GENERATE_FIXED_HUFFMAN_TABLE]: Fix size to be
288.
(main) [GENERATE_FIXED_HUFFMAN_TABLE]: Pass 288 to
elf_zlib_inflate_table. Generate elf_zlib_default_dist_table.
(elf_zlib_default_table): Update.
(elf_zlib_default_dist_table): New static array.
(elf_zlib_inflate): Use elf_zlib_default_dist_table for dist table
for block type 1.
* ztest.c (struct zlib_test): Add uncompressed_len.
(tests): Initialize uncompressed_len field. Add new test case.
(test_samples): Use uncompressed_len field.
Michael Meissner [Wed, 17 Jan 2018 01:06:34 +0000 (01:06 +0000)]
config.gcc (powerpc*-linux*-*): Add support for 64-bit little endian Linux systems to optionally enable...
2018-01-16 Michael Meissner <meissner@linux.vnet.ibm.com>
* config.gcc (powerpc*-linux*-*): Add support for 64-bit little
endian Linux systems to optionally enable multilibs for selecting
the long double type if the user configured an explicit type.
* config/rs6000/rs6000.h (TARGET_IEEEQUAD_MULTILIB): Indicate we
have no long double multilibs if not defined.
* config/rs6000/rs6000.c (rs6000_option_override_internal): Do not
warn if the user used -mabi={ieee,ibm}longdouble and we built
multilibs for long double.
* config/rs6000/linux64.h (MULTILIB_DEFAULTS_IEEE): Define as the
appropriate multilib option.
(MULTILIB_DEFAULTS): Add MULTILIB_DEFAULTS_IEEE to the default
multilib options.
* config/rs6000/t-ldouble-linux64le-ibm: New configuration files
for building long double multilibs.
* config/rs6000/t-ldouble-linux64le-ieee: Likewise.
pa.h (MALLOC_ABI_ALIGNMENT): Set 32-bit alignment default to 64 bits.
* config/pa.h (MALLOC_ABI_ALIGNMENT): Set 32-bit alignment default to
64 bits.
* config/pa/pa32-linux.h (MALLOC_ABI_ALIGNMENT): Set alignment to
128 bits.
Eric Botcazou [Tue, 16 Jan 2018 21:21:29 +0000 (21:21 +0000)]
patchable_function_entry-decl.c: Use 3 NOPs on Visium.
* c-c++-common/patchable_function_entry-decl.c: Use 3 NOPs on Visium.
* c-c++-common/patchable_function_entry-default.c: 4 NOPs on Visium.
* c-c++-common/patchable_function_entry-definition.c: 2 NOPs on Visium.
Bill Schmidt [Tue, 16 Jan 2018 16:49:39 +0000 (16:49 +0000)]
rs6000.c (rs6000_opt_vars): Add entry for -mspeculate-indirect-jumps.
[gcc]
2018-01-16 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/rs6000.c (rs6000_opt_vars): Add entry for
-mspeculate-indirect-jumps.
* config/rs6000/rs6000.md (*call_indirect_elfv2<mode>): Disable
for -mno-speculate-indirect-jumps.
(*call_indirect_elfv2<mode>_nospec): New define_insn.
(*call_value_indirect_elfv2<mode>): Disable for
-mno-speculate-indirect-jumps.
(*call_value_indirect_elfv2<mode>_nospec): New define_insn.
(indirect_jump): Emit different RTL for
-mno-speculate-indirect-jumps.
(*indirect_jump<mode>): Disable for
-mno-speculate-indirect-jumps.
(*indirect_jump<mode>_nospec): New define_insn.
(tablejump): Emit different RTL for
-mno-speculate-indirect-jumps.
(tablejumpsi): Disable for -mno-speculate-indirect-jumps.
(tablejumpsi_nospec): New define_expand.
(tablejumpdi): Disable for -mno-speculate-indirect-jumps.
(tablejumpdi_nospec): New define_expand.
(*tablejump<mode>_internal1): Disable for
-mno-speculate-indirect-jumps.
(*tablejump<mode>_internal1_nospec): New define_insn.
* config/rs6000/rs6000.opt (mspeculate-indirect-jumps): New
option.
[gcc/testsuite]
2018-01-16 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* gcc.target/powerpc/safe-indirect-jump-1.c: New file.
* gcc.target/powerpc/safe-indirect-jump-2.c: New file.
* gcc.target/powerpc/safe-indirect-jump-3.c: New file.
* gcc.target/powerpc/safe-indirect-jump-4.c: New file.
* gcc.target/powerpc/safe-indirect-jump-5.c: New file.
* gcc.target/powerpc/safe-indirect-jump-6.c: New file.
Jakub Jelinek [Tue, 16 Jan 2018 15:18:24 +0000 (16:18 +0100)]
re PR libgomp/83590 ([nvptx] openacc reduction C regressions)
PR libgomp/83590
* gimplify.c (gimplify_one_sizepos): For is_gimple_constant (expr)
return early, inline manually is_gimple_sizepos. Make sure if we
call gimplify_expr we don't end up with a gimple constant.
* tree.c (variably_modified_type_p): Don't return true for
is_gimple_constant (_t). Inline manually is_gimple_sizepos.
* gimplify.h (is_gimple_sizepos): Remove.
Co-Authored-By: Richard Biener <rguenther@suse.de>
From-SVN: r256748
vect_analyze_loop_operations was calling vectorizable_live_operation
for all live-out phis, which led to a bogus ncopies calculation in
the pure SLP case. I think v_a_l_o should only be passing phis
that are vectorised using normal loop vectorisation, since
vect_slp_analyze_node_operations handles the SLP side (and knows
the correct slp_index and slp_node arguments to pass in, via
vect_analyze_stmt).
With that fixed we hit an older bug that vectorizable_live_operation
didn't handle live-out SLP inductions. Fixed by using gimple_phi_result
rather than gimple_get_lhs for phis.
2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
PR tree-optimization/83857
* tree-vect-loop.c (vect_analyze_loop_operations): Don't call
vectorizable_live_operation for pure SLP statements.
(vectorizable_live_operation): Handle PHIs.
gcc/testsuite/
PR tree-optimization/83857
* gcc.dg/vect/pr83857.c: New test.
Jakub Jelinek [Tue, 16 Jan 2018 15:08:32 +0000 (16:08 +0100)]
re PR c/83844 (ICE with warn_if_not_aligned attribute)
PR c/83844
* stor-layout.c (handle_warn_if_not_align): Use byte_position and
multiple_of_p instead of unchecked tree_to_uhwi and UHWI check.
If off is not INTEGER_CST, issue a may not be aligned warning
rather than isn't aligned. Use isn%'t rather than isn't.
* fold-const.c (multiple_of_p) <case BIT_AND_EXPR>: Don't fall through
into MULT_EXPR.
<case MULT_EXPR>: Improve the case when bottom and one of the
MULT_EXPR operands are INTEGER_CSTs and bottom is multiple of that
operand, in that case check if the other operand is multiple of
bottom divided by the INTEGER_CST operand.
is used by code in pa.c and by ASM_DECLARE_FUNCTION_NAME in som.h.
Treating GET_MODE_SIZE as a constant is OK for the former but not
the latter, which is used in target-independent code. This caused
a build failure on hppa2.0w-hp-hpux11.11.
2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
PR target/83858
* config/pa/pa.h (FUNCTION_ARG_SIZE): Delete.
* config/pa/pa-protos.h (pa_function_arg_size): Declare.
* config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Use
pa_function_arg_size instead of FUNCTION_ARG_SIZE.
* config/pa/pa.c (pa_function_arg_advance): Likewise.
(pa_function_arg, pa_arg_partial_bytes): Likewise.
(pa_function_arg_size): New function.
tree t = fold_vec_perm (type, arg1, arg2,
vec_perm_indices (sel, 2, nelts));
where fold_vec_perm takes a const vec_perm_indices &. GCC 4.1 apparently
required a public copy constructor:
gcc/vec-perm-indices.h:85: error: 'vec_perm_indices::vec_perm_indices(const vec_perm_indices&)' is private
gcc/fold-const.c:11410: error: within this context
even though no copy should be made here. This patch tries to work
around that by constructing the vec_perm_indices separately.
2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* fold-const.c (fold_ternary_loc): Construct the vec_perm_indices
in a separate statement.
In the testcase we were trying to group two gather loads, even though
that isn't supported. Fixed by explicitly disallowing grouping of
gathers and scatters.
This problem didn't show up on SVE because there we convert to
IFN_GATHER_LOAD/IFN_SCATTER_STORE pattern statements, which fail
the can_group_stmts_p check.
2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
Jakub Jelinek [Tue, 16 Jan 2018 08:55:14 +0000 (09:55 +0100)]
re PR rtl-optimization/83620 (ICE: in assign_by_spills, at lra-assigns.c:1470: unable to find a register to spill with -flive-range-shrinkage --param=max-sched-ready-insns=0)
PR rtl-optimization/86620
* params.def (max-sched-ready-insns): Bump minimum value to 1.
* gcc.dg/pr64935-2.c: Use --param=max-sched-ready-insns=1
instead of --param=max-sched-ready-insns=0.
* gcc.target/i386/pr83620.c: New test.
* gcc.dg/pr83620.c: New test.
Jakub Jelinek [Tue, 16 Jan 2018 08:44:48 +0000 (09:44 +0100)]
re PR c++/83817 (internal compiler error: tree check: expected call_expr, have aggr_init_expr in tsubst_copy_and_build, at cp/pt.c:17822)
PR c++/83817
* pt.c (tsubst_copy_and_build) <case CALL_EXPR>: If function
is AGGR_INIT_EXPR rather than CALL_EXPR, set AGGR_INIT_FROM_THUNK_P
instead of CALL_FROM_THUNK_P.
Jakub Jelinek [Tue, 16 Jan 2018 08:43:31 +0000 (09:43 +0100)]
re PR c++/83825 (ICE on invalid C++ code with shadowed identifiers: in operator[], at vec.h:826)
PR c++/83825
* name-lookup.c (member_vec_dedup): Return early if len is 0.
(resort_type_member_vec, set_class_bindings,
insert_late_enum_def_bindings): Use vec qsort method instead of
calling qsort directly.
"delayed_cr" is just "cr_logical" with the second source operand not
equal to the destination operand. This patch changes it to be
expressed as type "cr_logical", with a new boolean attribute
"cr_logical_3op" added. This simplifies code.
H.J. Lu [Mon, 15 Jan 2018 22:35:36 +0000 (22:35 +0000)]
Don't check ix86_indirect_branch_register for GOT operand
Since GOT_memory_operand and GOT32_symbol_operand are simple pattern
matches, don't check ix86_indirect_branch_register here. If needed,
-mindirect-branch= will convert indirect branch via GOT slot to a call
and return thunk.
Jakub Jelinek [Mon, 15 Jan 2018 21:47:11 +0000 (22:47 +0100)]
re PR middle-end/83837 (libgomp.fortran/pointer[12].f90 FAIL)
PR middle-end/83837
* omp-expand.c (expand_omp_atomic_pipeline): Use loaded_val
type rather than type addr's type points to.
(expand_omp_atomic_mutex): Likewise.
(expand_omp_atomic): Likewise.
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